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author | Rusty Russell <rusty@rustcorp.com.au> | 2015-02-13 17:13:41 +1030 |
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committer | Rusty Russell <rusty@rustcorp.com.au> | 2015-02-13 17:15:47 +1030 |
commit | b2ce1ea4427f0c752f8718a411435cc9527faa3d (patch) | |
tree | 9ca4fa7f046aadbd993f136c34048f0cb1d54cec /tools | |
parent | 53aceb49f9b7e1d42064ffff4f4df7e9882b182d (diff) | |
download | linux-exynos-b2ce1ea4427f0c752f8718a411435cc9527faa3d.tar.gz linux-exynos-b2ce1ea4427f0c752f8718a411435cc9527faa3d.tar.bz2 linux-exynos-b2ce1ea4427f0c752f8718a411435cc9527faa3d.zip |
tools/lguest: rename virtio_pci_cfg_cap field to match spec.
The next patch will insert many quotes from the virtio 1.0 spec; they
make most sense if we copy the spec.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Diffstat (limited to 'tools')
-rw-r--r-- | tools/lguest/lguest.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/tools/lguest/lguest.c b/tools/lguest/lguest.c index b3e73f258910..b00263f5febb 100644 --- a/tools/lguest/lguest.c +++ b/tools/lguest/lguest.c @@ -126,7 +126,7 @@ static struct device_list devices; struct virtio_pci_cfg_cap { struct virtio_pci_cap cap; - u32 window; /* Data for BAR access. */ + u32 pci_cfg_data; /* Data for BAR access. */ }; struct virtio_pci_mmio { @@ -1301,7 +1301,7 @@ static bool pci_data_iowrite(u16 port, u32 mask, u32 val) */ iowrite(portoff, val, mask, &d->config_words[reg]); return true; - } else if (&d->config_words[reg] == &d->config.cfg_access.window) { + } else if (&d->config_words[reg] == &d->config.cfg_access.pci_cfg_data) { u32 write_mask; /* Must be bar 0 */ @@ -1309,7 +1309,7 @@ static bool pci_data_iowrite(u16 port, u32 mask, u32 val) return false; /* First copy what they wrote into the window */ - iowrite(portoff, val, mask, &d->config.cfg_access.window); + iowrite(portoff, val, mask, &d->config.cfg_access.pci_cfg_data); /* * Now emulate a write. The mask we use is set by @@ -1317,13 +1317,14 @@ static bool pci_data_iowrite(u16 port, u32 mask, u32 val) */ write_mask = (1ULL<<(8*d->config.cfg_access.cap.length)) - 1; verbose("Window writing %#x/%#x to bar %u, offset %u len %u\n", - d->config.cfg_access.window, write_mask, + d->config.cfg_access.pci_cfg_data, write_mask, d->config.cfg_access.cap.bar, d->config.cfg_access.cap.offset, d->config.cfg_access.cap.length); emulate_mmio_write(d, d->config.cfg_access.cap.offset, - d->config.cfg_access.window, write_mask); + d->config.cfg_access.pci_cfg_data, + write_mask); return true; } @@ -1342,7 +1343,7 @@ static void pci_data_ioread(u16 port, u32 mask, u32 *val) return; /* Read through the PCI MMIO access window is special */ - if (&d->config_words[reg] == &d->config.cfg_access.window) { + if (&d->config_words[reg] == &d->config.cfg_access.pci_cfg_data) { u32 read_mask; /* Must be bar 0 */ @@ -1357,12 +1358,12 @@ static void pci_data_ioread(u16 port, u32 mask, u32 *val) * len, *not* this read! */ read_mask = (1ULL<<(8*d->config.cfg_access.cap.length))-1; - d->config.cfg_access.window + d->config.cfg_access.pci_cfg_data = emulate_mmio_read(d, d->config.cfg_access.cap.offset, read_mask); verbose("Window read %#x/%#x from bar %u, offset %u len %u\n", - d->config.cfg_access.window, read_mask, + d->config.cfg_access.pci_cfg_data, read_mask, d->config.cfg_access.cap.bar, d->config.cfg_access.cap.offset, d->config.cfg_access.cap.length); |