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author | Dan Williams <dan.j.williams@intel.com> | 2011-09-01 21:18:20 -0700 |
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committer | James Bottomley <JBottomley@Parallels.com> | 2011-09-22 14:59:09 +0400 |
commit | 8ec6552f4a77d15f446b00aed364e3c12d38aa6c (patch) | |
tree | efaa0dfc6479d28a14e5e778e8eb246ff94c360f /include/scsi/sas.h | |
parent | 9c224ac21506d29f5a6ff4df0c4cc9f97484fa25 (diff) | |
download | linux-exynos-8ec6552f4a77d15f446b00aed364e3c12d38aa6c.tar.gz linux-exynos-8ec6552f4a77d15f446b00aed364e3c12d38aa6c.tar.bz2 linux-exynos-8ec6552f4a77d15f446b00aed364e3c12d38aa6c.zip |
[SCSI] libsas: sgpio write support
Add SFF-8485 v0.7 / SAS-1 smp-write-gpio register support to libsas.
Defer SAS-2 support unless/until it defines an sgpio interface.
Minimum implementation needed to get the lights blinking.
try_test_sas_gpio_gp_bit() provides a common method to parse the
incoming write data (raw bitstream), and the to_sas_gpio_gp_bit() helper
routine can be used as a basis for the set/clear operations for the
'read' implementation. Host implementations parse as many bits
(ODx.[012]) as are locally supported and report the number of registers
successfully written. If the submitted data overruns the internal
number of registers available report the write as a success with the
number of bytes remaining reported in ->resid_len.
Example (assuming an active backplane) set the "identify" pattern for
the first 21 devices:
smp_write_gpio --count=2 --data=92,49,24,92,24,92,49,24 -t 4 --index=1 /dev/bsg/sas_hostX
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'include/scsi/sas.h')
-rw-r--r-- | include/scsi/sas.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/scsi/sas.h b/include/scsi/sas.h index e9fd02281381..a3001add0c66 100644 --- a/include/scsi/sas.h +++ b/include/scsi/sas.h @@ -195,6 +195,14 @@ enum sas_open_rej_reason { SAS_OREJ_RSVD_RETRY = 18, }; +enum sas_gpio_reg_type { + SAS_GPIO_REG_CFG = 0, + SAS_GPIO_REG_RX = 1, + SAS_GPIO_REG_RX_GP = 2, + SAS_GPIO_REG_TX = 3, + SAS_GPIO_REG_TX_GP = 4, +}; + struct dev_to_host_fis { u8 fis_type; /* 0x34 */ u8 flags; |