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| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2018-12-17 09:43:13 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-01-13 10:01:01 +0100 |
| commit | 7bee9f9a131059a16538bb8e86ba567fc39ef733 (patch) | |
| tree | 72f28e921969168ef9e5ec71aa224371092e1884 /drivers/gpio | |
| parent | 9adf9d714b3dd94fddf583eb8e8f12efdfa797e4 (diff) | |
| download | linux-exynos-7bee9f9a131059a16538bb8e86ba567fc39ef733.tar.gz linux-exynos-7bee9f9a131059a16538bb8e86ba567fc39ef733.tar.bz2 linux-exynos-7bee9f9a131059a16538bb8e86ba567fc39ef733.zip | |
gpio: mvebu: only fail on missing clk if pwm is actually to be used
[ Upstream commit c8da642d41a6811c21177c9994aa7dc35be67d46 ]
The gpio IP on Armada 370 at offset 0x18180 has neither a clk nor pwm
registers. So there is no need for a clk as the pwm isn't used anyhow.
So only check for the clk in the presence of the pwm registers. This fixes
a failure to probe the gpio driver for the above mentioned gpio device.
Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/gpio')
| -rw-r--r-- | drivers/gpio/gpio-mvebu.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 45c65f805fd6..be85d4b39e99 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -777,9 +777,6 @@ static int mvebu_pwm_probe(struct platform_device *pdev, "marvell,armada-370-gpio")) return 0; - if (IS_ERR(mvchip->clk)) - return PTR_ERR(mvchip->clk); - /* * There are only two sets of PWM configuration registers for * all the GPIO lines on those SoCs which this driver reserves @@ -790,6 +787,9 @@ static int mvebu_pwm_probe(struct platform_device *pdev, if (!res) return 0; + if (IS_ERR(mvchip->clk)) + return PTR_ERR(mvchip->clk); + /* * Use set A for lines of GPIO chip with id 0, B for GPIO chip * with id 1. Don't allow further GPIO chips to be used for PWM. |