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| author | Pankaj Dubey <pankaj.dubey@samsung.com> | 2018-11-15 16:11:30 +0100 |
|---|---|---|
| committer | Junghoon Kim <jhoon20.kim@samsung.com> | 2019-02-14 14:57:47 +0900 |
| commit | d7f37819f37dd421c0dcd9194185f323b64e2de1 (patch) | |
| tree | 22026e94680245244f7d30961f1dc4dc8cda176b /arch | |
| parent | 829509fb96854a8cb0bbb107ad2420ab0e28fcbe (diff) | |
| download | linux-exynos-d7f37819f37dd421c0dcd9194185f323b64e2de1.tar.gz linux-exynos-d7f37819f37dd421c0dcd9194185f323b64e2de1.tar.bz2 linux-exynos-d7f37819f37dd421c0dcd9194185f323b64e2de1.zip | |
ARM: exynos: Remove secondary startup initialization from smp_prepare_cpus
We are taking care of setting secondary cpu boot address in
exynos_boot_secondary just before sending ipi to secondary CPUs,
so we can safely remove this setting from smp_prepare_cpus.
Change-Id: I2a3f839d7cc03d85df5b377b6f7175535dcc0604
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-exynos/platsmp.c | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 5a03bffe7226..cb6d1997c208 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -387,38 +387,12 @@ fail: static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) { - int i; - exynos_sysram_init(); exynos_set_delayed_reset_assertion(true); if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) scu_enable(scu_base_addr()); - - /* - * Write the address of secondary startup into the - * system-wide flags register. The boot monitor waits - * until it receives a soft interrupt, and then the - * secondary CPU branches to this address. - * - * Try using firmware operation first and fall back to - * boot register if it fails. - */ - for (i = 1; i < max_cpus; ++i) { - unsigned long boot_addr; - u32 mpidr; - u32 core_id; - int ret; - - mpidr = cpu_logical_map(i); - core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); - boot_addr = __pa_symbol(exynos4_secondary_startup); - - ret = exynos_set_boot_addr(core_id, boot_addr); - if (ret) - break; - } } #ifdef CONFIG_HOTPLUG_CPU |