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| author | Mika Westerberg <mika.westerberg@linux.intel.com> | 2016-01-29 16:49:47 +0200 |
|---|---|---|
| committer | Sasha Levin <sasha.levin@oracle.com> | 2016-02-15 15:45:26 -0500 |
| commit | 156e0fd0ecf2f78b732584253a2f21c56a7e79ba (patch) | |
| tree | 3f904d1202a96bfbfed168ad48f58b75be82eaba /arch/mips | |
| parent | 3704a44fc2706841b7af21235e928e0be0bb251d (diff) | |
| download | linux-exynos-156e0fd0ecf2f78b732584253a2f21c56a7e79ba.tar.gz linux-exynos-156e0fd0ecf2f78b732584253a2f21c56a7e79ba.tar.bz2 linux-exynos-156e0fd0ecf2f78b732584253a2f21c56a7e79ba.zip | |
serial: 8250_pci: Add Intel Broadwell ports
[ Upstream commit 6c55d9b98335f7f6bd5f061866ff1633401f3a44 ]
Some recent (early 2015) macbooks have Intel Broadwell where LPSS UARTs are
PCI enumerated instead of ACPI. The LPSS UART block is pretty much same as
used on Intel Baytrail so we can reuse the existing Baytrail setup code.
Add both Broadwell LPSS UART ports to the list of supported devices.
Signed-off-by: Leif Liddy <leif.liddy@gmail.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
Diffstat (limited to 'arch/mips')
0 files changed, 0 insertions, 0 deletions