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author | Vineet Gupta <vgupta@synopsys.com> | 2015-04-15 16:35:38 +0530 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2015-04-20 18:27:36 +0530 |
commit | 30fdd373f24cc50e250c71a6e2df89505e267804 (patch) | |
tree | aecf014d62177d8d438fa4a962c5556f491bc557 /Documentation | |
parent | 22f6b899125063c5dc955dd378c408b14d80b020 (diff) | |
download | linux-exynos-30fdd373f24cc50e250c71a6e2df89505e267804.tar.gz linux-exynos-30fdd373f24cc50e250c71a6e2df89505e267804.tar.bz2 linux-exynos-30fdd373f24cc50e250c71a6e2df89505e267804.zip |
ARC: perf: Rename DT binding to not confuse with power mgmt
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/arc/pct.txt | 20 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/arc/pmu.txt | 24 |
2 files changed, 20 insertions, 24 deletions
diff --git a/Documentation/devicetree/bindings/arc/pct.txt b/Documentation/devicetree/bindings/arc/pct.txt new file mode 100644 index 000000000000..7b9588444f20 --- /dev/null +++ b/Documentation/devicetree/bindings/arc/pct.txt @@ -0,0 +1,20 @@ +* ARC Performance Counters + +The ARC700 can be configured with a pipeline performance monitor for counting +CPU and cache events like cache misses and hits. Like conventional PCT there +are 100+ hardware conditions dynamically mapped to upto 32 counters + +Note that: + * The ARC 700 PCT does not support interrupts; although HW events may be + counted, the HW events themselves cannot serve as a trigger for a sample. + +Required properties: + +- compatible : should contain + "snps,arc700-pct" + +Example: + +pmu { + compatible = "snps,arc700-pct"; +}; diff --git a/Documentation/devicetree/bindings/arc/pmu.txt b/Documentation/devicetree/bindings/arc/pmu.txt deleted file mode 100644 index 49d517340de3..000000000000 --- a/Documentation/devicetree/bindings/arc/pmu.txt +++ /dev/null @@ -1,24 +0,0 @@ -* ARC Performance Monitor Unit - -The ARC 700 can be configured with a pipeline performance monitor for counting -CPU and cache events like cache misses and hits. - -Note that: - * ARC 700 refers to a family of ARC processor cores; - - There is only one type of PMU available for the whole family; - - The PMU may support different sets of events; supported events are probed - at boot time, as required by the reference manual. - - * The ARC 700 PMU does not support interrupts; although HW events may be - counted, the HW events themselves cannot serve as a trigger for a sample. - -Required properties: - -- compatible : should contain - "snps,arc700-pmu" - -Example: - -pmu { - compatible = "snps,arc700-pmu"; -}; |