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| author | Wanpeng Li <wanpeng.li@hotmail.com> | 2017-07-13 18:30:42 -0700 |
|---|---|---|
| committer | Radim Krčmář <rkrcmar@redhat.com> | 2017-07-14 14:26:16 +0200 |
| commit | 52a5c155cf79f1f059bffebf4d06d0249573e659 (patch) | |
| tree | 292b7e858eef7f1f2fd5d664a2f96c3974987582 /Documentation/virtual | |
| parent | adfe20fb48785dd73af3bf91407196eb5403c8cf (diff) | |
| download | linux-exynos-52a5c155cf79f1f059bffebf4d06d0249573e659.tar.gz linux-exynos-52a5c155cf79f1f059bffebf4d06d0249573e659.tar.bz2 linux-exynos-52a5c155cf79f1f059bffebf4d06d0249573e659.zip | |
KVM: async_pf: Let guest support delivery of async_pf from guest mode
Adds another flag bit (bit 2) to MSR_KVM_ASYNC_PF_EN. If bit 2 is 1,
async page faults are delivered to L1 as #PF vmexits; if bit 2 is 0,
kvm_can_do_async_pf returns 0 if in guest mode.
This is similar to what svm.c wanted to do all along, but it is only
enabled for Linux as L1 hypervisor. Foreign hypervisors must never
receive async page faults as vmexits, because they'd probably be very
confused about that.
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com>
Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Diffstat (limited to 'Documentation/virtual')
| -rw-r--r-- | Documentation/virtual/kvm/msr.txt | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/Documentation/virtual/kvm/msr.txt b/Documentation/virtual/kvm/msr.txt index 0a9ea515512a..1ebecc115dc6 100644 --- a/Documentation/virtual/kvm/msr.txt +++ b/Documentation/virtual/kvm/msr.txt @@ -166,10 +166,11 @@ MSR_KVM_SYSTEM_TIME: 0x12 MSR_KVM_ASYNC_PF_EN: 0x4b564d02 data: Bits 63-6 hold 64-byte aligned physical address of a 64 byte memory area which must be in guest RAM and must be - zeroed. Bits 5-2 are reserved and should be zero. Bit 0 is 1 + zeroed. Bits 5-3 are reserved and should be zero. Bit 0 is 1 when asynchronous page faults are enabled on the vcpu 0 when disabled. Bit 1 is 1 if asynchronous page faults can be injected - when vcpu is in cpl == 0. + when vcpu is in cpl == 0. Bit 2 is 1 if asynchronous page faults + are delivered to L1 as #PF vmexits. First 4 byte of 64 byte memory location will be written to by the hypervisor at the time of asynchronous page fault (APF) |