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| author | Andrzej Hajda <a.hajda@samsung.com> | 2018-02-02 16:11:22 +0100 |
|---|---|---|
| committer | Marek Szyprowski <m.szyprowski@samsung.com> | 2019-03-19 14:53:18 +0100 |
| commit | 1d2108db4bdec55725b3217f06ac5138ea558b87 (patch) | |
| tree | 4e1cb1e76969f02ec5a840da5dd5a76da6e00484 | |
| parent | d0d37833d37e5f749eeffedadfa9662b6ed2d80a (diff) | |
| download | linux-exynos-1d2108db4bdec55725b3217f06ac5138ea558b87.tar.gz linux-exynos-1d2108db4bdec55725b3217f06ac5138ea558b87.tar.bz2 linux-exynos-1d2108db4bdec55725b3217f06ac5138ea558b87.zip | |
drm/exynos/mixer: fix synchronization check in interlaced mode
In case of interlace mode video processor registers and mixer config
register must be check to ensure internal state is in sync with shadow
registers.
This patch fixes page-faults in interlaced mode.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
[backport of mainline commit 2eced8e917b060587fc8ed46df41c364957a5050]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I8b09ed165101a7dcccd1d6e7338e0216a27f4481
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_mixer.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/exynos/regs-mixer.h | 1 |
2 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index c31a3d2e52fe..94ba8cd0627a 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -494,6 +494,7 @@ static void vp_video_buffer(struct mixer_context *ctx, spin_lock_irqsave(&ctx->reg_slock, flags); + vp_reg_write(ctx, VP_SHADOW_UPDATE, 1); /* interlace or progressive scan mode */ val = (test_bit(MXR_BIT_INTERLACE, &ctx->flags) ? ~0 : 0); vp_reg_writemask(ctx, VP_MODE, val, VP_MODE_LINE_SKIP); @@ -711,6 +712,15 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg) /* interlace scan need to check shadow register */ if (test_bit(MXR_BIT_INTERLACE, &ctx->flags)) { + if (test_bit(MXR_BIT_VP_ENABLED, &ctx->flags) && + vp_reg_read(ctx, VP_SHADOW_UPDATE)) + goto out; + + base = mixer_reg_read(ctx, MXR_CFG); + shadow = mixer_reg_read(ctx, MXR_CFG_S); + if (base != shadow) + goto out; + base = mixer_reg_read(ctx, MXR_GRAPHIC_BASE(0)); shadow = mixer_reg_read(ctx, MXR_GRAPHIC_BASE_S(0)); if (base != shadow) diff --git a/drivers/gpu/drm/exynos/regs-mixer.h b/drivers/gpu/drm/exynos/regs-mixer.h index c311f571bdf9..189cfa2470a8 100644 --- a/drivers/gpu/drm/exynos/regs-mixer.h +++ b/drivers/gpu/drm/exynos/regs-mixer.h @@ -47,6 +47,7 @@ #define MXR_MO 0x0304 #define MXR_RESOLUTION 0x0310 +#define MXR_CFG_S 0x2004 #define MXR_GRAPHIC0_BASE_S 0x2024 #define MXR_GRAPHIC1_BASE_S 0x2044 |