diff options
| author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2019-03-01 16:44:21 +0100 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2019-03-27 12:18:53 +0100 |
| commit | 81b35ee6c4a2d5b28d9a0c2405735ab9cd216df3 (patch) | |
| tree | c3c4fc12890c9b39bbe6576b498a0054aebddd4f | |
| parent | d20edbc85ae24e9ec178370a4983e65ef7d83e02 (diff) | |
| download | linux-exynos-81b35ee6c4a2d5b28d9a0c2405735ab9cd216df3.tar.gz linux-exynos-81b35ee6c4a2d5b28d9a0c2405735ab9cd216df3.tar.bz2 linux-exynos-81b35ee6c4a2d5b28d9a0c2405735ab9cd216df3.zip | |
clk: samsung: Add CLK_IGNORE_UNUSED for Exynos5433 ABB, ASV_TB clocks
Prevent disabling these clocks by the kernel until proper support
is added to the ASV driver.
With current code this patch is not necessarily required, because
exynos_asv_init() is being called before unused clocks get disabled
by clk core. However, things may break when the timings change
for any reason.
This patch has been tested after changing initcall type in exynos-asv.c:
-late_initcall(exynos_asv_init)
+late_initcall_sync(exynos_asv_init)
Change-Id: I513ff391bece219318020c0bcca07e2a7938a175
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
| -rw-r--r-- | drivers/clk/samsung/clk-exynos5433.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index 7e6c0c9397a9..32ef8d6161ea 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -1460,7 +1460,7 @@ static const struct samsung_gate_clock mif_gate_clks[] __initconst = { GATE(CLK_PCLK_GPIO_ALIVE, "pclk_gpio_alive", "div_aclk_mif_133", ENABLE_PCLK_MIF, 8, CLK_IGNORE_UNUSED, 0), GATE(CLK_PCLK_ABB, "pclk_abb", "div_aclk_mif_133", - ENABLE_PCLK_MIF, 7, 0, 0), + ENABLE_PCLK_MIF, 7, CLK_IGNORE_UNUSED, 0), GATE(CLK_PCLK_PMU_APBIF, "pclk_pmu_apbif", "div_aclk_mif_133", ENABLE_PCLK_MIF, 6, CLK_IGNORE_UNUSED, 0), GATE(CLK_PCLK_DDR_PHY1, "pclk_ddr_phy1", "div_aclk_mif_133", @@ -1894,7 +1894,7 @@ static const struct samsung_gate_clock peris_gate_clks[] __initconst = { /* ENABLE_SCLK_PERIS */ GATE(CLK_SCLK_ASV_TB, "sclk_asv_tb", "oscclk_efuse_common", - ENABLE_SCLK_PERIS, 10, 0, 0), + ENABLE_SCLK_PERIS, 10, CLK_IGNORE_UNUSED, 0), GATE(CLK_SCLK_TMU1, "sclk_tmu1", "oscclk_efuse_common", ENABLE_SCLK_PERIS, 4, 0, 0), GATE(CLK_SCLK_TMU0, "sclk_tmu0", "oscclk_efuse_common", |