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| author | Chanwoo Choi <cw00.choi@samsung.com> | 2016-04-11 12:57:52 +0900 |
|---|---|---|
| committer | Chanwoo Choi <cw00.choi@samsung.com> | 2017-09-13 19:23:50 +0900 |
| commit | c27e7a935e9d483b5fdf5979a05b4b57890956cc (patch) | |
| tree | 5c90d7d5b034d272b9fe86a87df860fe04df8ffa | |
| parent | 3425be94c96509806402a8f430e4194fb9a31667 (diff) | |
| download | linux-exynos-c27e7a935e9d483b5fdf5979a05b4b57890956cc.tar.gz linux-exynos-c27e7a935e9d483b5fdf5979a05b4b57890956cc.tar.bz2 linux-exynos-c27e7a935e9d483b5fdf5979a05b4b57890956cc.zip | |
ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12
This patch adds the bus nodes using VDD_MIF for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data
between DRAM and DMC/ACP/C2C.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Change-Id: I54e41571a08aaaf62f48ae9258cdeac8613efc44
| -rw-r--r-- | arch/arm/boot/dts/exynos4x12.dtsi | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 74a64f5e8061..36fedd3a4ff8 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -416,4 +416,76 @@ clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>; #iommu-cells = <0>; }; + + bus_dmc: bus_dmc { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_DMC>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + status = "disabled"; + }; + + bus_acp: bus_acp { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_ACP>; + clock-names = "bus"; + operating-points-v2 = <&bus_acp_opp_table>; + status = "disabled"; + }; + + bus_c2c: bus_c2c { + compatible = "samsung,exynos-bus"; + clocks = <&clock CLK_DIV_C2C>; + clock-names = "bus"; + operating-points-v2 = <&bus_dmc_opp_table>; + status = "disabled"; + }; + + bus_dmc_opp_table: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <900000>; + }; + opp@134000000 { + opp-hz = /bits/ 64 <134000000>; + opp-microvolt = <900000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <900000>; + }; + opp@267000000 { + opp-hz = /bits/ 64 <267000000>; + opp-microvolt = <950000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1050000>; + }; + }; + + bus_acp_opp_table: opp_table2 { + compatible = "operating-points-v2"; + opp-shared; + + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <0>; + }; + opp@134000000 { + opp-hz = /bits/ 64 <134000000>; + opp-microvolt = <0>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <0>; + }; + opp@267000000 { + opp-hz = /bits/ 64 <267000000>; + opp-microvolt = <0>; + }; + }; }; |