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authorLiviu Dudau <Liviu.Dudau@arm.com>2014-10-08 12:40:09 +0100
committerLiviu Dudau <Liviu.Dudau@arm.com>2014-10-08 12:40:09 +0100
commit941859381554557914e47e6e5d62ca0093eab91a (patch)
tree71055a3de5128dc83898c74282017284cf7c3468
parent04eb81b95d0d700064772b8a43e537ae344ffa4a (diff)
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HDLCD: Limit the pixel clock to 165MHz to match TDA19988 specs.
The DT set the upper limit for the pixel clock to 210MHz. While technically the TDA19988 chip works at that frequency, it is outside the spec sheet values. Restrict the clock range to the published values. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
-rw-r--r--arch/arm64/boot/dts/juno.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/juno.dts b/arch/arm64/boot/dts/juno.dts
index 001edb792b4..be5bf734846 100644
--- a/arch/arm64/boot/dts/juno.dts
+++ b/arch/arm64/boot/dts/juno.dts
@@ -255,7 +255,7 @@
compatible = "arm,scpi-clk-range";
#clock-cells = <1>;
clock-indices = <3>, <4>;
- frequency-range = <23000000 210000000>;
+ frequency-range = <23750000 165000000>;
clock-output-names = "pxlclk0", "pxlclk1";
};