summaryrefslogtreecommitdiff
path: root/drivers/gpu/arm/mali400/r4p0_rel0/platform/exynos/exynos.c
blob: d2ce06e75dd84e24a1c60c2549f5fbee1cf84197 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
/*
 * Mali400 platform glue for Samsung Exynos SoCs
 *
 * Copyright 2013 by Samsung Electronics Co., Ltd.
 * Author: Tomasz Figa <t.figa@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software FoundatIon.
 */

#include <linux/clk.h>
#include <linux/of.h>
#include <linux/mali/mali_utgard.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/workqueue.h>

#include "mali_kernel_common.h"
#include "mali_osk.h"

#ifdef CONFIG_MALI400_PROFILING
#include "mali_osk_profiling.h"
#endif

#include "exynos.h"

struct mali_exynos_variant {
	const struct mali_exynos_dvfs_step *steps;
	unsigned int nr_steps;
	unsigned int has_smmuclk;
};

struct mali_exynos_dvfs_step {
	unsigned int rate;
	unsigned int voltage;
	unsigned int downthreshold;
	unsigned int upthreshold;
};

struct mali_exynos_drvdata {
	struct device *dev;

	const struct mali_exynos_dvfs_step *steps;
	unsigned int nr_steps;
	unsigned int has_smmuclk;

	struct clk *pll;
	struct clk *mux1;
	struct clk *mux2;
	struct clk *sclk;
	struct clk *smmu;
	struct clk *g3d;

	struct regulator *vdd_g3d;

	mali_power_mode power_mode;
	unsigned int dvfs_step;
	unsigned int load;

	struct workqueue_struct *dvfs_workqueue;
	struct work_struct dvfs_work;
};

extern struct platform_device *mali_platform_device;

static struct mali_exynos_drvdata *mali;

/*
 * DVFS tables
 */

#define MALI_DVFS_STEP(freq, voltage, down, up) \
	{freq, voltage, (256 * down) / 100, (256 * up) / 100}

static const struct mali_exynos_dvfs_step mali_exynos_dvfs_step_4210[] = {
	MALI_DVFS_STEP(160,  950000,  0,  90),
	MALI_DVFS_STEP(266, 1050000, 85, 100)
};

static const struct mali_exynos_dvfs_step mali_exynos_dvfs_step_4x12[] = {
	MALI_DVFS_STEP(160,  875000,  0,  70),
	MALI_DVFS_STEP(266,  900000, 62,  90),
	MALI_DVFS_STEP(350,  950000, 85,  90),
	MALI_DVFS_STEP(440, 1025000, 85, 100)
};

static const struct mali_exynos_dvfs_step mali_exynos_dvfs_step_4x12_prime[] = {
	MALI_DVFS_STEP(160,  875000,  0,  70),
	MALI_DVFS_STEP(266,  900000, 62,  90),
	MALI_DVFS_STEP(350,  950000, 85,  90),
	MALI_DVFS_STEP(440, 1025000, 85,  90),
	MALI_DVFS_STEP(533, 1075000, 95, 100)
};

/*
 * Variants
 */

static const struct mali_exynos_variant mali_variant_4210 = {
	.steps = mali_exynos_dvfs_step_4210,
	.nr_steps = ARRAY_SIZE(mali_exynos_dvfs_step_4210),
};

static const struct mali_exynos_variant mali_variant_4x12 = {
	.steps = mali_exynos_dvfs_step_4x12,
	.nr_steps = ARRAY_SIZE(mali_exynos_dvfs_step_4x12),
};

static const struct mali_exynos_variant mali_variant_4x12_prime = {
	.steps = mali_exynos_dvfs_step_4x12_prime,
	.nr_steps = ARRAY_SIZE(mali_exynos_dvfs_step_4x12_prime),
};

const struct of_device_id mali_of_matches[] = {
	{ .compatible = "samsung,exynos4210-g3d",
					.data = &mali_variant_4210, },
	{ .compatible = "samsung,exynos4x12-g3d",
					.data = &mali_variant_4x12, },
	{ .compatible = "samsung,exynos4x12-prime-g3d",
					.data = &mali_variant_4x12_prime, },
	{ /* Sentinel */ }
};

#ifdef CONFIG_MALI400_PROFILING
static inline void _mali_osk_profiling_add_gpufreq_event(int rate, int vol)
{
	_mali_osk_profiling_add_event(MALI_PROFILING_EVENT_TYPE_SINGLE |
		 MALI_PROFILING_EVENT_CHANNEL_GPU |
		 MALI_PROFILING_EVENT_REASON_SINGLE_GPU_FREQ_VOLT_CHANGE,
		 rate, vol, 0, 0, 0);
}
#else
static inline void _mali_osk_profiling_add_gpufreq_event(int rate, int vol)
{
}
#endif

/*
 * DVFS control
 */

static void mali_exynos_set_dvfs_step(struct mali_exynos_drvdata *mali,
							unsigned int step)
{
	const struct mali_exynos_dvfs_step *next = &mali->steps[step];

	if (step <= mali->dvfs_step)
		clk_set_rate(mali->sclk, next->rate * 1000000);

	regulator_set_voltage(mali->vdd_g3d,
					next->voltage, next->voltage);

	if (step > mali->dvfs_step)
		clk_set_rate(mali->sclk, next->rate * 1000000);

	_mali_osk_profiling_add_gpufreq_event(next->rate * 1000000,
		 regulator_get_voltage(mali->vdd_g3d) / 1000);
	mali->dvfs_step = step;
}

static void exynos_dvfs_work(struct work_struct *work)
{
	struct mali_exynos_drvdata *mali = container_of(work,
					struct mali_exynos_drvdata, dvfs_work);
	unsigned int step = mali->dvfs_step;
	const struct mali_exynos_dvfs_step *cur = &mali->steps[step];

	if (mali->load > cur->upthreshold)
		++step;
	else if (mali->load < cur->downthreshold)
		--step;

	BUG_ON(step >= mali->nr_steps);

	if (step != mali->dvfs_step)
		mali_exynos_set_dvfs_step(mali, step);
}

static void exynos_update_dvfs(struct mali_gpu_utilization_data *data)
{
	if (data->utilization_gpu > 255)
		data->utilization_gpu = 255;

	mali->load = data->utilization_gpu;

	queue_work(mali->dvfs_workqueue, &mali->dvfs_work);
}

/*
 * Power management
 */

_mali_osk_errcode_t mali_platform_power_mode_change(mali_power_mode power_mode)
{
	if (WARN_ON(mali->power_mode == power_mode))
		MALI_SUCCESS;

	switch (power_mode) {
	case MALI_POWER_MODE_ON:
		mali_exynos_set_dvfs_step(mali, 0);
		clk_prepare_enable(mali->g3d);
		clk_prepare_enable(mali->sclk);
		if (mali->has_smmuclk)
			clk_prepare_enable(mali->smmu);
		break;

	case MALI_POWER_MODE_LIGHT_SLEEP:
	case MALI_POWER_MODE_DEEP_SLEEP:
		if (mali->has_smmuclk)
			clk_disable_unprepare(mali->smmu);
		clk_disable_unprepare(mali->sclk);
		clk_disable_unprepare(mali->g3d);
		_mali_osk_profiling_add_gpufreq_event(0, 0);
		break;
	}

	mali->power_mode = power_mode;

	MALI_SUCCESS;
}

/*
 * Platform-specific initialization/cleanup
 */

static struct mali_gpu_device_data mali_exynos_gpu_data = {
	.shared_mem_size = SZ_256M,
	.fb_start = 0x40000000,
	.fb_size = 0xb1000000,
	.utilization_interval = 100, /* 100ms in Tizen */
	.utilization_callback = exynos_update_dvfs,
};

_mali_osk_errcode_t mali_platform_init(void)
{
	struct platform_device *pdev = mali_platform_device;
	const struct mali_exynos_variant *variant;
	const struct of_device_id *match;
	struct resource *old_res, *new_res;
	unsigned int i, irq_res, mem_res;
	struct device_node *np;
	int ret;

	if (WARN_ON(!pdev))
		return -ENODEV;

	MALI_DEBUG_PRINT(4, ("mali_platform_device_register() called\n"));

	pdev->dev.platform_data = &mali_exynos_gpu_data;

	np = pdev->dev.of_node;
	if (WARN_ON(!np))
		return -ENODEV;

	match = of_match_node(mali_of_matches, np);
	if (WARN_ON(!match))
		return -ENODEV;

	variant = match->data;

	old_res = pdev->resource;
	new_res = kzalloc(sizeof(*new_res) * pdev->num_resources, GFP_KERNEL);
	if (WARN_ON(!new_res))
		return -ENOMEM;

	/* Copy first resource */
	memcpy(new_res, old_res++, sizeof(*new_res));

	/* Rearrange next resources */
	irq_res = 0;
	mem_res = 0;
	for (i = 1; i < pdev->num_resources; ++i, ++old_res) {
		if (resource_type(old_res) == IORESOURCE_MEM)
			memcpy(&new_res[1 + 2 * mem_res++],
						old_res, sizeof(*old_res));
		else if (resource_type(old_res) == IORESOURCE_IRQ)
			memcpy(&new_res[2 + 2 * irq_res++],
						old_res, sizeof(*old_res));
	}

	kfree(pdev->resource);
	pdev->resource = new_res;

	mali = devm_kzalloc(&pdev->dev, sizeof(*mali), GFP_KERNEL);
	if (WARN_ON(!mali))
		return -ENOMEM;

	mali->dev = &pdev->dev;
	mali->steps = variant->steps;
	mali->nr_steps = variant->nr_steps;
	mali->has_smmuclk = variant->has_smmuclk;

	mali->pll = devm_clk_get(mali->dev, "pll");
	if (WARN_ON(IS_ERR(mali->pll)))
		return PTR_ERR(mali->pll);

	mali->mux1 = devm_clk_get(mali->dev, "mux1");
	if (WARN_ON(IS_ERR(mali->mux1)))
		return PTR_ERR(mali->mux1);

	mali->mux2 = devm_clk_get(mali->dev, "mux2");
	if (WARN_ON(IS_ERR(mali->mux2)))
		return PTR_ERR(mali->mux2);

	mali->sclk = devm_clk_get(mali->dev, "sclk");
	if (WARN_ON(IS_ERR(mali->sclk)))
		return PTR_ERR(mali->sclk);

	if (mali->has_smmuclk) {
		mali->smmu = devm_clk_get(mali->dev, "smmu");
		if (WARN_ON(IS_ERR(mali->smmu)))
			return PTR_ERR(mali->smmu);
	}

	mali->g3d = devm_clk_get(mali->dev, "g3d");
	if (WARN_ON(IS_ERR(mali->g3d)))
		return PTR_ERR(mali->g3d);

	mali->vdd_g3d = devm_regulator_get(mali->dev, "vdd_g3d");
	if (WARN_ON(IS_ERR(mali->vdd_g3d)))
		return PTR_ERR(mali->vdd_g3d);

	mali->dvfs_workqueue = create_singlethread_workqueue("mali_dvfs");
	if (WARN_ON(!mali->dvfs_workqueue))
		return -EFAULT;

	mali->power_mode = MALI_POWER_MODE_LIGHT_SLEEP;

	INIT_WORK(&mali->dvfs_work, exynos_dvfs_work);

	ret = regulator_enable(mali->vdd_g3d);
	if (WARN_ON(ret)) {
		destroy_workqueue(mali->dvfs_workqueue);
		MALI_ERROR(_MALI_OSK_ERR_FAULT);
	}

	clk_set_parent(mali->mux1, mali->pll);
	clk_set_parent(mali->mux2, mali->mux1);
	mali_exynos_set_dvfs_step(mali, 0);

	pm_runtime_set_autosuspend_delay(&pdev->dev, 300);
	pm_runtime_use_autosuspend(&pdev->dev);

	pm_runtime_enable(&pdev->dev);

	MALI_SUCCESS;
}

_mali_osk_errcode_t mali_platform_deinit(void)
{
	struct platform_device *pdev = mali_platform_device;

	pm_runtime_disable(&pdev->dev);

	regulator_disable(mali->vdd_g3d);

	_mali_osk_profiling_add_gpufreq_event(0, 0);

	MALI_SUCCESS;
}