1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
|
/*
* Device Tree Include file for Marvell Armada 370 and Armada XP SoC
*
* Copyright (C) 2012 Marvell
*
* Lior Amsalem <alior@marvell.com>
* Gregory CLEMENT <gregory.clement@free-electrons.com>
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* Ben Dooks <ben.dooks@codethink.co.uk>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*
* This file contains the definitions that are common to the Armada
* 370 and Armada XP SoC.
*/
/include/ "skeleton.dtsi"
/ {
model = "Marvell Armada 370 and XP SoC";
compatible = "marvell,armada-370-xp";
cpus {
cpu@0 {
compatible = "marvell,sheeva-v7";
};
};
mpic: interrupt-controller@d0020000 {
compatible = "marvell,mpic";
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&mpic>;
ranges;
serial@d0012000 {
compatible = "ns16550";
reg = <0xd0012000 0x100>;
reg-shift = <2>;
interrupts = <41>;
status = "disabled";
};
serial@d0012100 {
compatible = "ns16550";
reg = <0xd0012100 0x100>;
reg-shift = <2>;
interrupts = <42>;
status = "disabled";
};
timer@d0020300 {
compatible = "marvell,armada-370-xp-timer";
reg = <0xd0020300 0x30>;
interrupts = <37>, <38>, <39>, <40>;
clocks = <&coreclk 2>;
};
addr-decoding@d0020000 {
compatible = "marvell,armada-addr-decoding-controller";
reg = <0xd0020000 0x258>;
};
sata@d00a0000 {
compatible = "marvell,orion-sata";
reg = <0xd00a0000 0x2400>;
interrupts = <55>;
clocks = <&gateclk 15>, <&gateclk 30>;
clock-names = "0", "1";
status = "disabled";
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "marvell,orion-mdio";
reg = <0xd0072004 0x4>;
};
ethernet@d0070000 {
compatible = "marvell,armada-370-neta";
reg = <0xd0070000 0x2500>;
interrupts = <8>;
clocks = <&gateclk 4>;
status = "disabled";
};
ethernet@d0074000 {
compatible = "marvell,armada-370-neta";
reg = <0xd0074000 0x2500>;
interrupts = <10>;
clocks = <&gateclk 3>;
status = "disabled";
};
i2c0: i2c@d0011000 {
compatible = "marvell,mv64xxx-i2c";
reg = <0xd0011000 0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <31>;
timeout-ms = <1000>;
clocks = <&coreclk 0>;
status = "disabled";
};
i2c1: i2c@d0011100 {
compatible = "marvell,mv64xxx-i2c";
reg = <0xd0011100 0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <32>;
timeout-ms = <1000>;
clocks = <&coreclk 0>;
status = "disabled";
};
};
};
|
