From dd29c7277126db6884df42d41f2fbe2ebc10041e Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 13 Jan 2006 20:51:43 +0000 Subject: [ARM] 3257/1: ixp2000: map in scratch and sram Patch from Lennert Buytenhek For the ixp2000 netdev driver, we need to map in a chunk of SRAM (to store the transmit and receive descriptors) and the scratch get/put area (so that we can use the scratchpad rings in the cpu for managing the descriptors.) These are the final two mappings needed for the netdev driver and the last missing piece for the driver in mainline to work. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-ixp2000/ixp2000-regs.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h index 8cf70ff160a..2b57f91b4eb 100644 --- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h +++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h @@ -26,6 +26,8 @@ * fc000000 da000000 16M PCI CFG0 * fd000000 d8000000 16M PCI I/O * fe[0-7]00000 8M per-platform mappings + * fe900000 80000000 1M SRAM #0 (first MB) + * fea00000 cb400000 1M SCRATCH ring get/put * feb00000 c8000000 1M MSF * fec00000 df000000 1M PCI CSRs * fed00000 de000000 1M PCI CREG @@ -91,6 +93,14 @@ #define IXP2000_MSF_VIRT_BASE 0xfeb00000 #define IXP2000_MSF_SIZE 0x00100000 +#define IXP2000_SCRATCH_RING_PHYS_BASE 0xcb400000 +#define IXP2000_SCRATCH_RING_VIRT_BASE 0xfea00000 +#define IXP2000_SCRATCH_RING_SIZE 0x00100000 + +#define IXP2000_SRAM0_PHYS_BASE 0x80000000 +#define IXP2000_SRAM0_VIRT_BASE 0xfe900000 +#define IXP2000_SRAM0_SIZE 0x00100000 + #define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 #define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 #define IXP2000_PCI_IO_SIZE 0x01000000 -- cgit v1.2.3 From 946d4935fc61e1479f8c057d58c64110bb43d3b0 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 13 Jan 2006 20:51:52 +0000 Subject: [ARM] 3260/1: remove phys_ram from struct machine_desc (part 2) Patch from Nicolas Pitre This field is redundent since it must be equal to PHYS_OFFSET anyway. Now that no code uses it anymore, mark it deprecated and remove all initializations from the tree. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/mach/arch.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h index eb262e078c4..8222bf9fc36 100644 --- a/include/asm-arm/mach/arch.h +++ b/include/asm-arm/mach/arch.h @@ -20,7 +20,7 @@ struct machine_desc { * by assembler code in head-armv.S */ unsigned int nr; /* architecture number */ - unsigned int phys_ram; /* start of physical ram */ + unsigned int __deprecated phys_ram; /* start of physical ram */ unsigned int phys_io; /* start of physical io */ unsigned int io_pg_offst; /* byte offset for io * page tabe entry */ -- cgit v1.2.3 From e72b04756f16e40dfd6dab3da81e03fe6dfe16e6 Mon Sep 17 00:00:00 2001 From: "Hyok S. Choi" Date: Fri, 13 Jan 2006 21:04:17 +0000 Subject: [ARM] start_thread fixup for nommu mode This patch supports start_thread in nommu mode which requires the base index register. Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- include/asm-arm/processor.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h index 31290694648..04f4d34c631 100644 --- a/include/asm-arm/processor.h +++ b/include/asm-arm/processor.h @@ -49,6 +49,12 @@ struct thread_struct { #define INIT_THREAD { } +#ifdef CONFIG_MMU +#define nommu_start_thread(regs) do { } while (0) +#else +#define nommu_start_thread(regs) regs->ARM_r10 = current->mm->start_data +#endif + #define start_thread(regs,pc,sp) \ ({ \ unsigned long *stack = (unsigned long *)sp; \ @@ -65,6 +71,7 @@ struct thread_struct { regs->ARM_r2 = stack[2]; /* r2 (envp) */ \ regs->ARM_r1 = stack[1]; /* r1 (argv) */ \ regs->ARM_r0 = stack[0]; /* r0 (argc) */ \ + nommu_start_thread(regs); \ }) /* Forward declaration, a strange C thing */ -- cgit v1.2.3 From fa0fe48fcca9ea7f8c13e21d2646bbaa1747d183 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 13 Jan 2006 21:30:48 +0000 Subject: [ARM] Separate VIC (vectored interrupt controller) support from Versatile Other machines may wish to make use of the VIC support code, so move it to arch/arm/common. Signed-off-by: Russell King --- include/asm-arm/arch-versatile/entry-macro.S | 1 + include/asm-arm/arch-versatile/platform.h | 23 +------------- include/asm-arm/hardware/vic.h | 45 ++++++++++++++++++++++++++++ 3 files changed, 47 insertions(+), 22 deletions(-) create mode 100644 include/asm-arm/hardware/vic.h (limited to 'include') diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S index 58f0d71759f..feff771c0a0 100644 --- a/include/asm-arm/arch-versatile/entry-macro.S +++ b/include/asm-arm/arch-versatile/entry-macro.S @@ -8,6 +8,7 @@ * warranty of any kind, whether express or implied. */ #include +#include .macro disable_fiq .endm diff --git a/include/asm-arm/arch-versatile/platform.h b/include/asm-arm/arch-versatile/platform.h index cbdd9fb9633..72ef874567d 100644 --- a/include/asm-arm/arch-versatile/platform.h +++ b/include/asm-arm/arch-versatile/platform.h @@ -293,26 +293,7 @@ * VERSATILE_SYS_IC * */ -#define VIC_IRQ_STATUS 0 -#define VIC_FIQ_STATUS 0x04 -#define VIC_IRQ_RAW_STATUS 0x08 -#define VIC_INT_SELECT 0x0C /* 1 = FIQ, 0 = IRQ */ -#define VIC_IRQ_ENABLE 0x10 /* 1 = enable, 0 = disable */ -#define VIC_IRQ_ENABLE_CLEAR 0x14 -#define VIC_IRQ_SOFT 0x18 -#define VIC_IRQ_SOFT_CLEAR 0x1C -#define VIC_PROTECT 0x20 -#define VIC_VECT_ADDR 0x30 -#define VIC_DEF_VECT_ADDR 0x34 -#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */ -#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */ -#define VIC_ITCR 0x300 /* VIC test control register */ - -#define VIC_FIQ_RAW_STATUS 0x08 -#define VIC_FIQ_ENABLE 0x10 /* 1 = enable, 0 = disable */ -#define VIC_FIQ_ENABLE_CLEAR 0x14 -#define VIC_FIQ_SOFT 0x18 -#define VIC_FIQ_SOFT_CLEAR 0x1C +/* VIC definitions in include/asm-arm/hardware/vic.h */ #define SIC_IRQ_STATUS 0 #define SIC_IRQ_RAW_STATUS 0x04 @@ -325,8 +306,6 @@ #define SIC_INT_PIC_ENABLES 0x20 /* set interrupt pass through bits */ #define SIC_INT_PIC_ENABLEC 0x24 /* Clear interrupt pass through bits */ -#define VICVectCntl_Enable (1 << 5) - /* ------------------------------------------------------------------------ * Interrupts - bit assignment (primary) * ------------------------------------------------------------------------ diff --git a/include/asm-arm/hardware/vic.h b/include/asm-arm/hardware/vic.h new file mode 100644 index 00000000000..81825eb54c9 --- /dev/null +++ b/include/asm-arm/hardware/vic.h @@ -0,0 +1,45 @@ +/* + * linux/include/asm-arm/hardware/vic.h + * + * Copyright (c) ARM Limited 2003. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __ASM_ARM_HARDWARE_VIC_H +#define __ASM_ARM_HARDWARE_VIC_H + +#define VIC_IRQ_STATUS 0x00 +#define VIC_FIQ_STATUS 0x04 +#define VIC_RAW_STATUS 0x08 +#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */ +#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ +#define VIC_INT_ENABLE_CLEAR 0x14 +#define VIC_INT_SOFT 0x18 +#define VIC_INT_SOFT_CLEAR 0x1c +#define VIC_PROTECT 0x20 +#define VIC_VECT_ADDR 0x30 +#define VIC_DEF_VECT_ADDR 0x34 + +#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */ +#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */ +#define VIC_ITCR 0x300 /* VIC test control register */ + +#define VIC_VECT_CNTL_ENABLE (1 << 5) + +#ifndef __ASSEMBLY__ +void vic_init(void __iomem *base, u32 vic_sources); +#endif + +#endif -- cgit v1.2.3 From da2b1cd61903c8e9796e76be2d606584f26a78e5 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 14 Jan 2006 16:18:07 +0000 Subject: [ARM] 3101/1: ARM EABI: slab memory must be 64-bit aligned Patch from Nicolas Pitre Although ARM is still using 32-bit pointers, version 5 and later versions of the ARM architecture introduced the ldrd and strd instructions to move 64-bit data which must be 64-bit aligned in memory, and the EABI includes new constraints on structure data alignment to allow for the compiler to use those instructions. This means that any slab allocation must start on a 64-bit boundary which is not equivalent to BYTES_PER_WORD, especially on those architecture versions that implements the ldrd/strd instructions. Overriding the default alignment disables some slab debug features. If those debug features are really needed then the kernel will have to be compiled for version 4 of the ARM architecture. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/page.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h index 4da1d532cbe..416320d9541 100644 --- a/include/asm-arm/page.h +++ b/include/asm-arm/page.h @@ -170,6 +170,13 @@ extern pmd_t *top_pmd; #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) +/* + * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers. + */ +#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) +#define ARCH_SLAB_MINALIGN 8 +#endif + #endif /* __KERNEL__ */ #include -- cgit v1.2.3 From 2dede2d8e925f4c2cb4e136b14df127685e15dd3 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 14 Jan 2006 16:18:08 +0000 Subject: [ARM] 3102/1: ARM EABI: stack pointer must be 64-bit aligned after a CPU exception Patch from Nicolas Pitre The ARM EABI says that the stack pointer has to be 64-bit aligned for reasons already mentioned in patch #3101 when calling C functions. We therefore must verify and adjust sp accordingly when taking an exception from kernel mode since sp might not necessarily be 64-bit aligned if the exception occurs in the middle of a kernel function. If the exception occurs while in user mode then no sp fixup is needed as long as sizeof(struct pt_regs) as well as any additional syscall data stack space remain multiples of 8. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/ptrace.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index 4377e22b7e1..f40948d5444 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -60,9 +60,11 @@ #ifndef __ASSEMBLY__ -/* this struct defines the way the registers are stored on the - stack during a system call. */ - +/* + * This struct defines the way the registers are stored on the + * stack during a system call. Note that sizeof(struct pt_regs) + * has to be a multiple of 8. + */ struct pt_regs { long uregs[18]; }; -- cgit v1.2.3 From 3f2829a31573e3e502b874c8d69a765f7a778793 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 14 Jan 2006 16:31:29 +0000 Subject: [ARM] 3105/4: ARM EABI: new syscall entry convention Patch from Nicolas Pitre For a while we wanted to change the way syscalls were called on ARM. Instead of encoding the syscall number in the swi instruction which requires reading back the instruction from memory to extract that number and polluting the data cache, it was decided that simply storing the syscall number into r7 would be more efficient. Since this represents an ABI change then making that change at the same time as EABI support is the right thing to do. It is now expected that EABI user space binaries put the syscall number into r7 and use "swi 0" to call the kernel. Syscall register argument are also expected to have "EABI arrangement" i.e. 64-bit arguments should be put in a pair of registers from an even register number. Example with long ftruncate64(unsigned int fd, loff_t length): legacy ABI: - put fd into r0 - put length into r1-r2 - use "swi #(0x900000 + 194)" to call the kernel new ARM EABI: - put fd into r0 - put length into r2-r3 (skipping over r1) - put 194 into r7 - use "swi 0" to call the kernel Note that it is important to use 0 for the swi argument as backward compatibility with legacy ABI user space relies on this. The syscall macros in asm-arm/unistd.h were also updated to support both ABIs and implement the right call method automatically. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/unistd.h | 48 ++++++++++++++++++++++++++---------------------- 1 file changed, 26 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index d626e70fade..c9e087fe7e1 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -15,10 +15,12 @@ #include -#if defined(__thumb__) +#define __NR_OABI_SYSCALL_BASE 0x900000 + +#if defined(__thumb__) || defined(__ARM_EABI__) #define __NR_SYSCALL_BASE 0 #else -#define __NR_SYSCALL_BASE 0x900000 +#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE #endif /* @@ -373,13 +375,13 @@ #define __sys1(x) __sys2(x) #ifndef __syscall -#if defined(__thumb__) -#define __syscall(name) \ - "push {r7}\n\t" \ - "mov r7, #" __sys1(__NR_##name) "\n\t" \ - "swi 0\n\t" \ - "pop {r7}" +#if defined(__thumb__) || defined(__ARM_EABI__) +#define __SYS_REG(name) register long __sysreg __asm__("r7") = __NR_##name; +#define __SYS_REG_LIST(regs...) "r" (__sysreg) , ##regs +#define __syscall(name) "swi\t0" #else +#define __SYS_REG(name) +#define __SYS_REG_LIST(regs...) regs #define __syscall(name) "swi\t" __sys1(__NR_##name) "" #endif #endif @@ -395,33 +397,34 @@ do { \ #define _syscall0(type,name) \ type name(void) { \ + __SYS_REG(name) \ register long __res_r0 __asm__("r0"); \ long __res; \ __asm__ __volatile__ ( \ __syscall(name) \ : "=r" (__res_r0) \ - : \ - : "lr"); \ + : __SYS_REG_LIST() ); \ __res = __res_r0; \ __syscall_return(type,__res); \ } #define _syscall1(type,name,type1,arg1) \ type name(type1 arg1) { \ + __SYS_REG(name) \ register long __r0 __asm__("r0") = (long)arg1; \ register long __res_r0 __asm__("r0"); \ long __res; \ __asm__ __volatile__ ( \ __syscall(name) \ : "=r" (__res_r0) \ - : "r" (__r0) \ - : "lr"); \ + : __SYS_REG_LIST( "0" (__r0) ) ); \ __res = __res_r0; \ __syscall_return(type,__res); \ } #define _syscall2(type,name,type1,arg1,type2,arg2) \ type name(type1 arg1,type2 arg2) { \ + __SYS_REG(name) \ register long __r0 __asm__("r0") = (long)arg1; \ register long __r1 __asm__("r1") = (long)arg2; \ register long __res_r0 __asm__("r0"); \ @@ -429,8 +432,7 @@ type name(type1 arg1,type2 arg2) { \ __asm__ __volatile__ ( \ __syscall(name) \ : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1) \ - : "lr"); \ + : __SYS_REG_LIST( "0" (__r0), "r" (__r1) ) ); \ __res = __res_r0; \ __syscall_return(type,__res); \ } @@ -438,6 +440,7 @@ type name(type1 arg1,type2 arg2) { \ #define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \ type name(type1 arg1,type2 arg2,type3 arg3) { \ + __SYS_REG(name) \ register long __r0 __asm__("r0") = (long)arg1; \ register long __r1 __asm__("r1") = (long)arg2; \ register long __r2 __asm__("r2") = (long)arg3; \ @@ -446,8 +449,7 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \ __asm__ __volatile__ ( \ __syscall(name) \ : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1),"r" (__r2) \ - : "lr"); \ + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2) ) ); \ __res = __res_r0; \ __syscall_return(type,__res); \ } @@ -455,6 +457,7 @@ type name(type1 arg1,type2 arg2,type3 arg3) { \ #define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4)\ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ + __SYS_REG(name) \ register long __r0 __asm__("r0") = (long)arg1; \ register long __r1 __asm__("r1") = (long)arg2; \ register long __r2 __asm__("r2") = (long)arg3; \ @@ -464,8 +467,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ __asm__ __volatile__ ( \ __syscall(name) \ : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3) \ - : "lr"); \ + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), "r" (__r3) ) ); \ __res = __res_r0; \ __syscall_return(type,__res); \ } @@ -473,6 +475,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ #define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \ + __SYS_REG(name) \ register long __r0 __asm__("r0") = (long)arg1; \ register long __r1 __asm__("r1") = (long)arg2; \ register long __r2 __asm__("r2") = (long)arg3; \ @@ -483,14 +486,15 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \ __asm__ __volatile__ ( \ __syscall(name) \ : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3),"r" (__r4) \ - : "lr"); \ + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \ + "r" (__r3), "r" (__r4) ) ); \ __res = __res_r0; \ __syscall_return(type,__res); \ } #define _syscall6(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5,type6,arg6) \ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6) { \ + __SYS_REG(name) \ register long __r0 __asm__("r0") = (long)arg1; \ register long __r1 __asm__("r1") = (long)arg2; \ register long __r2 __asm__("r2") = (long)arg3; \ @@ -502,8 +506,8 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 __asm__ __volatile__ ( \ __syscall(name) \ : "=r" (__res_r0) \ - : "r" (__r0),"r" (__r1),"r" (__r2),"r" (__r3), "r" (__r4),"r" (__r5) \ - : "lr"); \ + : __SYS_REG_LIST( "0" (__r0), "r" (__r1), "r" (__r2), \ + "r" (__r3), "r" (__r4), "r" (__r5) ) ); \ __res = __res_r0; \ __syscall_return(type,__res); \ } -- cgit v1.2.3 From c155fc95befc95f4a9d6497f5fadec22f4bc3a24 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 14 Jan 2006 16:32:12 +0000 Subject: [ARM] 3106/2: ARM EABI: some syscall adjustments Patch from Nicolas Pitre Fix a few syscalls for EABI requirements. They were sys_pread64 and sys_pwrite64 where the last argument is now entirely pushed on stack, but since commit 567bd98017d9c9f2ac1c148ddc78c062e8abd398 they don't require any fixup. Remains only the stat64 structure. Non EABI kernels are unaffected. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/stat.h | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/asm-arm/stat.h b/include/asm-arm/stat.h index ec4e2c2e3b4..42c0c13999d 100644 --- a/include/asm-arm/stat.h +++ b/include/asm-arm/stat.h @@ -70,14 +70,7 @@ struct stat64 { long long st_size; unsigned long st_blksize; - -#if defined(__ARMEB__) - unsigned long __pad4; /* Future possible st_blocks hi bits */ - unsigned long st_blocks; /* Number 512-byte blocks allocated. */ -#else /* Must be little */ - unsigned long st_blocks; /* Number 512-byte blocks allocated. */ - unsigned long __pad4; /* Future possible st_blocks hi bits */ -#endif + unsigned long long st_blocks; /* Number 512-byte blocks allocated. */ unsigned long st_atime; unsigned long st_atime_nsec; @@ -89,6 +82,6 @@ struct stat64 { unsigned long st_ctime_nsec; unsigned long long st_ino; -} __attribute__((packed)); +}; #endif -- cgit v1.2.3 From 713c481519f19df9e6d90f257e7da0336b057592 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 14 Jan 2006 16:35:03 +0000 Subject: [ARM] 3108/2: old ABI compat: statfs64 and fstatfs64 Patch from Nicolas Pitre struct statfs64 has extra padding with EABI growing its size from 84 to 88. This struct is now __attribute__((packed,aligned(4))) with a small assembly wrapper to force the sz argument to 84 if it is 88 to avoid copying the extra padding over user space memory unexpecting it. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/statfs.h | 38 +++++++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/statfs.h b/include/asm-arm/statfs.h index e81f82783b8..a02e6a8c3d7 100644 --- a/include/asm-arm/statfs.h +++ b/include/asm-arm/statfs.h @@ -1,6 +1,42 @@ #ifndef _ASMARM_STATFS_H #define _ASMARM_STATFS_H -#include +#ifndef __KERNEL_STRICT_NAMES +# include +typedef __kernel_fsid_t fsid_t; +#endif + +struct statfs { + __u32 f_type; + __u32 f_bsize; + __u32 f_blocks; + __u32 f_bfree; + __u32 f_bavail; + __u32 f_files; + __u32 f_ffree; + __kernel_fsid_t f_fsid; + __u32 f_namelen; + __u32 f_frsize; + __u32 f_spare[5]; +}; + +/* + * With EABI there is 4 bytes of padding added to this structure. + * Let's pack it so the padding goes away to simplify dual ABI support. + * Note that user space does NOT have to pack this structure. + */ +struct statfs64 { + __u32 f_type; + __u32 f_bsize; + __u64 f_blocks; + __u64 f_bfree; + __u64 f_bavail; + __u64 f_files; + __u64 f_ffree; + __kernel_fsid_t f_fsid; + __u32 f_namelen; + __u32 f_frsize; + __u32 f_spare[5]; +} __attribute__ ((packed,aligned(4))); #endif -- cgit v1.2.3 From dd35afc22b76766e827c9e67ebc4b7bf6e31ecab Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 14 Jan 2006 16:36:12 +0000 Subject: [ARM] 3110/5: old ABI compat: multi-ABI syscall entry support Patch from Nicolas Pitre This patch adds the required code to support both user space ABIs at the same time. A second syscall table is created to include legacy ABI syscalls that need an ABI compat wrapper. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/unistd.h | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index c9e087fe7e1..77430d6178a 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -514,22 +514,25 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 #ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM #define __ARCH_WANT_SYS_GETHOSTNAME #define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_SOCKETCALL #define __ARCH_WANT_SYS_GETPGRP #define __ARCH_WANT_SYS_LLSEEK #define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLDUMOUNT #define __ARCH_WANT_SYS_SIGPENDING #define __ARCH_WANT_SYS_SIGPROCMASK #define __ARCH_WANT_SYS_RT_SIGACTION + +#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT) +#define __ARCH_WANT_SYS_TIME +#define __ARCH_WANT_SYS_OLDUMOUNT +#define __ARCH_WANT_SYS_ALARM +#define __ARCH_WANT_SYS_UTIME +#define __ARCH_WANT_SYS_OLD_GETRLIMIT +#define __ARCH_WANT_OLD_READDIR +#define __ARCH_WANT_SYS_SOCKETCALL +#endif #endif #ifdef __KERNEL_SYSCALLS__ -- cgit v1.2.3 From 3f471126ee53feb5e9b210ea2f525ed3bb9b7a7f Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 14 Jan 2006 19:30:04 +0000 Subject: [ARM] 3262/4: allow ptraced syscalls to be overriden Patch from Nicolas Pitre This is needed by strace to properly handle the tracing of some system calls. It could be useful for other applications as well. Based on an earlier patch from Daniel Jacobowitz. Signed-off-by: Nicolas Pitre Signed-off-by: Daniel Jacobowitz Signed-off-by: Russell King --- include/asm-arm/ptrace.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index f40948d5444..77adb7fa169 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -23,6 +23,9 @@ #define PTRACE_OLDSETOPTIONS 21 #define PTRACE_GET_THREAD_AREA 22 + +#define PTRACE_SET_SYSCALL 23 + /* * PSR bits */ -- cgit v1.2.3