From d3c12873c36005263286cf5660663c8c10f9d2b5 Mon Sep 17 00:00:00 2001 From: Kapil Juneja Date: Fri, 11 May 2007 18:25:11 -0500 Subject: gianfar: add support for SGMII Add code for initialising and configuring TBI interface and programming it for connecting to on-chip SERDES (Lynx PHY) in case of SGMII mode selected through HRCW at reset. also add defines for TBI register configuration. TBI interface is programmed towards the SERDES. refactored mdio read/write functions to differentiate programming local interface MII regs (e.g., for TBI) from always programming the mdio master (TSEC1, for programming the PHYs). Signed-off-by: Kapil Juneja Signed-off-by: Andy Fleming Signed-off-by: Kim Phillips Signed-off-by: Jeff Garzik --- drivers/net/gianfar.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers/net/gianfar.h') diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h index 39e9e321fcb..d8e779c102f 100644 --- a/drivers/net/gianfar.h +++ b/drivers/net/gianfar.h @@ -136,6 +136,12 @@ extern const char gfar_driver_version[]; #define MIIMCFG_RESET 0x80000000 #define MIIMIND_BUSY 0x00000001 +/* TBI register addresses */ +#define MII_TBICON 0x11 + +/* TBICON register bit fields */ +#define TBICON_CLK_SELECT 0x0020 + /* MAC register bits */ #define MACCFG1_SOFT_RESET 0x80000000 #define MACCFG1_RESET_RX_MC 0x00080000 -- cgit v1.2.3