From bc8b2428e73ce19aecbf2aac3f5d4c844adb3216 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 11 Oct 2012 21:59:17 -0700 Subject: ARM: shmobile: armadillo800eva: __io abuse cleanup a2a47ca36642e3995e982957bc42678cf11ca6ac (ARM: __io abuse cleanup) cleanuped __io() -> IOMEM(), but armadillo800eva was a outside of a target, since "merge window" timing issue. This patch cleanup it. Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-armadillo800eva.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 2912eab3b96..3cc8b1c21da 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -1196,7 +1196,7 @@ static void __init eva_init(void) #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 32K*8way */ - l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff); + l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff); #endif i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); -- cgit v1.2.3 From 11f93576b0b50bf391ffafa544b85e541f5e59a5 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 15 Oct 2012 01:10:28 -0700 Subject: ARM: shmobile: r8a7779: use __iomem pointers for MMIO 0a4b04dc299dfb691827a4001b3d8d7e443b71c9 (ARM: shmobile: use __iomem pointers for MMIO) modified iomem pointers so that IOMEM() macro will be used, but clock-r8a7779.c was out of target. This patch fixes it up. Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7779.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 3cafb6ab5e9..37b2a3133b3 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -24,17 +24,17 @@ #include #include -#define FRQMR 0xffc80014 -#define MSTPCR0 0xffc80030 -#define MSTPCR1 0xffc80034 -#define MSTPCR3 0xffc8003c -#define MSTPSR1 0xffc80044 -#define MSTPSR4 0xffc80048 -#define MSTPSR6 0xffc8004c -#define MSTPCR4 0xffc80050 -#define MSTPCR5 0xffc80054 -#define MSTPCR6 0xffc80058 -#define MSTPCR7 0xffc80040 +#define FRQMR IOMEM(0xffc80014) +#define MSTPCR0 IOMEM(0xffc80030) +#define MSTPCR1 IOMEM(0xffc80034) +#define MSTPCR3 IOMEM(0xffc8003c) +#define MSTPSR1 IOMEM(0xffc80044) +#define MSTPSR4 IOMEM(0xffc80048) +#define MSTPSR6 IOMEM(0xffc8004c) +#define MSTPCR4 IOMEM(0xffc80050) +#define MSTPCR5 IOMEM(0xffc80054) +#define MSTPCR6 IOMEM(0xffc80058) +#define MSTPCR7 IOMEM(0xffc80040) /* ioremap() through clock mapping mandatory to avoid * collision with ARM coherent DMA virtual memory range. -- cgit v1.2.3 From 17bfcd3adc2c2002c1fdf990640bc36aec6a90b3 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 12 Oct 2012 22:22:59 +0200 Subject: ARM: dts: compile Integrator device trees This makes sure that the ARM Integrator device trees get compiled during build. Signed-off-by: Linus Walleij Signed-off-by: Olof Johansson --- arch/arm/boot/dts/Makefile | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index c1ce813fcc4..f37cf9fa5fa 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -25,6 +25,8 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ exynos4210-trats.dtb \ exynos5250-smdk5250.dtb dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb +dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ + integratorcp.dtb dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \ kirkwood-dns325.dtb \ -- cgit v1.2.3 From 5448a279ebf2a8e4cc7289ff1ef382b3e71b8ea6 Mon Sep 17 00:00:00 2001 From: Tony Prisk Date: Sat, 13 Oct 2012 17:18:02 +1300 Subject: dtb: fix interrupt assignment for ehci/uhci on wm8505 EHCI and UHCI devices in wm8505.dtsi should use IRQ 1 & 0 respectively - not 43 as used on newer models. Signed-off-by: Tony Prisk Signed-off-by: Olof Johansson --- arch/arm/boot/dts/wm8505.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi index b459691655a..330f833ac3b 100644 --- a/arch/arm/boot/dts/wm8505.dtsi +++ b/arch/arm/boot/dts/wm8505.dtsi @@ -71,13 +71,13 @@ ehci@d8007100 { compatible = "via,vt8500-ehci"; reg = <0xd8007100 0x200>; - interrupts = <43>; + interrupts = <1>; }; uhci@d8007300 { compatible = "platform-uhci"; reg = <0xd8007300 0x200>; - interrupts = <43>; + interrupts = <0>; }; fb@d8050800 { -- cgit v1.2.3 From 3d76f9f5d3f6c88c576ebd92c3e2edb6d6a27e6f Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 15 Oct 2012 16:48:04 +0800 Subject: ARM: dts: imx6q-arm2: move NANDF_CS pins out of 'hog' Commit 9e3c0066 (ARM: dts: imx6q-arm2: add pinctrl for uart and enet) defines NANDF_CS pins as gpio in 'hog', assuming these two pins are always used by usdhc3 in gpio mode as card-detection and write-protection on ARM2 board. But it's not true. These pins are shared by usdhc3 and gpmi-nand. We should have the pins functional for gpmi-nand when usdhc3 is disabled. Move the pins out of 'hog', so that pins only work in gpio mode as CD and WP when usdhc3 is enabled, and otherwise they are available for gpmi-nand. Reported-by: Huang Shijie Signed-off-by: Shawn Guo Tested-by: Huang Shijie Signed-off-by: Olof Johansson --- arch/arm/boot/dts/imx6q-arm2.dts | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts index 15df4c105e8..5bfa02a3f85 100644 --- a/arch/arm/boot/dts/imx6q-arm2.dts +++ b/arch/arm/boot/dts/imx6q-arm2.dts @@ -37,6 +37,13 @@ pinctrl_hog: hoggrp { fsl,pins = < 176 0x80000000 /* MX6Q_PAD_EIM_D25__GPIO_3_25 */ + >; + }; + }; + + arm2 { + pinctrl_usdhc3_arm2: usdhc3grp-arm2 { + fsl,pins = < 1363 0x80000000 /* MX6Q_PAD_NANDF_CS0__GPIO_6_11 */ 1369 0x80000000 /* MX6Q_PAD_NANDF_CS1__GPIO_6_14 */ >; @@ -58,7 +65,8 @@ wp-gpios = <&gpio6 14 0>; vmmc-supply = <®_3p3v>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3_1>; + pinctrl-0 = <&pinctrl_usdhc3_1 + &pinctrl_usdhc3_arm2>; status = "okay"; }; -- cgit v1.2.3 From 786621308cfbb9421a54773e57dbdbe504c417cc Mon Sep 17 00:00:00 2001 From: Mark Zhang Date: Tue, 16 Oct 2012 16:31:49 +0800 Subject: ARM: tegra30: clk: Fix output_rate overflow Change the type of variable from "unsigned long" to "u64". This avoids the overflow while clock rate calculating. Signed-off-by: Mark Zhang Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/tegra30_clocks.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index 5cd502c2716..e9de5dfd94e 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c @@ -1199,7 +1199,7 @@ static long tegra30_pll_round_rate(struct clk_hw *hw, unsigned long rate, { struct clk_tegra *c = to_clk_tegra(hw); unsigned long input_rate = *prate; - unsigned long output_rate = *prate; + u64 output_rate = *prate; const struct clk_pll_freq_table *sel; struct clk_pll_freq_table cfg; int mul; -- cgit v1.2.3 From f2ef412d584ff9947f96990f08eaa1cf45ab8ca9 Mon Sep 17 00:00:00 2001 From: Sivaram Nair Date: Tue, 16 Oct 2012 13:08:35 +0300 Subject: ARM: tegra: rename tegra system timer The timer variable is renamed to avoid confusion and symbol name clash with the tegra_timer clock. Signed-off-by: Sivaram Nair Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/board-dt-tegra20.c | 2 +- arch/arm/mach-tegra/board-dt-tegra30.c | 2 +- arch/arm/mach-tegra/board.h | 2 +- arch/arm/mach-tegra/timer.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 57e235f4ac7..aa5325cd1c4 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -182,7 +182,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") .init_early = tegra20_init_early, .init_irq = tegra_dt_init_irq, .handle_irq = gic_handle_irq, - .timer = &tegra_timer, + .timer = &tegra_sys_timer, .init_machine = tegra_dt_init, .init_late = tegra_dt_init_late, .restart = tegra_assert_system_reset, diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index e4a676d4ddf..5e92a81f9a2 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c @@ -89,7 +89,7 @@ DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)") .init_early = tegra30_init_early, .init_irq = tegra_dt_init_irq, .handle_irq = gic_handle_irq, - .timer = &tegra_timer, + .timer = &tegra_sys_timer, .init_machine = tegra30_dt_init, .init_late = tegra_init_late, .restart = tegra_assert_system_reset, diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h index f88e5143c76..91fbe733a21 100644 --- a/arch/arm/mach-tegra/board.h +++ b/arch/arm/mach-tegra/board.h @@ -55,5 +55,5 @@ static inline int harmony_pcie_init(void) { return 0; } void __init tegra_paz00_wifikill_init(void); -extern struct sys_timer tegra_timer; +extern struct sys_timer tegra_sys_timer; #endif diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index eccdce98304..d3b8c8e7368 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -245,7 +245,7 @@ static void __init tegra_init_timer(void) register_persistent_clock(NULL, tegra_read_persistent_clock); } -struct sys_timer tegra_timer = { +struct sys_timer tegra_sys_timer = { .init = tegra_init_timer, }; -- cgit v1.2.3 From bf88ef883585ebc1a6c2369483833ed11ca7666c Mon Sep 17 00:00:00 2001 From: Sivaram Nair Date: Tue, 16 Oct 2012 13:08:36 +0300 Subject: ARM: tegra: add tegra_timer clock This undoes commit 20f4665 "ARM: tegra: remove tegra_timer from tegra_list_clks" by bringing back the tegra_timer clock. tegra_timer is indeed a clock (hidden by the PERIPH_CLK macro) which should be added to the tegra_list_clks. The above commit caused tegra_init_timer() failing to get the clk reference. Signed-off-by: Sivaram Nair [swarren: added the reverted commit's subject to this patch description] Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/tegra20_clocks_data.c | 1 + arch/arm/mach-tegra/tegra30_clocks_data.c | 1 + 2 files changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-tegra/tegra20_clocks_data.c b/arch/arm/mach-tegra/tegra20_clocks_data.c index cc9b5fd8c3d..8d398a33adf 100644 --- a/arch/arm/mach-tegra/tegra20_clocks_data.c +++ b/arch/arm/mach-tegra/tegra20_clocks_data.c @@ -953,6 +953,7 @@ PERIPH_CLK(pcie_xclk, NULL, "pcie_xclk", 74, 0, 26000000, mux_clk_m, static struct clk *tegra_list_clks[] = { &tegra_apbdma, &tegra_rtc, + &tegra_timer, &tegra_i2s1, &tegra_i2s2, &tegra_spdif_out, diff --git a/arch/arm/mach-tegra/tegra30_clocks_data.c b/arch/arm/mach-tegra/tegra30_clocks_data.c index d92cb556ae3..3d2e5532a9e 100644 --- a/arch/arm/mach-tegra/tegra30_clocks_data.c +++ b/arch/arm/mach-tegra/tegra30_clocks_data.c @@ -1143,6 +1143,7 @@ struct clk *tegra_list_clks[] = { &tegra_apbdma, &tegra_rtc, &tegra_kbc, + &tegra_timer, &tegra_kfuse, &tegra_fuse, &tegra_fuse_burn, -- cgit v1.2.3 From 3f216ef3f451f91d98dc5c69221a507e327eef3a Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 16 Oct 2012 11:19:16 -0700 Subject: ARM: OMAP4: Fix twd_local_timer_register regression Commit 7d7e1eba (ARM: OMAP2+: Prepare for irqs.h removal) changed the interrupts to allow enabling sparse IRQ, but accidentally added the omap3 INTC base to the local IRQ. This causes the following: twd: can't register interrupt 45 (-22) twd_local_timer_register failed -22 The right fix is to not add any base, as it is a local timer. For the OMAP44XX_IRQ_LOCALWDT we had defined earlier there are no users, so no need to fix that. Reported-by: Russell King Acked-by: Santosh Shilimkar Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 44f9aa7ec0c..69e46631a7c 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -467,7 +467,7 @@ OMAP_SYS_TIMER(3_am33xx) #ifdef CONFIG_ARCH_OMAP4 #ifdef CONFIG_LOCAL_TIMERS static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, - OMAP44XX_LOCAL_TWD_BASE, 29 + OMAP_INTC_START); + OMAP44XX_LOCAL_TWD_BASE, 29); #endif static void __init omap4_timer_init(void) -- cgit v1.2.3 From 3fca4eba9654ce2f44b82e33044d258945e755bf Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Tue, 16 Oct 2012 11:19:17 -0700 Subject: ARM: OMAP: resolve sparse warning concerning debug_card_init() Commit 801475ccb2b2c1928b22aec4b9e5285d9e347602 ("ARM: OMAP: move debug_card_init() function") results in the following new sparse warning: arch/arm/plat-omap/debug-devices.c:71:12: warning: symbol 'debug_card_init' was not declared. Should it be static? Fix by implementing Tony's suggestion to add a "sideways include" to the new location of the debug-devices.h file in arch/arm/mach-omap2/. Signed-off-by: Paul Walmsley Acked-by: Igor Grinberg Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/debug-devices.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c index c7a4c0902b3..5a4678edd65 100644 --- a/arch/arm/plat-omap/debug-devices.c +++ b/arch/arm/plat-omap/debug-devices.c @@ -16,6 +16,7 @@ #include #include +#include "../mach-omap2/debug-devices.h" /* Many OMAP development platforms reuse the same "debug board"; these * platforms include H2, H3, H4, and Perseus2. -- cgit v1.2.3 From a2e5b90b0879e42eee4bef49bd217661abc35ee6 Mon Sep 17 00:00:00 2001 From: Benoit Cousson Date: Tue, 16 Oct 2012 11:19:17 -0700 Subject: ARM: OMAP2+: clock data: Add dev-id for the omap-gpmc dummy fck The GPMC code has been converted to a driver by the following commit: commit da496873970c57c4b31e186d967933da0ffa0d7c Author: Afzal Mohammed Date: Sun Sep 23 17:28:25 2012 -0600 ARM: OMAP2+: gpmc: minimal driver support It now requests a clock with con-id "fck" otherwise the probe will fails. [ 0.342010] omap-gpmc omap-gpmc: error: clk_get [ 0.346771] omap-gpmc: probe of omap-gpmc failed with error -2 Add the "omap-gmpc" dev-id and fck con-id to the already existing gmpc-fck dummy clock. Reported-by: Russell King Signed-off-by: Benoit Cousson Cc: Afzal Mohammed Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock44xx_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index d661d138f27..6efc30c961a 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3294,7 +3294,7 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X), CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), - CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), + CLK("omap-gpmc", "fck", &dummy_ck, CK_443X), CLK("omap_i2c.1", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), -- cgit v1.2.3 From 49c58e82023649924b1b0f38d715d94093f4044b Mon Sep 17 00:00:00 2001 From: Sebastien Guiriec Date: Tue, 16 Oct 2012 11:19:17 -0700 Subject: ARM: OMAP4: devices: fixup OMAP4 DMIC platform device error message Correct DMIC hwmod lockup error message and replace printk() by pr_err(). Signed-off-by: Sebastien Guiriec Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/devices.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index c8c211731d2..cba60e05e32 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -341,7 +341,7 @@ static void __init omap_init_dmic(void) oh = omap_hwmod_lookup("dmic"); if (!oh) { - printk(KERN_ERR "Could not look up mcpdm hw_mod\n"); + pr_err("Could not look up dmic hw_mod\n"); return; } -- cgit v1.2.3 From 5276b6877efb8a180e254a06d7497f802f6f9755 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 12 Oct 2012 11:03:28 +0000 Subject: ARM: s3c: mark s3c2440_clk_add as __init_refok s3c2440_clk_add is a subsys_interface method and calls clkdev_add_table, which is marked as __init. The modpost script complains about this because we must not call an __init function from a function in the .text section, and we cannot reference an __init function from a subsys_interface pointer. I have verified that the only code path into s3c2440_clk_add() is from "int __init s3c2440_init(void)", so s3c2440_clk_add can be marked __init_refok instead. Without this patch, building mini2440_defconfig results in: WARNING: vmlinux.o(.text+0x9848): Section mismatch in reference from the function s3c2440_clk_add() to the function .init.text:clkdev_add_table() The function s3c2440_clk_add() references the function __init clkdev_add_table(). This is often because s3c2440_clk_add lacks a __init annotation or the annotation of clkdev_add_table is wrong. Signed-off-by: Arnd Bergmann Acked-by: Kukjin Kim Cc: Russell King Cc: Mike Turquette Cc: Ben Dooks --- arch/arm/mach-s3c24xx/clock-s3c2440.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c index cb2883d553b..937a571d1b3 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2440.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c @@ -149,7 +149,7 @@ static struct clk_lookup s3c2440_clk_lookup[] = { CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), }; -static int s3c2440_clk_add(struct device *dev, struct subsys_interface *sif) +static int __init_refok s3c2440_clk_add(struct device *dev, struct subsys_interface *sif) { struct clk *clock_upll; struct clk *clock_h; -- cgit v1.2.3 From 64e29fd5ed42f5d0ff5b0ea9395b3abd5d43f89b Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Tue, 25 Sep 2012 19:05:32 +0300 Subject: ARM: OMAP: clockdomain: Fix locking on _clkdm_clk_hwmod_enable / disable Previously the code only acquired spinlock after increasing / decreasing the usecount value, which is wrong. This leaves a small window where a task switch may occur between the check of the usecount and the actual wakeup / sleep of the domain. Fixed by moving the spinlock locking before the usecount access. Left the usecount as atomic_t if someone wants an easy access to the parameter through atomic_read. Signed-off-by: Tero Kristo Acked-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clockdomain.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index cbb879139c5..512e79a842c 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -925,15 +925,18 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) return -EINVAL; + spin_lock_irqsave(&clkdm->lock, flags); + /* * For arch's with no autodeps, clkcm_clk_enable * should be called for every clock instance or hwmod that is * enabled, so the clkdm can be force woken up. */ - if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) + if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) { + spin_unlock_irqrestore(&clkdm->lock, flags); return 0; + } - spin_lock_irqsave(&clkdm->lock, flags); arch_clkdm->clkdm_clk_enable(clkdm); pwrdm_state_switch(clkdm->pwrdm.ptr); spin_unlock_irqrestore(&clkdm->lock, flags); @@ -950,15 +953,19 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) return -EINVAL; + spin_lock_irqsave(&clkdm->lock, flags); + if (atomic_read(&clkdm->usecount) == 0) { + spin_unlock_irqrestore(&clkdm->lock, flags); WARN_ON(1); /* underflow */ return -ERANGE; } - if (atomic_dec_return(&clkdm->usecount) > 0) + if (atomic_dec_return(&clkdm->usecount) > 0) { + spin_unlock_irqrestore(&clkdm->lock, flags); return 0; + } - spin_lock_irqsave(&clkdm->lock, flags); arch_clkdm->clkdm_clk_disable(clkdm); pwrdm_state_switch(clkdm->pwrdm.ptr); spin_unlock_irqrestore(&clkdm->lock, flags); -- cgit v1.2.3 From 8119024ef7363591fd958ec89ebfaee7c18209e3 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Wed, 17 Oct 2012 09:41:25 -0500 Subject: ARM: OMAP2+: Allow kernel to boot even if GPMC fails to reserve memory Currently, if the GPMC driver fails to reserve memory when probed we will call BUG() and the kernel will not boot. Instead of calling BUG(), return an error from probe and allow kernel to boot. Boot tested on AM335x beagle bone board and OMAP4430 Panda board. V2 changes: - Ensure that clock and memory resources are released on error. Signed-off-by: Jon Hunter Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 5ac5cf30406..92b5718fa72 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -868,9 +868,9 @@ static void __devexit gpmc_mem_exit(void) } -static void __devinit gpmc_mem_init(void) +static int __devinit gpmc_mem_init(void) { - int cs; + int cs, rc; unsigned long boot_rom_space = 0; /* never allocate the first page, to facilitate bug detection; @@ -890,13 +890,21 @@ static void __devinit gpmc_mem_init(void) if (!gpmc_cs_mem_enabled(cs)) continue; gpmc_cs_get_memconf(cs, &base, &size); - if (gpmc_cs_insert_mem(cs, base, size) < 0) - BUG(); + rc = gpmc_cs_insert_mem(cs, base, size); + if (IS_ERR_VALUE(rc)) { + while (--cs >= 0) + if (gpmc_cs_mem_enabled(cs)) + gpmc_cs_delete_mem(cs); + return rc; + } } + + return 0; } static __devinit int gpmc_probe(struct platform_device *pdev) { + int rc; u32 l; struct resource *res; @@ -936,7 +944,13 @@ static __devinit int gpmc_probe(struct platform_device *pdev) dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), GPMC_REVISION_MINOR(l)); - gpmc_mem_init(); + rc = gpmc_mem_init(); + if (IS_ERR_VALUE(rc)) { + clk_disable_unprepare(gpmc_l3_clk); + clk_put(gpmc_l3_clk); + dev_err(gpmc_dev, "failed to reserve memory\n"); + return rc; + } if (IS_ERR_VALUE(gpmc_setup_irq())) dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); -- cgit v1.2.3 From 529b89ef7ff898397ff3a44b527816a82d0c699c Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Tue, 25 Sep 2012 02:02:13 +0200 Subject: ARM: dove: Add pcie clock support As dove now has clock gating control ensure pcie ports grab their clocks. Signed-off-by: Sebastian Hesselbarth Signed-off-by: Jason Cooper --- arch/arm/mach-dove/pcie.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c index bb15b26041c..0ef4435b165 100644 --- a/arch/arm/mach-dove/pcie.c +++ b/arch/arm/mach-dove/pcie.c @@ -10,6 +10,7 @@ #include #include +#include #include