From 6b85638b83caac7bae9ffa202391882a9ad4388f Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Mon, 11 Feb 2013 19:29:45 +0530 Subject: ARM: OMAP2+: PM: Remove bogus fiq_[enable/disable] tuple On OMAP platform, FIQ is reserved for secure environment only. If at all the FIQ needs to be disabled, it involves going through security API call. Hence the local_fiq_[enable/disable]() in the OMAP code is bogus. On GP devices too, the fiq is disabled for non-secure software. So just get rid of it. Signed-off-by: Santosh Shilimkar --- arch/arm/mach-omap2/cpuidle44xx.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'arch/arm/mach-omap2/cpuidle44xx.c') diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index d639aef0ded..944e64aad7e 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -70,10 +70,7 @@ static int omap4_enter_idle_simple(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - local_fiq_disable(); omap_do_wfi(); - local_fiq_enable(); - return index; } @@ -84,8 +81,6 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev, struct omap4_idle_statedata *cx = &omap4_idle_data[index]; int cpu_id = smp_processor_id(); - local_fiq_disable(); - /* * CPU0 has to wait and stay ON until CPU1 is OFF state. * This is necessary to honour hardware recommondation @@ -158,8 +153,6 @@ fail: cpuidle_coupled_parallel_barrier(dev, &abort_barrier); cpu_done[dev->cpu] = false; - local_fiq_enable(); - return index; } -- cgit v1.2.3 From b7806dc7cba840ea538706621486475d93a53c55 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Fri, 8 Feb 2013 22:50:58 +0530 Subject: ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method While waking up CPU from off state using clock domain force wakeup, restore the CPU power state to ON state before putting CPU clock domain under hardware control. Otherwise CPU wakeup might fail. The change is recommended for all OMAP4+ devices though the PRCM weakness was observed on OMAP5 devices first. As a result of weakness, lock-up is observed inside the hardware state machine of local CPU PRCM and results are UN-predictable as per designers. In software testing, we have seen hard-locks most of the time where system gets frozen. With power domain state restored, system behaves correctly. So update the code accordingly. Acked-by: Nishanth Menon Signed-off-by: Santosh Shilimkar Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/cpuidle44xx.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-omap2/cpuidle44xx.c') diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 944e64aad7e..9de47a70628 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -131,6 +131,7 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev, /* Wakeup CPU1 only if it is not offlined */ if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) { clkdm_wakeup(cpu_clkdm[1]); + omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON); clkdm_allow_idle(cpu_clkdm[1]); } -- cgit v1.2.3