From a10627726453b32ba49ccc0ccaa335b1a308e9ed Mon Sep 17 00:00:00 2001 From: Hyungwon Hwang Date: Mon, 22 Dec 2014 11:40:15 +0900 Subject: arm: dts: exynos4412: add cpu node This patch adds cpu node for Exynos4412. Because headsmp.S distinguish a core by using the combination of cluster id and core id after the commit 'add support secondary core bootup in big.LITTLE processor', but when dt node for cpu is not provided, the core ids are assigned from 0 with the cluster id 0. But Exynos4412's cluster id for its 4 cores is 0xa. So this patch is needed for the cores to get the proper mpidr. Change-Id: I2248fc332a4fbd05dc1983fcfa58f312e454c622 Signed-off-by: Hyungwon Hwang --- arch/arm/boot/dts/exynos4412.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'arch/arm/boot/dts/exynos4412.dtsi') diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index d172639a307..3452b75a070 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -22,6 +22,39 @@ / { compatible = "samsung,exynos4412"; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xa00>; + clock-frequency = <1600000000>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xa01>; + clock-frequency = <1600000000>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xa02>; + clock-frequency = <1600000000>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0xa03>; + clock-frequency = <1600000000>; + }; + }; + gic:interrupt-controller@10490000 { cpu-offset = <0x4000>; }; -- cgit v1.2.3