From fe86e4ed5b3ae86af9557e062cc17595a15f3bf9 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 1 Apr 2014 11:30:24 +0200 Subject: clocksource: exynos_mct: Fix too early ISR fire up on wrong CPU After hotplugging CPU1 the first interrupt handler for CPU1 oneshot timer was called on CPU0 because it fired up before setting IRQ affinity. During setup of the MCT timers the clock event device should be registered after setting the affinity for interrupt. This will prevent starting the timer to early. Additionally, if clock event device has interrupt set up, the clockevents_config_and_register() will also set the affinity for it. Signed-off-by: Krzysztof Kozlowski Change-Id: I64fee65b57106ad562f0ecc1160748a9548debad --- drivers/clocksource/exynos_mct.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 2c627bd653e..a74e49a2e79 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -437,8 +437,6 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) evt->set_mode = exynos4_tick_set_mode; evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; evt->rating = 450; - clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1), - 0xf, 0x7fffffff); exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); @@ -456,6 +454,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) } else { enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0); } + clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1), + 0xf, 0x7fffffff); return 0; } -- cgit v1.2.3