From 43b93fbffc2c080dba2e84df6fce8d7e6c0a2581 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 27 Oct 2010 01:02:35 -0400 Subject: drm/radeon/kms: fix handling of tex lookup disable in cs checker on r2xx There are cases when multiple texture units have to be enabled, but not actually used to sample. This patch checks to see if the lookup_disable bit is set and if so, skips the texture check. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=25544 Signed-off-by: Alex Deucher Cc: stable@kernel.org Signed-off-by: Dave Airlie --- drivers/gpu/drm/radeon/r100.c | 3 +++ drivers/gpu/drm/radeon/r100_track.h | 1 + drivers/gpu/drm/radeon/r200.c | 2 ++ drivers/gpu/drm/radeon/radeon_reg.h | 1 + 4 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 6d1540c0bfe..0e8f28a6892 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -3180,6 +3180,8 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev, for (u = 0; u < track->num_texture; u++) { if (!track->textures[u].enabled) continue; + if (track->textures[u].lookup_disable) + continue; robj = track->textures[u].robj; if (robj == NULL) { DRM_ERROR("No texture bound to unit %u\n", u); @@ -3414,6 +3416,7 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track track->textures[i].robj = NULL; /* CS IB emission code makes sure texture unit are disabled */ track->textures[i].enabled = false; + track->textures[i].lookup_disable = false; track->textures[i].roundup_w = true; track->textures[i].roundup_h = true; if (track->separate_cube) diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h index f47cdca1c00..af65600e656 100644 --- a/drivers/gpu/drm/radeon/r100_track.h +++ b/drivers/gpu/drm/radeon/r100_track.h @@ -46,6 +46,7 @@ struct r100_cs_track_texture { unsigned height_11; bool use_pitch; bool enabled; + bool lookup_disable; bool roundup_w; bool roundup_h; unsigned compress_format; diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c index 0266d72e0a4..d2408c39561 100644 --- a/drivers/gpu/drm/radeon/r200.c +++ b/drivers/gpu/drm/radeon/r200.c @@ -447,6 +447,8 @@ int r200_packet0_check(struct radeon_cs_parser *p, track->textures[i].width = 1 << ((idx_value >> RADEON_TXFORMAT_WIDTH_SHIFT) & RADEON_TXFORMAT_WIDTH_MASK); track->textures[i].height = 1 << ((idx_value >> RADEON_TXFORMAT_HEIGHT_SHIFT) & RADEON_TXFORMAT_HEIGHT_MASK); } + if (idx_value & R200_TXFORMAT_LOOKUP_DISABLE) + track->textures[i].lookup_disable = true; switch ((idx_value & RADEON_TXFORMAT_FORMAT_MASK)) { case R200_TXFORMAT_I8: case R200_TXFORMAT_RGB332: diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index c332f46340d..64928814de5 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h @@ -2836,6 +2836,7 @@ # define R200_TXFORMAT_ST_ROUTE_STQ5 (5 << 24) # define R200_TXFORMAT_ST_ROUTE_MASK (7 << 24) # define R200_TXFORMAT_ST_ROUTE_SHIFT 24 +# define R200_TXFORMAT_LOOKUP_DISABLE (1 << 27) # define R200_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28) # define R200_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) # define R200_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) -- cgit v1.2.3 From 2c7d81acf432fad02073c139355e94a6f7e4df45 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 27 Oct 2010 01:44:35 -0400 Subject: drm/radeon/kms: fix tiled db height calculation on 6xx/7xx Calculate height based on the slice bitfield rather than the size. Same as Dave's CB fix. Signed-off-by: Alex Deucher Signed-off-by: Dave Airlie --- drivers/gpu/drm/radeon/r600_cs.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 7b294c127c5..37cc2aa9f92 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c @@ -310,7 +310,7 @@ static int r600_cs_track_check(struct radeon_cs_parser *p) /* Check depth buffer */ if (G_028800_STENCIL_ENABLE(track->db_depth_control) || G_028800_Z_ENABLE(track->db_depth_control)) { - u32 nviews, bpe, ntiles, pitch, pitch_align, height, size; + u32 nviews, bpe, ntiles, pitch, pitch_align, height, size, slice_tile_max; if (track->db_bo == NULL) { dev_warn(p->dev, "z/stencil with no depth buffer\n"); return -EINVAL; @@ -354,11 +354,11 @@ static int r600_cs_track_check(struct radeon_cs_parser *p) } else { size = radeon_bo_size(track->db_bo); pitch = G_028000_PITCH_TILE_MAX(track->db_depth_size) + 1; - height = size / (pitch * 8 * bpe); - height &= ~0x7; - if (!height) - height = 8; - + slice_tile_max = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1; + slice_tile_max *= 64; + height = slice_tile_max / (pitch * 8); + if (height > 8192) + height = 8192; switch (G_028010_ARRAY_MODE(track->db_depth_info)) { case V_028010_ARRAY_1D_TILED_THIN1: pitch_align = (max((u32)8, (u32)(track->group_size / (8 * bpe))) / 8); @@ -367,6 +367,8 @@ static int r600_cs_track_check(struct radeon_cs_parser *p) __func__, __LINE__, pitch); return -EINVAL; } + /* don't break userspace */ + height &= ~0x7; if (!IS_ALIGNED(height, 8)) { dev_warn(p->dev, "%s:%d db height (%d) invalid\n", __func__, __LINE__, height); -- cgit v1.2.3 From 7e94250312d8b32a18e7e96cee19f2795d224e8c Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 19 Oct 2010 00:36:19 -0400 Subject: drm/radeon/kms: enable unmappable vram for evergreen Evergreen now has blit support, but unmappable vram support was disabled in c919b371cb734f42b1130e706ecee262f8d9261d (drm/radeon/kms: avoid corner case issue with unmappable vram V2) due to merge ordering. This re-enables unmappable vram on evergreen. Signed-off-by: Alex Deucher Signed-off-by: Dave Airlie --- drivers/gpu/drm/radeon/evergreen_blit_kms.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/radeon/evergreen_blit_kms.c b/drivers/gpu/drm/radeon/evergreen_blit_kms.c index 086b9b0416c..ac3b6dde23d 100644 --- a/drivers/gpu/drm/radeon/evergreen_blit_kms.c +++ b/drivers/gpu/drm/radeon/evergreen_blit_kms.c @@ -495,6 +495,7 @@ done: dev_err(rdev->dev, "(%d) pin blit object failed\n", r); return r; } + rdev->mc.active_vram_size = rdev->mc.real_vram_size; return 0; } @@ -502,6 +503,7 @@ void evergreen_blit_fini(struct radeon_device *rdev) { int r; + rdev->mc.active_vram_size = rdev->mc.visible_vram_size; if (rdev->r600_blit.shader_obj == NULL) return; /* If we can't reserve the bo, unref should be enough to destroy -- cgit v1.2.3