From af7f032dba8ccf7ee430a48656d25565672a6074 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Wed, 19 Dec 2012 10:18:37 -0800 Subject: arm: zynq: timer: Remove unnecessary register write Acknowedging an interrupt requires to read the interrupt register only. The write was only required to work around a bug in the QEMU implementation of the TTC, which is fixed. Signed-off-by: Soren Brinkmann Acked-by: Peter Crosthwaite Tested-by: Josh Cartwright --- arch/arm/mach-zynq/timer.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c index 570491d3796..f1d224bf162 100644 --- a/arch/arm/mach-zynq/timer.c +++ b/arch/arm/mach-zynq/timer.c @@ -121,8 +121,7 @@ static irqreturn_t xttcps_clock_event_interrupt(int irq, void *dev_id) struct xttcps_timer *timer = &xttce->xttc; /* Acknowledge the interrupt and call event handler */ - __raw_writel(__raw_readl(timer->base_addr + XTTCPS_ISR_OFFSET), - timer->base_addr + XTTCPS_ISR_OFFSET); + __raw_readl(timer->base_addr + XTTCPS_ISR_OFFSET); xttce->ce.event_handler(&xttce->ce); -- cgit v1.2.3