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path: root/drivers/net/e1000e/ich8lan.c
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2010-03-05e1000e: fix packet corruption and tx hang during NFSv2Jesse Brandeburg1-0/+10
when receiving a particular type of NFS v2 UDP traffic, the hardware could DMA some bad data and then hang, possibly corrupting memory. Disable the NFS parsing in this hardware, verified to fix the bug. Originally reported and reproduced by RedHat's Neil Horman CC: nhorman@tuxdriver.com Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2010-01-23Merge branch 'master' of ↵David S. Miller1-5/+71
master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
2010-01-13e1000e: provide MAC-family-specific function to set LAN IDBruce Allan1-0/+1
Provide MAC-specific function pointer to determine the LAN ID (PCI func). The LAN ID is used internally by the driver to determine which h/w lock to use to protect accessing the PHY on ESB2 as well as help to determine the alternate MAC address on some parts. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2010-01-13e1000e: workaround link issues on busy hub in half duplex on 82577/82578Bruce Allan1-1/+18
This patch removes a delay in hardware after every received packet allowing more time for transmitted packets to go out in between received packets in half duplex. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2010-01-13e1000e: MDIO slow mode should always be done for 82577Bruce Allan1-4/+53
A previous 82577 workaround that set the MDIO access speed to slow mode for every PHY register read/write when the cable is unplugged should instead set the access mode to always be slow before any PHY register access. Since the mode bit gets cleared when the PHY is reset, set the mode after every PHY reset. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2010-01-08e1000e: perform 10/100 adaptive IFS only on parts that support itBruce Allan1-0/+2
Adaptive IFS which involves writing to the Adaptive IFS Throttle register was being done for all devices supported by the driver even though it is not supported (i.e. the register doesn't even exist) on some devices. The feature is supported on 8257x/82583 and ICH/PCH based devices, but not on ESB2. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-12-08e1000e: replace incorrect use of GG82563_REG macroBruce Allan1-3/+5
The GG82563_REG() macro should not be used to determine the offset provided to the e1000e_[read|write]_kmrn_reg() functions since the first argument to the macro is already implied and gets masked off anyway in the functions. The resultant register reads/writes with this patch are functionally the same as before. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-12-02e1000e: correct ICH/PCH PHY operations function pointersBruce Allan1-195/+21
Some function pointers for a few PHY operations (for 82578 and 82567) and were set incorrectly causing functions to be executed that were accessing incorrect PHY register offsets for that particular device. This patch also moves a few PHY-specific functions from ich8lan.c to the more appropriate phy.c. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-12-02e1000e: add debug messagesBruce Allan1-1/+3
Add some helpful debug messages. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-12-02e1000e: comment correctionsBruce Allan1-3/+2
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-12-02e1000e: enable new 82567V-3 deviceBruce Allan1-0/+1
This new PCI device ID is for a new combination of MAC and PHY both of which already have supporting code in the driver, just not yet in this combination. During validation of the device, an intermittent issue was discovered with waking it from a suspended state which can be resolved with the pre-existing workaround to disable gigabit speed prior to suspending. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-12-02e1000e: provide family-specific PHY power up/down operationsBruce Allan1-0/+23
The different families (80003es2lan, 8257x, ICHx/PCH) supported by the driver each have their own conditions when the PHY can be powered down. This patch rewrites the PHY power up/down code to fit with the family- specific style used in the driver. All pre-existing calls to power up or down the PHY remain untouched. A new call to power down the PHY when removing the driver when the interface is down replaces the current call to reset the PHY in order to reduce power consumption. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-29Merge branch 'master' of ↵David S. Miller1-1/+3
master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 Conflicts: drivers/ieee802154/fakehard.c drivers/net/e1000e/ich8lan.c drivers/net/e1000e/phy.c drivers/net/netxen/netxen_nic_init.c drivers/net/wireless/ath/ath9k/main.c
2009-11-21e1000e: cosmetic - group local variables of the same typeBruce Allan1-4/+4
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: remove redundant might_sleep()Bruce Allan1-2/+0
Now that mutex_lock() calls might_sleep() the driver doesn't have to here. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: do not error out on identification LED init failureBruce Allan1-3/+2
A failure to initialize the identification LED is not a fatal condition and should allow the init path to continue. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: cleanup functions that clear hardware statisticsBruce Allan1-12/+11
The e1000_clear_hw_cntrs_*() functions read the registers to clear them. There is no reason to save the register contents so the temp variable can be removed. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: set bools to true/false instead of 1/0Bruce Allan1-9/+9
Set booleans to 'true' or 'false' to make it clear it is a boolean. Also change instances of TRUE/FALSE in comments to lowercase true/false. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: update copyright informationBruce Allan1-1/+1
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: cleanup ops function pointersBruce Allan1-79/+77
The phy and nvm operations structures have function pointers that contain "phy" and "nvm" in the pointer names which are redundant since the structures are already obviously in phy and nvm structures. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: consolidate two dbug macros into one simpler oneBruce Allan1-35/+34
This patch depends on a previous one that cleans up redundant #includes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: cleanup redundant #include'sBruce Allan1-5/+0
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-21e1000e: disable K1 on PCH LOM when in PHY loopback modeBruce Allan1-2/+1
When performing the ethtool PHY loopback test on PCH-based LOMs (82577 and 82578), disable K1 (a MAC-PHY interconnect low power mode) otherwise packets might get corrupted. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-20e1000e: do not initiate autonegotiation during OEM configurationBruce Allan1-1/+2
When configuring the OEM bits in the PHY on 82577/82578, do not restart autonegotiation if the firmware is blocking it (e.g. when an IDE-R session is active) because the link must not go down. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-11-20e1000e: partial revert of 3ec2a2b8 plus FC workraround for 82577/8Bruce Allan1-0/+1
Commit 3ec2a2b80f3eb53851fe4cef9e65b5d33376ef89 broke Tx/Rx when using jumbo frames on certain parts (i.e. only PAUSE frames could be exchanged once the high water mark was reached preventing normal packet traffic). This patch reverts the breakage and sets appropriate high and low water marks of the Rx FIFO for 82577/82578 which require a workaround due to a flow control issue in hardware. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-29e1000e: rework disable K1 at 1000Mbps for 82577/82578Bruce Allan1-17/+170
This patch reworks a previous workaround (commit 7d3cabbcc) for an issue in hardware where noise on the interconnect between the MAC and PHY could be generated by a lower power mode (K1) at 1000Mbps resulting in bad packets. Disable K1 while at 1000 Mbps but keep it enabled for 10/100Mbps and when the cable is disconnected. The original version of this workaround was found to be incomplete. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-29e1000e: config PHY via software after resetsBruce Allan1-78/+217
On PCH-based (82577/82578) and some ICH8-based parts (82566) there is an issue with the hardware automatically configuring the PHY with contents from the EEPROM after the PHY is reset, so do the configuration by the driver instead. This was already similarly done for some 82566 parts in e1000_phy_hw_reset_ich8lan() but needs to be done after other resets, so move the PHY configuration code to its own function and call after all PHY resets. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: allow for swflag to be held over consecutive PHY accessesBruce Allan1-0/+4
PCH-based parts (82577/82578) and some ICH8-based parts (82566) need to hold the swflag (sw/fw/hw hardware semaphore) over consecutive PHY accesses in order to perform sw-driven PHY configuration during initialization to workaround known hardware issues (see follow-on patch). This patch provides new PHY read/write functions (and function pointers) that will allow accessing the PHY registers assuming the swflag has already been acquired. The actual PHY register access code has moved into helper functions that are called with a flag indicating whether or not the swflag has already been acquired and acquires/releases it if not. The functions called from within the updated PHY access functions had to be updated to assume the swflag was already acquired, and other functions that called those functions were also updated to acquire/release the swflag. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: separate mutex usage between NVM and PHY/CSR register for ICHx/PCHBruce Allan1-31/+58
Accesses to NVM and PHY/CSR registers on ICHx/PCH-based parts are protected from concurrent accesses with a mutex that is acquired when the access is initiated and released when the access has completed. However, the two types of accesses should not be protected by the same mutex because the driver may have to access the NVM while already holding the mutex over several consecutive PHY/CSR accesses which would result in livelock. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: 82577/82578 requires a different method to configure LPLUBruce Allan1-0/+40
Unlike previous ICHx-based parts, the PCH-based parts (82577/82578) require LPLU (Low Power Link Up, or "reverse auto-negotiation") to be configured in the PHY rather than the MAC. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: increase swflag acquisition timeout for ICHx/PCHBruce Allan1-1/+3
In some conditions (e.g. when AMT is enabled on the system), it is possible to take an extended period of time to for the driver to acquire the sw/fw/hw hardware semaphore used to protect against concurrent access of a shared resource (e.g. PHY registers). This could cause PHY registers to not get configured properly resulting in link issues. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-26e1000e: clear PHY wakeup bit after LCD reset on 82577/82578Bruce Allan1-1/+9
Performing a dummy read of the PHY Wakeup Control (WUC) register clears the wakeup enable bit set by an PHY reset. If this bit remains set, link problems may occur. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-10-22e1000e: reset the PHY on 82577/82578 when going to SxBruce Allan1-2/+1
The PHY on 82577/82578 parts needs a soft reset when transitioning to Sx state in order for the PHY write which disables gigabit speed to take effect. Gigabit speed must be disabled in order for the PHY writes to registers on page 800 (the wakeup control registers) to work as expected otherwise the system might not wake via WoL. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-08-09e1000e: fix potential NVM corruption on ICH9 with 8K bank sizeBruce Allan1-38/+12
The bank offset was being incorrectly calculated on ICH9 parts with a bank size of 8K (instead of the more common 4K bank) which would cause any NVM writes to be done on the wrong address after switching from bank 1 to bank 0. Additionally, assume we are meant to use bank 0 if a valid bank is not detected, and remove the unnecessary acquisition of the SW/FW/HW semaphore when writing to the shadow ram version of the NVM image. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-08-09e1000e: fix acquisition of SW/FW/HW semaphore for ICHx partsBruce Allan1-13/+31
For ICHx parts, write the EXTCNF_CTRL.SWFLAG bit once when trying to acquire the SW/FW/HW semaphore instead of multiple times to prevent the hardware from having problems (especially for systems with manageability enabled), and extend the timeout for the hardware to set the SWFLAG bit. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-03e1000e: disable K1 at 1000Mbps for 82577/82578Bruce Allan1-1/+106
This workaround is required for an issue in hardware where noise on the interconnect between the MAC and PHY could be generated by a lower power mode (K1) at 1000Mbps resulting in bad packets. Disable K1 while at 1000 Mbps but keep it enabled for 10/100Mbps and when the cable is disconnected. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-03e1000e: prevent NVM corruption on sectors larger than 4KBruce Allan1-2/+17
Limit NVM writes to 4K sections to prevent NVM corruption on larger sector allocations (up to 64K). Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-03e1000e: do not write SmartSpeed register bits on parts without supportBruce Allan1-4/+15
The driver was accessing register bits for features on parts that do not support that feature. This could cause problems in the hardware. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-07-03e1000e: delay after LCD reset and proper checks for PHY configuration doneBruce Allan1-44/+81
A previous workaround for 82578 to avoid link stall causes some PHY registers to get cleared inadvertently. Add a delay after all LCD resets to make sure PHY registers are in a stable state before continuing. Also, after resets check the EEC register for the state of PHY configuration performed by the MAC for ICH9 and earlier parts (as done before), but check the LAN_INIT_DONE bit in the STATUS register for ICH10 and newer parts (EEC doesn't exist in these newer parts). Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-03e1000e: workaround a Tx hang on 82577/82578Bruce Allan1-2/+7
With bi-directional stress traffic, the receiver could hang causing the hardware to stop and a "Detected Tx Unit Hang" message dumped to the system logfile. Temporarily workaround this issue by disabling Tx flow control by default. The issue is currently being investigated and a follow-on patch will be provided to revert this when it is resolved. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-03e1000e: add support for 82577/82578 GbE LOM partsBruce Allan1-23/+408
This patch provides support for the next generation Intel desktop and mobile gigabit ethernet LOM adapters. These adapters are the follow-on parts to the LOMs tied to the prior ICH chipsets and are comprised of a MAC in the PCH chipset and an external PHY (82577 for mobile and 82578 for desktop versions). New features consist of PHY wakeup to save power by completely turning off the MAC while in Sx state, and 4K jumbo frames. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-06-03e1000e: specify max supported frame size in adapter structBruce Allan1-0/+8
By putting the maximum frame size supported by the hardware into the adapter structure, the change_mtu entry point function can be cleaned up of checks for all the different max frame sizes supported by Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-14e1000e: Remove mutex_trylock and associated WARN on failure.dave graham1-16/+1
Single-thread access must be ensured for ICH8 NVM and PHY operations. This synchronization is provided by the nvm_mutex. To assist in understanding the contexts from which this code could be reached, a WARN was output if the mutex was not going to be immediately acquirable (if !mutex_trylock()). The code has now been optimized, and we have verified that the few remaining mutex contentions are reasonable and non-blocking, and it is time to remove the mutex_trylock() and WARN messages. Signed-off-by: dave graham <david.graham@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-01-11e1000e: Add process name to WARN message when detecting Mutex contentionDavid Graham1-6/+13
Adds process name of the current mutex holder to the WARN message output when the e1000e driver attempts to acquire the nvm_mutex and finds that it is already being held. With this patch the WARN message indicates both the process name of the current mutex holder and the process name of the attempted acquisition, which together will help to identify the contending codepaths. Signed-off-by: David Graham <david.graham@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-12-15Merge branch 'master' of ↵David S. Miller1-2/+7
master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 Conflicts: drivers/net/e1000e/ich8lan.c
2008-12-11e1000e: fix double release of mutexJeff Kirsher1-2/+7
During a reset, releasing the swflag after it failed to be acquired would cause a double unlock of the mutex. Instead, test whether acquisition of the swflag was successful and if not, do not release the swflag. The reset must still be done to bring the device to a quiescent state. This resolves [BUG 12200] BUG: bad unlock balance detected! e1000e http://bugzilla.kernel.org/show_bug.cgi?id=12200 Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: check return code from NVM accesses and fix bank detectionBruce Allan1-45/+89
Check return code for all NVM accesses[1] and error out accordingly; log a debug message for failed accesses. For ICH8/9, the valid NVM bank detect function was not checking whether the SEC1VAL (sector 1 valid) bit in the EECD register was itself valid (bits 8 and 9 also have to be set). If invalid, it would have defaulted to the possibly invalid bank 0. Instead, try to use the valid bank detection method used by ICH10 which has been cleaned up a bit. [1] - reads and updates only; not writes because those are only writing to the Shadow RAM, the update following the write is the only thing actually writing the modified Shadow RAM contents to the NVM. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: cosmetic newline in debug messageBruce Allan1-1/+1
Add missing newline from debug message. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: sync change flow control variables with ixgbeBruce Allan1-4/+9
Sync flow control variables and usage model with that found in the ixgbe driver. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-21e1000e: update comments listing supported parts for each MAC familyBruce Allan1-0/+2
Some branding strings (displayed via lspci) are missing from the comments in various family-specific files in the driver. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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