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path: root/drivers/clk/samsung/clk-exynos4.c
AgeCommit message (Expand)AuthorFilesLines
2014-05-15clk: samsung: exynos4: Add ppmu clock's identical numberChanwoo choi1-0/+22
2014-05-15clk: exynos4: enable clk_set_parent() propagation for sclk_hdmi and sclk_mixe...Tomasz Stanislawski1-2/+4
2014-05-15clk: exynos4: export sclk_hdmiphy clockTomasz Stanislawski1-2/+2
2014-05-15clk: exynos4: Keep 'chipid' clock enabledJonghwa Lee1-2/+4
2014-05-15clk: samsung: exynos4: Propagate rate change of SPI dividersTomasz Figa1-3/+6
2014-05-15clk: exynos4: Add additional G2D clocksSachin Kamat1-2/+7
2014-05-15clock: clk-exynos4: set the CLK_SET_RATE_PARENT for mmc4Jaehoon Chung1-1/+2
2014-05-15clk: samsung: exynos4: Do not disable ISP bus clocksTomasz Figa1-4/+4
2014-05-15clk: exynos4: Add CLK_GET_RATE_NOCACHE flag for the Exynos4x12 ISP clocksSylwester Nawrocki1-30/+34
2014-05-15clk: exynos4: Add clock entries for TMUSachin Kamat1-1/+3
2014-05-15clk: samsung: exynos4: Add support for CLKOUTTomasz Figa1-2/+47
2014-05-15clk: Add Exynos Audio Subsystem clocks driverSylwester Nawrocki1-4/+0
2014-05-14clk: samsung: exynos4: Add support for PLL46xx rate configurationTomasz Figa1-2/+4
2014-05-14clk: samsung: exynos4: Fix clock registration orderTomasz Figa1-4/+5
2014-05-14clk: samsung: exynos4: Allow rate setting propagation through sclk_vpllTomasz Figa1-4/+4
2014-05-14clk: samsung: pll: Add support for PLL36xx rate configurationTomasz Figa1-2/+24
2014-05-14clk: samsung: pll: Add support for PLL45xx rate settingTomasz Figa1-2/+16
2014-05-14clock: Support for [A|M]PLL's (35xx) set_rate and round_rate functionsLukasz Majewski1-2/+23
2014-01-15clk: samsung: exynos4: Correct SRC_MFC registerSeung-Woo Kim1-1/+1
2013-05-29clk: samsung: Add CLK_IGNORE_UNUSED flag for the sysreg clocksSylwester Nawrocki1-2/+4
2013-04-19clk: exynos: prepare for multiplatformArnd Bergmann1-51/+42
2013-04-08clk: exynos4: export clocks required for fimc-isSylwester Nawrocki1-7/+13
2013-04-04clk: exynos4: Add support for SoC-specific register save listTomasz Figa1-2/+28
2013-04-04clk: exynos4: Add missing registers to suspend save listTomasz Figa1-0/+33
2013-04-04clk: exynos4: Remove E4X12 prefix from SRC_DMC registerTomasz Figa1-2/+2
2013-04-04clk: exynos4: Add E4210 prefix to GATE_IP_PERIR registerTomasz Figa1-8/+8
2013-04-04clk: exynos4: Add E4210 prefix to LCD1 clock registersTomasz Figa1-11/+11
2013-04-04clk: exynos4: Remove SoC-specific registers from save listTomasz Figa1-16/+0
2013-04-04clk: exynos4: Use SRC_MASK_PERIL{0,1} definitionsTomasz Figa1-11/+19
2013-04-04clk: exynos4: Define {E,V}PLL registersTomasz Figa1-4/+12
2013-04-04clk: exynos4: Add missing mout_sata on Exynos4210Tomasz Figa1-0/+1
2013-04-04clk: exynos4: Add missing CMU_TOP and ISP clocksAndrzej Hajda1-3/+107
2013-04-04clk: exynos4: Add G3D clocksTomasz Figa1-8/+14
2013-04-04clk: exynos4: Add camera related clock definitionsSylwester Nawrocki1-17/+33
2013-04-04clk: exynos4: Export mout_core clock of Exynos4210Tomasz Figa1-1/+2
2013-04-04clk: exynos4: Export clocks used by exynos cpufreq driversLukasz Majewski1-3/+5
2013-04-04clk: exynos4: Move dac and mixer to Exynos4210-specific clocksTomasz Figa1-2/+2
2013-04-04clk: exynos4: Export sclk_pcm0Tomasz Figa1-2/+2
2013-04-04clk: exynos4: Add missing sclk_audio0 clockTomasz Figa1-0/+2
2013-04-04clk: exynos4: Add missing mout_mipihsi clockTomasz Figa1-0/+1
2013-04-04clk: exynos4: Use mout_mpll_user_* on Exynos4x12Tomasz Figa1-61/+111
2013-04-04clk: exynos4: Correct sclk_mfc clock definitionSylwester Nawrocki1-2/+2
2013-03-25clk: exynos4: register clocks using common clock frameworkThomas Abraham1-0/+843