path: root/arch/mips/include/asm/mipsregs.h
AgeCommit message (Expand)AuthorFilesLines
2010-05-15 MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1Shane McDonald1-1/+8
2010-02-27MIPS: Add accessor functions and bit definitions for c0_PageGrainDavid Daney1-0/+11
2010-02-27MIPS: Decode c0_config4 for large TLBs.David Daney1-0/+4
2010-01-28MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQsDavid VomLehn1-0/+12
2009-06-17MIPS: Add hugetlbfs page defines.David Daney1-0/+16
2009-05-14MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware.Ralf Baechle1-4/+4
2009-05-14MIPS: Cavium: Add support for 8k and 32k page sizes.Ralf Baechle1-0/+11
2009-05-14MIPS: SMTC: Bring set/clear/change_c0_## return value semantics uptodate.Kevin D. Kissell1-8/+11
2009-03-23MIPS: Change {set,clear,change}_c0_<foo> to return old value.Ralf Baechle1-11/+11
2009-01-11MIPS: Override assembler target architecture for octeon.David Daney1-0/+2
2009-01-11MIPS: Add Cavium OCTEON specific register definitions to mipsregs.hDavid Daney1-0/+20
2008-10-27MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processorsShinya Kuribayashi1-0/+1
2008-10-11MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle1-0/+1526