summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2006-09-27[MIPS] setup.c: remove MAXMEM macroFranck Bui-Huu1-9/+3
It doesn't improve readability. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] setup.c: do not inline functionsFranck Bui-Huu1-2/+2
There's no point to inline any functions in setup.c. Let's GCC doing its job, it's good enough for that now. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] setup.c: remove useless includes.Franck Bui-Huu1-14/+0
Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] setup.c: move initrd code inside dedicated functionsFranck Bui-Huu1-58/+86
NUMA specific code could rely on them too. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] setup.c: cleanup bootmem_init()Franck Bui-Huu1-78/+57
This function although doing simple thing is hard to follow. It's mainly due to: - a lot of #ifdef - bad local names - redundant tests So this patch try to address these issues. It also do not use max_pfn global which is marked as an unused exported symbol. As a bonus side, it's now really easy to see what part of the code is for no-numa system. There's also no point to make this function inline. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] get_wchan(): remove uses of mfinfo[64]Franck Bui-Huu1-82/+50
This array was used to 'cache' some frame info about scheduler functions to speed up get_wchan(). This array was 1Ko size and was only used when CONFIG_KALLSYMS was set but declared for all configs. Rather than make the array statement conditional, this patches removes this array and its uses. Indeed the common case doesn't seem to use this array and get_wchan() is not a critical path anyways. It results in a smaller bss and a smaller/cleaner code: text data bss dec hex filename 2543808 254148 139296 2937252 2cd1a4 vmlinux-new-get-wchan 2544080 254148 143392 2941620 2ce2b4 vmlinux~old Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] get_frame_info(): null function size means size is unknownFranck Bui-Huu1-2/+10
This patch adds 2 sanity checks. The first one test that the start address of the function to analyze has been set by the caller. If not return an error since nothing usefull can be done without. The second one checks that the function's size has been set. A null size can happen if CONFIG_KALLSYMS is not set and it means that we don't know the size of the function to analyze. In this case, we make it equal to 128 instructions by default. Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] unwind_stack(): return ra if an exception occured at the first ↵Franck Bui-Huu1-2/+5
instruction Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Enable tmpfs for anything that possibly runs a full distribution.Ralf Baechle13-14/+14
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] s/__ASSEMBLER__/__ASSEMBLY__/ for clarity sake.Ralf Baechle4-6/+6
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Have headers_install install <asm/cachectl.h> and <asm/sysmips.h>.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] fstatat syscall namesRichard Sandiford1-3/+3
MIPS is the only port to call its fstatat()-related syscalls "__NR_fstatat". Now I can see why that might be seen as every other port being wrong, but I think for o32, it is at best confusing. __NR_fstat provides a plain (32-bit) stat while __NR_fstatat provides a 64-bit stat. Changing the name to __NR_fstatat64 would make things more explicit, match x86, and make the glibc port slightly easier. The current name is more appropriate for n32 and n64, but it would be appropriate for other 64-bit targets too, and those targets have chosen to call it __NR_newfstatat instead. Using the same name for MIPS would again be more consistent and make the glibc port slightly easier. I'm not wedded to this idea if the current names are preferred, but FWIW... Signed-off-by: Richard Sandiford <richard@codesourcery.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] The o32 fstatat syscall behaves differently on 32 and 64 bit kernelsRichard Sandiford1-1/+1
While working on a glibc patch to support the fstatat() functions[1], I noticed that the o32 implementation behaves differently on 32-bit and 64-bit kernels; the former provides a stat64 while the latter provides a plain (o32) stat. I think the former is what's intended, as there is no separate fstatat64. It's also what x86 does. I think this is just a case of a compat too far. [1] I've seen Khem's patch, but I don't think it's right. Signed-off-by: Richard Sandiford <richard@codesourcery.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Remove EV96100 as previously announced.Ralf Baechle68-2414/+3
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Replace BARRIER with more appropriate hazard barrier.Ralf Baechle1-13/+8
This is the unchanged part 2 of Chris' hazard cleanup. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Cleanup hazard handling.Ralf Baechle1-236/+126
Mostly based on patch by Chris Dearman and cleanups from Yoichi. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] IP27: Delete useless declaration of allocate_irqno().Ralf Baechle1-2/+0
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Fix USER_PTRS_PER_PGD for 64K page size.Peter Watkins1-1/+5
The code in pgtable-64.h assumes TASK_SIZE is always bigger than a first level PGDIR_SIZE. This is not the case for 64K pages, where task size is 40 bits (1TB) and a pgd entry can map 42 bits. This leads to USER_PTRS_PER_PGD being zero for 64K pages. Signed-off-by: Peter Watkins <treestem@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Add configuration variables for RM9xxx processorthomas@koeller.dyndns.org1-0/+16
This patch introduces a number of configuration variables. These allow to specify presence/absence of integrated peripherals found on the MIPS RM9xxx processor family, based on the particular processor model used. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Move excite_fpga.h to include/asm-mips/mach-excitethomas@koeller.dyndns.org1-0/+0
excite_fpga.h, like all platform headers, really belongs in the platform header directory. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Suppress compiler warningsthomas@koeller.dyndns.org1-8/+8
The excite platform exports hardware resources for device drivers to use. Any driver wanting to use these resources will look up them by their names. Since these resources are declared to have static linkage, but are not used in the source file defining them, the compiler used to emit an 'unused' warning, which this patch suppresses. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Reformat missformated SMTC bits.Ralf Baechle1-4/+4
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Qemu does not have D-cache aliasesAtsushi Nemoto1-1/+1
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Remove F_SETSIG and F_GETSIG in favor of the asm-generic definitions.Yoichi Yuasa1-2/+0
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Move definition of IRIX compat constant into IRIX compat code.Ralf Baechle2-2/+3
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Use common definitions from asm-generic/signal.hYoichi Yuasa1-8/+1
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] c-r4k: Convert init functions from inline to __init.Ralf Baechle1-10/+10
With more recent compilers inline doesn't necessarily means a function will always be inlined. So leave that decission to the compiler and make the function as __init. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] TLS: set_thread_area returns asmlinkage int not void.Ralf Baechle1-1/+3
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] TLS: Delete unused sys32_set_thread_areaRalf Baechle1-6/+0
There is no need for a compat version. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Make PROT_WRITE imply PROT_READ.Ralf Baechle1-1/+1
2006-09-27[MIPS] Atlas: update interrupt handlingMaciej W. Rozycki6-71/+189
The following change updates the Atlas interrupt handling to match that of Malta. Tested with a 5Kc and a 34Kf successfully. Signed-off-by: Maciej W. Rozycki <macro@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Atlas: Fix building the RTC driverMaciej W. Rozycki1-0/+2
Atlas maps its RTC chip in the host mmio space rather than using the "traditional" location in the PCI/ISA port space. A change that has happened to the generic RTC header requires to define ARCH_RTC_LOCATION now. Signed-off-by: Maciej W. Rozycki <macro@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Patch to arch/mips/mips-boards/generic/time.cKevin D. Kissell1-21/+36
In hooking up the perf counter overflow interrupt to the experimental deprecated-real-soon-now /proc/perf interface last night, I had to revisit arch/mips/mips-boards/generic/time.c, and discovered that when the 2.6.9-based SMTC prototype was merged with the more recent tree, it was missed that arch/mips/kernel/time.c had changed so that even in SMP kernels, timer_interrupt() calls local_timer_interrupt(), so there is no longer a need to invoke it directly from mips_timer_interrupt() in those cases where timer_interrupt() has been called. So I got rid of that, and added the invocation of perf_irq() if Cause.PCI is set, more-or-less following the same logic as in the non-SMTC case, with the modifications that (a) a runtime check for Release 2 isn't done, because it's redundant in SMTC), and (b) we check for a clock interrupt regardless of the value returned by the perf counter service - I don't understand why we'd want to control that with perf_irq(), but maybe one of you knows the story. I also got rid of the stupid warning about the unused variable when compiled for SMTC (another artifact of the merge). The result hasn't been beaten to death, but boots, seems stable, and supports extended precision event counting. Signed-off-by: Kevin D. Kissell <kevink@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Reduce race between cpu_wait() and need_resched() checkingAtsushi Nemoto1-17/+45
If a thread became runnable between need_resched() and the WAIT instruction, switching to the thread will delay until a next interrupt. Some CPUs can execute the WAIT instruction with interrupt disabled, so we can get rid of this race on them (at least UP case). Original Patch by Atsushi with fixing up for MIPS Technology's cores by Ralf based on feedback from the RTL designers. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Wire up set_robust_list(2) and get_robust_list(2)Atsushi Nemoto5-7/+21
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Fix errors detected by "make headers_check"Atsushi Nemoto4-2/+11
* export asm/sgidefs.h * include asm/isadep.h only if in kernel * do not export contents of asm/timex.h and asm/user.h Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Do not lose upper 32-bit on MIPS32 with 64-bit addresses in __pte().Ralf Baechle1-1/+3
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Replace generic__raw_read_trylock usageRalf Baechle1-1/+46
generic__raw_read_trylock() is a defect generic function actually doing a __raw_read_lock ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] SEAD defconfig build fixMaciej W. Rozycki1-0/+1
Signed-off-by: Maciej W. Rozycki <macro@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Fix for pci config_access on alchemy au1x000Alexander Bigga1-1/+1
I've encountered a serious problem with PCI config space access on Au1x000 platforms with recent 2.6.x-kernel. With 2.4.31 the same hardware works fine. So I was looking for the differences: Symptoms: - no PCI-device is seen on bootup though two or three cards are present - lspci output is empty - OR: lspci shows 20 times the same device (- OR: in some slot-configurations it worked anyhow) System(s): 1. platform with Au1500 and three PCI-devices (actually a mycable XXS1500 with backplane for three PCI-devices) 2. platform with Au1550 and two PCI-devices (custom board) Debugging: I digged down to the config_access() of the au1xxx-processors in arch/mips/pci/ops-au1000.c and switched on DEBUG. The code of config_access() seems to be almost the same as of the 2.4.x-kernel. But the "pci_cfg_vm->addr" returned by get_vm_area(0x2000, 0) once on booting is different. That's of course not forbidden. But the alignment seems to be wrong. In my case, I received: 2.4.31: pci_cfg_vm->addr = c0000000 2.6.18-rc5: pci_cfg_vm->addr = c0101000 To make it short: With 2.6.x it fails on the first config-access with: "PCI ERR detected: status 83a00356". Fixup: My fix is now, to use the VM_IOREMAP-flag in the get_vm_area call. This flag seems to be introduced in mm/vmalloc.c a long time ago (in 2.6.7-bk13, I found in gitweb). Now, the returned address is pci_cfg_vm->addr = c0104000 and everything works fine. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Make prepare_frametrace() not clobber v0Atsushi Nemoto1-3/+7
Since lmo commit 323a380bf9e1a1679a774a2b053e3c1f2aa3f179 ("Simplify dump_stack()") made prepare_frametrace() always inlined, using $2 (v0) in __asm__ is not safe anymore. We can use $1 (at) instead. Also we should use "dla" instead of "la" for 64-bit kernel. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache.Atsushi Nemoto2-27/+33
c-r4k.c and c-sb1.c use drop_mmu_context() to flush virtually tagged I-caches, but this does not work for flushing other task's icache. This is for example triggered by copy_to_user_page() called from ptrace(2). Use indexed flush for such cases. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] MT: Fix setting of XTC.Elizabeth Oldham1-0/+6
XTC can only be set if VPA is clear, which it may not be. There is also the possibility of a back to back c0 register access hazard to take care of. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] SMTC Build fix.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Fix 32-bit kernel by replacing 64-bit-only code.Ralf Baechle2-33/+3
dclz() expects its 64-bit argument being passed as a single register but on 32-bit kernels it'll actually be in a register pair. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] MT: When doing "select SMP" also select SMP's prerequesites or ...Ralf Baechle1-0/+2
... kconfig will do weird stuff. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] eXcite: Don't set SERIAL_RM9000.Ralf Baechle1-1/+0
The driver has not been merged yet so selecting it results in a warning message. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Retire flush_icache_page from mm use.Ralf Baechle7-19/+28
On the 34K the redundant cache operations were causing excessive stalls resulting in realtime code running on the second VPE missing its deadline. For all other platforms this patch is just a significant performance improvment as illustrated by below benchmark numbers. Processor, Processes - times in microseconds - smaller is better ------------------------------------------------------------------------------ Host OS Mhz null null open slct sig sig fork exec sh call I/O stat clos TCP inst hndl proc proc proc --------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- 25Kf 2.6.18-rc4 533 0.49 1.16 7.57 33.4 30.5 1.34 12.4 5497 17.K 54.K 25Kf 2.6.18-rc4-p 533 0.49 1.16 6.68 23.0 30.7 1.36 8.55 5030 16.K 48.K 4Kc 2.6.18-rc4 80 4.21 15.0 131. 289. 261. 16.5 258. 18.K 70.K 227K 4Kc 2.6.18-rc4-p 80 4.34 13.1 128. 285. 262. 18.2 258. 12.K 52.K 176K 34Kc 2.6.18-rc4 40 5.01 14.0 61.6 90.0 477. 17.9 94.7 29.K 108K 342K 34Kc 2.6.18-rc4-p 40 4.98 13.9 61.2 89.7 475. 17.6 93.7 8758 44.K 158K BCM1480 2.6.18-rc4 700 0.28 0.60 3.68 5.92 16.0 0.78 5.08 931. 3163 15.K BCM1480 2.6.18-rc4-p 700 0.28 0.61 3.65 5.85 16.0 0.79 5.20 395. 1464 8385 TX49-16K 2.6.18-rc3 197 0.73 2.41 19.0 37.8 82.9 2.94 17.5 4438 14.K 56.K TX49-16K 2.6.18-rc3-p 197 0.73 2.40 19.9 36.3 82.9 2.94 23.4 2577 9103 38.K TX49-32K 2.6.18-rc3 396 0.36 1.19 6.80 11.8 41.0 1.46 8.17 2738 8465 32.K TX49-32K 2.6.18-rc3-p 396 0.36 1.19 6.82 10.2 41.0 1.46 8.18 1330 4638 18.K Original patch by me with enhancements by Atsushi Nemoto. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
2006-09-27[MIPS] Avoid double signal restarting.Ralf Baechle3-1/+3
In entry.S resume_userspace ... jal do_notify_resume form a loop through which the kernel will iterate as long as work is pending. If we iterate through this loop more than once with no signal pending for at least one but the last iteration we will take do the syscall restarting multiple times resulting in a syscall return prior to the the syscall instruction in userspace. This may happen when debugging a multithreaded program. Debugging and original fix by Maciej; extended to other ABIs by me. Signed-off-by: Maciej W. Rozycki <macro@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] MT: Initialise all writable bits in Cause register to zero.Chris Dearman1-1/+1
Recent 34Ks come out of reset with WP enabled on VPE 1 so we take an immediate exception when starting the second VPE. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-31 12:28:33 +0000