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path: root/drivers/gpu/drm/exynos/exynos_drm_plane.c
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Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_drm_plane.c')
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_plane.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index 8371cbd7631..38610a5ab41 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -77,6 +77,7 @@ int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
{
struct exynos_plane *exynos_plane = to_exynos_plane(plane);
struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
+ struct exynos_drm_fb *exynos_fb = to_exynos_fb(fb);
unsigned int actual_w;
unsigned int actual_h;
int nr;
@@ -112,6 +113,28 @@ int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
crtc_y = 0;
}
+ /* Change overlay values to partial region. */
+ if (atomic_read(&exynos_fb->partial_mode)) {
+ struct exynos_drm_partial_pos *pos;
+
+ exynos_drm_crtc_adjust_partial_region(crtc,
+ &exynos_fb->part_pos);
+
+ pos = &exynos_fb->part_pos;
+ crtc_x = 0;
+ crtc_y = 0;
+ crtc_w = pos->w;
+ crtc_h = pos->h;
+ src_x = pos->x;
+ src_y = pos->y;
+ src_w = pos->w;
+ src_h = pos->h;
+ actual_w = pos->w;
+ actual_h = pos->h;
+
+ atomic_set(&exynos_fb->partial_mode, 0);
+ }
+
/* set drm framebuffer data. */
overlay->fb_x = src_x;
overlay->fb_y = src_y;