1524 files changed, 69766 insertions, 24792 deletions

diff --git a/arch/Kconfig b/arch/Kconfig
index a62965d057f..366ec06a518 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -271,6 +271,12 @@ config ARCH_WANT_OLD_COMPAT_IPC
 	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
 	bool
 
+config GENERIC_KERNEL_THREAD
+	bool
+
+config GENERIC_KERNEL_EXECVE
+	bool
+
 config HAVE_ARCH_SECCOMP_FILTER
 	bool
 	help
@@ -313,4 +319,26 @@ config HAVE_IRQ_TIME_ACCOUNTING
 	  Archs need to ensure they use a high enough resolution clock to
 	  support irq time accounting and then call enable_sched_clock_irqtime().
 
+config HAVE_ARCH_TRANSPARENT_HUGEPAGE
+	bool
+
+config HAVE_MOD_ARCH_SPECIFIC
+	bool
+	help
+	  The arch uses struct mod_arch_specific to store data.  Many arches
+	  just need a simple module loader without arch specific data - those
+	  should not enable this.
+
+config MODULES_USE_ELF_RELA
+	bool
+	help
+	  Modules only use ELF RELA relocations.  Modules with ELF REL
+	  relocations will give an error.
+
+config MODULES_USE_ELF_REL
+	bool
+	help
+	  Modules only use ELF REL relocations.  Modules with ELF RELA
+	  relocations will give an error.
+
 source "kernel/gcov/Kconfig"
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 9944dedee5b..5dd7f5db24d 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -20,6 +20,10 @@ config ALPHA
 	select GENERIC_CMOS_UPDATE
 	select GENERIC_STRNCPY_FROM_USER
 	select GENERIC_STRNLEN_USER
+	select GENERIC_KERNEL_THREAD
+	select GENERIC_KERNEL_EXECVE
+	select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_RELA
 	help
 	  The Alpha is a 64-bit general-purpose processor designed and
 	  marketed by the Digital Equipment Corporation of blessed memory,
diff --git a/arch/alpha/include/asm/Kbuild b/arch/alpha/include/asm/Kbuild
index e423defed91..64ffc9e9e54 100644
--- a/arch/alpha/include/asm/Kbuild
+++ b/arch/alpha/include/asm/Kbuild
@@ -1,5 +1,7 @@
 include include/asm-generic/Kbuild.asm
 
+generic-y += clkdev.h
+
 header-y += compiler.h
 header-y += console.h
 header-y += fpu.h
@@ -8,3 +10,4 @@ header-y += pal.h
 header-y += reg.h
 header-y += regdef.h
 header-y += sysinfo.h
+generic-y += exec.h
diff --git a/arch/alpha/include/asm/exec.h b/arch/alpha/include/asm/exec.h
deleted file mode 100644
index 4a5a41f3077..00000000000
--- a/arch/alpha/include/asm/exec.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ALPHA_EXEC_H
-#define __ALPHA_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* __ALPHA_EXEC_H */
diff --git a/arch/alpha/include/asm/module.h b/arch/alpha/include/asm/module.h
index 7b63743c534..9cd13b55155 100644
--- a/arch/alpha/include/asm/module.h
+++ b/arch/alpha/include/asm/module.h
@@ -1,19 +1,13 @@
 #ifndef _ALPHA_MODULE_H
 #define _ALPHA_MODULE_H
 
+#include <asm-generic/module.h>
+
 struct mod_arch_specific
 {
 	unsigned int gotsecindex;
 };
 
-#define Elf_Sym Elf64_Sym
-#define Elf_Shdr Elf64_Shdr
-#define Elf_Ehdr Elf64_Ehdr
-#define Elf_Phdr Elf64_Phdr
-#define Elf_Dyn Elf64_Dyn
-#define Elf_Rel Elf64_Rel
-#define Elf_Rela Elf64_Rela
-
 #define ARCH_SHF_SMALL SHF_ALPHA_GPREL
 
 #ifdef MODULE
diff --git a/arch/alpha/include/asm/processor.h b/arch/alpha/include/asm/processor.h
index e37b887b3d9..6cb7fe85c4b 100644
--- a/arch/alpha/include/asm/processor.h
+++ b/arch/alpha/include/asm/processor.h
@@ -49,9 +49,6 @@ extern void start_thread(struct pt_regs *, unsigned long, unsigned long);
 /* Free all resources held by a thread. */
 extern void release_thread(struct task_struct *);
 
-/* Create a kernel thread without removing it from tasklists.  */
-extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
-
 unsigned long get_wchan(struct task_struct *p);
 
 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
diff --git a/arch/alpha/include/asm/thread_info.h b/arch/alpha/include/asm/thread_info.h
index 28335bd40e4..4554ecbff7c 100644
--- a/arch/alpha/include/asm/thread_info.h
+++ b/arch/alpha/include/asm/thread_info.h
@@ -84,7 +84,6 @@ register struct thread_info *__current_thread_info __asm__("$8");
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
 #define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
 
 /* Work to do on interrupt/exception return.  */
@@ -117,5 +116,7 @@ register struct thread_info *__current_thread_info __asm__("$8");
 		 (int __user *)(value));				\
 	})
 
+#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
+
 #endif /* __KERNEL__ */
 #endif /* _ALPHA_THREAD_INFO_H */
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h
index a31a78eac9b..7826e227e4d 100644
--- a/arch/alpha/include/asm/unistd.h
+++ b/arch/alpha/include/asm/unistd.h
@@ -481,6 +481,7 @@
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_SYS_EXECVE
 
 /* "Conditional" syscalls.  What we want is
 
diff --git a/arch/alpha/kernel/alpha_ksyms.c b/arch/alpha/kernel/alpha_ksyms.c
index 15fa821d09c..89566b346c0 100644
--- a/arch/alpha/kernel/alpha_ksyms.c
+++ b/arch/alpha/kernel/alpha_ksyms.c
@@ -50,9 +50,6 @@ EXPORT_SYMBOL(alpha_read_fp_reg_s);
 EXPORT_SYMBOL(alpha_write_fp_reg);
 EXPORT_SYMBOL(alpha_write_fp_reg_s);
 
-/* entry.S */
-EXPORT_SYMBOL(kernel_thread);
-
 /* Networking helper routines. */
 EXPORT_SYMBOL(csum_tcpudp_magic);
 EXPORT_SYMBOL(ip_compute_csum);
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index ec0da0567ab..a7607832dd4 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -311,7 +311,7 @@ entSys:
 
 	.align	4
 ret_from_sys_call:
-	cmovne	$26, 0, $19		/* $19 = 0 => non-restartable */
+	cmovne	$26, 0, $18		/* $18 = 0 => non-restartable */
 	ldq	$0, SP_OFF($sp)
 	and	$0, 8, $0
 	beq	$0, ret_to_kernel
@@ -320,8 +320,8 @@ ret_to_user:
 		sampling and the rti.  */
 	lda	$16, 7
 	call_pal PAL_swpipl
-	ldl	$5, TI_FLAGS($8)
-	and	$5, _TIF_WORK_MASK, $2
+	ldl	$17, TI_FLAGS($8)
+	and	$17, _TIF_WORK_MASK, $2
 	bne	$2, work_pending
 restore_all:
 	RESTORE_ALL
@@ -341,10 +341,10 @@ $syscall_error:
 	 * frame to indicate that a negative return value wasn't an
 	 * error number..
 	 */
-	ldq	$19, 0($sp)	/* old syscall nr (zero if success) */
-	beq	$19, $ret_success
+	ldq	$18, 0($sp)	/* old syscall nr (zero if success) */
+	beq	$18, $ret_success
 
-	ldq	$20, 72($sp)	/* .. and this a3 */
+	ldq	$19, 72($sp)	/* .. and this a3 */
 	subq	$31, $0, $0	/* with error in v0 */
 	addq	$31, 1, $1	/* set a3 for errno return */
 	stq	$0, 0($sp)
@@ -362,51 +362,35 @@ $ret_success:
  * Do all cleanup when returning from all interrupts and system calls.
  *
  * Arguments:
- *       $5: TI_FLAGS.
  *       $8: current.
- *      $19: The old syscall number, or zero if this is not a return
+ *      $17: TI_FLAGS.
+ *      $18: The old syscall number, or zero if this is not a return
  *           from a syscall that errored and is possibly restartable.
- *      $20: The old a3 value
+ *      $19: The old a3 value
  */
 
 	.align	4
 	.ent	work_pending
 work_pending:
-	and	$5, _TIF_NEED_RESCHED, $2
-	beq	$2, $work_notifysig
+	and	$17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING, $2
+	bne	$2, $work_notifysig
 
 $work_resched:
-	subq	$sp, 16, $sp
-	stq	$19, 0($sp)              /* save syscall nr */
-	stq	$20, 8($sp)              /* and error indication (a3) */
+	/*
+	 * We can get here only if we returned from syscall without SIGPENDING
+	 * or got through work_notifysig already.  Either case means no syscall
+	 * restarts for us, so let $18 and $19 burn.
+	 */
 	jsr	$26, schedule
-	ldq	$19, 0($sp)
-	ldq	$20, 8($sp)
-	addq	$sp, 16, $sp
-	/* Make sure need_resched and sigpending don't change between
-		sampling and the rti.  */
-	lda	$16, 7
-	call_pal PAL_swpipl
-	ldl	$5, TI_FLAGS($8)
-	and	$5, _TIF_WORK_MASK, $2
-	beq	$2, restore_all
-	and	$5, _TIF_NEED_RESCHED, $2
-	bne	$2, $work_resched
+	mov	0, $18
+	br	ret_to_user
 
 $work_notifysig:
 	mov	$sp, $16
 	bsr	$1, do_switch_stack
-	mov	$sp, $17
-	mov	$5, $18
-	mov	$19, $9		/* save old syscall number */
-	mov	$20, $10	/* save old a3 */
-	and	$5, _TIF_SIGPENDING, $2
-	cmovne	$2, 0, $9	/* we don't want double syscall restarts */
-	jsr	$26, do_notify_resume
-	mov	$9, $19
-	mov	$10, $20
+	jsr	$26, do_work_pending
 	bsr	$1, undo_switch_stack
-	br	ret_to_user
+	br	restore_all
 .end work_pending
 
 /*
@@ -418,11 +402,10 @@ $work_notifysig:
 strace:
 	/* set up signal stack, call syscall_trace */
 	bsr	$1, do_switch_stack
-	jsr	$26, syscall_trace
+	jsr	$26, syscall_trace_enter /* returns the syscall number */
 	bsr	$1, undo_switch_stack
 
-	/* get the system call number and the arguments back.. */
-	ldq	$0, 0($sp)
+	/* get the arguments back.. */
 	ldq	$16, SP_OFF+24($sp)
 	ldq	$17, SP_OFF+32($sp)
 	ldq	$18, SP_OFF+40($sp)
@@ -449,15 +432,15 @@ $strace_success:
 	stq	$0, 0($sp)		/* save return value */
 
 	bsr	$1, do_switch_stack
-	jsr	$26, syscall_trace
+	jsr	$26, syscall_trace_leave
 	bsr	$1, undo_switch_stack
 	br	$31, ret_from_sys_call
 
 	.align	3
 $strace_error:
-	ldq	$19, 0($sp)	/* old syscall nr (zero if success) */
-	beq	$19, $strace_success
-	ldq	$20, 72($sp)	/* .. and this a3 */
+	ldq	$18, 0($sp)	/* old syscall nr (zero if success) */
+	beq	$18, $strace_success
+	ldq	$19, 72($sp)	/* .. and this a3 */
 
 	subq	$31, $0, $0	/* with error in v0 */
 	addq	$31, 1, $1	/* set a3 for errno return */
@@ -465,11 +448,11 @@ $strace_error:
 	stq	$1, 72($sp)	/* a3 for return */
 
 	bsr	$1, do_switch_stack
-	mov	$19, $9		/* save old syscall number */
-	mov	$20, $10	/* save old a3 */
-	jsr	$26, syscall_trace
-	mov	$9, $19
-	mov	$10, $20
+	mov	$18, $9		/* save old syscall number */
+	mov	$19, $10	/* save old a3 */
+	jsr	$26, syscall_trace_leave
+	mov	$9, $18
+	mov	$10, $19
 	bsr	$1, undo_switch_stack
 
 	mov	$31, $26	/* tell "ret_from_sys_call" we can restart */
@@ -609,59 +592,20 @@ ret_from_fork:
 .end ret_from_fork
 
 /*
- * kernel_thread(fn, arg, clone_flags)
+ * ... and new kernel threads - here
  */
 	.align 4
-	.globl	kernel_thread
-	.ent	kernel_thread
-kernel_thread:
-	/* We can be called from a module.  */
-	ldgp	$gp, 0($27)
-	.prologue 1
-	subq	$sp, SP_OFF+6*8, $sp
-	br	$1, 2f		/* load start address */
-
-	/* We've now "returned" from a fake system call.  */
-	unop
-	blt	$0, 1f		/* error?  */
-	ldi	$1, 0x3fff
-	beq	$20, 1f		/* parent or child?  */
-
-	bic	$sp, $1, $8	/* in child.  */
-	jsr	$26, ($27)
-	ldgp	$gp, 0($26)
-	mov	$0, $16
-	mov	$31, $26
-	jmp	$31, sys_exit
-
-1:	ret			/* in parent.  */
-
-	.align 4
-2:	/* Fake a system call stack frame, as we can't do system calls
-	   from kernel space.  Note that we store FN and ARG as they
-	   need to be set up in the child for the call.  Also store $8
-	   and $26 for use in the parent.  */
-	stq	$31, SP_OFF($sp)	/* ps */
-	stq	$1, SP_OFF+8($sp)	/* pc */
-	stq	$gp, SP_OFF+16($sp)	/* gp */
-	stq	$16, 136($sp)		/* $27; FN for child */
-	stq	$17, SP_OFF+24($sp)	/* $16; ARG for child */
-	stq	$8, 64($sp)		/* $8 */
-	stq	$26, 128($sp)		/* $26 */
-	/* Avoid the HAE being gratuitously wrong, to avoid restoring it.  */
-	ldq	$2, alpha_mv+HAE_CACHE
-	stq	$2, 152($sp)		/* HAE */
-
-	/* Shuffle FLAGS to the front; add CLONE_VM.  */
-	ldi	$1, CLONE_VM|CLONE_UNTRACED
-	or	$18, $1, $16
-	bsr	$26, sys_clone
-
-	/* We don't actually care for a3 success widgetry in the kernel.
-	   Not for positive errno values.  */
-	stq	$0, 0($sp)		/* $0 */
-	br	ret_to_kernel
-.end kernel_thread
+	.globl	ret_from_kernel_thread
+	.ent	ret_from_kernel_thread
+ret_from_kernel_thread:
+	mov	$17, $16
+	jsr	$26, schedule_tail
+	mov	$9, $27
+	mov	$10, $16
+	jsr	$26, ($9)
+	mov	$31, $19		/* to disable syscall restarts */
+	br	$31, ret_to_user
+.end ret_from_kernel_thread
 
 
 /*
@@ -722,7 +666,7 @@ sys_sigreturn:
 	lda	$sp, -SWITCH_STACK_SIZE($sp)
 	jsr	$26, do_sigreturn
 	bne	$9, 1f
-	jsr	$26, syscall_trace
+	jsr	$26, syscall_trace_leave
 1:	br	$1, undo_switch_stack
 	br	ret_from_sys_call
 .end sys_sigreturn
@@ -739,21 +683,12 @@ sys_rt_sigreturn:
 	lda	$sp, -SWITCH_STACK_SIZE($sp)
 	jsr	$26, do_rt_sigreturn
 	bne	$9, 1f
-	jsr	$26, syscall_trace
+	jsr	$26, syscall_trace_leave
 1:	br	$1, undo_switch_stack
 	br	ret_from_sys_call
 .end sys_rt_sigreturn
 
 	.align	4
-	.globl	sys_execve
-	.ent	sys_execve
-sys_execve:
-	.prologue 0
-	mov	$sp, $19
-	jmp	$31, do_sys_execve
-.end sys_execve
-
-	.align	4
 	.globl	alpha_ni_syscall
 	.ent	alpha_ni_syscall
 alpha_ni_syscall:
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 63e77e3944c..9eb090582cf 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -449,7 +449,7 @@ osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags)
 {
 	int retval;
 	struct cdfs_args tmp;
-	char *devname;
+	struct filename *devname;
 
 	retval = -EFAULT;
 	if (copy_from_user(&tmp, args, sizeof(tmp)))
@@ -458,7 +458,7 @@ osf_ufs_mount(char *dirname, struct ufs_args __user *args, int flags)
 	retval = PTR_ERR(devname);
 	if (IS_ERR(devname))
 		goto out;
-	retval = do_mount(devname, dirname, "ext2", flags, NULL);
+	retval = do_mount(devname->name, dirname, "ext2", flags, NULL);
 	putname(devname);
  out:
 	return retval;
@@ -469,7 +469,7 @@ osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags)
 {
 	int retval;
 	struct cdfs_args tmp;
-	char *devname;
+	struct filename *devname;
 
 	retval = -EFAULT;
 	if (copy_from_user(&tmp, args, sizeof(tmp)))
@@ -478,7 +478,7 @@ osf_cdfs_mount(char *dirname, struct cdfs_args __user *args, int flags)
 	retval = PTR_ERR(devname);
 	if (IS_ERR(devname))
 		goto out;
-	retval = do_mount(devname, dirname, "iso9660", flags, NULL);
+	retval = do_mount(devname->name, dirname, "iso9660", flags, NULL);
 	putname(devname);
  out:
 	return retval;
@@ -499,7 +499,7 @@ SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, const char __user *, path,
 		int, flag, void __user *, data)
 {
 	int retval;
-	char *name;
+	struct filename *name;
 
 	name = getname(path);
 	retval = PTR_ERR(name);
@@ -507,13 +507,13 @@ SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, const char __user *, path,
 		goto out;
 	switch (typenr) {
 	case 1:
-		retval = osf_ufs_mount(name, data, flag);
+		retval = osf_ufs_mount(name->name, data, flag);
 		break;
 	case 6:
-		retval = osf_cdfs_mount(name, data, flag);
+		retval = osf_cdfs_mount(name->name, data, flag);
 		break;
 	case 9:
-		retval = osf_procfs_mount(name, data, flag);
+		retval = osf_procfs_mount(name->name, data, flag);
 		break;
 	default:
 		retval = -EINVAL;
diff --git a/arch/alpha/kernel/pci-sysfs.c b/arch/alpha/kernel/pci-sysfs.c
index 53649c7d006..b51f7b4818c 100644
--- a/arch/alpha/kernel/pci-sysfs.c
+++ b/arch/alpha/kernel/pci-sysfs.c
@@ -26,7 +26,7 @@ static int hose_mmap_page_range(struct pci_controller *hose,
 		base = sparse ? hose->sparse_io_base : hose->dense_io_base;
 
 	vma->vm_pgoff += base >> PAGE_SHIFT;
-	vma->vm_flags |= (VM_IO | VM_RESERVED);
+	vma->vm_flags |= VM_IO | VM_DONTEXPAND | VM_DONTDUMP;
 
 	return io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
 				  vma->vm_end - vma->vm_start,
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 83638aa096d..4054e0ffe2b 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -263,33 +263,35 @@ alpha_vfork(struct pt_regs *regs)
 
 /*
  * Copy an alpha thread..
- *
- * Note the "stack_offset" stuff: when returning to kernel mode, we need
- * to have some extra stack-space for the kernel stack that still exists
- * after the "ret_from_fork".  When returning to user mode, we only want
- * the space needed by the syscall stack frame (ie "struct pt_regs").
- * Use the passed "regs" pointer to determine how much space we need
- * for a kernel fork().
  */
 
 int
 copy_thread(unsigned long clone_flags, unsigned long usp,
-	    unsigned long unused,
+	    unsigned long arg,
 	    struct task_struct * p, struct pt_regs * regs)
 {
 	extern void ret_from_fork(void);
+	extern void ret_from_kernel_thread(void);
 
 	struct thread_info *childti = task_thread_info(p);
-	struct pt_regs * childregs;
-	struct switch_stack * childstack, *stack;
-	unsigned long stack_offset, settls;
-
-	stack_offset = PAGE_SIZE - sizeof(struct pt_regs);
-	if (!(regs->ps & 8))
-		stack_offset = (PAGE_SIZE-1) & (unsigned long) regs;
-	childregs = (struct pt_regs *)
-	  (stack_offset + PAGE_SIZE + task_stack_page(p));
-		
+	struct pt_regs *childregs = task_pt_regs(p);
+	struct switch_stack *childstack, *stack;
+	unsigned long settls;
+
+	childstack = ((struct switch_stack *) childregs) - 1;
+	if (unlikely(!regs)) {
+		/* kernel thread */
+		memset(childstack, 0,
+			sizeof(struct switch_stack) + sizeof(struct pt_regs));
+		childstack->r26 = (unsigned long) ret_from_kernel_thread;
+		childstack->r9 = usp;	/* function */
+		childstack->r10 = arg;
+		childregs->hae = alpha_mv.hae_cache,
+		childti->pcb.usp = 0;
+		childti->pcb.ksp = (unsigned long) childstack;
+		childti->pcb.flags = 1;	/* set FEN, clear everything else */
+		return 0;
+	}
 	*childregs = *regs;
 	settls = regs->r20;
 	childregs->r0 = 0;
@@ -297,7 +299,6 @@ copy_thread(unsigned long clone_flags, unsigned long usp,
 	childregs->r20 = 1;	/* OSF/1 has some strange fork() semantics.  */
 	regs->r20 = 0;
 	stack = ((struct switch_stack *) regs) - 1;
-	childstack = ((struct switch_stack *) childregs) - 1;
 	*childstack = *stack;
 	childstack->r26 = (unsigned long) ret_from_fork;
 	childti->pcb.usp = usp;
@@ -386,27 +387,6 @@ dump_elf_task_fp(elf_fpreg_t *dest, struct task_struct *task)
 EXPORT_SYMBOL(dump_elf_task_fp);
 
 /*
- * sys_execve() executes a new program.
- */
-asmlinkage int
-do_sys_execve(const char __user *ufilename,
-	      const char __user *const __user *argv,
-	      const char __user *const __user *envp, struct pt_regs *regs)
-{
-	int error;
-	char *filename;
-
-	filename = getname(ufilename);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		goto out;
-	error = do_execve(filename, argv, envp, regs);
-	putname(filename);
-out:
-	return error;
-}
-
-/*
  * Return saved PC of a blocked thread.  This assumes the frame
  * pointer is the 6th saved long on the kernel stack and that the
  * saved return address is the first long in the frame.  This all
@@ -459,22 +439,3 @@ get_wchan(struct task_struct *p)
 	}
 	return pc;
 }
-
-int kernel_execve(const char *path, const char *const argv[], const char *const envp[])
-{
-	/* Avoid the HAE being gratuitously wrong, which would cause us
-	   to do the whole turn off interrupts thing and restore it.  */
-	struct pt_regs regs = {.hae = alpha_mv.hae_cache};
-	int err = do_execve(path, argv, envp, &regs);
-	if (!err) {
-		struct pt_regs *p = current_pt_regs();
-		/* copy regs to normal position and off to userland we go... */
-		*p = regs;
-		__asm__ __volatile__ (
-			"mov	%0, $sp;"
-			"br	$31, ret_from_sys_call"
-			: : "r"(p));
-	}
-	return err;
-}
-EXPORT_SYMBOL(kernel_execve);
diff --git a/arch/alpha/kernel/ptrace.c b/arch/alpha/kernel/ptrace.c
index 54616f496ae..2a4a80ff4a2 100644
--- a/arch/alpha/kernel/ptrace.c
+++ b/arch/alpha/kernel/ptrace.c
@@ -13,6 +13,7 @@
 #include <linux/user.h>
 #include <linux/security.h>
 #include <linux/signal.h>
+#include <linux/tracehook.h>
 
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
@@ -312,25 +313,18 @@ long arch_ptrace(struct task_struct *child, long request,
 	return ret;
 }
 
+asmlinkage unsigned long syscall_trace_enter(void)
+{
+	unsigned long ret = 0;
+	if (test_thread_flag(TIF_SYSCALL_TRACE) &&
+	    tracehook_report_syscall_entry(current_pt_regs()))
+		ret = -1UL;
+	return ret ?: current_pt_regs()->r0;
+}
+
 asmlinkage void
-syscall_trace(void)
+syscall_trace_leave(void)
 {
-	if (!test_thread_flag(TIF_SYSCALL_TRACE))
-		return;
-	if (!(current->ptrace & PT_PTRACED))
-		return;
-	/* The 0x80 provides a way for the tracing parent to distinguish
-	   between a syscall stop and SIGTRAP delivery */
-	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
-				 ? 0x80 : 0));
-
-	/*
-	 * This isn't the same as continuing with a signal, but it will do
-	 * for normal use.  strace only continues with a signal if the
-	 * stopping signal is not SIGTRAP.  -brl
-	 */
-	if (current->exit_code) {
-		send_sig(current->exit_code, current, 1);
-		current->exit_code = 0;
-	}
+	if (test_thread_flag(TIF_SYSCALL_TRACE))
+		tracehook_report_syscall_exit(current_pt_regs(), 0);
 }
diff --git a/arch/alpha/kernel/signal.c b/arch/alpha/kernel/signal.c
index a8c97d42ec8..32575f85507 100644
--- a/arch/alpha/kernel/signal.c
+++ b/arch/alpha/kernel/signal.c
@@ -298,8 +298,9 @@ get_sigframe(struct k_sigaction *ka, unsigned long sp, size_t frame_size)
 
 static long
 setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, 
-		 struct switch_stack *sw, unsigned long mask, unsigned long sp)
+		 unsigned long mask, unsigned long sp)
 {
+	struct switch_stack *sw = (struct switch_stack *)regs - 1;
 	long i, err = 0;
 
 	err |= __put_user(on_sig_stack((unsigned long)sc), &sc->sc_onstack);
@@ -354,7 +355,7 @@ setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
 
 static int
 setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
-	    struct pt_regs *regs, struct switch_stack * sw)
+	    struct pt_regs *regs)
 {
 	unsigned long oldsp, r26, err = 0;
 	struct sigframe __user *frame;
@@ -364,7 +365,7 @@ setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
 	if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
 		return -EFAULT;
 
-	err |= setup_sigcontext(&frame->sc, regs, sw, set->sig[0], oldsp);
+	err |= setup_sigcontext(&frame->sc, regs, set->sig[0], oldsp);
 	if (err)
 		return -EFAULT;
 
@@ -401,7 +402,7 @@ setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
 
 static int
 setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
-	       sigset_t *set, struct pt_regs *regs, struct switch_stack * sw)
+	       sigset_t *set, struct pt_regs *regs)
 {
 	unsigned long oldsp, r26, err = 0;
 	struct rt_sigframe __user *frame;
@@ -420,7 +421,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 	err |= __put_user(current->sas_ss_sp, &frame->uc.uc_stack.ss_sp);
 	err |= __put_user(sas_ss_flags(oldsp), &frame->uc.uc_stack.ss_flags);
 	err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
-	err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, sw,
+	err |= setup_sigcontext(&frame->uc.uc_mcontext, regs, 
 				set->sig[0], oldsp);
 	err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
 	if (err)
@@ -464,15 +465,15 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
  */
 static inline void
 handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info,
-	      struct pt_regs * regs, struct switch_stack *sw)
+	      struct pt_regs * regs)
 {
 	sigset_t *oldset = sigmask_to_save();
 	int ret;
 
 	if (ka->sa.sa_flags & SA_SIGINFO)
-		ret = setup_rt_frame(sig, ka, info, oldset, regs, sw);
+		ret = setup_rt_frame(sig, ka, info, oldset, regs);
 	else
-		ret = setup_frame(sig, ka, oldset, regs, sw);
+		ret = setup_frame(sig, ka, oldset, regs);
 
 	if (ret) {
 		force_sigsegv(sig, current);
@@ -519,8 +520,7 @@ syscall_restart(unsigned long r0, unsigned long r19,
  * all (if we get here from anything but a syscall return, it will be 0)
  */
 static void
-do_signal(struct pt_regs * regs, struct switch_stack * sw,
-	  unsigned long r0, unsigned long r19)
+do_signal(struct pt_regs *regs, unsigned long r0, unsigned long r19)
 {
 	siginfo_t info;
 	int signr;
@@ -537,7 +537,7 @@ do_signal(struct pt_regs * regs, struct switch_stack * sw,
 		/* Whee!  Actually deliver the signal.  */
 		if (r0)
 			syscall_restart(r0, r19, regs, &ka);
-		handle_signal(signr, &ka, &info, regs, sw);
+		handle_signal(signr, &ka, &info, regs);
 		if (single_stepping) 
 			ptrace_set_bpt(current); /* re-set bpt */
 		return;
@@ -568,15 +568,23 @@ do_signal(struct pt_regs * regs, struct switch_stack * sw,
 }
 
 void
-do_notify_resume(struct pt_regs *regs, struct switch_stack *sw,
-		 unsigned long thread_info_flags,
+do_work_pending(struct pt_regs *regs, unsigned long thread_flags,
 		 unsigned long r0, unsigned long r19)
 {
-	if (thread_info_flags & _TIF_SIGPENDING)
-		do_signal(regs, sw, r0, r19);
-
-	if (thread_info_flags & _TIF_NOTIFY_RESUME) {
-		clear_thread_flag(TIF_NOTIFY_RESUME);
-		tracehook_notify_resume(regs);
-	}
+	do {
+		if (thread_flags & _TIF_NEED_RESCHED) {
+			schedule();
+		} else {
+			local_irq_enable();
+			if (thread_flags & _TIF_SIGPENDING) {
+				do_signal(regs, r0, r19);
+				r0 = 0;
+			} else {
+				clear_thread_flag(TIF_NOTIFY_RESUME);
+				tracehook_notify_resume(regs);
+			}
+		}
+		local_irq_disable();
+		thread_flags = current_thread_info()->flags;
+	} while (thread_flags & _TIF_WORK_MASK);
 }
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e1d6ab2b3c9..ade7e924bef 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1,55 +1,60 @@
 config ARM
 	bool
 	default y
+	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
+	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
 	select ARCH_HAVE_CUSTOM_GPIO_H
-	select HAVE_AOUT
-	select HAVE_DMA_API_DEBUG
-	select HAVE_IDE if PCI || ISA || PCMCIA
-	select HAVE_DMA_ATTRS
-	select HAVE_DMA_CONTIGUOUS if MMU
-	select HAVE_MEMBLOCK
-	select RTC_LIB
-	select SYS_SUPPORTS_APM_EMULATION
+	select ARCH_WANT_IPC_PARSE_VERSION
+	select CPU_PM if (SUSPEND || CPU_IDLE)
+	select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN
 	select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
-	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
-	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
+	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
+	select GENERIC_IRQ_PROBE
+	select GENERIC_IRQ_SHOW
+	select GENERIC_KERNEL_THREAD
+	select GENERIC_KERNEL_EXECVE
+	select GENERIC_PCI_IOMAP
+	select GENERIC_SMP_IDLE_THREAD
+	select GENERIC_STRNCPY_FROM_USER
+	select GENERIC_STRNLEN_USER
+	select HARDIRQS_SW_RESEND
+	select HAVE_AOUT
 	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
 	select HAVE_ARCH_KGDB
 	select HAVE_ARCH_TRACEHOOK
-	select HAVE_SYSCALL_TRACEPOINTS
-	select HAVE_KPROBES if !XIP_KERNEL
-	select HAVE_KRETPROBES if (HAVE_KPROBES)
-	select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
-	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
+	select HAVE_BPF_JIT
+	select HAVE_C_RECORDMCOUNT
+	select HAVE_DEBUG_KMEMLEAK
+	select HAVE_DMA_API_DEBUG
+	select HAVE_DMA_ATTRS
+	select HAVE_DMA_CONTIGUOUS if MMU
 	select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
+	select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
 	select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
-	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
+	select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
 	select HAVE_GENERIC_DMA_COHERENT
+	select HAVE_GENERIC_HARDIRQS
+	select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
+	select HAVE_IDE if PCI || ISA || PCMCIA
+	select HAVE_IRQ_WORK
 	select HAVE_KERNEL_GZIP
-	select HAVE_KERNEL_LZO
 	select HAVE_KERNEL_LZMA
+	select HAVE_KERNEL_LZO
 	select HAVE_KERNEL_XZ
-	select HAVE_IRQ_WORK
+	select HAVE_KPROBES if !XIP_KERNEL
+	select HAVE_KRETPROBES if (HAVE_KPROBES)
+	select HAVE_MEMBLOCK
+	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
 	select HAVE_PERF_EVENTS
-	select PERF_USE_VMALLOC
 	select HAVE_REGS_AND_STACK_ACCESS_API
-	select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
-	select HAVE_C_RECORDMCOUNT
-	select HAVE_GENERIC_HARDIRQS
-	select HARDIRQS_SW_RESEND
-	select GENERIC_IRQ_PROBE
-	select GENERIC_IRQ_SHOW
-	select ARCH_WANT_IPC_PARSE_VERSION
-	select HARDIRQS_SW_RESEND
-	select CPU_PM if (SUSPEND || CPU_IDLE)
-	select GENERIC_PCI_IOMAP
-	select HAVE_BPF_JIT
-	select GENERIC_SMP_IDLE_THREAD
+	select HAVE_SYSCALL_TRACEPOINTS
+	select HAVE_UID16
 	select KTIME_SCALAR
-	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
-	select GENERIC_STRNCPY_FROM_USER
-	select GENERIC_STRNLEN_USER
-	select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN
+	select PERF_USE_VMALLOC
+	select RTC_LIB
+	select SYS_SUPPORTS_APM_EMULATION
+	select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND
+	select MODULES_USE_ELF_REL
 	help
 	  The ARM series is a line of low-power-consumption RISC chip designs
 	  licensed by ARM Ltd and targeted at embedded applications and
@@ -65,9 +70,9 @@ config NEED_SG_DMA_LENGTH
 	bool
 
 config ARM_DMA_USE_IOMMU
-	select NEED_SG_DMA_LENGTH
-	select ARM_HAS_SG_CHAIN
 	bool
+	select ARM_HAS_SG_CHAIN
+	select NEED_SG_DMA_LENGTH
 
 config HAVE_PWM
 	bool
@@ -259,69 +264,69 @@ choice
 
 config ARCH_MULTIPLATFORM
 	bool "Allow multiple platforms to be selected"
+	depends on MMU
 	select ARM_PATCH_PHYS_VIRT
 	select AUTO_ZRELADDR
 	select COMMON_CLK
 	select MULTI_IRQ_HANDLER
 	select SPARSE_IRQ
 	select USE_OF
-	depends on MMU
 
 config ARCH_INTEGRATOR
 	bool "ARM Ltd. Integrator family"
-	select ARM_AMBA
 	select ARCH_HAS_CPUFREQ
+	select ARM_AMBA
 	select COMMON_CLK
 	select COMMON_CLK_VERSATILE
+	select GENERIC_CLOCKEVENTS
 	select HAVE_TCM
 	select ICST
-	select GENERIC_CLOCKEVENTS
+	select MULTI_IRQ_HANDLER
+	select NEED_MACH_MEMORY_H
 	select PLAT_VERSATILE
 	select PLAT_VERSATILE_FPGA_IRQ
-	select NEED_MACH_MEMORY_H
 	select SPARSE_IRQ
-	select MULTI_IRQ_HANDLER
 	help
 	  Support for ARM's Integrator platform.
 
 config ARCH_REALVIEW
 	bool "ARM Ltd. RealView family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select ARM_AMBA
+	select ARM_TIMER_SP804
 	select COMMON_CLK
 	select COMMON_CLK_VERSATILE
-	select ICST
 	select GENERIC_CLOCKEVENTS
-	select ARCH_WANT_OPTIONAL_GPIOLIB
-	select PLAT_VERSATILE
-	select PLAT_VERSATILE_CLCD
-	select ARM_TIMER_SP804
 	select GPIO_PL061 if GPIOLIB
+	select ICST
 	select NEED_MACH_MEMORY_H
+	select PLAT_VERSATILE
+	select PLAT_VERSATILE_CLCD
 	help
 	  This enables support for ARM Ltd RealView boards.
 
 config ARCH_VERSATILE
 	bool "ARM Ltd. Versatile family"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select ARM_AMBA
+	select ARM_TIMER_SP804
 	select ARM_VIC
 	select CLKDEV_LOOKUP
+	select GENERIC_CLOCKEVENTS
 	select HAVE_MACH_CLKDEV
 	select ICST
-	select GENERIC_CLOCKEVENTS
-	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select PLAT_VERSATILE
-	select PLAT_VERSATILE_CLOCK
 	select PLAT_VERSATILE_CLCD
+	select PLAT_VERSATILE_CLOCK
 	select PLAT_VERSATILE_FPGA_IRQ
-	select ARM_TIMER_SP804
 	help
 	  This enables support for ARM Ltd Versatile board.
 
 config ARCH_AT91
 	bool "Atmel AT91"
 	select ARCH_REQUIRE_GPIOLIB
-	select HAVE_CLK
 	select CLKDEV_LOOKUP
+	select HAVE_CLK
 	select IRQ_DOMAIN
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_IO_H if PCCARD
@@ -346,43 +351,43 @@ config ARCH_BCM2835
 	  This enables support for the Broadcom BCM2835 SoC. This SoC is
 	  use in the Raspberry Pi, and Roku 2 devices.
 
-config ARCH_CLPS711X
-	bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
-	select CPU_ARM720T
-	select ARCH_USES_GETTIMEOFFSET
-	select COMMON_CLK
-	select CLKDEV_LOOKUP
-	select NEED_MACH_MEMORY_H
-	help
-	  Support for Cirrus Logic 711x/721x/731x based boards.
-
 config ARCH_CNS3XXX
 	bool "Cavium Networks CNS3XXX family"
+	select ARM_GIC
 	select CPU_V6K
 	select GENERIC_CLOCKEVENTS
-	select ARM_GIC
 	select MIGHT_HAVE_CACHE_L2X0
 	select MIGHT_HAVE_PCI
 	select PCI_DOMAINS if PCI
 	help
 	  Support for Cavium Networks CNS3XXX platform.
 
+config ARCH_CLPS711X
+	bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
+	select ARCH_USES_GETTIMEOFFSET
+	select CLKDEV_LOOKUP
+	select COMMON_CLK
+	select CPU_ARM720T
+	select NEED_MACH_MEMORY_H
+	help
+	  Support for Cirrus Logic 711x/721x/731x based boards.
+
 config ARCH_GEMINI
 	bool "Cortina Systems Gemini"
-	select CPU_FA526
 	select ARCH_REQUIRE_GPIOLIB
 	select ARCH_USES_GETTIMEOFFSET
+	select CPU_FA526
 	help
 	  Support for the Cortina Systems Gemini family SoCs
 
 config ARCH_SIRF
 	bool "CSR SiRF"
-	select NO_IOPORT
 	select ARCH_REQUIRE_GPIOLIB
-	select GENERIC_CLOCKEVENTS
 	select COMMON_CLK
+	select GENERIC_CLOCKEVENTS
 	select GENERIC_IRQ_CHIP
 	select MIGHT_HAVE_CACHE_L2X0
+	select NO_IOPORT
 	select PINCTRL
 	select PINCTRL_SIRF
 	select USE_OF
@@ -391,12 +396,12 @@ config ARCH_SIRF
 
 config ARCH_EBSA110
 	bool "EBSA-110"
+	select ARCH_USES_GETTIMEOFFSET
 	select CPU_SA110
 	select ISA
-	select NO_IOPORT
-	select ARCH_USES_GETTIMEOFFSET
 	select NEED_MACH_IO_H
 	select NEED_MACH_MEMORY_H
+	select NO_IOPORT
 	help
 	  This is an evaluation board for the StrongARM processor available
 	  from Digital. It has limited hardware on-board, including an
@@ -405,13 +410,13 @@ config ARCH_EBSA110
 
 config ARCH_EP93XX
 	bool "EP93xx-based"
-	select CPU_ARM920T
+	select ARCH_HAS_HOLES_MEMORYMODEL
+	select ARCH_REQUIRE_GPIOLIB
+	select ARCH_USES_GETTIMEOFFSET
 	select ARM_AMBA
 	select ARM_VIC
 	select CLKDEV_LOOKUP
-	select ARCH_REQUIRE_GPIOLIB
-	select ARCH_HAS_HOLES_MEMORYMODEL
-	select ARCH_USES_GETTIMEOFFSET
+	select CPU_ARM920T
 	select NEED_MACH_MEMORY_H
 	help
 	  This enables support for the Cirrus EP93xx series of CPUs.
@@ -430,10 +435,10 @@ config ARCH_FOOTBRIDGE
 
 config ARCH_MXC
 	bool "Freescale MXC/iMX-based"
-	select GENERIC_CLOCKEVENTS
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
+	select GENERIC_CLOCKEVENTS
 	select GENERIC_IRQ_CHIP
 	select MULTI_IRQ_HANDLER
 	select SPARSE_IRQ
@@ -443,11 +448,11 @@ config ARCH_MXC
 
 config ARCH_MXS
 	bool "Freescale MXS-based"
-	select GENERIC_CLOCKEVENTS
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
 	select COMMON_CLK
+	select GENERIC_CLOCKEVENTS
 	select HAVE_CLK_PREPARE
 	select MULTI_IRQ_HANDLER
 	select PINCTRL
@@ -458,44 +463,43 @@ config ARCH_MXS
 
 config ARCH_NETX
 	bool "Hilscher NetX based"
+	select ARM_VIC
 	select CLKSRC_MMIO
 	select CPU_ARM926T
-	select ARM_VIC
 	select GENERIC_CLOCKEVENTS
 	help
 	  This enables support for systems based on the Hilscher NetX Soc
 
 config ARCH_H720X
 	bool "Hynix HMS720x-based"
+	select ARCH_USES_GETTIMEOFFSET
 	select CPU_ARM720T
 	select ISA_DMA_API
-	select ARCH_USES_GETTIMEOFFSET
 	help
 	  This enables support for systems based on the Hynix HMS720x
 
 config ARCH_IOP13XX
 	bool "IOP13xx-based"
 	depends on MMU
-	select CPU_XSC3
-	select PLAT_IOP
-	select PCI
 	select ARCH_SUPPORTS_MSI
-	select VMSPLIT_1G
+	select CPU_XSC3
 	select NEED_MACH_MEMORY_H
 	select NEED_RET_TO_USER
+	select PCI
+	select PLAT_IOP
+	select VMSPLIT_1G
 	help
 	  Support for Intel's IOP13XX (XScale) family of processors.
 
 config ARCH_IOP32X
 	bool "IOP32x-based"
 	depends on MMU
+	select ARCH_REQUIRE_GPIOLIB
 	select CPU_XSCALE
 	select NEED_MACH_GPIO_H
-	select NEED_MACH_IO_H
 	select NEED_RET_TO_USER
-	select PLAT_IOP
 	select PCI
-	select ARCH_REQUIRE_GPIOLIB
+	select PLAT_IOP
 	help
 	  Support for Intel's 80219 and IOP32X (XScale) family of
 	  processors.
@@ -503,13 +507,12 @@ config ARCH_IOP32X
 config ARCH_IOP33X
 	bool "IOP33x-based"
 	depends on MMU
+	select ARCH_REQUIRE_GPIOLIB
 	select CPU_XSCALE
 	select NEED_MACH_GPIO_H
-	select NEED_MACH_IO_H
 	select NEED_RET_TO_USER
-	select PLAT_IOP
 	select PCI
-	select ARCH_REQUIRE_GPIOLIB
+	select PLAT_IOP
 	help
 	  Support for Intel's IOP33X (XScale) family of processors.
 
@@ -517,20 +520,20 @@ config ARCH_IXP4XX
 	bool "IXP4xx-based"
 	depends on MMU
 	select ARCH_HAS_DMA_SET_COHERENT_MASK
+	select ARCH_REQUIRE_GPIOLIB
 	select CLKSRC_MMIO
 	select CPU_XSCALE
-	select ARCH_REQUIRE_GPIOLIB
+	select DMABOUNCE if PCI
 	select GENERIC_CLOCKEVENTS
 	select MIGHT_HAVE_PCI
 	select NEED_MACH_IO_H
-	select DMABOUNCE if PCI
 	help
 	  Support for Intel's IXP4XX (XScale) family of processors.
 
 config ARCH_DOVE
 	bool "Marvell Dove"
-	select CPU_V7
 	select ARCH_REQUIRE_GPIOLIB
+	select CPU_V7
 	select GENERIC_CLOCKEVENTS
 	select MIGHT_HAVE_PCI
 	select PLAT_ORION_LEGACY
@@ -540,36 +543,21 @@ config ARCH_DOVE
 
 config ARCH_KIRKWOOD
 	bool "Marvell Kirkwood"
-	select CPU_FEROCEON
-	select PCI
 	select ARCH_REQUIRE_GPIOLIB
+	select CPU_FEROCEON
 	select GENERIC_CLOCKEVENTS
+	select PCI
 	select PLAT_ORION_LEGACY
 	help
 	  Support for the following Marvell Kirkwood series SoCs:
 	  88F6180, 88F6192 and 88F6281.
 
-config ARCH_LPC32XX
-	bool "NXP LPC32XX"
-	select CLKSRC_MMIO
-	select CPU_ARM926T
-	select ARCH_REQUIRE_GPIOLIB
-	select HAVE_IDE
-	select ARM_AMBA
-	select USB_ARCH_HAS_OHCI
-	select CLKDEV_LOOKUP
-	select GENERIC_CLOCKEVENTS
-	select USE_OF
-	select HAVE_PWM
-	help
-	  Support for the NXP LPC32XX family of processors
-
 config ARCH_MV78XX0
 	bool "Marvell MV78xx0"
-	select CPU_FEROCEON
-	select PCI
 	select ARCH_REQUIRE_GPIOLIB
+	select CPU_FEROCEON
 	select GENERIC_CLOCKEVENTS
+	select PCI
 	select PLAT_ORION_LEGACY
 	help
 	  Support for the following Marvell MV78xx0 series SoCs:
@@ -578,10 +566,10 @@ config ARCH_MV78XX0
 config ARCH_ORION5X
 	bool "Marvell Orion"
 	depends on MMU
-	select CPU_FEROCEON
-	select PCI
 	select ARCH_REQUIRE_GPIOLIB
+	select CPU_FEROCEON
 	select GENERIC_CLOCKEVENTS
+	select PCI
 	select PLAT_ORION_LEGACY
 	help
 	  Support for the following Marvell Orion 5x series SoCs:
@@ -593,33 +581,33 @@ config ARCH_MMP
 	depends on MMU
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
+	select GENERIC_ALLOCATOR
 	select GENERIC_CLOCKEVENTS
 	select GPIO_PXA
 	select IRQ_DOMAIN
+	select NEED_MACH_GPIO_H
 	select PLAT_PXA
 	select SPARSE_IRQ
-	select GENERIC_ALLOCATOR
-	select NEED_MACH_GPIO_H
 	help
 	  Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
 
 config ARCH_KS8695
 	bool "Micrel/Kendin KS8695"
-	select CPU_ARM922T
 	select ARCH_REQUIRE_GPIOLIB
-	select NEED_MACH_MEMORY_H
 	select CLKSRC_MMIO
+	select CPU_ARM922T
 	select GENERIC_CLOCKEVENTS
+	select NEED_MACH_MEMORY_H
 	help
 	  Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 	  System-on-Chip devices.
 
 config ARCH_W90X900
 	bool "Nuvoton W90X900 CPU"
-	select CPU_ARM926T
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
+	select CPU_ARM926T
 	select GENERIC_CLOCKEVENTS
 	help
 	  Support for Nuvoton (Winbond logic dept.) ARM9 processor,
@@ -630,18 +618,33 @@ config ARCH_W90X900
 	  <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 		ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 
+config ARCH_LPC32XX
+	bool "NXP LPC32XX"
+	select ARCH_REQUIRE_GPIOLIB
+	select ARM_AMBA
+	select CLKDEV_LOOKUP
+	select CLKSRC_MMIO
+	select CPU_ARM926T
+	select GENERIC_CLOCKEVENTS
+	select HAVE_IDE
+	select HAVE_PWM
+	select USB_ARCH_HAS_OHCI
+	select USE_OF
+	help
+	  Support for the NXP LPC32XX family of processors
+
 config ARCH_TEGRA
 	bool "NVIDIA Tegra"
+	select ARCH_HAS_CPUFREQ
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
+	select COMMON_CLK
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select HAVE_SMP
 	select MIGHT_HAVE_CACHE_L2X0
-	select ARCH_HAS_CPUFREQ
 	select USE_OF
-	select COMMON_CLK
 	help
 	  This enables support for NVIDIA Tegra based systems (Tegra APX,
 	  Tegra 6xx and Tegra 2 series).
@@ -649,29 +652,29 @@ config ARCH_TEGRA
 config ARCH_PXA
 	bool "PXA2xx/PXA3xx-based"
 	depends on MMU
-	select ARCH_MTD_XIP
 	select ARCH_HAS_CPUFREQ
+	select ARCH_MTD_XIP
+	select ARCH_REQUIRE_GPIOLIB
+	select ARM_CPU_SUSPEND if PM
+	select AUTO_ZRELADDR
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
-	select ARCH_REQUIRE_GPIOLIB
 	select GENERIC_CLOCKEVENTS
 	select GPIO_PXA
-	select PLAT_PXA
-	select SPARSE_IRQ
-	select AUTO_ZRELADDR
-	select MULTI_IRQ_HANDLER
-	select ARM_CPU_SUSPEND if PM
 	select HAVE_IDE
+	select MULTI_IRQ_HANDLER
 	select NEED_MACH_GPIO_H
+	select PLAT_PXA
+	select SPARSE_IRQ
 	help
 	  Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 
 config ARCH_MSM
 	bool "Qualcomm MSM"
-	select HAVE_CLK
-	select GENERIC_CLOCKEVENTS
 	select ARCH_REQUIRE_GPIOLIB
 	select CLKDEV_LOOKUP
+	select GENERIC_CLOCKEVENTS
+	select HAVE_CLK
 	help
 	  Support for Qualcomm MSM/QSD based systems.  This runs on the
 	  apps processor of the MSM/QSD and depends on a shared memory
@@ -681,50 +684,50 @@ config ARCH_MSM
 
 config ARCH_SHMOBILE
 	bool "Renesas SH-Mobile / R-Mobile"
-	select HAVE_CLK
 	select CLKDEV_LOOKUP
+	select GENERIC_CLOCKEVENTS
+	select HAVE_CLK
 	select HAVE_MACH_CLKDEV
 	select HAVE_SMP
-	select GENERIC_CLOCKEVENTS
 	select MIGHT_HAVE_CACHE_L2X0
-	select NO_IOPORT
-	select SPARSE_IRQ
 	select MULTI_IRQ_HANDLER
-	select PM_GENERIC_DOMAINS if PM
 	select NEED_MACH_MEMORY_H
+	select NO_IOPORT
+	select PM_GENERIC_DOMAINS if PM
+	select SPARSE_IRQ
 	help
 	  Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
 
 config ARCH_RPC
 	bool "RiscPC"
 	select ARCH_ACORN
-	select FIQ
 	select ARCH_MAY_HAVE_PC_FDC
-	select HAVE_PATA_PLATFORM
-	select ISA_DMA_API
-	select NO_IOPORT
 	select ARCH_SPARSEMEM_ENABLE
 	select ARCH_USES_GETTIMEOFFSET
+	select FIQ
 	select HAVE_IDE
+	select HAVE_PATA_PLATFORM
+	select ISA_DMA_API
 	select NEED_MACH_IO_H
 	select NEED_MACH_MEMORY_H
+	select NO_IOPORT
 	help
 	  On the Acorn Risc-PC, Linux can support the internal IDE disk and
 	  CD-ROM interface, serial and parallel port, and the floppy drive.
 
 config ARCH_SA1100
 	bool "SA1100-based"
-	select CLKSRC_MMIO
-	select CPU_SA1100
-	select ISA
-	select ARCH_SPARSEMEM_ENABLE
-	select ARCH_MTD_XIP
 	select ARCH_HAS_CPUFREQ
+	select ARCH_MTD_XIP
+	select ARCH_REQUIRE_GPIOLIB
+	select ARCH_SPARSEMEM_ENABLE
+	select CLKDEV_LOOKUP
+	select CLKSRC_MMIO
 	select CPU_FREQ
+	select CPU_SA1100
 	select GENERIC_CLOCKEVENTS
-	select CLKDEV_LOOKUP
-	select ARCH_REQUIRE_GPIOLIB
 	select HAVE_IDE
+	select ISA
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_MEMORY_H
 	select SPARSE_IRQ
@@ -733,14 +736,14 @@ config ARCH_SA1100
 
 config ARCH_S3C24XX
 	bool "Samsung S3C24XX SoCs"
-	select GENERIC_GPIO
 	select ARCH_HAS_CPUFREQ
-	select HAVE_CLK
-	select CLKDEV_LOOKUP
 	select ARCH_USES_GETTIMEOFFSET
+	select CLKDEV_LOOKUP
+	select GENERIC_GPIO
+	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
-	select HAVE_S3C_RTC if RTC_CLASS
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
+	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_IO_H
 	help
@@ -751,38 +754,38 @@ config ARCH_S3C24XX
 
 config ARCH_S3C64XX
 	bool "Samsung S3C64XX"
-	select PLAT_SAMSUNG
-	select CPU_V6
+	select ARCH_HAS_CPUFREQ
+	select ARCH_REQUIRE_GPIOLIB
+	select ARCH_USES_GETTIMEOFFSET
 	select ARM_VIC
+	select CLKDEV_LOOKUP
+	select CPU_V6
 	select HAVE_CLK
+	select HAVE_S3C2410_I2C if I2C
+	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select HAVE_TCM
-	select CLKDEV_LOOKUP
+	select NEED_MACH_GPIO_H
 	select NO_IOPORT
-	select ARCH_USES_GETTIMEOFFSET
-	select ARCH_HAS_CPUFREQ
-	select ARCH_REQUIRE_GPIOLIB
+	select PLAT_SAMSUNG
+	select S3C_DEV_NAND
+	select S3C_GPIO_TRACK
 	select SAMSUNG_CLKSRC
+	select SAMSUNG_GPIOLIB_4BIT
 	select SAMSUNG_IRQ_VIC_TIMER
-	select S3C_GPIO_TRACK
-	select S3C_DEV_NAND
 	select USB_ARCH_HAS_OHCI
-	select SAMSUNG_GPIOLIB_4BIT
-	select HAVE_S3C2410_I2C if I2C
-	select HAVE_S3C2410_WATCHDOG if WATCHDOG
-	select NEED_MACH_GPIO_H
 	help
 	  Samsung S3C64XX series based systems
 
 config ARCH_S5P64X0
 	bool "Samsung S5P6440 S5P6450"
-	select CPU_V6
-	select GENERIC_GPIO
-	select HAVE_CLK
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
-	select HAVE_S3C2410_WATCHDOG if WATCHDOG
+	select CPU_V6
 	select GENERIC_CLOCKEVENTS
+	select GENERIC_GPIO
+	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
+	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
 	help
@@ -791,50 +794,50 @@ config ARCH_S5P64X0
 
 config ARCH_S5PC100
 	bool "Samsung S5PC100"
-	select GENERIC_GPIO
-	select HAVE_CLK
+	select ARCH_USES_GETTIMEOFFSET
 	select CLKDEV_LOOKUP
 	select CPU_V7
-	select ARCH_USES_GETTIMEOFFSET
+	select GENERIC_GPIO
+	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
-	select HAVE_S3C_RTC if RTC_CLASS
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
+	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
 	help
 	  Samsung S5PC100 series based systems
 
 config ARCH_S5PV210
 	bool "Samsung S5PV210/S5PC110"
-	select CPU_V7
-	select ARCH_SPARSEMEM_ENABLE
+	select ARCH_HAS_CPUFREQ
 	select ARCH_HAS_HOLES_MEMORYMODEL
-	select GENERIC_GPIO
-	select HAVE_CLK
+	select ARCH_SPARSEMEM_ENABLE
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
-	select ARCH_HAS_CPUFREQ
+	select CPU_V7
 	select GENERIC_CLOCKEVENTS
+	select GENERIC_GPIO
+	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
-	select HAVE_S3C_RTC if RTC_CLASS
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
+	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_MEMORY_H
 	help
 	  Samsung S5PV210/S5PC110 series based systems
 
 config ARCH_EXYNOS
-	bool "SAMSUNG EXYNOS"
-	select CPU_V7
-	select ARCH_SPARSEMEM_ENABLE
+	bool "Samsung EXYNOS"
+	select ARCH_HAS_CPUFREQ
 	select ARCH_HAS_HOLES_MEMORYMODEL
-	select GENERIC_GPIO
-	select HAVE_CLK
+	select ARCH_SPARSEMEM_ENABLE
 	select CLKDEV_LOOKUP
-	select ARCH_HAS_CPUFREQ
+	select CPU_V7
 	select GENERIC_CLOCKEVENTS
-	select HAVE_S3C_RTC if RTC_CLASS
+	select GENERIC_GPIO
+	select HAVE_CLK
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
+	select HAVE_S3C_RTC if RTC_CLASS
 	select NEED_MACH_GPIO_H
 	select NEED_MACH_MEMORY_H
 	help
@@ -842,13 +845,13 @@ config ARCH_EXYNOS
 
 config ARCH_SHARK
 	bool "Shark"
+	select ARCH_USES_GETTIMEOFFSET
 	select CPU_SA110
 	select ISA
 	select ISA_DMA
-	select ZONE_DMA
-	select PCI
-	select ARCH_USES_GETTIMEOFFSET
 	select NEED_MACH_MEMORY_H
+	select PCI
+	select ZONE_DMA
 	help
 	  Support for the StrongARM based Digital DNARD machine, also known
 	  as "Shark" (<http://www.shark-linux.de/shark.html>).
@@ -856,17 +859,17 @@ config ARCH_SHARK
 config ARCH_U300
 	bool "ST-Ericsson U300 Series"
 	depends on MMU
-	select CLKSRC_MMIO
-	select CPU_ARM926T
-	select HAVE_TCM
+	select ARCH_REQUIRE_GPIOLIB
 	select ARM_AMBA
 	select ARM_PATCH_PHYS_VIRT
 	select ARM_VIC
-	select GENERIC_CLOCKEVENTS
 	select CLKDEV_LOOKUP
+	select CLKSRC_MMIO
 	select COMMON_CLK
+	select CPU_ARM926T
+	select GENERIC_CLOCKEVENTS
 	select GENERIC_GPIO
-	select ARCH_REQUIRE_GPIOLIB
+	select HAVE_TCM
 	select SPARSE_IRQ
 	help
 	  Support for ST-Ericsson U300 series mobile platforms.
@@ -874,12 +877,12 @@ config ARCH_U300
 config ARCH_U8500
 	bool "ST-Ericsson U8500 Series"
 	depends on MMU
-	select CPU_V7
+	select ARCH_HAS_CPUFREQ
+	select ARCH_REQUIRE_GPIOLIB
 	select ARM_AMBA
-	select GENERIC_CLOCKEVENTS
 	select CLKDEV_LOOKUP
-	select ARCH_REQUIRE_GPIOLIB
-	select ARCH_HAS_CPUFREQ
+	select CPU_V7
+	select GENERIC_CLOCKEVENTS
 	select HAVE_SMP
 	select MIGHT_HAVE_CACHE_L2X0
 	help
@@ -887,78 +890,78 @@ config ARCH_U8500
 
 config ARCH_NOMADIK
 	bool "STMicroelectronics Nomadik"
+	select ARCH_REQUIRE_GPIOLIB
 	select ARM_AMBA
 	select ARM_VIC
-	select CPU_ARM926T
 	select COMMON_CLK
+	select CPU_ARM926T
 	select GENERIC_CLOCKEVENTS
+	select MIGHT_HAVE_CACHE_L2X0
 	select PINCTRL
 	select PINCTRL_STN8815
-	select MIGHT_HAVE_CACHE_L2X0
-	select ARCH_REQUIRE_GPIOLIB
 	help
 	  Support for the Nomadik platform by ST-Ericsson
 
+config PLAT_SPEAR
+	bool "ST SPEAr"
+	select ARCH_REQUIRE_GPIOLIB
+	select ARM_AMBA
+	select CLKDEV_LOOKUP
+	select CLKSRC_MMIO
+	select COMMON_CLK
+	select GENERIC_CLOCKEVENTS
+	select HAVE_CLK
+	help
+	  Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
+
 config ARCH_DAVINCI
 	bool "TI DaVinci"
-	select GENERIC_CLOCKEVENTS
+	select ARCH_HAS_HOLES_MEMORYMODEL
 	select ARCH_REQUIRE_GPIOLIB
-	select ZONE_DMA
-	select HAVE_IDE
 	select CLKDEV_LOOKUP
 	select GENERIC_ALLOCATOR
+	select GENERIC_CLOCKEVENTS
 	select GENERIC_IRQ_CHIP
-	select ARCH_HAS_HOLES_MEMORYMODEL
+	select HAVE_IDE
 	select NEED_MACH_GPIO_H
+	select ZONE_DMA
 	help
 	  Support for TI's DaVinci platform.
 
 config ARCH_OMAP
 	bool "TI OMAP"
 	depends on MMU
-	select HAVE_CLK
-	select ARCH_REQUIRE_GPIOLIB
 	select ARCH_HAS_CPUFREQ
-	select CLKSRC_MMIO
-	select GENERIC_CLOCKEVENTS
 	select ARCH_HAS_HOLES_MEMORYMODEL
-	select NEED_MACH_GPIO_H
-	help
-	  Support for TI's OMAP platform (OMAP1/2/3/4).
-
-config PLAT_SPEAR
-	bool "ST SPEAr"
-	select ARM_AMBA
 	select ARCH_REQUIRE_GPIOLIB
-	select CLKDEV_LOOKUP
-	select COMMON_CLK
 	select CLKSRC_MMIO
 	select GENERIC_CLOCKEVENTS
 	select HAVE_CLK
+	select NEED_MACH_GPIO_H
 	help
-	  Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
+	  Support for TI's OMAP platform (OMAP1/2/3/4).
 
 config ARCH_VT8500
 	bool "VIA/WonderMedia 85xx"
-	select CPU_ARM926T
-	select GENERIC_GPIO
 	select ARCH_HAS_CPUFREQ
-	select GENERIC_CLOCKEVENTS
 	select ARCH_REQUIRE_GPIOLIB
-	select USE_OF
+	select CLKDEV_LOOKUP
 	select COMMON_CLK
+	select CPU_ARM926T
+	select GENERIC_CLOCKEVENTS
+	select GENERIC_GPIO
 	select HAVE_CLK
-	select CLKDEV_LOOKUP
+	select USE_OF
 	help
 	  Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
 
 config ARCH_ZYNQ
 	bool "Xilinx Zynq ARM Cortex A9 Platform"
+	select ARM_AMBA
+	select ARM_GIC
+	select CLKDEV_LOOKUP
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
-	select CLKDEV_LOOKUP
-	select ARM_GIC
-	select ARM_AMBA
 	select ICST
 	select MIGHT_HAVE_CACHE_L2X0
 	select USE_OF
@@ -973,33 +976,33 @@ comment "CPU Core family selection"
 
 config ARCH_MULTI_V4
 	bool "ARMv4 based platforms (FA526, StrongARM)"
-	select ARCH_MULTI_V4_V5
 	depends on !ARCH_MULTI_V6_V7
+	select ARCH_MULTI_V4_V5
 
 config ARCH_MULTI_V4T
 	bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
-	select ARCH_MULTI_V4_V5
 	depends on !ARCH_MULTI_V6_V7
+	select ARCH_MULTI_V4_V5
 
 config ARCH_MULTI_V5
 	bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
-	select ARCH_MULTI_V4_V5
 	depends on !ARCH_MULTI_V6_V7
+	select ARCH_MULTI_V4_V5
 
 config ARCH_MULTI_V4_V5
 	bool
 
 config ARCH_MULTI_V6
 	bool "ARMv6 based platforms (ARM11, Scorpion, ...)"
-	select CPU_V6
 	select ARCH_MULTI_V6_V7
+	select CPU_V6
 
 config ARCH_MULTI_V7
 	bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)"
-	select CPU_V7
-	select ARCH_VEXPRESS
 	default y
 	select ARCH_MULTI_V6_V7
+	select ARCH_VEXPRESS
+	select CPU_V7
 
 config ARCH_MULTI_V6_V7
 	bool
@@ -1136,9 +1139,9 @@ config PLAT_IOP
 config PLAT_ORION
 	bool
 	select CLKSRC_MMIO
+	select COMMON_CLK
 	select GENERIC_IRQ_CHIP
 	select IRQ_DOMAIN
-	select COMMON_CLK
 
 config PLAT_ORION_LEGACY
 	bool
@@ -1496,8 +1499,8 @@ config SMP
 	depends on GENERIC_CLOCKEVENTS
 	depends on HAVE_SMP
 	depends on MMU
-	select USE_GENERIC_SMP_HELPERS
 	select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
+	select USE_GENERIC_SMP_HELPERS
 	help
 	  This enables support for systems with more than one CPU. If you have
 	  a system with only one CPU, like most personal computers, say N. If
@@ -1600,8 +1603,8 @@ config NR_CPUS
 	default "4"
 
 config HOTPLUG_CPU
-	bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
-	depends on SMP && HOTPLUG && EXPERIMENTAL
+	bool "Support for hot-pluggable CPUs"
+	depends on SMP && HOTPLUG
 	help
 	  Say Y here to experiment with turning CPUs off and on.  CPUs
 	  can be controlled through /sys/devices/system/cpu.
@@ -1642,8 +1645,8 @@ config HZ
 	default 100
 
 config THUMB2_KERNEL
-	bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
-	depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
+	bool "Compile the kernel in Thumb-2 mode"
+	depends on CPU_V7 && !CPU_V6 && !CPU_V6K
 	select AEABI
 	select ARM_ASM_UNIFIED
 	select ARM_UNWIND
@@ -1769,6 +1772,7 @@ source "mm/Kconfig"
 config FORCE_MAX_ZONEORDER
 	int "Maximum zone order" if ARCH_SHMOBILE
 	range 11 64 if ARCH_SHMOBILE
+	default "12" if SOC_AM33XX
 	default "9" if SA1111
 	default "11"
 	help
@@ -1856,9 +1860,9 @@ menu "Boot options"
 
 config USE_OF
 	bool "Flattened Device Tree support"
+	select IRQ_DOMAIN
 	select OF
 	select OF_EARLY_FLATTREE
-	select IRQ_DOMAIN
 	help
 	  Include support for flattened device tree machine descriptions.
 
@@ -2140,8 +2144,8 @@ config CPU_FREQ_PXA
 	bool
 	depends on CPU_FREQ && ARCH_PXA && PXA25x
 	default y
-	select CPU_FREQ_TABLE
 	select CPU_FREQ_DEFAULT_GOV_USERSPACE
+	select CPU_FREQ_TABLE
 
 config CPU_FREQ_S3C
 	bool
diff --git a/arch/arm/boot/compressed/.gitignore b/arch/arm/boot/compressed/.gitignore
index d0d441c429a..f79a08efe00 100644
--- a/arch/arm/boot/compressed/.gitignore
+++ b/arch/arm/boot/compressed/.gitignore
@@ -1,6 +1,7 @@
 ashldi3.S
 font.c
 lib1funcs.S
+hyp-stub.S
 piggy.gzip
 piggy.lzo
 piggy.lzma
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index bb267562e7e..a517153a13e 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -30,6 +30,10 @@ FONTC	= $(srctree)/drivers/video/console/font_acorn_8x8.c
 OBJS		+= string.o
 CFLAGS_string.o	:= -Os
 
+ifeq ($(CONFIG_ARM_VIRT_EXT),y)
+OBJS		+= hyp-stub.o
+endif
+
 #
 # Architecture dependencies
 #
@@ -126,7 +130,7 @@ KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
 endif
 
 ccflags-y := -fpic -fno-builtin -I$(obj)
-asflags-y := -Wa,-march=all
+asflags-y := -Wa,-march=all -DZIMAGE
 
 # Supply kernel BSS size to the decompressor via a linker symbol.
 KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
@@ -198,3 +202,6 @@ $(obj)/font.c: $(FONTC)
 
 $(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile $(KCONFIG_CONFIG)
 	@sed "$(SEDFLAGS)" < $< > $@
+
+$(obj)/hyp-stub.S: $(srctree)/arch/$(SRCARCH)/kernel/hyp-stub.S
+	$(call cmd,shipped)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index bc67cbff394..90275f036cd 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -9,6 +9,7 @@
  * published by the Free Software Foundation.
  */
 #include <linux/linkage.h>
+#include <asm/assembler.h>
 
 /*
  * Debugging stuff
@@ -132,7 +133,12 @@ start:
 		.word	start			@ absolute load/run zImage address
 		.word	_edata			@ zImage end address
  THUMB(		.thumb			)
-1:		mov	r7, r1			@ save architecture ID
+1:
+		mrs	r9, cpsr
+#ifdef CONFIG_ARM_VIRT_EXT
+		bl	__hyp_stub_install	@ get into SVC mode, reversibly
+#endif
+		mov	r7, r1			@ save architecture ID
 		mov	r8, r2			@ save atags pointer
 
 #ifndef __ARM_ARCH_2__
@@ -148,9 +154,9 @@ start:
  ARM(		swi	0x123456	)	@ angel_SWI_ARM
  THUMB(		svc	0xab		)	@ angel_SWI_THUMB
 not_angel:
-		mrs	r2, cpsr		@ turn off interrupts to
-		orr	r2, r2, #0xc0		@ prevent angel from running
-		msr	cpsr_c, r2
+		safe_svcmode_maskall r0
+		msr	spsr_cxsf, r9		@ Save the CPU boot mode in
+						@ SPSR
 #else
 		teqp	pc, #0x0c000003		@ turn off interrupts
 #endif
@@ -350,6 +356,20 @@ dtb_check_done:
 		adr	r5, restart
 		bic	r5, r5, #31
 
+/* Relocate the hyp vector base if necessary */
+#ifdef CONFIG_ARM_VIRT_EXT
+		mrs	r0, spsr
+		and	r0, r0, #MODE_MASK
+		cmp	r0, #HYP_MODE
+		bne	1f
+
+		bl	__hyp_get_vectors
+		sub	r0, r0, r5
+		add	r0, r0, r10
+		bl	__hyp_set_vectors
+1:
+#endif
+
 		sub	r9, r6, r5		@ size to copy
 		add	r9, r9, #31		@ rounded up to a multiple
 		bic	r9, r9, #31		@ ... of 32 bytes
@@ -458,11 +478,29 @@ not_relocated:	mov	r0, #0
 		bl	decompress_kernel
 		bl	cache_clean_flush
 		bl	cache_off
-		mov	r0, #0			@ must be zero
 		mov	r1, r7			@ restore architecture number
 		mov	r2, r8			@ restore atags pointer
- ARM(		mov	pc, r4	)		@ call kernel
- THUMB(		bx	r4	)		@ entry point is always ARM
+
+#ifdef CONFIG_ARM_VIRT_EXT
+		mrs	r0, spsr		@ Get saved CPU boot mode
+		and	r0, r0, #MODE_MASK
+		cmp	r0, #HYP_MODE		@ if not booted in HYP mode...
+		bne	__enter_kernel		@ boot kernel directly
+
+		adr	r12, .L__hyp_reentry_vectors_offset
+		ldr	r0, [r12]
+		add	r0, r0, r12
+
+		bl	__hyp_set_vectors
+		__HVC(0)			@ otherwise bounce to hyp mode
+
+		b	.			@ should never be reached
+
+		.align	2
+.L__hyp_reentry_vectors_offset:	.long	__hyp_reentry_vectors - .
+#else
+		b	__enter_kernel
+#endif
 
 		.align	2
 		.type	LC0, #object
@@ -1196,6 +1234,25 @@ memdump:	mov	r12, r0
 #endif
 
 		.ltorg
+
+#ifdef CONFIG_ARM_VIRT_EXT
+.align 5
+__hyp_reentry_vectors:
+		W(b)	.			@ reset
+		W(b)	.			@ undef
+		W(b)	.			@ svc
+		W(b)	.			@ pabort
+		W(b)	.			@ dabort
+		W(b)	__enter_kernel		@ hyp
+		W(b)	.			@ irq
+		W(b)	.			@ fiq
+#endif /* CONFIG_ARM_VIRT_EXT */
+
+__enter_kernel:
+		mov	r0, #0			@ must be 0
+ ARM(		mov	pc, r4	)		@ call kernel
+ THUMB(		bx	r4	)		@ entry point is always ARM
+
 reloc_code_end:
 
 		.align
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 29f541f0e65..c1ce813fcc4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -25,14 +25,6 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 	exynos4210-trats.dtb \
 	exynos5250-smdk5250.dtb
 dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
-dtb-$(CONFIG_ARCH_IMX5) += imx51-babbage.dtb \
-	imx53-ard.dtb \
-	imx53-evk.dtb \
-	imx53-qsb.dtb \
-	imx53-smd.dtb
-dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
-	imx6q-sabrelite.dtb \
-	imx6q-sabresd.dtb
 dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
 dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
 	kirkwood-dns325.dtb \
@@ -76,7 +68,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
 	omap4-pandaES.dtb \
 	omap4-var_som.dtb \
 	omap4-sdp.dtb \
-	omap5-evm.dtb
+	omap5-evm.dtb \
+	am335x-evm.dtb \
+	am335x-bone.dtb
 dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
 dtb-$(CONFIG_ARCH_U8500) += snowball.dtb
 dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
@@ -104,5 +98,8 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
 	vexpress-v2p-ca15-tc1.dtb \
 	vexpress-v2p-ca15_a7.dtb \
 	xenvm-4.2.dtb
+dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
+	wm8505-ref.dtb \
+	wm8650-mid.dtb
 
 endif
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 7c95f76398d..d410581a5a8 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -28,6 +28,7 @@
 		gpio2 = &pioC;
 		tcb0 = &tcb0;
 		tcb1 = &tcb1;
+		i2c0 = &i2c0;
 	};
 	cpus {
 		cpu@0 {
@@ -202,6 +203,15 @@
 				status = "disabled";
 			};
 
+			i2c0: i2c@fffac000 {
+				compatible = "atmel,at91sam9260-i2c";
+				reg = <0xfffac000 0x100>;
+				interrupts = <11 4 6>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
 			adc0: adc@fffe0000 {
 				compatible = "atmel,at91sam9260-adc";
 				reg = <0xfffe0000 0x100>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 195019b7ca0..3e6e5c1abbf 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -24,6 +24,7 @@
 		gpio3 = &pioD;
 		gpio4 = &pioE;
 		tcb0 = &tcb0;
+		i2c0 = &i2c0;
 	};
 	cpus {
 		cpu@0 {
@@ -185,6 +186,15 @@
 				interrupts = <24 4 2>;
 				status = "disabled";
 			};
+
+			i2c0: i2c@fff88000 {
+				compatible = "atmel,at91sam9263-i2c";
+				reg = <0xfff88000 0x100>;
+				interrupts = <13 4 6>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 2a1d1ca8bd8..75ce6e76001 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -18,6 +18,10 @@
 
 	ahb {
 		apb {
+			i2c0: i2c@fffac000 {
+				compatible = "atmel,at91sam9g20-i2c";
+			};
+
 			adc0: adc@fffe0000 {
 				atmel,adc-startup-time = <40>;
 			};
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index 96514c134e5..877c08f0676 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -32,6 +32,18 @@
 				phy-mode = "rmii";
 				status = "okay";
 			};
+
+			i2c0: i2c@f8010000 {
+				status = "okay";
+			};
+
+			i2c1: i2c@f8014000 {
+				status = "okay";
+			};
+
+			i2c2: i2c@f8018000 {
+				status = "okay";
+			};
 		};
 
 		usb0: ohci@00600000 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 63751b1e744..3add030d61f 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -29,6 +29,8 @@
 		gpio4 = &pioE;
 		tcb0 = &tcb0;
 		tcb1 = &tcb1;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
 	};
 	cpus {
 		cpu@0 {
@@ -206,6 +208,24 @@
 				status = "disabled";
 			};
 
+			i2c0: i2c@fff84000 {
+				compatible = "atmel,at91sam9g10-i2c";
+				reg = <0xfff84000 0x100>;
+				interrupts = <12 4 6>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			i2c1: i2c@fff88000 {
+				compatible = "atmel,at91sam9g10-i2c";
+				reg = <0xfff88000 0x100>;
+				interrupts = <13 4 6>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
 			adc0: adc@fffb0000 {
 				compatible = "atmel,at91sam9260-adc";
 				reg = <0xfffb0000 0x100>;
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index a3633bd1311..15e1dd43f62 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -46,6 +46,14 @@
 				phy-mode = "rmii";
 				status = "okay";
 			};
+
+			i2c0: i2c@fff84000 {
+				status = "okay";
+			};
+
+			i2c1: i2c@fff88000 {
+				status = "okay";
+			};
 		};
 
 		nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index ef9336ae961..82508d68aa7 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -26,6 +26,8 @@
 		gpio3 = &pioD;
 		tcb0 = &tcb0;
 		tcb1 = &tcb1;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
 	};
 	cpus {
 		cpu@0 {
@@ -182,6 +184,24 @@
 				atmel,use-dma-tx;
 				status = "disabled";
 			};
+
+			i2c0: i2c@f8010000 {
+				compatible = "atmel,at91sam9x5-i2c";
+				reg = <0xf8010000 0x100>;
+				interrupts = <9 4 6>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			i2c1: i2c@f8014000 {
+				compatible = "atmel,at91sam9x5-i2c";
+				reg = <0xf8014000 0x100>;
+				interrupts = <10 4 6>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
 		};
 
 		nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index f4e43e38f3a..912b2c283d6 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -37,6 +37,14 @@
 			dbgu: serial@fffff200 {
 				status = "okay";
 			};
+
+			i2c0: i2c@f8010000 {
+				status = "okay";
+			};
+
+			i2c1: i2c@f8014000 {
+				status = "okay";
+			};
 		};
 
 		nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 8a387a8d61b..03fc136421c 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -27,6 +27,9 @@
 		gpio3 = &pioD;
 		tcb0 = &tcb0;
 		tcb1 = &tcb1;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
 	};
 	cpus {
 		cpu@0 {
@@ -196,6 +199,33 @@
 				status = "disabled";
 			};
 
+			i2c0: i2c@f8010000 {
+				compatible = "atmel,at91sam9x5-i2c";
+				reg = <0xf8010000 0x100>;
+				interrupts = <9 4 6>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			i2c1: i2c@f8014000 {
+				compatible = "atmel,at91sam9x5-i2c";
+				reg = <0xf8014000 0x100>;
+				interrupts = <10 4 6>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			i2c2: i2c@f8018000 {
+				compatible = "atmel,at91sam9x5-i2c";
+				reg = <0xf8018000 0x100>;
+				interrupts = <11 4 6>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
 			adc0: adc@f804c000 {
 				compatible = "atmel,at91sam9260-adc";
 				reg = <0xf804c000 0x100>;
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 59fbfba23df..e16d6315548 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -764,6 +764,7 @@
 				reg = <0x80058000 0x2000>;
 				interrupts = <111 68>;
 				clock-frequency = <100000>;
+				fsl,i2c-dma-channel = <6>;
 				status = "disabled";
 			};
 
@@ -774,6 +775,7 @@
 				reg = <0x8005a000 0x2000>;
 				interrupts = <110 69>;
 				clock-frequency = <100000>;
+				fsl,i2c-dma-channel = <7>;
 				status = "disabled";
 			};
 
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 2f71a91ca98..75d069fcf89 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -407,6 +407,13 @@
 				status = "disabled";
 			};
 
+			nand@83fdb000 {
+				compatible = "fsl,imx51-nand";
+				reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
+				interrupts = <8>;
+				status = "disabled";
+			};
+
 			ssi3: ssi@83fe8000 {
 				compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
 				reg = <0x83fe8000 0x4000>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 221cf3321b0..76ebb1ad267 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -518,6 +518,13 @@
 				status = "disabled";
 			};
 
+			nand@63fdb000 {
+				compatible = "fsl,imx53-nand";
+				reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>;
+				interrupts = <8>;
+				status = "disabled";
+			};
+
 			ssi3: ssi@63fe8000 {
 				compatible = "fsl,imx53-ssi", "fsl,imx21-ssi";
 				reg = <0x63fe8000 0x4000>;
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
index 20b966ee1bb..e8f927cbb37 100644
--- a/arch/arm/boot/dts/omap4-panda.dts
+++ b/arch/arm/boot/dts/omap4-panda.dts
@@ -59,6 +59,41 @@
 	};
 };
 
+&omap4_pmx_core {
+	pinctrl-names = "default";
+	pinctrl-0 = <
+			&twl6040_pins
+			&mcpdm_pins
+			&mcbsp1_pins
+	>;
+
+	twl6040_pins: pinmux_twl6040_pins {
+		pinctrl-single,pins = <
+			0xe0 0x3	/* hdq_sio.gpio_127 OUTPUT | MODE3 */
+			0x160 0x100	/* sys_nirq2.sys_nirq2 INPUT | MODE0 */
+		>;
+	};
+
+	mcpdm_pins: pinmux_mcpdm_pins {
+		pinctrl-single,pins = <
+			0xc6 0x108	/* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */
+			0xc8 0x108	/* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */
+			0xca 0x118	/* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */
+			0xcc 0x108	/* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */
+			0xce 0x108	/* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
+		>;
+	};
+
+	mcbsp1_pins: pinmux_mcbsp1_pins {
+		pinctrl-single,pins = <
+			0xbe 0x100	/* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */
+			0xc0 0x108	/* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */
+			0xc2 0x8		/* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */
+			0xc4 0x100	/* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
+		>;
+	};
+};
+
 &i2c1 {
 	clock-frequency = <400000>;
 
@@ -137,3 +172,15 @@
 	cs1-used;
 	device-handle = <&elpida_ECB240ABACN>;
 };
+
+&mcbsp2 {
+	status = "disabled";
+};
+
+&mcbsp3 {
+	status = "disabled";
+};
+
+&dmic {
+	status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 94a23b39033..5b7e04fbff5 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -117,6 +117,15 @@
 };
 
 &omap4_pmx_core {
+	pinctrl-names = "default";
+	pinctrl-0 = <
+			&twl6040_pins
+			&mcpdm_pins
+			&dmic_pins
+			&mcbsp1_pins
+			&mcbsp2_pins
+	>;
+
 	uart2_pins: pinmux_uart2_pins {
 		pinctrl-single,pins = <
 			0xd8 0x118	/* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */
@@ -141,6 +150,50 @@
 			0x11e 0		/* uart4_tx.uart4_tx OUTPUT | MODE0 */
 		>;
 	};
+
+	twl6040_pins: pinmux_twl6040_pins {
+		pinctrl-single,pins = <
+			0xe0 0x3	/* hdq_sio.gpio_127 OUTPUT | MODE3 */
+			0x160 0x100	/* sys_nirq2.sys_nirq2 INPUT | MODE0 */
+		>;
+	};
+
+	mcpdm_pins: pinmux_mcpdm_pins {
+		pinctrl-single,pins = <
+			0xc6 0x108	/* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */
+			0xc8 0x108	/* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */
+			0xca 0x118	/* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */
+			0xcc 0x108	/* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */
+			0xce 0x108	/* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
+		>;
+	};
+
+	dmic_pins: pinmux_dmic_pins {
+		pinctrl-single,pins = <
+			0xd0 0		/* abe_dmic_clk1.abe_dmic_clk1 OUTPUT | MODE0 */
+			0xd2 0x100	/* abe_dmic_din1.abe_dmic_din1 INPUT | MODE0 */
+			0xd4 0x100	/* abe_dmic_din2.abe_dmic_din2 INPUT | MODE0 */
+			0xd6 0x100	/* abe_dmic_din3.abe_dmic_din3 INPUT | MODE0 */
+		>;
+	};
+
+	mcbsp1_pins: pinmux_mcbsp1_pins {
+		pinctrl-single,pins = <
+			0xbe 0x100	/* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */
+			0xc0 0x108	/* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */
+			0xc2 0x8	/* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */
+			0xc4 0x100	/* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
+		>;
+	};
+
+	mcbsp2_pins: pinmux_mcbsp2_pins {
+		pinctrl-single,pins = <
+			0xb6 0x100	/* abe_mcbsp2_clkx.abe_mcbsp2_clkx INPUT | MODE0 */
+			0xb8 0x108	/* abe_mcbsp2_dr.abe_mcbsp2_dr INPUT PULLDOWN | MODE0 */
+			0xba 0x8	/* abe_mcbsp2_dx.abe_mcbsp2_dx OUTPUT PULLDOWN | MODE0 */
+			0xbc 0x100	/* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */
+		>;
+	};
 };
 
 &i2c1 {
@@ -349,3 +402,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart4_pins>;
 };
+
+&mcbsp3 {
+	status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts
index 9c41a3f311a..c663eba7316 100644
--- a/arch/arm/boot/dts/omap5-evm.dts
+++ b/arch/arm/boot/dts/omap5-evm.dts
@@ -27,6 +27,60 @@
 
 };
 
+&omap5_pmx_core {
+	pinctrl-names = "default";
+	pinctrl-0 = <
+			&twl6040_pins
+			&mcpdm_pins
+			&dmic_pins
+			&mcbsp1_pins
+			&mcbsp2_pins
+	>;
+
+	twl6040_pins: pinmux_twl6040_pins {
+		pinctrl-single,pins = <
+			0x18a 0x6	/* perslimbus2_clock.gpio5_145 OUTPUT | MODE6 */
+		>;
+	};
+
+	mcpdm_pins: pinmux_mcpdm_pins {
+		pinctrl-single,pins = <
+			0x142 0x108	/* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
+			0x15c 0x108	/* abemcpdm_ul_data.abemcpdm_ul_data INPUT PULLDOWN | MODE0 */
+			0x15e 0x108	/* abemcpdm_dl_data.abemcpdm_dl_data INPUT PULLDOWN | MODE0 */
+			0x160 0x118	/* abemcpdm_frame.abemcpdm_frame INPUT PULLUP | MODE0 */
+			0x162 0x108	/* abemcpdm_lb_clk.abemcpdm_lb_clk INPUT PULLDOWN | MODE0 */
+		>;
+	};
+
+	dmic_pins: pinmux_dmic_pins {
+		pinctrl-single,pins = <
+			0x144 0x100	/* abedmic_din1.abedmic_din1 INPUT | MODE0 */
+			0x146 0x100	/* abedmic_din2.abedmic_din2 INPUT | MODE0 */
+			0x148 0x100	/* abedmic_din3.abedmic_din3 INPUT | MODE0 */
+			0x14a 0		/* abedmic_clk1.abedmic_clk1 OUTPUT | MODE0 */
+		>;
+	};
+
+	mcbsp1_pins: pinmux_mcbsp1_pins {
+		pinctrl-single,pins = <
+			0x14c 0x101	/* abedmic_clk2.abemcbsp1_fsx INPUT | MODE1 */
+			0x14e 0x9	/* abedmic_clk3.abemcbsp1_dx OUTPUT PULLDOWN | MODE1 */
+			0x150 0x101	/* abeslimbus1_clock.abemcbsp1_clkx INPUT | MODE0 */
+			0x152 0x109	/* abeslimbus1_data.abemcbsp1_dr INPUT PULLDOWN | MODE1 */
+		>;
+	};
+
+	mcbsp2_pins: pinmux_mcbsp2_pins {
+		pinctrl-single,pins = <
+			0x154 0x108	/* abemcbsp2_dr.abemcbsp2_dr INPUT PULLDOWN | MODE0 */
+			0x156 0x8	/* abemcbsp2_dx.abemcbsp2_dx OUTPUT PULLDOWN | MODE0 */
+			0x158 0x100	/* abemcbsp2_fsx.abemcbsp2_fsx INPUT | MODE0 */
+			0x15a 0x100	/* abemcbsp2_clkx.abemcbsp2_clkx INPUT | MODE0 */
+		>;
+	};
+};
+
 &mmc1 {
 	vmmc-supply = <&vmmcsd_fixed>;
 	bus-width = <4>;
@@ -82,3 +136,7 @@
 			0x020700d9>;	/* SEARCH */
 	linux,input-no-autorepeat;
 };
+
+&mcbsp3 {
+	status = "disabled";
+};
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 5db33f481a3..42c78beb4fd 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -77,6 +77,23 @@
 		ranges;
 		ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 
+		omap5_pmx_core: pinmux@4a002840 {
+			compatible = "ti,omap4-padconf", "pinctrl-single";
+			reg = <0x4a002840 0x01b6>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			pinctrl-single,register-width = <16>;
+			pinctrl-single,function-mask = <0x7fff>;
+		};
+		omap5_pmx_wkup: pinmux@4ae0c840 {
+			compatible = "ti,omap4-padconf", "pinctrl-single";
+			reg = <0x4ae0c840 0x0038>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			pinctrl-single,register-width = <16>;
+			pinctrl-single,function-mask = <0x7fff>;
+		};
+
 		gic: interrupt-controller@48211000 {
 			compatible = "arm,cortex-a15-gic";
 			interrupt-controller;
diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts
index d71b8d581e3..1e7c7a8e212 100644
--- a/arch/arm/boot/dts/spear300-evb.dts
+++ b/arch/arm/boot/dts/spear300-evb.dts
@@ -80,8 +80,7 @@
 		};
 
 		sdhci@70000000 {
-			int-gpio = <&gpio1 0 0>;
-			power-gpio = <&gpio1 2 1>;
+			cd-gpios = <&gpio1 0 0>;
 			status = "okay";
 		};
 
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index e4e912f9502..082328bd64a 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -103,8 +103,6 @@
 		};
 
 		sdhci@70000000 {
-			power-gpio = <&gpio0 2 1>;
-			power_always_enb;
 			status = "okay";
 		};
 
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index e60dc7124e9..f0ba901676a 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -539,7 +539,7 @@
 		nvidia,invert-interrupt;
 	};
 
-	memory-controller@0x7000f400 {
+	memory-controller@7000f400 {
 		emc-table@190000 {
 			reg = <190000>;
 			compatible = "nvidia,tegra20-emc-table";
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 67a6cd910b9..f3a09d0d45b 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -170,7 +170,7 @@
 		reg = <0x7000e400 0x400>;
 	};
 
-	memory-controller@0x7000f000 {
+	memory-controller@7000f000 {
 		compatible = "nvidia,tegra20-mc";
 		reg = <0x7000f000 0x024
 		       0x7000f03c 0x3c4>;
@@ -183,7 +183,7 @@
 		       0x58000000 0x02000000>;	/* GART aperture */
 	};
 
-	memory-controller@0x7000f400 {
+	memory-controller@7000f400 {
 		compatible = "nvidia,tegra20-emc";
 		reg = <0x7000f400 0x200>;
 		#address-cells = <1>;
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index 283fa1d804f..45ceeb0e93e 100644
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,15 +1,15 @@
 config ARM_GIC
+	bool
 	select IRQ_DOMAIN
 	select MULTI_IRQ_HANDLER
-	bool
 
 config GIC_NON_BANKED
 	bool
 
 config ARM_VIC
+	bool
 	select IRQ_DOMAIN
 	select MULTI_IRQ_HANDLER
-	bool
 
 config ARM_VIC_NR
 	int
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index c4110d1b1f2..001f4913799 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -284,11 +284,17 @@ int dma_set_coherent_mask(struct device *dev, u64 mask)
 
 int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
 {
-	it8152_io.start = IT8152_IO_BASE + 0x12000;
-	it8152_io.end	= IT8152_IO_BASE + 0x12000 + 0x100000;
+	/*
+	 * FIXME: use pci_ioremap_io to remap the IO space here and
+	 * move over to the generic io.h implementation.
+	 * This requires solving the same problem for PXA PCMCIA
+	 * support.
+	 */
+	it8152_io.start = (unsigned long)IT8152_IO_BASE + 0x12000;
+	it8152_io.end	= (unsigned long)IT8152_IO_BASE + 0x12000 + 0x100000;
 
 	sys->mem_offset = 0x10000000;
-	sys->io_offset  = IT8152_IO_BASE;
+	sys->io_offset  = (unsigned long)IT8152_IO_BASE;
 
 	if (request_resource(&ioport_resource, &it8152_io)) {
 		printk(KERN_ERR "PCI: unable to allocate IO region\n");
diff --git a/arch/arm/configs/cam60_defconfig b/arch/arm/configs/cam60_defconfig
index cedc92ef88a..14579711d8f 100644
--- a/arch/arm/configs/cam60_defconfig
+++ b/arch/arm/configs/cam60_defconfig
@@ -49,7 +49,6 @@ CONFIG_MTD_COMPLEX_MAPPINGS=y
 CONFIG_MTD_PLATRAM=m
 CONFIG_MTD_DATAFLASH=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_ATMEL=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig
index e53c4756384..4b8a25d9e68 100644
--- a/arch/arm/configs/corgi_defconfig
+++ b/arch/arm/configs/corgi_defconfig
@@ -97,7 +97,6 @@ CONFIG_MTD_BLOCK=y
 CONFIG_MTD_ROM=y
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_SHARPSL=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_IDE=y
diff --git a/arch/arm/configs/ep93xx_defconfig b/arch/arm/configs/ep93xx_defconfig
index 8e97b2f7cee..806005a4c4c 100644
--- a/arch/arm/configs/ep93xx_defconfig
+++ b/arch/arm/configs/ep93xx_defconfig
@@ -61,7 +61,6 @@ CONFIG_MTD_CFI_STAA=y
 CONFIG_MTD_ROM=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_SCSI=y
diff --git a/arch/arm/configs/mini2440_defconfig b/arch/arm/configs/mini2440_defconfig
index 082175c54e7..00630e6af45 100644
--- a/arch/arm/configs/mini2440_defconfig
+++ b/arch/arm/configs/mini2440_defconfig
@@ -102,7 +102,6 @@ CONFIG_MTD_CFI_STAA=y
 CONFIG_MTD_RAM=y
 CONFIG_MTD_ROM=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_S3C2410=y
 CONFIG_MTD_NAND_PLATFORM=y
 CONFIG_MTD_LPDDR=y
diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig
index 7305ebddb51..1f08219c1b3 100644
--- a/arch/arm/configs/mv78xx0_defconfig
+++ b/arch/arm/configs/mv78xx0_defconfig
@@ -49,7 +49,6 @@ CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_ORION=y
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_SCSI_PROC_FS is not set
diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig
index bf123c5384d..240b25eea56 100644
--- a/arch/arm/configs/nhk8815_defconfig
+++ b/arch/arm/configs/nhk8815_defconfig
@@ -57,7 +57,6 @@ CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_ECC_SMC=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_NOMADIK=y
 CONFIG_MTD_ONENAND=y
 CONFIG_MTD_ONENAND_VERIFY_WRITE=y
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index a288d703395..cd5e6ba9a54 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -72,7 +72,6 @@ CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_PLATFORM=y
 CONFIG_MTD_NAND_ORION=y
 CONFIG_BLK_DEV_LOOP=y
diff --git a/arch/arm/configs/pxa3xx_defconfig b/arch/arm/configs/pxa3xx_defconfig
index 1677a0607ca..60e313834b3 100644
--- a/arch/arm/configs/pxa3xx_defconfig
+++ b/arch/arm/configs/pxa3xx_defconfig
@@ -36,7 +36,6 @@ CONFIG_MTD_CONCAT=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_PXA3xx=y
 CONFIG_MTD_NAND_PXA3xx_BUILTIN=y
 CONFIG_MTD_ONENAND=y
diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig
index 70158273c6d..df77931a432 100644
--- a/arch/arm/configs/spitz_defconfig
+++ b/arch/arm/configs/spitz_defconfig
@@ -94,7 +94,6 @@ CONFIG_MTD_BLOCK=y
 CONFIG_MTD_ROM=y
 CONFIG_MTD_COMPLEX_MAPPINGS=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_SHARPSL=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_IDE=y
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index 8a7196ca510..f70ae175a3d 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -1,6 +1,4 @@
-include include/asm-generic/Kbuild.asm
 
-header-y += hwcap.h
 
 generic-y += auxvec.h
 generic-y += bitsperlong.h
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 5c8b3bf4d82..2ef95813fce 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -22,6 +22,7 @@
 
 #include <asm/ptrace.h>
 #include <asm/domain.h>
+#include <asm/opcodes-virt.h>
 
 #define IOMEM(x)	(x)
 
@@ -240,6 +241,34 @@
 #endif
 
 /*
+ * Helper macro to enter SVC mode cleanly and mask interrupts. reg is
+ * a scratch register for the macro to overwrite.
+ *
+ * This macro is intended for forcing the CPU into SVC mode at boot time.
+ * you cannot return to the original mode.
+ *
+ * Beware, it also clobers LR.
+ */
+.macro safe_svcmode_maskall reg:req
+	mrs	\reg , cpsr
+	mov	lr , \reg
+	and	lr , lr , #MODE_MASK
+	cmp	lr , #HYP_MODE
+	orr	\reg , \reg , #PSR_I_BIT | PSR_F_BIT
+	bic	\reg , \reg , #MODE_MASK
+	orr	\reg , \reg , #SVC_MODE
+THUMB(	orr	\reg , \reg , #PSR_T_BIT	)
+	bne	1f
+	orr	\reg, \reg, #PSR_A_BIT
+	adr	lr, BSYM(2f)
+	msr	spsr_cxsf, \reg
+	__MSR_ELR_HYP(14)
+	__ERET
+1:	msr	cpsr_c, \reg
+2:
+.endm
+
+/*
  * STRT/LDRT access macros with ARM and Thumb-2 variants
  */
 #ifdef CONFIG_THUMB2_KERNEL
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index e4448e16046..e1489c54cd1 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -49,6 +49,13 @@
  *
  *		Unconditionally clean and invalidate the entire cache.
  *
+ *     flush_kern_louis()
+ *
+ *             Flush data cache levels up to the level of unification
+ *             inner shareable and invalidate the I-cache.
+ *             Only needed from v7 onwards, falls back to flush_cache_all()
+ *             for all other processor versions.
+ *
  *	flush_user_all()
  *
  *		Clean and invalidate all user space cache entries
@@ -97,6 +104,7 @@
 struct cpu_cache_fns {
 	void (*flush_icache_all)(void);
 	void (*flush_kern_all)(void);
+	void (*flush_kern_louis)(void);
 	void (*flush_user_all)(void);
 	void (*flush_user_range)(unsigned long, unsigned long, unsigned int);
 
@@ -119,6 +127,7 @@ extern struct cpu_cache_fns cpu_cache;
 
 #define __cpuc_flush_icache_all		cpu_cache.flush_icache_all
 #define __cpuc_flush_kern_all		cpu_cache.flush_kern_all
+#define __cpuc_flush_kern_louis		cpu_cache.flush_kern_louis
 #define __cpuc_flush_user_all		cpu_cache.flush_user_all
 #define __cpuc_flush_user_range		cpu_cache.flush_user_range
 #define __cpuc_coherent_kern_range	cpu_cache.coherent_kern_range
@@ -139,6 +148,7 @@ extern struct cpu_cache_fns cpu_cache;
 
 extern void __cpuc_flush_icache_all(void);
 extern void __cpuc_flush_kern_all(void);
+extern void __cpuc_flush_kern_louis(void);
 extern void __cpuc_flush_user_all(void);
 extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int);
 extern void __cpuc_coherent_kern_range(unsigned long, unsigned long);
@@ -204,6 +214,11 @@ static inline void __flush_icache_all(void)
 	__flush_icache_preferred();
 }
 
+/*
+ * Flush caches up to Level of Unification Inner Shareable
+ */
+#define flush_cache_louis()		__cpuc_flush_kern_louis()
+
 #define flush_cache_all()		__cpuc_flush_kern_all()
 
 static inline void vivt_flush_cache_mm(struct mm_struct *mm)
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index 4f8d2c0dc44..cca9f15704e 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -132,6 +132,7 @@
 #ifndef MULTI_CACHE
 #define __cpuc_flush_icache_all		__glue(_CACHE,_flush_icache_all)
 #define __cpuc_flush_kern_all		__glue(_CACHE,_flush_kern_cache_all)
+#define __cpuc_flush_kern_louis		__glue(_CACHE,_flush_kern_cache_louis)
 #define __cpuc_flush_user_all		__glue(_CACHE,_flush_user_cache_all)
 #define __cpuc_flush_user_range		__glue(_CACHE,_flush_user_cache_range)
 #define __cpuc_coherent_kern_range	__glue(_CACHE,_coherent_kern_range)
diff --git a/arch/arm/include/asm/hwcap.h b/arch/arm/include/asm/hwcap.h
index 917626128a1..6ff56eca3f1 100644
--- a/arch/arm/include/asm/hwcap.h
+++ b/arch/arm/include/asm/hwcap.h
@@ -1,31 +1,8 @@
 #ifndef __ASMARM_HWCAP_H
 #define __ASMARM_HWCAP_H
 
-/*
- * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
- */
-#define HWCAP_SWP	(1 << 0)
-#define HWCAP_HALF	(1 << 1)
-#define HWCAP_THUMB	(1 << 2)
-#define HWCAP_26BIT	(1 << 3)	/* Play it safe */
-#define HWCAP_FAST_MULT	(1 << 4)
-#define HWCAP_FPA	(1 << 5)
-#define HWCAP_VFP	(1 << 6)
-#define HWCAP_EDSP	(1 << 7)
-#define HWCAP_JAVA	(1 << 8)
-#define HWCAP_IWMMXT	(1 << 9)
-#define HWCAP_CRUNCH	(1 << 10)
-#define HWCAP_THUMBEE	(1 << 11)
-#define HWCAP_NEON	(1 << 12)
-#define HWCAP_VFPv3	(1 << 13)
-#define HWCAP_VFPv3D16	(1 << 14)
-#define HWCAP_TLS	(1 << 15)
-#define HWCAP_VFPv4	(1 << 16)
-#define HWCAP_IDIVA	(1 << 17)
-#define HWCAP_IDIVT	(1 << 18)
-#define HWCAP_IDIV	(HWCAP_IDIVA | HWCAP_IDIVT)
+#include <uapi/asm/hwcap.h>
 
-#if defined(__KERNEL__)
 #if !defined(__ASSEMBLY__)
 /*
  * This yields a mask that user programs can use to figure out what
@@ -35,5 +12,3 @@
 extern unsigned int elf_hwcap;
 #endif
 #endif
-
-#endif
diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h
index 6c6809f982f..0d3a28dbc8e 100644
--- a/arch/arm/include/asm/module.h
+++ b/arch/arm/include/asm/module.h
@@ -1,9 +1,7 @@
 #ifndef _ASM_ARM_MODULE_H
 #define _ASM_ARM_MODULE_H
 
-#define Elf_Shdr	Elf32_Shdr
-#define Elf_Sym		Elf32_Sym
-#define Elf_Ehdr	Elf32_Ehdr
+#include <asm-generic/module.h>
 
 struct unwind_table;
 
@@ -16,13 +14,11 @@ enum {
 	ARM_SEC_DEVEXIT,
 	ARM_SEC_MAX,
 };
-#endif
 
 struct mod_arch_specific {
-#ifdef CONFIG_ARM_UNWIND
 	struct unwind_table *unwind[ARM_SEC_MAX];
-#endif
 };
+#endif
 
 /*
  * Add the ARM architecture version to the version magic string
diff --git a/arch/arm/include/asm/opcodes-virt.h b/arch/arm/include/asm/opcodes-virt.h
index b85665a96f8..efcfdf92d9d 100644
--- a/arch/arm/include/asm/opcodes-virt.h
+++ b/arch/arm/include/asm/opcodes-virt.h
@@ -26,4 +26,14 @@
 	0xF7E08000 | (((imm16) & 0xF000) << 4) | ((imm16) & 0x0FFF)	\
 )
 
+#define __ERET	__inst_arm_thumb32(					\
+	0xE160006E,							\
+	0xF3DE8F00							\
+)
+
+#define __MSR_ELR_HYP(regnum)	__inst_arm_thumb32(			\
+	0xE12EF300 | regnum,						\
+	0xF3808E30 | (regnum << 16)					\
+)
+
 #endif /* ! __ASM_ARM_OPCODES_VIRT_H */
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 99afa749826..06e7d509eaa 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -85,11 +85,6 @@ unsigned long get_wchan(struct task_struct *p);
 #define cpu_relax()			barrier()
 #endif
 
-/*
- * Create a new kernel thread
- */
-extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
-
 #define task_pt_regs(p) \
 	((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
 
diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index 355ece523f4..3d52ee1bfb3 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -10,132 +10,12 @@
 #ifndef __ASM_ARM_PTRACE_H
 #define __ASM_ARM_PTRACE_H
 
-#include <asm/hwcap.h>
-
-#define PTRACE_GETREGS		12
-#define PTRACE_SETREGS		13
-#define PTRACE_GETFPREGS	14
-#define PTRACE_SETFPREGS	15
-/* PTRACE_ATTACH is 16 */
-/* PTRACE_DETACH is 17 */
-#define PTRACE_GETWMMXREGS	18
-#define PTRACE_SETWMMXREGS	19
-/* 20 is unused */
-#define PTRACE_OLDSETOPTIONS	21
-#define PTRACE_GET_THREAD_AREA	22
-#define PTRACE_SET_SYSCALL	23
-/* PTRACE_SYSCALL is 24 */
-#define PTRACE_GETCRUNCHREGS	25
-#define PTRACE_SETCRUNCHREGS	26
-#define PTRACE_GETVFPREGS	27
-#define PTRACE_SETVFPREGS	28
-#define PTRACE_GETHBPREGS	29
-#define PTRACE_SETHBPREGS	30
-
-/*
- * PSR bits
- */
-#define USR26_MODE	0x00000000
-#define FIQ26_MODE	0x00000001
-#define IRQ26_MODE	0x00000002
-#define SVC26_MODE	0x00000003
-#define USR_MODE	0x00000010
-#define FIQ_MODE	0x00000011
-#define IRQ_MODE	0x00000012
-#define SVC_MODE	0x00000013
-#define ABT_MODE	0x00000017
-#define UND_MODE	0x0000001b
-#define SYSTEM_MODE	0x0000001f
-#define MODE32_BIT	0x00000010
-#define MODE_MASK	0x0000001f
-#define PSR_T_BIT	0x00000020
-#define PSR_F_BIT	0x00000040
-#define PSR_I_BIT	0x00000080
-#define PSR_A_BIT	0x00000100
-#define PSR_E_BIT	0x00000200
-#define PSR_J_BIT	0x01000000
-#define PSR_Q_BIT	0x08000000
-#define PSR_V_BIT	0x10000000
-#define PSR_C_BIT	0x20000000
-#define PSR_Z_BIT	0x40000000
-#define PSR_N_BIT	0x80000000
-
-/*
- * Groups of PSR bits
- */
-#define PSR_f		0xff000000	/* Flags		*/
-#define PSR_s		0x00ff0000	/* Status		*/
-#define PSR_x		0x0000ff00	/* Extension		*/
-#define PSR_c		0x000000ff	/* Control		*/
-
-/*
- * ARMv7 groups of PSR bits
- */
-#define APSR_MASK	0xf80f0000	/* N, Z, C, V, Q and GE flags */
-#define PSR_ISET_MASK	0x01000010	/* ISA state (J, T) mask */
-#define PSR_IT_MASK	0x0600fc00	/* If-Then execution state mask */
-#define PSR_ENDIAN_MASK	0x00000200	/* Endianness state mask */
-
-/*
- * Default endianness state
- */
-#ifdef CONFIG_CPU_ENDIAN_BE8
-#define PSR_ENDSTATE	PSR_E_BIT
-#else
-#define PSR_ENDSTATE	0
-#endif
-
-/* 
- * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
- * process is located in memory.
- */
-#define PT_TEXT_ADDR		0x10000
-#define PT_DATA_ADDR		0x10004
-#define PT_TEXT_END_ADDR	0x10008
+#include <uapi/asm/ptrace.h>
 
 #ifndef __ASSEMBLY__
-
-/*
- * This struct defines the way the registers are stored on the
- * stack during a system call.  Note that sizeof(struct pt_regs)
- * has to be a multiple of 8.
- */
-#ifndef __KERNEL__
-struct pt_regs {
-	long uregs[18];
-};
-#else /* __KERNEL__ */
 struct pt_regs {
 	unsigned long uregs[18];
 };
-#endif /* __KERNEL__ */
-
-#define ARM_cpsr	uregs[16]
-#define ARM_pc		uregs[15]
-#define ARM_lr		uregs[14]
-#define ARM_sp		uregs[13]
-#define ARM_ip		uregs[12]
-#define ARM_fp		uregs[11]
-#define ARM_r10		uregs[10]
-#define ARM_r9		uregs[9]
-#define ARM_r8		uregs[8]
-#define ARM_r7		uregs[7]
-#define ARM_r6		uregs[6]
-#define ARM_r5		uregs[5]
-#define ARM_r4		uregs[4]
-#define ARM_r3		uregs[3]
-#define ARM_r2		uregs[2]
-#define ARM_r1		uregs[1]
-#define ARM_r0		uregs[0]
-#define ARM_ORIG_r0	uregs[17]
-
-/*
- * The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
- * and core dumps.
- */
-#define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ )
-
-#ifdef __KERNEL__
 
 #define user_mode(regs)	\
 	(((regs)->ARM_cpsr & 0xf) == 0)
@@ -254,9 +134,10 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
 	return regs->ARM_sp;
 }
 
-#endif /* __KERNEL__ */
+#define current_pt_regs(void) ({				\
+	register unsigned long sp asm ("sp");			\
+	(struct pt_regs *)((sp | (THREAD_SIZE - 1)) - 7) - 1;	\
+})
 
 #endif /* __ASSEMBLY__ */
-
 #endif
-
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 24d284a1bfc..c50f0560950 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -14,176 +14,8 @@
 #ifndef __ASMARM_SETUP_H
 #define __ASMARM_SETUP_H
 
-#include <linux/types.h>
+#include <uapi/asm/setup.h>
 
-#define COMMAND_LINE_SIZE 1024
-
-/* The list ends with an ATAG_NONE node. */
-#define ATAG_NONE	0x00000000
-
-struct tag_header {
-	__u32 size;
-	__u32 tag;
-};
-
-/* The list must start with an ATAG_CORE node */
-#define ATAG_CORE	0x54410001
-
-struct tag_core {
-	__u32 flags;		/* bit 0 = read-only */
-	__u32 pagesize;
-	__u32 rootdev;
-};
-
-/* it is allowed to have multiple ATAG_MEM nodes */
-#define ATAG_MEM	0x54410002
-
-struct tag_mem32 {
-	__u32	size;
-	__u32	start;	/* physical start address */
-};
-
-/* VGA text type displays */
-#define ATAG_VIDEOTEXT	0x54410003
-
-struct tag_videotext {
-	__u8		x;
-	__u8		y;
-	__u16		video_page;
-	__u8		video_mode;
-	__u8		video_cols;
-	__u16		video_ega_bx;
-	__u8		video_lines;
-	__u8		video_isvga;
-	__u16		video_points;
-};
-
-/* describes how the ramdisk will be used in kernel */
-#define ATAG_RAMDISK	0x54410004
-
-struct tag_ramdisk {
-	__u32 flags;	/* bit 0 = load, bit 1 = prompt */
-	__u32 size;	/* decompressed ramdisk size in _kilo_ bytes */
-	__u32 start;	/* starting block of floppy-based RAM disk image */
-};
-
-/* describes where the compressed ramdisk image lives (virtual address) */
-/*
- * this one accidentally used virtual addresses - as such,
- * it's deprecated.
- */
-#define ATAG_INITRD	0x54410005
-
-/* describes where the compressed ramdisk image lives (physical address) */
-#define ATAG_INITRD2	0x54420005
-
-struct tag_initrd {
-	__u32 start;	/* physical start address */
-	__u32 size;	/* size of compressed ramdisk image in bytes */
-};
-
-/* board serial number. "64 bits should be enough for everybody" */
-#define ATAG_SERIAL	0x54410006
-
-struct tag_serialnr {
-	__u32 low;
-	__u32 high;
-};
-
-/* board revision */
-#define ATAG_REVISION	0x54410007
-
-struct tag_revision {
-	__u32 rev;
-};
-
-/* initial values for vesafb-type framebuffers. see struct screen_info
- * in include/linux/tty.h
- */
-#define ATAG_VIDEOLFB	0x54410008
-
-struct tag_videolfb {
-	__u16		lfb_width;
-	__u16		lfb_height;
-	__u16		lfb_depth;
-	__u16		lfb_linelength;
-	__u32		lfb_base;
-	__u32		lfb_size;
-	__u8		red_size;
-	__u8		red_pos;
-	__u8		green_size;
-	__u8		green_pos;
-	__u8		blue_size;
-	__u8		blue_pos;
-	__u8		rsvd_size;
-	__u8		rsvd_pos;
-};
-
-/* command line: \0 terminated string */
-#define ATAG_CMDLINE	0x54410009
-
-struct tag_cmdline {
-	char	cmdline[1];	/* this is the minimum size */
-};
-
-/* acorn RiscPC specific information */
-#define ATAG_ACORN	0x41000101
-
-struct tag_acorn {
-	__u32 memc_control_reg;
-	__u32 vram_pages;
-	__u8 sounddefault;
-	__u8 adfsdrives;
-};
-
-/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
-#define ATAG_MEMCLK	0x41000402
-
-struct tag_memclk {
-	__u32 fmemclk;
-};
-
-struct tag {
-	struct tag_header hdr;
-	union {
-		struct tag_core		core;
-		struct tag_mem32	mem;
-		struct tag_videotext	videotext;
-		struct tag_ramdisk	ramdisk;
-		struct tag_initrd	initrd;
-		struct tag_serialnr	serialnr;
-		struct tag_revision	revision;
-		struct tag_videolfb	videolfb;
-		struct tag_cmdline	cmdline;
-
-		/*
-		 * Acorn specific
-		 */
-		struct tag_acorn	acorn;
-
-		/*
-		 * DC21285 specific
-		 */
-		struct tag_memclk	memclk;
-	} u;
-};
-
-struct tagtable {
-	__u32 tag;
-	int (*parse)(const struct tag *);
-};
-
-#define tag_member_present(tag,member)				\
-	((unsigned long)(&((struct tag *)0L)->member + 1)	\
-		<= (tag)->hdr.size * 4)
-
-#define tag_next(t)	((struct tag *)((__u32 *)(t) + (t)->hdr.size))
-#define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
-
-#define for_each_tag(t,base)		\
-	for (t = base; t->hdr.size; t = tag_next(t))
-
-#ifdef __KERNEL__
 
 #define __tag __used __attribute__((__section__(".taglist.init")))
 #define __tagtable(tag, fn) \
@@ -221,6 +53,4 @@ extern int arm_add_memory(phys_addr_t start, phys_addr_t size);
 extern void early_print(const char *str, ...);
 extern void dump_machine_table(void);
 
-#endif  /*  __KERNEL__  */
-
 #endif
diff --git a/arch/arm/include/asm/signal.h b/arch/arm/include/asm/signal.h
index 43ba0fb1c8a..5a7963dbd3f 100644
--- a/arch/arm/include/asm/signal.h
+++ b/arch/arm/include/asm/signal.h
@@ -1,12 +1,8 @@
 #ifndef _ASMARM_SIGNAL_H
 #define _ASMARM_SIGNAL_H
 
-#include <linux/types.h>
+#include <uapi/asm/signal.h>
 
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-#ifdef __KERNEL__
 /* Most things should be clean enough to redefine this at will, if care
    is taken to make libc match.  */
 
@@ -20,100 +16,6 @@ typedef struct {
 	unsigned long sig[_NSIG_WORDS];
 } sigset_t;
 
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-#define NSIG		32
-typedef unsigned long sigset_t;
-
-#endif /* __KERNEL__ */
-
-#define SIGHUP		 1
-#define SIGINT		 2
-#define SIGQUIT		 3
-#define SIGILL		 4
-#define SIGTRAP		 5
-#define SIGABRT		 6
-#define SIGIOT		 6
-#define SIGBUS		 7
-#define SIGFPE		 8
-#define SIGKILL		 9
-#define SIGUSR1		10
-#define SIGSEGV		11
-#define SIGUSR2		12
-#define SIGPIPE		13
-#define SIGALRM		14
-#define SIGTERM		15
-#define SIGSTKFLT	16
-#define SIGCHLD		17
-#define SIGCONT		18
-#define SIGSTOP		19
-#define SIGTSTP		20
-#define SIGTTIN		21
-#define SIGTTOU		22
-#define SIGURG		23
-#define SIGXCPU		24
-#define SIGXFSZ		25
-#define SIGVTALRM	26
-#define SIGPROF		27
-#define SIGWINCH	28
-#define SIGIO		29
-#define SIGPOLL		SIGIO
-/*
-#define SIGLOST		29
-*/
-#define SIGPWR		30
-#define SIGSYS		31
-#define	SIGUNUSED	31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN	32
-#define SIGRTMAX	_NSIG
-
-#define SIGSWI		32
-
-/*
- * SA_FLAGS values:
- *
- * SA_NOCLDSTOP		flag to turn off SIGCHLD when children stop.
- * SA_NOCLDWAIT		flag on SIGCHLD to inhibit zombies.
- * SA_SIGINFO		deliver the signal with SIGINFO structs
- * SA_THIRTYTWO		delivers the signal in 32-bit mode, even if the task 
- *			is running in 26-bit.
- * SA_ONSTACK		allows alternate signal stacks (see sigaltstack(2)).
- * SA_RESTART		flag to get restarting signals (which were the default long ago)
- * SA_NODEFER		prevents the current signal from being masked in the handler.
- * SA_RESETHAND		clears the handler when the signal is delivered.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP	0x00000001
-#define SA_NOCLDWAIT	0x00000002
-#define SA_SIGINFO	0x00000004
-#define SA_THIRTYTWO	0x02000000
-#define SA_RESTORER	0x04000000
-#define SA_ONSTACK	0x08000000
-#define SA_RESTART	0x10000000
-#define SA_NODEFER	0x40000000
-#define SA_RESETHAND	0x80000000
-
-#define SA_NOMASK	SA_NODEFER
-#define SA_ONESHOT	SA_RESETHAND
-
-
-/* 
- * sigaltstack controls
- */
-#define SS_ONSTACK	1
-#define SS_DISABLE	2
-
-#define MINSIGSTKSZ	2048
-#define SIGSTKSZ	8192
-
-#include <asm-generic/signal-defs.h>
-
-#ifdef __KERNEL__
 struct old_sigaction {
 	__sighandler_t sa_handler;
 	old_sigset_t sa_mask;
@@ -132,33 +34,6 @@ struct k_sigaction {
 	struct sigaction sa;
 };
 
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-struct sigaction {
-	union {
-	  __sighandler_t _sa_handler;
-	  void (*_sa_sigaction)(int, struct siginfo *, void *);
-	} _u;
-	sigset_t sa_mask;
-	unsigned long sa_flags;
-	void (*sa_restorer)(void);
-};
-
-#define sa_handler	_u._sa_handler
-#define sa_sigaction	_u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
-typedef struct sigaltstack {
-	void __user *ss_sp;
-	int ss_flags;
-	size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
 #include <asm/sigcontext.h>
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 #endif
-
-#endif
diff --git a/arch/arm/include/asm/swab.h b/arch/arm/include/asm/swab.h
index b859d82e30c..537fc9b9188 100644
--- a/arch/arm/include/asm/swab.h
+++ b/arch/arm/include/asm/swab.h
@@ -15,14 +15,8 @@
 #ifndef __ASM_ARM_SWAB_H
 #define __ASM_ARM_SWAB_H
 
-#include <linux/compiler.h>
-#include <linux/types.h>
+#include <uapi/asm/swab.h>
 
-#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
-#  define __SWAB_64_THRU_32__
-#endif
-
-#if defined(__KERNEL__)
 #if __LINUX_ARM_ARCH__ >= 6
 
 static inline __attribute_const__ __u32 __arch_swahb32(__u32 x)
@@ -42,32 +36,3 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
 
 #endif
 #endif
-
-#if !defined(__KERNEL__) || __LINUX_ARM_ARCH__ < 6
-static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
-{
-	__u32 t;
-
-#ifndef __thumb__
-	if (!__builtin_constant_p(x)) {
-		/*
-		 * The compiler needs a bit of a hint here to always do the
-		 * right thing and not screw it up to different degrees
-		 * depending on the gcc version.
-		 */
-		asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
-	} else
-#endif
-		t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
-
-	x = (x << 24) | (x >> 8);		/* mov r0,r0,ror #8      */
-	t &= ~0x00FF0000;			/* bic r1,r1,#0x00FF0000 */
-	x ^= (t >> 8);				/* eor r0,r0,r1,lsr #8   */
-
-	return x;
-}
-#define __arch_swab32 __arch_swab32
-
-#endif
-
-#endif
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 74542c52f9b..368165e33c1 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -2,7 +2,6 @@
 #include <asm/barrier.h>
 #include <asm/compiler.h>
 #include <asm/cmpxchg.h>
-#include <asm/exec.h>
 #include <asm/switch_to.h>
 #include <asm/system_info.h>
 #include <asm/system_misc.h>
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index f71cdab18b8..8477b4c1d39 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -151,7 +151,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
 #define TIF_SYSCALL_TRACE	8
 #define TIF_SYSCALL_AUDIT	9
 #define TIF_SYSCALL_TRACEPOINT	10
-#define TIF_POLLING_NRFLAG	16
 #define TIF_USING_IWMMXT	17
 #define TIF_MEMDIE		18	/* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK	20
@@ -164,7 +163,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
 #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
 #define _TIF_SYSCALL_AUDIT	(1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SYSCALL_TRACEPOINT	(1 << TIF_SYSCALL_TRACEPOINT)
-#define _TIF_POLLING_NRFLAG	(1 << TIF_POLLING_NRFLAG)
 #define _TIF_USING_IWMMXT	(1 << TIF_USING_IWMMXT)
 #define _TIF_SECCOMP		(1 << TIF_SECCOMP)
 
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index d9ff5cc3a50..8f60b6e6bd4 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -13,447 +13,10 @@
 #ifndef __ASM_ARM_UNISTD_H
 #define __ASM_ARM_UNISTD_H
 
-#define __NR_OABI_SYSCALL_BASE	0x900000
+#include <uapi/asm/unistd.h>
 
-#if defined(__thumb__) || defined(__ARM_EABI__)
-#define __NR_SYSCALL_BASE	0
-#else
-#define __NR_SYSCALL_BASE	__NR_OABI_SYSCALL_BASE
-#endif
-
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall		(__NR_SYSCALL_BASE+  0)
-#define __NR_exit			(__NR_SYSCALL_BASE+  1)
-#define __NR_fork			(__NR_SYSCALL_BASE+  2)
-#define __NR_read			(__NR_SYSCALL_BASE+  3)
-#define __NR_write			(__NR_SYSCALL_BASE+  4)
-#define __NR_open			(__NR_SYSCALL_BASE+  5)
-#define __NR_close			(__NR_SYSCALL_BASE+  6)
-					/* 7 was sys_waitpid */
-#define __NR_creat			(__NR_SYSCALL_BASE+  8)
-#define __NR_link			(__NR_SYSCALL_BASE+  9)
-#define __NR_unlink			(__NR_SYSCALL_BASE+ 10)
-#define __NR_execve			(__NR_SYSCALL_BASE+ 11)
-#define __NR_chdir			(__NR_SYSCALL_BASE+ 12)
-#define __NR_time			(__NR_SYSCALL_BASE+ 13)
-#define __NR_mknod			(__NR_SYSCALL_BASE+ 14)
-#define __NR_chmod			(__NR_SYSCALL_BASE+ 15)
-#define __NR_lchown			(__NR_SYSCALL_BASE+ 16)
-					/* 17 was sys_break */
-					/* 18 was sys_stat */
-#define __NR_lseek			(__NR_SYSCALL_BASE+ 19)
-#define __NR_getpid			(__NR_SYSCALL_BASE+ 20)
-#define __NR_mount			(__NR_SYSCALL_BASE+ 21)
-#define __NR_umount			(__NR_SYSCALL_BASE+ 22)
-#define __NR_setuid			(__NR_SYSCALL_BASE+ 23)
-#define __NR_getuid			(__NR_SYSCALL_BASE+ 24)
-#define __NR_stime			(__NR_SYSCALL_BASE+ 25)
-#define __NR_ptrace			(__NR_SYSCALL_BASE+ 26)
-#define __NR_alarm			(__NR_SYSCALL_BASE+ 27)
-					/* 28 was sys_fstat */
-#define __NR_pause			(__NR_SYSCALL_BASE+ 29)
-#define __NR_utime			(__NR_SYSCALL_BASE+ 30)
-					/* 31 was sys_stty */
-					/* 32 was sys_gtty */
-#define __NR_access			(__NR_SYSCALL_BASE+ 33)
-#define __NR_nice			(__NR_SYSCALL_BASE+ 34)
-					/* 35 was sys_ftime */
-#define __NR_sync			(__NR_SYSCALL_BASE+ 36)
-#define __NR_kill			(__NR_SYSCALL_BASE+ 37)
-#define __NR_rename			(__NR_SYSCALL_BASE+ 38)
-#define __NR_mkdir			(__NR_SYSCALL_BASE+ 39)
-#define __NR_rmdir			(__NR_SYSCALL_BASE+ 40)
-#define __NR_dup			(__NR_SYSCALL_BASE+ 41)
-#define __NR_pipe			(__NR_SYSCALL_BASE+ 42)
-#define __NR_times			(__NR_SYSCALL_BASE+ 43)
-					/* 44 was sys_prof */
-#define __NR_brk			(__NR_SYSCALL_BASE+ 45)
-#define __NR_setgid			(__NR_SYSCALL_BASE+ 46)
-#define __NR_getgid			(__NR_SYSCALL_BASE+ 47)
-					/* 48 was sys_signal */
-#define __NR_geteuid			(__NR_SYSCALL_BASE+ 49)
-#define __NR_getegid			(__NR_SYSCALL_BASE+ 50)
-#define __NR_acct			(__NR_SYSCALL_BASE+ 51)
-#define __NR_umount2			(__NR_SYSCALL_BASE+ 52)
-					/* 53 was sys_lock */
-#define __NR_ioctl			(__NR_SYSCALL_BASE+ 54)
-#define __NR_fcntl			(__NR_SYSCALL_BASE+ 55)
-					/* 56 was sys_mpx */
-#define __NR_setpgid			(__NR_SYSCALL_BASE+ 57)
-					/* 58 was sys_ulimit */
-					/* 59 was sys_olduname */
-#define __NR_umask			(__NR_SYSCALL_BASE+ 60)
-#define __NR_chroot			(__NR_SYSCALL_BASE+ 61)
-#define __NR_ustat			(__NR_SYSCALL_BASE+ 62)
-#define __NR_dup2			(__NR_SYSCALL_BASE+ 63)
-#define __NR_getppid			(__NR_SYSCALL_BASE+ 64)
-#define __NR_getpgrp			(__NR_SYSCALL_BASE+ 65)
-#define __NR_setsid			(__NR_SYSCALL_BASE+ 66)
-#define __NR_sigaction			(__NR_SYSCALL_BASE+ 67)
-					/* 68 was sys_sgetmask */
-					/* 69 was sys_ssetmask */
-#define __NR_setreuid			(__NR_SYSCALL_BASE+ 70)
-#define __NR_setregid			(__NR_SYSCALL_BASE+ 71)
-#define __NR_sigsuspend			(__NR_SYSCALL_BASE+ 72)
-#define __NR_sigpending			(__NR_SYSCALL_BASE+ 73)
-#define __NR_sethostname		(__NR_SYSCALL_BASE+ 74)
-#define __NR_setrlimit			(__NR_SYSCALL_BASE+ 75)
-#define __NR_getrlimit			(__NR_SYSCALL_BASE+ 76)	/* Back compat 2GB limited rlimit */
-#define __NR_getrusage			(__NR_SYSCALL_BASE+ 77)
-#define __NR_gettimeofday		(__NR_SYSCALL_BASE+ 78)
-#define __NR_settimeofday		(__NR_SYSCALL_BASE+ 79)
-#define __NR_getgroups			(__NR_SYSCALL_BASE+ 80)
-#define __NR_setgroups			(__NR_SYSCALL_BASE+ 81)
-#define __NR_select			(__NR_SYSCALL_BASE+ 82)
-#define __NR_symlink			(__NR_SYSCALL_BASE+ 83)
-					/* 84 was sys_lstat */
-#define __NR_readlink			(__NR_SYSCALL_BASE+ 85)
-#define __NR_uselib			(__NR_SYSCALL_BASE+ 86)
-#define __NR_swapon			(__NR_SYSCALL_BASE+ 87)
-#define __NR_reboot			(__NR_SYSCALL_BASE+ 88)
-#define __NR_readdir			(__NR_SYSCALL_BASE+ 89)
-#define __NR_mmap			(__NR_SYSCALL_BASE+ 90)
-#define __NR_munmap			(__NR_SYSCALL_BASE+ 91)
-#define __NR_truncate			(__NR_SYSCALL_BASE+ 92)
-#define __NR_ftruncate			(__NR_SYSCALL_BASE+ 93)
-#define __NR_fchmod			(__NR_SYSCALL_BASE+ 94)
-#define __NR_fchown			(__NR_SYSCALL_BASE+ 95)
-#define __NR_getpriority		(__NR_SYSCALL_BASE+ 96)
-#define __NR_setpriority		(__NR_SYSCALL_BASE+ 97)
-					/* 98 was sys_profil */
-#define __NR_statfs			(__NR_SYSCALL_BASE+ 99)
-#define __NR_fstatfs			(__NR_SYSCALL_BASE+100)
-					/* 101 was sys_ioperm */
-#define __NR_socketcall			(__NR_SYSCALL_BASE+102)
-#define __NR_syslog			(__NR_SYSCALL_BASE+103)
-#define __NR_setitimer			(__NR_SYSCALL_BASE+104)
-#define __NR_getitimer			(__NR_SYSCALL_BASE+105)
-#define __NR_stat			(__NR_SYSCALL_BASE+106)
-#define __NR_lstat			(__NR_SYSCALL_BASE+107)
-#define __NR_fstat			(__NR_SYSCALL_BASE+108)
-					/* 109 was sys_uname */
-					/* 110 was sys_iopl */
-#define __NR_vhangup			(__NR_SYSCALL_BASE+111)
-					/* 112 was sys_idle */
-#define __NR_syscall			(__NR_SYSCALL_BASE+113) /* syscall to call a syscall! */
-#define __NR_wait4			(__NR_SYSCALL_BASE+114)
-#define __NR_swapoff			(__NR_SYSCALL_BASE+115)
-#define __NR_sysinfo			(__NR_SYSCALL_BASE+116)
-#define __NR_ipc			(__NR_SYSCALL_BASE+117)
-#define __NR_fsync			(__NR_SYSCALL_BASE+118)
-#define __NR_sigreturn			(__NR_SYSCALL_BASE+119)
-#define __NR_clone			(__NR_SYSCALL_BASE+120)
-#define __NR_setdomainname		(__NR_SYSCALL_BASE+121)
-#define __NR_uname			(__NR_SYSCALL_BASE+122)
-					/* 123 was sys_modify_ldt */
-#define __NR_adjtimex			(__NR_SYSCALL_BASE+124)
-#define __NR_mprotect			(__NR_SYSCALL_BASE+125)
-#define __NR_sigprocmask		(__NR_SYSCALL_BASE+126)
-					/* 127 was sys_create_module */
-#define __NR_init_module		(__NR_SYSCALL_BASE+128)
-#define __NR_delete_module		(__NR_SYSCALL_BASE+129)
-					/* 130 was sys_get_kernel_syms */
-#define __NR_quotactl			(__NR_SYSCALL_BASE+131)
-#define __NR_getpgid			(__NR_SYSCALL_BASE+132)
-#define __NR_fchdir			(__NR_SYSCALL_BASE+133)
-#define __NR_bdflush			(__NR_SYSCALL_BASE+134)
-#define __NR_sysfs			(__NR_SYSCALL_BASE+135)
-#define __NR_personality		(__NR_SYSCALL_BASE+136)
-					/* 137 was sys_afs_syscall */
-#define __NR_setfsuid			(__NR_SYSCALL_BASE+138)
-#define __NR_setfsgid			(__NR_SYSCALL_BASE+139)
-#define __NR__llseek			(__NR_SYSCALL_BASE+140)
-#define __NR_getdents			(__NR_SYSCALL_BASE+141)
-#define __NR__newselect			(__NR_SYSCALL_BASE+142)
-#define __NR_flock			(__NR_SYSCALL_BASE+143)
-#define __NR_msync			(__NR_SYSCALL_BASE+144)
-#define __NR_readv			(__NR_SYSCALL_BASE+145)
-#define __NR_writev			(__NR_SYSCALL_BASE+146)
-#define __NR_getsid			(__NR_SYSCALL_BASE+147)
-#define __NR_fdatasync			(__NR_SYSCALL_BASE+148)
-#define __NR__sysctl			(__NR_SYSCALL_BASE+149)
-#define __NR_mlock			(__NR_SYSCALL_BASE+150)
-#define __NR_munlock			(__NR_SYSCALL_BASE+151)
-#define __NR_mlockall			(__NR_SYSCALL_BASE+152)
-#define __NR_munlockall			(__NR_SYSCALL_BASE+153)
-#define __NR_sched_setparam		(__NR_SYSCALL_BASE+154)
-#define __NR_sched_getparam		(__NR_SYSCALL_BASE+155)
-#define __NR_sched_setscheduler		(__NR_SYSCALL_BASE+156)
-#define __NR_sched_getscheduler		(__NR_SYSCALL_BASE+157)
-#define __NR_sched_yield		(__NR_SYSCALL_BASE+158)
-#define __NR_sched_get_priority_max	(__NR_SYSCALL_BASE+159)
-#define __NR_sched_get_priority_min	(__NR_SYSCALL_BASE+160)
-#define __NR_sched_rr_get_interval	(__NR_SYSCALL_BASE+161)
-#define __NR_nanosleep			(__NR_SYSCALL_BASE+162)
-#define __NR_mremap			(__NR_SYSCALL_BASE+163)
-#define __NR_setresuid			(__NR_SYSCALL_BASE+164)
-#define __NR_getresuid			(__NR_SYSCALL_BASE+165)
-					/* 166 was sys_vm86 */
-					/* 167 was sys_query_module */
-#define __NR_poll			(__NR_SYSCALL_BASE+168)
-#define __NR_nfsservctl			(__NR_SYSCALL_BASE+169)
-#define __NR_setresgid			(__NR_SYSCALL_BASE+170)
-#define __NR_getresgid			(__NR_SYSCALL_BASE+171)
-#define __NR_prctl			(__NR_SYSCALL_BASE+172)
-#define __NR_rt_sigreturn		(__NR_SYSCALL_BASE+173)
-#define __NR_rt_sigaction		(__NR_SYSCALL_BASE+174)
-#define __NR_rt_sigprocmask		(__NR_SYSCALL_BASE+175)
-#define __NR_rt_sigpending		(__NR_SYSCALL_BASE+176)
-#define __NR_rt_sigtimedwait		(__NR_SYSCALL_BASE+177)
-#define __NR_rt_sigqueueinfo		(__NR_SYSCALL_BASE+178)
-#define __NR_rt_sigsuspend		(__NR_SYSCALL_BASE+179)
-#define __NR_pread64			(__NR_SYSCALL_BASE+180)
-#define __NR_pwrite64			(__NR_SYSCALL_BASE+181)
-#define __NR_chown			(__NR_SYSCALL_BASE+182)
-#define __NR_getcwd			(__NR_SYSCALL_BASE+183)
-#define __NR_capget			(__NR_SYSCALL_BASE+184)
-#define __NR_capset			(__NR_SYSCALL_BASE+185)
-#define __NR_sigaltstack		(__NR_SYSCALL_BASE+186)
-#define __NR_sendfile			(__NR_SYSCALL_BASE+187)
-					/* 188 reserved */
-					/* 189 reserved */
-#define __NR_vfork			(__NR_SYSCALL_BASE+190)
-#define __NR_ugetrlimit			(__NR_SYSCALL_BASE+191)	/* SuS compliant getrlimit */
-#define __NR_mmap2			(__NR_SYSCALL_BASE+192)
-#define __NR_truncate64			(__NR_SYSCALL_BASE+193)
-#define __NR_ftruncate64		(__NR_SYSCALL_BASE+194)
-#define __NR_stat64			(__NR_SYSCALL_BASE+195)
-#define __NR_lstat64			(__NR_SYSCALL_BASE+196)
-#define __NR_fstat64			(__NR_SYSCALL_BASE+197)
-#define __NR_lchown32			(__NR_SYSCALL_BASE+198)
-#define __NR_getuid32			(__NR_SYSCALL_BASE+199)
-#define __NR_getgid32			(__NR_SYSCALL_BASE+200)
-#define __NR_geteuid32			(__NR_SYSCALL_BASE+201)
-#define __NR_getegid32			(__NR_SYSCALL_BASE+202)
-#define __NR_setreuid32			(__NR_SYSCALL_BASE+203)
-#define __NR_setregid32			(__NR_SYSCALL_BASE+204)
-#define __NR_getgroups32		(__NR_SYSCALL_BASE+205)
-#define __NR_setgroups32		(__NR_SYSCALL_BASE+206)
-#define __NR_fchown32			(__NR_SYSCALL_BASE+207)
-#define __NR_setresuid32		(__NR_SYSCALL_BASE+208)
-#define __NR_getresuid32		(__NR_SYSCALL_BASE+209)
-#define __NR_setresgid32		(__NR_SYSCALL_BASE+210)
-#define __NR_getresgid32		(__NR_SYSCALL_BASE+211)
-#define __NR_chown32			(__NR_SYSCALL_BASE+212)
-#define __NR_setuid32			(__NR_SYSCALL_BASE+213)
-#define __NR_setgid32			(__NR_SYSCALL_BASE+214)
-#define __NR_setfsuid32			(__NR_SYSCALL_BASE+215)
-#define __NR_setfsgid32			(__NR_SYSCALL_BASE+216)
-#define __NR_getdents64			(__NR_SYSCALL_BASE+217)
-#define __NR_pivot_root			(__NR_SYSCALL_BASE+218)
-#define __NR_mincore			(__NR_SYSCALL_BASE+219)
-#define __NR_madvise			(__NR_SYSCALL_BASE+220)
-#define __NR_fcntl64			(__NR_SYSCALL_BASE+221)
-					/* 222 for tux */
-					/* 223 is unused */
-#define __NR_gettid			(__NR_SYSCALL_BASE+224)
-#define __NR_readahead			(__NR_SYSCALL_BASE+225)
-#define __NR_setxattr			(__NR_SYSCALL_BASE+226)
-#define __NR_lsetxattr			(__NR_SYSCALL_BASE+227)
-#define __NR_fsetxattr			(__NR_SYSCALL_BASE+228)
-#define __NR_getxattr			(__NR_SYSCALL_BASE+229)
-#define __NR_lgetxattr			(__NR_SYSCALL_BASE+230)
-#define __NR_fgetxattr			(__NR_SYSCALL_BASE+231)
-#define __NR_listxattr			(__NR_SYSCALL_BASE+232)
-#define __NR_llistxattr			(__NR_SYSCALL_BASE+233)
-#define __NR_flistxattr			(__NR_SYSCALL_BASE+234)
-#define __NR_removexattr		(__NR_SYSCALL_BASE+235)
-#define __NR_lremovexattr		(__NR_SYSCALL_BASE+236)
-#define __NR_fremovexattr		(__NR_SYSCALL_BASE+237)
-#define __NR_tkill			(__NR_SYSCALL_BASE+238)
-#define __NR_sendfile64			(__NR_SYSCALL_BASE+239)
-#define __NR_futex			(__NR_SYSCALL_BASE+240)
-#define __NR_sched_setaffinity		(__NR_SYSCALL_BASE+241)
-#define __NR_sched_getaffinity		(__NR_SYSCALL_BASE+242)
-#define __NR_io_setup			(__NR_SYSCALL_BASE+243)
-#define __NR_io_destroy			(__NR_SYSCALL_BASE+244)
-#define __NR_io_getevents		(__NR_SYSCALL_BASE+245)
-#define __NR_io_submit			(__NR_SYSCALL_BASE+246)
-#define __NR_io_cancel			(__NR_SYSCALL_BASE+247)
-#define __NR_exit_group			(__NR_SYSCALL_BASE+248)
-#define __NR_lookup_dcookie		(__NR_SYSCALL_BASE+249)
-#define __NR_epoll_create		(__NR_SYSCALL_BASE+250)
-#define __NR_epoll_ctl			(__NR_SYSCALL_BASE+251)
-#define __NR_epoll_wait			(__NR_SYSCALL_BASE+252)
-#define __NR_remap_file_pages		(__NR_SYSCALL_BASE+253)
-					/* 254 for set_thread_area */
-					/* 255 for get_thread_area */
-#define __NR_set_tid_address		(__NR_SYSCALL_BASE+256)
-#define __NR_timer_create		(__NR_SYSCALL_BASE+257)
-#define __NR_timer_settime		(__NR_SYSCALL_BASE+258)
-#define __NR_timer_gettime		(__NR_SYSCALL_BASE+259)
-#define __NR_timer_getoverrun		(__NR_SYSCALL_BASE+260)
-#define __NR_timer_delete		(__NR_SYSCALL_BASE+261)
-#define __NR_clock_settime		(__NR_SYSCALL_BASE+262)
-#define __NR_clock_gettime		(__NR_SYSCALL_BASE+263)
-#define __NR_clock_getres		(__NR_SYSCALL_BASE+264)
-#define __NR_clock_nanosleep		(__NR_SYSCALL_BASE+265)
-#define __NR_statfs64			(__NR_SYSCALL_BASE+266)
-#define __NR_fstatfs64			(__NR_SYSCALL_BASE+267)
-#define __NR_tgkill			(__NR_SYSCALL_BASE+268)
-#define __NR_utimes			(__NR_SYSCALL_BASE+269)
-#define __NR_arm_fadvise64_64		(__NR_SYSCALL_BASE+270)
-#define __NR_pciconfig_iobase		(__NR_SYSCALL_BASE+271)
-#define __NR_pciconfig_read		(__NR_SYSCALL_BASE+272)
-#define __NR_pciconfig_write		(__NR_SYSCALL_BASE+273)
-#define __NR_mq_open			(__NR_SYSCALL_BASE+274)
-#define __NR_mq_unlink			(__NR_SYSCALL_BASE+275)
-#define __NR_mq_timedsend		(__NR_SYSCALL_BASE+276)
-#define __NR_mq_timedreceive		(__NR_SYSCALL_BASE+277)
-#define __NR_mq_notify			(__NR_SYSCALL_BASE+278)
-#define __NR_mq_getsetattr		(__NR_SYSCALL_BASE+279)
-#define __NR_waitid			(__NR_SYSCALL_BASE+280)
-#define __NR_socket			(__NR_SYSCALL_BASE+281)
-#define __NR_bind			(__NR_SYSCALL_BASE+282)
-#define __NR_connect			(__NR_SYSCALL_BASE+283)
-#define __NR_listen			(__NR_SYSCALL_BASE+284)
-#define __NR_accept			(__NR_SYSCALL_BASE+285)
-#define __NR_getsockname		(__NR_SYSCALL_BASE+286)
-#define __NR_getpeername		(__NR_SYSCALL_BASE+287)
-#define __NR_socketpair			(__NR_SYSCALL_BASE+288)
-#define __NR_send			(__NR_SYSCALL_BASE+289)
-#define __NR_sendto			(__NR_SYSCALL_BASE+290)
-#define __NR_recv			(__NR_SYSCALL_BASE+291)
-#define __NR_recvfrom			(__NR_SYSCALL_BASE+292)
-#define __NR_shutdown			(__NR_SYSCALL_BASE+293)
-#define __NR_setsockopt			(__NR_SYSCALL_BASE+294)
-#define __NR_getsockopt			(__NR_SYSCALL_BASE+295)
-#define __NR_sendmsg			(__NR_SYSCALL_BASE+296)
-#define __NR_recvmsg			(__NR_SYSCALL_BASE+297)
-#define __NR_semop			(__NR_SYSCALL_BASE+298)
-#define __NR_semget			(__NR_SYSCALL_BASE+299)
-#define __NR_semctl			(__NR_SYSCALL_BASE+300)
-#define __NR_msgsnd			(__NR_SYSCALL_BASE+301)
-#define __NR_msgrcv			(__NR_SYSCALL_BASE+302)
-#define __NR_msgget			(__NR_SYSCALL_BASE+303)
-#define __NR_msgctl			(__NR_SYSCALL_BASE+304)
-#define __NR_shmat			(__NR_SYSCALL_BASE+305)
-#define __NR_shmdt			(__NR_SYSCALL_BASE+306)
-#define __NR_shmget			(__NR_SYSCALL_BASE+307)
-#define __NR_shmctl			(__NR_SYSCALL_BASE+308)
-#define __NR_add_key			(__NR_SYSCALL_BASE+309)
-#define __NR_request_key		(__NR_SYSCALL_BASE+310)
-#define __NR_keyctl			(__NR_SYSCALL_BASE+311)
-#define __NR_semtimedop			(__NR_SYSCALL_BASE+312)
-#define __NR_vserver			(__NR_SYSCALL_BASE+313)
-#define __NR_ioprio_set			(__NR_SYSCALL_BASE+314)
-#define __NR_ioprio_get			(__NR_SYSCALL_BASE+315)
-#define __NR_inotify_init		(__NR_SYSCALL_BASE+316)
-#define __NR_inotify_add_watch		(__NR_SYSCALL_BASE+317)
-#define __NR_inotify_rm_watch		(__NR_SYSCALL_BASE+318)
-#define __NR_mbind			(__NR_SYSCALL_BASE+319)
-#define __NR_get_mempolicy		(__NR_SYSCALL_BASE+320)
-#define __NR_set_mempolicy		(__NR_SYSCALL_BASE+321)
-#define __NR_openat			(__NR_SYSCALL_BASE+322)
-#define __NR_mkdirat			(__NR_SYSCALL_BASE+323)
-#define __NR_mknodat			(__NR_SYSCALL_BASE+324)
-#define __NR_fchownat			(__NR_SYSCALL_BASE+325)
-#define __NR_futimesat			(__NR_SYSCALL_BASE+326)
-#define __NR_fstatat64			(__NR_SYSCALL_BASE+327)
-#define __NR_unlinkat			(__NR_SYSCALL_BASE+328)
-#define __NR_renameat			(__NR_SYSCALL_BASE+329)
-#define __NR_linkat			(__NR_SYSCALL_BASE+330)
-#define __NR_symlinkat			(__NR_SYSCALL_BASE+331)
-#define __NR_readlinkat			(__NR_SYSCALL_BASE+332)
-#define __NR_fchmodat			(__NR_SYSCALL_BASE+333)
-#define __NR_faccessat			(__NR_SYSCALL_BASE+334)
-#define __NR_pselect6			(__NR_SYSCALL_BASE+335)
-#define __NR_ppoll			(__NR_SYSCALL_BASE+336)
-#define __NR_unshare			(__NR_SYSCALL_BASE+337)
-#define __NR_set_robust_list		(__NR_SYSCALL_BASE+338)
-#define __NR_get_robust_list		(__NR_SYSCALL_BASE+339)
-#define __NR_splice			(__NR_SYSCALL_BASE+340)
-#define __NR_arm_sync_file_range	(__NR_SYSCALL_BASE+341)
-#define __NR_sync_file_range2		__NR_arm_sync_file_range
-#define __NR_tee			(__NR_SYSCALL_BASE+342)
-#define __NR_vmsplice			(__NR_SYSCALL_BASE+343)
-#define __NR_move_pages			(__NR_SYSCALL_BASE+344)
-#define __NR_getcpu			(__NR_SYSCALL_BASE+345)
-#define __NR_epoll_pwait		(__NR_SYSCALL_BASE+346)
-#define __NR_kexec_load			(__NR_SYSCALL_BASE+347)
-#define __NR_utimensat			(__NR_SYSCALL_BASE+348)
-#define __NR_signalfd			(__NR_SYSCALL_BASE+349)
-#define __NR_timerfd_create		(__NR_SYSCALL_BASE+350)
-#define __NR_eventfd			(__NR_SYSCALL_BASE+351)
-#define __NR_fallocate			(__NR_SYSCALL_BASE+352)
-#define __NR_timerfd_settime		(__NR_SYSCALL_BASE+353)
-#define __NR_timerfd_gettime		(__NR_SYSCALL_BASE+354)
-#define __NR_signalfd4			(__NR_SYSCALL_BASE+355)
-#define __NR_eventfd2			(__NR_SYSCALL_BASE+356)
-#define __NR_epoll_create1		(__NR_SYSCALL_BASE+357)
-#define __NR_dup3			(__NR_SYSCALL_BASE+358)
-#define __NR_pipe2			(__NR_SYSCALL_BASE+359)
-#define __NR_inotify_init1		(__NR_SYSCALL_BASE+360)
-#define __NR_preadv			(__NR_SYSCALL_BASE+361)
-#define __NR_pwritev			(__NR_SYSCALL_BASE+362)
-#define __NR_rt_tgsigqueueinfo		(__NR_SYSCALL_BASE+363)
-#define __NR_perf_event_open		(__NR_SYSCALL_BASE+364)
-#define __NR_recvmmsg			(__NR_SYSCALL_BASE+365)
-#define __NR_accept4			(__NR_SYSCALL_BASE+366)
-#define __NR_fanotify_init		(__NR_SYSCALL_BASE+367)
-#define __NR_fanotify_mark		(__NR_SYSCALL_BASE+368)
-#define __NR_prlimit64			(__NR_SYSCALL_BASE+369)
-#define __NR_name_to_handle_at		(__NR_SYSCALL_BASE+370)
-#define __NR_open_by_handle_at		(__NR_SYSCALL_BASE+371)
-#define __NR_clock_adjtime		(__NR_SYSCALL_BASE+372)
-#define __NR_syncfs			(__NR_SYSCALL_BASE+373)
-#define __NR_sendmmsg			(__NR_SYSCALL_BASE+374)
-#define __NR_setns			(__NR_SYSCALL_BASE+375)
-#define __NR_process_vm_readv		(__NR_SYSCALL_BASE+376)
-#define __NR_process_vm_writev		(__NR_SYSCALL_BASE+377)
-					/* 378 for kcmp */
-
-/*
- * This may need to be greater than __NR_last_syscall+1 in order to
- * account for the padding in the syscall table
- */
-#ifdef __KERNEL__
 #define __NR_syscalls  (380)
-#endif /* __KERNEL__ */
-
-/*
- * The following SWIs are ARM private.
- */
-#define __ARM_NR_BASE			(__NR_SYSCALL_BASE+0x0f0000)
-#define __ARM_NR_breakpoint		(__ARM_NR_BASE+1)
-#define __ARM_NR_cacheflush		(__ARM_NR_BASE+2)
-#define __ARM_NR_usr26			(__ARM_NR_BASE+3)
-#define __ARM_NR_usr32			(__ARM_NR_BASE+4)
-#define __ARM_NR_set_tls		(__ARM_NR_BASE+5)
-
-/*
- * *NOTE*: This is a ghost syscall private to the kernel.  Only the
- * __kuser_cmpxchg code in entry-armv.S should be aware of its
- * existence.  Don't ever use this from user code.
- */
-#ifdef __KERNEL__
 #define __ARM_NR_cmpxchg		(__ARM_NR_BASE+0x00fff0)
-#endif
-
-/*
- * The following syscalls are obsolete and no longer available for EABI.
- */
-#if !defined(__KERNEL__)
-#if defined(__ARM_EABI__)
-#undef __NR_time
-#undef __NR_umount
-#undef __NR_stime
-#undef __NR_alarm
-#undef __NR_utime
-#undef __NR_getrlimit
-#undef __NR_select
-#undef __NR_readdir
-#undef __NR_mmap
-#undef __NR_socketcall
-#undef __NR_syscall
-#undef __NR_ipc
-#endif
-#endif
-
-#ifdef __KERNEL__
 
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_GETHOSTNAME
@@ -478,6 +41,7 @@
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_SYS_SOCKETCALL
 #endif
+#define __ARCH_WANT_SYS_EXECVE
 
 /*
  * "Conditional" syscalls
@@ -494,5 +58,4 @@
 #define __IGNORE_migrate_pages
 #define __IGNORE_kcmp
 
-#endif /* __KERNEL__ */
 #endif /* __ASM_ARM_UNISTD_H */
diff --git a/arch/arm/include/asm/vfpmacros.h b/arch/arm/include/asm/vfpmacros.h
index a7aadbd9a6d..6a6f1e485f4 100644
--- a/arch/arm/include/asm/vfpmacros.h
+++ b/arch/arm/include/asm/vfpmacros.h
@@ -28,7 +28,7 @@
 	ldr	\tmp, =elf_hwcap		    @ may not have MVFR regs
 	ldr	\tmp, [\tmp, #0]
 	tst	\tmp, #HWCAP_VFPv3D16
-	ldceq	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d16-d31}
+	ldceql	p11, cr0, [\base],#32*4		    @ FLDMIAD \base!, {d16-d31}
 	addne	\base, \base, #32*4		    @ step over unused register space
 #else
 	VFPFMRX	\tmp, MVFR0			    @ Media and VFP Feature Register 0
@@ -52,7 +52,7 @@
 	ldr	\tmp, =elf_hwcap		    @ may not have MVFR regs
 	ldr	\tmp, [\tmp, #0]
 	tst	\tmp, #HWCAP_VFPv3D16
-	stceq	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d16-d31}
+	stceql	p11, cr0, [\base],#32*4		    @ FSTMIAD \base!, {d16-d31}
 	addne	\base, \base, #32*4		    @ step over unused register space
 #else
 	VFPFMRX	\tmp, MVFR0			    @ Media and VFP Feature Register 0
diff --git a/arch/arm/include/asm/virt.h b/arch/arm/include/asm/virt.h
new file mode 100644
index 00000000000..86164df86cb
--- /dev/null
+++ b/arch/arm/include/asm/virt.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2012 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#ifndef VIRT_H
+#define VIRT_H
+
+#include <asm/ptrace.h>
+
+/*
+ * Flag indicating that the kernel was not entered in the same mode on every
+ * CPU.  The zImage loader stashes this value in an SPSR, so we need an
+ * architecturally defined flag bit here (the N flag, as it happens)
+ */
+#define BOOT_CPU_MODE_MISMATCH (1<<31)
+
+#ifndef __ASSEMBLY__
+
+#ifdef CONFIG_ARM_VIRT_EXT
+/*
+ * __boot_cpu_mode records what mode the primary CPU was booted in.
+ * A correctly-implemented bootloader must start all CPUs in the same mode:
+ * if it fails to do this, the flag BOOT_CPU_MODE_MISMATCH is set to indicate
+ * that some CPU(s) were booted in a different mode.
+ *
+ * This allows the kernel to flag an error when the secondaries have come up.
+ */
+extern int __boot_cpu_mode;
+
+void __hyp_set_vectors(unsigned long phys_vector_base);
+unsigned long __hyp_get_vectors(void);
+#else
+#define __boot_cpu_mode	(SVC_MODE)
+#endif
+
+#ifndef ZIMAGE
+void hyp_mode_check(void);
+
+/* Reports the availability of HYP mode */
+static inline bool is_hyp_mode_available(void)
+{
+	return ((__boot_cpu_mode & MODE_MASK) == HYP_MODE &&
+		!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH));
+}
+
+/* Check if the bootloader has booted CPUs in different modes */
+static inline bool is_hyp_mode_mismatched(void)
+{
+	return !!(__boot_cpu_mode & BOOT_CPU_MODE_MISMATCH);
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* ! VIRT_H */
diff --git a/arch/arm/include/uapi/asm/Kbuild b/arch/arm/include/uapi/asm/Kbuild
index baebb3da1d4..47bcb2d254a 100644
--- a/arch/arm/include/uapi/asm/Kbuild
+++ b/arch/arm/include/uapi/asm/Kbuild
@@ -1,3 +1,19 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += a.out.h
+header-y += byteorder.h
+header-y += fcntl.h
+header-y += hwcap.h
+header-y += ioctls.h
+header-y += kvm_para.h
+header-y += mman.h
+header-y += posix_types.h
+header-y += ptrace.h
+header-y += setup.h
+header-y += sigcontext.h
+header-y += signal.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += unistd.h
diff --git a/arch/arm/include/asm/a.out.h b/arch/arm/include/uapi/asm/a.out.h
index 083894b2e3b..083894b2e3b 100644
--- a/arch/arm/include/asm/a.out.h
+++ b/arch/arm/include/uapi/asm/a.out.h
diff --git a/arch/arm/include/asm/byteorder.h b/arch/arm/include/uapi/asm/byteorder.h
index 77379748b17..77379748b17 100644
--- a/arch/arm/include/asm/byteorder.h
+++ b/arch/arm/include/uapi/asm/byteorder.h
diff --git a/arch/arm/include/asm/fcntl.h b/arch/arm/include/uapi/asm/fcntl.h
index a80b6607b2e..a80b6607b2e 100644
--- a/arch/arm/include/asm/fcntl.h
+++ b/arch/arm/include/uapi/asm/fcntl.h
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
new file mode 100644
index 00000000000..f254f6503cc
--- /dev/null
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -0,0 +1,29 @@
+#ifndef _UAPI__ASMARM_HWCAP_H
+#define _UAPI__ASMARM_HWCAP_H
+
+/*
+ * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
+ */
+#define HWCAP_SWP	(1 << 0)
+#define HWCAP_HALF	(1 << 1)
+#define HWCAP_THUMB	(1 << 2)
+#define HWCAP_26BIT	(1 << 3)	/* Play it safe */
+#define HWCAP_FAST_MULT	(1 << 4)
+#define HWCAP_FPA	(1 << 5)
+#define HWCAP_VFP	(1 << 6)
+#define HWCAP_EDSP	(1 << 7)
+#define HWCAP_JAVA	(1 << 8)
+#define HWCAP_IWMMXT	(1 << 9)
+#define HWCAP_CRUNCH	(1 << 10)
+#define HWCAP_THUMBEE	(1 << 11)
+#define HWCAP_NEON	(1 << 12)
+#define HWCAP_VFPv3	(1 << 13)
+#define HWCAP_VFPv3D16	(1 << 14)
+#define HWCAP_TLS	(1 << 15)
+#define HWCAP_VFPv4	(1 << 16)
+#define HWCAP_IDIVA	(1 << 17)
+#define HWCAP_IDIVT	(1 << 18)
+#define HWCAP_IDIV	(HWCAP_IDIVA | HWCAP_IDIVT)
+
+
+#endif /* _UAPI__ASMARM_HWCAP_H */
diff --git a/arch/arm/include/asm/ioctls.h b/arch/arm/include/uapi/asm/ioctls.h
index 9c962981612..9c962981612 100644
--- a/arch/arm/include/asm/ioctls.h
+++ b/arch/arm/include/uapi/asm/ioctls.h
diff --git a/arch/arm/include/asm/kvm_para.h b/arch/arm/include/uapi/asm/kvm_para.h
index 14fab8f0b95..14fab8f0b95 100644
--- a/arch/arm/include/asm/kvm_para.h
+++ b/arch/arm/include/uapi/asm/kvm_para.h
diff --git a/arch/arm/include/asm/mman.h b/arch/arm/include/uapi/asm/mman.h
index 41f99c573b9..41f99c573b9 100644
--- a/arch/arm/include/asm/mman.h
+++ b/arch/arm/include/uapi/asm/mman.h
diff --git a/arch/arm/include/asm/posix_types.h b/arch/arm/include/uapi/asm/posix_types.h
index d2de9cbbcd9..d2de9cbbcd9 100644
--- a/arch/arm/include/asm/posix_types.h
+++ b/arch/arm/include/uapi/asm/posix_types.h
diff --git a/arch/arm/include/uapi/asm/ptrace.h b/arch/arm/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..96ee0929790
--- /dev/null
+++ b/arch/arm/include/uapi/asm/ptrace.h
@@ -0,0 +1,138 @@
+/*
+ *  arch/arm/include/asm/ptrace.h
+ *
+ *  Copyright (C) 1996-2003 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _UAPI__ASM_ARM_PTRACE_H
+#define _UAPI__ASM_ARM_PTRACE_H
+
+#include <asm/hwcap.h>
+
+#define PTRACE_GETREGS		12
+#define PTRACE_SETREGS		13
+#define PTRACE_GETFPREGS	14
+#define PTRACE_SETFPREGS	15
+/* PTRACE_ATTACH is 16 */
+/* PTRACE_DETACH is 17 */
+#define PTRACE_GETWMMXREGS	18
+#define PTRACE_SETWMMXREGS	19
+/* 20 is unused */
+#define PTRACE_OLDSETOPTIONS	21
+#define PTRACE_GET_THREAD_AREA	22
+#define PTRACE_SET_SYSCALL	23
+/* PTRACE_SYSCALL is 24 */
+#define PTRACE_GETCRUNCHREGS	25
+#define PTRACE_SETCRUNCHREGS	26
+#define PTRACE_GETVFPREGS	27
+#define PTRACE_SETVFPREGS	28
+#define PTRACE_GETHBPREGS	29
+#define PTRACE_SETHBPREGS	30
+
+/*
+ * PSR bits
+ */
+#define USR26_MODE	0x00000000
+#define FIQ26_MODE	0x00000001
+#define IRQ26_MODE	0x00000002
+#define SVC26_MODE	0x00000003
+#define USR_MODE	0x00000010
+#define FIQ_MODE	0x00000011
+#define IRQ_MODE	0x00000012
+#define SVC_MODE	0x00000013
+#define ABT_MODE	0x00000017
+#define HYP_MODE	0x0000001a
+#define UND_MODE	0x0000001b
+#define SYSTEM_MODE	0x0000001f
+#define MODE32_BIT	0x00000010
+#define MODE_MASK	0x0000001f
+#define PSR_T_BIT	0x00000020
+#define PSR_F_BIT	0x00000040
+#define PSR_I_BIT	0x00000080
+#define PSR_A_BIT	0x00000100
+#define PSR_E_BIT	0x00000200
+#define PSR_J_BIT	0x01000000
+#define PSR_Q_BIT	0x08000000
+#define PSR_V_BIT	0x10000000
+#define PSR_C_BIT	0x20000000
+#define PSR_Z_BIT	0x40000000
+#define PSR_N_BIT	0x80000000
+
+/*
+ * Groups of PSR bits
+ */
+#define PSR_f		0xff000000	/* Flags		*/
+#define PSR_s		0x00ff0000	/* Status		*/
+#define PSR_x		0x0000ff00	/* Extension		*/
+#define PSR_c		0x000000ff	/* Control		*/
+
+/*
+ * ARMv7 groups of PSR bits
+ */
+#define APSR_MASK	0xf80f0000	/* N, Z, C, V, Q and GE flags */
+#define PSR_ISET_MASK	0x01000010	/* ISA state (J, T) mask */
+#define PSR_IT_MASK	0x0600fc00	/* If-Then execution state mask */
+#define PSR_ENDIAN_MASK	0x00000200	/* Endianness state mask */
+
+/*
+ * Default endianness state
+ */
+#ifdef CONFIG_CPU_ENDIAN_BE8
+#define PSR_ENDSTATE	PSR_E_BIT
+#else
+#define PSR_ENDSTATE	0
+#endif
+
+/* 
+ * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
+ * process is located in memory.
+ */
+#define PT_TEXT_ADDR		0x10000
+#define PT_DATA_ADDR		0x10004
+#define PT_TEXT_END_ADDR	0x10008
+
+#ifndef __ASSEMBLY__
+
+/*
+ * This struct defines the way the registers are stored on the
+ * stack during a system call.  Note that sizeof(struct pt_regs)
+ * has to be a multiple of 8.
+ */
+#ifndef __KERNEL__
+struct pt_regs {
+	long uregs[18];
+};
+#endif /* __KERNEL__ */
+
+#define ARM_cpsr	uregs[16]
+#define ARM_pc		uregs[15]
+#define ARM_lr		uregs[14]
+#define ARM_sp		uregs[13]
+#define ARM_ip		uregs[12]
+#define ARM_fp		uregs[11]
+#define ARM_r10		uregs[10]
+#define ARM_r9		uregs[9]
+#define ARM_r8		uregs[8]
+#define ARM_r7		uregs[7]
+#define ARM_r6		uregs[6]
+#define ARM_r5		uregs[5]
+#define ARM_r4		uregs[4]
+#define ARM_r3		uregs[3]
+#define ARM_r2		uregs[2]
+#define ARM_r1		uregs[1]
+#define ARM_r0		uregs[0]
+#define ARM_ORIG_r0	uregs[17]
+
+/*
+ * The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
+ * and core dumps.
+ */
+#define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ )
+
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _UAPI__ASM_ARM_PTRACE_H */
diff --git a/arch/arm/include/uapi/asm/setup.h b/arch/arm/include/uapi/asm/setup.h
new file mode 100644
index 00000000000..979ff401640
--- /dev/null
+++ b/arch/arm/include/uapi/asm/setup.h
@@ -0,0 +1,187 @@
+/*
+ *  linux/include/asm/setup.h
+ *
+ *  Copyright (C) 1997-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Structure passed to kernel to tell it about the
+ *  hardware it's running on.  See Documentation/arm/Setup
+ *  for more info.
+ */
+#ifndef _UAPI__ASMARM_SETUP_H
+#define _UAPI__ASMARM_SETUP_H
+
+#include <linux/types.h>
+
+#define COMMAND_LINE_SIZE 1024
+
+/* The list ends with an ATAG_NONE node. */
+#define ATAG_NONE	0x00000000
+
+struct tag_header {
+	__u32 size;
+	__u32 tag;
+};
+
+/* The list must start with an ATAG_CORE node */
+#define ATAG_CORE	0x54410001
+
+struct tag_core {
+	__u32 flags;		/* bit 0 = read-only */
+	__u32 pagesize;
+	__u32 rootdev;
+};
+
+/* it is allowed to have multiple ATAG_MEM nodes */
+#define ATAG_MEM	0x54410002
+
+struct tag_mem32 {
+	__u32	size;
+	__u32	start;	/* physical start address */
+};
+
+/* VGA text type displays */
+#define ATAG_VIDEOTEXT	0x54410003
+
+struct tag_videotext {
+	__u8		x;
+	__u8		y;
+	__u16		video_page;
+	__u8		video_mode;
+	__u8		video_cols;
+	__u16		video_ega_bx;
+	__u8		video_lines;
+	__u8		video_isvga;
+	__u16		video_points;
+};
+
+/* describes how the ramdisk will be used in kernel */
+#define ATAG_RAMDISK	0x54410004
+
+struct tag_ramdisk {
+	__u32 flags;	/* bit 0 = load, bit 1 = prompt */
+	__u32 size;	/* decompressed ramdisk size in _kilo_ bytes */
+	__u32 start;	/* starting block of floppy-based RAM disk image */
+};
+
+/* describes where the compressed ramdisk image lives (virtual address) */
+/*
+ * this one accidentally used virtual addresses - as such,
+ * it's deprecated.
+ */
+#define ATAG_INITRD	0x54410005
+
+/* describes where the compressed ramdisk image lives (physical address) */
+#define ATAG_INITRD2	0x54420005
+
+struct tag_initrd {
+	__u32 start;	/* physical start address */
+	__u32 size;	/* size of compressed ramdisk image in bytes */
+};
+
+/* board serial number. "64 bits should be enough for everybody" */
+#define ATAG_SERIAL	0x54410006
+
+struct tag_serialnr {
+	__u32 low;
+	__u32 high;
+};
+
+/* board revision */
+#define ATAG_REVISION	0x54410007
+
+struct tag_revision {
+	__u32 rev;
+};
+
+/* initial values for vesafb-type framebuffers. see struct screen_info
+ * in include/linux/tty.h
+ */
+#define ATAG_VIDEOLFB	0x54410008
+
+struct tag_videolfb {
+	__u16		lfb_width;
+	__u16		lfb_height;
+	__u16		lfb_depth;
+	__u16		lfb_linelength;
+	__u32		lfb_base;
+	__u32		lfb_size;
+	__u8		red_size;
+	__u8		red_pos;
+	__u8		green_size;
+	__u8		green_pos;
+	__u8		blue_size;
+	__u8		blue_pos;
+	__u8		rsvd_size;
+	__u8		rsvd_pos;
+};
+
+/* command line: \0 terminated string */
+#define ATAG_CMDLINE	0x54410009
+
+struct tag_cmdline {
+	char	cmdline[1];	/* this is the minimum size */
+};
+
+/* acorn RiscPC specific information */
+#define ATAG_ACORN	0x41000101
+
+struct tag_acorn {
+	__u32 memc_control_reg;
+	__u32 vram_pages;
+	__u8 sounddefault;
+	__u8 adfsdrives;
+};
+
+/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
+#define ATAG_MEMCLK	0x41000402
+
+struct tag_memclk {
+	__u32 fmemclk;
+};
+
+struct tag {
+	struct tag_header hdr;
+	union {
+		struct tag_core		core;
+		struct tag_mem32	mem;
+		struct tag_videotext	videotext;
+		struct tag_ramdisk	ramdisk;
+		struct tag_initrd	initrd;
+		struct tag_serialnr	serialnr;
+		struct tag_revision	revision;
+		struct tag_videolfb	videolfb;
+		struct tag_cmdline	cmdline;
+
+		/*
+		 * Acorn specific
+		 */
+		struct tag_acorn	acorn;
+
+		/*
+		 * DC21285 specific
+		 */
+		struct tag_memclk	memclk;
+	} u;
+};
+
+struct tagtable {
+	__u32 tag;
+	int (*parse)(const struct tag *);
+};
+
+#define tag_member_present(tag,member)				\
+	((unsigned long)(&((struct tag *)0L)->member + 1)	\
+		<= (tag)->hdr.size * 4)
+
+#define tag_next(t)	((struct tag *)((__u32 *)(t) + (t)->hdr.size))
+#define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+
+#define for_each_tag(t,base)		\
+	for (t = base; t->hdr.size; t = tag_next(t))
+
+
+#endif /* _UAPI__ASMARM_SETUP_H */
diff --git a/arch/arm/include/asm/sigcontext.h b/arch/arm/include/uapi/asm/sigcontext.h
index fc0b80b6a6f..fc0b80b6a6f 100644
--- a/arch/arm/include/asm/sigcontext.h
+++ b/arch/arm/include/uapi/asm/sigcontext.h
diff --git a/arch/arm/include/uapi/asm/signal.h b/arch/arm/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..921c57fdc52
--- /dev/null
+++ b/arch/arm/include/uapi/asm/signal.h
@@ -0,0 +1,127 @@
+#ifndef _UAPI_ASMARM_SIGNAL_H
+#define _UAPI_ASMARM_SIGNAL_H
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG		32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP		 1
+#define SIGINT		 2
+#define SIGQUIT		 3
+#define SIGILL		 4
+#define SIGTRAP		 5
+#define SIGABRT		 6
+#define SIGIOT		 6
+#define SIGBUS		 7
+#define SIGFPE		 8
+#define SIGKILL		 9
+#define SIGUSR1		10
+#define SIGSEGV		11
+#define SIGUSR2		12
+#define SIGPIPE		13
+#define SIGALRM		14
+#define SIGTERM		15
+#define SIGSTKFLT	16
+#define SIGCHLD		17
+#define SIGCONT		18
+#define SIGSTOP		19
+#define SIGTSTP		20
+#define SIGTTIN		21
+#define SIGTTOU		22
+#define SIGURG		23
+#define SIGXCPU		24
+#define SIGXFSZ		25
+#define SIGVTALRM	26
+#define SIGPROF		27
+#define SIGWINCH	28
+#define SIGIO		29
+#define SIGPOLL		SIGIO
+/*
+#define SIGLOST		29
+*/
+#define SIGPWR		30
+#define SIGSYS		31
+#define	SIGUNUSED	31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN	32
+#define SIGRTMAX	_NSIG
+
+#define SIGSWI		32
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_NOCLDSTOP		flag to turn off SIGCHLD when children stop.
+ * SA_NOCLDWAIT		flag on SIGCHLD to inhibit zombies.
+ * SA_SIGINFO		deliver the signal with SIGINFO structs
+ * SA_THIRTYTWO		delivers the signal in 32-bit mode, even if the task 
+ *			is running in 26-bit.
+ * SA_ONSTACK		allows alternate signal stacks (see sigaltstack(2)).
+ * SA_RESTART		flag to get restarting signals (which were the default long ago)
+ * SA_NODEFER		prevents the current signal from being masked in the handler.
+ * SA_RESETHAND		clears the handler when the signal is delivered.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP	0x00000001
+#define SA_NOCLDWAIT	0x00000002
+#define SA_SIGINFO	0x00000004
+#define SA_THIRTYTWO	0x02000000
+#define SA_RESTORER	0x04000000
+#define SA_ONSTACK	0x08000000
+#define SA_RESTART	0x10000000
+#define SA_NODEFER	0x40000000
+#define SA_RESETHAND	0x80000000
+
+#define SA_NOMASK	SA_NODEFER
+#define SA_ONESHOT	SA_RESETHAND
+
+
+/* 
+ * sigaltstack controls
+ */
+#define SS_ONSTACK	1
+#define SS_DISABLE	2
+
+#define MINSIGSTKSZ	2048
+#define SIGSTKSZ	8192
+
+#include <asm-generic/signal-defs.h>
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+	union {
+	  __sighandler_t _sa_handler;
+	  void (*_sa_sigaction)(int, struct siginfo *, void *);
+	} _u;
+	sigset_t sa_mask;
+	unsigned long sa_flags;
+	void (*sa_restorer)(void);
+};
+
+#define sa_handler	_u._sa_handler
+#define sa_sigaction	_u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+	void __user *ss_sp;
+	int ss_flags;
+	size_t ss_size;
+} stack_t;
+
+
+#endif /* _UAPI_ASMARM_SIGNAL_H */
diff --git a/arch/arm/include/asm/stat.h b/arch/arm/include/uapi/asm/stat.h
index 42c0c13999d..42c0c13999d 100644
--- a/arch/arm/include/asm/stat.h
+++ b/arch/arm/include/uapi/asm/stat.h
diff --git a/arch/arm/include/asm/statfs.h b/arch/arm/include/uapi/asm/statfs.h
index 079447c05ba..079447c05ba 100644
--- a/arch/arm/include/asm/statfs.h
+++ b/arch/arm/include/uapi/asm/statfs.h
diff --git a/arch/arm/include/uapi/asm/swab.h b/arch/arm/include/uapi/asm/swab.h
new file mode 100644
index 00000000000..6fcb32a5c45
--- /dev/null
+++ b/arch/arm/include/uapi/asm/swab.h
@@ -0,0 +1,53 @@
+/*
+ *  arch/arm/include/asm/byteorder.h
+ *
+ * ARM Endian-ness.  In little endian mode, the data bus is connected such
+ * that byte accesses appear as:
+ *  0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
+ * and word accesses (data or instruction) appear as:
+ *  d0...d31
+ *
+ * When in big endian mode, byte accesses appear as:
+ *  0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
+ * and word accesses (data or instruction) appear as:
+ *  d0...d31
+ */
+#ifndef _UAPI__ASM_ARM_SWAB_H
+#define _UAPI__ASM_ARM_SWAB_H
+
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+#  define __SWAB_64_THRU_32__
+#endif
+
+
+#if !defined(__KERNEL__) || __LINUX_ARM_ARCH__ < 6
+static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
+{
+	__u32 t;
+
+#ifndef __thumb__
+	if (!__builtin_constant_p(x)) {
+		/*
+		 * The compiler needs a bit of a hint here to always do the
+		 * right thing and not screw it up to different degrees
+		 * depending on the gcc version.
+		 */
+		asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
+	} else
+#endif
+		t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
+
+	x = (x << 24) | (x >> 8);		/* mov r0,r0,ror #8      */
+	t &= ~0x00FF0000;			/* bic r1,r1,#0x00FF0000 */
+	x ^= (t >> 8);				/* eor r0,r0,r1,lsr #8   */
+
+	return x;
+}
+#define __arch_swab32 __arch_swab32
+
+#endif
+
+#endif /* _UAPI__ASM_ARM_SWAB_H */
diff --git a/arch/arm/include/uapi/asm/unistd.h b/arch/arm/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..ac03bdb4ae4
--- /dev/null
+++ b/arch/arm/include/uapi/asm/unistd.h
@@ -0,0 +1,450 @@
+/*
+ *  arch/arm/include/asm/unistd.h
+ *
+ *  Copyright (C) 2001-2005 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Please forward _all_ changes to this file to rmk@arm.linux.org.uk,
+ * no matter what the change is.  Thanks!
+ */
+#ifndef _UAPI__ASM_ARM_UNISTD_H
+#define _UAPI__ASM_ARM_UNISTD_H
+
+#define __NR_OABI_SYSCALL_BASE	0x900000
+
+#if defined(__thumb__) || defined(__ARM_EABI__)
+#define __NR_SYSCALL_BASE	0
+#else
+#define __NR_SYSCALL_BASE	__NR_OABI_SYSCALL_BASE
+#endif
+
+/*
+ * This file contains the system call numbers.
+ */
+
+#define __NR_restart_syscall		(__NR_SYSCALL_BASE+  0)
+#define __NR_exit			(__NR_SYSCALL_BASE+  1)
+#define __NR_fork			(__NR_SYSCALL_BASE+  2)
+#define __NR_read			(__NR_SYSCALL_BASE+  3)
+#define __NR_write			(__NR_SYSCALL_BASE+  4)
+#define __NR_open			(__NR_SYSCALL_BASE+  5)
+#define __NR_close			(__NR_SYSCALL_BASE+  6)
+					/* 7 was sys_waitpid */
+#define __NR_creat			(__NR_SYSCALL_BASE+  8)
+#define __NR_link			(__NR_SYSCALL_BASE+  9)
+#define __NR_unlink			(__NR_SYSCALL_BASE+ 10)
+#define __NR_execve			(__NR_SYSCALL_BASE+ 11)
+#define __NR_chdir			(__NR_SYSCALL_BASE+ 12)
+#define __NR_time			(__NR_SYSCALL_BASE+ 13)
+#define __NR_mknod			(__NR_SYSCALL_BASE+ 14)
+#define __NR_chmod			(__NR_SYSCALL_BASE+ 15)
+#define __NR_lchown			(__NR_SYSCALL_BASE+ 16)
+					/* 17 was sys_break */
+					/* 18 was sys_stat */
+#define __NR_lseek			(__NR_SYSCALL_BASE+ 19)
+#define __NR_getpid			(__NR_SYSCALL_BASE+ 20)
+#define __NR_mount			(__NR_SYSCALL_BASE+ 21)
+#define __NR_umount			(__NR_SYSCALL_BASE+ 22)
+#define __NR_setuid			(__NR_SYSCALL_BASE+ 23)
+#define __NR_getuid			(__NR_SYSCALL_BASE+ 24)
+#define __NR_stime			(__NR_SYSCALL_BASE+ 25)
+#define __NR_ptrace			(__NR_SYSCALL_BASE+ 26)
+#define __NR_alarm			(__NR_SYSCALL_BASE+ 27)
+					/* 28 was sys_fstat */
+#define __NR_pause			(__NR_SYSCALL_BASE+ 29)
+#define __NR_utime			(__NR_SYSCALL_BASE+ 30)
+					/* 31 was sys_stty */
+					/* 32 was sys_gtty */
+#define __NR_access			(__NR_SYSCALL_BASE+ 33)
+#define __NR_nice			(__NR_SYSCALL_BASE+ 34)
+					/* 35 was sys_ftime */
+#define __NR_sync			(__NR_SYSCALL_BASE+ 36)
+#define __NR_kill			(__NR_SYSCALL_BASE+ 37)
+#define __NR_rename			(__NR_SYSCALL_BASE+ 38)
+#define __NR_mkdir			(__NR_SYSCALL_BASE+ 39)
+#define __NR_rmdir			(__NR_SYSCALL_BASE+ 40)
+#define __NR_dup			(__NR_SYSCALL_BASE+ 41)
+#define __NR_pipe			(__NR_SYSCALL_BASE+ 42)
+#define __NR_times			(__NR_SYSCALL_BASE+ 43)
+					/* 44 was sys_prof */
+#define __NR_brk			(__NR_SYSCALL_BASE+ 45)
+#define __NR_setgid			(__NR_SYSCALL_BASE+ 46)
+#define __NR_getgid			(__NR_SYSCALL_BASE+ 47)
+					/* 48 was sys_signal */
+#define __NR_geteuid			(__NR_SYSCALL_BASE+ 49)
+#define __NR_getegid			(__NR_SYSCALL_BASE+ 50)
+#define __NR_acct			(__NR_SYSCALL_BASE+ 51)
+#define __NR_umount2			(__NR_SYSCALL_BASE+ 52)
+					/* 53 was sys_lock */
+#define __NR_ioctl			(__NR_SYSCALL_BASE+ 54)
+#define __NR_fcntl			(__NR_SYSCALL_BASE+ 55)
+					/* 56 was sys_mpx */
+#define __NR_setpgid			(__NR_SYSCALL_BASE+ 57)
+					/* 58 was sys_ulimit */
+					/* 59 was sys_olduname */
+#define __NR_umask			(__NR_SYSCALL_BASE+ 60)
+#define __NR_chroot			(__NR_SYSCALL_BASE+ 61)
+#define __NR_ustat			(__NR_SYSCALL_BASE+ 62)
+#define __NR_dup2			(__NR_SYSCALL_BASE+ 63)
+#define __NR_getppid			(__NR_SYSCALL_BASE+ 64)
+#define __NR_getpgrp			(__NR_SYSCALL_BASE+ 65)
+#define __NR_setsid			(__NR_SYSCALL_BASE+ 66)
+#define __NR_sigaction			(__NR_SYSCALL_BASE+ 67)
+					/* 68 was sys_sgetmask */
+					/* 69 was sys_ssetmask */
+#define __NR_setreuid			(__NR_SYSCALL_BASE+ 70)
+#define __NR_setregid			(__NR_SYSCALL_BASE+ 71)
+#define __NR_sigsuspend			(__NR_SYSCALL_BASE+ 72)
+#define __NR_sigpending			(__NR_SYSCALL_BASE+ 73)
+#define __NR_sethostname		(__NR_SYSCALL_BASE+ 74)
+#define __NR_setrlimit			(__NR_SYSCALL_BASE+ 75)
+#define __NR_getrlimit			(__NR_SYSCALL_BASE+ 76)	/* Back compat 2GB limited rlimit */
+#define __NR_getrusage			(__NR_SYSCALL_BASE+ 77)
+#define __NR_gettimeofday		(__NR_SYSCALL_BASE+ 78)
+#define __NR_settimeofday		(__NR_SYSCALL_BASE+ 79)
+#define __NR_getgroups			(__NR_SYSCALL_BASE+ 80)
+#define __NR_setgroups			(__NR_SYSCALL_BASE+ 81)
+#define __NR_select			(__NR_SYSCALL_BASE+ 82)
+#define __NR_symlink			(__NR_SYSCALL_BASE+ 83)
+					/* 84 was sys_lstat */
+#define __NR_readlink			(__NR_SYSCALL_BASE+ 85)
+#define __NR_uselib			(__NR_SYSCALL_BASE+ 86)
+#define __NR_swapon			(__NR_SYSCALL_BASE+ 87)
+#define __NR_reboot			(__NR_SYSCALL_BASE+ 88)
+#define __NR_readdir			(__NR_SYSCALL_BASE+ 89)
+#define __NR_mmap			(__NR_SYSCALL_BASE+ 90)
+#define __NR_munmap			(__NR_SYSCALL_BASE+ 91)
+#define __NR_truncate			(__NR_SYSCALL_BASE+ 92)
+#define __NR_ftruncate			(__NR_SYSCALL_BASE+ 93)
+#define __NR_fchmod			(__NR_SYSCALL_BASE+ 94)
+#define __NR_fchown			(__NR_SYSCALL_BASE+ 95)
+#define __NR_getpriority		(__NR_SYSCALL_BASE+ 96)
+#define __NR_setpriority		(__NR_SYSCALL_BASE+ 97)
+					/* 98 was sys_profil */
+#define __NR_statfs			(__NR_SYSCALL_BASE+ 99)
+#define __NR_fstatfs			(__NR_SYSCALL_BASE+100)
+					/* 101 was sys_ioperm */
+#define __NR_socketcall			(__NR_SYSCALL_BASE+102)
+#define __NR_syslog			(__NR_SYSCALL_BASE+103)
+#define __NR_setitimer			(__NR_SYSCALL_BASE+104)
+#define __NR_getitimer			(__NR_SYSCALL_BASE+105)
+#define __NR_stat			(__NR_SYSCALL_BASE+106)
+#define __NR_lstat			(__NR_SYSCALL_BASE+107)
+#define __NR_fstat			(__NR_SYSCALL_BASE+108)
+					/* 109 was sys_uname */
+					/* 110 was sys_iopl */
+#define __NR_vhangup			(__NR_SYSCALL_BASE+111)
+					/* 112 was sys_idle */
+#define __NR_syscall			(__NR_SYSCALL_BASE+113) /* syscall to call a syscall! */
+#define __NR_wait4			(__NR_SYSCALL_BASE+114)
+#define __NR_swapoff			(__NR_SYSCALL_BASE+115)
+#define __NR_sysinfo			(__NR_SYSCALL_BASE+116)
+#define __NR_ipc			(__NR_SYSCALL_BASE+117)
+#define __NR_fsync			(__NR_SYSCALL_BASE+118)
+#define __NR_sigreturn			(__NR_SYSCALL_BASE+119)
+#define __NR_clone			(__NR_SYSCALL_BASE+120)
+#define __NR_setdomainname		(__NR_SYSCALL_BASE+121)
+#define __NR_uname			(__NR_SYSCALL_BASE+122)
+					/* 123 was sys_modify_ldt */
+#define __NR_adjtimex			(__NR_SYSCALL_BASE+124)
+#define __NR_mprotect			(__NR_SYSCALL_BASE+125)
+#define __NR_sigprocmask		(__NR_SYSCALL_BASE+126)
+					/* 127 was sys_create_module */
+#define __NR_init_module		(__NR_SYSCALL_BASE+128)
+#define __NR_delete_module		(__NR_SYSCALL_BASE+129)
+					/* 130 was sys_get_kernel_syms */
+#define __NR_quotactl			(__NR_SYSCALL_BASE+131)
+#define __NR_getpgid			(__NR_SYSCALL_BASE+132)
+#define __NR_fchdir			(__NR_SYSCALL_BASE+133)
+#define __NR_bdflush			(__NR_SYSCALL_BASE+134)
+#define __NR_sysfs			(__NR_SYSCALL_BASE+135)
+#define __NR_personality		(__NR_SYSCALL_BASE+136)
+					/* 137 was sys_afs_syscall */
+#define __NR_setfsuid			(__NR_SYSCALL_BASE+138)
+#define __NR_setfsgid			(__NR_SYSCALL_BASE+139)
+#define __NR__llseek			(__NR_SYSCALL_BASE+140)
+#define __NR_getdents			(__NR_SYSCALL_BASE+141)
+#define __NR__newselect			(__NR_SYSCALL_BASE+142)
+#define __NR_flock			(__NR_SYSCALL_BASE+143)
+#define __NR_msync			(__NR_SYSCALL_BASE+144)
+#define __NR_readv			(__NR_SYSCALL_BASE+145)
+#define __NR_writev			(__NR_SYSCALL_BASE+146)
+#define __NR_getsid			(__NR_SYSCALL_BASE+147)
+#define __NR_fdatasync			(__NR_SYSCALL_BASE+148)
+#define __NR__sysctl			(__NR_SYSCALL_BASE+149)
+#define __NR_mlock			(__NR_SYSCALL_BASE+150)
+#define __NR_munlock			(__NR_SYSCALL_BASE+151)
+#define __NR_mlockall			(__NR_SYSCALL_BASE+152)
+#define __NR_munlockall			(__NR_SYSCALL_BASE+153)
+#define __NR_sched_setparam		(__NR_SYSCALL_BASE+154)
+#define __NR_sched_getparam		(__NR_SYSCALL_BASE+155)
+#define __NR_sched_setscheduler		(__NR_SYSCALL_BASE+156)
+#define __NR_sched_getscheduler		(__NR_SYSCALL_BASE+157)
+#define __NR_sched_yield		(__NR_SYSCALL_BASE+158)
+#define __NR_sched_get_priority_max	(__NR_SYSCALL_BASE+159)
+#define __NR_sched_get_priority_min	(__NR_SYSCALL_BASE+160)
+#define __NR_sched_rr_get_interval	(__NR_SYSCALL_BASE+161)
+#define __NR_nanosleep			(__NR_SYSCALL_BASE+162)
+#define __NR_mremap			(__NR_SYSCALL_BASE+163)
+#define __NR_setresuid			(__NR_SYSCALL_BASE+164)
+#define __NR_getresuid			(__NR_SYSCALL_BASE+165)
+					/* 166 was sys_vm86 */
+					/* 167 was sys_query_module */
+#define __NR_poll			(__NR_SYSCALL_BASE+168)
+#define __NR_nfsservctl			(__NR_SYSCALL_BASE+169)
+#define __NR_setresgid			(__NR_SYSCALL_BASE+170)
+#define __NR_getresgid			(__NR_SYSCALL_BASE+171)
+#define __NR_prctl			(__NR_SYSCALL_BASE+172)
+#define __NR_rt_sigreturn		(__NR_SYSCALL_BASE+173)
+#define __NR_rt_sigaction		(__NR_SYSCALL_BASE+174)
+#define __NR_rt_sigprocmask		(__NR_SYSCALL_BASE+175)
+#define __NR_rt_sigpending		(__NR_SYSCALL_BASE+176)
+#define __NR_rt_sigtimedwait		(__NR_SYSCALL_BASE+177)
+#define __NR_rt_sigqueueinfo		(__NR_SYSCALL_BASE+178)
+#define __NR_rt_sigsuspend		(__NR_SYSCALL_BASE+179)
+#define __NR_pread64			(__NR_SYSCALL_BASE+180)
+#define __NR_pwrite64			(__NR_SYSCALL_BASE+181)
+#define __NR_chown			(__NR_SYSCALL_BASE+182)
+#define __NR_getcwd			(__NR_SYSCALL_BASE+183)
+#define __NR_capget			(__NR_SYSCALL_BASE+184)
+#define __NR_capset			(__NR_SYSCALL_BASE+185)
+#define __NR_sigaltstack		(__NR_SYSCALL_BASE+186)
+#define __NR_sendfile			(__NR_SYSCALL_BASE+187)
+					/* 188 reserved */
+					/* 189 reserved */
+#define __NR_vfork			(__NR_SYSCALL_BASE+190)
+#define __NR_ugetrlimit			(__NR_SYSCALL_BASE+191)	/* SuS compliant getrlimit */
+#define __NR_mmap2			(__NR_SYSCALL_BASE+192)
+#define __NR_truncate64			(__NR_SYSCALL_BASE+193)
+#define __NR_ftruncate64		(__NR_SYSCALL_BASE+194)
+#define __NR_stat64			(__NR_SYSCALL_BASE+195)
+#define __NR_lstat64			(__NR_SYSCALL_BASE+196)
+#define __NR_fstat64			(__NR_SYSCALL_BASE+197)
+#define __NR_lchown32			(__NR_SYSCALL_BASE+198)
+#define __NR_getuid32			(__NR_SYSCALL_BASE+199)
+#define __NR_getgid32			(__NR_SYSCALL_BASE+200)
+#define __NR_geteuid32			(__NR_SYSCALL_BASE+201)
+#define __NR_getegid32			(__NR_SYSCALL_BASE+202)
+#define __NR_setreuid32			(__NR_SYSCALL_BASE+203)
+#define __NR_setregid32			(__NR_SYSCALL_BASE+204)
+#define __NR_getgroups32		(__NR_SYSCALL_BASE+205)
+#define __NR_setgroups32		(__NR_SYSCALL_BASE+206)
+#define __NR_fchown32			(__NR_SYSCALL_BASE+207)
+#define __NR_setresuid32		(__NR_SYSCALL_BASE+208)
+#define __NR_getresuid32		(__NR_SYSCALL_BASE+209)
+#define __NR_setresgid32		(__NR_SYSCALL_BASE+210)
+#define __NR_getresgid32		(__NR_SYSCALL_BASE+211)
+#define __NR_chown32			(__NR_SYSCALL_BASE+212)
+#define __NR_setuid32			(__NR_SYSCALL_BASE+213)
+#define __NR_setgid32			(__NR_SYSCALL_BASE+214)
+#define __NR_setfsuid32			(__NR_SYSCALL_BASE+215)
+#define __NR_setfsgid32			(__NR_SYSCALL_BASE+216)
+#define __NR_getdents64			(__NR_SYSCALL_BASE+217)
+#define __NR_pivot_root			(__NR_SYSCALL_BASE+218)
+#define __NR_mincore			(__NR_SYSCALL_BASE+219)
+#define __NR_madvise			(__NR_SYSCALL_BASE+220)
+#define __NR_fcntl64			(__NR_SYSCALL_BASE+221)
+					/* 222 for tux */
+					/* 223 is unused */
+#define __NR_gettid			(__NR_SYSCALL_BASE+224)
+#define __NR_readahead			(__NR_SYSCALL_BASE+225)
+#define __NR_setxattr			(__NR_SYSCALL_BASE+226)
+#define __NR_lsetxattr			(__NR_SYSCALL_BASE+227)
+#define __NR_fsetxattr			(__NR_SYSCALL_BASE+228)
+#define __NR_getxattr			(__NR_SYSCALL_BASE+229)
+#define __NR_lgetxattr			(__NR_SYSCALL_BASE+230)
+#define __NR_fgetxattr			(__NR_SYSCALL_BASE+231)
+#define __NR_listxattr			(__NR_SYSCALL_BASE+232)
+#define __NR_llistxattr			(__NR_SYSCALL_BASE+233)
+#define __NR_flistxattr			(__NR_SYSCALL_BASE+234)
+#define __NR_removexattr		(__NR_SYSCALL_BASE+235)
+#define __NR_lremovexattr		(__NR_SYSCALL_BASE+236)
+#define __NR_fremovexattr		(__NR_SYSCALL_BASE+237)
+#define __NR_tkill			(__NR_SYSCALL_BASE+238)
+#define __NR_sendfile64			(__NR_SYSCALL_BASE+239)
+#define __NR_futex			(__NR_SYSCALL_BASE+240)
+#define __NR_sched_setaffinity		(__NR_SYSCALL_BASE+241)
+#define __NR_sched_getaffinity		(__NR_SYSCALL_BASE+242)
+#define __NR_io_setup			(__NR_SYSCALL_BASE+243)
+#define __NR_io_destroy			(__NR_SYSCALL_BASE+244)
+#define __NR_io_getevents		(__NR_SYSCALL_BASE+245)
+#define __NR_io_submit			(__NR_SYSCALL_BASE+246)
+#define __NR_io_cancel			(__NR_SYSCALL_BASE+247)
+#define __NR_exit_group			(__NR_SYSCALL_BASE+248)
+#define __NR_lookup_dcookie		(__NR_SYSCALL_BASE+249)
+#define __NR_epoll_create		(__NR_SYSCALL_BASE+250)
+#define __NR_epoll_ctl			(__NR_SYSCALL_BASE+251)
+#define __NR_epoll_wait			(__NR_SYSCALL_BASE+252)
+#define __NR_remap_file_pages		(__NR_SYSCALL_BASE+253)
+					/* 254 for set_thread_area */
+					/* 255 for get_thread_area */
+#define __NR_set_tid_address		(__NR_SYSCALL_BASE+256)
+#define __NR_timer_create		(__NR_SYSCALL_BASE+257)
+#define __NR_timer_settime		(__NR_SYSCALL_BASE+258)
+#define __NR_timer_gettime		(__NR_SYSCALL_BASE+259)
+#define __NR_timer_getoverrun		(__NR_SYSCALL_BASE+260)
+#define __NR_timer_delete		(__NR_SYSCALL_BASE+261)
+#define __NR_clock_settime		(__NR_SYSCALL_BASE+262)
+#define __NR_clock_gettime		(__NR_SYSCALL_BASE+263)
+#define __NR_clock_getres		(__NR_SYSCALL_BASE+264)
+#define __NR_clock_nanosleep		(__NR_SYSCALL_BASE+265)
+#define __NR_statfs64			(__NR_SYSCALL_BASE+266)
+#define __NR_fstatfs64			(__NR_SYSCALL_BASE+267)
+#define __NR_tgkill			(__NR_SYSCALL_BASE+268)
+#define __NR_utimes			(__NR_SYSCALL_BASE+269)
+#define __NR_arm_fadvise64_64		(__NR_SYSCALL_BASE+270)
+#define __NR_pciconfig_iobase		(__NR_SYSCALL_BASE+271)
+#define __NR_pciconfig_read		(__NR_SYSCALL_BASE+272)
+#define __NR_pciconfig_write		(__NR_SYSCALL_BASE+273)
+#define __NR_mq_open			(__NR_SYSCALL_BASE+274)
+#define __NR_mq_unlink			(__NR_SYSCALL_BASE+275)
+#define __NR_mq_timedsend		(__NR_SYSCALL_BASE+276)
+#define __NR_mq_timedreceive		(__NR_SYSCALL_BASE+277)
+#define __NR_mq_notify			(__NR_SYSCALL_BASE+278)
+#define __NR_mq_getsetattr		(__NR_SYSCALL_BASE+279)
+#define __NR_waitid			(__NR_SYSCALL_BASE+280)
+#define __NR_socket			(__NR_SYSCALL_BASE+281)
+#define __NR_bind			(__NR_SYSCALL_BASE+282)
+#define __NR_connect			(__NR_SYSCALL_BASE+283)
+#define __NR_listen			(__NR_SYSCALL_BASE+284)
+#define __NR_accept			(__NR_SYSCALL_BASE+285)
+#define __NR_getsockname		(__NR_SYSCALL_BASE+286)
+#define __NR_getpeername		(__NR_SYSCALL_BASE+287)
+#define __NR_socketpair			(__NR_SYSCALL_BASE+288)
+#define __NR_send			(__NR_SYSCALL_BASE+289)
+#define __NR_sendto			(__NR_SYSCALL_BASE+290)
+#define __NR_recv			(__NR_SYSCALL_BASE+291)
+#define __NR_recvfrom			(__NR_SYSCALL_BASE+292)
+#define __NR_shutdown			(__NR_SYSCALL_BASE+293)
+#define __NR_setsockopt			(__NR_SYSCALL_BASE+294)
+#define __NR_getsockopt			(__NR_SYSCALL_BASE+295)
+#define __NR_sendmsg			(__NR_SYSCALL_BASE+296)
+#define __NR_recvmsg			(__NR_SYSCALL_BASE+297)
+#define __NR_semop			(__NR_SYSCALL_BASE+298)
+#define __NR_semget			(__NR_SYSCALL_BASE+299)
+#define __NR_semctl			(__NR_SYSCALL_BASE+300)
+#define __NR_msgsnd			(__NR_SYSCALL_BASE+301)
+#define __NR_msgrcv			(__NR_SYSCALL_BASE+302)
+#define __NR_msgget			(__NR_SYSCALL_BASE+303)
+#define __NR_msgctl			(__NR_SYSCALL_BASE+304)
+#define __NR_shmat			(__NR_SYSCALL_BASE+305)
+#define __NR_shmdt			(__NR_SYSCALL_BASE+306)
+#define __NR_shmget			(__NR_SYSCALL_BASE+307)
+#define __NR_shmctl			(__NR_SYSCALL_BASE+308)
+#define __NR_add_key			(__NR_SYSCALL_BASE+309)
+#define __NR_request_key		(__NR_SYSCALL_BASE+310)
+#define __NR_keyctl			(__NR_SYSCALL_BASE+311)
+#define __NR_semtimedop			(__NR_SYSCALL_BASE+312)
+#define __NR_vserver			(__NR_SYSCALL_BASE+313)
+#define __NR_ioprio_set			(__NR_SYSCALL_BASE+314)
+#define __NR_ioprio_get			(__NR_SYSCALL_BASE+315)
+#define __NR_inotify_init		(__NR_SYSCALL_BASE+316)
+#define __NR_inotify_add_watch		(__NR_SYSCALL_BASE+317)
+#define __NR_inotify_rm_watch		(__NR_SYSCALL_BASE+318)
+#define __NR_mbind			(__NR_SYSCALL_BASE+319)
+#define __NR_get_mempolicy		(__NR_SYSCALL_BASE+320)
+#define __NR_set_mempolicy		(__NR_SYSCALL_BASE+321)
+#define __NR_openat			(__NR_SYSCALL_BASE+322)
+#define __NR_mkdirat			(__NR_SYSCALL_BASE+323)
+#define __NR_mknodat			(__NR_SYSCALL_BASE+324)
+#define __NR_fchownat			(__NR_SYSCALL_BASE+325)
+#define __NR_futimesat			(__NR_SYSCALL_BASE+326)
+#define __NR_fstatat64			(__NR_SYSCALL_BASE+327)
+#define __NR_unlinkat			(__NR_SYSCALL_BASE+328)
+#define __NR_renameat			(__NR_SYSCALL_BASE+329)
+#define __NR_linkat			(__NR_SYSCALL_BASE+330)
+#define __NR_symlinkat			(__NR_SYSCALL_BASE+331)
+#define __NR_readlinkat			(__NR_SYSCALL_BASE+332)
+#define __NR_fchmodat			(__NR_SYSCALL_BASE+333)
+#define __NR_faccessat			(__NR_SYSCALL_BASE+334)
+#define __NR_pselect6			(__NR_SYSCALL_BASE+335)
+#define __NR_ppoll			(__NR_SYSCALL_BASE+336)
+#define __NR_unshare			(__NR_SYSCALL_BASE+337)
+#define __NR_set_robust_list		(__NR_SYSCALL_BASE+338)
+#define __NR_get_robust_list		(__NR_SYSCALL_BASE+339)
+#define __NR_splice			(__NR_SYSCALL_BASE+340)
+#define __NR_arm_sync_file_range	(__NR_SYSCALL_BASE+341)
+#define __NR_sync_file_range2		__NR_arm_sync_file_range
+#define __NR_tee			(__NR_SYSCALL_BASE+342)
+#define __NR_vmsplice			(__NR_SYSCALL_BASE+343)
+#define __NR_move_pages			(__NR_SYSCALL_BASE+344)
+#define __NR_getcpu			(__NR_SYSCALL_BASE+345)
+#define __NR_epoll_pwait		(__NR_SYSCALL_BASE+346)
+#define __NR_kexec_load			(__NR_SYSCALL_BASE+347)
+#define __NR_utimensat			(__NR_SYSCALL_BASE+348)
+#define __NR_signalfd			(__NR_SYSCALL_BASE+349)
+#define __NR_timerfd_create		(__NR_SYSCALL_BASE+350)
+#define __NR_eventfd			(__NR_SYSCALL_BASE+351)
+#define __NR_fallocate			(__NR_SYSCALL_BASE+352)
+#define __NR_timerfd_settime		(__NR_SYSCALL_BASE+353)
+#define __NR_timerfd_gettime		(__NR_SYSCALL_BASE+354)
+#define __NR_signalfd4			(__NR_SYSCALL_BASE+355)
+#define __NR_eventfd2			(__NR_SYSCALL_BASE+356)
+#define __NR_epoll_create1		(__NR_SYSCALL_BASE+357)
+#define __NR_dup3			(__NR_SYSCALL_BASE+358)
+#define __NR_pipe2			(__NR_SYSCALL_BASE+359)
+#define __NR_inotify_init1		(__NR_SYSCALL_BASE+360)
+#define __NR_preadv			(__NR_SYSCALL_BASE+361)
+#define __NR_pwritev			(__NR_SYSCALL_BASE+362)
+#define __NR_rt_tgsigqueueinfo		(__NR_SYSCALL_BASE+363)
+#define __NR_perf_event_open		(__NR_SYSCALL_BASE+364)
+#define __NR_recvmmsg			(__NR_SYSCALL_BASE+365)
+#define __NR_accept4			(__NR_SYSCALL_BASE+366)
+#define __NR_fanotify_init		(__NR_SYSCALL_BASE+367)
+#define __NR_fanotify_mark		(__NR_SYSCALL_BASE+368)
+#define __NR_prlimit64			(__NR_SYSCALL_BASE+369)
+#define __NR_name_to_handle_at		(__NR_SYSCALL_BASE+370)
+#define __NR_open_by_handle_at		(__NR_SYSCALL_BASE+371)
+#define __NR_clock_adjtime		(__NR_SYSCALL_BASE+372)
+#define __NR_syncfs			(__NR_SYSCALL_BASE+373)
+#define __NR_sendmmsg			(__NR_SYSCALL_BASE+374)
+#define __NR_setns			(__NR_SYSCALL_BASE+375)
+#define __NR_process_vm_readv		(__NR_SYSCALL_BASE+376)
+#define __NR_process_vm_writev		(__NR_SYSCALL_BASE+377)
+					/* 378 for kcmp */
+
+/*
+ * This may need to be greater than __NR_last_syscall+1 in order to
+ * account for the padding in the syscall table
+ */
+
+/*
+ * The following SWIs are ARM private.
+ */
+#define __ARM_NR_BASE			(__NR_SYSCALL_BASE+0x0f0000)
+#define __ARM_NR_breakpoint		(__ARM_NR_BASE+1)
+#define __ARM_NR_cacheflush		(__ARM_NR_BASE+2)
+#define __ARM_NR_usr26			(__ARM_NR_BASE+3)
+#define __ARM_NR_usr32			(__ARM_NR_BASE+4)
+#define __ARM_NR_set_tls		(__ARM_NR_BASE+5)
+
+/*
+ * *NOTE*: This is a ghost syscall private to the kernel.  Only the
+ * __kuser_cmpxchg code in entry-armv.S should be aware of its
+ * existence.  Don't ever use this from user code.
+ */
+
+/*
+ * The following syscalls are obsolete and no longer available for EABI.
+ */
+#if !defined(__KERNEL__)
+#if defined(__ARM_EABI__)
+#undef __NR_time
+#undef __NR_umount
+#undef __NR_stime
+#undef __NR_alarm
+#undef __NR_utime
+#undef __NR_getrlimit
+#undef __NR_select
+#undef __NR_readdir
+#undef __NR_mmap
+#undef __NR_socketcall
+#undef __NR_syscall
+#undef __NR_ipc
+#endif
+#endif
+
+#endif /* _UAPI__ASM_ARM_UNISTD_H */
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 5dfef9d97ed..5bbec7b8183 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -81,4 +81,6 @@ head-y			:= head$(MMUEXT).o
 obj-$(CONFIG_DEBUG_LL)	+= debug.o
 obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
 
+obj-$(CONFIG_ARM_VIRT_EXT)	+= hyp-stub.o
+
 extra-y := $(head-y) vmlinux.lds
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index e337879595e..831cd38c8d9 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -20,7 +20,7 @@
 		CALL(sys_creat)
 		CALL(sys_link)
 /* 10 */	CALL(sys_unlink)
-		CALL(sys_execve_wrapper)
+		CALL(sys_execve)
 		CALL(sys_chdir)
 		CALL(OBSOLETE(sys_time))	/* used by libc4 */
 		CALL(sys_mknod)
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index f45987037bf..417bac1846b 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -86,8 +86,11 @@ ENDPROC(ret_to_user)
  */
 ENTRY(ret_from_fork)
 	bl	schedule_tail
+	cmp	r5, #0
+	movne	r0, r4
+	movne	lr, pc
+	movne	pc, r5
 	get_thread_info tsk
-	mov	why, #1
 	b	ret_slow_syscall
 ENDPROC(ret_from_fork)
 
@@ -517,11 +520,6 @@ sys_vfork_wrapper:
 		b	sys_vfork
 ENDPROC(sys_vfork_wrapper)
 
-sys_execve_wrapper:
-		add	r3, sp, #S_OFF
-		b	sys_execve
-ENDPROC(sys_execve_wrapper)
-
 sys_clone_wrapper:
 		add	ip, sp, #S_OFF
 		str	ip, [sp, #4]
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 9874d074119..4eee351f466 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -83,8 +83,12 @@ ENTRY(stext)
  THUMB(	.thumb			)	@ switch to Thumb now.
  THUMB(1:			)
 
-	setmode	PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
-						@ and irqs disabled
+#ifdef CONFIG_ARM_VIRT_EXT
+	bl	__hyp_stub_install
+#endif
+	@ ensure svc mode and all interrupts masked
+	safe_svcmode_maskall r9
+
 	mrc	p15, 0, r9, c0, c0		@ get processor id
 	bl	__lookup_processor_type		@ r5=procinfo r9=cpuid
 	movs	r10, r5				@ invalid processor (r5=0)?
@@ -326,7 +330,11 @@ ENTRY(secondary_startup)
 	 * the processor type - there is no need to check the machine type
 	 * as it has already been validated by the primary processor.
 	 */
-	setmode	PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9
+#ifdef CONFIG_ARM_VIRT_EXT
+	bl	__hyp_stub_install
+#endif
+	safe_svcmode_maskall r9
+
 	mrc	p15, 0, r9, c0, c0		@ get processor id
 	bl	__lookup_processor_type
 	movs	r10, r5				@ invalid processor?
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
new file mode 100644
index 00000000000..65b2417aebc
--- /dev/null
+++ b/arch/arm/kernel/hyp-stub.S
@@ -0,0 +1,223 @@
+/*
+ * Copyright (c) 2012 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+
+#include <linux/init.h>
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/virt.h>
+
+#ifndef ZIMAGE
+/*
+ * For the kernel proper, we need to find out the CPU boot mode long after
+ * boot, so we need to store it in a writable variable.
+ *
+ * This is not in .bss, because we set it sufficiently early that the boot-time
+ * zeroing of .bss would clobber it.
+ */
+.data
+ENTRY(__boot_cpu_mode)
+	.long	0
+.text
+
+	/*
+	 * Save the primary CPU boot mode. Requires 3 scratch registers.
+	 */
+	.macro	store_primary_cpu_mode	reg1, reg2, reg3
+	mrs	\reg1, cpsr
+	and	\reg1, \reg1, #MODE_MASK
+	adr	\reg2, .L__boot_cpu_mode_offset
+	ldr	\reg3, [\reg2]
+	str	\reg1, [\reg2, \reg3]
+	.endm
+
+	/*
+	 * Compare the current mode with the one saved on the primary CPU.
+	 * If they don't match, record that fact. The Z bit indicates
+	 * if there's a match or not.
+	 * Requires 3 additionnal scratch registers.
+	 */
+	.macro	compare_cpu_mode_with_primary mode, reg1, reg2, reg3
+	adr	\reg2, .L__boot_cpu_mode_offset
+	ldr	\reg3, [\reg2]
+	ldr	\reg1, [\reg2, \reg3]
+	cmp	\mode, \reg1		@ matches primary CPU boot mode?
+	orrne	r7, r7, #BOOT_CPU_MODE_MISMATCH
+	strne	r7, [r5, r6]		@ record what happened and give up
+	.endm
+
+#else	/* ZIMAGE */
+
+	.macro	store_primary_cpu_mode	reg1:req, reg2:req, reg3:req
+	.endm
+
+/*
+ * The zImage loader only runs on one CPU, so we don't bother with mult-CPU
+ * consistency checking:
+ */
+	.macro	compare_cpu_mode_with_primary mode, reg1, reg2, reg3
+	cmp	\mode, \mode
+	.endm
+
+#endif /* ZIMAGE */
+
+/*
+ * Hypervisor stub installation functions.
+ *
+ * These must be called with the MMU and D-cache off.
+ * They are not ABI compliant and are only intended to be called from the kernel
+ * entry points in head.S.
+ */
+@ Call this from the primary CPU
+ENTRY(__hyp_stub_install)
+	store_primary_cpu_mode	r4, r5, r6
+ENDPROC(__hyp_stub_install)
+
+	@ fall through...
+
+@ Secondary CPUs should call here
+ENTRY(__hyp_stub_install_secondary)
+	mrs	r4, cpsr
+	and	r4, r4, #MODE_MASK
+
+	/*
+	 * If the secondary has booted with a different mode, give up
+	 * immediately.
+	 */
+	compare_cpu_mode_with_primary	r4, r5, r6, r7
+	bxne	lr
+
+	/*
+	 * Once we have given up on one CPU, we do not try to install the
+	 * stub hypervisor on the remaining ones: because the saved boot mode
+	 * is modified, it can't compare equal to the CPSR mode field any
+	 * more.
+	 *
+	 * Otherwise...
+	 */
+
+	cmp	r4, #HYP_MODE
+	bxne	lr			@ give up if the CPU is not in HYP mode
+
+/*
+ * Configure HSCTLR to set correct exception endianness/instruction set
+ * state etc.
+ * Turn off all traps
+ * Eventually, CPU-specific code might be needed -- assume not for now
+ *
+ * This code relies on the "eret" instruction to synchronize the
+ * various coprocessor accesses.
+ */
+	@ Now install the hypervisor stub:
+	adr	r7, __hyp_stub_vectors
+	mcr	p15, 4, r7, c12, c0, 0	@ set hypervisor vector base (HVBAR)
+
+	@ Disable all traps, so we don't get any nasty surprise
+	mov	r7, #0
+	mcr	p15, 4, r7, c1, c1, 0	@ HCR
+	mcr	p15, 4, r7, c1, c1, 2	@ HCPTR
+	mcr	p15, 4, r7, c1, c1, 3	@ HSTR
+
+THUMB(	orr	r7, #(1 << 30)	)	@ HSCTLR.TE
+#ifdef CONFIG_CPU_BIG_ENDIAN
+	orr	r7, #(1 << 9)		@ HSCTLR.EE
+#endif
+	mcr	p15, 4, r7, c1, c0, 0	@ HSCTLR
+
+	mrc	p15, 4, r7, c1, c1, 1	@ HDCR
+	and	r7, #0x1f		@ Preserve HPMN
+	mcr	p15, 4, r7, c1, c1, 1	@ HDCR
+
+#if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER)
+	@ make CNTP_* and CNTPCT accessible from PL1
+	mrc	p15, 0, r7, c0, c1, 1	@ ID_PFR1
+	lsr	r7, #16
+	and	r7, #0xf
+	cmp	r7, #1
+	bne	1f
+	mrc	p15, 4, r7, c14, c1, 0	@ CNTHCTL
+	orr	r7, r7, #3		@ PL1PCEN | PL1PCTEN
+	mcr	p15, 4, r7, c14, c1, 0	@ CNTHCTL
+1:
+#endif
+
+	bic	r7, r4, #MODE_MASK
+	orr	r7, r7, #SVC_MODE
+THUMB(	orr	r7, r7, #PSR_T_BIT	)
+	msr	spsr_cxsf, r7		@ This is SPSR_hyp.
+
+	__MSR_ELR_HYP(14)		@ msr elr_hyp, lr
+	__ERET				@ return, switching to SVC mode
+					@ The boot CPU mode is left in r4.
+ENDPROC(__hyp_stub_install_secondary)
+
+__hyp_stub_do_trap:
+	cmp	r0, #-1
+	mrceq	p15, 4, r0, c12, c0, 0	@ get HVBAR
+	mcrne	p15, 4, r0, c12, c0, 0	@ set HVBAR
+	__ERET
+ENDPROC(__hyp_stub_do_trap)
+
+/*
+ * __hyp_set_vectors: Call this after boot to set the initial hypervisor
+ * vectors as part of hypervisor installation.  On an SMP system, this should
+ * be called on each CPU.
+ *
+ * r0 must be the physical address of the new vector table (which must lie in
+ * the bottom 4GB of physical address space.
+ *
+ * r0 must be 32-byte aligned.
+ *
+ * Before calling this, you must check that the stub hypervisor is installed
+ * everywhere, by waiting for any secondary CPUs to be brought up and then
+ * checking that BOOT_CPU_MODE_HAVE_HYP(__boot_cpu_mode) is true.
+ *
+ * If not, there is a pre-existing hypervisor, some CPUs failed to boot, or
+ * something else went wrong... in such cases, trying to install a new
+ * hypervisor is unlikely to work as desired.
+ *
+ * When you call into your shiny new hypervisor, sp_hyp will contain junk,
+ * so you will need to set that to something sensible at the new hypervisor's
+ * initialisation entry point.
+ */
+ENTRY(__hyp_get_vectors)
+	mov	r0, #-1
+ENDPROC(__hyp_get_vectors)
+	@ fall through
+ENTRY(__hyp_set_vectors)
+	__HVC(0)
+	bx	lr
+ENDPROC(__hyp_set_vectors)
+
+#ifndef ZIMAGE
+.align 2
+.L__boot_cpu_mode_offset:
+	.long	__boot_cpu_mode - .
+#endif
+
+.align 5
+__hyp_stub_vectors:
+__hyp_stub_reset:	W(b)	.
+__hyp_stub_und:		W(b)	.
+__hyp_stub_svc:		W(b)	.
+__hyp_stub_pabort:	W(b)	.
+__hyp_stub_dabort:	W(b)	.
+__hyp_stub_trap:	W(b)	__hyp_stub_do_trap
+__hyp_stub_irq:		W(b)	.
+__hyp_stub_fiq:		W(b)	.
+ENDPROC(__hyp_stub_vectors)
+
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index e29c3337ca8..8ef8c933780 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -45,10 +45,9 @@ int machine_kexec_prepare(struct kimage *image)
 	for (i = 0; i < image->nr_segments; i++) {
 		current_segment = &image->segment[i];
 
-		err = memblock_is_region_memory(current_segment->mem,
-						current_segment->memsz);
-		if (err)
-			return - EINVAL;
+		if (!memblock_is_region_memory(current_segment->mem,
+					       current_segment->memsz))
+			return -EINVAL;
 
 		err = get_user(header, (__be32*)current_segment->buf);
 		if (err)
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 93971b1a4f0..53c0304b734 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -96,6 +96,10 @@ armpmu_event_set_period(struct perf_event *event,
 	s64 period = hwc->sample_period;
 	int ret = 0;
 
+	/* The period may have been changed by PERF_EVENT_IOC_PERIOD */
+	if (unlikely(period != hwc->last_period))
+		left = period - (hwc->last_period - left);
+
 	if (unlikely(left <= -period)) {
 		left = period;
 		local64_set(&hwc->period_left, left);
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 04eea22d795..90084a6de35 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -381,13 +381,20 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start,
 	struct thread_info *thread = task_thread_info(p);
 	struct pt_regs *childregs = task_pt_regs(p);
 
-	*childregs = *regs;
-	childregs->ARM_r0 = 0;
-	childregs->ARM_sp = stack_start;
-
 	memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
-	thread->cpu_context.sp = (unsigned long)childregs;
+
+	if (likely(regs)) {
+		*childregs = *regs;
+		childregs->ARM_r0 = 0;
+		childregs->ARM_sp = stack_start;
+	} else {
+		memset(childregs, 0, sizeof(struct pt_regs));
+		thread->cpu_context.r4 = stk_sz;
+		thread->cpu_context.r5 = stack_start;
+		childregs->ARM_cpsr = SVC_MODE;
+	}
 	thread->cpu_context.pc = (unsigned long)ret_from_fork;
+	thread->cpu_context.sp = (unsigned long)childregs;
 
 	clear_ptrace_hw_breakpoint(p);
 
@@ -423,63 +430,6 @@ int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
 }
 EXPORT_SYMBOL(dump_fpu);
 
-/*
- * Shuffle the argument into the correct register before calling the
- * thread function.  r4 is the thread argument, r5 is the pointer to
- * the thread function, and r6 points to the exit function.
- */
-extern void kernel_thread_helper(void);
-asm(	".pushsection .text\n"
-"	.align\n"
-"	.type	kernel_thread_helper, #function\n"
-"kernel_thread_helper:\n"
-#ifdef CONFIG_TRACE_IRQFLAGS
-"	bl	trace_hardirqs_on\n"
-#endif
-"	msr	cpsr_c, r7\n"
-"	mov	r0, r4\n"
-"	mov	lr, r6\n"
-"	mov	pc, r5\n"
-"	.size	kernel_thread_helper, . - kernel_thread_helper\n"
-"	.popsection");
-
-#ifdef CONFIG_ARM_UNWIND
-extern void kernel_thread_exit(long code);
-asm(	".pushsection .text\n"
-"	.align\n"
-"	.type	kernel_thread_exit, #function\n"
-"kernel_thread_exit:\n"
-"	.fnstart\n"
-"	.cantunwind\n"
-"	bl	do_exit\n"
-"	nop\n"
-"	.fnend\n"
-"	.size	kernel_thread_exit, . - kernel_thread_exit\n"
-"	.popsection");
-#else
-#define kernel_thread_exit	do_exit
-#endif
-
-/*
- * Create a kernel thread.
- */
-pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
-{
-	struct pt_regs regs;
-
-	memset(&regs, 0, sizeof(regs));
-
-	regs.ARM_r4 = (unsigned long)arg;
-	regs.ARM_r5 = (unsigned long)fn;
-	regs.ARM_r6 = (unsigned long)kernel_thread_exit;
-	regs.ARM_r7 = SVC_MODE | PSR_ENDSTATE | PSR_ISETSTATE;
-	regs.ARM_pc = (unsigned long)kernel_thread_helper;
-	regs.ARM_cpsr = regs.ARM_r7 | PSR_I_BIT;
-
-	return do_fork(flags|CLONE_VM|CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
-}
-EXPORT_SYMBOL(kernel_thread);
-
 unsigned long get_wchan(struct task_struct *p)
 {
 	struct stackframe frame;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index febafa0f552..da1d1aa20ad 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -53,6 +53,7 @@
 #include <asm/traps.h>
 #include <asm/unwind.h>
 #include <asm/memblock.h>
+#include <asm/virt.h>
 
 #include "atags.h"
 #include "tcm.h"
@@ -703,6 +704,21 @@ static int __init meminfo_cmp(const void *_a, const void *_b)
 	return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
 }
 
+void __init hyp_mode_check(void)
+{
+#ifdef CONFIG_ARM_VIRT_EXT
+	if (is_hyp_mode_available()) {
+		pr_info("CPU: All CPU(s) started in HYP mode.\n");
+		pr_info("CPU: Virtualization extensions available.\n");
+	} else if (is_hyp_mode_mismatched()) {
+		pr_warn("CPU: WARNING: CPU(s) started in wrong/inconsistent modes (primary CPU mode 0x%x)\n",
+			__boot_cpu_mode & MODE_MASK);
+		pr_warn("CPU: This may indicate a broken bootloader or firmware.\n");
+	} else
+		pr_info("CPU: All CPU(s) started in SVC mode.\n");
+#endif
+}
+
 void __init setup_arch(char **cmdline_p)
 {
 	struct machine_desc *mdesc;
@@ -748,6 +764,10 @@ void __init setup_arch(char **cmdline_p)
 		smp_init_cpus();
 	}
 #endif
+
+	if (!is_smp())
+		hyp_mode_check();
+
 	reserve_crashkernel();
 
 	tcm_init();
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index f27789e4e38..56f72d257eb 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -10,7 +10,6 @@
 #include <linux/errno.h>
 #include <linux/signal.h>
 #include <linux/personality.h>
-#include <linux/freezer.h>
 #include <linux/uaccess.h>
 #include <linux/tracehook.h>
 
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index d100eacdb79..fbc8b2623d8 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -43,6 +43,7 @@
 #include <asm/ptrace.h>
 #include <asm/localtimer.h>
 #include <asm/smp_plat.h>
+#include <asm/virt.h>
 #include <asm/mach/arch.h>
 
 /*
@@ -202,8 +203,11 @@ int __cpuinit __cpu_disable(void)
 	/*
 	 * Flush user cache and TLB mappings, and then remove this CPU
 	 * from the vm mask set of all processes.
+	 *
+	 * Caches are flushed to the Level of Unification Inner Shareable
+	 * to write-back dirty lines to unified caches shared by all CPUs.
 	 */
-	flush_cache_all();
+	flush_cache_louis();
 	local_flush_tlb_all();
 
 	clear_tasks_mm_cpumask(cpu);
@@ -290,18 +294,24 @@ static void percpu_timer_setup(void);
 asmlinkage void __cpuinit secondary_start_kernel(void)
 {
 	struct mm_struct *mm = &init_mm;
-	unsigned int cpu = smp_processor_id();
+	unsigned int cpu;
+
+	/*
+	 * The identity mapping is uncached (strongly ordered), so
+	 * switch away from it before attempting any exclusive accesses.
+	 */
+	cpu_switch_mm(mm->pgd, mm);
+	enter_lazy_tlb(mm, current);
+	local_flush_tlb_all();
 
 	/*
 	 * All kernel threads share the same mm context; grab a
 	 * reference and switch to it.
 	 */
+	cpu = smp_processor_id();
 	atomic_inc(&mm->mm_count);
 	current->active_mm = mm;
 	cpumask_set_cpu(cpu, mm_cpumask(mm));
-	cpu_switch_mm(mm->pgd, mm);
-	enter_lazy_tlb(mm, current);
-	local_flush_tlb_all();
 
 	printk("CPU%u: Booted secondary processor\n", cpu);
 
@@ -355,6 +365,8 @@ void __init smp_cpus_done(unsigned int max_cpus)
 	       num_online_cpus(),
 	       bogosum / (500000/HZ),
 	       (bogosum / (5000/HZ)) % 100);
+
+	hyp_mode_check();
 }
 
 void __init smp_prepare_boot_cpu(void)
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index e1f906989bb..b22d700fea2 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -42,10 +42,10 @@ static void twd_set_mode(enum clock_event_mode mode,
 
 	switch (mode) {
 	case CLOCK_EVT_MODE_PERIODIC:
-		/* timer load already set up */
 		ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
 			| TWD_TIMER_CONTROL_PERIODIC;
-		__raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD);
+		__raw_writel(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
+			twd_base + TWD_TIMER_LOAD);
 		break;
 	case CLOCK_EVT_MODE_ONESHOT:
 		/* period set, and timer enabled in 'next_event' hook */
diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c
index 1794cc3b0f1..358bca3a995 100644
--- a/arch/arm/kernel/suspend.c
+++ b/arch/arm/kernel/suspend.c
@@ -17,6 +17,8 @@ extern void cpu_resume_mmu(void);
  */
 void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
 {
+	u32 *ctx = ptr;
+
 	*save_ptr = virt_to_phys(ptr);
 
 	/* This must correspond to the LDM in cpu_resume() assembly */
@@ -26,7 +28,20 @@ void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
 
 	cpu_do_suspend(ptr);
 
-	flush_cache_all();
+	flush_cache_louis();
+
+	/*
+	 * flush_cache_louis does not guarantee that
+	 * save_ptr and ptr are cleaned to main memory,
+	 * just up to the Level of Unification Inner Shareable.
+	 * Since the context pointer and context itself
+	 * are to be retrieved with the MMU off that
+	 * data must be cleaned from all cache levels
+	 * to main memory using "area" cache primitives.
+	*/
+	__cpuc_flush_dcache_area(ctx, ptrsz);
+	__cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr));
+
 	outer_clean_range(*save_ptr, *save_ptr + ptrsz);
 	outer_clean_range(virt_to_phys(save_ptr),
 			  virt_to_phys(save_ptr) + sizeof(*save_ptr));
diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c
index 76cbb055dd0..c2a898aa57a 100644
--- a/arch/arm/kernel/sys_arm.c
+++ b/arch/arm/kernel/sys_arm.c
@@ -59,69 +59,6 @@ asmlinkage int sys_vfork(struct pt_regs *regs)
 	return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->ARM_sp, regs, 0, NULL, NULL);
 }
 
-/* sys_execve() executes a new program.
- * This is called indirectly via a small wrapper
- */
-asmlinkage int sys_execve(const char __user *filenamei,
-			  const char __user *const __user *argv,
-			  const char __user *const __user *envp, struct pt_regs *regs)
-{
-	int error;
-	char * filename;
-
-	filename = getname(filenamei);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		goto out;
-	error = do_execve(filename, argv, envp, regs);
-	putname(filename);
-out:
-	return error;
-}
-
-int kernel_execve(const char *filename,
-		  const char *const argv[],
-		  const char *const envp[])
-{
-	struct pt_regs regs;
-	int ret;
-
-	memset(&regs, 0, sizeof(struct pt_regs));
-	ret = do_execve(filename,
-			(const char __user *const __user *)argv,
-			(const char __user *const __user *)envp, &regs);
-	if (ret < 0)
-		goto out;
-
-	/*
-	 * Save argc to the register structure for userspace.
-	 */
-	regs.ARM_r0 = ret;
-
-	/*
-	 * We were successful.  We won't be returning to our caller, but
-	 * instead to user space by manipulating the kernel stack.
-	 */
-	asm(	"add	r0, %0, %1\n\t"
-		"mov	r1, %2\n\t"
-		"mov	r2, %3\n\t"
-		"bl	memmove\n\t"	/* copy regs to top of stack */
-		"mov	r8, #0\n\t"	/* not a syscall */
-		"mov	r9, %0\n\t"	/* thread structure */
-		"mov	sp, r0\n\t"	/* reposition stack pointer */
-		"b	ret_to_user"
-		:
-		: "r" (current_thread_info()),
-		  "Ir" (THREAD_START_SP - sizeof(regs)),
-		  "r" (&regs),
-		  "Ir" (sizeof(regs))
-		: "r0", "r1", "r2", "r3", "r8", "r9", "ip", "lr", "memory");
-
- out:
-	return ret;
-}
-EXPORT_SYMBOL(kernel_execve);
-
 /*
  * Since loff_t is a 64 bit type we avoid a lot of ABI hassle
  * with a different argument ordering.
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index c8050b14e61..b1420710193 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -19,8 +19,8 @@ config AT91_SAM9G45_RESET
 
 config SOC_AT91SAM9
 	bool
-	select GENERIC_CLOCKEVENTS
 	select CPU_ARM926T
+	select GENERIC_CLOCKEVENTS
 
 menu "Atmel AT91 System-on-Chip"
 
@@ -28,66 +28,66 @@ comment "Atmel AT91 Processor"
 
 config SOC_AT91SAM9
 	bool
+	select AT91_SAM9_SMC
+	select AT91_SAM9_TIME
 	select CPU_ARM926T
 	select MULTI_IRQ_HANDLER
 	select SPARSE_IRQ
-	select AT91_SAM9_TIME
-	select AT91_SAM9_SMC
 
 config SOC_AT91RM9200
 	bool "AT91RM9200"
 	select CPU_ARM920T
-	select MULTI_IRQ_HANDLER
-	select SPARSE_IRQ
 	select GENERIC_CLOCKEVENTS
 	select HAVE_AT91_DBGU0
+	select MULTI_IRQ_HANDLER
+	select SPARSE_IRQ
 
 config SOC_AT91SAM9260
 	bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
-	select SOC_AT91SAM9
 	select HAVE_AT91_DBGU0
 	select HAVE_NET_MACB
+	select SOC_AT91SAM9
 	help
 	  Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
 	  or AT91SAM9G20 SoC.
 
 config SOC_AT91SAM9261
 	bool "AT91SAM9261 or AT91SAM9G10"
-	select SOC_AT91SAM9
 	select HAVE_AT91_DBGU0
 	select HAVE_FB_ATMEL
+	select SOC_AT91SAM9
 	help
 	  Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
 
 config SOC_AT91SAM9263
 	bool "AT91SAM9263"
-	select SOC_AT91SAM9
 	select HAVE_AT91_DBGU1
 	select HAVE_FB_ATMEL
 	select HAVE_NET_MACB
+	select SOC_AT91SAM9
 
 config SOC_AT91SAM9RL
 	bool "AT91SAM9RL"
-	select SOC_AT91SAM9
 	select HAVE_AT91_DBGU0
 	select HAVE_FB_ATMEL
+	select SOC_AT91SAM9
 
 config SOC_AT91SAM9G45
 	bool "AT91SAM9G45 or AT91SAM9M10 families"
-	select SOC_AT91SAM9
 	select HAVE_AT91_DBGU1
 	select HAVE_FB_ATMEL
 	select HAVE_NET_MACB
+	select SOC_AT91SAM9
 	help
 	  Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
 	  This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
 
 config SOC_AT91SAM9X5
 	bool "AT91SAM9x5 family"
-	select SOC_AT91SAM9
 	select HAVE_AT91_DBGU0
 	select HAVE_FB_ATMEL
 	select HAVE_NET_MACB
+	select SOC_AT91SAM9
 	help
 	  Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
 	  This means that your SAM9 name finishes with a '5' (except if it is
@@ -97,9 +97,9 @@ config SOC_AT91SAM9X5
 
 config SOC_AT91SAM9N12
 	bool "AT91SAM9N12 family"
-	select SOC_AT91SAM9
 	select HAVE_AT91_DBGU0
 	select HAVE_FB_ATMEL
+	select SOC_AT91SAM9
 	help
 	  Select this if you are using Atmel's AT91SAM9N12 SoC.
 
@@ -144,9 +144,9 @@ config ARCH_AT91SAM9G45
 config ARCH_AT91X40
 	bool "AT91x40"
 	depends on !MMU
+	select ARCH_USES_GETTIMEOFFSET
 	select MULTI_IRQ_HANDLER
 	select SPARSE_IRQ
-	select ARCH_USES_GETTIMEOFFSET
 
 endchoice
 
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 6f50c672227..b4f0565aff6 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -187,6 +187,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
 	CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
 	CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91rm9200", &twi_clk),
 	/* fake hclk clock */
 	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
 	CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c
index 9ac427a702d..a563189cdfc 100644
--- a/arch/arm/mach-at91/at91rm9200_devices.c
+++ b/arch/arm/mach-at91/at91rm9200_devices.c
@@ -511,7 +511,7 @@ static struct resource twi_resources[] = {
 };
 
 static struct platform_device at91rm9200_twi_device = {
-	.name		= "at91_i2c",
+	.name		= "i2c-at91rm9200",
 	.id		= -1,
 	.resource	= twi_resources,
 	.num_resources	= ARRAY_SIZE(twi_resources),
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index 30c7f26a466..ad29f93f20c 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -211,6 +211,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
 	CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
 	CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20", &twi_clk),
 	/* more usart lookup table for DT entries */
 	CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
 	CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
@@ -219,6 +221,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("usart", "fffd0000.serial", &usart3_clk),
 	CLKDEV_CON_DEV_ID("usart", "fffd4000.serial", &usart4_clk),
 	CLKDEV_CON_DEV_ID("usart", "fffd8000.serial", &usart5_clk),
+	CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
 	/* more tc lookup table for DT entries */
 	CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
 	CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index af50ff3281c..a76b8684f52 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -421,7 +421,6 @@ static struct resource twi_resources[] = {
 };
 
 static struct platform_device at91sam9260_twi_device = {
-	.name		= "at91_i2c",
 	.id		= -1,
 	.resource	= twi_resources,
 	.num_resources	= ARRAY_SIZE(twi_resources),
@@ -429,6 +428,13 @@ static struct platform_device at91sam9260_twi_device = {
 
 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 {
+	/* IP version is not the same on 9260 and g20 */
+	if (cpu_is_at91sam9g20()) {
+		at91sam9260_twi_device.name = "i2c-at91sam9g20";
+	} else {
+		at91sam9260_twi_device.name = "i2c-at91sam9260";
+	}
+
 	/* pins used for TWI interface */
 	at91_set_A_periph(AT91_PIN_PA23, 0);		/* TWD */
 	at91_set_multi_drive(AT91_PIN_PA23, 1);
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index f40762c5fed..8d999eb1a13 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -178,6 +178,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
 	CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
 	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9261", &twi_clk),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10", &twi_clk),
 	CLKDEV_CON_ID("pioA", &pioA_clk),
 	CLKDEV_CON_ID("pioB", &pioB_clk),
 	CLKDEV_CON_ID("pioC", &pioC_clk),
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 11e9fa835cd..9752f17efba 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -317,7 +317,6 @@ static struct resource twi_resources[] = {
 };
 
 static struct platform_device at91sam9261_twi_device = {
-	.name		= "at91_i2c",
 	.id		= -1,
 	.resource	= twi_resources,
 	.num_resources	= ARRAY_SIZE(twi_resources),
@@ -325,12 +324,19 @@ static struct platform_device at91sam9261_twi_device = {
 
 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 {
+	/* IP version is not the same on 9261 and g10 */
+	if (cpu_is_at91sam9g10()) {
+		at91sam9261_twi_device.name = "i2c-at91sam9g10";
+		/* I2C PIO must not be configured as open-drain on this chip */
+	} else {
+		at91sam9261_twi_device.name = "i2c-at91sam9261";
+		at91_set_multi_drive(AT91_PIN_PA7, 1);
+		at91_set_multi_drive(AT91_PIN_PA8, 1);
+	}
+
 	/* pins used for TWI interface */
 	at91_set_A_periph(AT91_PIN_PA7, 0);		/* TWD */
-	at91_set_multi_drive(AT91_PIN_PA7, 1);
-
 	at91_set_A_periph(AT91_PIN_PA8, 0);		/* TWCK */
-	at91_set_multi_drive(AT91_PIN_PA8, 1);
 
 	i2c_register_board_info(0, devices, nr_devices);
 	platform_device_register(&at91sam9261_twi_device);
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 144ef5de51b..6a01d0360df 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -193,6 +193,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
 	CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
 	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260", &twi_clk),
 	/* fake hclk clock */
 	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
 	CLKDEV_CON_ID("pioA", &pioA_clk),
@@ -210,6 +211,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("hclk", "a00000.ohci", &ohci_clk),
 	CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
 	CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
+	CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi_clk),
 };
 
 static struct clk_lookup usart_clocks_lookups[] = {
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index 7c0898fe20f..8dde220b42b 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -599,7 +599,7 @@ static struct resource twi_resources[] = {
 };
 
 static struct platform_device at91sam9263_twi_device = {
-	.name		= "at91_i2c",
+	.name		= "i2c-at91sam9260",
 	.id		= -1,
 	.resource	= twi_resources,
 	.num_resources	= ARRAY_SIZE(twi_resources),
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index ef6cedd52e3..84af1b506d9 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -237,6 +237,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
 	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb0_clk),
 	CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tcb0_clk),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.0", &twi0_clk),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g10.1", &twi1_clk),
 	CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
 	CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
 	CLKDEV_CON_DEV_ID(NULL, "atmel-trng", &trng_clk),
@@ -254,6 +256,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("t0_clk", "fffd4000.timer", &tcb0_clk),
 	CLKDEV_CON_DEV_ID("hclk", "700000.ohci", &uhphs_clk),
 	CLKDEV_CON_DEV_ID("ehci_clk", "800000.ehci", &uhphs_clk),
+	CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
+	CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
 	/* fake hclk clock */
 	CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
 	CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index e4c3b370920..b1596072dcc 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -653,7 +653,7 @@ static struct resource twi0_resources[] = {
 };
 
 static struct platform_device at91sam9g45_twi0_device = {
-	.name		= "at91_i2c",
+	.name		= "i2c-at91sam9g10",
 	.id		= 0,
 	.resource	= twi0_resources,
 	.num_resources	= ARRAY_SIZE(twi0_resources),
@@ -673,7 +673,7 @@ static struct resource twi1_resources[] = {
 };
 
 static struct platform_device at91sam9g45_twi1_device = {
-	.name		= "at91_i2c",
+	.name		= "i2c-at91sam9g10",
 	.id		= 1,
 	.resource	= twi1_resources,
 	.num_resources	= ARRAY_SIZE(twi1_resources),
@@ -686,18 +686,12 @@ void __init at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, in
 	/* pins used for TWI interface */
 	if (i2c_id == 0) {
 		at91_set_A_periph(AT91_PIN_PA20, 0);		/* TWD */
-		at91_set_multi_drive(AT91_PIN_PA20, 1);
-
 		at91_set_A_periph(AT91_PIN_PA21, 0);		/* TWCK */
-		at91_set_multi_drive(AT91_PIN_PA21, 1);
 
 		platform_device_register(&at91sam9g45_twi0_device);
 	} else {
 		at91_set_A_periph(AT91_PIN_PB10, 0);		/* TWD */
-		at91_set_multi_drive(AT91_PIN_PB10, 1);
-
 		at91_set_A_periph(AT91_PIN_PB11, 0);		/* TWCK */
-		at91_set_multi_drive(AT91_PIN_PB11, 1);
 
 		platform_device_register(&at91sam9g45_twi1_device);
 	}
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 08494664ab7..732d3d3f4ec 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -169,6 +169,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("t0_clk", "f8008000.timer", &tcb_clk),
 	CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb_clk),
 	CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
+	CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
+	CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
 	CLKDEV_CON_ID("pioA", &pioAB_clk),
 	CLKDEV_CON_ID("pioB", &pioAB_clk),
 	CLKDEV_CON_ID("pioC", &pioCD_clk),
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index 72ce50a50de..72e90841222 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -186,6 +186,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
 	CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
 	CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi0_clk),
+	CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.1", &twi1_clk),
 	CLKDEV_CON_ID("pioA", &pioA_clk),
 	CLKDEV_CON_ID("pioB", &pioB_clk),
 	CLKDEV_CON_ID("pioC", &pioC_clk),
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index deafea0e493..d6ca0543ce8 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -346,7 +346,7 @@ static struct resource twi_resources[] = {
 };
 
 static struct platform_device at91sam9rl_twi_device = {
-	.name		= "at91_i2c",
+	.name		= "i2c-at91sam9g20",
 	.id		= -1,
 	.resource	= twi_resources,
 	.num_resources	= ARRAY_SIZE(twi_resources),
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 477cf9d0667..e5035380dcb 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -231,6 +231,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
 	CLKDEV_CON_DEV_ID("t0_clk", "f800c000.timer", &tcb0_clk),
 	CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma0_clk),
 	CLKDEV_CON_DEV_ID("dma_clk", "ffffee00.dma-controller", &dma1_clk),
+	CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
+	CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
+	CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
 	CLKDEV_CON_ID("pioA", &pioAB_clk),
 	CLKDEV_CON_ID("pioB", &pioAB_clk),
 	CLKDEV_CON_ID("pioC", &pioCD_clk),
diff --git a/arch/arm/mach-at91/include/mach/at91_twi.h b/arch/arm/mach-at91/include/mach/at91_twi.h
deleted file mode 100644
index bb2880f6ba3..00000000000
--- a/arch/arm/mach-at91/include/mach/at91_twi.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91_twi.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Two-wire Interface (TWI) registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91_TWI_H
-#define AT91_TWI_H
-
-#define	AT91_TWI_CR		0x00		/* Control Register */
-#define		AT91_TWI_START		(1 <<  0)	/* Send a Start Condition */
-#define		AT91_TWI_STOP		(1 <<  1)	/* Send a Stop Condition */
-#define		AT91_TWI_MSEN		(1 <<  2)	/* Master Transfer Enable */
-#define		AT91_TWI_MSDIS		(1 <<  3)	/* Master Transfer Disable */
-#define		AT91_TWI_SVEN		(1 <<  4)	/* Slave Transfer Enable [SAM9260 only] */
-#define		AT91_TWI_SVDIS		(1 <<  5)	/* Slave Transfer Disable [SAM9260 only] */
-#define		AT91_TWI_SWRST		(1 <<  7)	/* Software Reset */
-
-#define	AT91_TWI_MMR		0x04		/* Master Mode Register */
-#define		AT91_TWI_IADRSZ		(3    <<  8)	/* Internal Device Address Size */
-#define			AT91_TWI_IADRSZ_NO		(0 << 8)
-#define			AT91_TWI_IADRSZ_1		(1 << 8)
-#define			AT91_TWI_IADRSZ_2		(2 << 8)
-#define			AT91_TWI_IADRSZ_3		(3 << 8)
-#define		AT91_TWI_MREAD		(1    << 12)	/* Master Read Direction */
-#define		AT91_TWI_DADR		(0x7f << 16)	/* Device Address */
-
-#define	AT91_TWI_SMR		0x08		/* Slave Mode Register [SAM9260 only] */
-#define		AT91_TWI_SADR		(0x7f << 16)	/* Slave Address */
-
-#define	AT91_TWI_IADR		0x0c		/* Internal Address Register */
-
-#define	AT91_TWI_CWGR		0x10		/* Clock Waveform Generator Register */
-#define		AT91_TWI_CLDIV		(0xff <<  0)	/* Clock Low Divisor */
-#define		AT91_TWI_CHDIV		(0xff <<  8)	/* Clock High Divisor */
-#define		AT91_TWI_CKDIV		(7    << 16)	/* Clock Divider */
-
-#define	AT91_TWI_SR		0x20		/* Status Register */
-#define		AT91_TWI_TXCOMP		(1 <<  0)	/* Transmission Complete */
-#define		AT91_TWI_RXRDY		(1 <<  1)	/* Receive Holding Register Ready */
-#define		AT91_TWI_TXRDY		(1 <<  2)	/* Transmit Holding Register Ready */
-#define		AT91_TWI_SVREAD		(1 <<  3)	/* Slave Read [SAM9260 only] */
-#define		AT91_TWI_SVACC		(1 <<  4)	/* Slave Access [SAM9260 only] */
-#define		AT91_TWI_GACC		(1 <<  5)	/* General Call Access [SAM9260 only] */
-#define		AT91_TWI_OVRE		(1 <<  6)	/* Overrun Error [AT91RM9200 only] */
-#define		AT91_TWI_UNRE		(1 <<  7)	/* Underrun Error [AT91RM9200 only] */
-#define		AT91_TWI_NACK		(1 <<  8)	/* Not Acknowledged */
-#define		AT91_TWI_ARBLST		(1 <<  9)	/* Arbitration Lost [SAM9260 only] */
-#define		AT91_TWI_SCLWS		(1 << 10)	/* Clock Wait State [SAM9260 only] */
-#define		AT91_TWI_EOSACC		(1 << 11)	/* End of Slave Address [SAM9260 only] */
-
-#define	AT91_TWI_IER		0x24		/* Interrupt Enable Register */
-#define	AT91_TWI_IDR		0x28		/* Interrupt Disable Register */
-#define	AT91_TWI_IMR		0x2c		/* Interrupt Mask Register */
-#define	AT91_TWI_RHR		0x30		/* Receive Holding Register */
-#define	AT91_TWI_THR		0x34		/* Transmit Holding Register */
-
-#endif
-
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 2c2d86505a5..5315f05896e 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -153,7 +153,9 @@ static int at91_pm_verify_clocks(void)
 		}
 	}
 
-#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
+	if (!IS_ENABLED(CONFIG_AT91_PROGRAMMABLE_CLOCKS))
+		return 1;
+
 	/* PCK0..PCK3 must be disabled, or configured to use clk32k */
 	for (i = 0; i < 4; i++) {
 		u32 css;
@@ -167,7 +169,6 @@ static int at91_pm_verify_clocks(void)
 			return 0;
 		}
 	}
-#endif
 
 	return 1;
 }
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index e6f52de1062..da9881b161e 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -87,7 +87,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
 	iotable_init(desc, 1);
 }
 
-static struct map_desc at91_io_desc __initdata = {
+static struct map_desc at91_io_desc __initdata __maybe_unused = {
 	.virtual	= (unsigned long)AT91_VA_BASE_SYS,
 	.pfn		= __phys_to_pfn(AT91_BASE_SYS),
 	.length		= SZ_16K,
diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig
index e6135363765..263242da2cb 100644
--- a/arch/arm/mach-clps711x/Kconfig
+++ b/arch/arm/mach-clps711x/Kconfig
@@ -23,9 +23,9 @@ config ARCH_CLEP7312
 
 config ARCH_EDB7211
 	bool "EDB7211"
-	select ISA
-	select ARCH_SPARSEMEM_ENABLE
 	select ARCH_SELECT_MEMORY_MODEL
+	select ARCH_SPARSEMEM_ENABLE
+	select ISA
 	help
 	  Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
 	  evaluation board.
diff --git a/arch/arm/mach-clps711x/autcpu12.c b/arch/arm/mach-clps711x/autcpu12.c
index 3fb79a1d0bd..32871918bb6 100644
--- a/arch/arm/mach-clps711x/autcpu12.c
+++ b/arch/arm/mach-clps711x/autcpu12.c
@@ -23,6 +23,8 @@
 #include <linux/string.h>
 #include <linux/mm.h>
 #include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
 
 #include <mach/hardware.h>
 #include <asm/sizes.h>
@@ -62,9 +64,26 @@ void __init autcpu12_map_io(void)
         iotable_init(autcpu12_io_desc, ARRAY_SIZE(autcpu12_io_desc));
 }
 
+static struct resource autcpu12_nvram_resource[] __initdata = {
+	DEFINE_RES_MEM_NAMED(AUTCPU12_PHYS_NVRAM, SZ_128K, "SRAM"),
+};
+
+static struct platform_device autcpu12_nvram_pdev __initdata = {
+	.name		= "autcpu12_nvram",
+	.id		= -1,
+	.resource	= autcpu12_nvram_resource,
+	.num_resources	= ARRAY_SIZE(autcpu12_nvram_resource),
+};
+
+static void __init autcpu12_init(void)
+{
+	platform_device_register(&autcpu12_nvram_pdev);
+}
+
 MACHINE_START(AUTCPU12, "autronix autcpu12")
 	/* Maintainer: Thomas Gleixner */
 	.atag_offset	= 0x20000,
+	.init_machine	= autcpu12_init,
 	.map_io		= autcpu12_map_io,
 	.init_irq	= clps711x_init_irq,
 	.timer		= &clps711x_timer,
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index ab99c3c3b75..f8eecb95941 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -4,12 +4,12 @@ config AINTC
 	bool
 
 config CP_INTC
-	select IRQ_DOMAIN
 	bool
+	select IRQ_DOMAIN
 
 config ARCH_DAVINCI_DMx
-	select CPU_ARM926T
 	bool
+	select CPU_ARM926T
 
 menu "TI DaVinci Implementations"
 
@@ -32,19 +32,19 @@ config ARCH_DAVINCI_DM646x
 
 config ARCH_DAVINCI_DA830
 	bool "DA830/OMAP-L137/AM17x based system"
-	select CP_INTC
 	select ARCH_DAVINCI_DA8XX
 	select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
+	select CP_INTC
 
 config ARCH_DAVINCI_DA850
 	bool "DA850/OMAP-L138/AM18x based system"
-	select CP_INTC
 	select ARCH_DAVINCI_DA8XX
 	select ARCH_HAS_CPUFREQ
+	select CP_INTC
 
 config ARCH_DAVINCI_DA8XX
-	select CPU_ARM926T
 	bool
+	select CPU_ARM926T
 
 config ARCH_DAVINCI_DM365
 	bool "DaVinci 365 based system"
@@ -52,9 +52,9 @@ config ARCH_DAVINCI_DM365
 	select ARCH_DAVINCI_DMx
 
 config ARCH_DAVINCI_TNETV107X
+	bool "TNETV107X based system"
 	select CPU_V6
 	select CP_INTC
-	bool "TNETV107X based system"
 
 comment "DaVinci Board Type"
 
@@ -103,9 +103,9 @@ config MACH_DAVINCI_DM6467_EVM
 	bool "TI DM6467 EVM"
 	default ARCH_DAVINCI_DM646x
 	depends on ARCH_DAVINCI_DM646x
-	select MACH_DAVINCI_DM6467TEVM
 	select EEPROM_AT24
 	select I2C
+	select MACH_DAVINCI_DM6467TEVM
 	help
 	  Configure this option to specify the whether the board used
 	  for development is a DM6467 EVM
@@ -127,8 +127,8 @@ config MACH_DAVINCI_DA830_EVM
 	bool "TI DA830/OMAP-L137/AM17x Reference Platform"
 	default ARCH_DAVINCI_DA830
 	depends on ARCH_DAVINCI_DA830
-	select GPIO_PCF857X
 	select EEPROM_AT24
+	select GPIO_PCF857X
 	select I2C
 	help
 	  Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module.
@@ -186,6 +186,13 @@ config DA850_UI_RMII
 	  NOTE: Please take care while choosing this option, MII PHY will
 	  not be functional if RMII mode is selected.
 
+config DA850_UI_SD_VIDEO_PORT
+	bool "Video Port Interface"
+	help
+	  Say Y if you want to use Video Port Interface (VPIF) on the
+	  DA850/OMAP-L138 EVM. The Video decoders/encoders are found on the
+	  UI daughter card that is supplied with the EVM.
+
 endchoice
 
 config DA850_WL12XX
diff --git a/arch/arm/mach-davinci/asp.h b/arch/arm/mach-davinci/asp.h
new file mode 100644
index 00000000000..d9b2acd1239
--- /dev/null
+++ b/arch/arm/mach-davinci/asp.h
@@ -0,0 +1,49 @@
+/*
+ * TI DaVinci Audio definitions
+ */
+#ifndef __ASM_ARCH_DAVINCI_ASP_H
+#define __ASM_ARCH_DAVINCI_ASP_H
+
+/* Bases of dm644x and dm355 register banks */
+#define DAVINCI_ASP0_BASE	0x01E02000
+#define DAVINCI_ASP1_BASE	0x01E04000
+
+/* Bases of dm365 register banks */
+#define DAVINCI_DM365_ASP0_BASE	0x01D02000
+
+/* Bases of dm646x register banks */
+#define DAVINCI_DM646X_MCASP0_REG_BASE		0x01D01000
+#define DAVINCI_DM646X_MCASP1_REG_BASE		0x01D01800
+
+/* Bases of da850/da830 McASP0  register banks */
+#define DAVINCI_DA8XX_MCASP0_REG_BASE	0x01D00000
+
+/* Bases of da830 McASP1 register banks */
+#define DAVINCI_DA830_MCASP1_REG_BASE	0x01D04000
+
+/* EDMA channels of dm644x and dm355 */
+#define DAVINCI_DMA_ASP0_TX	2
+#define DAVINCI_DMA_ASP0_RX	3
+#define DAVINCI_DMA_ASP1_TX	8
+#define DAVINCI_DMA_ASP1_RX	9
+
+/* EDMA channels of dm646x */
+#define DAVINCI_DM646X_DMA_MCASP0_AXEVT0	6
+#define DAVINCI_DM646X_DMA_MCASP0_AREVT0	9
+#define DAVINCI_DM646X_DMA_MCASP1_AXEVT1	12
+
+/* EDMA channels of da850/da830 McASP0 */
+#define DAVINCI_DA8XX_DMA_MCASP0_AREVT	0
+#define DAVINCI_DA8XX_DMA_MCASP0_AXEVT	1
+
+/* EDMA channels of da830 McASP1 */
+#define DAVINCI_DA830_DMA_MCASP1_AREVT	2
+#define DAVINCI_DA830_DMA_MCASP1_AXEVT	3
+
+/* Interrupts */
+#define DAVINCI_ASP0_RX_INT	IRQ_MBRINT
+#define DAVINCI_ASP0_TX_INT	IRQ_MBXINT
+#define DAVINCI_ASP1_RX_INT	IRQ_MBRINT
+#define DAVINCI_ASP1_TX_INT	IRQ_MBXINT
+
+#endif /* __ASM_ARCH_DAVINCI_ASP_H */
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 1295e616cee..32ee3f89596 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -45,6 +45,9 @@
 #include <linux/platform_data/mtd-davinci-aemif.h>
 #include <linux/platform_data/spi-davinci.h>
 
+#include <media/tvp514x.h>
+#include <media/adv7343.h>
+
 #define DA850_EVM_PHY_ID		"davinci_mdio-0:00"
 #define DA850_LCD_PWR_PIN		GPIO_TO_PIN(2, 8)
 #define DA850_LCD_BL_PIN		GPIO_TO_PIN(2, 15)
@@ -452,6 +455,15 @@ static void da850_evm_ui_keys_init(unsigned gpio)
 	}
 }
 
+#ifdef CONFIG_DA850_UI_SD_VIDEO_PORT
+static inline void da850_evm_setup_video_port(int video_sel)
+{
+	gpio_set_value_cansleep(video_sel, 0);
+}
+#else
+static inline void da850_evm_setup_video_port(int video_sel) { }
+#endif
+
 static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
 						unsigned ngpio, void *c)
 {
@@ -497,6 +509,8 @@ static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
 
 	da850_evm_setup_emac_rmii(sel_a);
 
+	da850_evm_setup_video_port(sel_c);
+
 	return 0;
 
 exp_setup_keys_fail:
@@ -1149,6 +1163,169 @@ static __init int da850_evm_init_cpufreq(void)
 static __init int da850_evm_init_cpufreq(void) { return 0; }
 #endif
 
+#if defined(CONFIG_DA850_UI_SD_VIDEO_PORT)
+
+#define TVP5147_CH0		"tvp514x-0"
+#define TVP5147_CH1		"tvp514x-1"
+
+/* VPIF capture configuration */
+static struct tvp514x_platform_data tvp5146_pdata = {
+		.clk_polarity = 0,
+		.hs_polarity  = 1,
+		.vs_polarity  = 1,
+};
+
+#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
+
+static const struct vpif_input da850_ch0_inputs[] = {
+	{
+		.input = {
+			.index = 0,
+			.name  = "Composite",
+			.type  = V4L2_INPUT_TYPE_CAMERA,
+			.capabilities = V4L2_IN_CAP_STD,
+			.std   = TVP514X_STD_ALL,
+		},
+		.input_route = INPUT_CVBS_VI2B,
+		.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+		.subdev_name = TVP5147_CH0,
+	},
+};
+
+static const struct vpif_input da850_ch1_inputs[] = {
+	{
+		.input = {
+			.index = 0,
+			.name  = "S-Video",
+			.type  = V4L2_INPUT_TYPE_CAMERA,
+			.capabilities = V4L2_IN_CAP_STD,
+			.std   = TVP514X_STD_ALL,
+		},
+		.input_route = INPUT_SVIDEO_VI2C_VI1C,
+		.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
+		.subdev_name = TVP5147_CH1,
+	},
+};
+
+static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = {
+	{
+		.name = TVP5147_CH0,
+		.board_info = {
+			I2C_BOARD_INFO("tvp5146", 0x5d),
+			.platform_data = &tvp5146_pdata,
+		},
+	},
+	{
+		.name = TVP5147_CH1,
+		.board_info = {
+			I2C_BOARD_INFO("tvp5146", 0x5c),
+			.platform_data = &tvp5146_pdata,
+		},
+	},
+};
+
+static struct vpif_capture_config da850_vpif_capture_config = {
+	.subdev_info = da850_vpif_capture_sdev_info,
+	.subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info),
+	.chan_config[0] = {
+		.inputs = da850_ch0_inputs,
+		.input_count = ARRAY_SIZE(da850_ch0_inputs),
+		.vpif_if = {
+			.if_type = VPIF_IF_BT656,
+			.hd_pol  = 1,
+			.vd_pol  = 1,
+			.fid_pol = 0,
+		},
+	},
+	.chan_config[1] = {
+		.inputs = da850_ch1_inputs,
+		.input_count = ARRAY_SIZE(da850_ch1_inputs),
+		.vpif_if = {
+			.if_type = VPIF_IF_BT656,
+			.hd_pol  = 1,
+			.vd_pol  = 1,
+			.fid_pol = 0,
+		},
+	},
+	.card_name = "DA850/OMAP-L138 Video Capture",
+};
+
+/* VPIF display configuration */
+static struct vpif_subdev_info da850_vpif_subdev[] = {
+	{
+		.name = "adv7343",
+		.board_info = {
+			I2C_BOARD_INFO("adv7343", 0x2a),
+		},
+	},
+};
+
+static const struct vpif_output da850_ch0_outputs[] = {
+	{
+		.output = {
+			.index = 0,
+			.name = "Composite",
+			.type = V4L2_OUTPUT_TYPE_ANALOG,
+			.capabilities = V4L2_OUT_CAP_STD,
+			.std = V4L2_STD_ALL,
+		},
+		.subdev_name = "adv7343",
+		.output_route = ADV7343_COMPOSITE_ID,
+	},
+	{
+		.output = {
+			.index = 1,
+			.name = "S-Video",
+			.type = V4L2_OUTPUT_TYPE_ANALOG,
+			.capabilities = V4L2_OUT_CAP_STD,
+			.std = V4L2_STD_ALL,
+		},
+		.subdev_name = "adv7343",
+		.output_route = ADV7343_SVIDEO_ID,
+	},
+};
+
+static struct vpif_display_config da850_vpif_display_config = {
+	.subdevinfo   = da850_vpif_subdev,
+	.subdev_count = ARRAY_SIZE(da850_vpif_subdev),
+	.chan_config[0] = {
+		.outputs = da850_ch0_outputs,
+		.output_count = ARRAY_SIZE(da850_ch0_outputs),
+	},
+	.card_name    = "DA850/OMAP-L138 Video Display",
+};
+
+static __init void da850_vpif_init(void)
+{
+	int ret;
+
+	ret = da850_register_vpif();
+	if (ret)
+		pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret);
+
+	ret = davinci_cfg_reg_list(da850_vpif_capture_pins);
+	if (ret)
+		pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n",
+			ret);
+
+	ret = da850_register_vpif_capture(&da850_vpif_capture_config);
+	if (ret)
+		pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret);
+
+	ret = davinci_cfg_reg_list(da850_vpif_display_pins);
+	if (ret)
+		pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n",
+			ret);
+
+	ret = da850_register_vpif_display(&da850_vpif_display_config);
+	if (ret)
+		pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret);
+}
+
+#else
+static __init void da850_vpif_init(void) {}
+#endif
+
 #ifdef CONFIG_DA850_WL12XX
 
 static void wl12xx_set_power(int index, bool power_on)
@@ -1375,6 +1552,8 @@ static __init void da850_evm_init(void)
 		pr_warning("da850_evm_init: suspend registration failed: %d\n",
 				ret);
 
+	da850_vpif_init();
+
 	ret = da8xx_register_spi(1, da850evm_spi_info,
 				 ARRAY_SIZE(da850evm_spi_info));
 	if (ret)
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index ca72fc4b8cc..f22572cee49 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -23,6 +23,7 @@
 #include <linux/phy.h>
 #include <linux/clk.h>
 #include <linux/videodev2.h>
+#include <linux/v4l2-dv-timings.h>
 #include <linux/export.h>
 
 #include <media/tvp514x.h>
@@ -620,7 +621,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
 	{
 		.name		= "ntsc",
 		.timings_type	= VPBE_ENC_STD,
-		.timings	= {V4L2_STD_525_60},
+		.std_id		= V4L2_STD_525_60,
 		.interlaced	= 1,
 		.xres		= 720,
 		.yres		= 480,
@@ -632,7 +633,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
 	{
 		.name		= "pal",
 		.timings_type	= VPBE_ENC_STD,
-		.timings	= {V4L2_STD_625_50},
+		.std_id		= V4L2_STD_625_50,
 		.interlaced	= 1,
 		.xres		= 720,
 		.yres		= 576,
@@ -647,8 +648,8 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
 static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
 	{
 		.name		= "480p59_94",
-		.timings_type	= VPBE_ENC_DV_PRESET,
-		.timings	= {V4L2_DV_480P59_94},
+		.timings_type	= VPBE_ENC_CUSTOM_TIMINGS,
+		.dv_timings	= V4L2_DV_BT_CEA_720X480P59_94,
 		.interlaced	= 0,
 		.xres		= 720,
 		.yres		= 480,
@@ -659,8 +660,8 @@ static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
 	},
 	{
 		.name		= "576p50",
-		.timings_type	= VPBE_ENC_DV_PRESET,
-		.timings	= {V4L2_DV_576P50},
+		.timings_type	= VPBE_ENC_CUSTOM_TIMINGS,
+		.dv_timings	= V4L2_DV_BT_CEA_720X576P50,
 		.interlaced	= 0,
 		.xres		= 720,
 		.yres		= 576,
@@ -698,7 +699,7 @@ static struct vpbe_output dm644xevm_vpbe_outputs[] = {
 			.index		= 1,
 			.name		= "Component",
 			.type		= V4L2_OUTPUT_TYPE_ANALOG,
-			.capabilities	= V4L2_OUT_CAP_PRESETS,
+			.capabilities	= V4L2_OUT_CAP_DV_TIMINGS,
 		},
 		.subdev_name	= VPBE_VENC_SUBDEV_NAME,
 		.default_mode	= "480p59_94",
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 9944367b493..1dbf85beed1 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -26,6 +26,7 @@
 #include <linux/i2c/pcf857x.h>
 
 #include <media/tvp514x.h>
+#include <media/adv7343.h>
 
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
@@ -496,18 +497,49 @@ static struct vpif_subdev_info dm646x_vpif_subdev[] = {
 	},
 };
 
-static const char *output[] = {
-	"Composite",
-	"Component",
-	"S-Video",
+static const struct vpif_output dm6467_ch0_outputs[] = {
+	{
+		.output = {
+			.index = 0,
+			.name = "Composite",
+			.type = V4L2_OUTPUT_TYPE_ANALOG,
+			.capabilities = V4L2_OUT_CAP_STD,
+			.std = V4L2_STD_ALL,
+		},
+		.subdev_name = "adv7343",
+		.output_route = ADV7343_COMPOSITE_ID,
+	},
+	{
+		.output = {
+			.index = 1,
+			.name = "Component",
+			.type = V4L2_OUTPUT_TYPE_ANALOG,
+			.capabilities = V4L2_OUT_CAP_CUSTOM_TIMINGS,
+		},
+		.subdev_name = "adv7343",
+		.output_route = ADV7343_COMPONENT_ID,
+	},
+	{
+		.output = {
+			.index = 2,
+			.name = "S-Video",
+			.type = V4L2_OUTPUT_TYPE_ANALOG,
+			.capabilities = V4L2_OUT_CAP_STD,
+			.std = V4L2_STD_ALL,
+		},
+		.subdev_name = "adv7343",
+		.output_route = ADV7343_SVIDEO_ID,
+	},
 };
 
 static struct vpif_display_config dm646x_vpif_display_config = {
 	.set_clock	= set_vpif_clock,
 	.subdevinfo	= dm646x_vpif_subdev,
 	.subdev_count	= ARRAY_SIZE(dm646x_vpif_subdev),
-	.output		= output,
-	.output_count	= ARRAY_SIZE(output),
+	.chan_config[0] = {
+		.outputs = dm6467_ch0_outputs,
+		.output_count = ARRAY_SIZE(dm6467_ch0_outputs),
+	},
 	.card_name	= "DM646x EVM",
 };
 
@@ -601,15 +633,6 @@ static struct vpif_subdev_info vpif_capture_sdev_info[] = {
 			I2C_BOARD_INFO("tvp5146", 0x5d),
 			.platform_data = &tvp5146_pdata,
 		},
-		.input = INPUT_CVBS_VI2B,
-		.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
-		.can_route = 1,
-		.vpif_if = {
-			.if_type = VPIF_IF_BT656,
-			.hd_pol = 1,
-			.vd_pol = 1,
-			.fid_pol = 0,
-		},
 	},
 	{
 		.name	= TVP5147_CH1,
@@ -617,15 +640,6 @@ static struct vpif_subdev_info vpif_capture_sdev_info[] = {
 			I2C_BOARD_INFO("tvp5146", 0x5c),
 			.platform_data = &tvp5146_pdata,
 		},
-		.input = INPUT_SVIDEO_VI2C_VI1C,
-		.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
-		.can_route = 1,
-		.vpif_if = {
-			.if_type = VPIF_IF_BT656,
-			.hd_pol = 1,
-			.vd_pol = 1,
-			.fid_pol = 0,
-		},
 	},
 };
 
@@ -635,9 +649,12 @@ static const struct vpif_input dm6467_ch0_inputs[] = {
 			.index = 0,
 			.name = "Composite",
 			.type = V4L2_INPUT_TYPE_CAMERA,
+			.capabilities = V4L2_IN_CAP_STD,
 			.std = TVP514X_STD_ALL,
 		},
 		.subdev_name = TVP5147_CH0,
+		.input_route = INPUT_CVBS_VI2B,
+		.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 	},
 };
 
@@ -647,9 +664,12 @@ static const struct vpif_input dm6467_ch1_inputs[] = {
 			.index = 0,
 			.name = "S-Video",
 			.type = V4L2_INPUT_TYPE_CAMERA,
+			.capabilities = V4L2_IN_CAP_STD,
 			.std = TVP514X_STD_ALL,
 		},
 		.subdev_name = TVP5147_CH1,
+		.input_route = INPUT_SVIDEO_VI2C_VI1C,
+		.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 	},
 };
 
@@ -661,10 +681,22 @@ static struct vpif_capture_config dm646x_vpif_capture_cfg = {
 	.chan_config[0] = {
 		.inputs = dm6467_ch0_inputs,
 		.input_count = ARRAY_SIZE(dm6467_ch0_inputs),
+		.vpif_if = {
+			.if_type = VPIF_IF_BT656,
+			.hd_pol = 1,
+			.vd_pol = 1,
+			.fid_pol = 0,
+		},
 	},
 	.chan_config[1] = {
 		.inputs = dm6467_ch1_inputs,
 		.input_count = ARRAY_SIZE(dm6467_ch1_inputs),
+		.vpif_if = {
+			.if_type = VPIF_IF_BT656,
+			.hd_pol = 1,
+			.vd_pol = 1,
+			.fid_pol = 0,
+		},
 	},
 };
 
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 6676dee7104..b90c172d554 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -347,6 +347,13 @@ static struct clk spi1_clk = {
 	.flags		= DA850_CLK_ASYNC3,
 };
 
+static struct clk vpif_clk = {
+	.name		= "vpif",
+	.parent		= &pll0_sysclk2,
+	.lpsc		= DA850_LPSC1_VPIF,
+	.gpsc		= 1,
+};
+
 static struct clk sata_clk = {
 	.name		= "sata",
 	.parent		= &pll0_sysclk2,
@@ -397,6 +404,7 @@ static struct clk_lookup da850_clks[] = {
 	CLK(NULL,		"usb20",	&usb20_clk),
 	CLK("spi_davinci.0",	NULL,		&spi0_clk),
 	CLK("spi_davinci.1",	NULL,		&spi1_clk),
+	CLK("vpif",		NULL,		&vpif_clk),
 	CLK("ahci",		NULL,		&sata_clk),
 	CLK(NULL,		NULL,		NULL),
 };
@@ -573,6 +581,46 @@ static const struct mux_config da850_pins[] = {
 	MUX_CFG(DA850, GPIO6_10,	13,	20,	15,	8,	false)
 	MUX_CFG(DA850, GPIO6_13,	13,	8,	15,	8,	false)
 	MUX_CFG(DA850, RTC_ALARM,	0,	28,	15,	2,	false)
+	/* VPIF Capture */
+	MUX_CFG(DA850, VPIF_DIN0,	15,	4,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN1,	15,	0,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN2,	14,	28,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN3,	14,	24,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN4,	14,	20,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN5,	14,	16,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN6,	14,	12,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN7,	14,	8,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN8,	16,	4,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN9,	16,	0,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN10,	15,	28,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN11,	15,	24,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN12,	15,	20,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN13,	15,	16,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN14,	15,	12,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DIN15,	15,	8,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_CLKIN0,	14,	0,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_CLKIN1,	14,	4,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_CLKIN2,	19,	8,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_CLKIN3,	19,	16,	15,	1,	false)
+	/* VPIF Display */
+	MUX_CFG(DA850, VPIF_DOUT0,	17,	4,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT1,	17,	0,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT2,	16,	28,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT3,	16,	24,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT4,	16,	20,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT5,	16,	16,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT6,	16,	12,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT7,	16,	8,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT8,	18,	4,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT9,	18,	0,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT10,	17,	28,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT11,	17,	24,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT12,	17,	20,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT13,	17,	16,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT14,	17,	12,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_DOUT15,	17,	8,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_CLKO2,	19,	12,	15,	1,	false)
+	MUX_CFG(DA850, VPIF_CLKO3,	19,	20,	15,	1,	false)
 #endif
 };
 
@@ -595,6 +643,26 @@ const short da850_lcdcntl_pins[] __initconst = {
 	-1
 };
 
+const short da850_vpif_capture_pins[] __initdata = {
+	DA850_VPIF_DIN0, DA850_VPIF_DIN1, DA850_VPIF_DIN2, DA850_VPIF_DIN3,
+	DA850_VPIF_DIN4, DA850_VPIF_DIN5, DA850_VPIF_DIN6, DA850_VPIF_DIN7,
+	DA850_VPIF_DIN8, DA850_VPIF_DIN9, DA850_VPIF_DIN10, DA850_VPIF_DIN11,
+	DA850_VPIF_DIN12, DA850_VPIF_DIN13, DA850_VPIF_DIN14, DA850_VPIF_DIN15,
+	DA850_VPIF_CLKIN0, DA850_VPIF_CLKIN1, DA850_VPIF_CLKIN2,
+	DA850_VPIF_CLKIN3,
+	-1
+};
+
+const short da850_vpif_display_pins[] __initdata = {
+	DA850_VPIF_DOUT0, DA850_VPIF_DOUT1, DA850_VPIF_DOUT2, DA850_VPIF_DOUT3,
+	DA850_VPIF_DOUT4, DA850_VPIF_DOUT5, DA850_VPIF_DOUT6, DA850_VPIF_DOUT7,
+	DA850_VPIF_DOUT8, DA850_VPIF_DOUT9, DA850_VPIF_DOUT10,
+	DA850_VPIF_DOUT11, DA850_VPIF_DOUT12, DA850_VPIF_DOUT13,
+	DA850_VPIF_DOUT14, DA850_VPIF_DOUT15, DA850_VPIF_CLKO2,
+	DA850_VPIF_CLKO3,
+	-1
+};
+
 /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
 static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
 	[IRQ_DA8XX_COMMTX]		= 7,
@@ -939,7 +1007,7 @@ static struct platform_device da850_cpufreq_device = {
 
 unsigned int da850_max_speed = 300000;
 
-int __init da850_register_cpufreq(char *async_clk)
+int da850_register_cpufreq(char *async_clk)
 {
 	int i;
 
@@ -1064,6 +1132,90 @@ no_ddrpll_mem:
 	return ret;
 }
 
+/* VPIF resource, platform data */
+static u64 da850_vpif_dma_mask = DMA_BIT_MASK(32);
+
+static struct resource da850_vpif_resource[] = {
+	{
+		.start = DA8XX_VPIF_BASE,
+		.end   = DA8XX_VPIF_BASE + 0xfff,
+		.flags = IORESOURCE_MEM,
+	}
+};
+
+static struct platform_device da850_vpif_dev = {
+	.name		= "vpif",
+	.id		= -1,
+	.dev		= {
+		.dma_mask		= &da850_vpif_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.resource	= da850_vpif_resource,
+	.num_resources	= ARRAY_SIZE(da850_vpif_resource),
+};
+
+static struct resource da850_vpif_display_resource[] = {
+	{
+		.start = IRQ_DA850_VPIFINT,
+		.end   = IRQ_DA850_VPIFINT,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device da850_vpif_display_dev = {
+	.name		= "vpif_display",
+	.id		= -1,
+	.dev		= {
+		.dma_mask		= &da850_vpif_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.resource       = da850_vpif_display_resource,
+	.num_resources  = ARRAY_SIZE(da850_vpif_display_resource),
+};
+
+static struct resource da850_vpif_capture_resource[] = {
+	{
+		.start = IRQ_DA850_VPIFINT,
+		.end   = IRQ_DA850_VPIFINT,
+		.flags = IORESOURCE_IRQ,
+	},
+	{
+		.start = IRQ_DA850_VPIFINT,
+		.end   = IRQ_DA850_VPIFINT,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device da850_vpif_capture_dev = {
+	.name		= "vpif_capture",
+	.id		= -1,
+	.dev		= {
+		.dma_mask		= &da850_vpif_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+	.resource       = da850_vpif_capture_resource,
+	.num_resources  = ARRAY_SIZE(da850_vpif_capture_resource),
+};
+
+int __init da850_register_vpif(void)
+{
+	return platform_device_register(&da850_vpif_dev);
+}
+
+int __init da850_register_vpif_display(struct vpif_display_config
+						*display_config)
+{
+	da850_vpif_display_dev.dev.platform_data = display_config;
+	return platform_device_register(&da850_vpif_display_dev);
+}
+
+int __init da850_register_vpif_capture(struct vpif_capture_config
+							*capture_config)
+{
+	da850_vpif_capture_dev.dev.platform_data = capture_config;
+	return platform_device_register(&da850_vpif_capture_dev);
+}
+
 static struct davinci_soc_info davinci_soc_info_da850 = {
 	.io_desc		= da850_io_desc,
 	.io_desc_num		= ARRAY_SIZE(da850_io_desc),
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index a37fc44e29b..12d544befcf 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -22,10 +22,10 @@
 #include <linux/davinci_emac.h>
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
-
-#include <mach/asp.h>
+#include <linux/platform_data/davinci_asp.h>
 #include <linux/platform_data/keyscan-davinci.h>
 #include <mach/hardware.h>
+#include <mach/edma.h>
 
 #include <media/davinci/vpfe_capture.h>
 #include <media/davinci/vpif_types.h>
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 783eab6845c..bd2f72b414b 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -24,6 +24,7 @@
 #include <mach/cpuidle.h>
 
 #include "clock.h"
+#include "asp.h"
 
 #define DA8XX_TPCC_BASE			0x01c00000
 #define DA8XX_TPTC0_BASE		0x01c08000
@@ -505,15 +506,8 @@ static struct platform_device da850_mcasp_device = {
 	.resource	= da850_mcasp_resources,
 };
 
-static struct platform_device davinci_pcm_device = {
-	.name	= "davinci-pcm-audio",
-	.id	= -1,
-};
-
 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
 {
-	platform_device_register(&davinci_pcm_device);
-
 	/* DA830/OMAP-L137 has 3 instances of McASP */
 	if (cpu_is_davinci_da830() && id == 1) {
 		da830_mcasp1_device.dev.platform_data = pdata;
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index 3a42b6f79aa..4c48a36ee56 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -313,16 +313,6 @@ static void davinci_init_wdt(void)
 
 /*-------------------------------------------------------------------------*/
 
-static struct platform_device davinci_pcm_device = {
-	.name		= "davinci-pcm-audio",
-	.id		= -1,
-};
-
-static void davinci_init_pcm(void)
-{
-	platform_device_register(&davinci_pcm_device);
-}
-
 /*-------------------------------------------------------------------------*/
 
 struct davinci_timer_instance davinci_timer_instance[2] = {
@@ -345,7 +335,6 @@ static int __init davinci_init_devices(void)
 	/* please keep these calls, and their implementations above,
 	 * in alphabetical order so they're easier to sort through.
 	 */
-	davinci_init_pcm();
 	davinci_init_wdt();
 
 	return 0;
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index adbde33eca0..a255434908d 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -26,13 +26,13 @@
 #include <mach/time.h>
 #include <mach/serial.h>
 #include <mach/common.h>
-#include <mach/asp.h>
 #include <linux/platform_data/spi-davinci.h>
 #include <mach/gpio-davinci.h>
 
 #include "davinci.h"
 #include "clock.h"
 #include "mux.h"
+#include "asp.h"
 
 #define DM355_UART2_BASE	(IO_PHYS + 0x206000)
 
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 719e22f2a37..b680c832e0b 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -29,7 +29,6 @@
 #include <mach/time.h>
 #include <mach/serial.h>
 #include <mach/common.h>
-#include <mach/asp.h>
 #include <linux/platform_data/keyscan-davinci.h>
 #include <linux/platform_data/spi-davinci.h>
 #include <mach/gpio-davinci.h>
@@ -37,6 +36,7 @@
 #include "davinci.h"
 #include "clock.h"
 #include "mux.h"
+#include "asp.h"
 
 #define DM365_REF_FREQ		24000000	/* 24 MHz on the DM365 EVM */
 
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index c8b866657fc..cd0c8b1e1ec 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -23,12 +23,12 @@
 #include <mach/time.h>
 #include <mach/serial.h>
 #include <mach/common.h>
-#include <mach/asp.h>
 #include <mach/gpio-davinci.h>
 
 #include "davinci.h"
 #include "clock.h"
 #include "mux.h"
+#include "asp.h"
 
 /*
  * Device specific clocks
@@ -701,7 +701,7 @@ static struct resource dm644x_venc_resources[] = {
 #define DM644X_VPSS_DACCLKEN                  BIT(4)
 
 static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
-				   unsigned int mode)
+				   unsigned int pclock)
 {
 	int ret = 0;
 	u32 v = DM644X_VPSS_VENCLKEN;
@@ -711,27 +711,18 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
 		v |= DM644X_VPSS_DACCLKEN;
 		writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
 		break;
-	case VPBE_ENC_DV_PRESET:
-		switch (mode) {
-		case V4L2_DV_480P59_94:
-		case V4L2_DV_576P50:
+	case VPBE_ENC_CUSTOM_TIMINGS:
+		if (pclock <= 27000000) {
 			v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
 			     DM644X_VPSS_DACCLKEN;
 			writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
-			break;
-		case V4L2_DV_720P60:
-		case V4L2_DV_1080I60:
-		case V4L2_DV_1080P30:
+		} else {
 			/*
 			 * For HD, use external clock source since
 			 * HD requires higher clock rate
 			 */
 			v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE;
 			writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
-			break;
-		default:
-			ret = -EINVAL;
-			break;
 		}
 		break;
 	default:
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 9eb87c1d1ed..97c0f8e555b 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -24,12 +24,12 @@
 #include <mach/time.h>
 #include <mach/serial.h>
 #include <mach/common.h>
-#include <mach/asp.h>
 #include <mach/gpio-davinci.h>
 
 #include "davinci.h"
 #include "clock.h"
 #include "mux.h"
+#include "asp.h"
 
 #define DAVINCI_VPIF_BASE       (0x01C12000)
 
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h
deleted file mode 100644
index 9aa240909a2..00000000000
--- a/arch/arm/mach-davinci/include/mach/asp.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * <mach/asp.h> - DaVinci Audio Serial Port support
- */
-#ifndef __ASM_ARCH_DAVINCI_ASP_H
-#define __ASM_ARCH_DAVINCI_ASP_H
-
-#include <mach/irqs.h>
-#include <mach/edma.h>
-
-/* Bases of dm644x and dm355 register banks */
-#define DAVINCI_ASP0_BASE	0x01E02000
-#define DAVINCI_ASP1_BASE	0x01E04000
-
-/* Bases of dm365 register banks */
-#define DAVINCI_DM365_ASP0_BASE	0x01D02000
-
-/* Bases of dm646x register banks */
-#define	DAVINCI_DM646X_MCASP0_REG_BASE		0x01D01000
-#define DAVINCI_DM646X_MCASP1_REG_BASE		0x01D01800
-
-/* Bases of da850/da830 McASP0  register banks */
-#define DAVINCI_DA8XX_MCASP0_REG_BASE	0x01D00000
-
-/* Bases of da830 McASP1 register banks */
-#define DAVINCI_DA830_MCASP1_REG_BASE	0x01D04000
-
-/* EDMA channels of dm644x and dm355 */
-#define DAVINCI_DMA_ASP0_TX	2
-#define DAVINCI_DMA_ASP0_RX	3
-#define DAVINCI_DMA_ASP1_TX	8
-#define DAVINCI_DMA_ASP1_RX	9
-
-/* EDMA channels of dm646x */
-#define	DAVINCI_DM646X_DMA_MCASP0_AXEVT0	6
-#define	DAVINCI_DM646X_DMA_MCASP0_AREVT0	9
-#define	DAVINCI_DM646X_DMA_MCASP1_AXEVT1	12
-
-/* EDMA channels of da850/da830 McASP0 */
-#define	DAVINCI_DA8XX_DMA_MCASP0_AREVT	0
-#define	DAVINCI_DA8XX_DMA_MCASP0_AXEVT	1
-
-/* EDMA channels of da830 McASP1 */
-#define	DAVINCI_DA830_DMA_MCASP1_AREVT	2
-#define	DAVINCI_DA830_DMA_MCASP1_AXEVT	3
-
-/* Interrupts */
-#define DAVINCI_ASP0_RX_INT	IRQ_MBRINT
-#define DAVINCI_ASP0_TX_INT	IRQ_MBXINT
-#define DAVINCI_ASP1_RX_INT	IRQ_MBRINT
-#define DAVINCI_ASP1_TX_INT	IRQ_MBXINT
-
-struct snd_platform_data {
-	u32 tx_dma_offset;
-	u32 rx_dma_offset;
-	enum dma_event_q asp_chan_q;	/* event queue number for ASP channel */
-	enum dma_event_q ram_chan_q;	/* event queue number for RAM channel */
-	unsigned int codec_fmt;
-	/*
-	 * Allowing this is more efficient and eliminates left and right swaps
-	 * caused by underruns, but will swap the left and right channels
-	 * when compared to previous behavior.
-	 */
-	unsigned enable_channel_combine:1;
-	unsigned sram_size_playback;
-	unsigned sram_size_capture;
-
-	/*
-	 * If McBSP peripheral gets the clock from an external pin,
-	 * there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR
-	 * and MCBSP_CLKS.
-	 * Depending on different hardware connections it is possible
-	 * to use this setting to change the behaviour of McBSP
-	 * driver. The dm365_clk_input_pin enum is available for dm365
-	 */
-	int clk_input_pin;
-
-	/*
-	 * This flag works when both clock and FS are outputs for the cpu
-	 * and makes clock more accurate (FS is not symmetrical and the
-	 * clock is very fast.
-	 * The clock becoming faster is named
-	 * i2s continuous serial clock (I2S_SCK) and it is an externally
-	 * visible bit clock.
-	 *
-	 * first line : WordSelect
-	 * second line : ContinuousSerialClock
-	 * third line: SerialData
-	 *
-	 * SYMMETRICAL APPROACH:
-	 *   _______________________          LEFT
-	 * _|         RIGHT         |______________________|
-	 *     _   _         _   _   _   _         _   _
-	 *   _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_
-	 *     _   _         _   _   _   _         _   _
-	 *   _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_
-	 *    \_/ \_/       \_/ \_/ \_/ \_/       \_/ \_/
-	 *
-	 * ACCURATE CLOCK APPROACH:
-	 *   ______________          LEFT
-	 * _|     RIGHT    |_______________________________|
-	 *     _         _   _         _   _   _   _   _   _
-	 *   _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| |
-	 *     _         _   _          _      dummy cycles
-	 *   _/ \_ ... _/ \_/ \_  ... _/ \__________________
-	 *    \_/       \_/ \_/        \_/
-	 *
-	 */
-	bool i2s_accurate_sck;
-
-	/* McASP specific fields */
-	int tdm_slots;
-	u8 op_mode;
-	u8 num_serializer;
-	u8 *serial_dir;
-	u8 version;
-	u8 txnumevt;
-	u8 rxnumevt;
-};
-
-enum {
-	MCASP_VERSION_1 = 0,	/* DM646x */
-	MCASP_VERSION_2,	/* DA8xx/OMAPL1x */
-};
-
-enum dm365_clk_input_pin {
-	MCBSP_CLKR = 0,		/* DM365 */
-	MCBSP_CLKS,
-};
-
-#define INACTIVE_MODE	0
-#define TX_MODE		1
-#define RX_MODE		2
-
-#define DAVINCI_MCASP_IIS_MODE	0
-#define DAVINCI_MCASP_DIT_MODE	1
-
-#endif /* __ASM_ARCH_DAVINCI_ASP_H */
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 33e78ae2a25..aaccdc4528f 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -16,16 +16,19 @@
 #include <linux/platform_device.h>
 #include <linux/davinci_emac.h>
 #include <linux/spi/spi.h>
+#include <linux/platform_data/davinci_asp.h>
+#include <linux/videodev2.h>
 
 #include <mach/serial.h>
 #include <mach/edma.h>
-#include <mach/asp.h>
 #include <mach/pm.h>
 #include <linux/platform_data/i2c-davinci.h>
 #include <linux/platform_data/mmc-davinci.h>
 #include <linux/platform_data/usb-davinci.h>
 #include <linux/platform_data/spi-davinci.h>
 
+#include <media/davinci/vpif_types.h>
+
 extern void __iomem *da8xx_syscfg0_base;
 extern void __iomem *da8xx_syscfg1_base;
 
@@ -63,6 +66,7 @@ extern unsigned int da850_max_speed;
 #define DA8XX_PLL0_BASE		0x01c11000
 #define DA8XX_TIMER64P0_BASE	0x01c20000
 #define DA8XX_TIMER64P1_BASE	0x01c21000
+#define DA8XX_VPIF_BASE		0x01e17000
 #define DA8XX_GPIO_BASE		0x01e26000
 #define DA8XX_PSC1_BASE		0x01e27000
 #define DA8XX_AEMIF_CS2_BASE	0x60000000
@@ -92,6 +96,11 @@ int da8xx_register_cpuidle(void);
 void __iomem * __init da8xx_get_mem_ctlr(void);
 int da850_register_pm(struct platform_device *pdev);
 int __init da850_register_sata(unsigned long refclkpn);
+int __init da850_register_vpif(void);
+int __init da850_register_vpif_display
+			(struct vpif_display_config *display_config);
+int __init da850_register_vpif_capture
+			(struct vpif_capture_config *capture_config);
 void da8xx_restart(char mode, const char *cmd);
 
 extern struct platform_device da8xx_serial_device;
@@ -126,6 +135,8 @@ extern const short da830_ecap1_pins[];
 extern const short da830_ecap2_pins[];
 extern const short da830_eqep0_pins[];
 extern const short da830_eqep1_pins[];
+extern const short da850_vpif_capture_pins[];
+extern const short da850_vpif_display_pins[];
 
 extern const short da850_i2c0_pins[];
 extern const short da850_i2c1_pins[];
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index a7e92fca32e..9e95b8a1edb 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -928,6 +928,48 @@ enum davinci_da850_index {
 	DA850_GPIO6_10,
 	DA850_GPIO6_13,
 	DA850_RTC_ALARM,
+
+	/* VPIF Capture */
+	DA850_VPIF_DIN0,
+	DA850_VPIF_DIN1,
+	DA850_VPIF_DIN2,
+	DA850_VPIF_DIN3,
+	DA850_VPIF_DIN4,
+	DA850_VPIF_DIN5,
+	DA850_VPIF_DIN6,
+	DA850_VPIF_DIN7,
+	DA850_VPIF_DIN8,
+	DA850_VPIF_DIN9,
+	DA850_VPIF_DIN10,
+	DA850_VPIF_DIN11,
+	DA850_VPIF_DIN12,
+	DA850_VPIF_DIN13,
+	DA850_VPIF_DIN14,
+	DA850_VPIF_DIN15,
+	DA850_VPIF_CLKIN0,
+	DA850_VPIF_CLKIN1,
+	DA850_VPIF_CLKIN2,
+	DA850_VPIF_CLKIN3,
+
+	/* VPIF Display */
+	DA850_VPIF_DOUT0,
+	DA850_VPIF_DOUT1,
+	DA850_VPIF_DOUT2,
+	DA850_VPIF_DOUT3,
+	DA850_VPIF_DOUT4,
+	DA850_VPIF_DOUT5,
+	DA850_VPIF_DOUT6,
+	DA850_VPIF_DOUT7,
+	DA850_VPIF_DOUT8,
+	DA850_VPIF_DOUT9,
+	DA850_VPIF_DOUT10,
+	DA850_VPIF_DOUT11,
+	DA850_VPIF_DOUT12,
+	DA850_VPIF_DOUT13,
+	DA850_VPIF_DOUT14,
+	DA850_VPIF_DOUT15,
+	DA850_VPIF_CLKO2,
+	DA850_VPIF_CLKO3,
 };
 
 enum davinci_tnetv107x_index {
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 405318e35bf..40a0027838e 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -166,6 +166,7 @@
 #define DA830_LPSC1_McASP1		8
 #define DA850_LPSC1_SATA		8
 #define DA830_LPSC1_McASP2		9
+#define DA850_LPSC1_VPIF		9
 #define DA8XX_LPSC1_SPI1		10
 #define DA8XX_LPSC1_I2C			11
 #define DA8XX_LPSC1_UART1		12
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 4372075c551..da55107033d 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -31,11 +31,11 @@ config CPU_EXYNOS4210
 	bool "SAMSUNG EXYNOS4210"
 	default y
 	depends on ARCH_EXYNOS4
-	select SAMSUNG_DMADEV
 	select ARM_CPU_SUSPEND if PM
+	select PM_GENERIC_DOMAINS
 	select S5P_PM if PM
 	select S5P_SLEEP if PM
-	select PM_GENERIC_DOMAINS
+	select SAMSUNG_DMADEV
 	help
 	  Enable EXYNOS4210 CPU support
 
@@ -43,9 +43,9 @@ config SOC_EXYNOS4212
 	bool "SAMSUNG EXYNOS4212"
 	default y
 	depends on ARCH_EXYNOS4
-	select SAMSUNG_DMADEV
 	select S5P_PM if PM
 	select S5P_SLEEP if PM
+	select SAMSUNG_DMADEV
 	help
 	  Enable EXYNOS4212 SoC support
 
@@ -61,9 +61,9 @@ config SOC_EXYNOS5250
 	bool "SAMSUNG EXYNOS5250"
 	default y
 	depends on ARCH_EXYNOS5
-	select SAMSUNG_DMADEV
 	select S5P_PM if PM
 	select S5P_SLEEP if PM
+	select SAMSUNG_DMADEV
 	help
 	  Enable EXYNOS5250 SoC support
 
@@ -189,71 +189,71 @@ config MACH_SMDKC210
 config MACH_SMDKV310
 	bool "SMDKV310"
 	select CPU_EXYNOS4210
-	select S5P_DEV_FIMD0
+	select EXYNOS4_DEV_AHCI
+	select EXYNOS4_DEV_USB_OHCI
+	select EXYNOS4_SETUP_FIMD0
+	select EXYNOS4_SETUP_I2C1
+	select EXYNOS4_SETUP_KEYPAD
+	select EXYNOS4_SETUP_SDHCI
+	select EXYNOS4_SETUP_USB_PHY
+	select EXYNOS_DEV_DMA
+	select EXYNOS_DEV_DRM
+	select EXYNOS_DEV_SYSMMU
+	select S3C24XX_PWM
+	select S3C_DEV_HSMMC
+	select S3C_DEV_HSMMC1
+	select S3C_DEV_HSMMC2
+	select S3C_DEV_HSMMC3
+	select S3C_DEV_I2C1
 	select S3C_DEV_RTC
+	select S3C_DEV_USB_HSOTG
 	select S3C_DEV_WDT
-	select S3C_DEV_I2C1
 	select S5P_DEV_FIMC0
 	select S5P_DEV_FIMC1
 	select S5P_DEV_FIMC2
 	select S5P_DEV_FIMC3
+	select S5P_DEV_FIMD0
 	select S5P_DEV_G2D
 	select S5P_DEV_I2C_HDMIPHY
 	select S5P_DEV_JPEG
 	select S5P_DEV_MFC
 	select S5P_DEV_TV
 	select S5P_DEV_USB_EHCI
-	select S3C_DEV_HSMMC
-	select S3C_DEV_HSMMC1
-	select S3C_DEV_HSMMC2
-	select S3C_DEV_HSMMC3
-	select S3C_DEV_USB_HSOTG
 	select SAMSUNG_DEV_BACKLIGHT
-	select EXYNOS_DEV_DRM
-	select EXYNOS_DEV_SYSMMU
-	select EXYNOS4_DEV_AHCI
 	select SAMSUNG_DEV_KEYPAD
-	select EXYNOS_DEV_DMA
 	select SAMSUNG_DEV_PWM
-	select EXYNOS4_DEV_USB_OHCI
-	select EXYNOS4_SETUP_FIMD0
-	select EXYNOS4_SETUP_I2C1
-	select EXYNOS4_SETUP_KEYPAD
-	select EXYNOS4_SETUP_SDHCI
-	select EXYNOS4_SETUP_USB_PHY
-	select S3C24XX_PWM
 	help
 	  Machine support for Samsung SMDKV310
 
 config MACH_ARMLEX4210
 	bool "ARMLEX4210"
 	select CPU_EXYNOS4210
-	select S3C_DEV_RTC
-	select S3C_DEV_WDT
+	select EXYNOS4_DEV_AHCI
+	select EXYNOS4_SETUP_SDHCI
+	select EXYNOS_DEV_DMA
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC2
 	select S3C_DEV_HSMMC3
-	select EXYNOS4_DEV_AHCI
-	select EXYNOS_DEV_DMA
-	select EXYNOS4_SETUP_SDHCI
+	select S3C_DEV_RTC
+	select S3C_DEV_WDT
 	help
 	  Machine support for Samsung ARMLEX4210 based on EXYNOS4210
 
 config MACH_UNIVERSAL_C210
 	bool "Mobile UNIVERSAL_C210 Board"
-	select CPU_EXYNOS4210
-	select S5P_HRT
 	select CLKSRC_MMIO
+	select CPU_EXYNOS4210
+	select EXYNOS4_SETUP_FIMC
+	select EXYNOS4_SETUP_FIMD0
+	select EXYNOS4_SETUP_I2C1
+	select EXYNOS4_SETUP_I2C3
+	select EXYNOS4_SETUP_I2C5
+	select EXYNOS4_SETUP_SDHCI
+	select EXYNOS4_SETUP_USB_PHY
+	select EXYNOS_DEV_DMA
+	select EXYNOS_DEV_DRM
+	select EXYNOS_DEV_SYSMMU
 	select HAVE_SCHED_CLOCK
-	select S5P_GPIO_INT
-	select S5P_DEV_FIMC0
-	select S5P_DEV_FIMC1
-	select S5P_DEV_FIMC2
-	select S5P_DEV_FIMC3
-	select S5P_DEV_G2D
-	select S5P_DEV_CSIS0
-	select S5P_DEV_JPEG
-	select S5P_DEV_FIMD0
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC2
 	select S3C_DEV_HSMMC3
@@ -261,21 +261,21 @@ config MACH_UNIVERSAL_C210
 	select S3C_DEV_I2C3
 	select S3C_DEV_I2C5
 	select S3C_DEV_USB_HSOTG
+	select S5P_DEV_CSIS0
+	select S5P_DEV_FIMC0
+	select S5P_DEV_FIMC1
+	select S5P_DEV_FIMC2
+	select S5P_DEV_FIMC3
+	select S5P_DEV_FIMD0
+	select S5P_DEV_G2D
 	select S5P_DEV_I2C_HDMIPHY
+	select S5P_DEV_JPEG
 	select S5P_DEV_MFC
 	select S5P_DEV_ONENAND
 	select S5P_DEV_TV
-	select EXYNOS_DEV_SYSMMU
-	select EXYNOS_DEV_DMA
-	select EXYNOS_DEV_DRM
-	select EXYNOS4_SETUP_FIMD0
-	select EXYNOS4_SETUP_I2C1
-	select EXYNOS4_SETUP_I2C3
-	select EXYNOS4_SETUP_I2C5
-	select EXYNOS4_SETUP_SDHCI
-	select EXYNOS4_SETUP_FIMC
+	select S5P_GPIO_INT
+	select S5P_HRT
 	select S5P_SETUP_MIPIPHY
-	select EXYNOS4_SETUP_USB_PHY
 	help
 	  Machine support for Samsung Mobile Universal S5PC210 Reference
 	  Board.
@@ -283,10 +283,16 @@ config MACH_UNIVERSAL_C210
 config MACH_NURI
 	bool "Mobile NURI Board"
 	select CPU_EXYNOS4210
-	select S5P_GPIO_INT
-	select S3C_DEV_WDT
-	select S3C_DEV_RTC
-	select S5P_DEV_FIMD0
+	select EXYNOS4_SETUP_FIMC
+	select EXYNOS4_SETUP_FIMD0
+	select EXYNOS4_SETUP_I2C1
+	select EXYNOS4_SETUP_I2C3
+	select EXYNOS4_SETUP_I2C5
+	select EXYNOS4_SETUP_I2C6
+	select EXYNOS4_SETUP_SDHCI
+	select EXYNOS4_SETUP_USB_PHY
+	select EXYNOS_DEV_DMA
+	select EXYNOS_DEV_DRM
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC2
 	select S3C_DEV_HSMMC3
@@ -294,41 +300,42 @@ config MACH_NURI
 	select S3C_DEV_I2C3
 	select S3C_DEV_I2C5
 	select S3C_DEV_I2C6
+	select S3C_DEV_RTC
 	select S3C_DEV_USB_HSOTG
+	select S3C_DEV_WDT
 	select S5P_DEV_CSIS0
-	select S5P_DEV_JPEG
 	select S5P_DEV_FIMC0
 	select S5P_DEV_FIMC1
 	select S5P_DEV_FIMC2
 	select S5P_DEV_FIMC3
+	select S5P_DEV_FIMD0
 	select S5P_DEV_G2D
+	select S5P_DEV_JPEG
 	select S5P_DEV_MFC
 	select S5P_DEV_USB_EHCI
+	select S5P_GPIO_INT
 	select S5P_SETUP_MIPIPHY
-	select EXYNOS_DEV_DMA
-	select EXYNOS_DEV_DRM
-	select EXYNOS4_SETUP_FIMC
-	select EXYNOS4_SETUP_FIMD0
-	select EXYNOS4_SETUP_I2C1
-	select EXYNOS4_SETUP_I2C3
-	select EXYNOS4_SETUP_I2C5
-	select EXYNOS4_SETUP_I2C6
-	select EXYNOS4_SETUP_SDHCI
-	select EXYNOS4_SETUP_USB_PHY
-	select S5P_SETUP_MIPIPHY
-	select SAMSUNG_DEV_PWM
 	select SAMSUNG_DEV_ADC
+	select SAMSUNG_DEV_PWM
 	help
 	  Machine support for Samsung Mobile NURI Board.
 
 config MACH_ORIGEN
 	bool "ORIGEN"
 	select CPU_EXYNOS4210
-	select S3C_DEV_RTC
-	select S3C_DEV_WDT
+	select EXYNOS4_DEV_USB_OHCI
+	select EXYNOS4_SETUP_FIMD0
+	select EXYNOS4_SETUP_SDHCI
+	select EXYNOS4_SETUP_USB_PHY
+	select EXYNOS_DEV_DMA
+	select EXYNOS_DEV_DRM
+	select EXYNOS_DEV_SYSMMU
+	select S3C24XX_PWM
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC2
+	select S3C_DEV_RTC
 	select S3C_DEV_USB_HSOTG
+	select S3C_DEV_WDT
 	select S5P_DEV_FIMC0
 	select S5P_DEV_FIMC1
 	select S5P_DEV_FIMC2
@@ -342,14 +349,6 @@ config MACH_ORIGEN
 	select S5P_DEV_USB_EHCI
 	select SAMSUNG_DEV_BACKLIGHT
 	select SAMSUNG_DEV_PWM
-	select EXYNOS_DEV_DRM
-	select EXYNOS_DEV_SYSMMU
-	select EXYNOS_DEV_DMA
-	select EXYNOS4_DEV_USB_OHCI
-	select EXYNOS4_SETUP_FIMD0
-	select EXYNOS4_SETUP_SDHCI
-	select EXYNOS4_SETUP_USB_PHY
-	select S3C24XX_PWM
 	help
 	  Machine support for ORIGEN based on Samsung EXYNOS4210
 
@@ -357,7 +356,17 @@ comment "EXYNOS4212 Boards"
 
 config MACH_SMDK4212
 	bool "SMDK4212"
-	select SOC_EXYNOS4212
+	select EXYNOS4_SETUP_FIMD0
+	select EXYNOS4_SETUP_I2C1
+	select EXYNOS4_SETUP_I2C3
+	select EXYNOS4_SETUP_I2C7
+	select EXYNOS4_SETUP_KEYPAD
+	select EXYNOS4_SETUP_SDHCI
+	select EXYNOS4_SETUP_USB_PHY
+	select EXYNOS_DEV_DMA
+	select EXYNOS_DEV_DRM
+	select EXYNOS_DEV_SYSMMU
+	select S3C24XX_PWM
 	select S3C_DEV_HSMMC2
 	select S3C_DEV_HSMMC3
 	select S3C_DEV_I2C1
@@ -375,17 +384,7 @@ config MACH_SMDK4212
 	select SAMSUNG_DEV_BACKLIGHT
 	select SAMSUNG_DEV_KEYPAD
 	select SAMSUNG_DEV_PWM
-	select EXYNOS_DEV_SYSMMU
-	select EXYNOS_DEV_DMA
-	select EXYNOS_DEV_DRM
-	select EXYNOS4_SETUP_FIMD0
-	select EXYNOS4_SETUP_I2C1
-	select EXYNOS4_SETUP_I2C3
-	select EXYNOS4_SETUP_I2C7
-	select EXYNOS4_SETUP_KEYPAD
-	select EXYNOS4_SETUP_SDHCI
-	select EXYNOS4_SETUP_USB_PHY
-	select S3C24XX_PWM
+	select SOC_EXYNOS4212
 	help
 	  Machine support for Samsung SMDK4212
 
@@ -393,8 +392,8 @@ comment "EXYNOS4412 Boards"
 
 config MACH_SMDK4412
 	bool "SMDK4412"
-	select SOC_EXYNOS4412
 	select MACH_SMDK4212
+	select SOC_EXYNOS4412
 	help
 	  Machine support for Samsung SMDK4412
 endif
@@ -404,12 +403,12 @@ comment "Flattened Device Tree based board for EXYNOS SoCs"
 config MACH_EXYNOS4_DT
 	bool "Samsung Exynos4 Machine using device tree"
 	depends on ARCH_EXYNOS4
-	select CPU_EXYNOS4210
-	select USE_OF
 	select ARM_AMBA
+	select CPU_EXYNOS4210
 	select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD
 	select PINCTRL
 	select PINCTRL_EXYNOS4
+	select USE_OF
 	help
 	  Machine support for Samsung Exynos4 machine with device tree enabled.
 	  Select this if a fdt blob is available for the Exynos4 SoC based board.
@@ -419,9 +418,9 @@ config MACH_EXYNOS4_DT
 config MACH_EXYNOS5_DT
 	bool "SAMSUNG EXYNOS5 Machine using device tree"
 	depends on ARCH_EXYNOS5
+	select ARM_AMBA
 	select SOC_EXYNOS5250
 	select USE_OF
-	select ARM_AMBA
 	help
 	  Machine support for Samsung EXYNOS5 machine with device tree enabled.
 	  Select this if a fdt blob is available for the EXYNOS5 SoC based board.
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index f60b66dbcf8..21d568b3b14 100644
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -303,10 +303,12 @@ static int __init exynos_dma_init(void)
 
 	dma_cap_set(DMA_SLAVE, exynos_pdma0_pdata.cap_mask);
 	dma_cap_set(DMA_CYCLIC, exynos_pdma0_pdata.cap_mask);
+	dma_cap_set(DMA_PRIVATE, exynos_pdma0_pdata.cap_mask);
 	amba_device_register(&exynos_pdma0_device, &iomem_resource);
 
 	dma_cap_set(DMA_SLAVE, exynos_pdma1_pdata.cap_mask);
 	dma_cap_set(DMA_CYCLIC, exynos_pdma1_pdata.cap_mask);
+	dma_cap_set(DMA_PRIVATE, exynos_pdma1_pdata.cap_mask);
 	amba_device_register(&exynos_pdma1_device, &iomem_resource);
 
 	dma_cap_set(DMA_MEMCPY, exynos_mdma1_pdata.cap_mask);
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index 480cd78f192..c05d7aa8403 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -29,6 +29,7 @@
 #include <drm/exynos_drm.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 #include <media/m5mols.h>
 #include <media/s5k6aa.h>
 #include <media/s5p_fimc.h>
@@ -39,7 +40,6 @@
 #include <asm/mach-types.h>
 
 #include <plat/adc.h>
-#include <plat/regs-fb-v4.h>
 #include <plat/regs-serial.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
@@ -378,10 +378,10 @@ static struct regulator_consumer_supply __initdata max8997_ldo1_[] = {
 };
 static struct regulator_consumer_supply __initdata max8997_ldo3_[] = {
 	REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* USB */
-	REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
+	REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
 };
 static struct regulator_consumer_supply __initdata max8997_ldo4_[] = {
-	REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
+	REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
 };
 static struct regulator_consumer_supply __initdata max8997_ldo5_[] = {
 	REGULATOR_SUPPLY("vhsic", "modemctl"), /* MODEM */
@@ -1180,9 +1180,7 @@ static struct platform_device cam_8m_12v_fixed_rdev = {
 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
 	.clk_rate	= 166000000UL,
 	.lanes		= 2,
-	.alignment	= 32,
 	.hs_settle	= 12,
-	.phy_enable	= s5p_csis_phy_enable,
 };
 
 #define GPIO_CAM_MEGA_RST	EXYNOS4_GPY3(7) /* ISP_RESET */
@@ -1226,7 +1224,6 @@ static struct s5p_fimc_isp_info nuri_camera_sensors[] = {
 		.bus_type	= FIMC_MIPI_CSI2,
 		.board_info	= &m5mols_board_info,
 		.clk_frequency	= 24000000UL,
-		.csi_data_align	= 32,
 	},
 };
 
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 67b50bb89c0..9adf491674e 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -30,9 +30,9 @@
 #include <asm/mach-types.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include <plat/regs-serial.h>
-#include <plat/regs-fb-v4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/sdhci.h>
@@ -97,12 +97,12 @@ static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
 };
 
 static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
-	REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
+	REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
 	REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
 	REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
 };
 static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
-	REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
+	REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
 };
 static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
 	REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index 7a265d1a82d..730f1ac6592 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -27,6 +27,7 @@
 #include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
+#include <video/samsung_fimd.h>
 #include <plat/backlight.h>
 #include <plat/clock.h>
 #include <plat/cpu.h>
@@ -36,7 +37,6 @@
 #include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/keypad.h>
 #include <plat/mfc.h>
-#include <plat/regs-fb.h>
 #include <plat/regs-serial.h>
 #include <plat/sdhci.h>
 
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index c15d2238ceb..ee4fb1a9cb7 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -27,9 +27,9 @@
 #include <asm/mach-types.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 #include <plat/regs-serial.h>
 #include <plat/regs-srom.h>
-#include <plat/regs-fb-v4.h>
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/fb.h>
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 98d3aced228..ebc9dd339a3 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -30,6 +30,7 @@
 #include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
+#include <video/samsung_fimd.h>
 #include <plat/regs-serial.h>
 #include <plat/clock.h>
 #include <plat/cpu.h>
@@ -39,7 +40,6 @@
 #include <plat/fb.h>
 #include <plat/mfc.h>
 #include <plat/sdhci.h>
-#include <plat/regs-fb-v4.h>
 #include <plat/fimc-core.h>
 #include <plat/s5p-time.h>
 #include <plat/camport.h>
@@ -209,7 +209,7 @@ static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
 	REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
 	REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
 	REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
-	REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
+	REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"),
 };
 
 static struct regulator_init_data lp3974_ldo3_data = {
@@ -273,7 +273,7 @@ static struct regulator_init_data lp3974_ldo6_data = {
 };
 
 static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
-	REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
+	REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"),
 };
 
 static struct regulator_init_data lp3974_ldo7_data = {
@@ -942,9 +942,7 @@ static struct platform_device cam_s_if_fixed_reg_dev = {
 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
 	.clk_rate	= 166000000UL,
 	.lanes		= 2,
-	.alignment	= 32,
 	.hs_settle	= 12,
-	.phy_enable	= s5p_csis_phy_enable,
 };
 
 #define GPIO_CAM_LEVEL_EN(n)	EXYNOS4_GPE4(n + 3)
@@ -1008,7 +1006,6 @@ static struct s5p_fimc_isp_info universal_camera_sensors[] = {
 		.board_info	= &m5mols_board_info,
 		.i2c_bus_num	= 0,
 		.clk_frequency	= 24000000UL,
-		.csi_data_align	= 32,
 	},
 };
 
diff --git a/arch/arm/mach-exynos/setup-fimd0.c b/arch/arm/mach-exynos/setup-fimd0.c
index 07a6dbeecdd..5665bb4e980 100644
--- a/arch/arm/mach-exynos/setup-fimd0.c
+++ b/arch/arm/mach-exynos/setup-fimd0.c
@@ -13,8 +13,8 @@
 #include <linux/fb.h>
 #include <linux/gpio.h>
 
+#include <video/samsung_fimd.h>
 #include <plat/gpio-cfg.h>
-#include <plat/regs-fb-v4.h>
 
 #include <mach/map.h>
 
diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig
index f643ef819da..abda5a18a66 100644
--- a/arch/arm/mach-footbridge/Kconfig
+++ b/arch/arm/mach-footbridge/Kconfig
@@ -91,7 +91,7 @@ config FOOTBRIDGE_ADDIN
 
 # EBSA285 board in either host or addin mode
 config ARCH_EBSA285
-	select ARCH_MAY_HAVE_PC_FDC
 	bool
+	select ARCH_MAY_HAVE_PC_FDC
 
 endif
diff --git a/arch/arm/mach-footbridge/include/mach/irqs.h b/arch/arm/mach-footbridge/include/mach/irqs.h
index 400551e43e4..61c714c4920 100644
--- a/arch/arm/mach-footbridge/include/mach/irqs.h
+++ b/arch/arm/mach-footbridge/include/mach/irqs.h
@@ -89,8 +89,6 @@
 #define IRQ_NETWINDER_VGA	_ISA_IRQ(11)
 #define IRQ_NETWINDER_SOUND	_ISA_IRQ(12)
 
-#undef RTC_IRQ
-#define RTC_IRQ		IRQ_ISA_RTC_ALARM
 #define I8042_KBD_IRQ	IRQ_ISA_KEYBOARD
 #define I8042_AUX_IRQ	(machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE)
 #define IRQ_FLOPPYDISK	IRQ_ISA_FLOPPY
diff --git a/arch/arm/mach-h720x/Kconfig b/arch/arm/mach-h720x/Kconfig
index abf356c0234..6bb755bcb6f 100644
--- a/arch/arm/mach-h720x/Kconfig
+++ b/arch/arm/mach-h720x/Kconfig
@@ -12,9 +12,9 @@ config ARCH_H7201
 
 config ARCH_H7202
 	bool "hms30c7202"
+	depends on ARCH_H720X
 	select CPU_H7202
 	select ZONE_DMA
-	depends on ARCH_H720X
 	help
 	  Say Y here if you are using the Hynix HMS30C7202 Reference Board
 
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 32197c117af..8d276584650 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -41,68 +41,68 @@ config SOC_IMX1
 
 config SOC_IMX21
 	bool
-	select MACH_MX21
-	select CPU_ARM926T
 	select COMMON_CLK
+	select CPU_ARM926T
 	select IMX_HAVE_IOMUX_V1
+	select MACH_MX21
 	select MXC_AVIC
 
 config SOC_IMX25
 	bool
 	select ARCH_MX25
+	select ARCH_MXC_IOMUX_V3
 	select COMMON_CLK
 	select CPU_ARM926T
 	select HAVE_CAN_FLEXCAN if CAN
-	select ARCH_MXC_IOMUX_V3
 	select MXC_AVIC
 
 config SOC_IMX27
 	bool
-	select MACH_MX27
-	select CPU_ARM926T
 	select COMMON_CLK
+	select CPU_ARM926T
 	select IMX_HAVE_IOMUX_V1
+	select MACH_MX27
 	select MXC_AVIC
 
 config SOC_IMX31
 	bool
+	select COMMON_CLK
 	select CPU_V6
 	select IMX_HAVE_PLATFORM_MXC_RNGA
 	select MXC_AVIC
-	select COMMON_CLK
 	select SMP_ON_UP if SMP
 
 config SOC_IMX35
 	bool
-	select CPU_V6K
 	select ARCH_MXC_IOMUX_V3
 	select COMMON_CLK
+	select CPU_V6K
+	select HAVE_CAN_FLEXCAN if CAN
 	select HAVE_EPIT
 	select MXC_AVIC
 	select SMP_ON_UP if SMP
-	select HAVE_CAN_FLEXCAN if CAN
 
 config SOC_IMX5
-	select CPU_V7
-	select MXC_TZIC
-	select COMMON_CLK
-	select ARCH_MXC_IOMUX_V3
+	bool
 	select ARCH_HAS_CPUFREQ
 	select ARCH_MX5
-	bool
+	select ARCH_MXC_IOMUX_V3
+	select COMMON_CLK
+	select CPU_V7
+	select MXC_TZIC
 
 config SOC_IMX50
 	bool
-	select SOC_IMX5
 	select ARCH_MX50
+	select SOC_IMX5
 
 config	SOC_IMX51
 	bool
-	select SOC_IMX5
 	select ARCH_MX5
 	select ARCH_MX51
 	select PINCTRL
 	select PINCTRL_IMX51
+	select SOC_IMX5
 
 if ARCH_IMX_V4_V5
 
@@ -112,10 +112,10 @@ config MACH_MXLADS
 
 config ARCH_MX1ADS
 	bool "MX1ADS platform"
-	select MACH_MXLADS
-	select SOC_IMX1
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_UART
+	select MACH_MXLADS
+	select SOC_IMX1
 	help
 	  Say Y here if you are using Motorola MX1ADS/MXLADS boards
 
@@ -127,9 +127,9 @@ config MACH_SCB9328
 
 config MACH_APF9328
 	bool "APF9328"
-	select SOC_IMX1
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_UART
+	select SOC_IMX1
 	help
 	  Say Yes here if you are using the Armadeus APF9328 development board
 
@@ -137,11 +137,11 @@ comment "MX21 platforms:"
 
 config MACH_MX21ADS
 	bool "MX21ADS platform"
-	select SOC_IMX21
 	select IMX_HAVE_PLATFORM_IMX_FB
 	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_MXC_MMC
 	select IMX_HAVE_PLATFORM_MXC_NAND
+	select SOC_IMX21
 	help
 	  Include support for MX21ADS platform. This includes specific
 	  configurations for the board and its peripherals.
@@ -150,22 +150,21 @@ comment "MX25 platforms:"
 
 config MACH_MX25_3DS
 	bool "Support MX25PDK (3DS) Platform"
-	select SOC_IMX25
 	select IMX_HAVE_PLATFORM_FLEXCAN
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMXDI_RTC
-	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_FB
+	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_KEYPAD
 	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_MXC_EHCI
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+	select SOC_IMX25
 
 config MACH_EUKREA_CPUIMX25SD
 	bool "Support Eukrea CPUIMX25 Platform"
-	select SOC_IMX25
 	select IMX_HAVE_PLATFORM_FLEXCAN
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
@@ -177,6 +176,7 @@ config MACH_EUKREA_CPUIMX25SD
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX25
 
 choice
 	prompt "Baseboard"
@@ -199,20 +199,19 @@ comment "MX27 platforms:"
 
 config MACH_MX27ADS
 	bool "MX27ADS platform"
-	select SOC_IMX27
 	select IMX_HAVE_PLATFORM_IMX_FB
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_MXC_MMC
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_MXC_W1
+	select SOC_IMX27
 	help
 	  Include support for MX27ADS platform. This includes specific
 	  configurations for the board and its peripherals.
 
 config MACH_PCM038
 	bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
-	select SOC_IMX27
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_UART
@@ -221,6 +220,7 @@ config MACH_PCM038
 	select IMX_HAVE_PLATFORM_MXC_W1
 	select IMX_HAVE_PLATFORM_SPI_IMX
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX27
 	help
 	  Include support for phyCORE-i.MX27 (aka pcm038) platform. This
 	  includes specific configurations for the module and its peripherals.
@@ -242,7 +242,6 @@ endchoice
 
 config MACH_CPUIMX27
 	bool "Eukrea CPUIMX27 module"
-	select SOC_IMX27
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_I2C
@@ -251,6 +250,7 @@ config MACH_CPUIMX27
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_MXC_W1
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX27
 	help
 	  Include support for Eukrea CPUIMX27 platform. This includes
 	  specific configurations for the module and its peripherals.
@@ -292,7 +292,6 @@ endchoice
 
 config MACH_MX27_3DS
 	bool "MX27PDK platform"
-	select SOC_IMX27
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_FB
@@ -306,13 +305,13 @@ config MACH_MX27_3DS
 	select IMX_HAVE_PLATFORM_SPI_IMX
 	select MXC_DEBUG_BOARD
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX27
 	help
 	  Include support for MX27PDK platform. This includes specific
 	  configurations for the board and its peripherals.
 
 config MACH_IMX27_VISSTRIM_M10
 	bool "Vista Silicon i.MX27 Visstrim_m10"
-	select SOC_IMX27
 	select IMX_HAVE_PLATFORM_GPIO_KEYS
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_SSI
@@ -321,6 +320,7 @@ config MACH_IMX27_VISSTRIM_M10
 	select IMX_HAVE_PLATFORM_MXC_EHCI
 	select IMX_HAVE_PLATFORM_MXC_MMC
 	select LEDS_GPIO_REGISTER
+	select SOC_IMX27
 	help
 	  Include support for Visstrim_m10 platform and its different variants.
 	  This includes specific configurations for the board and its
@@ -328,16 +328,15 @@ config MACH_IMX27_VISSTRIM_M10
 
 config MACH_IMX27LITE
 	bool "LogicPD MX27 LITEKIT platform"
-	select SOC_IMX27
-	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_IMX_SSI
+	select IMX_HAVE_PLATFORM_IMX_UART
+	select SOC_IMX27
 	help
 	  Include support for MX27 LITEKIT platform. This includes specific
 	  configurations for the board and its peripherals.
 
 config MACH_PCA100
 	bool "Phytec phyCARD-s (pca100)"
-	select SOC_IMX27
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_FB
@@ -350,27 +349,28 @@ config MACH_PCA100
 	select IMX_HAVE_PLATFORM_MXC_W1
 	select IMX_HAVE_PLATFORM_SPI_IMX
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX27
 	help
 	  Include support for phyCARD-s (aka pca100) platform. This
 	  includes specific configurations for the module and its peripherals.
 
 config MACH_MXT_TD60
 	bool "Maxtrack i-MXT TD60"
-	select SOC_IMX27
 	select IMX_HAVE_PLATFORM_IMX_FB
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_MXC_MMC
 	select IMX_HAVE_PLATFORM_MXC_NAND
+	select SOC_IMX27
 	help
 	  Include support for i-MXT (aka td60) platform. This
 	  includes specific configurations for the module and its peripherals.
 
 config MACH_IMX27IPCAM
 	bool "IMX27 IPCAM platform"
-	select SOC_IMX27
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_UART
+	select SOC_IMX27
 	help
 	  Include support for IMX27 IPCAM platform. This includes specific
 	  configurations for the board and its peripherals.
@@ -390,11 +390,11 @@ comment "MX31 platforms:"
 
 config MACH_MX31ADS
 	bool "Support MX31ADS platforms"
-	select SOC_IMX31
+	default y
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_SSI
 	select IMX_HAVE_PLATFORM_IMX_UART
-	default y
+	select SOC_IMX31
 	help
 	  Include support for MX31ADS platform. This includes specific
 	  configurations for the board and its peripherals.
@@ -412,21 +412,19 @@ config MACH_MX31ADS_WM1133_EV1
 
 config MACH_MX31LILLY
 	bool "Support MX31 LILLY-1131 platforms (INCO startec)"
-	select SOC_IMX31
 	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_IPU_CORE
 	select IMX_HAVE_PLATFORM_MXC_EHCI
 	select IMX_HAVE_PLATFORM_MXC_MMC
 	select IMX_HAVE_PLATFORM_SPI_IMX
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX31
 	help
 	  Include support for mx31 based LILLY1131 modules. This includes
 	  specific configurations for the board and its peripherals.
 
 config MACH_MX31LITE
 	bool "Support MX31 LITEKIT (LogicPD)"
-	select SOC_IMX31
-	select MXC_ULPI if USB_ULPI
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_MXC_EHCI
@@ -435,13 +433,14 @@ config MACH_MX31LITE
 	select IMX_HAVE_PLATFORM_MXC_RTC
 	select IMX_HAVE_PLATFORM_SPI_IMX
 	select LEDS_GPIO_REGISTER
+	select MXC_ULPI if USB_ULPI
+	select SOC_IMX31
 	help
 	  Include support for MX31 LITEKIT platform. This includes specific
 	  configurations for the board and its peripherals.
 
 config MACH_PCM037
 	bool "Support Phytec pcm037 (i.MX31) platforms"
-	select SOC_IMX31
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_I2C
@@ -452,6 +451,7 @@ config MACH_PCM037
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_MXC_W1
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX31
 	help
 	  Include support for Phytec pcm037 platform. This includes
 	  specific configurations for the board and its peripherals.
@@ -468,8 +468,6 @@ config MACH_PCM037_EET
 
 config MACH_MX31_3DS
 	bool "Support MX31PDK (3DS)"
-	select SOC_IMX31
-	select MXC_DEBUG_BOARD
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_I2C
@@ -481,7 +479,9 @@ config MACH_MX31_3DS
 	select IMX_HAVE_PLATFORM_MXC_MMC
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_SPI_IMX
+	select MXC_DEBUG_BOARD
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX31
 	help
 	  Include support for MX31PDK (3DS) platform. This includes specific
 	  configurations for the board and its peripherals.
@@ -497,7 +497,6 @@ config MACH_MX31_3DS_MXC_NAND_USE_BBT
 
 config MACH_MX31MOBOARD
 	bool "Support mx31moboard platforms (EPFL Mobots group)"
-	select SOC_IMX31
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_I2C
@@ -509,22 +508,22 @@ config MACH_MX31MOBOARD
 	select IMX_HAVE_PLATFORM_SPI_IMX
 	select LEDS_GPIO_REGISTER
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX31
 	help
 	  Include support for mx31moboard platform. This includes specific
 	  configurations for the board and its peripherals.
 
 config MACH_QONG
 	bool "Support Dave/DENX QongEVB-LITE platform"
-	select SOC_IMX31
-	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_IMX2_WDT
+	select IMX_HAVE_PLATFORM_IMX_UART
+	select SOC_IMX31
 	help
 	  Include support for Dave/DENX QongEVB-LITE platform. This includes
 	  specific configurations for the board and its peripherals.
 
 config MACH_ARMADILLO5X0
 	bool "Support Atmark Armadillo-500 Development Base Board"
-	select SOC_IMX31
 	select IMX_HAVE_PLATFORM_GPIO_KEYS
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_UART
@@ -533,23 +532,24 @@ config MACH_ARMADILLO5X0
 	select IMX_HAVE_PLATFORM_MXC_MMC
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX31
 	help
 	  Include support for Atmark Armadillo-500 platform. This includes
 	  specific configurations for the board and its peripherals.
 
 config MACH_KZM_ARM11_01
 	bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
-	select SOC_IMX31
 	select IMX_HAVE_PLATFORM_IMX_UART
+	select SOC_IMX31
 	help
 	  Include support for KZM-ARM11-01. This includes specific
 	  configurations for the board and its peripherals.
 
 config MACH_BUG
 	bool "Support Buglabs BUGBase platform"
-	select SOC_IMX31
-	select IMX_HAVE_PLATFORM_IMX_UART
 	default y
+	select IMX_HAVE_PLATFORM_IMX_UART
+	select SOC_IMX31
 	help
 	  Include support for BUGBase 1.3 platform. This includes specific
 	  configurations for the board and its peripherals.
@@ -565,7 +565,6 @@ comment "MX35 platforms:"
 
 config MACH_PCM043
 	bool "Support Phytec pcm043 (i.MX35) platforms"
-	select SOC_IMX35
 	select IMX_HAVE_PLATFORM_FLEXCAN
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
@@ -577,14 +576,13 @@ config MACH_PCM043
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX35
 	help
 	  Include support for Phytec pcm043 platform. This includes
 	  specific configurations for the board and its peripherals.
 
 config MACH_MX35_3DS
 	bool "Support MX35PDK platform"
-	select SOC_IMX35
-	select MXC_DEBUG_BOARD
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_FB
@@ -595,13 +593,14 @@ config MACH_MX35_3DS
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_MXC_RTC
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+	select MXC_DEBUG_BOARD
+	select SOC_IMX35
 	help
 	  Include support for MX35PDK platform. This includes specific
 	  configurations for the board and its peripherals.
 
 config MACH_EUKREA_CPUIMX35SD
 	bool "Support Eukrea CPUIMX35 Platform"
-	select SOC_IMX35
 	select IMX_HAVE_PLATFORM_FLEXCAN
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
@@ -611,6 +610,7 @@ config MACH_EUKREA_CPUIMX35SD
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 	select MXC_ULPI if USB_ULPI
+	select SOC_IMX35
 	help
 	  Include support for Eukrea CPUIMX35 platform. This includes
 	  specific configurations for the board and its peripherals.
@@ -635,16 +635,16 @@ endchoice
 
 config MACH_VPR200
 	bool "Support VPR200 platform"
-	select SOC_IMX35
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_GPIO_KEYS
 	select IMX_HAVE_PLATFORM_IMX2_WDT
-	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_IMX_I2C
+	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_IPU_CORE
 	select IMX_HAVE_PLATFORM_MXC_EHCI
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
+	select SOC_IMX35
 	help
 	  Include support for VPR200 platform. This includes specific
 	  configurations for the board and its peripherals.
@@ -654,11 +654,11 @@ comment "i.MX5 platforms:"
 config MACH_MX50_RDP
 	bool "Support MX50 reference design platform"
 	depends on BROKEN
-	select SOC_IMX50
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 	select IMX_HAVE_PLATFORM_SPI_IMX
+	select SOC_IMX50
 	help
 	  Include support for MX50 reference design platform (RDP) board. This
 	  includes specific configurations for the board and its peripherals.
@@ -667,15 +667,14 @@ comment "i.MX51 machines:"
 
 config MACH_IMX51_DT
 	bool "Support i.MX51 platforms from device tree"
-	select SOC_IMX51
 	select MACH_MX51_BABBAGE
+	select SOC_IMX51
 	help
 	  Include support for Freescale i.MX51 based platforms
 	  using the device tree for discovery
 
 config MACH_MX51_BABBAGE
 	bool "Support MX51 BABBAGE platforms"
-	select SOC_IMX51
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_I2C
@@ -683,6 +682,7 @@ config MACH_MX51_BABBAGE
 	select IMX_HAVE_PLATFORM_MXC_EHCI
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 	select IMX_HAVE_PLATFORM_SPI_IMX
+	select SOC_IMX51
 	help
 	  Include support for MX51 Babbage platform, also known as MX51EVK in
 	  u-boot. This includes specific configurations for the board and its
@@ -690,27 +690,27 @@ config MACH_MX51_BABBAGE
 
 config MACH_MX51_3DS
 	bool "Support MX51PDK (3DS)"
-	select SOC_IMX51
 	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_KEYPAD
 	select IMX_HAVE_PLATFORM_IMX_UART
 	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
 	select IMX_HAVE_PLATFORM_SPI_IMX
 	select MXC_DEBUG_BOARD
+	select SOC_IMX51
 	help
 	  Include support for MX51PDK (3DS) platform. This includes specific
 	  configurations for the board and its peripherals.
 
 config MACH_EUKREA_CPUIMX51SD
 	bool "Support Eukrea CPUIMX51SD module"
-	select SOC_IMX51
 	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
+	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_IMX_I2C
 	select IMX_HAVE_PLATFORM_IMX_UART
-	select IMX_HAVE_PLATFORM_IMX2_WDT
 	select IMX_HAVE_PLATFORM_MXC_EHCI
 	select IMX_HAVE_PLATFORM_MXC_NAND
 	select IMX_HAVE_PLATFORM_SPI_IMX
+	select SOC_IMX51
 	help
 	  Include support for Eukrea CPUIMX51SD platform. This includes
 	  specific configurations for the module and its peripherals.
@@ -736,12 +736,12 @@ comment "Device tree only"
 
 config	SOC_IMX53
 	bool "i.MX53 support"
-	select SOC_IMX5
 	select ARCH_MX5
 	select ARCH_MX53
 	select HAVE_CAN_FLEXCAN if CAN
 	select PINCTRL
 	select PINCTRL_IMX53
+	select SOC_IMX5
 
 	help
 	  This enables support for Freescale i.MX53 processor.
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index e5165a84f93..a0bf84803ea 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -369,6 +369,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
 	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi");
 	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi");
 	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi");
+	clk_register_clkdev(clk[nfc_gate], NULL, "83fdb000.nand");
 
 	/* set the usboh3 parent to pll2_sw */
 	clk_set_parent(clk[usboh3_sel], clk[pll2_sw]);
@@ -461,6 +462,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
 	clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi");
 	clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi");
 	clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi");
+	clk_register_clkdev(clk[nfc_gate], NULL, "63fdb000.nand");
 	clk_register_clkdev(clk[can1_ipg_gate], "ipg", "53fc8000.can");
 	clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can");
 	clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can");
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index fd3177f9e79..98aef571b9f 100644
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -348,4 +348,5 @@ void __init eukrea_mbimx27_baseboard_init(void)
 	imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data);
 
 	gpio_led_register_device(-1, &eukrea_mbimx27_gpio_led_info);
+	imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
 }
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
index dfd2da87c2d..0b84666792f 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c
@@ -306,4 +306,5 @@ void __init eukrea_mbimxsd25_baseboard_init(void)
 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 	gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
 	imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
+	imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
 }
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
index 6e9dd12a696..c6532a007d4 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c
@@ -315,4 +315,5 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 	gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
 	imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
+	imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
 }
diff --git a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
index 96a24b73dc2..8b0de30d7a3 100644
--- a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c
@@ -228,4 +228,5 @@ void __init eukrea_mbimxsd51_baseboard_init(void)
 
 	gpio_led_register_device(-1, &eukrea_mbimxsd51_led_info);
 	imx_add_gpio_keys(&eukrea_mbimxsd51_button_data);
+	imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0);
 }
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 821d6aac411..141756f00ae 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -32,6 +32,7 @@
 #include <linux/delay.h>
 #include <linux/dma-mapping.h>
 #include <linux/leds.h>
+#include <linux/platform_data/asoc-mx27vis.h>
 #include <media/soc_camera.h>
 #include <sound/tlv320aic32x4.h>
 #include <asm/mach-types.h>
@@ -58,6 +59,11 @@
 #define EXPBOARD_BIT1		(GPIO_PORTD + 27)
 #define EXPBOARD_BIT0		(GPIO_PORTD + 28)
 
+#define AMP_GAIN_0		(GPIO_PORTF + 9)
+#define AMP_GAIN_1		(GPIO_PORTF + 8)
+#define AMP_MUTE_SDL		(GPIO_PORTE + 5)
+#define AMP_MUTE_SDR		(GPIO_PORTF + 7)
+
 static const int visstrim_m10_pins[] __initconst = {
 	/* UART1 (console) */
 	PE12_PF_UART1_TXD,
@@ -139,6 +145,11 @@ static const int visstrim_m10_pins[] __initconst = {
 	EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
 	EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
 	EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
+	/* Audio AMP control */
+	AMP_GAIN_0 | GPIO_GPIO | GPIO_OUT,
+	AMP_GAIN_1 | GPIO_GPIO | GPIO_OUT,
+	AMP_MUTE_SDL | GPIO_GPIO | GPIO_OUT,
+	AMP_MUTE_SDR | GPIO_GPIO | GPIO_OUT,
 };
 
 static struct gpio visstrim_m10_version_gpios[] = {
@@ -166,6 +177,26 @@ static const struct gpio visstrim_m10_gpios[] __initconst = {
 		.flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
 		.label = "usbotg_cs",
 	},
+	{
+		.gpio = AMP_GAIN_0,
+		.flags = GPIOF_DIR_OUT,
+		.label = "amp-gain-0",
+	},
+	{
+		.gpio = AMP_GAIN_1,
+		.flags = GPIOF_DIR_OUT,
+		.label = "amp-gain-1",
+	},
+	{
+		.gpio = AMP_MUTE_SDL,
+		.flags = GPIOF_DIR_OUT,
+		.label = "amp-mute-sdl",
+	},
+	{
+		.gpio = AMP_MUTE_SDR,
+		.flags = GPIOF_DIR_OUT,
+		.label = "amp-mute-sdr",
+	},
 };
 
 /* Camera */
@@ -444,6 +475,14 @@ static void __init visstrim_deinterlace_init(void)
 }
 
 
+/* Audio */
+static const struct snd_mx27vis_platform_data snd_mx27vis_pdata __initconst = {
+	.amp_gain0_gpio = AMP_GAIN_0,
+	.amp_gain1_gpio = AMP_GAIN_1,
+	.amp_mutel_gpio = AMP_MUTE_SDL,
+	.amp_muter_gpio = AMP_MUTE_SDR,
+};
+
 static void __init visstrim_m10_revision(void)
 {
 	int exp_version = 0;
@@ -502,7 +541,8 @@ static void __init visstrim_m10_board_init(void)
 	imx27_add_fec(NULL);
 	imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
 	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
-	imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
+	imx_add_platform_device("mx27vis", 0, NULL, 0, &snd_mx27vis_pdata,
+				sizeof(snd_mx27vis_pdata));
 	platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
 				      &iclink_tvp5150, sizeof(iclink_tvp5150));
 	gpio_led_register_device(0, &visstrim_m10_led_data);
diff --git a/arch/arm/mach-integrator/include/mach/cm.h b/arch/arm/mach-integrator/include/mach/cm.h
index 1a78692e32a..202e6a57f10 100644
--- a/arch/arm/mach-integrator/include/mach/cm.h
+++ b/arch/arm/mach-integrator/include/mach/cm.h
@@ -3,7 +3,7 @@
  */
 void cm_control(u32, u32);
 
-#define CM_CTRL	IO_ADDRESS(INTEGRATOR_HDR_CTRL)
+#define CM_CTRL	__io_address(INTEGRATOR_HDR_CTRL)
 
 #define CM_CTRL_LED			(1 << 0)
 #define CM_CTRL_nMBDET			(1 << 1)
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index 4c034752685..efeac5d0bc9 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -324,9 +324,9 @@
  */
 #define PHYS_PCI_V3_BASE                0x62000000
 
-#define PCI_MEMORY_VADDR		0xe8000000
-#define PCI_CONFIG_VADDR		0xec000000
-#define PCI_V3_VADDR			0xed000000
+#define PCI_MEMORY_VADDR		IOMEM(0xe8000000)
+#define PCI_CONFIG_VADDR		IOMEM(0xec000000)
+#define PCI_V3_VADDR			IOMEM(0xed000000)
 
 /* ------------------------------------------------------------------------
  *  Integrator Interrupt Controllers
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index d5b5435a09a..e6617c134fa 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -157,7 +157,7 @@ static struct map_desc ap_io_desc[] __initdata = {
 static void __init ap_map_io(void)
 {
 	iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
-	vga_base = PCI_MEMORY_VADDR;
+	vga_base = (unsigned long)PCI_MEMORY_VADDR;
 	pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE));
 }
 
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 6870a1fbcd7..5b08e8e4cc8 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -261,6 +261,8 @@ static void __init intcp_init_early(void)
 #endif
 }
 
+#ifdef CONFIG_OF
+
 static void __init intcp_timer_init_of(void)
 {
 	struct device_node *node;
@@ -297,8 +299,6 @@ static struct sys_timer cp_of_timer = {
 	.init		= intcp_timer_init_of,
 };
 
-#ifdef CONFIG_OF
-
 static const struct of_device_id fpga_irq_of_match[] __initconst = {
 	{ .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
 	{ /* Sentinel */ }
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index 060cddde2fd..e9474411163 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -30,7 +30,7 @@
 extern int init_atu;
 
 static int __init
-iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
+iq81340sc_atux_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin)
 {
 	WARN_ON(idsel < 1 || idsel > 2);
 
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 9082b84aeeb..2f28018c444 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -504,7 +504,7 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
 
 /* Scan an IOP13XX PCI bus.  nr selects which ATU we use.
  */
-struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
+struct pci_bus * __devinit iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
 {
 	int which_atu;
 	struct pci_bus *bus = NULL;
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig
index fd5e7b6881b..73a2d905af8 100644
--- a/arch/arm/mach-ixp4xx/Kconfig
+++ b/arch/arm/mach-ixp4xx/Kconfig
@@ -234,8 +234,8 @@ config IXP4XX_QMGR
 
 config IXP4XX_NPE
 	tristate "IXP4xx Network Processor Engine support"
-	select HOTPLUG
 	select FW_LOADER
+	select HOTPLUG
 	help
 	  This driver supports IXP4xx built-in network coprocessors
 	  and is automatically selected by Ethernet and HSS drivers.
diff --git a/arch/arm/mach-ks8695/include/mach/memory.h b/arch/arm/mach-ks8695/include/mach/memory.h
index f7e1b9bce34..95e731a7ed6 100644
--- a/arch/arm/mach-ks8695/include/mach/memory.h
+++ b/arch/arm/mach-ks8695/include/mach/memory.h
@@ -34,7 +34,8 @@ extern struct bus_type platform_bus_type;
 #define __arch_dma_to_virt(dev, x)	({ (void *) (is_lbus_device(dev) ? \
 					__phys_to_virt(x) : __bus_to_virt(x)); })
 #define __arch_virt_to_dma(dev, x)	({ is_lbus_device(dev) ? \
-					(dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); })
+					(dma_addr_t)__virt_to_phys((unsigned long)x) \
+					: (dma_addr_t)__virt_to_bus(x); })
 #define __arch_pfn_to_dma(dev, pfn)	\
 	({ dma_addr_t __dma = __pfn_to_phys(pfn); \
 	   if (!is_lbus_device(dev)) \
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
index d697d07a1bf..178d4daa5e1 100644
--- a/arch/arm/mach-mmp/Kconfig
+++ b/arch/arm/mach-mmp/Kconfig
@@ -107,22 +107,22 @@ endmenu
 
 config CPU_PXA168
 	bool
-	select CPU_MOHAWK
 	select COMMON_CLK
+	select CPU_MOHAWK
 	help
 	  Select code specific to PXA168
 
 config CPU_PXA910
 	bool
-	select CPU_MOHAWK
 	select COMMON_CLK
+	select CPU_MOHAWK
 	help
 	  Select code specific to PXA910
 
 config CPU_MMP2
 	bool
-	select CPU_PJ4
 	select COMMON_CLK
+	select CPU_PJ4
 	help
 	  Select code specific to MMP2. MMP2 is ARMv7 compatible.
 
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 7902de151cc..b61908594b4 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -10,35 +10,35 @@ choice
 
 config ARCH_MSM7X00A
 	bool "MSM7x00A / MSM7x01A"
-	select MACH_TROUT if !MACH_HALIBUT
 	select ARCH_MSM_ARM11
-	select MSM_SMD
-	select MSM_SMD_PKG3
 	select CPU_V6
 	select GPIO_MSM_V1
+	select MACH_TROUT if !MACH_HALIBUT
 	select MSM_PROC_COMM
+	select MSM_SMD
+	select MSM_SMD_PKG3
 
 config ARCH_MSM7X30
 	bool "MSM7x30"
-	select MACH_MSM7X30_SURF # if !
 	select ARCH_MSM_SCORPION
-	select MSM_SMD
-	select MSM_VIC
 	select CPU_V7
-	select MSM_GPIOMUX
 	select GPIO_MSM_V1
+	select MACH_MSM7X30_SURF # if !
+	select MSM_GPIOMUX
 	select MSM_PROC_COMM
+	select MSM_SMD
+	select MSM_VIC
 
 config ARCH_QSD8X50
 	bool "QSD8X50"
-	select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5
 	select ARCH_MSM_SCORPION
-	select MSM_SMD
-	select MSM_VIC
 	select CPU_V7
-	select MSM_GPIOMUX
 	select GPIO_MSM_V1
+	select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5
+	select MSM_GPIOMUX
 	select MSM_PROC_COMM
+	select MSM_SMD
+	select MSM_VIC
 
 endchoice
 
@@ -47,10 +47,10 @@ config ARCH_MSM8X60
 	select ARCH_MSM_SCORPIONMP
 	select ARM_GIC
 	select CPU_V7
-	select MSM_V2_TLMM
 	select GPIO_MSM_V2
 	select MSM_GPIOMUX
 	select MSM_SCM if SMP
+	select MSM_V2_TLMM
 	select USE_OF
 
 config ARCH_MSM8960
@@ -58,9 +58,9 @@ config ARCH_MSM8960
 	select ARCH_MSM_SCORPIONMP
 	select ARM_GIC
 	select CPU_V7
-	select MSM_V2_TLMM
 	select MSM_GPIOMUX
 	select MSM_SCM if SMP
+	select MSM_V2_TLMM
 	select USE_OF
 
 config MSM_HAS_DEBUG_UART_HS
@@ -110,8 +110,8 @@ config MACH_QSD8X50_SURF
 
 config MACH_QSD8X50A_ST1_5
 	depends on ARCH_QSD8X50
-	select MSM_SOC_REV_A
 	bool "QSD8x50A ST1.5"
+	select MSM_SOC_REV_A
 	help
 	  Support for the Qualcomm ST1.5.
 
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 343c435b417..26e9876b50e 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -54,7 +54,7 @@ static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, i
 /*
  * Description of the windows needed by the platform code
  */
-static struct __initdata orion_addr_map_cfg addr_map_cfg = {
+static struct orion_addr_map_cfg addr_map_cfg __initdata = {
 	.num_wins = 14,
 	.remappable_wins = 8,
 	.win_cfg_base = win_cfg_base,
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 131cd4883f3..d0cb4857b4b 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -336,7 +336,7 @@ void __init mv78xx0_init_early(void)
 	orion_time_set_base(TIMER_VIRT_BASE);
 }
 
-static void mv78xx0_timer_init(void)
+static void __init_refok mv78xx0_timer_init(void)
 {
 	orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 			IRQ_MV78XX0_TIMER_1, get_tclk());
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig
index 365879b47c0..c744946ef02 100644
--- a/arch/arm/mach-nomadik/Kconfig
+++ b/arch/arm/mach-nomadik/Kconfig
@@ -4,8 +4,8 @@ menu "Nomadik boards"
 
 config MACH_NOMADIK_8815NHK
 	bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
-	select NOMADIK_8815
 	select HAS_MTU
+	select NOMADIK_8815
 
 endmenu
 
@@ -16,7 +16,7 @@ config I2C_BITBANG_8815NHK
 	tristate "Driver for bit-bang busses found on the 8815 NHK"
 	depends on I2C && MACH_NOMADIK_8815NHK
 	depends on PINCTRL_NOMADIK
-	select I2C_ALGOBIT
 	default y
+	select I2C_ALGOBIT
 
 endif
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index cba3f7191cf..903da8eb886 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -8,15 +8,15 @@ comment "OMAP Core Type"
 config ARCH_OMAP730
 	depends on ARCH_OMAP1
 	bool "OMAP730 Based System"
+	select ARCH_OMAP_OTG
 	select CPU_ARM926T
 	select OMAP_MPU_TIMER
-	select ARCH_OMAP_OTG
 
 config ARCH_OMAP850
 	depends on ARCH_OMAP1
 	bool "OMAP850 Based System"
-	select CPU_ARM926T
 	select ARCH_OMAP_OTG
+	select CPU_ARM926T
 
 config ARCH_OMAP15XX
 	depends on ARCH_OMAP1
@@ -28,8 +28,8 @@ config ARCH_OMAP15XX
 config ARCH_OMAP16XX
 	depends on ARCH_OMAP1
 	bool "OMAP16xx Based System"
-	select CPU_ARM926T
 	select ARCH_OMAP_OTG
+	select CPU_ARM926T
 
 comment "OMAP Board Type"
 	depends on ARCH_OMAP1
@@ -132,8 +132,8 @@ config MACH_OMAP_PALMTT
 
 config MACH_SX1
 	bool "Siemens SX1"
-	select I2C
 	depends on ARCH_OMAP1 && ARCH_OMAP15XX
+	select I2C
 	help
 	  Support for the Siemens SX1 phone. To boot the kernel,
 	  you'll need a SX1 compatible bootloader; check out
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 726c02c9c0c..d3fec92c54c 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -231,7 +231,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 
 		omap_mmc_add("mmci-omap", i, base, size, irq,
 				rx_req, tx_req, mmc_data[i]);
-	};
+	}
 }
 
 #endif
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a6219eaf1f6..2a1a898c7f9 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -6,19 +6,19 @@ config ARCH_OMAP2PLUS_TYPICAL
 	bool "Typical OMAP configuration"
 	default y
 	select AEABI
-	select REGULATOR
-	select PM_RUNTIME
-	select VFP
-	select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
-	select SERIAL_OMAP
-	select SERIAL_OMAP_CONSOLE
+	select HIGHMEM
 	select I2C
 	select I2C_OMAP
 	select MENELAUS if ARCH_OMAP2
+	select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
+	select PINCTRL
+	select PM_RUNTIME
+	select REGULATOR
+	select SERIAL_OMAP
+	select SERIAL_OMAP_CONSOLE
 	select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
 	select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
-	select HIGHMEM
-	select PINCTRL
+	select VFP
 	help
 	  Compile a kernel suitable for booting most boards
 
@@ -40,44 +40,44 @@ config ARCH_OMAP3
 	bool "TI OMAP3"
 	depends on ARCH_OMAP2PLUS
 	default y
-	select CPU_V7
-	select USB_ARCH_HAS_EHCI if USB_SUPPORT
 	select ARCH_HAS_OPP
-	select PM_RUNTIME if CPU_IDLE
-	select PM_OPP if PM
 	select ARM_CPU_SUSPEND if PM
+	select CPU_V7
 	select MULTI_IRQ_HANDLER
-	select SOC_HAS_OMAP2_SDRC
 	select OMAP_INTERCONNECT
+	select PM_OPP if PM
+	select PM_RUNTIME if CPU_IDLE
+	select SOC_HAS_OMAP2_SDRC
+	select USB_ARCH_HAS_EHCI if USB_SUPPORT
 
 config ARCH_OMAP4
 	bool "TI OMAP4"
 	default y
 	depends on ARCH_OMAP2PLUS
+	select ARCH_HAS_OPP
+	select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
+	select ARM_CPU_SUSPEND if PM
+	select ARM_ERRATA_720789
+	select ARM_GIC
 	select CACHE_L2X0
 	select CPU_V7
-	select ARM_GIC
 	select HAVE_SMP
 	select LOCAL_TIMERS if SMP
+	select OMAP_INTERCONNECT
 	select PL310_ERRATA_588369
 	select PL310_ERRATA_727915
-	select ARM_ERRATA_720789
-	select ARCH_HAS_OPP
-	select PM_RUNTIME if CPU_IDLE
 	select PM_OPP if PM
+	select PM_RUNTIME if CPU_IDLE
 	select USB_ARCH_HAS_EHCI if USB_SUPPORT
-	select ARM_CPU_SUSPEND if PM
-	select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
-	select OMAP_INTERCONNECT
 
 config SOC_OMAP5
 	bool "TI OMAP5"
-	select CPU_V7
+	select ARM_ARCH_TIMER
+	select ARM_CPU_SUSPEND if PM
 	select ARM_GIC
+	select CPU_V7
 	select HAVE_SMP
-	select ARM_CPU_SUSPEND if PM
 	select SOC_HAS_REALTIME_COUNTER
-	select ARM_ARCH_TIMER
 
 comment "OMAP Core Type"
 	depends on ARCH_OMAP2
@@ -109,8 +109,8 @@ config SOC_TI81XX
 config SOC_AM33XX
 	bool "AM33XX support"
 	default y
-	select CPU_V7
 	select ARM_CPU_SUSPEND if PM
+	select CPU_V7
 	select MULTI_IRQ_HANDLER
 
 config OMAP_PACKAGE_ZAF
@@ -157,8 +157,8 @@ config MACH_OMAP_H4
 	bool "OMAP 2420 H4 board"
 	depends on SOC_OMAP2420
 	default y
-	select OMAP_PACKAGE_ZAF
 	select OMAP_DEBUG_DEVICES
+	select OMAP_PACKAGE_ZAF
 
 config MACH_OMAP_APOLLON
 	bool "OMAP 2420 Apollon board"
@@ -193,8 +193,8 @@ config MACH_OMAP_LDP
 config MACH_OMAP3530_LV_SOM
 	bool "OMAP3 Logic 3530 LV SOM board"
 	depends on ARCH_OMAP3
-	select OMAP_PACKAGE_CBB
 	default y
+	select OMAP_PACKAGE_CBB
 	help
 	 Support for the LogicPD OMAP3530 SOM Development kit
 	 for full description please see the products webpage at
@@ -203,8 +203,8 @@ config MACH_OMAP3530_LV_SOM
 config MACH_OMAP3_TORPEDO
 	bool "OMAP3 Logic 35x Torpedo board"
 	depends on ARCH_OMAP3
-	select OMAP_PACKAGE_CBB
 	default y
+	select OMAP_PACKAGE_CBB
 	help
 	 Support for the LogicPD OMAP35x Torpedo Development kit
 	 for full description please see the products webpage at
@@ -265,17 +265,17 @@ config MACH_NOKIA_N8X0
 	bool "Nokia N800/N810"
 	depends on SOC_OMAP2420
 	default y
-	select OMAP_PACKAGE_ZAC
 	select MACH_NOKIA_N800
 	select MACH_NOKIA_N810
 	select MACH_NOKIA_N810_WIMAX
+	select OMAP_PACKAGE_ZAC
 
 config MACH_NOKIA_RM680
 	bool "Nokia RM-680/696 board"
 	depends on ARCH_OMAP3
 	default y
-	select OMAP_PACKAGE_CBB
 	select MACH_NOKIA_RM696
+	select OMAP_PACKAGE_CBB
 
 config MACH_NOKIA_RX51
 	bool "Nokia RX-51 board"
@@ -288,20 +288,20 @@ config MACH_OMAP_ZOOM2
 	depends on ARCH_OMAP3
 	default y
 	select OMAP_PACKAGE_CBB
+	select REGULATOR_FIXED_VOLTAGE if REGULATOR
 	select SERIAL_8250
-	select SERIAL_CORE_CONSOLE
 	select SERIAL_8250_CONSOLE
-	select REGULATOR_FIXED_VOLTAGE if REGULATOR
+	select SERIAL_CORE_CONSOLE
 
 config MACH_OMAP_ZOOM3
 	bool "OMAP3630 Zoom3 board"
 	depends on ARCH_OMAP3
 	default y
 	select OMAP_PACKAGE_CBP
+	select REGULATOR_FIXED_VOLTAGE if REGULATOR
 	select SERIAL_8250
-	select SERIAL_CORE_CONSOLE
 	select SERIAL_8250_CONSOLE
-	select REGULATOR_FIXED_VOLTAGE if REGULATOR
+	select SERIAL_CORE_CONSOLE
 
 config MACH_CM_T35
 	bool "CompuLab CM-T35/CM-T3730 modules"
@@ -329,8 +329,8 @@ config MACH_IGEP0030
 	bool "IGEP OMAP3 module"
 	depends on ARCH_OMAP3
 	default y
-	select OMAP_PACKAGE_CBB
 	select MACH_IGEP0020
+	select OMAP_PACKAGE_CBB
 
 config MACH_SBC3530
 	bool "OMAP3 SBC STALKER board"
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index a88809a59ea..3669c120c7e 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -607,29 +607,6 @@ static void __init omap_sfh7741prox_init(void)
 			__func__, OMAP4_SFH7741_ENABLE_GPIO, error);
 }
 
-static struct gpio sdp4430_hdmi_gpios[] = {
-	{ HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" },
-	{ HDMI_GPIO_LS_OE,	GPIOF_OUT_INIT_HIGH,	"hdmi_gpio_ls_oe" },
-	{ HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" },
-};
-
-static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev)
-{
-	int status;
-
-	status = gpio_request_array(sdp4430_hdmi_gpios,
-				    ARRAY_SIZE(sdp4430_hdmi_gpios));
-	if (status)
-		pr_err("%s: Cannot request HDMI GPIOs\n", __func__);
-
-	return status;
-}
-
-static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev)
-{
-	gpio_free_array(sdp4430_hdmi_gpios, ARRAY_SIZE(sdp4430_hdmi_gpios));
-}
-
 static struct nokia_dsi_panel_data dsi1_panel = {
 		.name		= "taal",
 		.reset_gpio	= 102,
@@ -650,29 +627,6 @@ static struct omap_dss_device sdp4430_lcd_device = {
 	.phy.dsi		= {
 		.module		= 0,
 	},
-
-	.clocks = {
-		.dispc = {
-			.channel = {
-				/* Logic Clock = 172.8 MHz */
-				.lck_div	= 1,
-				/* Pixel Clock = 34.56 MHz */
-				.pck_div	= 5,
-				.lcd_clk_src	= OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,
-			},
-			.dispc_fclk_src	= OMAP_DSS_CLK_SRC_FCK,
-		},
-
-		.dsi = {
-			.regn		= 16,	/* Fint = 2.4 MHz */
-			.regm		= 180,	/* DDR Clock = 216 MHz */
-			.regm_dispc	= 5,	/* PLL1_CLK1 = 172.8 MHz */
-			.regm_dsi	= 5,	/* PLL1_CLK2 = 172.8 MHz */
-
-			.lp_clk_div	= 10,	/* LP Clock = 8.64 MHz */
-			.dsi_fclk_src	= OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI,
-		},
-	},
 	.channel		= OMAP_DSS_CHANNEL_LCD,
 };
 
@@ -697,33 +651,12 @@ static struct omap_dss_device sdp4430_lcd2_device = {
 
 		.module		= 1,
 	},
-
-	.clocks = {
-		.dispc = {
-			.channel = {
-				/* Logic Clock = 172.8 MHz */
-				.lck_div	= 1,
-				/* Pixel Clock = 34.56 MHz */
-				.pck_div	= 5,
-				.lcd_clk_src	= OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,
-			},
-			.dispc_fclk_src	= OMAP_DSS_CLK_SRC_FCK,
-		},
-
-		.dsi = {
-			.regn		= 16,	/* Fint = 2.4 MHz */
-			.regm		= 180,	/* DDR Clock = 216 MHz */
-			.regm_dispc	= 5,	/* PLL1_CLK1 = 172.8 MHz */
-			.regm_dsi	= 5,	/* PLL1_CLK2 = 172.8 MHz */
-
-			.lp_clk_div	= 10,	/* LP Clock = 8.64 MHz */
-			.dsi_fclk_src	= OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,
-		},
-	},
 	.channel		= OMAP_DSS_CHANNEL_LCD2,
 };
 
 static struct omap_dss_hdmi_data sdp4430_hdmi_data = {
+	.ct_cp_hpd_gpio = HDMI_GPIO_CT_CP_HPD,
+	.ls_oe_gpio = HDMI_GPIO_LS_OE,
 	.hpd_gpio = HDMI_GPIO_HPD,
 };
 
@@ -731,8 +664,6 @@ static struct omap_dss_device sdp4430_hdmi_device = {
 	.name = "hdmi",
 	.driver_name = "hdmi_panel",
 	.type = OMAP_DISPLAY_TYPE_HDMI,
-	.platform_enable = sdp4430_panel_enable_hdmi,
-	.platform_disable = sdp4430_panel_disable_hdmi,
 	.channel = OMAP_DSS_CHANNEL_DIGIT,
 	.data = &sdp4430_hdmi_data,
 };
@@ -830,6 +761,32 @@ static struct omap_board_mux board_mux[] __initdata = {
 	/* NIRQ2 for twl6040 */
 	OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 |
 		  OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE),
+	/* GPIO_127 for twl6040 */
+	OMAP4_MUX(HDQ_SIO, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
+	/* McPDM */
+	OMAP4_MUX(ABE_PDM_UL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	OMAP4_MUX(ABE_PDM_DL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	OMAP4_MUX(ABE_PDM_FRAME, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
+	OMAP4_MUX(ABE_PDM_LB_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	OMAP4_MUX(ABE_CLKS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	/* DMIC */
+	OMAP4_MUX(ABE_DMIC_CLK1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
+	OMAP4_MUX(ABE_DMIC_DIN1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+	OMAP4_MUX(ABE_DMIC_DIN2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+	OMAP4_MUX(ABE_DMIC_DIN3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+	/* McBSP1 */
+	OMAP4_MUX(ABE_MCBSP1_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+	OMAP4_MUX(ABE_MCBSP1_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	OMAP4_MUX(ABE_MCBSP1_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
+		  OMAP_PULL_ENA),
+	OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+	/* McBSP2 */
+	OMAP4_MUX(ABE_MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+	OMAP4_MUX(ABE_MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	OMAP4_MUX(ABE_MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
+		  OMAP_PULL_ENA),
+	OMAP4_MUX(ABE_MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
 	{ .reg_offset = OMAP_MUX_TERMINATOR },
 };
 
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 0d99c9110d0..e16289755f2 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -263,6 +263,16 @@ static __init void am3517_evm_musb_init(void)
 	usb_musb_init(&musb_board_data);
 }
 
+static __init void am3517_evm_mcbsp1_init(void)
+{
+	u32 devconf0;
+
+	/* McBSP1 CLKR/FSR signal to be connected to CLKX/FSX pin */
+	devconf0 = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+	devconf0 |=  OMAP2_MCBSP1_CLKR_MASK | OMAP2_MCBSP1_FSR_MASK;
+	omap_ctrl_writel(devconf0, OMAP2_CONTROL_DEVCONF0);
+}
+
 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
 	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
 #if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
@@ -366,6 +376,9 @@ static void __init am3517_evm_init(void)
 	/* MUSB */
 	am3517_evm_musb_init();
 
+	/* McBSP1 */
+	am3517_evm_mcbsp1_init();
+
 	/* MMC init function */
 	omap_hsmmc_init(mmc);
 }
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 8ffd612c5e0..376d26eb601 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -723,6 +723,7 @@ static void __init cm_t3x_common_init(void)
 	cm_t35_init_ethernet();
 	cm_t35_init_led();
 	cm_t35_init_display();
+	omap_twl4030_audio_init("cm-t3x");
 
 	usb_musb_init(NULL);
 	cm_t35_init_usbh();
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index 7bb8056d438..1fd161e934c 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -623,6 +623,7 @@ static void __init devkit8000_init(void)
 	usbhs_init(&usbhs_bdata);
 	omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
 			     ARRAY_SIZE(devkit8000_nand_partitions));
+	omap_twl4030_audio_init("omap3beagle");
 
 	/* Ensure SDRC pins are mux'd for self-refresh */
 	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 0cabe61cd50..e642acf9cad 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -218,7 +218,7 @@ void __init board_flash_init(struct flash_partitions partition_info[],
 			if (onenandcs > GPMC_CS_NUM)
 				onenandcs = cs;
 			break;
-		};
+		}
 		cs++;
 	}
 
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index fb8bd837dd1..48d5e41dfbf 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -625,6 +625,7 @@ static void __init igep_init(void)
 
 	igep_flash_init();
 	igep_leds_init();
+	omap_twl4030_audio_init("igep2");
 
 	/*
 	 * WLAN-BT combo module from MuRata which has a Marvell WLAN
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 68ff8d51973..388c431c745 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -461,7 +461,7 @@ static void __init beagle_opp_init(void)
 		mpu_dev = omap_device_get_by_hwmod_name("mpu");
 		iva_dev = omap_device_get_by_hwmod_name("iva");
 
-		if (!mpu_dev || !iva_dev) {
+		if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
 			pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
 				__func__, mpu_dev, iva_dev);
 			return;
@@ -514,6 +514,7 @@ static void __init omap3_beagle_init(void)
 	usbhs_init(&usbhs_bdata);
 	omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions,
 			     ARRAY_SIZE(omap3beagle_nand_partitions));
+	omap_twl4030_audio_init("omap3beagle");
 
 	/* Ensure msecure is mux'd to be able to set the RTC. */
 	omap_mux_init_signal("sys_drm_msecure", OMAP_PIN_OFF_OUTPUT_HIGH);
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c64e565bdef..b9b776b6c95 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -88,11 +88,10 @@ enum {
 
 static u8 omap3_evm_version;
 
-u8 get_omap3_evm_rev(void)
+static u8 get_omap3_evm_rev(void)
 {
 	return omap3_evm_version;
 }
-EXPORT_SYMBOL(get_omap3_evm_rev);
 
 static void __init omap3_evm_get_revision(void)
 {
@@ -739,6 +738,7 @@ static void __init omap3_evm_init(void)
 	omap3evm_init_smsc911x();
 	omap3_evm_display_init();
 	omap3_evm_wl12xx_init();
+	omap_twl4030_audio_init("omap3evm");
 }
 
 MACHINE_START(OMAP3EVM, "OMAP3 EVM")
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index c7f3d026e6d..731235eb319 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -48,11 +48,6 @@
 #include <video/omap-panel-tfp410.h>
 
 #include <linux/platform_data/spi-omap2-mcspi.h>
-#include <linux/input/matrix_keypad.h>
-#include <linux/spi/spi.h>
-#include <linux/interrupt.h>
-#include <linux/smsc911x.h>
-#include <linux/i2c/at24.h>
 
 #include "sdram-micron-mt46h32m32lf-6.h"
 #include "mux.h"
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 2b012f9d692..bfcd397e233 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -247,8 +247,7 @@ static struct platform_device omap_vwlan_device = {
 };
 
 static struct wl12xx_platform_data omap_panda_wlan_data  __initdata = {
-	/* PANDA ref clock is 38.4 MHz */
-	.board_ref_clock = 2,
+	.board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
 };
 
 static struct twl6040_codec_data twl6040_codec = {
@@ -388,6 +387,21 @@ static struct omap_board_mux board_mux[] __initdata = {
 	/* NIRQ2 for twl6040 */
 	OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 |
 		  OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE),
+	/* GPIO_127 for twl6040 */
+	OMAP4_MUX(HDQ_SIO, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
+	/* McPDM */
+	OMAP4_MUX(ABE_PDM_UL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	OMAP4_MUX(ABE_PDM_DL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	OMAP4_MUX(ABE_PDM_FRAME, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
+	OMAP4_MUX(ABE_PDM_LB_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	OMAP4_MUX(ABE_CLKS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	/* McBSP1 */
+	OMAP4_MUX(ABE_MCBSP1_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+	OMAP4_MUX(ABE_MCBSP1_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
+	OMAP4_MUX(ABE_MCBSP1_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
+		  OMAP_PULL_ENA),
+	OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
+
 	{ .reg_offset = OMAP_MUX_TERMINATOR },
 };
 
@@ -414,30 +428,9 @@ static struct omap_dss_device omap4_panda_dvi_device = {
 	.channel		= OMAP_DSS_CHANNEL_LCD2,
 };
 
-static struct gpio panda_hdmi_gpios[] = {
-	{ HDMI_GPIO_CT_CP_HPD, GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ct_cp_hpd" },
-	{ HDMI_GPIO_LS_OE,	GPIOF_OUT_INIT_HIGH, "hdmi_gpio_ls_oe" },
-	{ HDMI_GPIO_HPD, GPIOF_DIR_IN, "hdmi_gpio_hpd" },
-};
-
-static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev)
-{
-	int status;
-
-	status = gpio_request_array(panda_hdmi_gpios,
-				    ARRAY_SIZE(panda_hdmi_gpios));
-	if (status)
-		pr_err("Cannot request HDMI GPIOs\n");
-
-	return status;
-}
-
-static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev)
-{
-	gpio_free_array(panda_hdmi_gpios, ARRAY_SIZE(panda_hdmi_gpios));
-}
-
 static struct omap_dss_hdmi_data omap4_panda_hdmi_data = {
+	.ct_cp_hpd_gpio = HDMI_GPIO_CT_CP_HPD,
+	.ls_oe_gpio = HDMI_GPIO_LS_OE,
 	.hpd_gpio = HDMI_GPIO_HPD,
 };
 
@@ -445,8 +438,6 @@ static struct omap_dss_device  omap4_panda_hdmi_device = {
 	.name = "hdmi",
 	.driver_name = "hdmi_panel",
 	.type = OMAP_DISPLAY_TYPE_HDMI,
-	.platform_enable = omap4_panda_panel_enable_hdmi,
-	.platform_disable = omap4_panda_panel_disable_hdmi,
 	.channel = OMAP_DSS_CHANNEL_DIGIT,
 	.data = &omap4_panda_hdmi_data,
 };
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 2e7f24030fc..b700685762b 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -504,6 +504,7 @@ static void __init overo_init(void)
 	overo_display_init();
 	overo_init_led();
 	overo_init_keys();
+	omap_twl4030_audio_init("overo");
 
 	/* Ensure SDRC pins are mux'd for self-refresh */
 	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ed85fb898c7..020e03c95bf 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -748,7 +748,7 @@ static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module =
 	.subdev_board_info = &rx51_si4713_board_info,
 };
 
-static struct platform_device rx51_si4713_dev = {
+static struct platform_device rx51_si4713_dev __initdata_or_module = {
 	.name	= "radio-si4713",
 	.id	= -1,
 	.dev	= {
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 6bcc107b9fc..c166fe1fdff 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -35,6 +35,7 @@
 #include "common-board-devices.h"
 
 #define OMAP_ZOOM_WLAN_PMENA_GPIO	(101)
+#define ZOOM2_HEADSET_EXTMUTE_GPIO	(153)
 #define OMAP_ZOOM_WLAN_IRQ_GPIO		(162)
 
 #define LCD_PANEL_ENABLE_GPIO		(7 + OMAP_MAX_GPIO_LINES)
@@ -194,8 +195,7 @@ static struct platform_device omap_vwlan_device = {
 };
 
 static struct wl12xx_platform_data omap_zoom_wlan_data __initdata = {
-	/* ZOOM ref clock is 26 MHz */
-	.board_ref_clock = 1,
+	.board_ref_clock = WL12XX_REFCLOCK_26, /* 26 MHz */
 };
 
 static struct omap2_hsmmc_info mmc[] = {
@@ -245,12 +245,6 @@ static int zoom_twl_gpio_setup(struct device *dev,
 	return ret;
 }
 
-/* EXTMUTE callback function */
-static void zoom2_set_hs_extmute(int mute)
-{
-	gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute);
-}
-
 static struct twl4030_gpio_platform_data zoom_gpio_data = {
 	.setup		= zoom_twl_gpio_setup,
 };
@@ -277,7 +271,7 @@ static int __init omap_i2c_init(void)
 
 		codec_data->ramp_delay_value = 3;	/* 161 ms */
 		codec_data->hs_extmute = 1;
-		codec_data->set_hs_extmute = zoom2_set_hs_extmute;
+		codec_data->hs_extmute_gpio = ZOOM2_HEADSET_EXTMUTE_GPIO;
 	}
 	omap_pmic_init(1, 2400, "twl5030", 7 + OMAP_INTC_START, &zoom_twldata);
 	omap_register_i2c_bus(2, 400, NULL, 0);
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index eaed3900a83..3ff22114d70 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -382,7 +382,7 @@ void omap2_init_clksel_parent(struct clk *clk)
 						  __clk_get_name(parent) :
 						 "NULL"));
 					clk_reparent(clk, clks->parent);
-				};
+				}
 				found = 1;
 			}
 		}
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index b87b88c2638..114ab4b8e0e 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1035,6 +1035,8 @@ static struct omap_clk am33xx_clks[] = {
 	CLK(NULL,	"pruss_ocp_gclk",	&pruss_ocp_gclk,	CK_AM33XX),
 	CLK("davinci-mcasp.0",  NULL,           &mcasp0_fck,    CK_AM33XX),
 	CLK("davinci-mcasp.1",  NULL,           &mcasp1_fck,    CK_AM33XX),
+	CLK(NULL,	"mcasp0_fck",		&mcasp0_fck,	CK_AM33XX),
+	CLK(NULL,	"mcasp1_fck",		&mcasp1_fck,	CK_AM33XX),
 	CLK("NULL",	"mmc2_fck",		&mmc2_fck,	CK_AM33XX),
 	CLK(NULL,	"mmu_fck",		&mmu_fck,	CK_AM33XX),
 	CLK(NULL,	"smartreflex0_fck",	&smartreflex0_fck,	CK_AM33XX),
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
index 9a7792aec67..70294f54e35 100644
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
@@ -183,17 +183,6 @@ static int omap2_clkdm_clk_enable(struct clockdomain *clkdm)
 	if (!clkdm->clktrctrl_mask)
 		return 0;
 
-	/*
-	 * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
-	 * more details on the unpleasant problem this is working
-	 * around
-	 */
-	if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING &&
-	    !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
-		_enable_hwsup(clkdm);
-		return 0;
-	}
-
 	hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 				clkdm->clktrctrl_mask);
 
@@ -217,17 +206,6 @@ static int omap2_clkdm_clk_disable(struct clockdomain *clkdm)
 	if (!clkdm->clktrctrl_mask)
 		return 0;
 
-	/*
-	 * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
-	 * more details on the unpleasant problem this is working
-	 * around
-	 */
-	if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) &&
-	    (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) {
-		omap3_clkdm_wakeup(clkdm);
-		return 0;
-	}
-
 	hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 				clkdm->clktrctrl_mask);
 
@@ -269,6 +247,17 @@ static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
 	if (!clkdm->clktrctrl_mask)
 		return 0;
 
+	/*
+	 * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
+	 * more details on the unpleasant problem this is working
+	 * around
+	 */
+	if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) &&
+	    (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) {
+		omap3_clkdm_wakeup(clkdm);
+		return 0;
+	}
+
 	hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 				clkdm->clktrctrl_mask);
 
@@ -292,6 +281,17 @@ static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
 	if (!clkdm->clktrctrl_mask)
 		return 0;
 
+	/*
+	 * The CLKDM_MISSING_IDLE_REPORTING flag documentation has
+	 * more details on the unpleasant problem this is working
+	 * around
+	 */
+	if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING &&
+	    !(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
+		_enable_hwsup(clkdm);
+		return 0;
+	}
+
 	hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
 				clkdm->clktrctrl_mask);
 
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 7012068ccbf..1011995f150 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -95,7 +95,6 @@ static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initconst = {
 	{ "dss_core", "omapdss_dss", -1 },
 	{ "dss_dispc", "omapdss_dispc", -1 },
 	{ "dss_rfbi", "omapdss_rfbi", -1 },
-	{ "dss_venc", "omapdss_venc", -1 },
 	{ "dss_dsi1", "omapdss_dsi", 0 },
 	{ "dss_dsi2", "omapdss_dsi", 1 },
 	{ "dss_hdmi", "omapdss_hdmi", -1 },
@@ -221,7 +220,7 @@ static struct platform_device *create_dss_pdev(const char *pdev_name,
 
 	ohs[0] = oh;
 	od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
-	if (!od) {
+	if (IS_ERR(od)) {
 		pr_err("Could not alloc omap_device for %s\n", pdev_name);
 		r = -ENOMEM;
 		goto err;
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 8ab1e1bde5e..5ac5cf30406 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -838,7 +838,7 @@ static int gpmc_setup_irq(void)
 	return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
 }
 
-static __exit int gpmc_free_irq(void)
+static __devexit int gpmc_free_irq(void)
 {
 	int i;
 
@@ -944,7 +944,7 @@ static __devinit int gpmc_probe(struct platform_device *pdev)
 	return 0;
 }
 
-static __exit int gpmc_remove(struct platform_device *pdev)
+static __devexit int gpmc_remove(struct platform_device *pdev)
 {
 	gpmc_free_irq();
 	gpmc_mem_exit();
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 03ebf47cfa9..4d3a6324155 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -523,7 +523,7 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
 	dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
 
 	od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
-	if (!od) {
+	if (IS_ERR(od)) {
 		pr_err("Could not allocate od for %s\n", name);
 		goto put_pdev;
 	}
diff --git a/arch/arm/mach-omap2/include/mach/board-zoom.h b/arch/arm/mach-omap2/include/mach/board-zoom.h
index 775fdc3b000..2e9486940ea 100644
--- a/arch/arm/mach-omap2/include/mach/board-zoom.h
+++ b/arch/arm/mach-omap2/include/mach/board-zoom.h
@@ -8,5 +8,3 @@
 extern int __init zoom_debugboard_init(void);
 extern void __init zoom_peripherals_init(void);
 extern void __init zoom_display_init(void);
-
-#define ZOOM2_HEADSET_EXTMUTE_GPIO	153
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index 7d47407d6d4..37f8f948047 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -15,6 +15,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/platform_data/asoc-ti-mcbsp.h>
@@ -23,8 +24,6 @@
 #include <plat/omap_device.h>
 #include <linux/pm_runtime.h>
 
-#include "control.h"
-
 /*
  * FIXME: Find a mechanism to enable/disable runtime the McBSP ICLK autoidle.
  * Sidetone needs non-gated ICLK and sidetone autoidle is broken.
@@ -32,112 +31,6 @@
 #include "cm2xxx_3xxx.h"
 #include "cm-regbits-34xx.h"
 
-/* McBSP1 internal signal muxing function for OMAP2/3 */
-static int omap2_mcbsp1_mux_rx_clk(struct device *dev, const char *signal,
-				   const char *src)
-{
-	u32 v;
-
-	v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
-
-	if (!strcmp(signal, "clkr")) {
-		if (!strcmp(src, "clkr"))
-			v &= ~OMAP2_MCBSP1_CLKR_MASK;
-		else if (!strcmp(src, "clkx"))
-			v |= OMAP2_MCBSP1_CLKR_MASK;
-		else
-			return -EINVAL;
-	} else if (!strcmp(signal, "fsr")) {
-		if (!strcmp(src, "fsr"))
-			v &= ~OMAP2_MCBSP1_FSR_MASK;
-		else if (!strcmp(src, "fsx"))
-			v |= OMAP2_MCBSP1_FSR_MASK;
-		else
-			return -EINVAL;
-	} else {
-		return -EINVAL;
-	}
-
-	omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
-
-	return 0;
-}
-
-/* McBSP4 internal signal muxing function for OMAP4 */
-#define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX	(1 << 31)
-#define OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX	(1 << 30)
-static int omap4_mcbsp4_mux_rx_clk(struct device *dev, const char *signal,
-				   const char *src)
-{
-	u32 v;
-
-	/*
-	 * In CONTROL_MCBSPLP register only bit 30 (CLKR mux), and bit 31 (FSR
-	 * mux) is used */
-	v = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
-
-	if (!strcmp(signal, "clkr")) {
-		if (!strcmp(src, "clkr"))
-			v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
-		else if (!strcmp(src, "clkx"))
-			v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_CLKX;
-		else
-			return -EINVAL;
-	} else if (!strcmp(signal, "fsr")) {
-		if (!strcmp(src, "fsr"))
-			v &= ~OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
-		else if (!strcmp(src, "fsx"))
-			v |= OMAP4_CONTROL_MCBSPLP_ALBCTRLRX_FSX;
-		else
-			return -EINVAL;
-	} else {
-		return -EINVAL;
-	}
-
-	omap4_ctrl_pad_writel(v, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP);
-
-	return 0;
-}
-
-/* McBSP CLKS source switching function */
-static int omap2_mcbsp_set_clk_src(struct device *dev, struct clk *clk,
-				   const char *src)
-{
-	struct clk *fck_src;
-	char *fck_src_name;
-	int r;
-
-	if (!strcmp(src, "clks_ext"))
-		fck_src_name = "pad_fck";
-	else if (!strcmp(src, "clks_fclk"))
-		fck_src_name = "prcm_fck";
-	else
-		return -EINVAL;
-
-	fck_src = clk_get(dev, fck_src_name);
-	if (IS_ERR_OR_NULL(fck_src)) {
-		pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
-		       fck_src_name);
-		return -EINVAL;
-	}
-
-	pm_runtime_put_sync(dev);
-
-	r = clk_set_parent(clk, fck_src);
-	if (IS_ERR_VALUE(r)) {
-		pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
-		       "clks", fck_src_name);
-		clk_put(fck_src);
-		return -EINVAL;
-	}
-
-	pm_runtime_get_sync(dev);
-
-	clk_put(fck_src);
-
-	return 0;
-}
-
 static int omap3_enable_st_clock(unsigned int id, bool enable)
 {
 	unsigned int w;
@@ -179,17 +72,11 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
 		pdata->reg_size = 4;
 		pdata->has_ccr = true;
 	}
-	pdata->set_clk_src = omap2_mcbsp_set_clk_src;
-
-	/* On OMAP2/3 the McBSP1 port has 6 pin configuration */
-	if (id == 1 && oh->class->rev < MCBSP_CONFIG_TYPE4)
-		pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
 
-	/* On OMAP4 the McBSP4 port has 6 pin configuration */
-	if (id == 4 && oh->class->rev == MCBSP_CONFIG_TYPE4)
-		pdata->mux_signal = omap4_mcbsp4_mux_rx_clk;
-
-	if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
+	if (oh->class->rev == MCBSP_CONFIG_TYPE2) {
+		/* The FIFO has 128 locations */
+		pdata->buffer_size = 0x80;
+	} else if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
 		if (id == 2)
 			/* The FIFO has 1024 + 256 locations */
 			pdata->buffer_size = 0x500;
@@ -225,7 +112,8 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
 
 static int __init omap2_mcbsp_init(void)
 {
-	omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
+	if (!of_have_populated_dt())
+		omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL);
 
 	return 0;
 }
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 9fe6829f4c1..701e17cba46 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -486,7 +486,7 @@ void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
 		default:
 			/* Nothing to be done */
 			break;
-		};
+		}
 
 		if (val >= 0) {
 			omap_mux_write(pad->partition, val,
diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c
index a004cb9acf5..e089e4d1ae3 100644
--- a/arch/arm/mach-omap2/omap-secure.c
+++ b/arch/arm/mach-omap2/omap-secure.c
@@ -61,8 +61,8 @@ int __init omap_secure_ram_reserve_memblock(void)
 {
 	u32 size = OMAP_SECURE_RAM_STORAGE;
 
-	size = ALIGN(size, SZ_1M);
-	omap_secure_memblock_base = arm_memblock_steal(size, SZ_1M);
+	size = ALIGN(size, SECTION_SIZE);
+	omap_secure_memblock_base = arm_memblock_steal(size, SECTION_SIZE);
 
 	return 0;
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 299ca2821ad..b969ab1d258 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1698,6 +1698,29 @@ static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
 }
 
 /**
+ * _are_any_hardreset_lines_asserted - return true if any part of @oh is
+ * hard-reset
+ * @oh: struct omap_hwmod *
+ *
+ * If any hardreset lines associated with @oh are asserted, then
+ * return true.  Otherwise, if no hardreset lines associated with @oh
+ * are asserted, or if @oh has no hardreset lines, then return false.
+ * This function is used to avoid executing some parts of the IP block
+ * enable/disable sequence if any hardreset line is set.
+ */
+static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
+{
+	int rst_cnt = 0;
+	int i;
+
+	for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
+		if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
+			rst_cnt++;
+
+	return (rst_cnt) ? true : false;
+}
+
+/**
  * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  * @oh: struct omap_hwmod *
  *
@@ -1715,7 +1738,7 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
 	 * Since integration code might still be doing something, only
 	 * disable if all lines are under hardreset.
 	 */
-	if (!_are_all_hardreset_lines_asserted(oh))
+	if (_are_any_hardreset_lines_asserted(oh))
 		return 0;
 
 	pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
@@ -1749,12 +1772,12 @@ static int _am33xx_disable_module(struct omap_hwmod *oh)
 
 	pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
 
+	if (_are_any_hardreset_lines_asserted(oh))
+		return 0;
+
 	am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
 				 oh->prcm.omap4.clkctrl_offs);
 
-	if (_are_all_hardreset_lines_asserted(oh))
-		return 0;
-
 	v = _am33xx_wait_target_disable(oh);
 	if (v)
 		pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
index 35dcdb66a4e..bd9220ed5ab 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -219,7 +219,7 @@ struct omap_hwmod omap2xxx_l4_wkup_hwmod = {
 
 /* MPU */
 static struct omap_hwmod_irq_info omap2xxx_mpu_irqs[] = {
-	{ .name = "pmu", .irq = 3 },
+	{ .name = "pmu", .irq = 3 + OMAP_INTC_START },
 	{ .irq = -1 }
 };
 
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 285777241d5..f67b7ee07dd 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -94,7 +94,7 @@ static struct omap_hwmod omap3xxx_l4_sec_hwmod = {
 
 /* MPU */
 static struct omap_hwmod_irq_info omap3xxx_mpu_irqs[] = {
-	{ .name = "pmu", .irq = 3 },
+	{ .name = "pmu", .irq = 3 + OMAP_INTC_START },
 	{ .irq = -1 }
 };
 
@@ -3683,6 +3683,7 @@ static struct omap_hwmod_ocp_if *am35xx_hwmod_ocp_ifs[] __initdata = {
 	&omap3xxx_l4_core__usb_tll_hs,
 	&omap3xxx_l4_core__es3plus_mmc1,
 	&omap3xxx_l4_core__es3plus_mmc2,
+	&omap3xxx_l4_core__hdq1w,
 	&am35xx_mdio__l3,
 	&am35xx_l4_core__mdio,
 	&am35xx_emac__l3,
@@ -3737,7 +3738,7 @@ int __init omap3xxx_hwmod_init(void)
 	} else {
 		WARN(1, "OMAP3 hwmod family init: unknown chip type\n");
 		return -EINVAL;
-	};
+	}
 
 	r = omap_hwmod_register_links(h);
 	if (r < 0)
@@ -3754,7 +3755,7 @@ int __init omap3xxx_hwmod_init(void)
 		   rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
 		   rev == OMAP3430_REV_ES3_1_2) {
 		h = omap3430es2plus_hwmod_ocp_ifs;
-	};
+	}
 
 	if (h) {
 		r = omap_hwmod_register_links(h);
@@ -3769,7 +3770,7 @@ int __init omap3xxx_hwmod_init(void)
 	} else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
 		   rev == OMAP3430_REV_ES3_1_2) {
 		h = omap3430_es3plus_hwmod_ocp_ifs;
-	};
+	}
 
 	if (h)
 		r = omap_hwmod_register_links(h);
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 8d7a93525bc..652d0285bd6 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -5269,6 +5269,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
 
 static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = {
 	{
+		.name		= "mpu",
 		.pa_start	= 0x40132000,
 		.pa_end		= 0x4013207f,
 		.flags		= ADDR_TYPE_RT
@@ -5287,6 +5288,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = {
 
 static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = {
 	{
+		.name		= "dma",
 		.pa_start	= 0x49032000,
 		.pa_end		= 0x4903207f,
 		.flags		= ADDR_TYPE_RT
diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c
index 45ad7f74f35..58e16aef40b 100644
--- a/arch/arm/mach-omap2/opp.c
+++ b/arch/arm/mach-omap2/opp.c
@@ -18,6 +18,7 @@
  */
 #include <linux/module.h>
 #include <linux/opp.h>
+#include <linux/cpu.h>
 
 #include <plat/omap_device.h>
 
@@ -62,13 +63,23 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def,
 				__func__, i);
 			return -EINVAL;
 		}
-		oh = omap_hwmod_lookup(opp_def->hwmod_name);
-		if (!oh || !oh->od) {
-			pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n",
-				 __func__, opp_def->hwmod_name, i);
-			continue;
+
+		if (!strncmp(opp_def->hwmod_name, "mpu", 3)) {
+			/* 
+			 * All current OMAPs share voltage rail and
+			 * clock source, so CPU0 is used to represent
+			 * the MPU-SS.
+			 */
+			dev = get_cpu_device(0);
+		} else {
+			oh = omap_hwmod_lookup(opp_def->hwmod_name);
+			if (!oh || !oh->od) {
+				pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n",
+					 __func__, opp_def->hwmod_name, i);
+				continue;
+			}
+			dev = &oh->od->pdev->dev;
 		}
-		dev = &oh->od->pdev->dev;
 
 		r = opp_add(dev, opp_def->freq, opp_def->u_volt);
 		if (r) {
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 3e1345fc071..46092cd806f 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -168,7 +168,7 @@ static int pm_dbg_open(struct inode *inode, struct file *file)
 	default:
 		return single_open(file, pm_dbg_show_timers,
 			&inode->i_private);
-	};
+	}
 }
 
 static const struct file_operations debug_fops = {
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index abefbc4d8e0..ea61c32957b 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -16,6 +16,7 @@
 #include <linux/opp.h>
 #include <linux/export.h>
 #include <linux/suspend.h>
+#include <linux/cpu.h>
 
 #include <asm/system_misc.h>
 
@@ -169,7 +170,15 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
 		goto exit;
 	}
 
-	dev = omap_device_get_by_hwmod_name(oh_name);
+	if (!strncmp(oh_name, "mpu", 3))
+		/* 
+		 * All current OMAPs share voltage rail and clock
+		 * source, so CPU0 is used to represent the MPU-SS.
+		 */
+		dev = get_cpu_device(0);
+	else
+		dev = omap_device_get_by_hwmod_name(oh_name);
+
 	if (IS_ERR(dev)) {
 		pr_err("%s: Unable to get dev pointer for hwmod %s\n",
 			__func__, oh_name);
@@ -177,7 +186,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
 	}
 
 	voltdm = voltdm_lookup(vdd_name);
-	if (IS_ERR(voltdm)) {
+	if (!voltdm) {
 		pr_err("%s: unable to get vdd pointer for vdd_%s\n",
 			__func__, vdd_name);
 		goto exit;
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index cbeae56b56a..f8217a5a4a2 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -122,7 +122,7 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
 	sr_data->senp_mod = 0x1;
 
 	sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
-	if (IS_ERR(sr_data->voltdm)) {
+	if (!sr_data->voltdm) {
 		pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
 			__func__, sr_dev_attr->sensor_voltdm_name);
 		goto exit;
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 8847d6eb231..44f9aa7ec0c 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -378,7 +378,7 @@ static void __init realtime_counter_init(void)
 		return;
 	}
 	sys_clk = clk_get(NULL, "sys_clkin_ck");
-	if (!sys_clk) {
+	if (IS_ERR(sys_clk)) {
 		pr_err("%s: failed to get system clock handle\n", __func__);
 		iounmap(base);
 		return;
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 45f77413c21..635e109f5ad 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -158,7 +158,7 @@ static struct regulator_init_data omap3_vpll2_idata = {
 };
 
 static struct regulator_consumer_supply omap3_vdd1_supply[] = {
-	REGULATOR_SUPPLY("vcc", "mpu.0"),
+	REGULATOR_SUPPLY("vcc", "cpu0"),
 };
 
 static struct regulator_consumer_supply omap3_vdd2_supply[] = {
@@ -239,6 +239,10 @@ void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
 static struct twl4030_usb_data omap4_usb_pdata = {
 };
 
+static struct regulator_consumer_supply omap4_vdda_hdmi_dac_supplies[] = {
+	REGULATOR_SUPPLY("vdda_hdmi_dac", "omapdss_hdmi"),
+};
+
 static struct regulator_init_data omap4_vdac_idata = {
 	.constraints = {
 		.min_uV			= 1800000,
@@ -248,6 +252,8 @@ static struct regulator_init_data omap4_vdac_idata = {
 		.valid_ops_mask		= REGULATOR_CHANGE_MODE
 					| REGULATOR_CHANGE_STATUS,
 	},
+	.num_consumer_supplies	= ARRAY_SIZE(omap4_vdda_hdmi_dac_supplies),
+	.consumer_supplies	= omap4_vdda_hdmi_dac_supplies,
 	.supply_regulator	= "V2V1",
 };
 
@@ -519,3 +525,30 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
 		pmic_data->v2v1 = &omap4_v2v1_idata;
 }
 #endif /* CONFIG_ARCH_OMAP4 */
+
+#if defined(CONFIG_SND_OMAP_SOC_OMAP_TWL4030) || \
+	defined(CONFIG_SND_OMAP_SOC_OMAP_TWL4030_MODULE)
+#include <linux/platform_data/omap-twl4030.h>
+
+static struct omap_tw4030_pdata omap_twl4030_audio_data;
+
+static struct platform_device audio_device = {
+	.name		= "omap-twl4030",
+	.id		= -1,
+	.dev = {
+		.platform_data = &omap_twl4030_audio_data,
+	},
+};
+
+void __init omap_twl4030_audio_init(char *card_name)
+{
+	omap_twl4030_audio_data.card_name = card_name;
+	platform_device_register(&audio_device);
+}
+
+#else /* SOC_OMAP_TWL4030 */
+void __init omap_twl4030_audio_init(char *card_name)
+{
+	return;
+}
+#endif /* SOC_OMAP_TWL4030 */
diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h
index 2256efe90cf..dcfbad5ac47 100644
--- a/arch/arm/mach-omap2/twl-common.h
+++ b/arch/arm/mach-omap2/twl-common.h
@@ -60,4 +60,6 @@ void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
 void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
 			   u32 pdata_flags, u32 regulators_flags);
 
+void omap_twl4030_audio_init(char *card_name);
+
 #endif /* __OMAP_PMIC_COMMON__ */
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig
index 41fc8532767..558ccfb8d45 100644
--- a/arch/arm/mach-prima2/Kconfig
+++ b/arch/arm/mach-prima2/Kconfig
@@ -6,8 +6,8 @@ config ARCH_PRIMA2
 	bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
 	default y
 	select CPU_V7
-	select ZONE_DMA
 	select SIRF_IRQ
+	select ZONE_DMA
 	help
           Support for CSR SiRFSoC ARM Cortex A9 Platform
 
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 8e6288de69b..11aa7399dc0 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -27,10 +27,10 @@ comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
 
 config MACH_PXA3XX_DT
 	bool "Support PXA3xx platforms from device tree"
-	select PXA3xx
 	select CPU_PXA300
-	select POWER_SUPPLY
 	select HAVE_PWM
+	select POWER_SUPPLY
+	select PXA3xx
 	select USE_OF
 	help
 	  Include support for Marvell PXA3xx based platforms using
@@ -44,13 +44,13 @@ config ARCH_LUBBOCK
 
 config MACH_MAINSTONE
 	bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)"
-	select PXA27x
 	select HAVE_PWM
+	select PXA27x
 
 config MACH_ZYLONITE
 	bool
-	select PXA3xx
 	select HAVE_PWM
+	select PXA3xx
 
 config MACH_ZYLONITE300
 	bool "PXA3xx Development Platform (aka Zylonite) PXA300/310"
@@ -65,19 +65,19 @@ config MACH_ZYLONITE320
 
 config MACH_LITTLETON
 	bool "PXA3xx Form Factor Platform (aka Littleton)"
-	select PXA3xx
 	select CPU_PXA300
 	select CPU_PXA310
+	select PXA3xx
 
 config MACH_TAVOREVB
 	bool "PXA930 Evaluation Board (aka TavorEVB)"
-	select PXA3xx
 	select CPU_PXA930
+	select PXA3xx
 
 config MACH_SAAR
 	bool "PXA930 Handheld Platform (aka SAAR)"
-	select PXA3xx
 	select CPU_PXA930
+	select PXA3xx
 
 comment "Third Party Dev Platforms (sorted by vendor name)"
 
@@ -87,29 +87,29 @@ config ARCH_PXA_IDP
 
 config ARCH_VIPER
 	bool "Arcom/Eurotech VIPER SBC"
-	select PXA25x
-	select ISA
-	select I2C_GPIO
+	select ARCOM_PCMCIA
 	select HAVE_PWM
+	select I2C_GPIO
+	select ISA
+	select PXA25x
 	select PXA_HAVE_ISA_IRQS
-	select ARCOM_PCMCIA
 
 config MACH_ARCOM_ZEUS
 	bool "Arcom/Eurotech ZEUS SBC"
-	select PXA27x
+	select ARCOM_PCMCIA
 	select ISA
+	select PXA27x
 	select PXA_HAVE_ISA_IRQS
-	select ARCOM_PCMCIA
 
 config MACH_BALLOON3
 	bool "Balloon 3 board"
-	select PXA27x
 	select IWMMXT
+	select PXA27x
 
 config MACH_CSB726
 	bool "Enable Cogent CSB726 System On a Module"
-	select PXA27x
 	select IWMMXT
+	select PXA27x
 	help
 	  Say Y here if you intend to run this kernel on a Cogent
 	  CSB726 System On Module.
@@ -121,11 +121,11 @@ config CSB726_CSB701
 config MACH_ARMCORE
 	bool "CompuLab CM-X255/CM-X270 modules"
 	select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI
-	select PXA27x
 	select IWMMXT
-	select PXA25x
 	select MIGHT_HAVE_PCI
 	select NEED_MACH_IO_H if PCI
+	select PXA25x
+	select PXA27x
 
 config MACH_EM_X270
 	bool "CompuLab EM-x270 platform"
@@ -137,10 +137,10 @@ config MACH_EXEDA
 
 config MACH_CM_X300
 	bool "CompuLab CM-X300 modules"
-	select PXA3xx
 	select CPU_PXA300
 	select CPU_PXA310
 	select HAVE_PWM
+	select PXA3xx
 
 config MACH_CAPC7117
 	bool "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM"
@@ -168,22 +168,22 @@ endchoice
 
 config MACH_INTELMOTE2
 	bool "Intel Mote 2 Platform"
-	select PXA27x
 	select IWMMXT
+	select PXA27x
 
 config MACH_STARGATE2
 	bool "Intel Stargate 2 Platform"
-	select PXA27x
 	select IWMMXT
+	select PXA27x
 
 config MACH_XCEP
 	bool "Iskratel Electronics XCEP"
-	select PXA25x
 	select MTD
-	select MTD_PHYSMAP
-	select MTD_CFI_INTELEXT
 	select MTD_CFI
+	select MTD_CFI_INTELEXT
 	select MTD_CHAR
+	select MTD_PHYSMAP
+	select PXA25x
 	select SMC91X
 	help
 	  PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
@@ -195,14 +195,14 @@ config TRIZEPS_PXA
 config MACH_TRIZEPS4
 	bool "Keith und Koep Trizeps4 DIMM-Module"
 	depends on TRIZEPS_PXA
-	select TRIZEPS_PCMCIA
 	select PXA27x
+	select TRIZEPS_PCMCIA
 
 config MACH_TRIZEPS4WL
 	bool "Keith und Koep Trizeps4-WL DIMM-Module"
 	depends on TRIZEPS_PXA
-	select TRIZEPS_PCMCIA
 	select PXA27x
+	select TRIZEPS_PCMCIA
 
 choice
 	prompt "Select base board for Trizeps module"
@@ -231,18 +231,18 @@ config TRIZEPS_PCMCIA
 
 config MACH_LOGICPD_PXA270
 	bool "LogicPD PXA270 Card Engine Development Platform"
-	select PXA27x
 	select HAVE_PWM
+	select PXA27x
 
 config MACH_PCM027
 	bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
-	select PXA27x
 	select IWMMXT
+	select PXA27x
 
 config MACH_PCM990_BASEBOARD
 	bool "PHYTEC PCM-990 development board"
-	select HAVE_PWM
 	depends on MACH_PCM027
+	select HAVE_PWM
 
 choice
 	prompt "display on pcm990"
@@ -266,19 +266,19 @@ config MACH_COLIBRI
 config MACH_COLIBRI_PXA270_INCOME
 	bool "Income s.r.o. PXA270 SBC"
 	depends on MACH_COLIBRI
-	select PXA27x
 	select HAVE_PWM
+	select PXA27x
 
 config MACH_COLIBRI300
 	bool "Toradex Colibri PXA300/310"
-	select PXA3xx
 	select CPU_PXA300
 	select CPU_PXA310
+	select PXA3xx
 
 config MACH_COLIBRI320
 	bool "Toradex Colibri PXA320"
-	select PXA3xx
 	select CPU_PXA320
+	select PXA3xx
 
 config MACH_COLIBRI_EVALBOARD
 	bool "Toradex Colibri Evaluation Carrier Board support"
@@ -286,8 +286,8 @@ config MACH_COLIBRI_EVALBOARD
 
 config MACH_VPAC270
 	bool "Voipac PXA270"
-	select PXA27x
 	select HAVE_PATA_PLATFORM
+	select PXA27x
 	help
 	  PXA270 based Single Board Computer.
 
@@ -295,9 +295,9 @@ comment "End-user Products (sorted by vendor name)"
 
 config MACH_H4700
 	bool "HP iPAQ hx4700"
-	select PXA27x
-	select IWMMXT
 	select HAVE_PWM
+	select IWMMXT
+	select PXA27x
 
 config MACH_H5000
 	bool "HP iPAQ h5000"
@@ -309,16 +309,16 @@ config MACH_HIMALAYA
 
 config MACH_MAGICIAN
 	bool "Enable HTC Magician Support"
-	select PXA27x
-	select IWMMXT
 	select HAVE_PWM
+	select IWMMXT
+	select PXA27x
 
 config MACH_MIOA701
 	bool "Mitac Mio A701 Support"
-	select PXA27x
-	select IWMMXT
-	select HAVE_PWM
 	select GPIO_SYSFS
+	select HAVE_PWM
+	select IWMMXT
+	select PXA27x
 	help
 	  Say Y here if you intend to run this kernel on a
 	  MIO A701. Currently there is only basic support
@@ -326,9 +326,9 @@ config MACH_MIOA701
 
 config PXA_EZX
 	bool "Motorola EZX Platform"
-	select PXA27x
-	select IWMMXT
 	select HAVE_PWM
+	select IWMMXT
+	select PXA27x
 
 config MACH_EZX_A780
 	bool "Motorola EZX A780"
@@ -393,9 +393,9 @@ config MACH_PALMT5
 	bool "Palm Tungsten|T5"
 	default y
 	depends on ARCH_PXA_PALM
-	select PXA27x
 	select IWMMXT
 	select MACH_PALM27X
+	select PXA27x
 	help
 	  Say Y here if you intend to run this kernel on a Palm Tungsten|T5
 	  handheld computer.
@@ -404,9 +404,9 @@ config MACH_PALMTX
 	bool "Palm T|X"
 	default y
 	depends on ARCH_PXA_PALM
-	select PXA27x
 	select IWMMXT
 	select MACH_PALM27X
+	select PXA27x
 	help
 	  Say Y here if you intend to run this kernel on a Palm T|X
 	  handheld computer.
@@ -415,9 +415,9 @@ config MACH_PALMZ72
 	bool "Palm Zire 72"
 	default y
 	depends on ARCH_PXA_PALM
-	select PXA27x
 	select IWMMXT
 	select MACH_PALM27X
+	select PXA27x
 	help
 	  Say Y here if you intend to run this kernel on Palm Zire 72
 	  handheld computer.
@@ -426,9 +426,9 @@ config MACH_PALMLD
 	bool "Palm LifeDrive"
 	default y
 	depends on ARCH_PXA_PALM
-	select PXA27x
 	select IWMMXT
 	select MACH_PALM27X
+	select PXA27x
 	help
 	  Say Y here if you intend to run this kernel on a Palm LifeDrive
 	  handheld computer.
@@ -441,10 +441,10 @@ config MACH_CENTRO
 	bool "Palm Centro 685 (GSM)"
 	default y
 	depends on ARCH_PXA_PALM
-	select MACH_PALM27X
-	select PXA27x
 	select IWMMXT
+	select MACH_PALM27X
 	select PALM_TREO
+	select PXA27x
 	help
 	  Say Y here if you intend to run this kernel on Palm Centro 685 (GSM)
 	  smartphone.
@@ -453,37 +453,37 @@ config MACH_TREO680
 	bool "Palm Treo 680"
 	default y
 	depends on ARCH_PXA_PALM
-	select MACH_PALM27X
-	select PXA27x
 	select IWMMXT
+	select MACH_PALM27X
 	select PALM_TREO
+	select PXA27x
 	help
 	  Say Y here if you intend to run this kernel on Palm Treo 680
 	  smartphone.
 
 config MACH_RAUMFELD_RC
 	bool "Raumfeld Controller"
-	select PXA3xx
 	select CPU_PXA300
-	select POWER_SUPPLY
 	select HAVE_PWM
+	select POWER_SUPPLY
+	select PXA3xx
 
 config MACH_RAUMFELD_CONNECTOR
 	bool "Raumfeld Connector"
+	select CPU_PXA300
 	select POWER_SUPPLY
 	select PXA3xx
-	select CPU_PXA300
 
 config MACH_RAUMFELD_SPEAKER
 	bool "Raumfeld Speaker"
+	select CPU_PXA300
 	select POWER_SUPPLY
 	select PXA3xx
-	select CPU_PXA300
 
 config PXA_SHARPSL
 	bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
-	select SHARP_SCOOP
 	select SHARP_PARAM
+	select SHARP_SCOOP
 	help
 	  Say Y here if you intend to run this kernel on a
 	  Sharp Zaurus SL-5600 (Poodle), SL-C700 (Corgi),
@@ -526,11 +526,11 @@ config MACH_HUSKY
 config MACH_AKITA
 	bool "Enable Sharp SL-1000 (Akita) Support"
 	depends on PXA_SHARPSL
-	select PXA27x
-	select PXA_SHARP_Cxx00
-	select MACH_SPITZ
 	select I2C
 	select I2C_PXA
+	select MACH_SPITZ
+	select PXA27x
+	select PXA_SHARP_Cxx00
 
 config MACH_SPITZ
 	bool "Enable Sharp Zaurus SL-3000 (Spitz) Support"
@@ -575,8 +575,8 @@ config MACH_ICONTROL
 
 config ARCH_PXA_ESERIES
 	bool "PXA based Toshiba e-series PDAs"
-	select PXA25x
 	select FB_W100
+	select PXA25x
 
 config MACH_E330
 	bool "Toshiba e330"
@@ -628,8 +628,8 @@ config MACH_E800
 
 config MACH_ZIPIT2
 	bool "Zipit Z2 Handheld"
-	select PXA27x
 	select HAVE_PWM
+	select PXA27x
 endif
 endmenu
 
@@ -720,9 +720,9 @@ config SHARPSL_PM
 config SHARPSL_PM_MAX1111
 	bool
 	select HWMON
+	select SENSORS_MAX1111
 	select SPI
 	select SPI_MASTER
-	select SENSORS_MAX1111
 
 config PXA_HAVE_ISA_IRQS
 	bool
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index fc3afc7cd36..a103c8ffea9 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -22,6 +22,7 @@
 #include <asm/mach/map.h>
 
 #include <mach/pxa25x.h>
+#undef GPIO24_SSP1_SFRM
 #include <mach/pxa27x.h>
 #include <mach/audio.h>
 #include <linux/platform_data/video-pxafb.h>
diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c
index 997e6da9a9c..32e0d799835 100644
--- a/arch/arm/mach-pxa/palmte2.c
+++ b/arch/arm/mach-pxa/palmte2.c
@@ -105,6 +105,7 @@ static struct pxamci_platform_data palmte2_mci_platform_data = {
 	.gpio_power		= GPIO_NR_PALMTE2_SD_POWER,
 };
 
+#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 /******************************************************************************
  * GPIO keys
  ******************************************************************************/
@@ -132,6 +133,7 @@ static struct platform_device palmte2_pxa_keys = {
 		.platform_data = &palmte2_pxa_keys_data,
 	},
 };
+#endif
 
 /******************************************************************************
  * Backlight
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 5a406f79479..ec55c575ed1 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -55,7 +55,6 @@
 #ifdef CONFIG_PM
 static int sharpsl_off_charge_battery(void);
 static int sharpsl_check_battery_voltage(void);
-static int sharpsl_fatal_check(void);
 #endif
 static int sharpsl_check_battery_temp(void);
 static int sharpsl_ac_check(void);
@@ -686,53 +685,6 @@ static int corgi_pxa_pm_enter(suspend_state_t state)
 	return 0;
 }
 
-/*
- * Check for fatal battery errors
- * Fatal returns -1
- */
-static int sharpsl_fatal_check(void)
-{
-	int buff[5], temp, i, acin;
-
-	dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check entered\n");
-
-	/* Check AC-Adapter */
-	acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
-
-	if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
-		sharpsl_pm.machinfo->charge(0);
-		udelay(100);
-		sharpsl_pm.machinfo->discharge(1);	/* enable discharge */
-		mdelay(SHARPSL_WAIT_DISCHARGE_ON);
-	}
-
-	if (sharpsl_pm.machinfo->discharge1)
-		sharpsl_pm.machinfo->discharge1(1);
-
-	/* Check battery : check inserting battery ? */
-	for (i = 0; i < 5; i++) {
-		buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
-		mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
-	}
-
-	if (sharpsl_pm.machinfo->discharge1)
-		sharpsl_pm.machinfo->discharge1(0);
-
-	if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
-		udelay(100);
-		sharpsl_pm.machinfo->charge(1);
-		sharpsl_pm.machinfo->discharge(0);
-	}
-
-	temp = get_select_val(buff);
-	dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %ld\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT));
-
-	if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) ||
-			(!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt)))
-		return -1;
-	return 0;
-}
-
 static int sharpsl_off_charge_error(void)
 {
 	dev_err(sharpsl_pm.dev, "Offline Charger: Error occurred.\n");
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index 392412ce4da..c773e4dded6 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -768,8 +768,7 @@ static unsigned long viper_tpm;
 
 static int __init viper_tpm_setup(char *str)
 {
-	strict_strtoul(str, 10, &viper_tpm);
-	return 1;
+	return strict_strtoul(str, 10, &viper_tpm) >= 0;
 }
 
 __setup("tpm=", viper_tpm_setup);
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index c593be428b8..14c1d47e1ab 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -21,8 +21,8 @@ config REALVIEW_EB_A9MP
 config REALVIEW_EB_ARM11MP
 	bool "Support ARM11MPCore Tile"
 	depends on MACH_REALVIEW_EB
-	select CPU_V6K
 	select ARCH_HAS_BARRIERS if SMP
+	select CPU_V6K
 	select HAVE_SMP
 	select MIGHT_HAVE_CACHE_L2X0
 	help
@@ -40,12 +40,12 @@ config REALVIEW_EB_ARM11MP_REVB
 
 config MACH_REALVIEW_PB11MP
 	bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
-	select CPU_V6K
+	select ARCH_HAS_BARRIERS if SMP
 	select ARM_GIC
+	select CPU_V6K
 	select HAVE_PATA_PLATFORM
 	select HAVE_SMP
 	select MIGHT_HAVE_CACHE_L2X0
-	select ARCH_HAS_BARRIERS if SMP
 	help
 	  Include support for the ARM(R) RealView(R) Platform Baseboard for
 	  the ARM11MPCore.  This platform has an on-board ARM11MPCore and has
@@ -54,8 +54,8 @@ config MACH_REALVIEW_PB11MP
 # ARMv6 CPU without K extensions, but does have the new exclusive ops
 config MACH_REALVIEW_PB1176
 	bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S"
-	select CPU_V6
 	select ARM_GIC
+	select CPU_V6
 	select HAVE_TCM
 	select MIGHT_HAVE_CACHE_L2X0
 	help
@@ -73,8 +73,8 @@ config REALVIEW_PB1176_SECURE_FLASH
 
 config MACH_REALVIEW_PBA8
 	bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform"
-	select CPU_V7
 	select ARM_GIC
+	select CPU_V7
 	select HAVE_PATA_PLATFORM
 	help
 	  Include support for the ARM(R) RealView Platform Baseboard for
@@ -83,11 +83,11 @@ config MACH_REALVIEW_PBA8
 
 config MACH_REALVIEW_PBX
 	bool "Support RealView(R) Platform Baseboard Explore"
+	select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
 	select ARM_GIC
 	select HAVE_PATA_PLATFORM
 	select HAVE_SMP
 	select MIGHT_HAVE_CACHE_L2X0
-	select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
 	select ZONE_DMA if SPARSEMEM
 	help
 	  Include support for the ARM(R) RealView(R) Platform Baseboard
diff --git a/arch/arm/mach-rpc/ecard.c b/arch/arm/mach-rpc/ecard.c
index b91bc87b3dc..fcb1d59f7ae 100644
--- a/arch/arm/mach-rpc/ecard.c
+++ b/arch/arm/mach-rpc/ecard.c
@@ -960,7 +960,9 @@ static int __init ecard_probe(int slot, unsigned irq, card_type_t type)
 	*ecp = ec;
 	slot_to_expcard[slot] = ec;
 
-	device_register(&ec->dev);
+	rc = device_register(&ec->dev);
+	if (rc)
+		goto nodev;
 
 	return 0;
 
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index c5256f4e90b..495f6928cba 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -7,7 +7,7 @@
 config S3C2412_CPUFREQ
 	bool
 	depends on CPU_FREQ_S3C24XX && CPU_S3C2412
-	select S3C2412_IOTIMING
 	default y
+	select S3C2412_IOTIMING
 	help
 	  CPU Frequency scaling support for S3C2412 and S3C2413 SoC CPUs.
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index ece7a10fe3c..a4d7fd27bec 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -5,8 +5,8 @@
 config S3C2440_CPUFREQ
 	bool "S3C2440/S3C2442 CPU Frequency scaling support"
 	depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
-	select S3C2410_CPUFREQ_UTILS
 	default y
+	select S3C2410_CPUFREQ_UTILS
 	help
 	  CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
 
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index d56b0f7f2b2..2b6cb5f29c2 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -17,10 +17,10 @@ config CPU_S3C2410
 	bool "SAMSUNG S3C2410"
 	default y
 	select CPU_ARM920T
-	select S3C2410_CLOCK
 	select CPU_LLSERIAL_S3C2410
-	select S3C2410_PM if PM
+	select S3C2410_CLOCK
 	select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
+	select S3C2410_PM if PM
 	help
 	  Support for S3C2410 and S3C2410A family from the S3C24XX line
 	  of Samsung Mobile CPUs.
@@ -30,8 +30,8 @@ config CPU_S3C2412
 	depends on ARCH_S3C24XX
 	select CPU_ARM926T
 	select CPU_LLSERIAL_S3C2440
-	select S3C2412_PM if PM
 	select S3C2412_DMA if S3C24XX_DMA
+	select S3C2412_PM if PM
 	help
 	  Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
@@ -40,10 +40,10 @@ config CPU_S3C2416
 	depends on ARCH_S3C24XX
 	select CPU_ARM926T
 	select CPU_LLSERIAL_S3C2440
-	select SAMSUNG_CLKSRC
+	select S3C2416_PM if PM
 	select S3C2443_COMMON
 	select S3C2443_DMA if S3C24XX_DMA
-	select S3C2416_PM if PM
+	select SAMSUNG_CLKSRC
 	help
 	  Support for the S3C2416 SoC from the S3C24XX line
 
@@ -75,9 +75,9 @@ config CPU_S3C2443
 	depends on ARCH_S3C24XX
 	select CPU_ARM920T
 	select CPU_LLSERIAL_S3C2440
-	select SAMSUNG_CLKSRC
 	select S3C2443_COMMON
 	select S3C2443_DMA if S3C24XX_DMA
+	select SAMSUNG_CLKSRC
 	help
 	  Support for the S3C2443 SoC from the S3C24XX line
 
@@ -156,16 +156,16 @@ config MACH_AML_M5900
 
 config ARCH_BAST
 	bool "Simtec Electronics BAST (EB2410ITX)"
+	select ISA
+	select MACH_BAST_IDE
 	select S3C2410_IOTIMING if S3C2410_CPUFREQ
-	select S3C24XX_SIMTEC_PM if PM
+	select S3C24XX_DCLK
 	select S3C24XX_SIMTEC_NOR
+	select S3C24XX_SIMTEC_PM if PM
 	select S3C24XX_SIMTEC_USB
-	select MACH_BAST_IDE
-	select S3C24XX_DCLK
-	select ISA
 	select S3C_DEV_HWMON
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the Simtec Electronics EB2410ITX
 	  development board (also known as BAST)
@@ -181,9 +181,9 @@ config BAST_PC104_IRQ
 config ARCH_H1940
 	bool "IPAQ H1940"
 	select PM_H1940 if PM
-	select S3C_DEV_USB_HOST
-	select S3C_DEV_NAND
 	select S3C24XX_SETUP_TS
+	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the HP IPAQ H1940
 
@@ -203,23 +203,23 @@ config PM_H1940
 config MACH_N30
 	bool "Acer N30 family"
 	select MACH_N35
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you want suppt for the Acer N30, Acer N35,
 	  Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs.
 
 config MACH_OTOM
 	bool "NexVision OTOM Board"
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the Nex Vision OTOM board
 
 config MACH_QT2410
 	bool "QT2410"
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the Armzone QT2410
 
@@ -239,12 +239,12 @@ config MACH_TCT_HAMMER
 
 config MACH_VR1000
 	bool "Thorcom VR1000"
-	select S3C24XX_SIMTEC_PM if PM
+	select MACH_BAST_IDE
 	select S3C24XX_DCLK
 	select S3C24XX_SIMTEC_NOR
-	select MACH_BAST_IDE
-	select S3C_DEV_USB_HOST
+	select S3C24XX_SIMTEC_PM if PM
 	select S3C24XX_SIMTEC_USB
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the Thorcom VR1000 board.
 
@@ -285,8 +285,8 @@ comment "S3C2412 Boards"
 
 config MACH_JIVE
 	bool "Logitech Jive"
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the Logitech Jive.
 
@@ -314,15 +314,15 @@ config MACH_SMDK2413
 	bool "SMDK2413"
 	select MACH_S3C2413
 	select S3C24XX_SMDK
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using an SMDK2413
 
 config MACH_VSTMS
 	bool "VMSTMS"
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using an VSTMS board
 
@@ -351,13 +351,13 @@ comment "S3C2416 Boards"
 
 config MACH_SMDK2416
 	bool "SMDK2416"
+	select S3C2416_SETUP_SDHCI
 	select S3C24XX_SMDK
 	select S3C_DEV_FB
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_NAND
 	select S3C_DEV_USB_HOST
-	select S3C2416_SETUP_SDHCI
 	help
 	  Say Y here if you are using an SMDK2416
 
@@ -379,11 +379,11 @@ comment "S3C2440 Boards"
 
 config MACH_ANUBIS
 	bool "Simtec Electronics ANUBIS"
-	select S3C24XX_DCLK
-	select S3C24XX_SIMTEC_PM if PM
 	select HAVE_PATA_PLATFORM
-	select S3C24XX_GPIO_EXTRA64
 	select S3C2440_XTAL_12000000
+	select S3C24XX_DCLK
+	select S3C24XX_GPIO_EXTRA64
+	select S3C24XX_SIMTEC_PM if PM
 	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the Simtec Electronics ANUBIS
@@ -391,18 +391,18 @@ config MACH_ANUBIS
 
 config MACH_AT2440EVB
 	bool "Avantech AT2440EVB development board"
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the AT2440EVB development board
 
 config MACH_MINI2440
 	bool "MINI2440 development board"
 	select EEPROM_AT24
-	select NEW_LEDS
 	select LEDS_CLASS
 	select LEDS_TRIGGER
 	select LEDS_TRIGGER_BACKLIGHT
+	select NEW_LEDS
 	select S3C_DEV_NAND
 	select S3C_DEV_USB_HOST
 	help
@@ -412,20 +412,20 @@ config MACH_MINI2440
 config MACH_NEXCODER_2440
 	bool "NexVision NEXCODER 2440 Light Board"
 	select S3C2440_XTAL_12000000
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the Nex Vision NEXCODER 2440 Light Board
 
 config MACH_OSIRIS
 	bool "Simtec IM2440D20 (OSIRIS) module"
+	select S3C2410_IOTIMING if S3C2440_CPUFREQ
+	select S3C2440_XTAL_12000000
 	select S3C24XX_DCLK
-	select S3C24XX_SIMTEC_PM if PM
 	select S3C24XX_GPIO_EXTRA128
-	select S3C2440_XTAL_12000000
-	select S3C2410_IOTIMING if S3C2440_CPUFREQ
-	select S3C_DEV_USB_HOST
+	select S3C24XX_SIMTEC_PM if PM
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the Simtec IM2440D20 module, also
 	  known as the Osiris.
@@ -445,8 +445,8 @@ config MACH_OSIRIS_DVS
 
 config MACH_RX3715
 	bool "HP iPAQ rx3715"
-	select S3C2440_XTAL_16934400
 	select PM_H1940 if PM
+	select S3C2440_XTAL_16934400
 	select S3C_DEV_NAND
 	help
 	  Say Y here if you are using the HP iPAQ rx3715.
@@ -455,8 +455,8 @@ config ARCH_S3C2440
 	bool "SMDK2440"
 	select S3C2440_XTAL_16934400
 	select S3C24XX_SMDK
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	help
 	  Say Y here if you are using the SMDK2440.
 
@@ -478,11 +478,11 @@ comment "S3C2442 Boards"
 
 config MACH_NEO1973_GTA02
 	bool "Openmoko GTA02 / Freerunner phone"
+	select I2C
+	select MACH_NEO1973
 	select MFD_PCF50633
 	select PCF50633_GPIO
-	select I2C
 	select POWER_SUPPLY
-	select MACH_NEO1973
 	select S3C24XX_PWM
 	select S3C_DEV_USB_HOST
 	help
@@ -490,13 +490,13 @@ config MACH_NEO1973_GTA02
 
 config MACH_RX1950
 	bool "HP iPAQ rx1950"
-	select S3C24XX_DCLK
-	select PM_H1940 if PM
 	select I2C
-	select S3C24XX_PWM
-	select S3C_DEV_NAND
+	select PM_H1940 if PM
 	select S3C2410_IOTIMING if S3C2440_CPUFREQ
 	select S3C2440_XTAL_16934400
+	select S3C24XX_DCLK
+	select S3C24XX_PWM
+	select S3C_DEV_NAND
 	help
 	   Say Y here if you're using HP iPAQ rx1950
 
diff --git a/arch/arm/mach-s3c24xx/irq-s3c2416.c b/arch/arm/mach-s3c24xx/irq-s3c2416.c
index 23ec97370f3..ff141b0af26 100644
--- a/arch/arm/mach-s3c24xx/irq-s3c2416.c
+++ b/arch/arm/mach-s3c24xx/irq-s3c2416.c
@@ -232,7 +232,7 @@ struct irq_chip s3c2416_irq_second = {
 
 /* IRQ initialisation code */
 
-static int __init s3c2416_add_sub(unsigned int base,
+static int s3c2416_add_sub(unsigned int base,
 				   void (*demux)(unsigned int,
 						 struct irq_desc *),
 				   struct irq_chip *chip,
@@ -251,7 +251,7 @@ static int __init s3c2416_add_sub(unsigned int base,
 	return 0;
 }
 
-static void __init s3c2416_irq_add_second(void)
+static void s3c2416_irq_add_second(void)
 {
 	unsigned long pend;
 	unsigned long last;
@@ -287,7 +287,7 @@ static void __init s3c2416_irq_add_second(void)
 	}
 }
 
-static int __init s3c2416_irq_add(struct device *dev,
+static int s3c2416_irq_add(struct device *dev,
 				  struct subsys_interface *sif)
 {
 	printk(KERN_INFO "S3C2416: IRQ Support\n");
diff --git a/arch/arm/mach-s3c24xx/irq-s3c2443.c b/arch/arm/mach-s3c24xx/irq-s3c2443.c
index ac2829f56d1..5e69109c092 100644
--- a/arch/arm/mach-s3c24xx/irq-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/irq-s3c2443.c
@@ -222,7 +222,7 @@ static struct irq_chip s3c2443_irq_cam = {
 
 /* IRQ initialisation code */
 
-static int __init s3c2443_add_sub(unsigned int base,
+static int s3c2443_add_sub(unsigned int base,
 				   void (*demux)(unsigned int,
 						 struct irq_desc *),
 				   struct irq_chip *chip,
@@ -241,7 +241,7 @@ static int __init s3c2443_add_sub(unsigned int base,
 	return 0;
 }
 
-static int __init s3c2443_irq_add(struct device *dev,
+static int s3c2443_irq_add(struct device *dev,
 				  struct subsys_interface *sif)
 {
 	printk("S3C2443: IRQ Support\n");
diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c24xx/mach-smdk2416.c
index db2787aa1e5..f30d7fccbfe 100644
--- a/arch/arm/mach-s3c24xx/mach-smdk2416.c
+++ b/arch/arm/mach-s3c24xx/mach-smdk2416.c
@@ -29,6 +29,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <video/samsung_fimd.h>
 #include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/mach-types.h>
@@ -52,7 +53,6 @@
 #include <linux/platform_data/usb-s3c2410_udc.h>
 #include <linux/platform_data/s3c-hsudc.h>
 
-#include <plat/regs-fb-v4.h>
 #include <plat/fb.h>
 
 #include <plat/common-smdk.h>
diff --git a/arch/arm/mach-s3c24xx/simtec-usb.c b/arch/arm/mach-s3c24xx/simtec-usb.c
index 17f8356177c..ddf7a3c743a 100644
--- a/arch/arm/mach-s3c24xx/simtec-usb.c
+++ b/arch/arm/mach-s3c24xx/simtec-usb.c
@@ -104,7 +104,7 @@ static struct s3c2410_hcd_info usb_simtec_info __initdata = {
 };
 
 
-int usb_simtec_init(void)
+int __init usb_simtec_init(void)
 {
 	int ret;
 
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 06ca1cd4cae..63e7ae3ee9e 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -7,9 +7,9 @@
 config PLAT_S3C64XX
 	bool
 	depends on ARCH_S3C64XX
-	select SAMSUNG_WAKEMASK
-	select PM_GENERIC_DOMAINS
 	default y
+	select PM_GENERIC_DOMAINS
+	select SAMSUNG_WAKEMASK
 	help
 	  Base platform code for any Samsung S3C64XX device
 
@@ -31,8 +31,8 @@ config S3C64XX_DMA
 	select S3C_DMA
 
 config S3C64XX_SETUP_SDHCI
-	select S3C64XX_SETUP_SDHCI_GPIO
 	bool
+	select S3C64XX_SETUP_SDHCI_GPIO
 	help
 	  Internal configuration for default SDHCI setup for S3C6400 and
 	  S3C6410 SoCs.
@@ -93,9 +93,9 @@ config S3C64XX_SETUP_USB_PHY
 config MACH_SMDK6400
        bool "SMDK6400"
 	select CPU_S3C6400
+	select S3C64XX_SETUP_SDHCI
 	select S3C_DEV_HSMMC
 	select S3C_DEV_NAND
-	select S3C64XX_SETUP_SDHCI
 	help
 	  Machine support for the Samsung SMDK6400
 
@@ -104,21 +104,21 @@ config MACH_SMDK6400
 config MACH_ANW6410
 	bool "A&W6410"
 	select CPU_S3C6410
-	select S3C_DEV_FB
 	select S3C64XX_SETUP_FB_24BPP
+	select S3C_DEV_FB
 	help
 	  Machine support for the A&W6410
 
 config MACH_MINI6410
 	bool "MINI6410"
 	select CPU_S3C6410
+	select S3C64XX_SETUP_FB_24BPP
+	select S3C64XX_SETUP_SDHCI
+	select S3C_DEV_FB
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
-	select S3C64XX_SETUP_SDHCI
-	select S3C_DEV_USB_HOST
 	select S3C_DEV_NAND
-	select S3C_DEV_FB
-	select S3C64XX_SETUP_FB_24BPP
+	select S3C_DEV_USB_HOST
 	select SAMSUNG_DEV_ADC
 	select SAMSUNG_DEV_TS
 	help
@@ -127,42 +127,42 @@ config MACH_MINI6410
 config MACH_REAL6410
 	bool "REAL6410"
 	select CPU_S3C6410
-	select S3C_DEV_HSMMC
-	select S3C_DEV_HSMMC1
+	select S3C64XX_SETUP_FB_24BPP
 	select S3C64XX_SETUP_SDHCI
 	select S3C_DEV_FB
-	select S3C64XX_SETUP_FB_24BPP
+	select S3C_DEV_HSMMC
+	select S3C_DEV_HSMMC1
 	select S3C_DEV_NAND
+	select S3C_DEV_USB_HOST
 	select SAMSUNG_DEV_ADC
 	select SAMSUNG_DEV_TS
-	select S3C_DEV_USB_HOST
 	help
 	  Machine support for the CoreWind REAL6410
 
 config MACH_SMDK6410
 	bool "SMDK6410"
 	select CPU_S3C6410
-	select SAMSUNG_DEV_ADC
+	select HAVE_S3C2410_WATCHDOG if WATCHDOG
+	select S3C64XX_SETUP_FB_24BPP
+	select S3C64XX_SETUP_I2C1
+	select S3C64XX_SETUP_IDE
+	select S3C64XX_SETUP_KEYPAD
+	select S3C64XX_SETUP_SDHCI
+	select S3C64XX_SETUP_USB_PHY
+	select S3C_DEV_FB
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_I2C1
-	select SAMSUNG_DEV_IDE
-	select S3C_DEV_FB
 	select S3C_DEV_RTC
-	select SAMSUNG_DEV_TS
 	select S3C_DEV_USB_HOST
 	select S3C_DEV_USB_HSOTG
 	select S3C_DEV_WDT
+	select SAMSUNG_DEV_ADC
 	select SAMSUNG_DEV_BACKLIGHT
+	select SAMSUNG_DEV_IDE
 	select SAMSUNG_DEV_KEYPAD
 	select SAMSUNG_DEV_PWM
-	select HAVE_S3C2410_WATCHDOG if WATCHDOG
-	select S3C64XX_SETUP_SDHCI
-	select S3C64XX_SETUP_I2C1
-	select S3C64XX_SETUP_IDE
-	select S3C64XX_SETUP_FB_24BPP
-	select S3C64XX_SETUP_KEYPAD
-	select S3C64XX_SETUP_USB_PHY
+	select SAMSUNG_DEV_TS
 	help
 	  Machine support for the Samsung SMDK6410
 
@@ -198,13 +198,13 @@ endchoice
 config SMDK6410_WM1190_EV1
 	bool "Support Wolfson Microelectronics 1190-EV1 PMIC card"
 	depends on MACH_SMDK6410
-	select REGULATOR
-	select REGULATOR_WM8350
-	select SAMSUNG_GPIO_EXTRA64
-	select MFD_WM8350_I2C
 	select MFD_WM8350_CONFIG_MODE_0
 	select MFD_WM8350_CONFIG_MODE_3
+	select MFD_WM8350_I2C
 	select MFD_WM8352_CONFIG_MODE_0
+	select REGULATOR
+	select REGULATOR_WM8350
+	select SAMSUNG_GPIO_EXTRA64
 	help
 	  The Wolfson Microelectronics 1190-EV1 is a WM835x based PMIC
 	  and audio daughtercard for the Samsung SMDK6410 reference
@@ -216,11 +216,11 @@ config SMDK6410_WM1190_EV1
 config SMDK6410_WM1192_EV1
 	bool "Support Wolfson Microelectronics 1192-EV1 PMIC card"
 	depends on MACH_SMDK6410
+	select MFD_WM831X
+	select MFD_WM831X_I2C
 	select REGULATOR
 	select REGULATOR_WM831X
 	select SAMSUNG_GPIO_EXTRA64
-	select MFD_WM831X
-	select MFD_WM831X_I2C
 	help
 	  The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
 	  daughtercard for the Samsung SMDK6410 reference platform.
@@ -232,19 +232,19 @@ config SMDK6410_WM1192_EV1
 config MACH_NCP
 	bool "NCP"
 	select CPU_S3C6410
-	select S3C_DEV_I2C1
-	select S3C_DEV_HSMMC1
 	select S3C64XX_SETUP_I2C1
+	select S3C_DEV_HSMMC1
+	select S3C_DEV_I2C1
 	help
           Machine support for the Samsung NCP
 
 config MACH_HMT
 	bool "Airgoo HMT"
 	select CPU_S3C6410
+	select S3C64XX_SETUP_FB_24BPP
 	select S3C_DEV_FB
 	select S3C_DEV_NAND
 	select S3C_DEV_USB_HOST
-	select S3C64XX_SETUP_FB_24BPP
 	select SAMSUNG_DEV_PWM
 	help
 	  Machine support for the Airgoo HMT
@@ -252,17 +252,17 @@ config MACH_HMT
 config MACH_SMARTQ
 	bool
 	select CPU_S3C6410
+	select S3C64XX_SETUP_FB_24BPP
+	select S3C64XX_SETUP_SDHCI
+	select S3C64XX_SETUP_USB_PHY
+	select S3C_DEV_FB
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_HSMMC2
-	select S3C_DEV_FB
 	select S3C_DEV_HWMON
 	select S3C_DEV_RTC
-	select S3C_DEV_USB_HSOTG
 	select S3C_DEV_USB_HOST
-	select S3C64XX_SETUP_SDHCI
-	select S3C64XX_SETUP_FB_24BPP
-	select S3C64XX_SETUP_USB_PHY
+	select S3C_DEV_USB_HSOTG
 	select SAMSUNG_DEV_ADC
 	select SAMSUNG_DEV_PWM
 	select SAMSUNG_DEV_TS
@@ -284,26 +284,26 @@ config MACH_SMARTQ7
 config MACH_WLF_CRAGG_6410
 	bool "Wolfson Cragganmore 6410"
 	select CPU_S3C6410
-	select S3C64XX_SETUP_SDHCI
+	select I2C
+	select LEDS_GPIO_REGISTER
+	select S3C64XX_DEV_SPI0
+	select S3C64XX_SETUP_FB_24BPP
 	select S3C64XX_SETUP_I2C1
 	select S3C64XX_SETUP_IDE
-	select S3C64XX_SETUP_FB_24BPP
 	select S3C64XX_SETUP_KEYPAD
+	select S3C64XX_SETUP_SDHCI
 	select S3C64XX_SETUP_SPI
 	select S3C64XX_SETUP_USB_PHY
-	select SAMSUNG_DEV_ADC
-	select SAMSUNG_DEV_KEYPAD
-	select S3C_DEV_USB_HOST
-	select S3C_DEV_USB_HSOTG
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_HSMMC2
 	select S3C_DEV_I2C1
-	select S3C_DEV_WDT
 	select S3C_DEV_RTC
-	select S3C64XX_DEV_SPI0
+	select S3C_DEV_USB_HOST
+	select S3C_DEV_USB_HSOTG
+	select S3C_DEV_WDT
+	select SAMSUNG_DEV_ADC
+	select SAMSUNG_DEV_KEYPAD
 	select SAMSUNG_GPIO_EXTRA128
-	select I2C
-	select LEDS_GPIO_REGISTER
 	help
 	  Machine support for the Wolfson Cragganmore S3C6410 variant.
diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c
index 15c58dfc458..99e82ac81b6 100644
--- a/arch/arm/mach-s3c64xx/mach-anw6410.c
+++ b/arch/arm/mach-s3c64xx/mach-anw6410.c
@@ -29,6 +29,7 @@
 #include <linux/dm9000.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
@@ -44,7 +45,6 @@
 #include <plat/regs-serial.h>
 #include <linux/platform_data/i2c-s3c2410.h>
 #include <plat/fb.h>
-#include <plat/regs-fb-v4.h>
 
 #include <plat/clock.h>
 #include <plat/devs.h>
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 8b4d4670664..13b7eaa45fd 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -46,6 +46,7 @@
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
 
+#include <video/samsung_fimd.h>
 #include <mach/hardware.h>
 #include <mach/map.h>
 
@@ -57,7 +58,6 @@
 #include <mach/regs-gpio-memport.h>
 
 #include <plat/regs-serial.h>
-#include <plat/regs-fb-v4.h>
 #include <plat/fb.h>
 #include <plat/sdhci.h>
 #include <plat/gpio-cfg.h>
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 02222b32b7d..2b144893ddc 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -26,6 +26,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <video/samsung_fimd.h>
 #include <mach/hardware.h>
 #include <mach/map.h>
 
@@ -41,7 +42,6 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
-#include <plat/regs-fb-v4.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 09311cc4011..07c349cca33 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -41,9 +41,9 @@
 #include <linux/platform_data/mtd-nand-s3c2410.h>
 #include <plat/regs-serial.h>
 #include <linux/platform_data/touchscreen-s3c2410.h>
-#include <plat/regs-fb-v4.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c
index 46ee88d1681..e5f9a79b535 100644
--- a/arch/arm/mach-s3c64xx/mach-ncp.c
+++ b/arch/arm/mach-s3c64xx/mach-ncp.c
@@ -24,6 +24,7 @@
 #include <linux/delay.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
@@ -43,7 +44,6 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
-#include <plat/regs-fb-v4.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 6daca203e72..7476f7c722a 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -42,9 +42,9 @@
 #include <linux/platform_data/mtd-nand-s3c2410.h>
 #include <plat/regs-serial.h>
 #include <linux/platform_data/touchscreen-s3c2410.h>
-#include <plat/regs-fb-v4.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c
index d6266d8b43c..96d6da2b6b5 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq5.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq5.c
@@ -21,6 +21,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+#include <video/samsung_fimd.h>
 #include <mach/map.h>
 #include <mach/regs-gpio.h>
 
@@ -28,7 +29,6 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
-#include <plat/regs-fb-v4.h>
 
 #include "common.h"
 #include "mach-smartq.h"
diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c
index 0957d2a980e..7d1167bdc92 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq7.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq7.c
@@ -21,6 +21,7 @@
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+#include <video/samsung_fimd.h>
 #include <mach/map.h>
 #include <mach/regs-gpio.h>
 
@@ -28,7 +29,6 @@
 #include <plat/devs.h>
 #include <plat/fb.h>
 #include <plat/gpio-cfg.h>
-#include <plat/regs-fb-v4.h>
 
 #include "common.h"
 #include "mach-smartq.h"
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index 2547a884647..da1a771a29e 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -43,6 +43,7 @@
 #endif
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
@@ -72,7 +73,6 @@
 #include <linux/platform_data/touchscreen-s3c2410.h>
 #include <plat/keypad.h>
 #include <plat/backlight.h>
-#include <plat/regs-fb-v4.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index c87f6108eeb..e8742cb7ddd 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -9,18 +9,18 @@ if ARCH_S5P64X0
 
 config CPU_S5P6440
 	bool
-	select SAMSUNG_DMADEV
 	select S5P_HRT
 	select S5P_SLEEP if PM
+	select SAMSUNG_DMADEV
 	select SAMSUNG_WAKEMASK if PM
 	help
 	  Enable S5P6440 CPU support
 
 config CPU_S5P6450
 	bool
-	select SAMSUNG_DMADEV
 	select S5P_HRT
 	select S5P_SLEEP if PM
+	select SAMSUNG_DMADEV
 	select SAMSUNG_WAKEMASK if PM
 	help
 	  Enable S5P6450 CPU support
@@ -52,19 +52,19 @@ config MACH_SMDK6440
 	bool "SMDK6440"
 	select CPU_S5P6440
 	select S3C_DEV_FB
-	select S3C_DEV_I2C1
-	select S3C_DEV_RTC
-	select S3C_DEV_WDT
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_HSMMC2
+	select S3C_DEV_I2C1
+	select S3C_DEV_RTC
+	select S3C_DEV_WDT
+	select S5P64X0_SETUP_FB_24BPP
+	select S5P64X0_SETUP_I2C1
+	select S5P64X0_SETUP_SDHCI_GPIO
 	select SAMSUNG_DEV_ADC
 	select SAMSUNG_DEV_BACKLIGHT
 	select SAMSUNG_DEV_PWM
 	select SAMSUNG_DEV_TS
-	select S5P64X0_SETUP_FB_24BPP
-	select S5P64X0_SETUP_I2C1
-	select S5P64X0_SETUP_SDHCI_GPIO
 	help
 	  Machine support for the Samsung SMDK6440
 
@@ -72,19 +72,19 @@ config MACH_SMDK6450
 	bool "SMDK6450"
 	select CPU_S5P6450
 	select S3C_DEV_FB
-	select S3C_DEV_I2C1
-	select S3C_DEV_RTC
-	select S3C_DEV_WDT
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_HSMMC2
+	select S3C_DEV_I2C1
+	select S3C_DEV_RTC
+	select S3C_DEV_WDT
+	select S5P64X0_SETUP_FB_24BPP
+	select S5P64X0_SETUP_I2C1
+	select S5P64X0_SETUP_SDHCI_GPIO
 	select SAMSUNG_DEV_ADC
 	select SAMSUNG_DEV_BACKLIGHT
 	select SAMSUNG_DEV_PWM
 	select SAMSUNG_DEV_TS
-	select S5P64X0_SETUP_FB_24BPP
-	select S5P64X0_SETUP_I2C1
-	select S5P64X0_SETUP_SDHCI_GPIO
 	help
 	  Machine support for the Samsung SMDK6450
 
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index dea78a84824..96ea1fe0ec9 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -27,6 +27,7 @@
 #include <linux/mmc/host.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
@@ -52,7 +53,6 @@
 #include <plat/s5p-time.h>
 #include <plat/backlight.h>
 #include <plat/fb.h>
-#include <plat/regs-fb.h>
 #include <plat/sdhci.h>
 
 #include "common.h"
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 6f14fc729b8..12748b6eaa7 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -27,6 +27,7 @@
 #include <linux/mmc/host.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include <asm/hardware/vic.h>
 #include <asm/mach/arch.h>
@@ -52,7 +53,6 @@
 #include <plat/s5p-time.h>
 #include <plat/backlight.h>
 #include <plat/fb.h>
-#include <plat/regs-fb.h>
 #include <plat/sdhci.h>
 
 #include "common.h"
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 75a26eaf263..15170be97a7 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -60,12 +60,6 @@ config MACH_SMDKC100
 	select S3C_DEV_I2C1
 	select S3C_DEV_RTC
 	select S3C_DEV_WDT
-	select SAMSUNG_DEV_ADC
-	select SAMSUNG_DEV_BACKLIGHT
-	select SAMSUNG_DEV_IDE
-	select SAMSUNG_DEV_KEYPAD
-	select SAMSUNG_DEV_PWM
-	select SAMSUNG_DEV_TS
 	select S5PC100_SETUP_FB_24BPP
 	select S5PC100_SETUP_I2C1
 	select S5PC100_SETUP_IDE
@@ -74,6 +68,12 @@ config MACH_SMDKC100
 	select S5P_DEV_FIMC0
 	select S5P_DEV_FIMC1
 	select S5P_DEV_FIMC2
+	select SAMSUNG_DEV_ADC
+	select SAMSUNG_DEV_BACKLIGHT
+	select SAMSUNG_DEV_IDE
+	select SAMSUNG_DEV_KEYPAD
+	select SAMSUNG_DEV_PWM
+	select SAMSUNG_DEV_TS
 	help
 	  Machine support for the Samsung SMDKC100
 
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 5d2c0934928..dba7384a87b 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -33,6 +33,7 @@
 #include <mach/regs-gpio.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include <asm/irq.h>
 #include <asm/mach-types.h>
@@ -51,7 +52,6 @@
 #include <linux/platform_data/touchscreen-s3c2410.h>
 #include <linux/platform_data/asoc-s3c.h>
 #include <plat/backlight.h>
-#include <plat/regs-fb-v4.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 77185c38188..92ad72f0ef9 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -11,11 +11,11 @@ if ARCH_S5PV210
 
 config CPU_S5PV210
 	bool
-	select SAMSUNG_DMADEV
 	select S5P_EXT_INT
 	select S5P_HRT
 	select S5P_PM if PM
 	select S5P_SLEEP if PM
+	select SAMSUNG_DMADEV
 	help
 	  Enable S5PV210 CPU support
 
@@ -76,44 +76,44 @@ config MACH_AQUILA
 	bool "Aquila"
 	select CPU_S5PV210
 	select S3C_DEV_FB
-	select S5P_DEV_FIMC0
-	select S5P_DEV_FIMC1
-	select S5P_DEV_FIMC2
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_HSMMC2
-	select S5P_DEV_ONENAND
 	select S5PV210_SETUP_FB_24BPP
 	select S5PV210_SETUP_SDHCI
 	select S5PV210_SETUP_USB_PHY
+	select S5P_DEV_FIMC0
+	select S5P_DEV_FIMC1
+	select S5P_DEV_FIMC2
+	select S5P_DEV_ONENAND
 	help
 	  Machine support for the Samsung Aquila target based on S5PC110 SoC
 
 config MACH_GONI
 	bool "GONI"
 	select CPU_S5PV210
-	select S5P_GPIO_INT
 	select S3C_DEV_FB
-	select S5P_DEV_FIMC0
-	select S5P_DEV_FIMC1
-	select S5P_DEV_FIMC2
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_HSMMC2
 	select S3C_DEV_I2C1
 	select S3C_DEV_I2C2
-	select S5P_DEV_MFC
 	select S3C_DEV_USB_HSOTG
-	select S5P_DEV_ONENAND
-	select SAMSUNG_DEV_KEYPAD
-	select S5P_DEV_TV
 	select S5PV210_SETUP_FB_24BPP
+	select S5PV210_SETUP_FIMC
 	select S5PV210_SETUP_I2C1
 	select S5PV210_SETUP_I2C2
 	select S5PV210_SETUP_KEYPAD
 	select S5PV210_SETUP_SDHCI
-	select S5PV210_SETUP_FIMC
 	select S5PV210_SETUP_USB_PHY
+	select S5P_DEV_FIMC0
+	select S5P_DEV_FIMC1
+	select S5P_DEV_FIMC2
+	select S5P_DEV_MFC
+	select S5P_DEV_ONENAND
+	select S5P_DEV_TV
+	select S5P_GPIO_INT
+	select SAMSUNG_DEV_KEYPAD
 	help
 	  Machine support for Samsung GONI board
 	  S5PC110(MCP) is one of package option of S5PV210
@@ -125,14 +125,14 @@ config MACH_SMDKC110
 	select S3C_DEV_I2C2
 	select S3C_DEV_RTC
 	select S3C_DEV_WDT
+	select S5PV210_SETUP_I2C1
+	select S5PV210_SETUP_I2C2
+	select S5PV210_SETUP_IDE
 	select S5P_DEV_FIMC0
 	select S5P_DEV_FIMC1
 	select S5P_DEV_FIMC2
 	select S5P_DEV_MFC
 	select SAMSUNG_DEV_IDE
-	select S5PV210_SETUP_I2C1
-	select S5PV210_SETUP_I2C2
-	select S5PV210_SETUP_IDE
 	help
 	  Machine support for Samsung SMDKC110
 	  S5PC110(MCP) is one of package option of S5PV210
@@ -154,6 +154,13 @@ config MACH_SMDKV210
 	select S3C_DEV_RTC
 	select S3C_DEV_USB_HSOTG
 	select S3C_DEV_WDT
+	select S5PV210_SETUP_FB_24BPP
+	select S5PV210_SETUP_I2C1
+	select S5PV210_SETUP_I2C2
+	select S5PV210_SETUP_IDE
+	select S5PV210_SETUP_KEYPAD
+	select S5PV210_SETUP_SDHCI
+	select S5PV210_SETUP_USB_PHY
 	select S5P_DEV_FIMC0
 	select S5P_DEV_FIMC1
 	select S5P_DEV_FIMC2
@@ -165,20 +172,13 @@ config MACH_SMDKV210
 	select SAMSUNG_DEV_KEYPAD
 	select SAMSUNG_DEV_PWM
 	select SAMSUNG_DEV_TS
-	select S5PV210_SETUP_FB_24BPP
-	select S5PV210_SETUP_I2C1
-	select S5PV210_SETUP_I2C2
-	select S5PV210_SETUP_IDE
-	select S5PV210_SETUP_KEYPAD
-	select S5PV210_SETUP_SDHCI
-	select S5PV210_SETUP_USB_PHY
 	help
 	  Machine support for Samsung SMDKV210
 
 config MACH_TORBRECK
 	bool "Torbreck"
-	select CPU_S5PV210
 	select ARCH_SPARSEMEM_ENABLE
+	select CPU_S5PV210
 	select S3C_DEV_HSMMC
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_HSMMC2
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 78028df86c5..ee9fa5c2ef2 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -28,6 +28,7 @@
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 
+#include <video/samsung_fimd.h>
 #include <mach/map.h>
 #include <mach/regs-clock.h>
 
@@ -39,7 +40,6 @@
 #include <plat/fimc-core.h>
 #include <plat/sdhci.h>
 #include <plat/s5p-time.h>
-#include <plat/regs-fb-v4.h>
 
 #include "common.h"
 
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 00f1e47d490..55e1dba4ffd 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -35,6 +35,7 @@
 #include <asm/setup.h>
 #include <asm/mach-types.h>
 
+#include <video/samsung_fimd.h>
 #include <mach/map.h>
 #include <mach/regs-clock.h>
 
@@ -49,7 +50,6 @@
 #include <plat/clock.h>
 #include <plat/s5p-time.h>
 #include <plat/mfc.h>
-#include <plat/regs-fb-v4.h>
 #include <plat/camport.h>
 
 #include <media/v4l2-mediabus.h>
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 7d6fab42050..4cdb5bb7bbc 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -28,6 +28,7 @@
 #include <asm/mach-types.h>
 
 #include <video/platform_lcd.h>
+#include <video/samsung_fimd.h>
 
 #include <mach/map.h>
 #include <mach/regs-clock.h>
@@ -46,7 +47,6 @@
 #include <plat/fb.h>
 #include <plat/s5p-time.h>
 #include <plat/backlight.h>
-#include <plat/regs-fb-v4.h>
 #include <plat/mfc.h>
 #include <plat/clock.h>
 
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig
index 42625e4d949..ca14dbdcfb2 100644
--- a/arch/arm/mach-sa1100/Kconfig
+++ b/arch/arm/mach-sa1100/Kconfig
@@ -49,15 +49,15 @@ config SA1100_COLLIE
 	bool "Sharp Zaurus SL5500"
 	# FIXME: select CPU_FREQ_SA11x0
 	select SHARP_LOCOMO
-	select SHARP_SCOOP
 	select SHARP_PARAM
+	select SHARP_SCOOP
 	help
 	  Say Y here to support the Sharp Zaurus SL5500 PDAs.
 
 config SA1100_H3100
 	bool "Compaq iPAQ H3100"
-	select HTC_EGPIO
 	select CPU_FREQ_SA1110
+	select HTC_EGPIO
 	help
 	  Say Y here if you intend to run this kernel on the Compaq iPAQ
 	  H3100 handheld computer.  Information about this machine and the
@@ -67,8 +67,8 @@ config SA1100_H3100
 
 config SA1100_H3600
 	bool "Compaq iPAQ H3600/H3700"
-	select HTC_EGPIO
 	select CPU_FREQ_SA1110
+	select HTC_EGPIO
 	help
 	  Say Y here if you intend to run this kernel on the Compaq iPAQ
 	  H3600 handheld computer.  Information about this machine and the
@@ -78,16 +78,16 @@ config SA1100_H3600
 
 config SA1100_BADGE4
 	bool "HP Labs BadgePAD 4"
-	select SA1111
 	select CPU_FREQ_SA1100
+	select SA1111
 	help
 	  Say Y here if you want to build a kernel for the HP Laboratories
 	  BadgePAD 4.
 
 config SA1100_JORNADA720
 	bool "HP Jornada 720"
-	select SA1111
 	# FIXME: select CPU_FREQ_SA11x0
+	select SA1111
 	help
 	  Say Y here if you want to build a kernel for the HP Jornada 720
 	  handheld computer.  See 
@@ -95,8 +95,8 @@ config SA1100_JORNADA720
 
 config SA1100_JORNADA720_SSP
 	bool "HP Jornada 720 Extended SSP driver"
-	select SA1100_SSP
 	depends on SA1100_JORNADA720
+	select SA1100_SSP
 	help
 	  Say Y here if you have a HP Jornada 7xx handheld computer and you
 	  want to access devices connected to the MCU. Those include the
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index e1ccda6128e..6a7ad3c2a3f 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -388,7 +388,7 @@ static void __init map_sa1100_gpio_regs( void )
  */
 static void __init get_assabet_scr(void)
 {
-	unsigned long scr, i;
+	unsigned long uninitialized_var(scr), i;
 
 	GPDR |= 0x3fc;			/* Configure GPIO 9:2 as outputs */
 	GPSR = 0x3fc;			/* Write 0xFF to GPIO 9:2 */
diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c
index b8b4ab323a3..6d91a914c1d 100644
--- a/arch/arm/mach-shark/pci.c
+++ b/arch/arm/mach-shark/pci.c
@@ -41,7 +41,7 @@ static struct hw_pci shark_pci __initdata = {
 static int __init shark_pci_init(void)
 {
 	if (!machine_is_shark())
-		return;
+		return -ENODEV;
 
 	pcibios_min_io = 0x6000;
 	pcibios_min_mem = 0x50000000;
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 4cacc2d22fb..8ae100cc655 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -4,49 +4,49 @@ comment "SH-Mobile System Type"
 
 config ARCH_SH7367
 	bool "SH-Mobile G3 (SH7367)"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select CPU_V6
 	select SH_CLK_CPG
-	select ARCH_WANT_OPTIONAL_GPIOLIB
 
 config ARCH_SH7377
 	bool "SH-Mobile G4 (SH7377)"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select CPU_V7
 	select SH_CLK_CPG
-	select ARCH_WANT_OPTIONAL_GPIOLIB
 
 config ARCH_SH7372
 	bool "SH-Mobile AP4 (SH7372)"
-	select CPU_V7
-	select SH_CLK_CPG
 	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select ARM_CPU_SUSPEND if PM || CPU_IDLE
+	select CPU_V7
+	select SH_CLK_CPG
 
 config ARCH_SH73A0
 	bool "SH-Mobile AG5 (R8A73A00)"
-	select CPU_V7
-	select SH_CLK_CPG
 	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select ARM_GIC
+	select CPU_V7
 	select I2C
+	select SH_CLK_CPG
 
 config ARCH_R8A7740
 	bool "R-Mobile A1 (R8A77400)"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select CPU_V7
 	select SH_CLK_CPG
-	select ARCH_WANT_OPTIONAL_GPIOLIB
 
 config ARCH_R8A7779
 	bool "R-Car H1 (R8A77790)"
+	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_GIC
 	select CPU_V7
 	select SH_CLK_CPG
-	select ARM_GIC
-	select ARCH_WANT_OPTIONAL_GPIOLIB
 
 config ARCH_EMEV2
 	bool "Emma Mobile EV2"
-	select CPU_V7
-	select ARM_GIC
 	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select ARM_GIC
+	select CPU_V7
 
 comment "SH-Mobile Board Type"
 
@@ -65,9 +65,9 @@ config MACH_AP4EVB
 	bool "AP4EVB board"
 	depends on ARCH_SH7372
 	select ARCH_REQUIRE_GPIOLIB
+	select REGULATOR_FIXED_VOLTAGE if REGULATOR
 	select SH_LCD_MIPI_DSI
 	select SND_SOC_AK4642 if SND_SIMPLE_CARD
-	select REGULATOR_FIXED_VOLTAGE if REGULATOR
 
 choice
 	prompt "AP4EVB LCD panel selection"
@@ -84,37 +84,37 @@ endchoice
 
 config MACH_AG5EVM
 	bool "AG5EVM board"
+	depends on ARCH_SH73A0
 	select ARCH_REQUIRE_GPIOLIB
-	select SH_LCD_MIPI_DSI
 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
-	depends on ARCH_SH73A0
+	select SH_LCD_MIPI_DSI
 
 config MACH_MACKEREL
 	bool "mackerel board"
 	depends on ARCH_SH7372
 	select ARCH_REQUIRE_GPIOLIB
-	select SND_SOC_AK4642 if SND_SIMPLE_CARD
 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
+	select SND_SOC_AK4642 if SND_SIMPLE_CARD
 
 config MACH_KOTA2
 	bool "KOTA2 board"
+	depends on ARCH_SH73A0
 	select ARCH_REQUIRE_GPIOLIB
 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
-	depends on ARCH_SH73A0
 
 config MACH_BONITO
 	bool "bonito board"
+	depends on ARCH_R8A7740
 	select ARCH_REQUIRE_GPIOLIB
 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
-	depends on ARCH_R8A7740
 
 config MACH_ARMADILLO800EVA
 	bool "Armadillo-800 EVA board"
 	depends on ARCH_R8A7740
 	select ARCH_REQUIRE_GPIOLIB
-	select USE_OF
 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
 	select SND_SOC_WM8978 if SND_SIMPLE_CARD
+	select USE_OF
 
 config MACH_MARZEN
 	bool "MARZEN board"
@@ -125,16 +125,16 @@ config MACH_MARZEN
 config MACH_KZM9D
 	bool "KZM9D board"
 	depends on ARCH_EMEV2
-	select USE_OF
 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
+	select USE_OF
 
 config MACH_KZM9G
 	bool "KZM-A9-GT board"
 	depends on ARCH_SH73A0
 	select ARCH_REQUIRE_GPIOLIB
-	select USE_OF
-	select SND_SOC_AK4642 if SND_SIMPLE_CARD
 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
+	select SND_SOC_AK4642 if SND_SIMPLE_CARD
+	select USE_OF
 
 comment "SH-Mobile System Configuration"
 
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index ed77ab8c914..d47e215aca8 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -100,7 +100,7 @@ static inline int shmobile_cpu_is_dead(unsigned int cpu) { return 1; }
 
 extern void shmobile_smp_init_cpus(unsigned int ncores);
 
-static inline void shmobile_init_late(void)
+static inline void __init shmobile_init_late(void)
 {
 	shmobile_suspend_init();
 	shmobile_cpuidle_init();
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index e10648801b2..5633d698f1e 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -78,6 +78,9 @@ struct dw_dma_platform_data dmac_plat_data = {
 	.nr_channels = 8,
 	.chan_allocation_order = CHAN_ALLOCATION_DESCENDING,
 	.chan_priority = CHAN_PRIORITY_DESCENDING,
+	.block_size = 4095U,
+	.nr_masters = 2,
+	.data_width = { 3, 3, 0, 0 },
 };
 
 void __init spear13xx_l2x0_init(void)
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 5f3c03b61f8..9ff6f6ea361 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -4,42 +4,42 @@ comment "NVIDIA Tegra options"
 
 config ARCH_TEGRA_2x_SOC
 	bool "Enable support for Tegra20 family"
-	select CPU_V7
-	select ARM_GIC
 	select ARCH_REQUIRE_GPIOLIB
-	select PINCTRL
-	select PINCTRL_TEGRA20
-	select USB_ARCH_HAS_EHCI if USB_SUPPORT
-	select USB_ULPI if USB
-	select USB_ULPI_VIEWPORT if USB_SUPPORT
 	select ARM_ERRATA_720789
 	select ARM_ERRATA_742230
 	select ARM_ERRATA_751472
 	select ARM_ERRATA_754327
-	select ARM_ERRATA_764369
+	select ARM_ERRATA_764369 if SMP
+	select ARM_GIC
+	select CPU_FREQ_TABLE if CPU_FREQ
+	select CPU_V7
+	select PINCTRL
+	select PINCTRL_TEGRA20
 	select PL310_ERRATA_727915 if CACHE_L2X0
 	select PL310_ERRATA_769419 if CACHE_L2X0
-	select CPU_FREQ_TABLE if CPU_FREQ
+	select USB_ARCH_HAS_EHCI if USB_SUPPORT
+	select USB_ULPI if USB
+	select USB_ULPI_VIEWPORT if USB_SUPPORT
 	help
 	  Support for NVIDIA Tegra AP20 and T20 processors, based on the
 	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
 
 config ARCH_TEGRA_3x_SOC
 	bool "Enable support for Tegra30 family"
-	select CPU_V7
-	select ARM_GIC
 	select ARCH_REQUIRE_GPIOLIB
+	select ARM_ERRATA_743622
+	select ARM_ERRATA_751472
+	select ARM_ERRATA_754322
+	select ARM_ERRATA_764369 if SMP
+	select ARM_GIC
+	select CPU_FREQ_TABLE if CPU_FREQ
+	select CPU_V7
 	select PINCTRL
 	select PINCTRL_TEGRA30
+	select PL310_ERRATA_769419 if CACHE_L2X0
 	select USB_ARCH_HAS_EHCI if USB_SUPPORT
 	select USB_ULPI if USB
 	select USB_ULPI_VIEWPORT if USB_SUPPORT
-	select ARM_ERRATA_743622
-	select ARM_ERRATA_751472
-	select ARM_ERRATA_754322
-	select ARM_ERRATA_764369
-	select PL310_ERRATA_769419 if CACHE_L2X0
-	select CPU_FREQ_TABLE if CPU_FREQ
 	help
 	  Support for NVIDIA Tegra T30 processor family, based on the
 	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -57,8 +57,6 @@ config TEGRA_AHB
 	  which controls AHB bus master arbitration and some
 	  perfomance parameters(priority, prefech size).
 
-comment "Tegra board type"
-
 choice
         prompt "Default low-level debug console UART"
         default TEGRA_DEBUG_UART_NONE
diff --git a/arch/arm/mach-tegra/include/mach/smmu.h b/arch/arm/mach-tegra/include/mach/smmu.h
deleted file mode 100644
index dad403a9cf0..00000000000
--- a/arch/arm/mach-tegra/include/mach/smmu.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * IOMMU API for SMMU in Tegra30
- *
- * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-#ifndef	MACH_SMMU_H
-#define	MACH_SMMU_H
-
-enum smmu_hwgrp {
-	HWGRP_AFI,
-	HWGRP_AVPC,
-	HWGRP_DC,
-	HWGRP_DCB,
-	HWGRP_EPP,
-	HWGRP_G2,
-	HWGRP_HC,
-	HWGRP_HDA,
-	HWGRP_ISP,
-	HWGRP_MPE,
-	HWGRP_NV,
-	HWGRP_NV2,
-	HWGRP_PPCS,
-	HWGRP_SATA,
-	HWGRP_VDE,
-	HWGRP_VI,
-
-	HWGRP_COUNT,
-
-	HWGRP_END = ~0,
-};
-
-#define HWG_AFI		(1 << HWGRP_AFI)
-#define HWG_AVPC	(1 << HWGRP_AVPC)
-#define HWG_DC		(1 << HWGRP_DC)
-#define HWG_DCB		(1 << HWGRP_DCB)
-#define HWG_EPP		(1 << HWGRP_EPP)
-#define HWG_G2		(1 << HWGRP_G2)
-#define HWG_HC		(1 << HWGRP_HC)
-#define HWG_HDA		(1 << HWGRP_HDA)
-#define HWG_ISP		(1 << HWGRP_ISP)
-#define HWG_MPE		(1 << HWGRP_MPE)
-#define HWG_NV		(1 << HWGRP_NV)
-#define HWG_NV2		(1 << HWGRP_NV2)
-#define HWG_PPCS	(1 << HWGRP_PPCS)
-#define HWG_SATA	(1 << HWGRP_SATA)
-#define HWG_VDE		(1 << HWGRP_VDE)
-#define HWG_VI		(1 << HWGRP_VI)
-
-#endif	/* MACH_SMMU_H */
diff --git a/arch/arm/mach-tegra/include/mach/tegra_wm8903_pdata.h b/arch/arm/mach-tegra/include/mach/tegra_wm8903_pdata.h
deleted file mode 100644
index 9d293344a7f..00000000000
--- a/arch/arm/mach-tegra/include/mach/tegra_wm8903_pdata.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/arm/mach-tegra/include/mach/tegra_wm8903_pdata.h
- *
- * Copyright 2011 NVIDIA, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-
-struct tegra_wm8903_platform_data {
-	int gpio_spkr_en;
-	int gpio_hp_det;
-	int gpio_hp_mute;
-	int gpio_int_mic_en;
-	int gpio_ext_mic_en;
-};
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig
index f7e12ede008..1f597647d43 100644
--- a/arch/arm/mach-u300/Kconfig
+++ b/arch/arm/mach-u300/Kconfig
@@ -7,8 +7,8 @@ comment "ST-Ericsson Mobile Platform Products"
 config MACH_U300
 	bool "U300"
 	select PINCTRL
-	select PINCTRL_U300
 	select PINCTRL_COH901
+	select PINCTRL_U300
 
 comment "ST-Ericsson U300/U335 Feature Selections"
 
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index c77c86c4736..e8c3f0d70ca 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -3,33 +3,33 @@ if ARCH_U8500
 config UX500_SOC_COMMON
 	bool
 	default y
-	select ARM_GIC
-	select HAS_MTU
-	select PL310_ERRATA_753970
 	select ARM_ERRATA_754322
-	select ARM_ERRATA_764369
+	select ARM_ERRATA_764369 if SMP
+	select ARM_GIC
 	select CACHE_L2X0
+	select COMMON_CLK
+	select HAS_MTU
 	select PINCTRL
 	select PINCTRL_NOMADIK
-	select COMMON_CLK
+	select PL310_ERRATA_753970 if CACHE_PL310
 
 config UX500_SOC_DB8500
 	bool
+	select CPU_FREQ_TABLE if CPU_FREQ
 	select MFD_DB8500_PRCMU
+	select PINCTRL_DB8500
 	select REGULATOR
 	select REGULATOR_DB8500_PRCMU
-	select CPU_FREQ_TABLE if CPU_FREQ
-	select PINCTRL_DB8500
 
 menu "Ux500 target platform (boards)"
 
 config MACH_MOP500
 	bool "U8500 Development platform, MOP500 versions"
-	select UX500_SOC_DB8500
 	select I2C
 	select I2C_NOMADIK
-	select SOC_BUS
 	select REGULATOR_FIXED_VOLTAGE
+	select SOC_BUS
+	select UX500_SOC_DB8500
 	help
 	  Include support for the MOP500 development platform.
 
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index c1f38f6625b..63d8e9f81b9 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -3,9 +3,9 @@ menu "Versatile platform type"
 
 config ARCH_VERSATILE_PB
 	bool "Support Versatile Platform Baseboard for ARM926EJ-S"
+	default y
 	select CPU_ARM926T
 	select MIGHT_HAVE_PCI
-	default y
 	help
 	  Include support for the ARM(R) Versatile Platform Baseboard
 	  for the ARM926EJ-S.
@@ -19,8 +19,8 @@ config MACH_VERSATILE_AB
 
 config MACH_VERSATILE_DT
 	bool "Support Versatile platform from device tree"
-	select USE_OF
 	select CPU_ARM926T
+	select USE_OF
 	help
 	  Include support for the ARM(R) Versatile/PB platform,
 	  using the device tree for discovery
diff --git a/arch/arm/mach-vt8500/include/mach/uncompress.h b/arch/arm/mach-vt8500/include/mach/uncompress.h
index bb9e2d23fee..e6e81fdaf10 100644
--- a/arch/arm/mach-vt8500/include/mach/uncompress.h
+++ b/arch/arm/mach-vt8500/include/mach/uncompress.h
@@ -15,15 +15,15 @@
  *
  */
 
-#define UART0_PHYS 0xd8200000
-#include <asm/io.h>
+#define UART0_PHYS	0xd8200000
+#define UART0_ADDR(x)	*(volatile unsigned char *)(UART0_PHYS + x)
 
 static void putc(const char c)
 {
-	while (readb(UART0_PHYS + 0x1c) & 0x2)
+	while (UART0_ADDR(0x1c) & 0x2)
 		/* Tx busy, wait and poll */;
 
-	writeb(c, UART0_PHYS);
+	UART0_ADDR(0) = c;
 }
 
 static void flush(void)
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index 587ea950d08..8d3871f110a 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -77,8 +77,11 @@ static void vt8500_power_off(void)
 
 void __init vt8500_init(void)
 {
-	struct device_node *np, *fb;
+	struct device_node *np;
+#if defined(CONFIG_FB_VT8500) || defined(CONFIG_FB_WM8505)
+	struct device_node *fb;
 	void __iomem *gpio_base;
+#endif
 
 #ifdef CONFIG_FB_VT8500
 	fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 101b9681c08..94186b6c685 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -10,8 +10,8 @@ config CPU_ARM7TDMI
 	depends on !MMU
 	select CPU_32v4T
 	select CPU_ABRT_LV4T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4
+	select CPU_PABRT_LEGACY
 	help
 	  A 32-bit RISC microprocessor based on the ARM7 processor core
 	  which has no memory control unit and cache.
@@ -24,11 +24,11 @@ config CPU_ARM720T
 	bool "Support ARM720T processor" if ARCH_INTEGRATOR
 	select CPU_32v4T
 	select CPU_ABRT_LV4T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WT if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WT if MMU
 	help
 	  A 32-bit RISC processor with 8kByte Cache, Write Buffer and
@@ -43,9 +43,9 @@ config CPU_ARM740T
 	depends on !MMU
 	select CPU_32v4T
 	select CPU_ABRT_LV4T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V3	# although the core is v4t
 	select CPU_CP15_MPU
+	select CPU_PABRT_LEGACY
 	help
 	  A 32-bit RISC processor with 8KB cache or 4KB variants,
 	  write buffer and MPU(Protection Unit) built around
@@ -60,8 +60,8 @@ config CPU_ARM9TDMI
 	depends on !MMU
 	select CPU_32v4T
 	select CPU_ABRT_NOMMU
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4
+	select CPU_PABRT_LEGACY
 	help
 	  A 32-bit RISC microprocessor based on the ARM9 processor core
 	  which has no memory control unit and cache.
@@ -74,11 +74,11 @@ config CPU_ARM920T
 	bool "Support ARM920T processor" if ARCH_INTEGRATOR
 	select CPU_32v4T
 	select CPU_ABRT_EV4T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4WT
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WB if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
 	help
 	  The ARM920T is licensed to be produced by numerous vendors,
@@ -92,11 +92,11 @@ config CPU_ARM922T
 	bool "Support ARM922T processor" if ARCH_INTEGRATOR
 	select CPU_32v4T
 	select CPU_ABRT_EV4T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4WT
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WB if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
 	help
 	  The ARM922T is a version of the ARM920T, but with smaller
@@ -111,11 +111,11 @@ config CPU_ARM925T
  	bool "Support ARM925T processor" if ARCH_OMAP1
 	select CPU_32v4T
 	select CPU_ABRT_EV4T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4WT
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WB if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
  	help
  	  The ARM925T is a mix between the ARM920T and ARM926T, but with
@@ -130,10 +130,10 @@ config CPU_ARM926T
 	bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
 	select CPU_32v5
 	select CPU_ABRT_EV5TJ
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WB if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
 	help
 	  This is a variant of the ARM920.  It has slightly different
@@ -148,11 +148,11 @@ config CPU_FA526
 	bool
 	select CPU_32v4
 	select CPU_ABRT_EV4
-	select CPU_PABRT_LEGACY
-	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_CACHE_FA
+	select CPU_CACHE_VIVT
 	select CPU_COPY_FA if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_FA if MMU
 	help
 	  The FA526 is a version of the ARMv4 compatible processor with
@@ -167,9 +167,9 @@ config CPU_ARM940T
 	depends on !MMU
 	select CPU_32v4T
 	select CPU_ABRT_NOMMU
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_VIVT
 	select CPU_CP15_MPU
+	select CPU_PABRT_LEGACY
 	help
 	  ARM940T is a member of the ARM9TDMI family of general-
 	  purpose microprocessors with MPU and separate 4KB
@@ -185,9 +185,9 @@ config CPU_ARM946E
 	depends on !MMU
 	select CPU_32v5
 	select CPU_ABRT_NOMMU
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_VIVT
 	select CPU_CP15_MPU
+	select CPU_PABRT_LEGACY
 	help
 	  ARM946E-S is a member of the ARM9E-S family of high-
 	  performance, 32-bit system-on-chip processor solutions.
@@ -201,11 +201,11 @@ config CPU_ARM1020
 	bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR
 	select CPU_32v5
 	select CPU_ABRT_EV4T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4WT
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WB if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
 	help
 	  The ARM1020 is the 32K cached version of the ARM10 processor,
@@ -217,25 +217,25 @@ config CPU_ARM1020
 # ARM1020E - needs validating
 config CPU_ARM1020E
 	bool "Support ARM1020E processor" if ARCH_INTEGRATOR
+	depends on n
 	select CPU_32v5
 	select CPU_ABRT_EV4T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4WT
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WB if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
-	depends on n
 
 # ARM1022E
 config CPU_ARM1022
 	bool "Support ARM1022E processor" if ARCH_INTEGRATOR
 	select CPU_32v5
 	select CPU_ABRT_EV4T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WB if MMU # can probably do better
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
 	help
 	  The ARM1022E is an implementation of the ARMv5TE architecture
@@ -250,10 +250,10 @@ config CPU_ARM1026
 	bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR
 	select CPU_32v5
 	select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WB if MMU # can probably do better
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
 	help
 	  The ARM1026EJ-S is an implementation of the ARMv5TEJ architecture
@@ -268,11 +268,11 @@ config CPU_SA110
 	select CPU_32v3 if ARCH_RPC
 	select CPU_32v4 if !ARCH_RPC
 	select CPU_ABRT_EV4
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4WB
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_V4WB if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WB if MMU
 	help
 	  The Intel StrongARM(R) SA-110 is a 32-bit microprocessor and
@@ -288,10 +288,10 @@ config CPU_SA1100
 	bool
 	select CPU_32v4
 	select CPU_ABRT_EV4
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_V4WB
 	select CPU_CACHE_VIVT
 	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WB if MMU
 
 # XScale
@@ -299,9 +299,9 @@ config CPU_XSCALE
 	bool
 	select CPU_32v5
 	select CPU_ABRT_EV5T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_VIVT
 	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
 
 # XScale Core Version 3
@@ -309,9 +309,9 @@ config CPU_XSC3
 	bool
 	select CPU_32v5
 	select CPU_ABRT_EV5T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_VIVT
 	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
 	select IO_36
 
@@ -320,21 +320,21 @@ config CPU_MOHAWK
 	bool
 	select CPU_32v5
 	select CPU_ABRT_EV5T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_VIVT
+	select CPU_COPY_V4WB if MMU
 	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_V4WBI if MMU
-	select CPU_COPY_V4WB if MMU
 
 # Feroceon
 config CPU_FEROCEON
 	bool
 	select CPU_32v5
 	select CPU_ABRT_EV5T
-	select CPU_PABRT_LEGACY
 	select CPU_CACHE_VIVT
-	select CPU_CP15_MMU
 	select CPU_COPY_FEROCEON if MMU
+	select CPU_CP15_MMU
+	select CPU_PABRT_LEGACY
 	select CPU_TLB_FEROCEON if MMU
 
 config CPU_FEROCEON_OLD_ID
@@ -349,20 +349,20 @@ config CPU_FEROCEON_OLD_ID
 # Marvell PJ4
 config CPU_PJ4
 	bool
-	select CPU_V7
 	select ARM_THUMBEE
+	select CPU_V7
 
 # ARMv6
 config CPU_V6
 	bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
 	select CPU_32v6
 	select CPU_ABRT_EV6
-	select CPU_PABRT_V6
 	select CPU_CACHE_V6
 	select CPU_CACHE_VIPT
+	select CPU_COPY_V6 if MMU
 	select CPU_CP15_MMU
 	select CPU_HAS_ASID if MMU
-	select CPU_COPY_V6 if MMU
+	select CPU_PABRT_V6
 	select CPU_TLB_V6 if MMU
 
 # ARMv6k
@@ -371,12 +371,12 @@ config CPU_V6K
 	select CPU_32v6
 	select CPU_32v6K
 	select CPU_ABRT_EV6
-	select CPU_PABRT_V6
 	select CPU_CACHE_V6
 	select CPU_CACHE_VIPT
+	select CPU_COPY_V6 if MMU
 	select CPU_CP15_MMU
 	select CPU_HAS_ASID if MMU
-	select CPU_COPY_V6 if MMU
+	select CPU_PABRT_V6
 	select CPU_TLB_V6 if MMU
 
 # ARMv7
@@ -385,44 +385,44 @@ config CPU_V7
 	select CPU_32v6K
 	select CPU_32v7
 	select CPU_ABRT_EV7
-	select CPU_PABRT_V7
 	select CPU_CACHE_V7
 	select CPU_CACHE_VIPT
+	select CPU_COPY_V6 if MMU
 	select CPU_CP15_MMU
 	select CPU_HAS_ASID if MMU
-	select CPU_COPY_V6 if MMU
+	select CPU_PABRT_V7
 	select CPU_TLB_V7 if MMU
 
 # Figure out what processor architecture version we should be using.
 # This defines the compiler instruction set which depends on the machine type.
 config CPU_32v3
 	bool
-	select TLS_REG_EMUL if SMP || !MMU
-	select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
 	select CPU_USE_DOMAINS if MMU
+	select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
+	select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v4
 	bool
-	select TLS_REG_EMUL if SMP || !MMU
-	select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
 	select CPU_USE_DOMAINS if MMU
+	select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
+	select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v4T
 	bool
-	select TLS_REG_EMUL if SMP || !MMU
-	select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
 	select CPU_USE_DOMAINS if MMU
+	select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
+	select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v5
 	bool
-	select TLS_REG_EMUL if SMP || !MMU
-	select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
 	select CPU_USE_DOMAINS if MMU
+	select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
+	select TLS_REG_EMUL if SMP || !MMU
 
 config CPU_32v6
 	bool
-	select TLS_REG_EMUL if !CPU_32v6K && !MMU
 	select CPU_USE_DOMAINS if CPU_V6 && MMU
+	select TLS_REG_EMUL if !CPU_32v6K && !MMU
 
 config CPU_32v6K
 	bool
@@ -624,11 +624,28 @@ config ARM_THUMBEE
 	  Say Y here if you have a CPU with the ThumbEE extension and code to
 	  make use of it. Say N for code that can run on CPUs without ThumbEE.
 
+config ARM_VIRT_EXT
+	bool "Native support for the ARM Virtualization Extensions"
+	depends on MMU && CPU_V7
+	help
+	  Enable the kernel to make use of the ARM Virtualization
+	  Extensions to install hypervisors without run-time firmware
+	  assistance.
+
+	  A compliant bootloader is required in order to make maximum
+	  use of this feature.  Refer to Documentation/arm/Booting for
+	  details.
+
+	  It is safe to enable this option even if the kernel may not be
+	  booted in HYP mode, may not have support for the
+	  virtualization extensions, or may be booted with a
+	  non-compliant bootloader.
+
 config SWP_EMULATE
 	bool "Emulate SWP/SWPB instructions"
 	depends on !CPU_USE_DOMAINS && CPU_V7
-	select HAVE_PROC_CPU if PROC_FS
 	default y if SMP
+	select HAVE_PROC_CPU if PROC_FS
 	help
 	  ARMv6 architecture deprecates use of the SWP/SWPB instructions.
 	  ARMv7 multiprocessing extensions introduce the ability to disable
diff --git a/arch/arm/mm/cache-fa.S b/arch/arm/mm/cache-fa.S
index 07201637109..e505befe51b 100644
--- a/arch/arm/mm/cache-fa.S
+++ b/arch/arm/mm/cache-fa.S
@@ -240,6 +240,9 @@ ENTRY(fa_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(fa_dma_unmap_area)
 
+	.globl	fa_flush_kern_cache_louis
+	.equ	fa_flush_kern_cache_louis, fa_flush_kern_cache_all
+
 	__INITDATA
 
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
index 52e35f32eef..8a3fadece8d 100644
--- a/arch/arm/mm/cache-v3.S
+++ b/arch/arm/mm/cache-v3.S
@@ -128,6 +128,9 @@ ENTRY(v3_dma_map_area)
 ENDPROC(v3_dma_unmap_area)
 ENDPROC(v3_dma_map_area)
 
+	.globl	v3_flush_kern_cache_louis
+	.equ	v3_flush_kern_cache_louis, v3_flush_kern_cache_all
+
 	__INITDATA
 
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index 022135d2b7e..43e5d77be67 100644
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -140,6 +140,9 @@ ENTRY(v4_dma_map_area)
 ENDPROC(v4_dma_unmap_area)
 ENDPROC(v4_dma_map_area)
 
+	.globl	v4_flush_kern_cache_louis
+	.equ	v4_flush_kern_cache_louis, v4_flush_kern_cache_all
+
 	__INITDATA
 
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S
index 8f1eeae340c..cd494532140 100644
--- a/arch/arm/mm/cache-v4wb.S
+++ b/arch/arm/mm/cache-v4wb.S
@@ -251,6 +251,9 @@ ENTRY(v4wb_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(v4wb_dma_unmap_area)
 
+	.globl	v4wb_flush_kern_cache_louis
+	.equ	v4wb_flush_kern_cache_louis, v4wb_flush_kern_cache_all
+
 	__INITDATA
 
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S
index b34a5f908a8..11e5e5838bc 100644
--- a/arch/arm/mm/cache-v4wt.S
+++ b/arch/arm/mm/cache-v4wt.S
@@ -196,6 +196,9 @@ ENTRY(v4wt_dma_map_area)
 ENDPROC(v4wt_dma_unmap_area)
 ENDPROC(v4wt_dma_map_area)
 
+	.globl	v4wt_flush_kern_cache_louis
+	.equ	v4wt_flush_kern_cache_louis, v4wt_flush_kern_cache_all
+
 	__INITDATA
 
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 4b10760c56d..d8fd4d4bd3d 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -326,6 +326,9 @@ ENTRY(v6_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(v6_dma_unmap_area)
 
+	.globl	v6_flush_kern_cache_louis
+	.equ	v6_flush_kern_cache_louis, v6_flush_kern_cache_all
+
 	__INITDATA
 
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 3b172275262..cd956647c21 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -33,6 +33,24 @@ ENTRY(v7_flush_icache_all)
 	mov	pc, lr
 ENDPROC(v7_flush_icache_all)
 
+ /*
+ *     v7_flush_dcache_louis()
+ *
+ *     Flush the D-cache up to the Level of Unification Inner Shareable
+ *
+ *     Corrupted registers: r0-r7, r9-r11 (r6 only in Thumb mode)
+ */
+
+ENTRY(v7_flush_dcache_louis)
+	dmb					@ ensure ordering with previous memory accesses
+	mrc	p15, 1, r0, c0, c0, 1		@ read clidr, r0 = clidr
+	ands	r3, r0, #0xe00000		@ extract LoUIS from clidr
+	mov	r3, r3, lsr #20			@ r3 = LoUIS * 2
+	moveq	pc, lr				@ return if level == 0
+	mov	r10, #0				@ r10 (starting level) = 0
+	b	flush_levels			@ start flushing cache levels
+ENDPROC(v7_flush_dcache_louis)
+
 /*
  *	v7_flush_dcache_all()
  *
@@ -49,7 +67,7 @@ ENTRY(v7_flush_dcache_all)
 	mov	r3, r3, lsr #23			@ left align loc bit field
 	beq	finished			@ if loc is 0, then no need to clean
 	mov	r10, #0				@ start clean at cache level 0
-loop1:
+flush_levels:
 	add	r2, r10, r10, lsr #1		@ work out 3x current cache level
 	mov	r1, r0, lsr r2			@ extract cache type bits from clidr
 	and	r1, r1, #7			@ mask of the bits for current cache only
@@ -71,9 +89,9 @@ loop1:
 	clz	r5, r4				@ find bit position of way size increment
 	ldr	r7, =0x7fff
 	ands	r7, r7, r1, lsr #13		@ extract max number of the index size
-loop2:
+loop1:
 	mov	r9, r4				@ create working copy of max way size
-loop3:
+loop2:
  ARM(	orr	r11, r10, r9, lsl r5	)	@ factor way and cache number into r11
  THUMB(	lsl	r6, r9, r5		)
  THUMB(	orr	r11, r10, r6		)	@ factor way and cache number into r11
@@ -82,13 +100,13 @@ loop3:
  THUMB(	orr	r11, r11, r6		)	@ factor index number into r11
 	mcr	p15, 0, r11, c7, c14, 2		@ clean & invalidate by set/way
 	subs	r9, r9, #1			@ decrement the way
-	bge	loop3
-	subs	r7, r7, #1			@ decrement the index
 	bge	loop2
+	subs	r7, r7, #1			@ decrement the index
+	bge	loop1
 skip:
 	add	r10, r10, #2			@ increment cache number
 	cmp	r3, r10
-	bgt	loop1
+	bgt	flush_levels
 finished:
 	mov	r10, #0				@ swith back to cache level 0
 	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr
@@ -120,6 +138,24 @@ ENTRY(v7_flush_kern_cache_all)
 	mov	pc, lr
 ENDPROC(v7_flush_kern_cache_all)
 
+ /*
+ *     v7_flush_kern_cache_louis(void)
+ *
+ *     Flush the data cache up to Level of Unification Inner Shareable.
+ *     Invalidate the I-cache to the point of unification.
+ */
+ENTRY(v7_flush_kern_cache_louis)
+ ARM(	stmfd	sp!, {r4-r5, r7, r9-r11, lr}	)
+ THUMB(	stmfd	sp!, {r4-r7, r9-r11, lr}	)
+	bl	v7_flush_dcache_louis
+	mov	r0, #0
+	ALT_SMP(mcr	p15, 0, r0, c7, c1, 0)	@ invalidate I-cache inner shareable
+	ALT_UP(mcr	p15, 0, r0, c7, c5, 0)	@ I+BTB cache invalidate
+ ARM(	ldmfd	sp!, {r4-r5, r7, r9-r11, lr}	)
+ THUMB(	ldmfd	sp!, {r4-r7, r9-r11, lr}	)
+	mov	pc, lr
+ENDPROC(v7_flush_kern_cache_louis)
+
 /*
  *	v7_flush_cache_all()
  *
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index 7599e2625c7..2a5907b5c8d 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -134,7 +134,6 @@ make_coherent(struct address_space *mapping, struct vm_area_struct *vma,
 {
 	struct mm_struct *mm = vma->vm_mm;
 	struct vm_area_struct *mpnt;
-	struct prio_tree_iter iter;
 	unsigned long offset;
 	pgoff_t pgoff;
 	int aliases = 0;
@@ -147,7 +146,7 @@ make_coherent(struct address_space *mapping, struct vm_area_struct *vma,
 	 * cache coherency.
 	 */
 	flush_dcache_mmap_lock(mapping);
-	vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
+	vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {
 		/*
 		 * If this VMA is not in our MM, we can ignore it.
 		 * Note that we intentionally mask out the VMA
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index c3bd8345022..5dbf13f954f 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -336,6 +336,7 @@ retry:
 			/* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
 			* of starvation. */
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 			goto retry;
 		}
 	}
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 40ca11ed6e5..1c8f7f56417 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -196,7 +196,6 @@ static void __flush_dcache_aliases(struct address_space *mapping, struct page *p
 {
 	struct mm_struct *mm = current->active_mm;
 	struct vm_area_struct *mpnt;
-	struct prio_tree_iter iter;
 	pgoff_t pgoff;
 
 	/*
@@ -208,7 +207,7 @@ static void __flush_dcache_aliases(struct address_space *mapping, struct page *p
 	pgoff = page->index << (PAGE_CACHE_SHIFT - PAGE_SHIFT);
 
 	flush_dcache_mmap_lock(mapping);
-	vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
+	vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {
 		unsigned long offset;
 
 		/*
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index 0650bb87c1e..2bb61e703d6 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -368,6 +368,9 @@ ENTRY(arm1020_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm1020_dma_unmap_area)
 
+	.globl	arm1020_flush_kern_cache_louis
+	.equ	arm1020_flush_kern_cache_louis, arm1020_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm1020
 
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 4188478325a..8f96aa40f51 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -354,6 +354,9 @@ ENTRY(arm1020e_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm1020e_dma_unmap_area)
 
+	.globl	arm1020e_flush_kern_cache_louis
+	.equ	arm1020e_flush_kern_cache_louis, arm1020e_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm1020e
 
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index 33c68824bff..8ebe4a469a2 100644
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -343,6 +343,9 @@ ENTRY(arm1022_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm1022_dma_unmap_area)
 
+	.globl	arm1022_flush_kern_cache_louis
+	.equ	arm1022_flush_kern_cache_louis, arm1022_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm1022
 
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index fbc1d5fc24d..093fc7e520c 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -337,6 +337,9 @@ ENTRY(arm1026_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm1026_dma_unmap_area)
 
+	.globl	arm1026_flush_kern_cache_louis
+	.equ	arm1026_flush_kern_cache_louis, arm1026_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm1026
 
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 1a8c138eb89..2c3b9421ab5 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -319,6 +319,9 @@ ENTRY(arm920_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm920_dma_unmap_area)
 
+	.globl	arm920_flush_kern_cache_louis
+	.equ	arm920_flush_kern_cache_louis, arm920_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm920
 #endif
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S
index 4c44d7e1c3c..4464c49d744 100644
--- a/arch/arm/mm/proc-arm922.S
+++ b/arch/arm/mm/proc-arm922.S
@@ -321,6 +321,9 @@ ENTRY(arm922_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm922_dma_unmap_area)
 
+	.globl	arm922_flush_kern_cache_louis
+	.equ	arm922_flush_kern_cache_louis, arm922_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm922
 #endif
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index ec5b1180994..281eb9b9c1d 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -376,6 +376,9 @@ ENTRY(arm925_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm925_dma_unmap_area)
 
+	.globl	arm925_flush_kern_cache_louis
+	.equ	arm925_flush_kern_cache_louis, arm925_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm925
 
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index c31e62c606c..f1803f7e297 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -339,6 +339,9 @@ ENTRY(arm926_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm926_dma_unmap_area)
 
+	.globl	arm926_flush_kern_cache_louis
+	.equ	arm926_flush_kern_cache_louis, arm926_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm926
 
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S
index a613a7dd714..8da189d4a40 100644
--- a/arch/arm/mm/proc-arm940.S
+++ b/arch/arm/mm/proc-arm940.S
@@ -267,6 +267,9 @@ ENTRY(arm940_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm940_dma_unmap_area)
 
+	.globl	arm940_flush_kern_cache_louis
+	.equ	arm940_flush_kern_cache_louis, arm940_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm940
 
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 9f4f2999fdd..f666cf34075 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -310,6 +310,9 @@ ENTRY(arm946_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(arm946_dma_unmap_area)
 
+	.globl	arm946_flush_kern_cache_louis
+	.equ	arm946_flush_kern_cache_louis, arm946_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions arm946
 
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 23a8e4c7f2b..4106b09e0c2 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -415,6 +415,9 @@ ENTRY(feroceon_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(feroceon_dma_unmap_area)
 
+	.globl	feroceon_flush_kern_cache_louis
+	.equ	feroceon_flush_kern_cache_louis, feroceon_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions feroceon
 
@@ -431,6 +434,7 @@ ENDPROC(feroceon_dma_unmap_area)
 	range_alias flush_icache_all
 	range_alias flush_user_cache_all
 	range_alias flush_kern_cache_all
+	range_alias flush_kern_cache_louis
 	range_alias flush_user_cache_range
 	range_alias coherent_kern_range
 	range_alias coherent_user_range
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 2d8ff3ad86d..b29a2265af0 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -299,6 +299,7 @@ ENTRY(\name\()_processor_functions)
 ENTRY(\name\()_cache_fns)
 	.long	\name\()_flush_icache_all
 	.long	\name\()_flush_kern_cache_all
+	.long   \name\()_flush_kern_cache_louis
 	.long	\name\()_flush_user_cache_all
 	.long	\name\()_flush_user_cache_range
 	.long	\name\()_coherent_kern_range
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index fbb2124a547..82f9cdc751d 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -303,6 +303,9 @@ ENTRY(mohawk_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(mohawk_dma_unmap_area)
 
+	.globl	mohawk_flush_kern_cache_louis
+	.equ	mohawk_flush_kern_cache_louis, mohawk_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions mohawk
 
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index c2e2b66f72b..846d279f317 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -172,7 +172,7 @@ __v7_ca15mp_setup:
 __v7_setup:
 	adr	r12, __v7_setup_stack		@ the local stack
 	stmia	r12, {r0-r5, r7, r9, r11, lr}
-	bl	v7_flush_dcache_all
+	bl      v7_flush_dcache_louis
 	ldmia	r12, {r0-r5, r7, r9, r11, lr}
 
 	mrc	p15, 0, r0, c0, c0, 0		@ read main ID register
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index b0d57869da2..eb93d6487f3 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -337,6 +337,9 @@ ENTRY(xsc3_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(xsc3_dma_unmap_area)
 
+	.globl	xsc3_flush_kern_cache_louis
+	.equ	xsc3_flush_kern_cache_louis, xsc3_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions xsc3
 
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 4ffebaa595e..25510361aa1 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -410,6 +410,9 @@ ENTRY(xscale_dma_unmap_area)
 	mov	pc, lr
 ENDPROC(xscale_dma_unmap_area)
 
+	.globl	xscale_flush_kern_cache_louis
+	.equ	xscale_flush_kern_cache_louis, xscale_flush_kern_cache_all
+
 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
 	define_cache_functions xscale
 
@@ -439,6 +442,7 @@ ENDPROC(xscale_dma_unmap_area)
 	a0_alias flush_icache_all
 	a0_alias flush_user_cache_all
 	a0_alias flush_kern_cache_all
+	a0_alias flush_kern_cache_louis
 	a0_alias flush_user_cache_range
 	a0_alias coherent_kern_range
 	a0_alias coherent_user_range
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index baf9064c084..88e1e2e7a20 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -10,16 +10,16 @@ choice
 
 config ARCH_IMX_V4_V5
 	bool "i.MX1, i.MX21, i.MX25, i.MX27"
-	select AUTO_ZRELADDR if !ZBOOT_ROM
 	select ARM_PATCH_PHYS_VIRT
+	select AUTO_ZRELADDR if !ZBOOT_ROM
 	help
 	  This enables support for systems based on the Freescale i.MX ARMv4
 	  and ARMv5 SoCs
 
 config ARCH_IMX_V6_V7
 	bool "i.MX3, i.MX5, i.MX6"
-	select AUTO_ZRELADDR if !ZBOOT_ROM
 	select ARM_PATCH_PHYS_VIRT
+	select AUTO_ZRELADDR if !ZBOOT_ROM
 	select MIGHT_HAVE_CACHE_L2X0
 	help
 	  This enables support for systems based on the Freescale i.MX3, i.MX5
diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig
index 6b46cee2f9c..a35d9841f49 100644
--- a/arch/arm/plat-mxc/devices/Kconfig
+++ b/arch/arm/plat-mxc/devices/Kconfig
@@ -3,8 +3,8 @@ config IMX_HAVE_PLATFORM_FEC
 	default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX50 || SOC_IMX51 || SOC_IMX53
 
 config IMX_HAVE_PLATFORM_FLEXCAN
-	select HAVE_CAN_FLEXCAN if CAN
 	bool
+	select HAVE_CAN_FLEXCAN if CAN
 
 config IMX_HAVE_PLATFORM_FSL_USB2_UDC
 	bool
diff --git a/arch/arm/plat-mxc/devices/platform-mxc_nand.c b/arch/arm/plat-mxc/devices/platform-mxc_nand.c
index 1568f39fba8..95b75cc7051 100644
--- a/arch/arm/plat-mxc/devices/platform-mxc_nand.c
+++ b/arch/arm/plat-mxc/devices/platform-mxc_nand.c
@@ -63,10 +63,6 @@ struct platform_device *__init imx_add_mxc_nand(
 	/* AXI has to come first, that's how the mxc_nand driver expect it */
 	struct resource res[] = {
 		{
-			.start = data->axibase,
-			.end = data->axibase + SZ_16K - 1,
-			.flags = IORESOURCE_MEM,
-		}, {
 			.start = data->iobase,
 			.end = data->iobase + data->iosize - 1,
 			.flags = IORESOURCE_MEM,
@@ -74,10 +70,13 @@ struct platform_device *__init imx_add_mxc_nand(
 			.start = data->irq,
 			.end = data->irq,
 			.flags = IORESOURCE_IRQ,
+		}, {
+			.start = data->axibase,
+			.end = data->axibase + SZ_16K - 1,
+			.flags = IORESOURCE_MEM,
 		},
 	};
 	return imx_add_platform_device("mxc_nand", data->id,
-			res + !data->axibase,
-			ARRAY_SIZE(res) - !data->axibase,
+			res, ARRAY_SIZE(res) - !data->axibase,
 			pdata, sizeof(*pdata));
 }
diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig
index 4c48c8b60b5..19f55cae5d7 100644
--- a/arch/arm/plat-nomadik/Kconfig
+++ b/arch/arm/plat-nomadik/Kconfig
@@ -5,8 +5,8 @@
 config PLAT_NOMADIK
 	bool
 	depends on ARCH_NOMADIK || ARCH_U8500
-	select CLKSRC_MMIO
 	default y
+	select CLKSRC_MMIO
 	help
 	  Common platform code for Nomadik and other ST-Ericsson
 	  platforms.
diff --git a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
index 826de74bfdd..c08a54d9d88 100644
--- a/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
+++ b/arch/arm/plat-nomadik/include/plat/gpio-nomadik.h
@@ -45,6 +45,12 @@
 #define NMK_GPIO_ALT_B	2
 #define NMK_GPIO_ALT_C	(NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
 
+#define NMK_GPIO_ALT_CX_SHIFT 2
+#define NMK_GPIO_ALT_C1	((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
+#define NMK_GPIO_ALT_C2	((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
+#define NMK_GPIO_ALT_C3	((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
+#define NMK_GPIO_ALT_C4	((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
+
 /* Pull up/down values */
 enum nmk_gpio_pull {
 	NMK_GPIO_PULL_NONE,
diff --git a/arch/arm/plat-nomadik/include/plat/pincfg.h b/arch/arm/plat-nomadik/include/plat/pincfg.h
index 9c949c7c98a..3b8ec60af35 100644
--- a/arch/arm/plat-nomadik/include/plat/pincfg.h
+++ b/arch/arm/plat-nomadik/include/plat/pincfg.h
@@ -25,6 +25,8 @@
  *	bit 19..20 - SLPM direction
  *	bit 21..22 - SLPM Value (if output)
  *	bit 23..25 - PDIS value (if input)
+ *	bit	26 - Gpio mode
+ *	bit	27 - Sleep mode
  *
  * to facilitate the definition, the following macros are provided
  *
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index ca83a7659ae..7cd56ed5cd9 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -14,10 +14,10 @@ config ARCH_OMAP1
 	select CLKDEV_LOOKUP
 	select CLKSRC_MMIO
 	select GENERIC_IRQ_CHIP
-	select IRQ_DOMAIN
 	select HAVE_IDE
-	select NEED_MACH_MEMORY_H
+	select IRQ_DOMAIN
 	select NEED_MACH_IO_H if PCCARD
+	select NEED_MACH_MEMORY_H
 	help
 	  "Systems based on omap7xx, omap15xx or omap16xx"
 
@@ -25,10 +25,10 @@ config ARCH_OMAP2PLUS
 	bool "TI OMAP2/3/4"
 	select CLKDEV_LOOKUP
 	select GENERIC_IRQ_CHIP
-	select SPARSE_IRQ
 	select OMAP_DM_TIMER
-	select USE_OF
 	select PROC_DEVICETREE if PROC_FS
+	select SPARSE_IRQ
+	select USE_OF
 	help
 	  "Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
 
@@ -44,10 +44,12 @@ config OMAP_DEBUG_DEVICES
 config OMAP_DEBUG_LEDS
 	def_bool y if NEW_LEDS
 	depends on OMAP_DEBUG_DEVICES
+	select LEDS_CLASS
 
 config POWER_AVS_OMAP
 	bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
 	depends on POWER_AVS && (ARCH_OMAP3 || ARCH_OMAP4) && PM
+	select POWER_SUPPLY
 	help
 	  Say Y to enable AVS(Adaptive Voltage Scaling)
 	  support on OMAP containing the version 1 or
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 2e826f1faf7..87ba8dd0d79 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -52,22 +52,29 @@ static u32 notrace omap_32k_read_sched_clock(void)
  * nsecs and adds to a monotonically increasing timespec.
  */
 static struct timespec persistent_ts;
-static cycles_t cycles, last_cycles;
+static cycles_t cycles;
 static unsigned int persistent_mult, persistent_shift;
+static DEFINE_SPINLOCK(read_persistent_clock_lock);
+
 static void omap_read_persistent_clock(struct timespec *ts)
 {
 	unsigned long long nsecs;
-	cycles_t delta;
-	struct timespec *tsp = &persistent_ts;
+	cycles_t last_cycles;
+	unsigned long flags;
+
+	spin_lock_irqsave(&read_persistent_clock_lock, flags);
 
 	last_cycles = cycles;
 	cycles = sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
-	delta = cycles - last_cycles;
 
-	nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift);
+	nsecs = clocksource_cyc2ns(cycles - last_cycles,
+					persistent_mult, persistent_shift);
+
+	timespec_add_ns(&persistent_ts, nsecs);
+
+	*ts = persistent_ts;
 
-	timespec_add_ns(tsp, nsecs);
-	*ts = *tsp;
+	spin_unlock_irqrestore(&read_persistent_clock_lock, flags);
 }
 
 /**
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 6013831a043..a5683a84c6e 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,14 +26,12 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
-#include <linux/i2c-omap.h>
 #include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/clk.h>
 
 #include <mach/irqs.h>
 #include <plat/i2c.h>
-#include <plat/omap-pm.h>
 #include <plat/omap_device.h>
 
 #define OMAP_I2C_SIZE		0x3f
@@ -129,16 +127,6 @@ static inline int omap1_i2c_add_bus(int bus_id)
 
 
 #ifdef CONFIG_ARCH_OMAP2PLUS
-/*
- * XXX This function is a temporary compatibility wrapper - only
- * needed until the I2C driver can be converted to call
- * omap_pm_set_max_dev_wakeup_lat() and handle a return code.
- */
-static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
-{
-	omap_pm_set_max_mpu_wakeup_lat(dev, t);
-}
-
 static inline int omap2_i2c_add_bus(int bus_id)
 {
 	int l;
@@ -170,15 +158,6 @@ static inline int omap2_i2c_add_bus(int bus_id)
 	dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
 	pdata->flags = dev_attr->flags;
 
-	/*
-	 * When waiting for completion of a i2c transfer, we need to
-	 * set a wake up latency constraint for the MPU. This is to
-	 * ensure quick enough wakeup from idle, when transfer
-	 * completes.
-	 * Only omap3 has support for constraints
-	 */
-	if (cpu_is_omap34xx())
-		pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
 	pdev = omap_device_build(name, bus_id, oh, pdata,
 			sizeof(struct omap_i2c_bus_platform_data),
 			NULL, 0, 0);
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c
index 9f6413324df..9722f418ae1 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/plat-omap/omap-pm-noop.c
@@ -38,7 +38,7 @@ int omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t)
 	if (!dev || t < -1) {
 		WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
 		return -EINVAL;
-	};
+	}
 
 	if (t == -1)
 		pr_debug("OMAP PM: remove max MPU wakeup latency constraint: dev %s\n",
@@ -67,7 +67,7 @@ int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r)
 	    agent_id != OCP_TARGET_AGENT)) {
 		WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
 		return -EINVAL;
-	};
+	}
 
 	if (r == 0)
 		pr_debug("OMAP PM: remove min bus tput constraint: dev %s for agent_id %d\n",
@@ -93,7 +93,7 @@ int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev,
 	if (!req_dev || !dev || t < -1) {
 		WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
 		return -EINVAL;
-	};
+	}
 
 	if (t == -1)
 		pr_debug("OMAP PM: remove max device latency constraint: dev %s\n",
@@ -123,7 +123,7 @@ int omap_pm_set_max_sdma_lat(struct device *dev, long t)
 	if (!dev || t < -1) {
 		WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
 		return -EINVAL;
-	};
+	}
 
 	if (t == -1)
 		pr_debug("OMAP PM: remove max DMA latency constraint: dev %s\n",
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index cee85a55bd8..7a7d1f2a65e 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -725,7 +725,7 @@ struct platform_device __init *omap_device_build_ss(const char *pdev_name, int p
 		dev_set_name(&pdev->dev, "%s", pdev->name);
 
 	od = omap_device_alloc(pdev, ohs, oh_cnt, pm_lats, pm_lats_cnt);
-	if (!od)
+	if (IS_ERR(od))
 		goto odbs_exit1;
 
 	ret = platform_device_add_data(pdev, pdata, pdata_len);
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 21bf6adb919..eef3b6a2f8a 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -6,8 +6,8 @@ config PLAT_S3C24XX
 	bool
 	depends on ARCH_S3C24XX
 	default y
-	select NO_IOPORT
 	select ARCH_REQUIRE_GPIOLIB
+	select NO_IOPORT
 	select S3C_DEV_NAND
 	help
 	  Base platform code for any Samsung S3C24XX device
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 9c3b90c3538..59401e1cc53 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -7,9 +7,9 @@
 config PLAT_SAMSUNG
 	bool
 	depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
-	select NO_IOPORT
-	select GENERIC_IRQ_CHIP
 	default y
+	select GENERIC_IRQ_CHIP
+	select NO_IOPORT
 	help
 	  Base platform code for all Samsung SoC based systems
 
@@ -17,16 +17,16 @@ config PLAT_S5P
 	bool
 	depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
 	default y
-	select ARM_VIC if !ARCH_EXYNOS
+	select ARCH_REQUIRE_GPIOLIB
 	select ARM_GIC if ARCH_EXYNOS
+	select ARM_VIC if !ARCH_EXYNOS
 	select GIC_NON_BANKED if ARCH_EXYNOS4
 	select NO_IOPORT
-	select ARCH_REQUIRE_GPIOLIB
+	select PLAT_SAMSUNG
 	select S3C_GPIO_TRACK
 	select S5P_GPIO_DRVSTR
-	select SAMSUNG_GPIOLIB_4BIT
-	select PLAT_SAMSUNG
 	select SAMSUNG_CLKSRC
+	select SAMSUNG_GPIOLIB_4BIT
 	select SAMSUNG_IRQ_VIC_TIMER
 	help
 	  Base platform code for Samsung's S5P series SoC.
@@ -423,10 +423,10 @@ config S3C_DMA
 
 config SAMSUNG_DMADEV
 	bool
+	select ARM_AMBA
 	select DMADEVICES
 	select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \
 					CPU_S5P6450 || CPU_S5P6440)
-	select ARM_AMBA
 	help
 	  Use DMA device engine for PL330 DMAC.
 
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index c38d7548924..d088afa034e 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -91,7 +91,8 @@ static int samsung_dmadev_prepare(unsigned ch,
 		break;
 	case DMA_CYCLIC:
 		desc = dmaengine_prep_dma_cyclic(chan, param->buf,
-			param->len, param->period, param->direction);
+			param->len, param->period, param->direction,
+			DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 		break;
 	default:
 		dev_err(&chan->dev->device, "unsupported format\n");
diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
deleted file mode 100644
index 4c3647f8005..00000000000
--- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
+++ /dev/null
@@ -1,159 +0,0 @@
-/* arch/arm/plat-samsung/include/plat/regs-fb-v4.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C64XX - new-style framebuffer register definitions
- *
- * This is the register set for the new style framebuffer interface
- * found from the S3C2443 onwards and specifically the S3C64XX series
- * S3C6400 and S3C6410.
- *
- * The file contains the cpu specific items which change between whichever
- * architecture is selected. See <plat/regs-fb.h> for the core definitions
- * that are the same.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* include the core definitions here, in case we really do need to
- * override them at a later date.
-*/
-
-#include <plat/regs-fb.h>
-
-#define S3C_FB_MAX_WIN (5)  /* number of hardware windows available. */
-#define VIDCON1_FSTATUS_EVEN	(1 << 15)
-
-/* Video timing controls */
-#define VIDTCON0				(0x10)
-#define VIDTCON1				(0x14)
-#define VIDTCON2				(0x18)
-
-/* Window position controls */
-
-#define WINCON(_win)				(0x20 + ((_win) * 4))
-
-/* OSD1 and OSD4 do not have register D */
-
-#define VIDOSD_BASE				(0x40)
-
-#define VIDINTCON0				(0x130)
-
-/* WINCONx */
-
-#define WINCONx_CSCWIDTH_MASK			(0x3 << 26)
-#define WINCONx_CSCWIDTH_SHIFT			(26)
-#define WINCONx_CSCWIDTH_WIDE			(0x0 << 26)
-#define WINCONx_CSCWIDTH_NARROW			(0x3 << 26)
-
-#define WINCONx_ENLOCAL				(1 << 22)
-#define WINCONx_BUFSTATUS			(1 << 21)
-#define WINCONx_BUFSEL				(1 << 20)
-#define WINCONx_BUFAUTOEN			(1 << 19)
-#define WINCONx_YCbCr				(1 << 13)
-
-#define WINCON1_LOCALSEL_CAMIF			(1 << 23)
-
-#define WINCON2_LOCALSEL_CAMIF			(1 << 23)
-#define WINCON2_BLD_PIX				(1 << 6)
-
-#define WINCON2_ALPHA_SEL			(1 << 1)
-#define WINCON2_BPPMODE_MASK			(0xf << 2)
-#define WINCON2_BPPMODE_SHIFT			(2)
-#define WINCON2_BPPMODE_1BPP			(0x0 << 2)
-#define WINCON2_BPPMODE_2BPP			(0x1 << 2)
-#define WINCON2_BPPMODE_4BPP			(0x2 << 2)
-#define WINCON2_BPPMODE_8BPP_1232		(0x4 << 2)
-#define WINCON2_BPPMODE_16BPP_565		(0x5 << 2)
-#define WINCON2_BPPMODE_16BPP_A1555		(0x6 << 2)
-#define WINCON2_BPPMODE_16BPP_I1555		(0x7 << 2)
-#define WINCON2_BPPMODE_18BPP_666		(0x8 << 2)
-#define WINCON2_BPPMODE_18BPP_A1665		(0x9 << 2)
-#define WINCON2_BPPMODE_19BPP_A1666		(0xa << 2)
-#define WINCON2_BPPMODE_24BPP_888		(0xb << 2)
-#define WINCON2_BPPMODE_24BPP_A1887		(0xc << 2)
-#define WINCON2_BPPMODE_25BPP_A1888		(0xd << 2)
-#define WINCON2_BPPMODE_28BPP_A4888		(0xd << 2)
-
-#define WINCON3_BLD_PIX				(1 << 6)
-
-#define WINCON3_ALPHA_SEL			(1 << 1)
-#define WINCON3_BPPMODE_MASK			(0xf << 2)
-#define WINCON3_BPPMODE_SHIFT			(2)
-#define WINCON3_BPPMODE_1BPP			(0x0 << 2)
-#define WINCON3_BPPMODE_2BPP			(0x1 << 2)
-#define WINCON3_BPPMODE_4BPP			(0x2 << 2)
-#define WINCON3_BPPMODE_16BPP_565		(0x5 << 2)
-#define WINCON3_BPPMODE_16BPP_A1555		(0x6 << 2)
-#define WINCON3_BPPMODE_16BPP_I1555		(0x7 << 2)
-#define WINCON3_BPPMODE_18BPP_666		(0x8 << 2)
-#define WINCON3_BPPMODE_18BPP_A1665		(0x9 << 2)
-#define WINCON3_BPPMODE_19BPP_A1666		(0xa << 2)
-#define WINCON3_BPPMODE_24BPP_888		(0xb << 2)
-#define WINCON3_BPPMODE_24BPP_A1887		(0xc << 2)
-#define WINCON3_BPPMODE_25BPP_A1888		(0xd << 2)
-#define WINCON3_BPPMODE_28BPP_A4888		(0xd << 2)
-
-#define VIDINTCON0_FIFIOSEL_WINDOW2		(0x10 << 5)
-#define VIDINTCON0_FIFIOSEL_WINDOW3		(0x20 << 5)
-#define VIDINTCON0_FIFIOSEL_WINDOW4		(0x40 << 5)
-
-#define DITHMODE				(0x170)
-#define WINxMAP(_win)				(0x180 + ((_win) * 4))
-
-
-#define DITHMODE_R_POS_MASK			(0x3 << 5)
-#define DITHMODE_R_POS_SHIFT			(5)
-#define DITHMODE_R_POS_8BIT			(0x0 << 5)
-#define DITHMODE_R_POS_6BIT			(0x1 << 5)
-#define DITHMODE_R_POS_5BIT			(0x2 << 5)
-
-#define DITHMODE_G_POS_MASK			(0x3 << 3)
-#define DITHMODE_G_POS_SHIFT			(3)
-#define DITHMODE_G_POS_8BIT			(0x0 << 3)
-#define DITHMODE_G_POS_6BIT			(0x1 << 3)
-#define DITHMODE_G_POS_5BIT			(0x2 << 3)
-
-#define DITHMODE_B_POS_MASK			(0x3 << 1)
-#define DITHMODE_B_POS_SHIFT			(1)
-#define DITHMODE_B_POS_8BIT			(0x0 << 1)
-#define DITHMODE_B_POS_6BIT			(0x1 << 1)
-#define DITHMODE_B_POS_5BIT			(0x2 << 1)
-
-#define DITHMODE_DITH_EN			(1 << 0)
-
-#define WPALCON					(0x1A0)
-
-/* Palette control */
-/* Note for S5PC100: you can still use those macros on WPALCON (aka WPALCON_L),
- * but make sure that WPALCON_H W2PAL-W4PAL entries are zeroed out */
-#define WPALCON_W4PAL_16BPP_A555		(1 << 8)
-#define WPALCON_W3PAL_16BPP_A555		(1 << 7)
-#define WPALCON_W2PAL_16BPP_A555		(1 << 6)
-
-
-/* Notes on per-window bpp settings
- *
- * Value	Win0	 Win1	  Win2	   Win3	    Win 4
- * 0000		1(P)	 1(P)	  1(P)	   1(P)	    1(P)
- * 0001		2(P)	 2(P)     2(P)	   2(P)	    2(P)
- * 0010		4(P)	 4(P)     4(P)	   4(P)     -none-
- * 0011		8(P)	 8(P)     -none-   -none-   -none-
- * 0100		-none-	 8(A232)  8(A232)  -none-   -none-
- * 0101		16(565)	 16(565)  16(565)  16(565)   16(565)
- * 0110		-none-	 16(A555) 16(A555) 16(A555)  16(A555)
- * 0111		16(I555) 16(I565) 16(I555) 16(I555)  16(I555)
- * 1000		18(666)	 18(666)  18(666)  18(666)   18(666)
- * 1001		-none-	 18(A665) 18(A665) 18(A665)  16(A665)
- * 1010		-none-	 19(A666) 19(A666) 19(A666)  19(A666)
- * 1011		24(888)	 24(888)  24(888)  24(888)   24(888)
- * 1100		-none-	 24(A887) 24(A887) 24(A887)  24(A887)
- * 1101		-none-	 25(A888) 25(A888) 25(A888)  25(A888)
- * 1110		-none-	 -none-	  -none-   -none-    -none-
- * 1111		-none-	 -none-   -none-   -none-    -none-
-*/
diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h
deleted file mode 100644
index 9a78012d6f4..00000000000
--- a/arch/arm/plat-samsung/include/plat/regs-fb.h
+++ /dev/null
@@ -1,403 +0,0 @@
-/* arch/arm/plat-samsung/include/plat/regs-fb.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      http://armlinux.simtec.co.uk/
- *      Ben Dooks <ben@simtec.co.uk>
- *
- * S3C Platform - new-style framebuffer register definitions
- *
- * This is the register set for the new style framebuffer interface
- * found from the S3C2443 onwards into the S3C2416, S3C2450 and the
- * S3C64XX series such as the S3C6400 and S3C6410.
- *
- * The file does not contain the cpu specific items which are based on
- * whichever architecture is selected, it only contains the core of the
- * register set. See <mach/regs-fb.h> to get the specifics.
- *
- * Note, we changed to using regs-fb.h as it avoids any clashes with
- * the original regs-lcd.h so out of the way of regs-lcd.h as well as
- * indicating the newer block is much more than just an LCD interface.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* Please do not include this file directly, use <mach/regs-fb.h> to
- * ensure all the localised SoC support is included as necessary.
-*/
-
-/* VIDCON0 */
-
-#define VIDCON0					(0x00)
-#define VIDCON0_INTERLACE			(1 << 29)
-#define VIDCON0_VIDOUT_MASK			(0x3 << 26)
-#define VIDCON0_VIDOUT_SHIFT			(26)
-#define VIDCON0_VIDOUT_RGB			(0x0 << 26)
-#define VIDCON0_VIDOUT_TV			(0x1 << 26)
-#define VIDCON0_VIDOUT_I80_LDI0			(0x2 << 26)
-#define VIDCON0_VIDOUT_I80_LDI1			(0x3 << 26)
-
-#define VIDCON0_L1_DATA_MASK			(0x7 << 23)
-#define VIDCON0_L1_DATA_SHIFT			(23)
-#define VIDCON0_L1_DATA_16BPP			(0x0 << 23)
-#define VIDCON0_L1_DATA_18BPP16			(0x1 << 23)
-#define VIDCON0_L1_DATA_18BPP9			(0x2 << 23)
-#define VIDCON0_L1_DATA_24BPP			(0x3 << 23)
-#define VIDCON0_L1_DATA_18BPP			(0x4 << 23)
-#define VIDCON0_L1_DATA_16BPP8			(0x5 << 23)
-
-#define VIDCON0_L0_DATA_MASK			(0x7 << 20)
-#define VIDCON0_L0_DATA_SHIFT			(20)
-#define VIDCON0_L0_DATA_16BPP			(0x0 << 20)
-#define VIDCON0_L0_DATA_18BPP16			(0x1 << 20)
-#define VIDCON0_L0_DATA_18BPP9			(0x2 << 20)
-#define VIDCON0_L0_DATA_24BPP			(0x3 << 20)
-#define VIDCON0_L0_DATA_18BPP			(0x4 << 20)
-#define VIDCON0_L0_DATA_16BPP8			(0x5 << 20)
-
-#define VIDCON0_PNRMODE_MASK			(0x3 << 17)
-#define VIDCON0_PNRMODE_SHIFT			(17)
-#define VIDCON0_PNRMODE_RGB			(0x0 << 17)
-#define VIDCON0_PNRMODE_BGR			(0x1 << 17)
-#define VIDCON0_PNRMODE_SERIAL_RGB		(0x2 << 17)
-#define VIDCON0_PNRMODE_SERIAL_BGR		(0x3 << 17)
-
-#define VIDCON0_CLKVALUP			(1 << 16)
-#define VIDCON0_CLKVAL_F_MASK			(0xff << 6)
-#define VIDCON0_CLKVAL_F_SHIFT			(6)
-#define VIDCON0_CLKVAL_F_LIMIT			(0xff)
-#define VIDCON0_CLKVAL_F(_x)			((_x) << 6)
-#define VIDCON0_VLCKFREE			(1 << 5)
-#define VIDCON0_CLKDIR				(1 << 4)
-
-#define VIDCON0_CLKSEL_MASK			(0x3 << 2)
-#define VIDCON0_CLKSEL_SHIFT			(2)
-#define VIDCON0_CLKSEL_HCLK			(0x0 << 2)
-#define VIDCON0_CLKSEL_LCD			(0x1 << 2)
-#define VIDCON0_CLKSEL_27M			(0x3 << 2)
-
-#define VIDCON0_ENVID				(1 << 1)
-#define VIDCON0_ENVID_F				(1 << 0)
-
-#define VIDCON1					(0x04)
-#define VIDCON1_LINECNT_MASK			(0x7ff << 16)
-#define VIDCON1_LINECNT_SHIFT			(16)
-#define VIDCON1_LINECNT_GET(_v)			(((_v) >> 16) & 0x7ff)
-#define VIDCON1_VSTATUS_MASK			(0x3 << 13)
-#define VIDCON1_VSTATUS_SHIFT			(13)
-#define VIDCON1_VSTATUS_VSYNC			(0x0 << 13)
-#define VIDCON1_VSTATUS_BACKPORCH		(0x1 << 13)
-#define VIDCON1_VSTATUS_ACTIVE			(0x2 << 13)
-#define VIDCON1_VSTATUS_FRONTPORCH		(0x0 << 13)
-#define VIDCON1_VCLK_MASK			(0x3 << 9)
-#define VIDCON1_VCLK_HOLD			(0x0 << 9)
-#define VIDCON1_VCLK_RUN			(0x1 << 9)
-
-#define VIDCON1_INV_VCLK			(1 << 7)
-#define VIDCON1_INV_HSYNC			(1 << 6)
-#define VIDCON1_INV_VSYNC			(1 << 5)
-#define VIDCON1_INV_VDEN			(1 << 4)
-
-/* VIDCON2 */
-
-#define VIDCON2					(0x08)
-#define VIDCON2_EN601				(1 << 23)
-#define VIDCON2_TVFMTSEL_SW			(1 << 14)
-
-#define VIDCON2_TVFMTSEL1_MASK			(0x3 << 12)
-#define VIDCON2_TVFMTSEL1_SHIFT			(12)
-#define VIDCON2_TVFMTSEL1_RGB			(0x0 << 12)
-#define VIDCON2_TVFMTSEL1_YUV422		(0x1 << 12)
-#define VIDCON2_TVFMTSEL1_YUV444		(0x2 << 12)
-
-#define VIDCON2_ORGYCbCr			(1 << 8)
-#define VIDCON2_YUVORDCrCb			(1 << 7)
-
-/* PRTCON (S3C6410, S5PC100)
- * Might not be present in the S3C6410 documentation,
- * but tests prove it's there almost for sure; shouldn't hurt in any case.
- */
-#define PRTCON					(0x0c)
-#define PRTCON_PROTECT				(1 << 11)
-
-/* VIDTCON0 */
-
-#define VIDTCON0_VBPDE_MASK			(0xff << 24)
-#define VIDTCON0_VBPDE_SHIFT			(24)
-#define VIDTCON0_VBPDE_LIMIT			(0xff)
-#define VIDTCON0_VBPDE(_x)			((_x) << 24)
-
-#define VIDTCON0_VBPD_MASK			(0xff << 16)
-#define VIDTCON0_VBPD_SHIFT			(16)
-#define VIDTCON0_VBPD_LIMIT			(0xff)
-#define VIDTCON0_VBPD(_x)			((_x) << 16)
-
-#define VIDTCON0_VFPD_MASK			(0xff << 8)
-#define VIDTCON0_VFPD_SHIFT			(8)
-#define VIDTCON0_VFPD_LIMIT			(0xff)
-#define VIDTCON0_VFPD(_x)			((_x) << 8)
-
-#define VIDTCON0_VSPW_MASK			(0xff << 0)
-#define VIDTCON0_VSPW_SHIFT			(0)
-#define VIDTCON0_VSPW_LIMIT			(0xff)
-#define VIDTCON0_VSPW(_x)			((_x) << 0)
-
-/* VIDTCON1 */
-
-#define VIDTCON1_VFPDE_MASK			(0xff << 24)
-#define VIDTCON1_VFPDE_SHIFT			(24)
-#define VIDTCON1_VFPDE_LIMIT			(0xff)
-#define VIDTCON1_VFPDE(_x)			((_x) << 24)
-
-#define VIDTCON1_HBPD_MASK			(0xff << 16)
-#define VIDTCON1_HBPD_SHIFT			(16)
-#define VIDTCON1_HBPD_LIMIT			(0xff)
-#define VIDTCON1_HBPD(_x)			((_x) << 16)
-
-#define VIDTCON1_HFPD_MASK			(0xff << 8)
-#define VIDTCON1_HFPD_SHIFT			(8)
-#define VIDTCON1_HFPD_LIMIT			(0xff)
-#define VIDTCON1_HFPD(_x)			((_x) << 8)
-
-#define VIDTCON1_HSPW_MASK			(0xff << 0)
-#define VIDTCON1_HSPW_SHIFT			(0)
-#define VIDTCON1_HSPW_LIMIT			(0xff)
-#define VIDTCON1_HSPW(_x)			((_x) << 0)
-
-#define VIDTCON2				(0x18)
-#define VIDTCON2_LINEVAL_E(_x)			((((_x) & 0x800) >> 11) << 23)
-#define VIDTCON2_LINEVAL_MASK			(0x7ff << 11)
-#define VIDTCON2_LINEVAL_SHIFT			(11)
-#define VIDTCON2_LINEVAL_LIMIT			(0x7ff)
-#define VIDTCON2_LINEVAL(_x)			(((_x) & 0x7ff) << 11)
-
-#define VIDTCON2_HOZVAL_E(_x)			((((_x) & 0x800) >> 11) << 22)
-#define VIDTCON2_HOZVAL_MASK			(0x7ff << 0)
-#define VIDTCON2_HOZVAL_SHIFT			(0)
-#define VIDTCON2_HOZVAL_LIMIT			(0x7ff)
-#define VIDTCON2_HOZVAL(_x)			(((_x) & 0x7ff) << 0)
-
-/* WINCONx */
-
-
-#define WINCONx_BITSWP				(1 << 18)
-#define WINCONx_BYTSWP				(1 << 17)
-#define WINCONx_HAWSWP				(1 << 16)
-#define WINCONx_WSWP				(1 << 15)
-#define WINCONx_BURSTLEN_MASK			(0x3 << 9)
-#define WINCONx_BURSTLEN_SHIFT			(9)
-#define WINCONx_BURSTLEN_16WORD			(0x0 << 9)
-#define WINCONx_BURSTLEN_8WORD			(0x1 << 9)
-#define WINCONx_BURSTLEN_4WORD			(0x2 << 9)
-
-#define WINCONx_ENWIN				(1 << 0)
-#define WINCON0_BPPMODE_MASK			(0xf << 2)
-#define WINCON0_BPPMODE_SHIFT			(2)
-#define WINCON0_BPPMODE_1BPP			(0x0 << 2)
-#define WINCON0_BPPMODE_2BPP			(0x1 << 2)
-#define WINCON0_BPPMODE_4BPP			(0x2 << 2)
-#define WINCON0_BPPMODE_8BPP_PALETTE		(0x3 << 2)
-#define WINCON0_BPPMODE_16BPP_565		(0x5 << 2)
-#define WINCON0_BPPMODE_16BPP_1555		(0x7 << 2)
-#define WINCON0_BPPMODE_18BPP_666		(0x8 << 2)
-#define WINCON0_BPPMODE_24BPP_888		(0xb << 2)
-
-#define WINCON1_BLD_PIX				(1 << 6)
-
-#define WINCON1_ALPHA_SEL			(1 << 1)
-#define WINCON1_BPPMODE_MASK			(0xf << 2)
-#define WINCON1_BPPMODE_SHIFT			(2)
-#define WINCON1_BPPMODE_1BPP			(0x0 << 2)
-#define WINCON1_BPPMODE_2BPP			(0x1 << 2)
-#define WINCON1_BPPMODE_4BPP			(0x2 << 2)
-#define WINCON1_BPPMODE_8BPP_PALETTE		(0x3 << 2)
-#define WINCON1_BPPMODE_8BPP_1232		(0x4 << 2)
-#define WINCON1_BPPMODE_16BPP_565		(0x5 << 2)
-#define WINCON1_BPPMODE_16BPP_A1555		(0x6 << 2)
-#define WINCON1_BPPMODE_16BPP_I1555		(0x7 << 2)
-#define WINCON1_BPPMODE_18BPP_666		(0x8 << 2)
-#define WINCON1_BPPMODE_18BPP_A1665		(0x9 << 2)
-#define WINCON1_BPPMODE_19BPP_A1666		(0xa << 2)
-#define WINCON1_BPPMODE_24BPP_888		(0xb << 2)
-#define WINCON1_BPPMODE_24BPP_A1887		(0xc << 2)
-#define WINCON1_BPPMODE_25BPP_A1888		(0xd << 2)
-#define WINCON1_BPPMODE_28BPP_A4888		(0xd << 2)
-
-/* S5PV210 */
-#define SHADOWCON				(0x34)
-#define SHADOWCON_WINx_PROTECT(_win)		(1 << (10 + (_win)))
-/* DMA channels (all windows) */
-#define SHADOWCON_CHx_ENABLE(_win)		(1 << (_win))
-/* Local input channels (windows 0-2) */
-#define SHADOWCON_CHx_LOCAL_ENABLE(_win)	(1 << (5 + (_win)))
-
-#define VIDOSDxA_TOPLEFT_X_E(_x)		((((_x) & 0x800) >> 11) << 23)
-#define VIDOSDxA_TOPLEFT_X_MASK			(0x7ff << 11)
-#define VIDOSDxA_TOPLEFT_X_SHIFT		(11)
-#define VIDOSDxA_TOPLEFT_X_LIMIT		(0x7ff)
-#define VIDOSDxA_TOPLEFT_X(_x)			(((_x) & 0x7ff) << 11)
-
-#define VIDOSDxA_TOPLEFT_Y_E(_x)		((((_x) & 0x800) >> 11) << 22)
-#define VIDOSDxA_TOPLEFT_Y_MASK			(0x7ff << 0)
-#define VIDOSDxA_TOPLEFT_Y_SHIFT		(0)
-#define VIDOSDxA_TOPLEFT_Y_LIMIT		(0x7ff)
-#define VIDOSDxA_TOPLEFT_Y(_x)			(((_x) & 0x7ff) << 0)
-
-#define VIDOSDxB_BOTRIGHT_X_E(_x)		((((_x) & 0x800) >> 11) << 23)
-#define VIDOSDxB_BOTRIGHT_X_MASK		(0x7ff << 11)
-#define VIDOSDxB_BOTRIGHT_X_SHIFT		(11)
-#define VIDOSDxB_BOTRIGHT_X_LIMIT		(0x7ff)
-#define VIDOSDxB_BOTRIGHT_X(_x)			(((_x) & 0x7ff) << 11)
-
-#define VIDOSDxB_BOTRIGHT_Y_E(_x)		((((_x) & 0x800) >> 11) << 22)
-#define VIDOSDxB_BOTRIGHT_Y_MASK		(0x7ff << 0)
-#define VIDOSDxB_BOTRIGHT_Y_SHIFT		(0)
-#define VIDOSDxB_BOTRIGHT_Y_LIMIT		(0x7ff)
-#define VIDOSDxB_BOTRIGHT_Y(_x)			(((_x) & 0x7ff) << 0)
-
-/* For VIDOSD[1..4]C */
-#define VIDISD14C_ALPHA0_R(_x)			((_x) << 20)
-#define VIDISD14C_ALPHA0_G_MASK			(0xf << 16)
-#define VIDISD14C_ALPHA0_G_SHIFT		(16)
-#define VIDISD14C_ALPHA0_G_LIMIT		(0xf)
-#define VIDISD14C_ALPHA0_G(_x)			((_x) << 16)
-#define VIDISD14C_ALPHA0_B_MASK			(0xf << 12)
-#define VIDISD14C_ALPHA0_B_SHIFT		(12)
-#define VIDISD14C_ALPHA0_B_LIMIT		(0xf)
-#define VIDISD14C_ALPHA0_B(_x)			((_x) << 12)
-#define VIDISD14C_ALPHA1_R_MASK			(0xf << 8)
-#define VIDISD14C_ALPHA1_R_SHIFT		(8)
-#define VIDISD14C_ALPHA1_R_LIMIT		(0xf)
-#define VIDISD14C_ALPHA1_R(_x)			((_x) << 8)
-#define VIDISD14C_ALPHA1_G_MASK			(0xf << 4)
-#define VIDISD14C_ALPHA1_G_SHIFT		(4)
-#define VIDISD14C_ALPHA1_G_LIMIT		(0xf)
-#define VIDISD14C_ALPHA1_G(_x)			((_x) << 4)
-#define VIDISD14C_ALPHA1_B_MASK			(0xf << 0)
-#define VIDISD14C_ALPHA1_B_SHIFT		(0)
-#define VIDISD14C_ALPHA1_B_LIMIT		(0xf)
-#define VIDISD14C_ALPHA1_B(_x)			((_x) << 0)
-
-/* Video buffer addresses */
-#define VIDW_BUF_START(_buff)			(0xA0 + ((_buff) * 8))
-#define VIDW_BUF_START1(_buff)			(0xA4 + ((_buff) * 8))
-#define VIDW_BUF_END(_buff)			(0xD0 + ((_buff) * 8))
-#define VIDW_BUF_END1(_buff)			(0xD4 + ((_buff) * 8))
-#define VIDW_BUF_SIZE(_buff)			(0x100 + ((_buff) * 4))
-
-#define VIDW_BUF_SIZE_OFFSET_E(_x)		((((_x) & 0x2000) >> 13) << 27)
-#define VIDW_BUF_SIZE_OFFSET_MASK		(0x1fff << 13)
-#define VIDW_BUF_SIZE_OFFSET_SHIFT		(13)
-#define VIDW_BUF_SIZE_OFFSET_LIMIT		(0x1fff)
-#define VIDW_BUF_SIZE_OFFSET(_x)		(((_x) & 0x1fff) << 13)
-
-#define VIDW_BUF_SIZE_PAGEWIDTH_E(_x)		((((_x) & 0x2000) >> 13) << 26)
-#define VIDW_BUF_SIZE_PAGEWIDTH_MASK		(0x1fff << 0)
-#define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT		(0)
-#define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT		(0x1fff)
-#define VIDW_BUF_SIZE_PAGEWIDTH(_x)		(((_x) & 0x1fff) << 0)
-
-/* Interrupt controls and status */
-
-#define VIDINTCON0_FIFOINTERVAL_MASK		(0x3f << 20)
-#define VIDINTCON0_FIFOINTERVAL_SHIFT		(20)
-#define VIDINTCON0_FIFOINTERVAL_LIMIT		(0x3f)
-#define VIDINTCON0_FIFOINTERVAL(_x)		((_x) << 20)
-
-#define VIDINTCON0_INT_SYSMAINCON		(1 << 19)
-#define VIDINTCON0_INT_SYSSUBCON		(1 << 18)
-#define VIDINTCON0_INT_I80IFDONE		(1 << 17)
-
-#define VIDINTCON0_FRAMESEL0_MASK		(0x3 << 15)
-#define VIDINTCON0_FRAMESEL0_SHIFT		(15)
-#define VIDINTCON0_FRAMESEL0_BACKPORCH		(0x0 << 15)
-#define VIDINTCON0_FRAMESEL0_VSYNC		(0x1 << 15)
-#define VIDINTCON0_FRAMESEL0_ACTIVE		(0x2 << 15)
-#define VIDINTCON0_FRAMESEL0_FRONTPORCH		(0x3 << 15)
-
-#define VIDINTCON0_FRAMESEL1			(1 << 13)
-#define VIDINTCON0_FRAMESEL1_MASK		(0x3 << 13)
-#define VIDINTCON0_FRAMESEL1_NONE		(0x0 << 13)
-#define VIDINTCON0_FRAMESEL1_BACKPORCH		(0x1 << 13)
-#define VIDINTCON0_FRAMESEL1_VSYNC		(0x2 << 13)
-#define VIDINTCON0_FRAMESEL1_FRONTPORCH		(0x3 << 13)
-
-#define VIDINTCON0_INT_FRAME			(1 << 12)
-#define VIDINTCON0_FIFIOSEL_MASK		(0x7f << 5)
-#define VIDINTCON0_FIFIOSEL_SHIFT		(5)
-#define VIDINTCON0_FIFIOSEL_WINDOW0		(0x1 << 5)
-#define VIDINTCON0_FIFIOSEL_WINDOW1		(0x2 << 5)
-
-#define VIDINTCON0_FIFOLEVEL_MASK		(0x7 << 2)
-#define VIDINTCON0_FIFOLEVEL_SHIFT		(2)
-#define VIDINTCON0_FIFOLEVEL_TO25PC		(0x0 << 2)
-#define VIDINTCON0_FIFOLEVEL_TO50PC		(0x1 << 2)
-#define VIDINTCON0_FIFOLEVEL_TO75PC		(0x2 << 2)
-#define VIDINTCON0_FIFOLEVEL_EMPTY		(0x3 << 2)
-#define VIDINTCON0_FIFOLEVEL_FULL		(0x4 << 2)
-
-#define VIDINTCON0_INT_FIFO_MASK		(0x3 << 0)
-#define VIDINTCON0_INT_FIFO_SHIFT		(0)
-#define VIDINTCON0_INT_ENABLE			(1 << 0)
-
-#define VIDINTCON1				(0x134)
-#define VIDINTCON1_INT_I180			(1 << 2)
-#define VIDINTCON1_INT_FRAME			(1 << 1)
-#define VIDINTCON1_INT_FIFO			(1 << 0)
-
-/* Window colour-key control registers */
-#define WKEYCON					(0x140)	/* 6410,V210 */
-
-#define WKEYCON0				(0x00)
-#define WKEYCON1				(0x04)
-
-#define WxKEYCON0_KEYBL_EN			(1 << 26)
-#define WxKEYCON0_KEYEN_F			(1 << 25)
-#define WxKEYCON0_DIRCON			(1 << 24)
-#define WxKEYCON0_COMPKEY_MASK			(0xffffff << 0)
-#define WxKEYCON0_COMPKEY_SHIFT			(0)
-#define WxKEYCON0_COMPKEY_LIMIT			(0xffffff)
-#define WxKEYCON0_COMPKEY(_x)			((_x) << 0)
-#define WxKEYCON1_COLVAL_MASK			(0xffffff << 0)
-#define WxKEYCON1_COLVAL_SHIFT			(0)
-#define WxKEYCON1_COLVAL_LIMIT			(0xffffff)
-#define WxKEYCON1_COLVAL(_x)			((_x) << 0)
-
-
-/* Window blanking (MAP) */
-
-#define WINxMAP_MAP				(1 << 24)
-#define WINxMAP_MAP_COLOUR_MASK			(0xffffff << 0)
-#define WINxMAP_MAP_COLOUR_SHIFT		(0)
-#define WINxMAP_MAP_COLOUR_LIMIT		(0xffffff)
-#define WINxMAP_MAP_COLOUR(_x)			((_x) << 0)
-
-#define WPALCON_PAL_UPDATE			(1 << 9)
-#define WPALCON_W1PAL_MASK			(0x7 << 3)
-#define WPALCON_W1PAL_SHIFT			(3)
-#define WPALCON_W1PAL_25BPP_A888		(0x0 << 3)
-#define WPALCON_W1PAL_24BPP			(0x1 << 3)
-#define WPALCON_W1PAL_19BPP_A666		(0x2 << 3)
-#define WPALCON_W1PAL_18BPP_A665		(0x3 << 3)
-#define WPALCON_W1PAL_18BPP			(0x4 << 3)
-#define WPALCON_W1PAL_16BPP_A555		(0x5 << 3)
-#define WPALCON_W1PAL_16BPP_565			(0x6 << 3)
-
-#define WPALCON_W0PAL_MASK			(0x7 << 0)
-#define WPALCON_W0PAL_SHIFT			(0)
-#define WPALCON_W0PAL_25BPP_A888		(0x0 << 0)
-#define WPALCON_W0PAL_24BPP			(0x1 << 0)
-#define WPALCON_W0PAL_19BPP_A666		(0x2 << 0)
-#define WPALCON_W0PAL_18BPP_A665		(0x3 << 0)
-#define WPALCON_W0PAL_18BPP			(0x4 << 0)
-#define WPALCON_W0PAL_16BPP_A555		(0x5 << 0)
-#define WPALCON_W0PAL_16BPP_565			(0x6 << 0)
-
-/* Blending equation control */
-#define BLENDCON				(0x260)
-#define BLENDCON_NEW_MASK			(1 << 0)
-#define BLENDCON_NEW_8BIT_ALPHA_VALUE		(1 << 0)
-#define BLENDCON_NEW_4BIT_ALPHA_VALUE		(0 << 0)
-
diff --git a/arch/arm/plat-samsung/setup-mipiphy.c b/arch/arm/plat-samsung/setup-mipiphy.c
index 683c466c0e6..14745932760 100644
--- a/arch/arm/plat-samsung/setup-mipiphy.c
+++ b/arch/arm/plat-samsung/setup-mipiphy.c
@@ -14,24 +14,18 @@
 #include <linux/spinlock.h>
 #include <mach/regs-clock.h>
 
-static int __s5p_mipi_phy_control(struct platform_device *pdev,
-				  bool on, u32 reset)
+static int __s5p_mipi_phy_control(int id, bool on, u32 reset)
 {
 	static DEFINE_SPINLOCK(lock);
 	void __iomem *addr;
 	unsigned long flags;
-	int pid;
 	u32 cfg;
 
-	if (!pdev)
+	id = max(0, id);
+	if (id > 1)
 		return -EINVAL;
 
-	pid = (pdev->id == -1) ? 0 : pdev->id;
-
-	if (pid != 0 && pid != 1)
-		return -EINVAL;
-
-	addr = S5P_MIPI_DPHY_CONTROL(pid);
+	addr = S5P_MIPI_DPHY_CONTROL(id);
 
 	spin_lock_irqsave(&lock, flags);
 
@@ -52,12 +46,12 @@ static int __s5p_mipi_phy_control(struct platform_device *pdev,
 	return 0;
 }
 
-int s5p_csis_phy_enable(struct platform_device *pdev, bool on)
+int s5p_csis_phy_enable(int id, bool on)
 {
-	return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_SRESETN);
+	return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
 }
 
 int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
 {
-	return __s5p_mipi_phy_control(pdev, on, S5P_MIPI_DPHY_MRESETN);
+	return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
 }
diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig
index 4404f82d597..f8db7b2deb3 100644
--- a/arch/arm/plat-spear/Kconfig
+++ b/arch/arm/plat-spear/Kconfig
@@ -12,10 +12,10 @@ config ARCH_SPEAR13XX
 	bool "ST SPEAr13xx with Device Tree"
 	select ARM_GIC
 	select CPU_V7
-	select USE_OF
 	select HAVE_SMP
 	select MIGHT_HAVE_CACHE_L2X0
 	select PINCTRL
+	select USE_OF
 	help
 	  Supports for ARM's SPEAR13XX family
 
@@ -23,8 +23,8 @@ config ARCH_SPEAR3XX
 	bool "ST SPEAr3xx with Device Tree"
 	select ARM_VIC
 	select CPU_ARM926T
-	select USE_OF
 	select PINCTRL
+	select USE_OF
 	help
 	  Supports for ARM's SPEAR3XX family
 
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 767ba568545..7ff68c94607 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -10,6 +10,8 @@ config ARM64
 	select GENERIC_TIME_VSYSCALL
 	select HARDIRQS_SW_RESEND
 	select HAVE_ARCH_TRACEHOOK
+	select HAVE_DEBUG_BUGVERBOSE
+	select HAVE_DEBUG_KMEMLEAK
 	select HAVE_DMA_API_DEBUG
 	select HAVE_DMA_ATTRS
 	select HAVE_GENERIC_DMA_COHERENT
@@ -26,6 +28,7 @@ config ARM64
 	select PERF_USE_VMALLOC
 	select RTC_LIB
 	select SPARSE_IRQ
+	select SYSCTL_EXCEPTION_TRACE
 	help
 	  ARM 64-bit (AArch64) Linux support.
 
@@ -193,6 +196,7 @@ config COMPAT
 	bool "Kernel support for 32-bit EL0"
 	depends on !ARM64_64K_PAGES
 	select COMPAT_BINFMT_ELF
+	select HAVE_UID16
 	help
 	  This option enables support for a 32-bit EL0 running under a 64-bit
 	  kernel at EL1. AArch32-specific components such as system calls,
diff --git a/arch/arm64/include/asm/Kbuild b/arch/arm64/include/asm/Kbuild
index 35924a542d4..fe77e51a784 100644
--- a/arch/arm64/include/asm/Kbuild
+++ b/arch/arm64/include/asm/Kbuild
@@ -1,6 +1,4 @@
-include include/asm-generic/Kbuild.asm
 
-header-y += hwcap.h
 
 generic-y += bug.h
 generic-y += bugs.h
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index db05f976611..6d4482fa35b 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -16,11 +16,7 @@
 #ifndef __ASM_HWCAP_H
 #define __ASM_HWCAP_H
 
-/*
- * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
- */
-#define HWCAP_FP		(1 << 0)
-#define HWCAP_ASIMD		(1 << 1)
+#include <uapi/asm/hwcap.h>
 
 #define COMPAT_HWCAP_HALF	(1 << 1)
 #define COMPAT_HWCAP_THUMB	(1 << 2)
@@ -35,7 +31,6 @@
 #define COMPAT_HWCAP_IDIVT	(1 << 18)
 #define COMPAT_HWCAP_IDIV	(COMPAT_HWCAP_IDIVA|COMPAT_HWCAP_IDIVT)
 
-#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 /*
  * This yields a mask that user programs can use to figure out what
@@ -51,5 +46,3 @@
 extern unsigned int elf_hwcap;
 #endif
 #endif
-
-#endif
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index 0fa5d6c9ef7..b04d3404f0d 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -19,9 +19,7 @@
 #ifndef __ASM_PTRACE_H
 #define __ASM_PTRACE_H
 
-#include <linux/types.h>
-
-#include <asm/hwcap.h>
+#include <uapi/asm/ptrace.h>
 
 /* AArch32-specific ptrace requests */
 #define COMPAT_PTRACE_GETREGS		12
@@ -32,80 +30,18 @@
 #define COMPAT_PTRACE_SETVFPREGS	28
 #define COMPAT_PTRACE_GETHBPREGS	29
 #define COMPAT_PTRACE_SETHBPREGS	30
-
-/*
- * PSR bits
- */
-#define PSR_MODE_EL0t	0x00000000
-#define PSR_MODE_EL1t	0x00000004
-#define PSR_MODE_EL1h	0x00000005
-#define PSR_MODE_EL2t	0x00000008
-#define PSR_MODE_EL2h	0x00000009
-#define PSR_MODE_EL3t	0x0000000c
-#define PSR_MODE_EL3h	0x0000000d
-#define PSR_MODE_MASK	0x0000000f
-
-/* AArch32 CPSR bits */
-#define PSR_MODE32_BIT		0x00000010
 #define COMPAT_PSR_MODE_USR	0x00000010
 #define COMPAT_PSR_T_BIT	0x00000020
 #define COMPAT_PSR_IT_MASK	0x0600fc00	/* If-Then execution state mask */
-
-/* AArch64 SPSR bits */
-#define PSR_F_BIT	0x00000040
-#define PSR_I_BIT	0x00000080
-#define PSR_A_BIT	0x00000100
-#define PSR_D_BIT	0x00000200
-#define PSR_Q_BIT	0x08000000
-#define PSR_V_BIT	0x10000000
-#define PSR_C_BIT	0x20000000
-#define PSR_Z_BIT	0x40000000
-#define PSR_N_BIT	0x80000000
-
-/*
- * Groups of PSR bits
- */
-#define PSR_f		0xff000000	/* Flags		*/
-#define PSR_s		0x00ff0000	/* Status		*/
-#define PSR_x		0x0000ff00	/* Extension		*/
-#define PSR_c		0x000000ff	/* Control		*/
-
 /*
  * These are 'magic' values for PTRACE_PEEKUSR that return info about where a
  * process is located in memory.
  */
-#define PT_TEXT_ADDR		0x10000
-#define PT_DATA_ADDR		0x10004
-#define PT_TEXT_END_ADDR	0x10008
-
+#define COMPAT_PT_TEXT_ADDR		0x10000
+#define COMPAT_PT_DATA_ADDR		0x10004
+#define COMPAT_PT_TEXT_END_ADDR		0x10008
 #ifndef __ASSEMBLY__
 
-/*
- * User structures for general purpose, floating point and debug registers.
- */
-struct user_pt_regs {
-	__u64		regs[31];
-	__u64		sp;
-	__u64		pc;
-	__u64		pstate;
-};
-
-struct user_fpsimd_state {
-	__uint128_t	vregs[32];
-	__u32		fpsr;
-	__u32		fpcr;
-};
-
-struct user_hwdebug_state {
-	__u32		dbg_info;
-	struct {
-		__u64	addr;
-		__u32	ctrl;
-	}		dbg_regs[16];
-};
-
-#ifdef __KERNEL__
-
 /* sizeof(struct user) for AArch32 */
 #define COMPAT_USER_SZ	296
 /* AArch32 uses x13 as the stack pointer... */
@@ -200,8 +136,5 @@ extern unsigned long profile_pc(struct pt_regs *regs);
 
 extern int aarch32_break_trap(struct pt_regs *regs);
 
-#endif /* __KERNEL__ */
-
 #endif /* __ASSEMBLY__ */
-
 #endif
diff --git a/arch/arm64/include/asm/sigcontext.h b/arch/arm64/include/asm/sigcontext.h
index 573cec77881..dca1094acc7 100644
--- a/arch/arm64/include/asm/sigcontext.h
+++ b/arch/arm64/include/asm/sigcontext.h
@@ -16,45 +16,9 @@
 #ifndef __ASM_SIGCONTEXT_H
 #define __ASM_SIGCONTEXT_H
 
-#include <linux/types.h>
+#include <uapi/asm/sigcontext.h>
 
 /*
- * Signal context structure - contains all info to do with the state
- * before the signal handler was invoked.
- */
-struct sigcontext {
-	__u64 fault_address;
-	/* AArch64 registers */
-	__u64 regs[31];
-	__u64 sp;
-	__u64 pc;
-	__u64 pstate;
-	/* 4K reserved for FP/SIMD state and future expansion */
-	__u8 __reserved[4096] __attribute__((__aligned__(16)));
-};
-
-/*
- * Header to be used at the beginning of structures extending the user
- * context. Such structures must be placed after the rt_sigframe on the stack
- * and be 16-byte aligned. The last structure must be a dummy one with the
- * magic and size set to 0.
- */
-struct _aarch64_ctx {
-	__u32 magic;
-	__u32 size;
-};
-
-#define FPSIMD_MAGIC	0x46508001
-
-struct fpsimd_context {
-	struct _aarch64_ctx head;
-	__u32 fpsr;
-	__u32 fpcr;
-	__uint128_t vregs[32];
-};
-
-#ifdef __KERNEL__
-/*
  * Auxiliary context saved in the sigcontext.__reserved array. Not exported to
  * user space as it will change with the addition of new context. User space
  * should check the magic/size information.
@@ -65,5 +29,3 @@ struct aux_context {
 	struct _aarch64_ctx end;
 };
 #endif
-
-#endif
diff --git a/arch/arm64/include/asm/stat.h b/arch/arm64/include/asm/stat.h
index a9f580c28f7..15e35598ac4 100644
--- a/arch/arm64/include/asm/stat.h
+++ b/arch/arm64/include/asm/stat.h
@@ -16,9 +16,8 @@
 #ifndef __ASM_STAT_H
 #define __ASM_STAT_H
 
-#include <asm-generic/stat.h>
+#include <uapi/asm/stat.h>
 
-#ifdef __KERNEL__
 #ifdef CONFIG_COMPAT
 
 #include <asm/compat.h>
@@ -60,5 +59,3 @@ struct stat64 {
 
 #endif
 #endif
-
-#endif
diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h
index 8f03dee066e..63f853f8b71 100644
--- a/arch/arm64/include/asm/unistd.h
+++ b/arch/arm64/include/asm/unistd.h
@@ -13,13 +13,17 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
-
-#ifndef __SYSCALL_COMPAT
-#include <asm-generic/unistd.h>
-#endif
-
-#ifdef __KERNEL__
 #ifdef CONFIG_COMPAT
-#include <asm/unistd32.h>
-#endif
+#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION
+#define __ARCH_WANT_COMPAT_STAT64
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_NICE
+#define __ARCH_WANT_SYS_SIGPENDING
+#define __ARCH_WANT_SYS_SIGPROCMASK
+#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_COMPAT_SYS_SENDFILE
 #endif
+#include <uapi/asm/unistd.h>
diff --git a/arch/arm64/include/asm/unistd32.h b/arch/arm64/include/asm/unistd32.h
index 3ba1f1a9062..6d909faebf2 100644
--- a/arch/arm64/include/asm/unistd32.h
+++ b/arch/arm64/include/asm/unistd32.h
@@ -1,5 +1,5 @@
 /*
- * Based on arch/arm/include/asm/unistd.h
+ * AArch32 (compat) system call definitions.
  *
  * Copyright (C) 2001-2005 Russell King
  * Copyright (C) 2012 ARM Ltd.
@@ -21,715 +21,390 @@
 #define __SYSCALL(x, y)
 #endif
 
+__SYSCALL(0,   sys_restart_syscall)
+__SYSCALL(1,   sys_exit)
+__SYSCALL(2,   compat_sys_fork_wrapper)
+__SYSCALL(3,   sys_read)
+__SYSCALL(4,   sys_write)
+__SYSCALL(5,   compat_sys_open)
+__SYSCALL(6,   sys_close)
+__SYSCALL(7,   sys_ni_syscall)			/* 7 was sys_waitpid */
+__SYSCALL(8,   sys_creat)
+__SYSCALL(9,   sys_link)
+__SYSCALL(10,  sys_unlink)
+__SYSCALL(11,  compat_sys_execve_wrapper)
+__SYSCALL(12,  sys_chdir)
+__SYSCALL(13,  sys_ni_syscall)			/* 13 was sys_time */
+__SYSCALL(14,  sys_mknod)
+__SYSCALL(15,  sys_chmod)
+__SYSCALL(16,  sys_lchown16)
+__SYSCALL(17,  sys_ni_syscall)			/* 17 was sys_break */
+__SYSCALL(18,  sys_ni_syscall)			/* 18 was sys_stat */
+__SYSCALL(19,  compat_sys_lseek_wrapper)
+__SYSCALL(20,  sys_getpid)
+__SYSCALL(21,  compat_sys_mount)
+__SYSCALL(22,  sys_ni_syscall)			/* 22 was sys_umount */
+__SYSCALL(23,  sys_setuid16)
+__SYSCALL(24,  sys_getuid16)
+__SYSCALL(25,  sys_ni_syscall)			/* 25 was sys_stime */
+__SYSCALL(26,  compat_sys_ptrace)
+__SYSCALL(27,  sys_ni_syscall)			/* 27 was sys_alarm */
+__SYSCALL(28,  sys_ni_syscall)			/* 28 was sys_fstat */
+__SYSCALL(29,  sys_pause)
+__SYSCALL(30,  sys_ni_syscall)			/* 30 was sys_utime */
+__SYSCALL(31,  sys_ni_syscall)			/* 31 was sys_stty */
+__SYSCALL(32,  sys_ni_syscall)			/* 32 was sys_gtty */
+__SYSCALL(33,  sys_access)
+__SYSCALL(34,  sys_nice)
+__SYSCALL(35,  sys_ni_syscall)			/* 35 was sys_ftime */
+__SYSCALL(36,  sys_sync)
+__SYSCALL(37,  sys_kill)
+__SYSCALL(38,  sys_rename)
+__SYSCALL(39,  sys_mkdir)
+__SYSCALL(40,  sys_rmdir)
+__SYSCALL(41,  sys_dup)
+__SYSCALL(42,  sys_pipe)
+__SYSCALL(43,  compat_sys_times)
+__SYSCALL(44,  sys_ni_syscall)			/* 44 was sys_prof */
+__SYSCALL(45,  sys_brk)
+__SYSCALL(46,  sys_setgid16)
+__SYSCALL(47,  sys_getgid16)
+__SYSCALL(48,  sys_ni_syscall)			/* 48 was sys_signal */
+__SYSCALL(49,  sys_geteuid16)
+__SYSCALL(50,  sys_getegid16)
+__SYSCALL(51,  sys_acct)
+__SYSCALL(52,  sys_umount)
+__SYSCALL(53,  sys_ni_syscall)			/* 53 was sys_lock */
+__SYSCALL(54,  compat_sys_ioctl)
+__SYSCALL(55,  compat_sys_fcntl)
+__SYSCALL(56,  sys_ni_syscall)			/* 56 was sys_mpx */
+__SYSCALL(57,  sys_setpgid)
+__SYSCALL(58,  sys_ni_syscall)			/* 58 was sys_ulimit */
+__SYSCALL(59,  sys_ni_syscall)			/* 59 was sys_olduname */
+__SYSCALL(60,  sys_umask)
+__SYSCALL(61,  sys_chroot)
+__SYSCALL(62,  compat_sys_ustat)
+__SYSCALL(63,  sys_dup2)
+__SYSCALL(64,  sys_getppid)
+__SYSCALL(65,  sys_getpgrp)
+__SYSCALL(66,  sys_setsid)
+__SYSCALL(67,  compat_sys_sigaction)
+__SYSCALL(68,  sys_ni_syscall)			/* 68 was sys_sgetmask */
+__SYSCALL(69,  sys_ni_syscall)			/* 69 was sys_ssetmask */
+__SYSCALL(70,  sys_setreuid16)
+__SYSCALL(71,  sys_setregid16)
+__SYSCALL(72,  compat_sys_sigsuspend)
+__SYSCALL(73,  compat_sys_sigpending)
+__SYSCALL(74,  sys_sethostname)
+__SYSCALL(75,  compat_sys_setrlimit)
+__SYSCALL(76,  sys_ni_syscall)			/* 76 was compat_sys_getrlimit */
+__SYSCALL(77,  compat_sys_getrusage)
+__SYSCALL(78,  compat_sys_gettimeofday)
+__SYSCALL(79,  compat_sys_settimeofday)
+__SYSCALL(80,  sys_getgroups16)
+__SYSCALL(81,  sys_setgroups16)
+__SYSCALL(82,  sys_ni_syscall)			/* 82 was compat_sys_select */
+__SYSCALL(83,  sys_symlink)
+__SYSCALL(84,  sys_ni_syscall)			/* 84 was sys_lstat */
+__SYSCALL(85,  sys_readlink)
+__SYSCALL(86,  sys_uselib)
+__SYSCALL(87,  sys_swapon)
+__SYSCALL(88,  sys_reboot)
+__SYSCALL(89,  sys_ni_syscall)			/* 89 was sys_readdir */
+__SYSCALL(90,  sys_ni_syscall)			/* 90 was sys_mmap */
+__SYSCALL(91,  sys_munmap)
+__SYSCALL(92,  sys_truncate)
+__SYSCALL(93,  sys_ftruncate)
+__SYSCALL(94,  sys_fchmod)
+__SYSCALL(95,  sys_fchown16)
+__SYSCALL(96,  sys_getpriority)
+__SYSCALL(97,  sys_setpriority)
+__SYSCALL(98,  sys_ni_syscall)			/* 98 was sys_profil */
+__SYSCALL(99,  compat_sys_statfs)
+__SYSCALL(100, compat_sys_fstatfs)
+__SYSCALL(101, sys_ni_syscall)			/* 101 was sys_ioperm */
+__SYSCALL(102, sys_ni_syscall)			/* 102 was sys_socketcall */
+__SYSCALL(103, sys_syslog)
+__SYSCALL(104, compat_sys_setitimer)
+__SYSCALL(105, compat_sys_getitimer)
+__SYSCALL(106, compat_sys_newstat)
+__SYSCALL(107, compat_sys_newlstat)
+__SYSCALL(108, compat_sys_newfstat)
+__SYSCALL(109, sys_ni_syscall)			/* 109 was sys_uname */
+__SYSCALL(110, sys_ni_syscall)			/* 110 was sys_iopl */
+__SYSCALL(111, sys_vhangup)
+__SYSCALL(112, sys_ni_syscall)			/* 112 was sys_idle */
+__SYSCALL(113, sys_ni_syscall)			/* 113 was sys_syscall */
+__SYSCALL(114, compat_sys_wait4)
+__SYSCALL(115, sys_swapoff)
+__SYSCALL(116, compat_sys_sysinfo)
+__SYSCALL(117, sys_ni_syscall)			/* 117 was sys_ipc */
+__SYSCALL(118, sys_fsync)
+__SYSCALL(119, compat_sys_sigreturn_wrapper)
+__SYSCALL(120, compat_sys_clone_wrapper)
+__SYSCALL(121, sys_setdomainname)
+__SYSCALL(122, sys_newuname)
+__SYSCALL(123, sys_ni_syscall)			/* 123 was sys_modify_ldt */
+__SYSCALL(124, compat_sys_adjtimex)
+__SYSCALL(125, sys_mprotect)
+__SYSCALL(126, compat_sys_sigprocmask)
+__SYSCALL(127, sys_ni_syscall)			/* 127 was sys_create_module */
+__SYSCALL(128, sys_init_module)
+__SYSCALL(129, sys_delete_module)
+__SYSCALL(130, sys_ni_syscall)			/* 130 was sys_get_kernel_syms */
+__SYSCALL(131, sys_quotactl)
+__SYSCALL(132, sys_getpgid)
+__SYSCALL(133, sys_fchdir)
+__SYSCALL(134, sys_bdflush)
+__SYSCALL(135, sys_sysfs)
+__SYSCALL(136, sys_personality)
+__SYSCALL(137, sys_ni_syscall)			/* 137 was sys_afs_syscall */
+__SYSCALL(138, sys_setfsuid16)
+__SYSCALL(139, sys_setfsgid16)
+__SYSCALL(140, sys_llseek)
+__SYSCALL(141, compat_sys_getdents)
+__SYSCALL(142, compat_sys_select)
+__SYSCALL(143, sys_flock)
+__SYSCALL(144, sys_msync)
+__SYSCALL(145, compat_sys_readv)
+__SYSCALL(146, compat_sys_writev)
+__SYSCALL(147, sys_getsid)
+__SYSCALL(148, sys_fdatasync)
+__SYSCALL(149, compat_sys_sysctl)
+__SYSCALL(150, sys_mlock)
+__SYSCALL(151, sys_munlock)
+__SYSCALL(152, sys_mlockall)
+__SYSCALL(153, sys_munlockall)
+__SYSCALL(154, sys_sched_setparam)
+__SYSCALL(155, sys_sched_getparam)
+__SYSCALL(156, sys_sched_setscheduler)
+__SYSCALL(157, sys_sched_getscheduler)
+__SYSCALL(158, sys_sched_yield)
+__SYSCALL(159, sys_sched_get_priority_max)
+__SYSCALL(160, sys_sched_get_priority_min)
+__SYSCALL(161, compat_sys_sched_rr_get_interval)
+__SYSCALL(162, compat_sys_nanosleep)
+__SYSCALL(163, sys_mremap)
+__SYSCALL(164, sys_setresuid16)
+__SYSCALL(165, sys_getresuid16)
+__SYSCALL(166, sys_ni_syscall)			/* 166 was sys_vm86 */
+__SYSCALL(167, sys_ni_syscall)			/* 167 was sys_query_module */
+__SYSCALL(168, sys_poll)
+__SYSCALL(169, sys_ni_syscall)
+__SYSCALL(170, sys_setresgid16)
+__SYSCALL(171, sys_getresgid16)
+__SYSCALL(172, sys_prctl)
+__SYSCALL(173, compat_sys_rt_sigreturn_wrapper)
+__SYSCALL(174, compat_sys_rt_sigaction)
+__SYSCALL(175, compat_sys_rt_sigprocmask)
+__SYSCALL(176, compat_sys_rt_sigpending)
+__SYSCALL(177, compat_sys_rt_sigtimedwait)
+__SYSCALL(178, compat_sys_rt_sigqueueinfo)
+__SYSCALL(179, compat_sys_rt_sigsuspend)
+__SYSCALL(180, compat_sys_pread64_wrapper)
+__SYSCALL(181, compat_sys_pwrite64_wrapper)
+__SYSCALL(182, sys_chown16)
+__SYSCALL(183, sys_getcwd)
+__SYSCALL(184, sys_capget)
+__SYSCALL(185, sys_capset)
+__SYSCALL(186, compat_sys_sigaltstack_wrapper)
+__SYSCALL(187, compat_sys_sendfile)
+__SYSCALL(188, sys_ni_syscall)			/* 188 reserved */
+__SYSCALL(189, sys_ni_syscall)			/* 189 reserved */
+__SYSCALL(190, compat_sys_vfork_wrapper)
+__SYSCALL(191, compat_sys_getrlimit)		/* SuS compliant getrlimit */
+__SYSCALL(192, sys_mmap_pgoff)
+__SYSCALL(193, compat_sys_truncate64_wrapper)
+__SYSCALL(194, compat_sys_ftruncate64_wrapper)
+__SYSCALL(195, sys_stat64)
+__SYSCALL(196, sys_lstat64)
+__SYSCALL(197, sys_fstat64)
+__SYSCALL(198, sys_lchown)
+__SYSCALL(199, sys_getuid)
+__SYSCALL(200, sys_getgid)
+__SYSCALL(201, sys_geteuid)
+__SYSCALL(202, sys_getegid)
+__SYSCALL(203, sys_setreuid)
+__SYSCALL(204, sys_setregid)
+__SYSCALL(205, sys_getgroups)
+__SYSCALL(206, sys_setgroups)
+__SYSCALL(207, sys_fchown)
+__SYSCALL(208, sys_setresuid)
+__SYSCALL(209, sys_getresuid)
+__SYSCALL(210, sys_setresgid)
+__SYSCALL(211, sys_getresgid)
+__SYSCALL(212, sys_chown)
+__SYSCALL(213, sys_setuid)
+__SYSCALL(214, sys_setgid)
+__SYSCALL(215, sys_setfsuid)
+__SYSCALL(216, sys_setfsgid)
+__SYSCALL(217, compat_sys_getdents64)
+__SYSCALL(218, sys_pivot_root)
+__SYSCALL(219, sys_mincore)
+__SYSCALL(220, sys_madvise)
+__SYSCALL(221, compat_sys_fcntl64)
+__SYSCALL(222, sys_ni_syscall)			/* 222 for tux */
+__SYSCALL(223, sys_ni_syscall)			/* 223 is unused */
+__SYSCALL(224, sys_gettid)
+__SYSCALL(225, compat_sys_readahead_wrapper)
+__SYSCALL(226, sys_setxattr)
+__SYSCALL(227, sys_lsetxattr)
+__SYSCALL(228, sys_fsetxattr)
+__SYSCALL(229, sys_getxattr)
+__SYSCALL(230, sys_lgetxattr)
+__SYSCALL(231, sys_fgetxattr)
+__SYSCALL(232, sys_listxattr)
+__SYSCALL(233, sys_llistxattr)
+__SYSCALL(234, sys_flistxattr)
+__SYSCALL(235, sys_removexattr)
+__SYSCALL(236, sys_lremovexattr)
+__SYSCALL(237, sys_fremovexattr)
+__SYSCALL(238, sys_tkill)
+__SYSCALL(239, sys_sendfile64)
+__SYSCALL(240, compat_sys_futex)
+__SYSCALL(241, compat_sys_sched_setaffinity)
+__SYSCALL(242, compat_sys_sched_getaffinity)
+__SYSCALL(243, compat_sys_io_setup)
+__SYSCALL(244, sys_io_destroy)
+__SYSCALL(245, compat_sys_io_getevents)
+__SYSCALL(246, compat_sys_io_submit)
+__SYSCALL(247, sys_io_cancel)
+__SYSCALL(248, sys_exit_group)
+__SYSCALL(249, compat_sys_lookup_dcookie)
+__SYSCALL(250, sys_epoll_create)
+__SYSCALL(251, sys_epoll_ctl)
+__SYSCALL(252, sys_epoll_wait)
+__SYSCALL(253, sys_remap_file_pages)
+__SYSCALL(254, sys_ni_syscall)			/* 254 for set_thread_area */
+__SYSCALL(255, sys_ni_syscall)			/* 255 for get_thread_area */
+__SYSCALL(256, sys_set_tid_address)
+__SYSCALL(257, compat_sys_timer_create)
+__SYSCALL(258, compat_sys_timer_settime)
+__SYSCALL(259, compat_sys_timer_gettime)
+__SYSCALL(260, sys_timer_getoverrun)
+__SYSCALL(261, sys_timer_delete)
+__SYSCALL(262, compat_sys_clock_settime)
+__SYSCALL(263, compat_sys_clock_gettime)
+__SYSCALL(264, compat_sys_clock_getres)
+__SYSCALL(265, compat_sys_clock_nanosleep)
+__SYSCALL(266, compat_sys_statfs64_wrapper)
+__SYSCALL(267, compat_sys_fstatfs64_wrapper)
+__SYSCALL(268, sys_tgkill)
+__SYSCALL(269, compat_sys_utimes)
+__SYSCALL(270, compat_sys_fadvise64_64_wrapper)
+__SYSCALL(271, sys_pciconfig_iobase)
+__SYSCALL(272, sys_pciconfig_read)
+__SYSCALL(273, sys_pciconfig_write)
+__SYSCALL(274, compat_sys_mq_open)
+__SYSCALL(275, sys_mq_unlink)
+__SYSCALL(276, compat_sys_mq_timedsend)
+__SYSCALL(277, compat_sys_mq_timedreceive)
+__SYSCALL(278, compat_sys_mq_notify)
+__SYSCALL(279, compat_sys_mq_getsetattr)
+__SYSCALL(280, compat_sys_waitid)
+__SYSCALL(281, sys_socket)
+__SYSCALL(282, sys_bind)
+__SYSCALL(283, sys_connect)
+__SYSCALL(284, sys_listen)
+__SYSCALL(285, sys_accept)
+__SYSCALL(286, sys_getsockname)
+__SYSCALL(287, sys_getpeername)
+__SYSCALL(288, sys_socketpair)
+__SYSCALL(289, sys_send)
+__SYSCALL(290, sys_sendto)
+__SYSCALL(291, compat_sys_recv)
+__SYSCALL(292, compat_sys_recvfrom)
+__SYSCALL(293, sys_shutdown)
+__SYSCALL(294, compat_sys_setsockopt)
+__SYSCALL(295, compat_sys_getsockopt)
+__SYSCALL(296, compat_sys_sendmsg)
+__SYSCALL(297, compat_sys_recvmsg)
+__SYSCALL(298, sys_semop)
+__SYSCALL(299, sys_semget)
+__SYSCALL(300, compat_sys_semctl)
+__SYSCALL(301, compat_sys_msgsnd)
+__SYSCALL(302, compat_sys_msgrcv)
+__SYSCALL(303, sys_msgget)
+__SYSCALL(304, compat_sys_msgctl)
+__SYSCALL(305, compat_sys_shmat)
+__SYSCALL(306, sys_shmdt)
+__SYSCALL(307, sys_shmget)
+__SYSCALL(308, compat_sys_shmctl)
+__SYSCALL(309, sys_add_key)
+__SYSCALL(310, sys_request_key)
+__SYSCALL(311, compat_sys_keyctl)
+__SYSCALL(312, compat_sys_semtimedop)
+__SYSCALL(313, sys_ni_syscall)
+__SYSCALL(314, sys_ioprio_set)
+__SYSCALL(315, sys_ioprio_get)
+__SYSCALL(316, sys_inotify_init)
+__SYSCALL(317, sys_inotify_add_watch)
+__SYSCALL(318, sys_inotify_rm_watch)
+__SYSCALL(319, compat_sys_mbind)
+__SYSCALL(320, compat_sys_get_mempolicy)
+__SYSCALL(321, compat_sys_set_mempolicy)
+__SYSCALL(322, compat_sys_openat)
+__SYSCALL(323, sys_mkdirat)
+__SYSCALL(324, sys_mknodat)
+__SYSCALL(325, sys_fchownat)
+__SYSCALL(326, compat_sys_futimesat)
+__SYSCALL(327, sys_fstatat64)
+__SYSCALL(328, sys_unlinkat)
+__SYSCALL(329, sys_renameat)
+__SYSCALL(330, sys_linkat)
+__SYSCALL(331, sys_symlinkat)
+__SYSCALL(332, sys_readlinkat)
+__SYSCALL(333, sys_fchmodat)
+__SYSCALL(334, sys_faccessat)
+__SYSCALL(335, compat_sys_pselect6)
+__SYSCALL(336, compat_sys_ppoll)
+__SYSCALL(337, sys_unshare)
+__SYSCALL(338, compat_sys_set_robust_list)
+__SYSCALL(339, compat_sys_get_robust_list)
+__SYSCALL(340, sys_splice)
+__SYSCALL(341, compat_sys_sync_file_range2_wrapper)
+__SYSCALL(342, sys_tee)
+__SYSCALL(343, compat_sys_vmsplice)
+__SYSCALL(344, compat_sys_move_pages)
+__SYSCALL(345, sys_getcpu)
+__SYSCALL(346, compat_sys_epoll_pwait)
+__SYSCALL(347, compat_sys_kexec_load)
+__SYSCALL(348, compat_sys_utimensat)
+__SYSCALL(349, compat_sys_signalfd)
+__SYSCALL(350, sys_timerfd_create)
+__SYSCALL(351, sys_eventfd)
+__SYSCALL(352, compat_sys_fallocate_wrapper)
+__SYSCALL(353, compat_sys_timerfd_settime)
+__SYSCALL(354, compat_sys_timerfd_gettime)
+__SYSCALL(355, compat_sys_signalfd4)
+__SYSCALL(356, sys_eventfd2)
+__SYSCALL(357, sys_epoll_create1)
+__SYSCALL(358, sys_dup3)
+__SYSCALL(359, sys_pipe2)
+__SYSCALL(360, sys_inotify_init1)
+__SYSCALL(361, compat_sys_preadv)
+__SYSCALL(362, compat_sys_pwritev)
+__SYSCALL(363, compat_sys_rt_tgsigqueueinfo)
+__SYSCALL(364, sys_perf_event_open)
+__SYSCALL(365, compat_sys_recvmmsg)
+__SYSCALL(366, sys_accept4)
+__SYSCALL(367, sys_fanotify_init)
+__SYSCALL(368, compat_sys_fanotify_mark_wrapper)
+__SYSCALL(369, sys_prlimit64)
+__SYSCALL(370, sys_name_to_handle_at)
+__SYSCALL(371, sys_open_by_handle_at)
+__SYSCALL(372, sys_clock_adjtime)
+__SYSCALL(373, sys_syncfs)
+
+#define __NR_compat_syscalls		374
+
 /*
- * This file contains the system call numbers.
+ * Compat syscall numbers used by the AArch64 kernel.
  */
+#define __NR_compat_restart_syscall	0
+#define __NR_compat_sigreturn		119
+#define __NR_compat_rt_sigreturn	173
 
-#ifdef __SYSCALL_COMPAT
-
-#define __NR_restart_syscall		0
-__SYSCALL(__NR_restart_syscall, sys_restart_syscall)
-#define __NR_exit			1
-__SYSCALL(__NR_exit, sys_exit)
-#define __NR_fork			2
-__SYSCALL(__NR_fork, sys_fork)
-#define __NR_read			3
-__SYSCALL(__NR_read, sys_read)
-#define __NR_write			4
-__SYSCALL(__NR_write, sys_write)
-#define __NR_open			5
-__SYSCALL(__NR_open, sys_open)
-#define __NR_close			6
-__SYSCALL(__NR_close, sys_close)
-__SYSCALL(7, sys_ni_syscall)		/* 7 was sys_waitpid */
-#define __NR_creat			8
-__SYSCALL(__NR_creat, sys_creat)
-#define __NR_link			9
-__SYSCALL(__NR_link, sys_link)
-#define __NR_unlink			10
-__SYSCALL(__NR_unlink, sys_unlink)
-#define __NR_execve			11
-__SYSCALL(__NR_execve, sys_execve)
-#define __NR_chdir			12
-__SYSCALL(__NR_chdir, sys_chdir)
-__SYSCALL(13, sys_ni_syscall)		/* 13 was sys_time */
-#define __NR_mknod			14
-__SYSCALL(__NR_mknod, sys_mknod)
-#define __NR_chmod			15
-__SYSCALL(__NR_chmod, sys_chmod)
-#define __NR_lchown			16
-__SYSCALL(__NR_lchown, sys_lchown16)
-__SYSCALL(17, sys_ni_syscall)		/* 17 was sys_break */
-__SYSCALL(18, sys_ni_syscall)		/* 18 was sys_stat */
-#define __NR_lseek			19
-__SYSCALL(__NR_lseek, sys_lseek)
-#define __NR_getpid			20
-__SYSCALL(__NR_getpid, sys_getpid)
-#define __NR_mount			21
-__SYSCALL(__NR_mount, sys_mount)
-__SYSCALL(22, sys_ni_syscall)		/* 22 was sys_umount */
-#define __NR_setuid			23
-__SYSCALL(__NR_setuid, sys_setuid16)
-#define __NR_getuid			24
-__SYSCALL(__NR_getuid, sys_getuid16)
-__SYSCALL(25, sys_ni_syscall)		/* 25 was sys_stime */
-#define __NR_ptrace			26
-__SYSCALL(__NR_ptrace, sys_ptrace)
-__SYSCALL(27, sys_ni_syscall)		/* 27 was sys_alarm */
-__SYSCALL(28, sys_ni_syscall)		/* 28 was sys_fstat */
-#define __NR_pause			29
-__SYSCALL(__NR_pause, sys_pause)
-__SYSCALL(30, sys_ni_syscall)		/* 30 was sys_utime */
-__SYSCALL(31, sys_ni_syscall)		/* 31 was sys_stty */
-__SYSCALL(32, sys_ni_syscall)		/* 32 was sys_gtty */
-#define __NR_access			33
-__SYSCALL(__NR_access, sys_access)
-#define __NR_nice			34
-__SYSCALL(__NR_nice, sys_nice)
-__SYSCALL(35, sys_ni_syscall)		/* 35 was sys_ftime */
-#define __NR_sync			36
-__SYSCALL(__NR_sync, sys_sync)
-#define __NR_kill			37
-__SYSCALL(__NR_kill, sys_kill)
-#define __NR_rename			38
-__SYSCALL(__NR_rename, sys_rename)
-#define __NR_mkdir			39
-__SYSCALL(__NR_mkdir, sys_mkdir)
-#define __NR_rmdir			40
-__SYSCALL(__NR_rmdir, sys_rmdir)
-#define __NR_dup			41
-__SYSCALL(__NR_dup, sys_dup)
-#define __NR_pipe			42
-__SYSCALL(__NR_pipe, sys_pipe)
-#define __NR_times			43
-__SYSCALL(__NR_times, sys_times)
-__SYSCALL(44, sys_ni_syscall)		/* 44 was sys_prof */
-#define __NR_brk			45
-__SYSCALL(__NR_brk, sys_brk)
-#define __NR_setgid			46
-__SYSCALL(__NR_setgid, sys_setgid16)
-#define __NR_getgid			47
-__SYSCALL(__NR_getgid, sys_getgid16)
-__SYSCALL(48, sys_ni_syscall)		/* 48 was sys_signal */
-#define __NR_geteuid			49
-__SYSCALL(__NR_geteuid, sys_geteuid16)
-#define __NR_getegid			50
-__SYSCALL(__NR_getegid, sys_getegid16)
-#define __NR_acct			51
-__SYSCALL(__NR_acct, sys_acct)
-#define __NR_umount2			52
-__SYSCALL(__NR_umount2, sys_umount)
-__SYSCALL(53, sys_ni_syscall)		/* 53 was sys_lock */
-#define __NR_ioctl			54
-__SYSCALL(__NR_ioctl, sys_ioctl)
-#define __NR_fcntl			55
-__SYSCALL(__NR_fcntl, sys_fcntl)
-__SYSCALL(56, sys_ni_syscall)		/* 56 was sys_mpx */
-#define __NR_setpgid			57
-__SYSCALL(__NR_setpgid, sys_setpgid)
-__SYSCALL(58, sys_ni_syscall)		/* 58 was sys_ulimit */
-__SYSCALL(59, sys_ni_syscall)		/* 59 was sys_olduname */
-#define __NR_umask			60
-__SYSCALL(__NR_umask, sys_umask)
-#define __NR_chroot			61
-__SYSCALL(__NR_chroot, sys_chroot)
-#define __NR_ustat			62
-__SYSCALL(__NR_ustat, sys_ustat)
-#define __NR_dup2			63
-__SYSCALL(__NR_dup2, sys_dup2)
-#define __NR_getppid			64
-__SYSCALL(__NR_getppid, sys_getppid)
-#define __NR_getpgrp			65
-__SYSCALL(__NR_getpgrp, sys_getpgrp)
-#define __NR_setsid			66
-__SYSCALL(__NR_setsid, sys_setsid)
-#define __NR_sigaction			67
-__SYSCALL(__NR_sigaction, sys_sigaction)
-__SYSCALL(68, sys_ni_syscall)		/* 68 was sys_sgetmask */
-__SYSCALL(69, sys_ni_syscall)		/* 69 was sys_ssetmask */
-#define __NR_setreuid			70
-__SYSCALL(__NR_setreuid, sys_setreuid16)
-#define __NR_setregid			71
-__SYSCALL(__NR_setregid, sys_setregid16)
-#define __NR_sigsuspend			72
-__SYSCALL(__NR_sigsuspend, sys_sigsuspend)
-#define __NR_sigpending			73
-__SYSCALL(__NR_sigpending, sys_sigpending)
-#define __NR_sethostname		74
-__SYSCALL(__NR_sethostname, sys_sethostname)
-#define __NR_setrlimit			75
-__SYSCALL(__NR_setrlimit, sys_setrlimit)
-__SYSCALL(76, sys_ni_syscall)		/* 76 was sys_getrlimit */
-#define __NR_getrusage			77
-__SYSCALL(__NR_getrusage, sys_getrusage)
-#define __NR_gettimeofday		78
-__SYSCALL(__NR_gettimeofday, sys_gettimeofday)
-#define __NR_settimeofday		79
-__SYSCALL(__NR_settimeofday, sys_settimeofday)
-#define __NR_getgroups			80
-__SYSCALL(__NR_getgroups, sys_getgroups16)
-#define __NR_setgroups			81
-__SYSCALL(__NR_setgroups, sys_setgroups16)
-__SYSCALL(82, sys_ni_syscall)		/* 82 was sys_select */
-#define __NR_symlink			83
-__SYSCALL(__NR_symlink, sys_symlink)
-__SYSCALL(84, sys_ni_syscall)		/* 84 was sys_lstat */
-#define __NR_readlink			85
-__SYSCALL(__NR_readlink, sys_readlink)
-#define __NR_uselib			86
-__SYSCALL(__NR_uselib, sys_uselib)
-#define __NR_swapon			87
-__SYSCALL(__NR_swapon, sys_swapon)
-#define __NR_reboot			88
-__SYSCALL(__NR_reboot, sys_reboot)
-__SYSCALL(89, sys_ni_syscall)		/* 89 was sys_readdir */
-__SYSCALL(90, sys_ni_syscall)		/* 90 was sys_mmap */
-#define __NR_munmap			91
-__SYSCALL(__NR_munmap, sys_munmap)
-#define __NR_truncate			92
-__SYSCALL(__NR_truncate, sys_truncate)
-#define __NR_ftruncate			93
-__SYSCALL(__NR_ftruncate, sys_ftruncate)
-#define __NR_fchmod			94
-__SYSCALL(__NR_fchmod, sys_fchmod)
-#define __NR_fchown			95
-__SYSCALL(__NR_fchown, sys_fchown16)
-#define __NR_getpriority		96
-__SYSCALL(__NR_getpriority, sys_getpriority)
-#define __NR_setpriority		97
-__SYSCALL(__NR_setpriority, sys_setpriority)
-__SYSCALL(98, sys_ni_syscall)		/* 98 was sys_profil */
-#define __NR_statfs			99
-__SYSCALL(__NR_statfs, sys_statfs)
-#define __NR_fstatfs			100
-__SYSCALL(__NR_fstatfs, sys_fstatfs)
-__SYSCALL(101, sys_ni_syscall)		/* 101 was sys_ioperm */
-__SYSCALL(102, sys_ni_syscall)		/* 102 was sys_socketcall */
-#define __NR_syslog			103
-__SYSCALL(__NR_syslog, sys_syslog)
-#define __NR_setitimer			104
-__SYSCALL(__NR_setitimer, sys_setitimer)
-#define __NR_getitimer			105
-__SYSCALL(__NR_getitimer, sys_getitimer)
-#define __NR_stat			106
-__SYSCALL(__NR_stat, sys_newstat)
-#define __NR_lstat			107
-__SYSCALL(__NR_lstat, sys_newlstat)
-#define __NR_fstat			108
-__SYSCALL(__NR_fstat, sys_newfstat)
-__SYSCALL(109, sys_ni_syscall)		/* 109 was sys_uname */
-__SYSCALL(110, sys_ni_syscall)		/* 110 was sys_iopl */
-#define __NR_vhangup			111
-__SYSCALL(__NR_vhangup, sys_vhangup)
-__SYSCALL(112, sys_ni_syscall)		/* 112 was sys_idle */
-__SYSCALL(113, sys_ni_syscall)		/* 113 was sys_syscall */
-#define __NR_wait4			114
-__SYSCALL(__NR_wait4, sys_wait4)
-#define __NR_swapoff			115
-__SYSCALL(__NR_swapoff, sys_swapoff)
-#define __NR_sysinfo			116
-__SYSCALL(__NR_sysinfo, sys_sysinfo)
-__SYSCALL(117, sys_ni_syscall)		/* 117 was sys_ipc */
-#define __NR_fsync			118
-__SYSCALL(__NR_fsync, sys_fsync)
-#define __NR_sigreturn			119
-__SYSCALL(__NR_sigreturn, sys_sigreturn)
-#define __NR_clone			120
-__SYSCALL(__NR_clone, sys_clone)
-#define __NR_setdomainname		121
-__SYSCALL(__NR_setdomainname, sys_setdomainname)
-#define __NR_uname			122
-__SYSCALL(__NR_uname, sys_newuname)
-__SYSCALL(123, sys_ni_syscall)		/* 123 was sys_modify_ldt */
-#define __NR_adjtimex			124
-__SYSCALL(__NR_adjtimex, sys_adjtimex)
-#define __NR_mprotect			125
-__SYSCALL(__NR_mprotect, sys_mprotect)
-#define __NR_sigprocmask		126
-__SYSCALL(__NR_sigprocmask, sys_sigprocmask)
-__SYSCALL(127, sys_ni_syscall)		/* 127 was sys_create_module */
-#define __NR_init_module		128
-__SYSCALL(__NR_init_module, sys_init_module)
-#define __NR_delete_module		129
-__SYSCALL(__NR_delete_module, sys_delete_module)
-__SYSCALL(130, sys_ni_syscall)		/* 130 was sys_get_kernel_syms */
-#define __NR_quotactl			131
-__SYSCALL(__NR_quotactl, sys_quotactl)
-#define __NR_getpgid			132
-__SYSCALL(__NR_getpgid, sys_getpgid)
-#define __NR_fchdir			133
-__SYSCALL(__NR_fchdir, sys_fchdir)
-#define __NR_bdflush			134
-__SYSCALL(__NR_bdflush, sys_bdflush)
-#define __NR_sysfs			135
-__SYSCALL(__NR_sysfs, sys_sysfs)
-#define __NR_personality		136
-__SYSCALL(__NR_personality, sys_personality)
-__SYSCALL(137, sys_ni_syscall)		/* 137 was sys_afs_syscall */
-#define __NR_setfsuid			138
-__SYSCALL(__NR_setfsuid, sys_setfsuid16)
-#define __NR_setfsgid			139
-__SYSCALL(__NR_setfsgid, sys_setfsgid16)
-#define __NR__llseek			140
-__SYSCALL(__NR__llseek, sys_llseek)
-#define __NR_getdents			141
-__SYSCALL(__NR_getdents, sys_getdents)
-#define __NR__newselect			142
-__SYSCALL(__NR__newselect, sys_select)
-#define __NR_flock			143
-__SYSCALL(__NR_flock, sys_flock)
-#define __NR_msync			144
-__SYSCALL(__NR_msync, sys_msync)
-#define __NR_readv			145
-__SYSCALL(__NR_readv, sys_readv)
-#define __NR_writev			146
-__SYSCALL(__NR_writev, sys_writev)
-#define __NR_getsid			147
-__SYSCALL(__NR_getsid, sys_getsid)
-#define __NR_fdatasync			148
-__SYSCALL(__NR_fdatasync, sys_fdatasync)
-#define __NR__sysctl			149
-__SYSCALL(__NR__sysctl, sys_sysctl)
-#define __NR_mlock			150
-__SYSCALL(__NR_mlock, sys_mlock)
-#define __NR_munlock			151
-__SYSCALL(__NR_munlock, sys_munlock)
-#define __NR_mlockall			152
-__SYSCALL(__NR_mlockall, sys_mlockall)
-#define __NR_munlockall			153
-__SYSCALL(__NR_munlockall, sys_munlockall)
-#define __NR_sched_setparam		154
-__SYSCALL(__NR_sched_setparam, sys_sched_setparam)
-#define __NR_sched_getparam		155
-__SYSCALL(__NR_sched_getparam, sys_sched_getparam)
-#define __NR_sched_setscheduler		156
-__SYSCALL(__NR_sched_setscheduler, sys_sched_setscheduler)
-#define __NR_sched_getscheduler		157
-__SYSCALL(__NR_sched_getscheduler, sys_sched_getscheduler)
-#define __NR_sched_yield		158
-__SYSCALL(__NR_sched_yield, sys_sched_yield)
-#define __NR_sched_get_priority_max	159
-__SYSCALL(__NR_sched_get_priority_max, sys_sched_get_priority_max)
-#define __NR_sched_get_priority_min	160
-__SYSCALL(__NR_sched_get_priority_min, sys_sched_get_priority_min)
-#define __NR_sched_rr_get_interval	161
-__SYSCALL(__NR_sched_rr_get_interval, sys_sched_rr_get_interval)
-#define __NR_nanosleep			162
-__SYSCALL(__NR_nanosleep, sys_nanosleep)
-#define __NR_mremap			163
-__SYSCALL(__NR_mremap, sys_mremap)
-#define __NR_setresuid			164
-__SYSCALL(__NR_setresuid, sys_setresuid16)
-#define __NR_getresuid			165
-__SYSCALL(__NR_getresuid, sys_getresuid16)
-__SYSCALL(166, sys_ni_syscall)		/* 166 was sys_vm86 */
-__SYSCALL(167, sys_ni_syscall)		/* 167 was sys_query_module */
-#define __NR_poll			168
-__SYSCALL(__NR_poll, sys_poll)
-#define __NR_nfsservctl			169
-__SYSCALL(__NR_nfsservctl, sys_ni_syscall)
-#define __NR_setresgid			170
-__SYSCALL(__NR_setresgid, sys_setresgid16)
-#define __NR_getresgid			171
-__SYSCALL(__NR_getresgid, sys_getresgid16)
-#define __NR_prctl			172
-__SYSCALL(__NR_prctl, sys_prctl)
-#define __NR_rt_sigreturn		173
-__SYSCALL(__NR_rt_sigreturn, sys_rt_sigreturn)
-#define __NR_rt_sigaction		174
-__SYSCALL(__NR_rt_sigaction, sys_rt_sigaction)
-#define __NR_rt_sigprocmask		175
-__SYSCALL(__NR_rt_sigprocmask, sys_rt_sigprocmask)
-#define __NR_rt_sigpending		176
-__SYSCALL(__NR_rt_sigpending, sys_rt_sigpending)
-#define __NR_rt_sigtimedwait		177
-__SYSCALL(__NR_rt_sigtimedwait, sys_rt_sigtimedwait)
-#define __NR_rt_sigqueueinfo		178
-__SYSCALL(__NR_rt_sigqueueinfo, sys_rt_sigqueueinfo)
-#define __NR_rt_sigsuspend		179
-__SYSCALL(__NR_rt_sigsuspend, sys_rt_sigsuspend)
-#define __NR_pread64			180
-__SYSCALL(__NR_pread64, sys_pread64)
-#define __NR_pwrite64			181
-__SYSCALL(__NR_pwrite64, sys_pwrite64)
-#define __NR_chown			182
-__SYSCALL(__NR_chown, sys_chown16)
-#define __NR_getcwd			183
-__SYSCALL(__NR_getcwd, sys_getcwd)
-#define __NR_capget			184
-__SYSCALL(__NR_capget, sys_capget)
-#define __NR_capset			185
-__SYSCALL(__NR_capset, sys_capset)
-#define __NR_sigaltstack		186
-__SYSCALL(__NR_sigaltstack, sys_sigaltstack)
-#define __NR_sendfile			187
-__SYSCALL(__NR_sendfile, sys_sendfile)
-__SYSCALL(188, sys_ni_syscall)		/* 188 reserved */
-__SYSCALL(189, sys_ni_syscall)		/* 189 reserved */
-#define __NR_vfork			190
-__SYSCALL(__NR_vfork, sys_vfork)
-#define __NR_ugetrlimit			191	/* SuS compliant getrlimit */
-__SYSCALL(__NR_ugetrlimit, sys_getrlimit)
-#define __NR_mmap2			192
-__SYSCALL(__NR_mmap2, sys_mmap2)
-#define __NR_truncate64			193
-__SYSCALL(__NR_truncate64, sys_truncate64)
-#define __NR_ftruncate64		194
-__SYSCALL(__NR_ftruncate64, sys_ftruncate64)
-#define __NR_stat64			195
-__SYSCALL(__NR_stat64, sys_stat64)
-#define __NR_lstat64			196
-__SYSCALL(__NR_lstat64, sys_lstat64)
-#define __NR_fstat64			197
-__SYSCALL(__NR_fstat64, sys_fstat64)
-#define __NR_lchown32			198
-__SYSCALL(__NR_lchown32, sys_lchown)
-#define __NR_getuid32			199
-__SYSCALL(__NR_getuid32, sys_getuid)
-#define __NR_getgid32			200
-__SYSCALL(__NR_getgid32, sys_getgid)
-#define __NR_geteuid32			201
-__SYSCALL(__NR_geteuid32, sys_geteuid)
-#define __NR_getegid32			202
-__SYSCALL(__NR_getegid32, sys_getegid)
-#define __NR_setreuid32			203
-__SYSCALL(__NR_setreuid32, sys_setreuid)
-#define __NR_setregid32			204
-__SYSCALL(__NR_setregid32, sys_setregid)
-#define __NR_getgroups32		205
-__SYSCALL(__NR_getgroups32, sys_getgroups)
-#define __NR_setgroups32		206
-__SYSCALL(__NR_setgroups32, sys_setgroups)
-#define __NR_fchown32			207
-__SYSCALL(__NR_fchown32, sys_fchown)
-#define __NR_setresuid32		208
-__SYSCALL(__NR_setresuid32, sys_setresuid)
-#define __NR_getresuid32		209
-__SYSCALL(__NR_getresuid32, sys_getresuid)
-#define __NR_setresgid32		210
-__SYSCALL(__NR_setresgid32, sys_setresgid)
-#define __NR_getresgid32		211
-__SYSCALL(__NR_getresgid32, sys_getresgid)
-#define __NR_chown32			212
-__SYSCALL(__NR_chown32, sys_chown)
-#define __NR_setuid32			213
-__SYSCALL(__NR_setuid32, sys_setuid)
-#define __NR_setgid32			214
-__SYSCALL(__NR_setgid32, sys_setgid)
-#define __NR_setfsuid32			215
-__SYSCALL(__NR_setfsuid32, sys_setfsuid)
-#define __NR_setfsgid32			216
-__SYSCALL(__NR_setfsgid32, sys_setfsgid)
-#define __NR_getdents64			217
-__SYSCALL(__NR_getdents64, sys_getdents64)
-#define __NR_pivot_root			218
-__SYSCALL(__NR_pivot_root, sys_pivot_root)
-#define __NR_mincore			219
-__SYSCALL(__NR_mincore, sys_mincore)
-#define __NR_madvise			220
-__SYSCALL(__NR_madvise, sys_madvise)
-#define __NR_fcntl64			221
-__SYSCALL(__NR_fcntl64, sys_fcntl64)
-__SYSCALL(222, sys_ni_syscall)		/* 222 for tux */
-__SYSCALL(223, sys_ni_syscall)		/* 223 is unused */
-#define __NR_gettid			224
-__SYSCALL(__NR_gettid, sys_gettid)
-#define __NR_readahead			225
-__SYSCALL(__NR_readahead, sys_readahead)
-#define __NR_setxattr			226
-__SYSCALL(__NR_setxattr, sys_setxattr)
-#define __NR_lsetxattr			227
-__SYSCALL(__NR_lsetxattr, sys_lsetxattr)
-#define __NR_fsetxattr			228
-__SYSCALL(__NR_fsetxattr, sys_fsetxattr)
-#define __NR_getxattr			229
-__SYSCALL(__NR_getxattr, sys_getxattr)
-#define __NR_lgetxattr			230
-__SYSCALL(__NR_lgetxattr, sys_lgetxattr)
-#define __NR_fgetxattr			231
-__SYSCALL(__NR_fgetxattr, sys_fgetxattr)
-#define __NR_listxattr			232
-__SYSCALL(__NR_listxattr, sys_listxattr)
-#define __NR_llistxattr			233
-__SYSCALL(__NR_llistxattr, sys_llistxattr)
-#define __NR_flistxattr			234
-__SYSCALL(__NR_flistxattr, sys_flistxattr)
-#define __NR_removexattr		235
-__SYSCALL(__NR_removexattr, sys_removexattr)
-#define __NR_lremovexattr		236
-__SYSCALL(__NR_lremovexattr, sys_lremovexattr)
-#define __NR_fremovexattr		237
-__SYSCALL(__NR_fremovexattr, sys_fremovexattr)
-#define __NR_tkill			238
-__SYSCALL(__NR_tkill, sys_tkill)
-#define __NR_sendfile64			239
-__SYSCALL(__NR_sendfile64, sys_sendfile64)
-#define __NR_futex			240
-__SYSCALL(__NR_futex, sys_futex)
-#define __NR_sched_setaffinity		241
-__SYSCALL(__NR_sched_setaffinity, sys_sched_setaffinity)
-#define __NR_sched_getaffinity		242
-__SYSCALL(__NR_sched_getaffinity, sys_sched_getaffinity)
-#define __NR_io_setup			243
-__SYSCALL(__NR_io_setup, sys_io_setup)
-#define __NR_io_destroy			244
-__SYSCALL(__NR_io_destroy, sys_io_destroy)
-#define __NR_io_getevents		245
-__SYSCALL(__NR_io_getevents, sys_io_getevents)
-#define __NR_io_submit			246
-__SYSCALL(__NR_io_submit, sys_io_submit)
-#define __NR_io_cancel			247
-__SYSCALL(__NR_io_cancel, sys_io_cancel)
-#define __NR_exit_group			248
-__SYSCALL(__NR_exit_group, sys_exit_group)
-#define __NR_lookup_dcookie		249
-__SYSCALL(__NR_lookup_dcookie, sys_lookup_dcookie)
-#define __NR_epoll_create		250
-__SYSCALL(__NR_epoll_create, sys_epoll_create)
-#define __NR_epoll_ctl			251
-__SYSCALL(__NR_epoll_ctl, sys_epoll_ctl)
-#define __NR_epoll_wait			252
-__SYSCALL(__NR_epoll_wait, sys_epoll_wait)
-#define __NR_remap_file_pages		253
-__SYSCALL(__NR_remap_file_pages, sys_remap_file_pages)
-__SYSCALL(254, sys_ni_syscall)		/* 254 for set_thread_area */
-__SYSCALL(255, sys_ni_syscall)		/* 255 for get_thread_area */
-#define __NR_set_tid_address		256
-__SYSCALL(__NR_set_tid_address, sys_set_tid_address)
-#define __NR_timer_create		257
-__SYSCALL(__NR_timer_create, sys_timer_create)
-#define __NR_timer_settime		258
-__SYSCALL(__NR_timer_settime, sys_timer_settime)
-#define __NR_timer_gettime		259
-__SYSCALL(__NR_timer_gettime, sys_timer_gettime)
-#define __NR_timer_getoverrun		260
-__SYSCALL(__NR_timer_getoverrun, sys_timer_getoverrun)
-#define __NR_timer_delete		261
-__SYSCALL(__NR_timer_delete, sys_timer_delete)
-#define __NR_clock_settime		262
-__SYSCALL(__NR_clock_settime, sys_clock_settime)
-#define __NR_clock_gettime		263
-__SYSCALL(__NR_clock_gettime, sys_clock_gettime)
-#define __NR_clock_getres		264
-__SYSCALL(__NR_clock_getres, sys_clock_getres)
-#define __NR_clock_nanosleep		265
-__SYSCALL(__NR_clock_nanosleep, sys_clock_nanosleep)
-#define __NR_statfs64			266
-__SYSCALL(__NR_statfs64, sys_statfs64)
-#define __NR_fstatfs64			267
-__SYSCALL(__NR_fstatfs64, sys_fstatfs64)
-#define __NR_tgkill			268
-__SYSCALL(__NR_tgkill, sys_tgkill)
-#define __NR_utimes			269
-__SYSCALL(__NR_utimes, sys_utimes)
-#define __NR_fadvise64			270
-__SYSCALL(__NR_fadvise64, sys_fadvise64_64)
-#define __NR_pciconfig_iobase		271
-__SYSCALL(__NR_pciconfig_iobase, sys_pciconfig_iobase)
-#define __NR_pciconfig_read		272
-__SYSCALL(__NR_pciconfig_read, sys_pciconfig_read)
-#define __NR_pciconfig_write		273
-__SYSCALL(__NR_pciconfig_write, sys_pciconfig_write)
-#define __NR_mq_open			274
-__SYSCALL(__NR_mq_open, sys_mq_open)
-#define __NR_mq_unlink			275
-__SYSCALL(__NR_mq_unlink, sys_mq_unlink)
-#define __NR_mq_timedsend		276
-__SYSCALL(__NR_mq_timedsend, sys_mq_timedsend)
-#define __NR_mq_timedreceive		277
-__SYSCALL(__NR_mq_timedreceive, sys_mq_timedreceive)
-#define __NR_mq_notify			278
-__SYSCALL(__NR_mq_notify, sys_mq_notify)
-#define __NR_mq_getsetattr		279
-__SYSCALL(__NR_mq_getsetattr, sys_mq_getsetattr)
-#define __NR_waitid			280
-__SYSCALL(__NR_waitid, sys_waitid)
-#define __NR_socket			281
-__SYSCALL(__NR_socket, sys_socket)
-#define __NR_bind			282
-__SYSCALL(__NR_bind, sys_bind)
-#define __NR_connect			283
-__SYSCALL(__NR_connect, sys_connect)
-#define __NR_listen			284
-__SYSCALL(__NR_listen, sys_listen)
-#define __NR_accept			285
-__SYSCALL(__NR_accept, sys_accept)
-#define __NR_getsockname		286
-__SYSCALL(__NR_getsockname, sys_getsockname)
-#define __NR_getpeername		287
-__SYSCALL(__NR_getpeername, sys_getpeername)
-#define __NR_socketpair			288
-__SYSCALL(__NR_socketpair, sys_socketpair)
-#define __NR_send			289
-__SYSCALL(__NR_send, sys_send)
-#define __NR_sendto			290
-__SYSCALL(__NR_sendto, sys_sendto)
-#define __NR_recv			291
-__SYSCALL(__NR_recv, sys_recv)
-#define __NR_recvfrom			292
-__SYSCALL(__NR_recvfrom, sys_recvfrom)
-#define __NR_shutdown			293
-__SYSCALL(__NR_shutdown, sys_shutdown)
-#define __NR_setsockopt			294
-__SYSCALL(__NR_setsockopt, sys_setsockopt)
-#define __NR_getsockopt			295
-__SYSCALL(__NR_getsockopt, sys_getsockopt)
-#define __NR_sendmsg			296
-__SYSCALL(__NR_sendmsg, sys_sendmsg)
-#define __NR_recvmsg			297
-__SYSCALL(__NR_recvmsg, sys_recvmsg)
-#define __NR_semop			298
-__SYSCALL(__NR_semop, sys_semop)
-#define __NR_semget			299
-__SYSCALL(__NR_semget, sys_semget)
-#define __NR_semctl			300
-__SYSCALL(__NR_semctl, sys_semctl)
-#define __NR_msgsnd			301
-__SYSCALL(__NR_msgsnd, sys_msgsnd)
-#define __NR_msgrcv			302
-__SYSCALL(__NR_msgrcv, sys_msgrcv)
-#define __NR_msgget			303
-__SYSCALL(__NR_msgget, sys_msgget)
-#define __NR_msgctl			304
-__SYSCALL(__NR_msgctl, sys_msgctl)
-#define __NR_shmat			305
-__SYSCALL(__NR_shmat, sys_shmat)
-#define __NR_shmdt			306
-__SYSCALL(__NR_shmdt, sys_shmdt)
-#define __NR_shmget			307
-__SYSCALL(__NR_shmget, sys_shmget)
-#define __NR_shmctl			308
-__SYSCALL(__NR_shmctl, sys_shmctl)
-#define __NR_add_key			309
-__SYSCALL(__NR_add_key, sys_add_key)
-#define __NR_request_key		310
-__SYSCALL(__NR_request_key, sys_request_key)
-#define __NR_keyctl			311
-__SYSCALL(__NR_keyctl, sys_keyctl)
-#define __NR_semtimedop			312
-__SYSCALL(__NR_semtimedop, sys_semtimedop)
-#define __NR_vserver			313
-__SYSCALL(__NR_vserver, sys_ni_syscall)
-#define __NR_ioprio_set			314
-__SYSCALL(__NR_ioprio_set, sys_ioprio_set)
-#define __NR_ioprio_get			315
-__SYSCALL(__NR_ioprio_get, sys_ioprio_get)
-#define __NR_inotify_init		316
-__SYSCALL(__NR_inotify_init, sys_inotify_init)
-#define __NR_inotify_add_watch		317
-__SYSCALL(__NR_inotify_add_watch, sys_inotify_add_watch)
-#define __NR_inotify_rm_watch		318
-__SYSCALL(__NR_inotify_rm_watch, sys_inotify_rm_watch)
-#define __NR_mbind			319
-__SYSCALL(__NR_mbind, sys_mbind)
-#define __NR_get_mempolicy		320
-__SYSCALL(__NR_get_mempolicy, sys_get_mempolicy)
-#define __NR_set_mempolicy		321
-__SYSCALL(__NR_set_mempolicy, sys_set_mempolicy)
-#define __NR_openat			322
-__SYSCALL(__NR_openat, sys_openat)
-#define __NR_mkdirat			323
-__SYSCALL(__NR_mkdirat, sys_mkdirat)
-#define __NR_mknodat			324
-__SYSCALL(__NR_mknodat, sys_mknodat)
-#define __NR_fchownat			325
-__SYSCALL(__NR_fchownat, sys_fchownat)
-#define __NR_futimesat			326
-__SYSCALL(__NR_futimesat, sys_futimesat)
-#define __NR_fstatat64			327
-__SYSCALL(__NR_fstatat64, sys_fstatat64)
-#define __NR_unlinkat			328
-__SYSCALL(__NR_unlinkat, sys_unlinkat)
-#define __NR_renameat			329
-__SYSCALL(__NR_renameat, sys_renameat)
-#define __NR_linkat			330
-__SYSCALL(__NR_linkat, sys_linkat)
-#define __NR_symlinkat			331
-__SYSCALL(__NR_symlinkat, sys_symlinkat)
-#define __NR_readlinkat			332
-__SYSCALL(__NR_readlinkat, sys_readlinkat)
-#define __NR_fchmodat			333
-__SYSCALL(__NR_fchmodat, sys_fchmodat)
-#define __NR_faccessat			334
-__SYSCALL(__NR_faccessat, sys_faccessat)
-#define __NR_pselect6			335
-__SYSCALL(__NR_pselect6, sys_pselect6)
-#define __NR_ppoll			336
-__SYSCALL(__NR_ppoll, sys_ppoll)
-#define __NR_unshare			337
-__SYSCALL(__NR_unshare, sys_unshare)
-#define __NR_set_robust_list		338
-__SYSCALL(__NR_set_robust_list, sys_set_robust_list)
-#define __NR_get_robust_list		339
-__SYSCALL(__NR_get_robust_list, sys_get_robust_list)
-#define __NR_splice			340
-__SYSCALL(__NR_splice, sys_splice)
-#define __NR_sync_file_range2		341
-__SYSCALL(__NR_sync_file_range2, sys_sync_file_range2)
-#define __NR_tee			342
-__SYSCALL(__NR_tee, sys_tee)
-#define __NR_vmsplice			343
-__SYSCALL(__NR_vmsplice, sys_vmsplice)
-#define __NR_move_pages			344
-__SYSCALL(__NR_move_pages, sys_move_pages)
-#define __NR_getcpu			345
-__SYSCALL(__NR_getcpu, sys_getcpu)
-#define __NR_epoll_pwait		346
-__SYSCALL(__NR_epoll_pwait, sys_epoll_pwait)
-#define __NR_kexec_load			347
-__SYSCALL(__NR_kexec_load, sys_kexec_load)
-#define __NR_utimensat			348
-__SYSCALL(__NR_utimensat, sys_utimensat)
-#define __NR_signalfd			349
-__SYSCALL(__NR_signalfd, sys_signalfd)
-#define __NR_timerfd_create		350
-__SYSCALL(__NR_timerfd_create, sys_timerfd_create)
-#define __NR_eventfd			351
-__SYSCALL(__NR_eventfd, sys_eventfd)
-#define __NR_fallocate			352
-__SYSCALL(__NR_fallocate, sys_fallocate)
-#define __NR_timerfd_settime		353
-__SYSCALL(__NR_timerfd_settime, sys_timerfd_settime)
-#define __NR_timerfd_gettime		354
-__SYSCALL(__NR_timerfd_gettime, sys_timerfd_gettime)
-#define __NR_signalfd4			355
-__SYSCALL(__NR_signalfd4, sys_signalfd4)
-#define __NR_eventfd2			356
-__SYSCALL(__NR_eventfd2, sys_eventfd2)
-#define __NR_epoll_create1		357
-__SYSCALL(__NR_epoll_create1, sys_epoll_create1)
-#define __NR_dup3			358
-__SYSCALL(__NR_dup3, sys_dup3)
-#define __NR_pipe2			359
-__SYSCALL(__NR_pipe2, sys_pipe2)
-#define __NR_inotify_init1		360
-__SYSCALL(__NR_inotify_init1, sys_inotify_init1)
-#define __NR_preadv			361
-__SYSCALL(__NR_preadv, sys_preadv)
-#define __NR_pwritev			362
-__SYSCALL(__NR_pwritev, sys_pwritev)
-#define __NR_rt_tgsigqueueinfo		363
-__SYSCALL(__NR_rt_tgsigqueueinfo, sys_rt_tgsigqueueinfo)
-#define __NR_perf_event_open		364
-__SYSCALL(__NR_perf_event_open, sys_perf_event_open)
-#define __NR_recvmmsg			365
-__SYSCALL(__NR_recvmmsg, sys_recvmmsg)
-#define __NR_accept4			366
-__SYSCALL(__NR_accept4, sys_accept4)
-#define __NR_fanotify_init		367
-__SYSCALL(__NR_fanotify_init, sys_fanotify_init)
-#define __NR_fanotify_mark		368
-__SYSCALL(__NR_fanotify_mark, sys_fanotify_mark)
-#define __NR_prlimit64			369
-__SYSCALL(__NR_prlimit64, sys_prlimit64)
-#define __NR_name_to_handle_at		370
-__SYSCALL(__NR_name_to_handle_at, sys_name_to_handle_at)
-#define __NR_open_by_handle_at		371
-__SYSCALL(__NR_open_by_handle_at, sys_open_by_handle_at)
-#define __NR_clock_adjtime		372
-__SYSCALL(__NR_clock_adjtime, sys_clock_adjtime)
-#define __NR_syncfs			373
-__SYSCALL(__NR_syncfs, sys_syncfs)
 
 /*
  * The following SVCs are ARM private.
@@ -737,18 +412,3 @@ __SYSCALL(__NR_syncfs, sys_syncfs)
 #define __ARM_NR_COMPAT_BASE		0x0f0000
 #define __ARM_NR_compat_cacheflush	(__ARM_NR_COMPAT_BASE+2)
 #define __ARM_NR_compat_set_tls		(__ARM_NR_COMPAT_BASE+5)
-
-#endif	/* __SYSCALL_COMPAT */
-
-#define __NR_compat_syscalls		374
-
-#define __ARCH_WANT_COMPAT_IPC_PARSE_VERSION
-#define __ARCH_WANT_COMPAT_STAT64
-#define __ARCH_WANT_SYS_GETHOSTNAME
-#define __ARCH_WANT_SYS_PAUSE
-#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
-#define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_SIGPENDING
-#define __ARCH_WANT_SYS_SIGPROCMASK
-#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
diff --git a/arch/arm64/include/uapi/asm/Kbuild b/arch/arm64/include/uapi/asm/Kbuild
index baebb3da1d4..ca5b65f75c7 100644
--- a/arch/arm64/include/uapi/asm/Kbuild
+++ b/arch/arm64/include/uapi/asm/Kbuild
@@ -1,3 +1,17 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += byteorder.h
+header-y += fcntl.h
+header-y += hwcap.h
+header-y += param.h
+header-y += ptrace.h
+header-y += setup.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += stat.h
+header-y += statfs.h
+header-y += unistd.h
diff --git a/arch/arm64/include/asm/auxvec.h b/arch/arm64/include/uapi/asm/auxvec.h
index 22d6d888585..22d6d888585 100644
--- a/arch/arm64/include/asm/auxvec.h
+++ b/arch/arm64/include/uapi/asm/auxvec.h
diff --git a/arch/arm64/include/asm/bitsperlong.h b/arch/arm64/include/uapi/asm/bitsperlong.h
index fce9c2924fa..fce9c2924fa 100644
--- a/arch/arm64/include/asm/bitsperlong.h
+++ b/arch/arm64/include/uapi/asm/bitsperlong.h
diff --git a/arch/arm64/include/asm/byteorder.h b/arch/arm64/include/uapi/asm/byteorder.h
index 2b92046aafc..2b92046aafc 100644
--- a/arch/arm64/include/asm/byteorder.h
+++ b/arch/arm64/include/uapi/asm/byteorder.h
diff --git a/arch/arm64/include/asm/fcntl.h b/arch/arm64/include/uapi/asm/fcntl.h
index cd2e630c235..cd2e630c235 100644
--- a/arch/arm64/include/asm/fcntl.h
+++ b/arch/arm64/include/uapi/asm/fcntl.h
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
new file mode 100644
index 00000000000..eea497578b8
--- /dev/null
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2012 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef _UAPI__ASM_HWCAP_H
+#define _UAPI__ASM_HWCAP_H
+
+/*
+ * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
+ */
+#define HWCAP_FP		(1 << 0)
+#define HWCAP_ASIMD		(1 << 1)
+
+
+#endif /* _UAPI__ASM_HWCAP_H */
diff --git a/arch/arm64/include/asm/param.h b/arch/arm64/include/uapi/asm/param.h
index 8e3a281d448..8e3a281d448 100644
--- a/arch/arm64/include/asm/param.h
+++ b/arch/arm64/include/uapi/asm/param.h
diff --git a/arch/arm64/include/uapi/asm/ptrace.h b/arch/arm64/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..9b131b4efa0
--- /dev/null
+++ b/arch/arm64/include/uapi/asm/ptrace.h
@@ -0,0 +1,91 @@
+/*
+ * Based on arch/arm/include/asm/ptrace.h
+ *
+ * Copyright (C) 1996-2003 Russell King
+ * Copyright (C) 2012 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef _UAPI__ASM_PTRACE_H
+#define _UAPI__ASM_PTRACE_H
+
+#include <linux/types.h>
+
+#include <asm/hwcap.h>
+
+
+/*
+ * PSR bits
+ */
+#define PSR_MODE_EL0t	0x00000000
+#define PSR_MODE_EL1t	0x00000004
+#define PSR_MODE_EL1h	0x00000005
+#define PSR_MODE_EL2t	0x00000008
+#define PSR_MODE_EL2h	0x00000009
+#define PSR_MODE_EL3t	0x0000000c
+#define PSR_MODE_EL3h	0x0000000d
+#define PSR_MODE_MASK	0x0000000f
+
+/* AArch32 CPSR bits */
+#define PSR_MODE32_BIT		0x00000010
+
+/* AArch64 SPSR bits */
+#define PSR_F_BIT	0x00000040
+#define PSR_I_BIT	0x00000080
+#define PSR_A_BIT	0x00000100
+#define PSR_D_BIT	0x00000200
+#define PSR_Q_BIT	0x08000000
+#define PSR_V_BIT	0x10000000
+#define PSR_C_BIT	0x20000000
+#define PSR_Z_BIT	0x40000000
+#define PSR_N_BIT	0x80000000
+
+/*
+ * Groups of PSR bits
+ */
+#define PSR_f		0xff000000	/* Flags		*/
+#define PSR_s		0x00ff0000	/* Status		*/
+#define PSR_x		0x0000ff00	/* Extension		*/
+#define PSR_c		0x000000ff	/* Control		*/
+
+
+#ifndef __ASSEMBLY__
+
+/*
+ * User structures for general purpose, floating point and debug registers.
+ */
+struct user_pt_regs {
+	__u64		regs[31];
+	__u64		sp;
+	__u64		pc;
+	__u64		pstate;
+};
+
+struct user_fpsimd_state {
+	__uint128_t	vregs[32];
+	__u32		fpsr;
+	__u32		fpcr;
+};
+
+struct user_hwdebug_state {
+	__u32		dbg_info;
+	struct {
+		__u64	addr;
+		__u32	ctrl;
+	}		dbg_regs[16];
+};
+
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _UAPI__ASM_PTRACE_H */
diff --git a/arch/arm64/include/asm/setup.h b/arch/arm64/include/uapi/asm/setup.h
index 9cf2e46fbbd..9cf2e46fbbd 100644
--- a/arch/arm64/include/asm/setup.h
+++ b/arch/arm64/include/uapi/asm/setup.h
diff --git a/arch/arm64/include/uapi/asm/sigcontext.h b/arch/arm64/include/uapi/asm/sigcontext.h
new file mode 100644
index 00000000000..690ad51cc90
--- /dev/null
+++ b/arch/arm64/include/uapi/asm/sigcontext.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2012 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef _UAPI__ASM_SIGCONTEXT_H
+#define _UAPI__ASM_SIGCONTEXT_H
+
+#include <linux/types.h>
+
+/*
+ * Signal context structure - contains all info to do with the state
+ * before the signal handler was invoked.
+ */
+struct sigcontext {
+	__u64 fault_address;
+	/* AArch64 registers */
+	__u64 regs[31];
+	__u64 sp;
+	__u64 pc;
+	__u64 pstate;
+	/* 4K reserved for FP/SIMD state and future expansion */
+	__u8 __reserved[4096] __attribute__((__aligned__(16)));
+};
+
+/*
+ * Header to be used at the beginning of structures extending the user
+ * context. Such structures must be placed after the rt_sigframe on the stack
+ * and be 16-byte aligned. The last structure must be a dummy one with the
+ * magic and size set to 0.
+ */
+struct _aarch64_ctx {
+	__u32 magic;
+	__u32 size;
+};
+
+#define FPSIMD_MAGIC	0x46508001
+
+struct fpsimd_context {
+	struct _aarch64_ctx head;
+	__u32 fpsr;
+	__u32 fpcr;
+	__uint128_t vregs[32];
+};
+
+
+#endif /* _UAPI__ASM_SIGCONTEXT_H */
diff --git a/arch/arm64/include/asm/siginfo.h b/arch/arm64/include/uapi/asm/siginfo.h
index 5a74a0853db..5a74a0853db 100644
--- a/arch/arm64/include/asm/siginfo.h
+++ b/arch/arm64/include/uapi/asm/siginfo.h
diff --git a/arch/arm64/include/asm/signal.h b/arch/arm64/include/uapi/asm/signal.h
index 8d1e7236431..8d1e7236431 100644
--- a/arch/arm64/include/asm/signal.h
+++ b/arch/arm64/include/uapi/asm/signal.h
diff --git a/arch/arm64/include/uapi/asm/stat.h b/arch/arm64/include/uapi/asm/stat.h
new file mode 100644
index 00000000000..eeb702e5074
--- /dev/null
+++ b/arch/arm64/include/uapi/asm/stat.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2012 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <asm-generic/stat.h>
diff --git a/arch/arm64/include/asm/statfs.h b/arch/arm64/include/uapi/asm/statfs.h
index 6f621905097..6f621905097 100644
--- a/arch/arm64/include/asm/statfs.h
+++ b/arch/arm64/include/uapi/asm/statfs.h
diff --git a/arch/arm64/include/uapi/asm/unistd.h b/arch/arm64/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..1caadc24e3f
--- /dev/null
+++ b/arch/arm64/include/uapi/asm/unistd.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2012 ARM Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <asm-generic/unistd.h>
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 38cf853a366..a6f3f7da688 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -26,6 +26,7 @@
 #include <asm/errno.h>
 #include <asm/thread_info.h>
 #include <asm/unistd.h>
+#include <asm/unistd32.h>
 
 /*
  * Bad Abort numbers
@@ -583,6 +584,7 @@ work_pending:
 	mov	x0, sp				// 'regs'
 	tst	x2, #PSR_MODE_MASK		// user mode regs?
 	b.ne	no_work_pending			// returning to kernel
+	enable_irq				// enable interrupts for do_notify_resume()
 	bl	do_notify_resume
 	b	ret_to_user
 work_resched:
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index ac3550ecc7b..2ea3968367c 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -823,11 +823,11 @@ static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
 	if (off & 3)
 		return -EIO;
 
-	if (off == PT_TEXT_ADDR)
+	if (off == COMPAT_PT_TEXT_ADDR)
 		tmp = tsk->mm->start_code;
-	else if (off == PT_DATA_ADDR)
+	else if (off == COMPAT_PT_DATA_ADDR)
 		tmp = tsk->mm->start_data;
-	else if (off == PT_TEXT_END_ADDR)
+	else if (off == COMPAT_PT_TEXT_END_ADDR)
 		tmp = tsk->mm->end_code;
 	else if (off < sizeof(compat_elf_gregset_t))
 		return copy_regset_to_user(tsk, &user_aarch32_view,
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
index 0790a87a434..4654824747a 100644
--- a/arch/arm64/kernel/signal32.c
+++ b/arch/arm64/kernel/signal32.c
@@ -18,8 +18,6 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#define __SYSCALL_COMPAT
-
 #include <linux/compat.h>
 #include <linux/signal.h>
 #include <linux/syscalls.h>
@@ -28,7 +26,7 @@
 #include <asm/fpsimd.h>
 #include <asm/signal32.h>
 #include <asm/uaccess.h>
-#include <asm/unistd.h>
+#include <asm/unistd32.h>
 
 struct compat_sigaction {
 	compat_uptr_t			sa_handler;
@@ -126,19 +124,19 @@ struct compat_rt_sigframe {
  * For ARM syscalls, the syscall number has to be loaded into r7.
  * We do not support an OABI userspace.
  */
-#define MOV_R7_NR_SIGRETURN	(0xe3a07000 | __NR_sigreturn)
-#define SVC_SYS_SIGRETURN	(0xef000000 | __NR_sigreturn)
-#define MOV_R7_NR_RT_SIGRETURN	(0xe3a07000 | __NR_rt_sigreturn)
-#define SVC_SYS_RT_SIGRETURN	(0xef000000 | __NR_rt_sigreturn)
+#define MOV_R7_NR_SIGRETURN	(0xe3a07000 | __NR_compat_sigreturn)
+#define SVC_SYS_SIGRETURN	(0xef000000 | __NR_compat_sigreturn)
+#define MOV_R7_NR_RT_SIGRETURN	(0xe3a07000 | __NR_compat_rt_sigreturn)
+#define SVC_SYS_RT_SIGRETURN	(0xef000000 | __NR_compat_rt_sigreturn)
 
 /*
  * For Thumb syscalls, we also pass the syscall number via r7. We therefore
  * need two 16-bit instructions.
  */
-#define SVC_THUMB_SIGRETURN	(((0xdf00 | __NR_sigreturn) << 16) | \
-				   0x2700 | __NR_sigreturn)
-#define SVC_THUMB_RT_SIGRETURN	(((0xdf00 | __NR_rt_sigreturn) << 16) | \
-				   0x2700 | __NR_rt_sigreturn)
+#define SVC_THUMB_SIGRETURN	(((0xdf00 | __NR_compat_sigreturn) << 16) | \
+				   0x2700 | __NR_compat_sigreturn)
+#define SVC_THUMB_RT_SIGRETURN	(((0xdf00 | __NR_compat_rt_sigreturn) << 16) | \
+				   0x2700 | __NR_compat_rt_sigreturn)
 
 const compat_ulong_t aarch32_sigret_code[6] = {
 	/*
@@ -819,5 +817,5 @@ asmlinkage int compat_sys_rt_sigqueueinfo(int pid, int sig,
 
 void compat_setup_restart_syscall(struct pt_regs *regs)
 {
-       regs->regs[7] = __NR_restart_syscall;
+       regs->regs[7] = __NR_compat_restart_syscall;
 }
diff --git a/arch/arm64/kernel/sys.c b/arch/arm64/kernel/sys.c
index 905fcfb0ddd..b120df37de3 100644
--- a/arch/arm64/kernel/sys.c
+++ b/arch/arm64/kernel/sys.c
@@ -50,13 +50,13 @@ asmlinkage long sys_execve(const char __user *filenamei,
 			   struct pt_regs *regs)
 {
 	long error;
-	char * filename;
+	struct filename *filename;
 
 	filename = getname(filenamei);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = do_execve(filename, argv, envp, regs);
+	error = do_execve(filename->name, argv, envp, regs);
 	putname(filename);
 out:
 	return error;
diff --git a/arch/arm64/kernel/sys32.S b/arch/arm64/kernel/sys32.S
index 5e4dc93cc31..54c4aec47a0 100644
--- a/arch/arm64/kernel/sys32.S
+++ b/arch/arm64/kernel/sys32.S
@@ -147,136 +147,12 @@ compat_sys_fanotify_mark_wrapper:
 	b	sys_fanotify_mark
 ENDPROC(compat_sys_fanotify_mark_wrapper)
 
-/*
- * Use the compat system call wrappers.
- */
-#define sys_fork		compat_sys_fork_wrapper
-#define sys_open		compat_sys_open
-#define sys_execve		compat_sys_execve_wrapper
-#define sys_lseek		compat_sys_lseek_wrapper
-#define sys_mount		compat_sys_mount
-#define sys_ptrace		compat_sys_ptrace
-#define sys_times		compat_sys_times
-#define sys_ioctl		compat_sys_ioctl
-#define sys_fcntl		compat_sys_fcntl
-#define sys_ustat		compat_sys_ustat
-#define sys_sigaction		compat_sys_sigaction
-#define sys_sigsuspend		compat_sys_sigsuspend
-#define sys_sigpending		compat_sys_sigpending
-#define sys_setrlimit		compat_sys_setrlimit
-#define sys_getrusage		compat_sys_getrusage
-#define sys_gettimeofday	compat_sys_gettimeofday
-#define sys_settimeofday	compat_sys_settimeofday
-#define sys_statfs		compat_sys_statfs
-#define sys_fstatfs		compat_sys_fstatfs
-#define sys_setitimer		compat_sys_setitimer
-#define sys_getitimer		compat_sys_getitimer
-#define sys_newstat		compat_sys_newstat
-#define sys_newlstat		compat_sys_newlstat
-#define sys_newfstat		compat_sys_newfstat
-#define sys_wait4		compat_sys_wait4
-#define sys_sysinfo		compat_sys_sysinfo
-#define sys_sigreturn		compat_sys_sigreturn_wrapper
-#define sys_clone		compat_sys_clone_wrapper
-#define sys_adjtimex		compat_sys_adjtimex
-#define sys_sigprocmask		compat_sys_sigprocmask
-#define sys_getdents		compat_sys_getdents
-#define sys_select		compat_sys_select
-#define sys_readv		compat_sys_readv
-#define sys_writev		compat_sys_writev
-#define sys_sysctl		compat_sys_sysctl
-#define sys_sched_rr_get_interval compat_sys_sched_rr_get_interval
-#define sys_nanosleep		compat_sys_nanosleep
-#define sys_rt_sigreturn	compat_sys_rt_sigreturn_wrapper
-#define sys_rt_sigaction	compat_sys_rt_sigaction
-#define sys_rt_sigprocmask	compat_sys_rt_sigprocmask
-#define sys_rt_sigpending	compat_sys_rt_sigpending
-#define sys_rt_sigtimedwait	compat_sys_rt_sigtimedwait
-#define sys_rt_sigqueueinfo	compat_sys_rt_sigqueueinfo
-#define sys_rt_sigsuspend	compat_sys_rt_sigsuspend
-#define sys_pread64		compat_sys_pread64_wrapper
-#define sys_pwrite64		compat_sys_pwrite64_wrapper
-#define sys_sigaltstack		compat_sys_sigaltstack_wrapper
-#define sys_sendfile		compat_sys_sendfile
-#define sys_vfork		compat_sys_vfork_wrapper
-#define sys_getrlimit		compat_sys_getrlimit
-#define sys_mmap2		sys_mmap_pgoff
-#define sys_truncate64		compat_sys_truncate64_wrapper
-#define sys_ftruncate64		compat_sys_ftruncate64_wrapper
-#define sys_getdents64		compat_sys_getdents64
-#define sys_fcntl64		compat_sys_fcntl64
-#define sys_readahead		compat_sys_readahead_wrapper
-#define sys_futex		compat_sys_futex
-#define sys_sched_setaffinity	compat_sys_sched_setaffinity
-#define sys_sched_getaffinity	compat_sys_sched_getaffinity
-#define sys_io_setup		compat_sys_io_setup
-#define sys_io_getevents	compat_sys_io_getevents
-#define sys_io_submit		compat_sys_io_submit
-#define sys_lookup_dcookie	compat_sys_lookup_dcookie
-#define sys_timer_create	compat_sys_timer_create
-#define sys_timer_settime	compat_sys_timer_settime
-#define sys_timer_gettime	compat_sys_timer_gettime
-#define sys_clock_settime	compat_sys_clock_settime
-#define sys_clock_gettime	compat_sys_clock_gettime
-#define sys_clock_getres	compat_sys_clock_getres
-#define sys_clock_nanosleep	compat_sys_clock_nanosleep
-#define sys_statfs64		compat_sys_statfs64_wrapper
-#define sys_fstatfs64		compat_sys_fstatfs64_wrapper
-#define sys_utimes		compat_sys_utimes
-#define sys_fadvise64_64	compat_sys_fadvise64_64_wrapper
-#define sys_mq_open		compat_sys_mq_open
-#define sys_mq_timedsend	compat_sys_mq_timedsend
-#define sys_mq_timedreceive	compat_sys_mq_timedreceive
-#define sys_mq_notify		compat_sys_mq_notify
-#define sys_mq_getsetattr	compat_sys_mq_getsetattr
-#define sys_waitid		compat_sys_waitid
-#define sys_recv		compat_sys_recv
-#define sys_recvfrom		compat_sys_recvfrom
-#define sys_setsockopt		compat_sys_setsockopt
-#define sys_getsockopt		compat_sys_getsockopt
-#define sys_sendmsg		compat_sys_sendmsg
-#define sys_recvmsg		compat_sys_recvmsg
-#define sys_semctl		compat_sys_semctl
-#define sys_msgsnd		compat_sys_msgsnd
-#define sys_msgrcv		compat_sys_msgrcv
-#define sys_msgctl		compat_sys_msgctl
-#define sys_shmat		compat_sys_shmat
-#define sys_shmctl		compat_sys_shmctl
-#define sys_keyctl		compat_sys_keyctl
-#define sys_semtimedop		compat_sys_semtimedop
-#define sys_mbind		compat_sys_mbind
-#define sys_get_mempolicy	compat_sys_get_mempolicy
-#define sys_set_mempolicy	compat_sys_set_mempolicy
-#define sys_openat		compat_sys_openat
-#define sys_futimesat		compat_sys_futimesat
-#define sys_pselect6		compat_sys_pselect6
-#define sys_ppoll		compat_sys_ppoll
-#define sys_set_robust_list	compat_sys_set_robust_list
-#define sys_get_robust_list	compat_sys_get_robust_list
-#define sys_sync_file_range2	compat_sys_sync_file_range2_wrapper
-#define sys_vmsplice		compat_sys_vmsplice
-#define sys_move_pages		compat_sys_move_pages
-#define sys_epoll_pwait		compat_sys_epoll_pwait
-#define sys_kexec_load		compat_sys_kexec_load
-#define sys_utimensat		compat_sys_utimensat
-#define sys_signalfd		compat_sys_signalfd
-#define sys_fallocate		compat_sys_fallocate_wrapper
-#define sys_timerfd_settime	compat_sys_timerfd_settime
-#define sys_timerfd_gettime	compat_sys_timerfd_gettime
-#define sys_signalfd4		compat_sys_signalfd4
-#define sys_preadv		compat_sys_preadv
-#define sys_pwritev		compat_sys_pwritev
-#define sys_rt_tgsigqueueinfo	compat_sys_rt_tgsigqueueinfo
-#define sys_recvmmsg		compat_sys_recvmmsg
-#define sys_fanotify_mark	compat_sys_fanotify_mark_wrapper
-
 #undef __SYSCALL
 #define __SYSCALL(x, y)		.quad	y	// x
-#define __SYSCALL_COMPAT
 
 /*
  * The system calls table must be 4KB aligned.
  */
 	.align	12
 ENTRY(compat_sys_call_table)
-#include <asm/unistd.h>
+#include <asm/unistd32.h>
diff --git a/arch/arm64/kernel/sys_compat.c b/arch/arm64/kernel/sys_compat.c
index 967e92fdff0..906e3bd270b 100644
--- a/arch/arm64/kernel/sys_compat.c
+++ b/arch/arm64/kernel/sys_compat.c
@@ -18,8 +18,6 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#define __SYSCALL_COMPAT
-
 #include <linux/compat.h>
 #include <linux/personality.h>
 #include <linux/sched.h>
@@ -28,7 +26,7 @@
 #include <linux/uaccess.h>
 
 #include <asm/cacheflush.h>
-#include <asm/unistd.h>
+#include <asm/unistd32.h>
 
 asmlinkage int compat_sys_fork(struct pt_regs *regs)
 {
@@ -56,14 +54,14 @@ asmlinkage int compat_sys_execve(const char __user *filenamei,
 				 struct pt_regs *regs)
 {
 	int error;
-	char * filename;
+	struct filename *filename;
 
 	filename = getname(filenamei);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = compat_do_execve(filename, compat_ptr(argv), compat_ptr(envp),
-				 regs);
+	error = compat_do_execve(filename->name, compat_ptr(argv),
+					compat_ptr(envp), regs);
 	putname(filename);
 out:
 	return error;
@@ -84,26 +82,6 @@ asmlinkage int compat_sys_sched_rr_get_interval(compat_pid_t pid,
 	return ret;
 }
 
-asmlinkage int compat_sys_sendfile(int out_fd, int in_fd,
-				   compat_off_t __user *offset, s32 count)
-{
-	mm_segment_t old_fs = get_fs();
-	int ret;
-	off_t of;
-
-	if (offset && get_user(of, offset))
-		return -EFAULT;
-
-	set_fs(KERNEL_DS);
-	ret = sys_sendfile(out_fd, in_fd, offset ? (off_t __user *)&of : NULL,
-			   count);
-	set_fs(old_fs);
-
-	if (offset && put_user(of, offset))
-		return -EFAULT;
-	return ret;
-}
-
 static inline void
 do_compat_cache_op(unsigned long start, unsigned long end, int flags)
 {
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 5eb244453a5..4bd7579ec9e 100644
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -61,12 +61,10 @@ static struct dma_map_ops arm64_swiotlb_dma_ops = {
 	.mapping_error = swiotlb_dma_mapping_error,
 };
 
-void __init swiotlb_init_with_default_size(size_t default_size, int verbose);
-
-void __init arm64_swiotlb_init(size_t max_size)
+void __init arm64_swiotlb_init(void)
 {
 	dma_ops = &arm64_swiotlb_dma_ops;
-	swiotlb_init_with_default_size(min((size_t)SZ_64M, max_size), 1);
+	swiotlb_init(1);
 }
 
 #define PREALLOC_DMA_DEBUG_ENTRIES	4096
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 5f719ba949b..efbf7df05d3 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -301,10 +301,7 @@ void __init mem_init(void)
 	unsigned long reserved_pages, free_pages;
 	struct memblock_region *reg;
 
-#if CONFIG_SWIOTLB
-	extern void __init arm64_swiotlb_init(size_t max_size);
-	arm64_swiotlb_init(max_pfn << (PAGE_SHIFT - 1));
-#endif
+	arm64_swiotlb_init();
 
 	max_mapnr   = pfn_to_page(max_pfn + PHYS_PFN_OFFSET) - mem_map;
 
diff --git a/arch/arm64/mm/mm.h b/arch/arm64/mm/mm.h
index d8d6e7851c1..916701e6d04 100644
--- a/arch/arm64/mm/mm.h
+++ b/arch/arm64/mm/mm.h
@@ -1,2 +1,3 @@
 extern void __flush_dcache_page(struct page *page);
 extern void __init bootmem_init(void);
+extern void __init arm64_swiotlb_init(void);
diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
index 5ade51c8a87..06e73bf665e 100644
--- a/arch/avr32/Kconfig
+++ b/arch/avr32/Kconfig
@@ -15,6 +15,8 @@ config AVR32
 	select ARCH_WANT_IPC_PARSE_VERSION
 	select ARCH_HAVE_NMI_SAFE_CMPXCHG
 	select GENERIC_CLOCKEVENTS
+	select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_RELA
 	help
 	  AVR32 is a high-performance 32-bit RISC microprocessor core,
 	  designed for cost-sensitive embedded applications, with particular
diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild
index 3136628ba8d..4807ded352c 100644
--- a/arch/avr32/include/asm/Kbuild
+++ b/arch/avr32/include/asm/Kbuild
@@ -1,3 +1,3 @@
-include include/asm-generic/Kbuild.asm
 
-header-y	+= cachectl.h
+generic-y	+= clkdev.h
+generic-y	+= exec.h
diff --git a/arch/avr32/include/asm/module.h b/arch/avr32/include/asm/module.h
index 451444538a1..3f083d385a6 100644
--- a/arch/avr32/include/asm/module.h
+++ b/arch/avr32/include/asm/module.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_AVR32_MODULE_H
 #define __ASM_AVR32_MODULE_H
 
+#include <asm-generic/module.h>
+
 struct mod_arch_syminfo {
 	unsigned long got_offset;
 	int got_initialized;
@@ -17,10 +19,6 @@ struct mod_arch_specific {
 	struct mod_arch_syminfo *syminfo;
 };
 
-#define Elf_Shdr		Elf32_Shdr
-#define Elf_Sym			Elf32_Sym
-#define Elf_Ehdr		Elf32_Ehdr
-
 #define MODULE_PROC_FAMILY "AVR32v1"
 
 #define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
diff --git a/arch/avr32/include/asm/param.h b/arch/avr32/include/asm/param.h
index 34bc8d4c3b2..009a167aea1 100644
--- a/arch/avr32/include/asm/param.h
+++ b/arch/avr32/include/asm/param.h
@@ -1,23 +1,9 @@
 #ifndef __ASM_AVR32_PARAM_H
 #define __ASM_AVR32_PARAM_H
 
-#ifdef __KERNEL__
+#include <uapi/asm/param.h>
+
 # define HZ		CONFIG_HZ
 # define USER_HZ	100		/* User interfaces are in "ticks" */
 # define CLOCKS_PER_SEC	(USER_HZ)	/* frequency at which times() counts */
-#endif
-
-#ifndef HZ
-# define HZ		100
-#endif
-
-/* TODO: Should be configurable */
-#define EXEC_PAGESIZE	4096
-
-#ifndef NOGROUP
-# define NOGROUP	(-1)
-#endif
-
-#define MAXHOSTNAMELEN	64
-
 #endif /* __ASM_AVR32_PARAM_H */
diff --git a/arch/avr32/include/asm/ptrace.h b/arch/avr32/include/asm/ptrace.h
index c67a007f672..8d3c412fc65 100644
--- a/arch/avr32/include/asm/ptrace.h
+++ b/arch/avr32/include/asm/ptrace.h
@@ -8,119 +8,9 @@
 #ifndef __ASM_AVR32_PTRACE_H
 #define __ASM_AVR32_PTRACE_H
 
-#define PTRACE_GETREGS		12
-#define PTRACE_SETREGS		13
-
-/*
- * Status Register bits
- */
-#define SR_H		0x20000000
-#define SR_J		0x10000000
-#define SR_DM		0x08000000
-#define SR_D		0x04000000
-#define MODE_NMI	0x01c00000
-#define MODE_EXCEPTION	0x01800000
-#define MODE_INT3	0x01400000
-#define MODE_INT2	0x01000000
-#define MODE_INT1	0x00c00000
-#define MODE_INT0	0x00800000
-#define MODE_SUPERVISOR	0x00400000
-#define MODE_USER	0x00000000
-#define MODE_MASK	0x01c00000
-#define SR_EM		0x00200000
-#define SR_I3M		0x00100000
-#define SR_I2M		0x00080000
-#define SR_I1M		0x00040000
-#define SR_I0M		0x00020000
-#define SR_GM		0x00010000
-
-#define SR_H_BIT	29
-#define SR_J_BIT	28
-#define SR_DM_BIT	27
-#define SR_D_BIT	26
-#define MODE_SHIFT	22
-#define SR_EM_BIT	21
-#define SR_I3M_BIT	20
-#define SR_I2M_BIT	19
-#define SR_I1M_BIT	18
-#define SR_I0M_BIT	17
-#define SR_GM_BIT	16
-
-/* The user-visible part */
-#define SR_L		0x00000020
-#define SR_Q		0x00000010
-#define SR_V		0x00000008
-#define SR_N		0x00000004
-#define SR_Z		0x00000002
-#define SR_C		0x00000001
-
-#define SR_L_BIT	5
-#define SR_Q_BIT	4
-#define SR_V_BIT	3
-#define SR_N_BIT	2
-#define SR_Z_BIT	1
-#define SR_C_BIT	0
-
-/*
- * The order is defined by the stmts instruction. r0 is stored first,
- * so it gets the highest address.
- *
- * Registers 0-12 are general-purpose registers (r12 is normally used for
- * the function return value).
- * Register 13 is the stack pointer
- * Register 14 is the link register
- * Register 15 is the program counter (retrieved from the RAR sysreg)
- */
-#define FRAME_SIZE_FULL 72
-#define REG_R12_ORIG	68
-#define REG_R0		64
-#define REG_R1		60
-#define REG_R2		56
-#define REG_R3		52
-#define REG_R4		48
-#define REG_R5		44
-#define REG_R6		40
-#define REG_R7		36
-#define REG_R8		32
-#define REG_R9		28
-#define REG_R10		24
-#define REG_R11		20
-#define REG_R12		16
-#define REG_SP		12
-#define REG_LR		 8
-
-#define FRAME_SIZE_MIN	 8
-#define REG_PC		 4
-#define REG_SR		 0
+#include <uapi/asm/ptrace.h>
 
 #ifndef __ASSEMBLY__
-struct pt_regs {
-	/* These are always saved */
-	unsigned long sr;
-	unsigned long pc;
-
-	/* These are sometimes saved */
-	unsigned long lr;
-	unsigned long sp;
-	unsigned long r12;
-	unsigned long r11;
-	unsigned long r10;
-	unsigned long r9;
-	unsigned long r8;
-	unsigned long r7;
-	unsigned long r6;
-	unsigned long r5;
-	unsigned long r4;
-	unsigned long r3;
-	unsigned long r2;
-	unsigned long r1;
-	unsigned long r0;
-
-	/* Only saved on system call */
-	unsigned long r12_orig;
-};
-
-#ifdef __KERNEL__
 
 #include <asm/ocd.h>
 
@@ -150,8 +40,5 @@ static __inline__ int valid_user_regs(struct pt_regs *regs)
 }
 
 
-#endif /* __KERNEL__ */
-
 #endif /* ! __ASSEMBLY__ */
-
 #endif /* __ASM_AVR32_PTRACE_H */
diff --git a/arch/avr32/include/asm/setup.h b/arch/avr32/include/asm/setup.h
index 160543dbec7..73490ae0c47 100644
--- a/arch/avr32/include/asm/setup.h
+++ b/arch/avr32/include/asm/setup.h
@@ -11,9 +11,8 @@
 #ifndef __ASM_AVR32_SETUP_H__
 #define __ASM_AVR32_SETUP_H__
 
-#define COMMAND_LINE_SIZE 256
+#include <uapi/asm/setup.h>
 
-#ifdef __KERNEL__
 
 /* Magic number indicating that a tag table is present */
 #define ATAG_MAGIC	0xa2a25441
@@ -142,6 +141,4 @@ void setup_processor(void);
 
 #endif /* !__ASSEMBLY__ */
 
-#endif  /*  __KERNEL__  */
-
 #endif /* __ASM_AVR32_SETUP_H__ */
diff --git a/arch/avr32/include/asm/signal.h b/arch/avr32/include/asm/signal.h
index ae56849fdb2..4d502fd6bad 100644
--- a/arch/avr32/include/asm/signal.h
+++ b/arch/avr32/include/asm/signal.h
@@ -8,12 +8,8 @@
 #ifndef __ASM_AVR32_SIGNAL_H
 #define __ASM_AVR32_SIGNAL_H
 
-#include <linux/types.h>
+#include <uapi/asm/signal.h>
 
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-#ifdef __KERNEL__
 /* Most things should be clean enough to redefine this at will, if care
    is taken to make libc match.  */
 
@@ -27,94 +23,6 @@ typedef struct {
 	unsigned long sig[_NSIG_WORDS];
 } sigset_t;
 
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-#define NSIG		32
-typedef unsigned long sigset_t;
-
-#endif /* __KERNEL__ */
-
-#define SIGHUP		 1
-#define SIGINT		 2
-#define SIGQUIT		 3
-#define SIGILL		 4
-#define SIGTRAP		 5
-#define SIGABRT		 6
-#define SIGIOT		 6
-#define SIGBUS		 7
-#define SIGFPE		 8
-#define SIGKILL		 9
-#define SIGUSR1		10
-#define SIGSEGV		11
-#define SIGUSR2		12
-#define SIGPIPE		13
-#define SIGALRM		14
-#define SIGTERM		15
-#define SIGSTKFLT	16
-#define SIGCHLD		17
-#define SIGCONT		18
-#define SIGSTOP		19
-#define SIGTSTP		20
-#define SIGTTIN		21
-#define SIGTTOU		22
-#define SIGURG		23
-#define SIGXCPU		24
-#define SIGXFSZ		25
-#define SIGVTALRM	26
-#define SIGPROF		27
-#define SIGWINCH	28
-#define SIGIO		29
-#define SIGPOLL		SIGIO
-/*
-#define SIGLOST		29
-*/
-#define SIGPWR		30
-#define SIGSYS		31
-#define	SIGUNUSED	31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN	32
-#define SIGRTMAX	(_NSIG-1)
-
-/*
- * SA_FLAGS values:
- *
- * SA_NOCLDSTOP		flag to turn off SIGCHLD when children stop.
- * SA_NOCLDWAIT		flag on SIGCHLD to inhibit zombies.
- * SA_SIGINFO		deliver the signal with SIGINFO structs
- * SA_ONSTACK		indicates that a registered stack_t will be used.
- * SA_RESTART		flag to get restarting signals (which were the default long ago)
- * SA_NODEFER		prevents the current signal from being masked in the handler.
- * SA_RESETHAND		clears the handler when the signal is delivered.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP	0x00000001
-#define SA_NOCLDWAIT	0x00000002
-#define SA_SIGINFO	0x00000004
-#define SA_RESTORER	0x04000000
-#define SA_ONSTACK	0x08000000
-#define SA_RESTART	0x10000000
-#define SA_NODEFER	0x40000000
-#define SA_RESETHAND	0x80000000
-
-#define SA_NOMASK	SA_NODEFER
-#define SA_ONESHOT	SA_RESETHAND
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK	1
-#define SS_DISABLE	2
-
-#define MINSIGSTKSZ	2048
-#define SIGSTKSZ	8192
-
-#include <asm-generic/signal-defs.h>
-
-#ifdef __KERNEL__
 struct sigaction {
 	__sighandler_t sa_handler;
 	unsigned long sa_flags;
@@ -125,37 +33,10 @@ struct sigaction {
 struct k_sigaction {
 	struct sigaction sa;
 };
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-struct sigaction {
-	union {
-		__sighandler_t _sa_handler;
-		void (*_sa_sigaction)(int, struct siginfo *, void *);
-	} _u;
-	sigset_t sa_mask;
-	unsigned long sa_flags;
-	void (*sa_restorer)(void);
-};
-
-#define sa_handler	_u._sa_handler
-#define sa_sigaction	_u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
-typedef struct sigaltstack {
-	void __user *ss_sp;
-	int ss_flags;
-	size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
 
 #include <asm/sigcontext.h>
 #undef __HAVE_ARCH_SIG_BITOPS
 
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 
-#endif /* __KERNEL__ */
-
 #endif
diff --git a/arch/avr32/include/asm/termios.h b/arch/avr32/include/asm/termios.h
index dd7e9da2548..9d594376dbd 100644
--- a/arch/avr32/include/asm/termios.h
+++ b/arch/avr32/include/asm/termios.h
@@ -8,45 +8,8 @@
 #ifndef __ASM_AVR32_TERMIOS_H
 #define __ASM_AVR32_TERMIOS_H
 
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
+#include <uapi/asm/termios.h>
 
-struct winsize {
-	unsigned short ws_row;
-	unsigned short ws_col;
-	unsigned short ws_xpixel;
-	unsigned short ws_ypixel;
-};
-
-#define NCC 8
-struct termio {
-	unsigned short c_iflag;		/* input mode flags */
-	unsigned short c_oflag;		/* output mode flags */
-	unsigned short c_cflag;		/* control mode flags */
-	unsigned short c_lflag;		/* local mode flags */
-	unsigned char c_line;		/* line discipline */
-	unsigned char c_cc[NCC];	/* control characters */
-};
-
-/* modem lines */
-#define TIOCM_LE	0x001
-#define TIOCM_DTR	0x002
-#define TIOCM_RTS	0x004
-#define TIOCM_ST	0x008
-#define TIOCM_SR	0x010
-#define TIOCM_CTS	0x020
-#define TIOCM_CAR	0x040
-#define TIOCM_RNG	0x080
-#define TIOCM_DSR	0x100
-#define TIOCM_CD	TIOCM_CAR
-#define TIOCM_RI	TIOCM_RNG
-#define TIOCM_OUT1	0x2000
-#define TIOCM_OUT2	0x4000
-#define TIOCM_LOOP	0x8000
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-
-#ifdef __KERNEL__
 /*	intr=^C		quit=^\		erase=del	kill=^U
 	eof=^D		vtime=\0	vmin=\1		sxtc=\0
 	start=^Q	stop=^S		susp=^Z		eol=\0
@@ -57,6 +20,4 @@ struct termio {
 
 #include <asm-generic/termios-base.h>
 
-#endif	/* __KERNEL__ */
-
 #endif	/* __ASM_AVR32_TERMIOS_H */
diff --git a/arch/avr32/include/asm/thread_info.h b/arch/avr32/include/asm/thread_info.h
index e5deda4691d..6dc62e1f94c 100644
--- a/arch/avr32/include/asm/thread_info.h
+++ b/arch/avr32/include/asm/thread_info.h
@@ -77,8 +77,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SYSCALL_TRACE       0       /* syscall trace active */
 #define TIF_SIGPENDING          1       /* signal pending */
 #define TIF_NEED_RESCHED        2       /* rescheduling necessary */
-#define TIF_POLLING_NRFLAG      3       /* true if poll_idle() is polling
-					   TIF_NEED_RESCHED */
 #define TIF_BREAKPOINT		4	/* enter monitor mode on return */
 #define TIF_SINGLE_STEP		5	/* single step in progress */
 #define TIF_MEMDIE		6	/* is terminating due to OOM killer */
@@ -91,10 +89,9 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
-#define _TIF_POLLING_NRFLAG	(1 << TIF_POLLING_NRFLAG)
+#define _TIF_BREAKPOINT		(1 << TIF_BREAKPOINT)
 #define _TIF_SINGLE_STEP	(1 << TIF_SINGLE_STEP)
 #define _TIF_MEMDIE		(1 << TIF_MEMDIE)
-#define _TIF_RESTORE_SIGMASK	(1 << TIF_RESTORE_SIGMASK)
 #define _TIF_CPU_GOING_TO_SLEEP (1 << TIF_CPU_GOING_TO_SLEEP)
 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
 
@@ -102,17 +99,14 @@ static inline struct thread_info *current_thread_info(void)
 
 /* work to do on interrupt/exception return */
 #define _TIF_WORK_MASK				\
-	((1 << TIF_SIGPENDING)			\
+	(_TIF_SIGPENDING			\
 	 | _TIF_NOTIFY_RESUME			\
-	 | (1 << TIF_NEED_RESCHED)		\
-	 | (1 << TIF_POLLING_NRFLAG)		\
-	 | (1 << TIF_BREAKPOINT)		\
-	 | (1 << TIF_RESTORE_SIGMASK))
+	 | _TIF_NEED_RESCHED			\
+	 | _TIF_BREAKPOINT)
 
 /* work to do on any return to userspace */
-#define _TIF_ALLWORK_MASK	(_TIF_WORK_MASK | (1 << TIF_SYSCALL_TRACE) | \
-				 _TIF_NOTIFY_RESUME)
+#define _TIF_ALLWORK_MASK	(_TIF_WORK_MASK | _TIF_SYSCALL_TRACE)
 /* work to do on return from debug mode */
-#define _TIF_DBGWORK_MASK	(_TIF_WORK_MASK & ~(1 << TIF_BREAKPOINT))
+#define _TIF_DBGWORK_MASK	(_TIF_WORK_MASK & ~_TIF_BREAKPOINT)
 
 #endif /* __ASM_AVR32_THREAD_INFO_H */
diff --git a/arch/avr32/include/asm/types.h b/arch/avr32/include/asm/types.h
index 9bb2d8b2e6c..59324058069 100644
--- a/arch/avr32/include/asm/types.h
+++ b/arch/avr32/include/asm/types.h
@@ -8,16 +8,12 @@
 #ifndef __ASM_AVR32_TYPES_H
 #define __ASM_AVR32_TYPES_H
 
-#include <asm-generic/int-ll64.h>
+#include <uapi/asm/types.h>
 
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
-#ifdef __KERNEL__
 
 #define BITS_PER_LONG 32
 
-#endif /* __KERNEL__ */
-
-
 #endif /* __ASM_AVR32_TYPES_H */
diff --git a/arch/avr32/include/asm/unistd.h b/arch/avr32/include/asm/unistd.h
index 1358e366f4b..157b4bd3d5e 100644
--- a/arch/avr32/include/asm/unistd.h
+++ b/arch/avr32/include/asm/unistd.h
@@ -8,300 +8,8 @@
 #ifndef __ASM_AVR32_UNISTD_H
 #define __ASM_AVR32_UNISTD_H
 
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall      0
-#define __NR_exit		  1
-#define __NR_fork		  2
-#define __NR_read		  3
-#define __NR_write		  4
-#define __NR_open		  5
-#define __NR_close		  6
-#define __NR_umask		  7
-#define __NR_creat		  8
-#define __NR_link		  9
-#define __NR_unlink		 10
-#define __NR_execve		 11
-#define __NR_chdir		 12
-#define __NR_time		 13
-#define __NR_mknod		 14
-#define __NR_chmod		 15
-#define __NR_chown		 16
-#define __NR_lchown		 17
-#define __NR_lseek		 18
-#define __NR__llseek		 19
-#define __NR_getpid		 20
-#define __NR_mount		 21
-#define __NR_umount2		 22
-#define __NR_setuid		 23
-#define __NR_getuid		 24
-#define __NR_stime		 25
-#define __NR_ptrace		 26
-#define __NR_alarm		 27
-#define __NR_pause		 28
-#define __NR_utime		 29
-#define __NR_stat		 30
-#define __NR_fstat		 31
-#define __NR_lstat		 32
-#define __NR_access		 33
-#define __NR_chroot		 34
-#define __NR_sync		 35
-#define __NR_fsync		 36
-#define __NR_kill		 37
-#define __NR_rename		 38
-#define __NR_mkdir		 39
-#define __NR_rmdir		 40
-#define __NR_dup		 41
-#define __NR_pipe		 42
-#define __NR_times		 43
-#define __NR_clone		 44
-#define __NR_brk		 45
-#define __NR_setgid		 46
-#define __NR_getgid		 47
-#define __NR_getcwd		 48
-#define __NR_geteuid		 49
-#define __NR_getegid		 50
-#define __NR_acct		 51
-#define __NR_setfsuid		 52
-#define __NR_setfsgid		 53
-#define __NR_ioctl		 54
-#define __NR_fcntl		 55
-#define __NR_setpgid		 56
-#define __NR_mremap		 57
-#define __NR_setresuid		 58
-#define __NR_getresuid		 59
-#define __NR_setreuid		 60
-#define __NR_setregid		 61
-#define __NR_ustat		 62
-#define __NR_dup2		 63
-#define __NR_getppid		 64
-#define __NR_getpgrp		 65
-#define __NR_setsid		 66
-#define __NR_rt_sigaction	 67
-#define __NR_rt_sigreturn	 68
-#define __NR_rt_sigprocmask	 69
-#define __NR_rt_sigpending	 70
-#define __NR_rt_sigtimedwait	 71
-#define __NR_rt_sigqueueinfo	 72
-#define __NR_rt_sigsuspend	 73
-#define __NR_sethostname	 74
-#define __NR_setrlimit		 75
-#define __NR_getrlimit		 76	/* SuS compliant getrlimit */
-#define __NR_getrusage		 77
-#define __NR_gettimeofday	 78
-#define __NR_settimeofday	 79
-#define __NR_getgroups		 80
-#define __NR_setgroups		 81
-#define __NR_select		 82
-#define __NR_symlink		 83
-#define __NR_fchdir		 84
-#define __NR_readlink		 85
-#define __NR_pread		 86
-#define __NR_pwrite		 87
-#define __NR_swapon		 88
-#define __NR_reboot		 89
-#define __NR_mmap2		 90
-#define __NR_munmap		 91
-#define __NR_truncate		 92
-#define __NR_ftruncate		 93
-#define __NR_fchmod		 94
-#define __NR_fchown		 95
-#define __NR_getpriority	 96
-#define __NR_setpriority	 97
-#define __NR_wait4		 98
-#define __NR_statfs		 99
-#define __NR_fstatfs		100
-#define __NR_vhangup		101
-#define __NR_sigaltstack	102
-#define __NR_syslog		103
-#define __NR_setitimer		104
-#define __NR_getitimer		105
-#define __NR_swapoff		106
-#define __NR_sysinfo		107
-/* 108 was __NR_ipc for a little while */
-#define __NR_sendfile		109
-#define __NR_setdomainname	110
-#define __NR_uname		111
-#define __NR_adjtimex		112
-#define __NR_mprotect		113
-#define __NR_vfork		114
-#define __NR_init_module	115
-#define __NR_delete_module	116
-#define __NR_quotactl		117
-#define __NR_getpgid		118
-#define __NR_bdflush		119
-#define __NR_sysfs		120
-#define __NR_personality	121
-#define __NR_afs_syscall	122 /* Syscall for Andrew File System */
-#define __NR_getdents		123
-#define __NR_flock		124
-#define __NR_msync		125
-#define __NR_readv		126
-#define __NR_writev		127
-#define __NR_getsid		128
-#define __NR_fdatasync		129
-#define __NR__sysctl		130
-#define __NR_mlock		131
-#define __NR_munlock		132
-#define __NR_mlockall		133
-#define __NR_munlockall		134
-#define __NR_sched_setparam		135
-#define __NR_sched_getparam		136
-#define __NR_sched_setscheduler		137
-#define __NR_sched_getscheduler		138
-#define __NR_sched_yield		139
-#define __NR_sched_get_priority_max	140
-#define __NR_sched_get_priority_min	141
-#define __NR_sched_rr_get_interval	142
-#define __NR_nanosleep		143
-#define __NR_poll		144
-#define __NR_nfsservctl		145
-#define __NR_setresgid		146
-#define __NR_getresgid		147
-#define __NR_prctl              148
-#define __NR_socket		149
-#define __NR_bind		150
-#define __NR_connect		151
-#define __NR_listen		152
-#define __NR_accept		153
-#define __NR_getsockname	154
-#define __NR_getpeername	155
-#define __NR_socketpair		156
-#define __NR_send		157
-#define __NR_recv		158
-#define __NR_sendto		159
-#define __NR_recvfrom		160
-#define __NR_shutdown		161
-#define __NR_setsockopt		162
-#define __NR_getsockopt		163
-#define __NR_sendmsg		164
-#define __NR_recvmsg		165
-#define __NR_truncate64		166
-#define __NR_ftruncate64	167
-#define __NR_stat64		168
-#define __NR_lstat64		169
-#define __NR_fstat64		170
-#define __NR_pivot_root		171
-#define __NR_mincore		172
-#define __NR_madvise		173
-#define __NR_getdents64		174
-#define __NR_fcntl64		175
-#define __NR_gettid		176
-#define __NR_readahead		177
-#define __NR_setxattr		178
-#define __NR_lsetxattr		179
-#define __NR_fsetxattr		180
-#define __NR_getxattr		181
-#define __NR_lgetxattr		182
-#define __NR_fgetxattr		183
-#define __NR_listxattr		184
-#define __NR_llistxattr		185
-#define __NR_flistxattr		186
-#define __NR_removexattr	187
-#define __NR_lremovexattr	188
-#define __NR_fremovexattr	189
-#define __NR_tkill		190
-#define __NR_sendfile64		191
-#define __NR_futex		192
-#define __NR_sched_setaffinity	193
-#define __NR_sched_getaffinity	194
-#define __NR_capget		195
-#define __NR_capset		196
-#define __NR_io_setup		197
-#define __NR_io_destroy		198
-#define __NR_io_getevents	199
-#define __NR_io_submit		200
-#define __NR_io_cancel		201
-#define __NR_fadvise64		202
-#define __NR_exit_group		203
-#define __NR_lookup_dcookie	204
-#define __NR_epoll_create	205
-#define __NR_epoll_ctl		206
-#define __NR_epoll_wait		207
-#define __NR_remap_file_pages	208
-#define __NR_set_tid_address	209
-
-#define __NR_timer_create	210
-#define __NR_timer_settime	211
-#define __NR_timer_gettime	212
-#define __NR_timer_getoverrun	213
-#define __NR_timer_delete	214
-#define __NR_clock_settime	215
-#define __NR_clock_gettime	216
-#define __NR_clock_getres	217
-#define __NR_clock_nanosleep	218
-#define __NR_statfs64		219
-#define __NR_fstatfs64		220
-#define __NR_tgkill		221
-				/* 222 reserved for tux */
-#define __NR_utimes		223
-#define __NR_fadvise64_64	224
-
-#define __NR_cacheflush		225
+#include <uapi/asm/unistd.h>
 
-#define __NR_vserver		226
-#define __NR_mq_open		227
-#define __NR_mq_unlink		228
-#define __NR_mq_timedsend	229
-#define __NR_mq_timedreceive	230
-#define __NR_mq_notify		231
-#define __NR_mq_getsetattr	232
-#define __NR_kexec_load		233
-#define __NR_waitid		234
-#define __NR_add_key		235
-#define __NR_request_key	236
-#define __NR_keyctl		237
-#define __NR_ioprio_set		238
-#define __NR_ioprio_get		239
-#define __NR_inotify_init	240
-#define __NR_inotify_add_watch	241
-#define __NR_inotify_rm_watch	242
-#define __NR_openat		243
-#define __NR_mkdirat		244
-#define __NR_mknodat		245
-#define __NR_fchownat		246
-#define __NR_futimesat		247
-#define __NR_fstatat64		248
-#define __NR_unlinkat		249
-#define __NR_renameat		250
-#define __NR_linkat		251
-#define __NR_symlinkat		252
-#define __NR_readlinkat		253
-#define __NR_fchmodat		254
-#define __NR_faccessat		255
-#define __NR_pselect6		256
-#define __NR_ppoll		257
-#define __NR_unshare		258
-#define __NR_set_robust_list	259
-#define __NR_get_robust_list	260
-#define __NR_splice		261
-#define __NR_sync_file_range	262
-#define __NR_tee		263
-#define __NR_vmsplice		264
-#define __NR_epoll_pwait	265
-
-#define __NR_msgget		266
-#define __NR_msgsnd		267
-#define __NR_msgrcv		268
-#define __NR_msgctl		269
-#define __NR_semget		270
-#define __NR_semop		271
-#define __NR_semctl		272
-#define __NR_semtimedop		273
-#define __NR_shmat		274
-#define __NR_shmget		275
-#define __NR_shmdt		276
-#define __NR_shmctl		277
-
-#define __NR_utimensat		278
-#define __NR_signalfd		279
-/* 280 was __NR_timerfd */
-#define __NR_eventfd		281
-#define __NR_setns		283
-
-#ifdef __KERNEL__
 #define NR_syscalls		284
 
 /* Old stuff */
@@ -340,6 +48,4 @@
  */
 #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
 
-#endif /* __KERNEL__ */
-
 #endif /* __ASM_AVR32_UNISTD_H */
diff --git a/arch/avr32/include/uapi/asm/Kbuild b/arch/avr32/include/uapi/asm/Kbuild
index baebb3da1d4..df53e7a4677 100644
--- a/arch/avr32/include/uapi/asm/Kbuild
+++ b/arch/avr32/include/uapi/asm/Kbuild
@@ -1,3 +1,35 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += byteorder.h
+header-y += cachectl.h
+header-y += errno.h
+header-y += fcntl.h
+header-y += ioctl.h
+header-y += ioctls.h
+header-y += ipcbuf.h
+header-y += kvm_para.h
+header-y += mman.h
+header-y += msgbuf.h
+header-y += param.h
+header-y += poll.h
+header-y += posix_types.h
+header-y += ptrace.h
+header-y += resource.h
+header-y += sembuf.h
+header-y += setup.h
+header-y += shmbuf.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += socket.h
+header-y += sockios.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += termbits.h
+header-y += termios.h
+header-y += types.h
+header-y += unistd.h
diff --git a/arch/avr32/include/asm/auxvec.h b/arch/avr32/include/uapi/asm/auxvec.h
index d5dd435bf8f..d5dd435bf8f 100644
--- a/arch/avr32/include/asm/auxvec.h
+++ b/arch/avr32/include/uapi/asm/auxvec.h
diff --git a/arch/avr32/include/asm/bitsperlong.h b/arch/avr32/include/uapi/asm/bitsperlong.h
index 6dc0bb0c13b..6dc0bb0c13b 100644
--- a/arch/avr32/include/asm/bitsperlong.h
+++ b/arch/avr32/include/uapi/asm/bitsperlong.h
diff --git a/arch/avr32/include/asm/byteorder.h b/arch/avr32/include/uapi/asm/byteorder.h
index 50abc21619a..50abc21619a 100644
--- a/arch/avr32/include/asm/byteorder.h
+++ b/arch/avr32/include/uapi/asm/byteorder.h
diff --git a/arch/avr32/include/asm/cachectl.h b/arch/avr32/include/uapi/asm/cachectl.h
index 4faf1ce6006..4faf1ce6006 100644
--- a/arch/avr32/include/asm/cachectl.h
+++ b/arch/avr32/include/uapi/asm/cachectl.h
diff --git a/arch/avr32/include/asm/errno.h b/arch/avr32/include/uapi/asm/errno.h
index 558a7249f06..558a7249f06 100644
--- a/arch/avr32/include/asm/errno.h
+++ b/arch/avr32/include/uapi/asm/errno.h
diff --git a/arch/avr32/include/asm/fcntl.h b/arch/avr32/include/uapi/asm/fcntl.h
index 14c0c4402b1..14c0c4402b1 100644
--- a/arch/avr32/include/asm/fcntl.h
+++ b/arch/avr32/include/uapi/asm/fcntl.h
diff --git a/arch/avr32/include/asm/ioctl.h b/arch/avr32/include/uapi/asm/ioctl.h
index c8472c1398e..c8472c1398e 100644
--- a/arch/avr32/include/asm/ioctl.h
+++ b/arch/avr32/include/uapi/asm/ioctl.h
diff --git a/arch/avr32/include/asm/ioctls.h b/arch/avr32/include/uapi/asm/ioctls.h
index 909cf66feaf..909cf66feaf 100644
--- a/arch/avr32/include/asm/ioctls.h
+++ b/arch/avr32/include/uapi/asm/ioctls.h
diff --git a/arch/avr32/include/asm/ipcbuf.h b/arch/avr32/include/uapi/asm/ipcbuf.h
index 84c7e51cb6d..84c7e51cb6d 100644
--- a/arch/avr32/include/asm/ipcbuf.h
+++ b/arch/avr32/include/uapi/asm/ipcbuf.h
diff --git a/arch/avr32/include/asm/kvm_para.h b/arch/avr32/include/uapi/asm/kvm_para.h
index 14fab8f0b95..14fab8f0b95 100644
--- a/arch/avr32/include/asm/kvm_para.h
+++ b/arch/avr32/include/uapi/asm/kvm_para.h
diff --git a/arch/avr32/include/asm/mman.h b/arch/avr32/include/uapi/asm/mman.h
index 8eebf89f5ab..8eebf89f5ab 100644
--- a/arch/avr32/include/asm/mman.h
+++ b/arch/avr32/include/uapi/asm/mman.h
diff --git a/arch/avr32/include/asm/msgbuf.h b/arch/avr32/include/uapi/asm/msgbuf.h
index ac18bc4da7f..ac18bc4da7f 100644
--- a/arch/avr32/include/asm/msgbuf.h
+++ b/arch/avr32/include/uapi/asm/msgbuf.h
diff --git a/arch/avr32/include/uapi/asm/param.h b/arch/avr32/include/uapi/asm/param.h
new file mode 100644
index 00000000000..d28aa5ee6d3
--- /dev/null
+++ b/arch/avr32/include/uapi/asm/param.h
@@ -0,0 +1,18 @@
+#ifndef _UAPI__ASM_AVR32_PARAM_H
+#define _UAPI__ASM_AVR32_PARAM_H
+
+
+#ifndef HZ
+# define HZ		100
+#endif
+
+/* TODO: Should be configurable */
+#define EXEC_PAGESIZE	4096
+
+#ifndef NOGROUP
+# define NOGROUP	(-1)
+#endif
+
+#define MAXHOSTNAMELEN	64
+
+#endif /* _UAPI__ASM_AVR32_PARAM_H */
diff --git a/arch/avr32/include/asm/poll.h b/arch/avr32/include/uapi/asm/poll.h
index c98509d3149..c98509d3149 100644
--- a/arch/avr32/include/asm/poll.h
+++ b/arch/avr32/include/uapi/asm/poll.h
diff --git a/arch/avr32/include/asm/posix_types.h b/arch/avr32/include/uapi/asm/posix_types.h
index 9ba9e749b3f..9ba9e749b3f 100644
--- a/arch/avr32/include/asm/posix_types.h
+++ b/arch/avr32/include/uapi/asm/posix_types.h
diff --git a/arch/avr32/include/uapi/asm/ptrace.h b/arch/avr32/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..fe8c16275bc
--- /dev/null
+++ b/arch/avr32/include/uapi/asm/ptrace.h
@@ -0,0 +1,126 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _UAPI__ASM_AVR32_PTRACE_H
+#define _UAPI__ASM_AVR32_PTRACE_H
+
+#define PTRACE_GETREGS		12
+#define PTRACE_SETREGS		13
+
+/*
+ * Status Register bits
+ */
+#define SR_H		0x20000000
+#define SR_J		0x10000000
+#define SR_DM		0x08000000
+#define SR_D		0x04000000
+#define MODE_NMI	0x01c00000
+#define MODE_EXCEPTION	0x01800000
+#define MODE_INT3	0x01400000
+#define MODE_INT2	0x01000000
+#define MODE_INT1	0x00c00000
+#define MODE_INT0	0x00800000
+#define MODE_SUPERVISOR	0x00400000
+#define MODE_USER	0x00000000
+#define MODE_MASK	0x01c00000
+#define SR_EM		0x00200000
+#define SR_I3M		0x00100000
+#define SR_I2M		0x00080000
+#define SR_I1M		0x00040000
+#define SR_I0M		0x00020000
+#define SR_GM		0x00010000
+
+#define SR_H_BIT	29
+#define SR_J_BIT	28
+#define SR_DM_BIT	27
+#define SR_D_BIT	26
+#define MODE_SHIFT	22
+#define SR_EM_BIT	21
+#define SR_I3M_BIT	20
+#define SR_I2M_BIT	19
+#define SR_I1M_BIT	18
+#define SR_I0M_BIT	17
+#define SR_GM_BIT	16
+
+/* The user-visible part */
+#define SR_L		0x00000020
+#define SR_Q		0x00000010
+#define SR_V		0x00000008
+#define SR_N		0x00000004
+#define SR_Z		0x00000002
+#define SR_C		0x00000001
+
+#define SR_L_BIT	5
+#define SR_Q_BIT	4
+#define SR_V_BIT	3
+#define SR_N_BIT	2
+#define SR_Z_BIT	1
+#define SR_C_BIT	0
+
+/*
+ * The order is defined by the stmts instruction. r0 is stored first,
+ * so it gets the highest address.
+ *
+ * Registers 0-12 are general-purpose registers (r12 is normally used for
+ * the function return value).
+ * Register 13 is the stack pointer
+ * Register 14 is the link register
+ * Register 15 is the program counter (retrieved from the RAR sysreg)
+ */
+#define FRAME_SIZE_FULL 72
+#define REG_R12_ORIG	68
+#define REG_R0		64
+#define REG_R1		60
+#define REG_R2		56
+#define REG_R3		52
+#define REG_R4		48
+#define REG_R5		44
+#define REG_R6		40
+#define REG_R7		36
+#define REG_R8		32
+#define REG_R9		28
+#define REG_R10		24
+#define REG_R11		20
+#define REG_R12		16
+#define REG_SP		12
+#define REG_LR		 8
+
+#define FRAME_SIZE_MIN	 8
+#define REG_PC		 4
+#define REG_SR		 0
+
+#ifndef __ASSEMBLY__
+struct pt_regs {
+	/* These are always saved */
+	unsigned long sr;
+	unsigned long pc;
+
+	/* These are sometimes saved */
+	unsigned long lr;
+	unsigned long sp;
+	unsigned long r12;
+	unsigned long r11;
+	unsigned long r10;
+	unsigned long r9;
+	unsigned long r8;
+	unsigned long r7;
+	unsigned long r6;
+	unsigned long r5;
+	unsigned long r4;
+	unsigned long r3;
+	unsigned long r2;
+	unsigned long r1;
+	unsigned long r0;
+
+	/* Only saved on system call */
+	unsigned long r12_orig;
+};
+
+
+#endif /* ! __ASSEMBLY__ */
+
+#endif /* _UAPI__ASM_AVR32_PTRACE_H */
diff --git a/arch/avr32/include/asm/resource.h b/arch/avr32/include/uapi/asm/resource.h
index c6dd101472b..c6dd101472b 100644
--- a/arch/avr32/include/asm/resource.h
+++ b/arch/avr32/include/uapi/asm/resource.h
diff --git a/arch/avr32/include/asm/sembuf.h b/arch/avr32/include/uapi/asm/sembuf.h
index e472216e0c9..e472216e0c9 100644
--- a/arch/avr32/include/asm/sembuf.h
+++ b/arch/avr32/include/uapi/asm/sembuf.h
diff --git a/arch/avr32/include/uapi/asm/setup.h b/arch/avr32/include/uapi/asm/setup.h
new file mode 100644
index 00000000000..e58aa9356fa
--- /dev/null
+++ b/arch/avr32/include/uapi/asm/setup.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * Based on linux/include/asm-arm/setup.h
+ *   Copyright (C) 1997-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _UAPI__ASM_AVR32_SETUP_H__
+#define _UAPI__ASM_AVR32_SETUP_H__
+
+#define COMMAND_LINE_SIZE 256
+
+
+#endif /* _UAPI__ASM_AVR32_SETUP_H__ */
diff --git a/arch/avr32/include/asm/shmbuf.h b/arch/avr32/include/uapi/asm/shmbuf.h
index c62fba41739..c62fba41739 100644
--- a/arch/avr32/include/asm/shmbuf.h
+++ b/arch/avr32/include/uapi/asm/shmbuf.h
diff --git a/arch/avr32/include/asm/sigcontext.h b/arch/avr32/include/uapi/asm/sigcontext.h
index e04062b5f39..e04062b5f39 100644
--- a/arch/avr32/include/asm/sigcontext.h
+++ b/arch/avr32/include/uapi/asm/sigcontext.h
diff --git a/arch/avr32/include/asm/siginfo.h b/arch/avr32/include/uapi/asm/siginfo.h
index 5ee93f40a8a..5ee93f40a8a 100644
--- a/arch/avr32/include/asm/siginfo.h
+++ b/arch/avr32/include/uapi/asm/siginfo.h
diff --git a/arch/avr32/include/uapi/asm/signal.h b/arch/avr32/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..eb46f61adb7
--- /dev/null
+++ b/arch/avr32/include/uapi/asm/signal.h
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _UAPI__ASM_AVR32_SIGNAL_H
+#define _UAPI__ASM_AVR32_SIGNAL_H
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG		32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP		 1
+#define SIGINT		 2
+#define SIGQUIT		 3
+#define SIGILL		 4
+#define SIGTRAP		 5
+#define SIGABRT		 6
+#define SIGIOT		 6
+#define SIGBUS		 7
+#define SIGFPE		 8
+#define SIGKILL		 9
+#define SIGUSR1		10
+#define SIGSEGV		11
+#define SIGUSR2		12
+#define SIGPIPE		13
+#define SIGALRM		14
+#define SIGTERM		15
+#define SIGSTKFLT	16
+#define SIGCHLD		17
+#define SIGCONT		18
+#define SIGSTOP		19
+#define SIGTSTP		20
+#define SIGTTIN		21
+#define SIGTTOU		22
+#define SIGURG		23
+#define SIGXCPU		24
+#define SIGXFSZ		25
+#define SIGVTALRM	26
+#define SIGPROF		27
+#define SIGWINCH	28
+#define SIGIO		29
+#define SIGPOLL		SIGIO
+/*
+#define SIGLOST		29
+*/
+#define SIGPWR		30
+#define SIGSYS		31
+#define	SIGUNUSED	31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN	32
+#define SIGRTMAX	(_NSIG-1)
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_NOCLDSTOP		flag to turn off SIGCHLD when children stop.
+ * SA_NOCLDWAIT		flag on SIGCHLD to inhibit zombies.
+ * SA_SIGINFO		deliver the signal with SIGINFO structs
+ * SA_ONSTACK		indicates that a registered stack_t will be used.
+ * SA_RESTART		flag to get restarting signals (which were the default long ago)
+ * SA_NODEFER		prevents the current signal from being masked in the handler.
+ * SA_RESETHAND		clears the handler when the signal is delivered.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP	0x00000001
+#define SA_NOCLDWAIT	0x00000002
+#define SA_SIGINFO	0x00000004
+#define SA_RESTORER	0x04000000
+#define SA_ONSTACK	0x08000000
+#define SA_RESTART	0x10000000
+#define SA_NODEFER	0x40000000
+#define SA_RESETHAND	0x80000000
+
+#define SA_NOMASK	SA_NODEFER
+#define SA_ONESHOT	SA_RESETHAND
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK	1
+#define SS_DISABLE	2
+
+#define MINSIGSTKSZ	2048
+#define SIGSTKSZ	8192
+
+#include <asm-generic/signal-defs.h>
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+	union {
+		__sighandler_t _sa_handler;
+		void (*_sa_sigaction)(int, struct siginfo *, void *);
+	} _u;
+	sigset_t sa_mask;
+	unsigned long sa_flags;
+	void (*sa_restorer)(void);
+};
+
+#define sa_handler	_u._sa_handler
+#define sa_sigaction	_u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+	void __user *ss_sp;
+	int ss_flags;
+	size_t ss_size;
+} stack_t;
+
+
+#endif /* _UAPI__ASM_AVR32_SIGNAL_H */
diff --git a/arch/avr32/include/asm/socket.h b/arch/avr32/include/uapi/asm/socket.h
index a473f8c6a9a..a473f8c6a9a 100644
--- a/arch/avr32/include/asm/socket.h
+++ b/arch/avr32/include/uapi/asm/socket.h
diff --git a/arch/avr32/include/asm/sockios.h b/arch/avr32/include/uapi/asm/sockios.h
index 0802d742f97..0802d742f97 100644
--- a/arch/avr32/include/asm/sockios.h
+++ b/arch/avr32/include/uapi/asm/sockios.h
diff --git a/arch/avr32/include/asm/stat.h b/arch/avr32/include/uapi/asm/stat.h
index e72881e1023..e72881e1023 100644
--- a/arch/avr32/include/asm/stat.h
+++ b/arch/avr32/include/uapi/asm/stat.h
diff --git a/arch/avr32/include/asm/statfs.h b/arch/avr32/include/uapi/asm/statfs.h
index 2961bd18c50..2961bd18c50 100644
--- a/arch/avr32/include/asm/statfs.h
+++ b/arch/avr32/include/uapi/asm/statfs.h
diff --git a/arch/avr32/include/asm/swab.h b/arch/avr32/include/uapi/asm/swab.h
index 14cc737bbca..14cc737bbca 100644
--- a/arch/avr32/include/asm/swab.h
+++ b/arch/avr32/include/uapi/asm/swab.h
diff --git a/arch/avr32/include/asm/termbits.h b/arch/avr32/include/uapi/asm/termbits.h
index 366adc5ebb1..366adc5ebb1 100644
--- a/arch/avr32/include/asm/termbits.h
+++ b/arch/avr32/include/uapi/asm/termbits.h
diff --git a/arch/avr32/include/uapi/asm/termios.h b/arch/avr32/include/uapi/asm/termios.h
new file mode 100644
index 00000000000..b8ef8ea6335
--- /dev/null
+++ b/arch/avr32/include/uapi/asm/termios.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _UAPI__ASM_AVR32_TERMIOS_H
+#define _UAPI__ASM_AVR32_TERMIOS_H
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+	unsigned short ws_row;
+	unsigned short ws_col;
+	unsigned short ws_xpixel;
+	unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+	unsigned short c_iflag;		/* input mode flags */
+	unsigned short c_oflag;		/* output mode flags */
+	unsigned short c_cflag;		/* control mode flags */
+	unsigned short c_lflag;		/* local mode flags */
+	unsigned char c_line;		/* line discipline */
+	unsigned char c_cc[NCC];	/* control characters */
+};
+
+/* modem lines */
+#define TIOCM_LE	0x001
+#define TIOCM_DTR	0x002
+#define TIOCM_RTS	0x004
+#define TIOCM_ST	0x008
+#define TIOCM_SR	0x010
+#define TIOCM_CTS	0x020
+#define TIOCM_CAR	0x040
+#define TIOCM_RNG	0x080
+#define TIOCM_DSR	0x100
+#define TIOCM_CD	TIOCM_CAR
+#define TIOCM_RI	TIOCM_RNG
+#define TIOCM_OUT1	0x2000
+#define TIOCM_OUT2	0x4000
+#define TIOCM_LOOP	0x8000
+
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+
+
+#endif /* _UAPI__ASM_AVR32_TERMIOS_H */
diff --git a/arch/avr32/include/asm/exec.h b/arch/avr32/include/uapi/asm/types.h
index f467be8bf82..bb34ad349df 100644
--- a/arch/avr32/include/asm/exec.h
+++ b/arch/avr32/include/uapi/asm/types.h
@@ -5,9 +5,4 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#ifndef __ASM_AVR32_EXEC_H
-#define __ASM_AVR32_EXEC_H
-
-#define arch_align_stack(x)	(x)
-
-#endif /* __ASM_AVR32_EXEC_H */
+#include <asm-generic/int-ll64.h>
diff --git a/arch/avr32/include/uapi/asm/unistd.h b/arch/avr32/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..3eaa68753ad
--- /dev/null
+++ b/arch/avr32/include/uapi/asm/unistd.h
@@ -0,0 +1,305 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _UAPI__ASM_AVR32_UNISTD_H
+#define _UAPI__ASM_AVR32_UNISTD_H
+
+/*
+ * This file contains the system call numbers.
+ */
+
+#define __NR_restart_syscall      0
+#define __NR_exit		  1
+#define __NR_fork		  2
+#define __NR_read		  3
+#define __NR_write		  4
+#define __NR_open		  5
+#define __NR_close		  6
+#define __NR_umask		  7
+#define __NR_creat		  8
+#define __NR_link		  9
+#define __NR_unlink		 10
+#define __NR_execve		 11
+#define __NR_chdir		 12
+#define __NR_time		 13
+#define __NR_mknod		 14
+#define __NR_chmod		 15
+#define __NR_chown		 16
+#define __NR_lchown		 17
+#define __NR_lseek		 18
+#define __NR__llseek		 19
+#define __NR_getpid		 20
+#define __NR_mount		 21
+#define __NR_umount2		 22
+#define __NR_setuid		 23
+#define __NR_getuid		 24
+#define __NR_stime		 25
+#define __NR_ptrace		 26
+#define __NR_alarm		 27
+#define __NR_pause		 28
+#define __NR_utime		 29
+#define __NR_stat		 30
+#define __NR_fstat		 31
+#define __NR_lstat		 32
+#define __NR_access		 33
+#define __NR_chroot		 34
+#define __NR_sync		 35
+#define __NR_fsync		 36
+#define __NR_kill		 37
+#define __NR_rename		 38
+#define __NR_mkdir		 39
+#define __NR_rmdir		 40
+#define __NR_dup		 41
+#define __NR_pipe		 42
+#define __NR_times		 43
+#define __NR_clone		 44
+#define __NR_brk		 45
+#define __NR_setgid		 46
+#define __NR_getgid		 47
+#define __NR_getcwd		 48
+#define __NR_geteuid		 49
+#define __NR_getegid		 50
+#define __NR_acct		 51
+#define __NR_setfsuid		 52
+#define __NR_setfsgid		 53
+#define __NR_ioctl		 54
+#define __NR_fcntl		 55
+#define __NR_setpgid		 56
+#define __NR_mremap		 57
+#define __NR_setresuid		 58
+#define __NR_getresuid		 59
+#define __NR_setreuid		 60
+#define __NR_setregid		 61
+#define __NR_ustat		 62
+#define __NR_dup2		 63
+#define __NR_getppid		 64
+#define __NR_getpgrp		 65
+#define __NR_setsid		 66
+#define __NR_rt_sigaction	 67
+#define __NR_rt_sigreturn	 68
+#define __NR_rt_sigprocmask	 69
+#define __NR_rt_sigpending	 70
+#define __NR_rt_sigtimedwait	 71
+#define __NR_rt_sigqueueinfo	 72
+#define __NR_rt_sigsuspend	 73
+#define __NR_sethostname	 74
+#define __NR_setrlimit		 75
+#define __NR_getrlimit		 76	/* SuS compliant getrlimit */
+#define __NR_getrusage		 77
+#define __NR_gettimeofday	 78
+#define __NR_settimeofday	 79
+#define __NR_getgroups		 80
+#define __NR_setgroups		 81
+#define __NR_select		 82
+#define __NR_symlink		 83
+#define __NR_fchdir		 84
+#define __NR_readlink		 85
+#define __NR_pread		 86
+#define __NR_pwrite		 87
+#define __NR_swapon		 88
+#define __NR_reboot		 89
+#define __NR_mmap2		 90
+#define __NR_munmap		 91
+#define __NR_truncate		 92
+#define __NR_ftruncate		 93
+#define __NR_fchmod		 94
+#define __NR_fchown		 95
+#define __NR_getpriority	 96
+#define __NR_setpriority	 97
+#define __NR_wait4		 98
+#define __NR_statfs		 99
+#define __NR_fstatfs		100
+#define __NR_vhangup		101
+#define __NR_sigaltstack	102
+#define __NR_syslog		103
+#define __NR_setitimer		104
+#define __NR_getitimer		105
+#define __NR_swapoff		106
+#define __NR_sysinfo		107
+/* 108 was __NR_ipc for a little while */
+#define __NR_sendfile		109
+#define __NR_setdomainname	110
+#define __NR_uname		111
+#define __NR_adjtimex		112
+#define __NR_mprotect		113
+#define __NR_vfork		114
+#define __NR_init_module	115
+#define __NR_delete_module	116
+#define __NR_quotactl		117
+#define __NR_getpgid		118
+#define __NR_bdflush		119
+#define __NR_sysfs		120
+#define __NR_personality	121
+#define __NR_afs_syscall	122 /* Syscall for Andrew File System */
+#define __NR_getdents		123
+#define __NR_flock		124
+#define __NR_msync		125
+#define __NR_readv		126
+#define __NR_writev		127
+#define __NR_getsid		128
+#define __NR_fdatasync		129
+#define __NR__sysctl		130
+#define __NR_mlock		131
+#define __NR_munlock		132
+#define __NR_mlockall		133
+#define __NR_munlockall		134
+#define __NR_sched_setparam		135
+#define __NR_sched_getparam		136
+#define __NR_sched_setscheduler		137
+#define __NR_sched_getscheduler		138
+#define __NR_sched_yield		139
+#define __NR_sched_get_priority_max	140
+#define __NR_sched_get_priority_min	141
+#define __NR_sched_rr_get_interval	142
+#define __NR_nanosleep		143
+#define __NR_poll		144
+#define __NR_nfsservctl		145
+#define __NR_setresgid		146
+#define __NR_getresgid		147
+#define __NR_prctl              148
+#define __NR_socket		149
+#define __NR_bind		150
+#define __NR_connect		151
+#define __NR_listen		152
+#define __NR_accept		153
+#define __NR_getsockname	154
+#define __NR_getpeername	155
+#define __NR_socketpair		156
+#define __NR_send		157
+#define __NR_recv		158
+#define __NR_sendto		159
+#define __NR_recvfrom		160
+#define __NR_shutdown		161
+#define __NR_setsockopt		162
+#define __NR_getsockopt		163
+#define __NR_sendmsg		164
+#define __NR_recvmsg		165
+#define __NR_truncate64		166
+#define __NR_ftruncate64	167
+#define __NR_stat64		168
+#define __NR_lstat64		169
+#define __NR_fstat64		170
+#define __NR_pivot_root		171
+#define __NR_mincore		172
+#define __NR_madvise		173
+#define __NR_getdents64		174
+#define __NR_fcntl64		175
+#define __NR_gettid		176
+#define __NR_readahead		177
+#define __NR_setxattr		178
+#define __NR_lsetxattr		179
+#define __NR_fsetxattr		180
+#define __NR_getxattr		181
+#define __NR_lgetxattr		182
+#define __NR_fgetxattr		183
+#define __NR_listxattr		184
+#define __NR_llistxattr		185
+#define __NR_flistxattr		186
+#define __NR_removexattr	187
+#define __NR_lremovexattr	188
+#define __NR_fremovexattr	189
+#define __NR_tkill		190
+#define __NR_sendfile64		191
+#define __NR_futex		192
+#define __NR_sched_setaffinity	193
+#define __NR_sched_getaffinity	194
+#define __NR_capget		195
+#define __NR_capset		196
+#define __NR_io_setup		197
+#define __NR_io_destroy		198
+#define __NR_io_getevents	199
+#define __NR_io_submit		200
+#define __NR_io_cancel		201
+#define __NR_fadvise64		202
+#define __NR_exit_group		203
+#define __NR_lookup_dcookie	204
+#define __NR_epoll_create	205
+#define __NR_epoll_ctl		206
+#define __NR_epoll_wait		207
+#define __NR_remap_file_pages	208
+#define __NR_set_tid_address	209
+
+#define __NR_timer_create	210
+#define __NR_timer_settime	211
+#define __NR_timer_gettime	212
+#define __NR_timer_getoverrun	213
+#define __NR_timer_delete	214
+#define __NR_clock_settime	215
+#define __NR_clock_gettime	216
+#define __NR_clock_getres	217
+#define __NR_clock_nanosleep	218
+#define __NR_statfs64		219
+#define __NR_fstatfs64		220
+#define __NR_tgkill		221
+				/* 222 reserved for tux */
+#define __NR_utimes		223
+#define __NR_fadvise64_64	224
+
+#define __NR_cacheflush		225
+
+#define __NR_vserver		226
+#define __NR_mq_open		227
+#define __NR_mq_unlink		228
+#define __NR_mq_timedsend	229
+#define __NR_mq_timedreceive	230
+#define __NR_mq_notify		231
+#define __NR_mq_getsetattr	232
+#define __NR_kexec_load		233
+#define __NR_waitid		234
+#define __NR_add_key		235
+#define __NR_request_key	236
+#define __NR_keyctl		237
+#define __NR_ioprio_set		238
+#define __NR_ioprio_get		239
+#define __NR_inotify_init	240
+#define __NR_inotify_add_watch	241
+#define __NR_inotify_rm_watch	242
+#define __NR_openat		243
+#define __NR_mkdirat		244
+#define __NR_mknodat		245
+#define __NR_fchownat		246
+#define __NR_futimesat		247
+#define __NR_fstatat64		248
+#define __NR_unlinkat		249
+#define __NR_renameat		250
+#define __NR_linkat		251
+#define __NR_symlinkat		252
+#define __NR_readlinkat		253
+#define __NR_fchmodat		254
+#define __NR_faccessat		255
+#define __NR_pselect6		256
+#define __NR_ppoll		257
+#define __NR_unshare		258
+#define __NR_set_robust_list	259
+#define __NR_get_robust_list	260
+#define __NR_splice		261
+#define __NR_sync_file_range	262
+#define __NR_tee		263
+#define __NR_vmsplice		264
+#define __NR_epoll_pwait	265
+
+#define __NR_msgget		266
+#define __NR_msgsnd		267
+#define __NR_msgrcv		268
+#define __NR_msgctl		269
+#define __NR_semget		270
+#define __NR_semop		271
+#define __NR_semctl		272
+#define __NR_semtimedop		273
+#define __NR_shmat		274
+#define __NR_shmget		275
+#define __NR_shmdt		276
+#define __NR_shmctl		277
+
+#define __NR_utimensat		278
+#define __NR_signalfd		279
+/* 280 was __NR_timerfd */
+#define __NR_eventfd		281
+#define __NR_setns		283
+
+
+#endif /* _UAPI__ASM_AVR32_UNISTD_H */
diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c
index 92c5af98a6f..1bb0a8abd79 100644
--- a/arch/avr32/kernel/process.c
+++ b/arch/avr32/kernel/process.c
@@ -388,14 +388,14 @@ asmlinkage int sys_execve(const char __user *ufilename,
 			  struct pt_regs *regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname(ufilename);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
 
-	error = do_execve(filename, uargv, uenvp, regs);
+	error = do_execve(filename->name, uargv, uenvp, regs);
 	putname(filename);
 
 out:
diff --git a/arch/avr32/kernel/signal.c b/arch/avr32/kernel/signal.c
index d552a854dac..5e01c3a40ce 100644
--- a/arch/avr32/kernel/signal.c
+++ b/arch/avr32/kernel/signal.c
@@ -15,7 +15,6 @@
 #include <linux/errno.h>
 #include <linux/ptrace.h>
 #include <linux/unistd.h>
-#include <linux/freezer.h>
 #include <linux/tracehook.h>
 
 #include <asm/uaccess.h>
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index 0445c4fd67e..b323d8d3185 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -605,6 +605,9 @@ static void __init genclk_init_parent(struct clk *clk)
 
 static struct dw_dma_platform_data dw_dmac0_data = {
 	.nr_channels	= 3,
+	.block_size	= 4095U,
+	.nr_masters	= 2,
+	.data_width	= { 2, 2, 0, 0 },
 };
 
 static struct resource dw_dmac0_resource[] = {
diff --git a/arch/avr32/mm/fault.c b/arch/avr32/mm/fault.c
index b92e6095861..b2f2d2d6684 100644
--- a/arch/avr32/mm/fault.c
+++ b/arch/avr32/mm/fault.c
@@ -152,6 +152,7 @@ good_area:
 			tsk->min_flt++;
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			/*
 			 * No need to up_read(&mm->mmap_sem) as we would have
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index c7092e6057c..b6f3ad5441c 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -33,6 +33,7 @@ config BLACKFIN
 	select HAVE_PERF_EVENTS
 	select ARCH_HAVE_CUSTOM_GPIO_H
 	select ARCH_WANT_OPTIONAL_GPIOLIB
+	select HAVE_UID16
 	select ARCH_WANT_IPC_PARSE_VERSION
 	select HAVE_GENERIC_HARDIRQS
 	select GENERIC_ATOMIC64
@@ -42,6 +43,8 @@ config BLACKFIN
 	select HAVE_NMI_WATCHDOG if NMI_WATCHDOG
 	select GENERIC_SMP_IDLE_THREAD
 	select ARCH_USES_GETTIMEOFFSET if !GENERIC_CLOCKEVENTS
+	select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_RELA
 
 config GENERIC_CSUM
 	def_bool y
@@ -298,7 +301,7 @@ config BF_REV_0_3
 
 config BF_REV_0_4
 	bool "0.4"
-	depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539)
+	depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539 || BF54x)
 
 config BF_REV_0_5
 	bool "0.5"
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 127f20df75a..16273a92205 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -52,10 +52,13 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_MTD=y
 CONFIG_MTD_CHAR=m
 CONFIG_MTD_BLOCK=y
-CONFIG_MTD_JEDECPROBE=m
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_RAM=y
-CONFIG_MTD_ROM=m
+CONFIG_MTD_ROM=y
 CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PLATRAM=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_NETDEVICES=y
 # CONFIG_NET_VENDOR_BROADCOM is not set
diff --git a/arch/blackfin/configs/BF561-ACVILON_defconfig b/arch/blackfin/configs/BF561-ACVILON_defconfig
index 0fdc4ecaa53..91988370b75 100644
--- a/arch/blackfin/configs/BF561-ACVILON_defconfig
+++ b/arch/blackfin/configs/BF561-ACVILON_defconfig
@@ -57,7 +57,6 @@ CONFIG_MTD_PLATRAM=y
 CONFIG_MTD_PHRAM=y
 CONFIG_MTD_BLOCK2MTD=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_PLATFORM=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
diff --git a/arch/blackfin/configs/BF609-EZKIT_defconfig b/arch/blackfin/configs/BF609-EZKIT_defconfig
index f4b02350e41..13eb73231a9 100644
--- a/arch/blackfin/configs/BF609-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF609-EZKIT_defconfig
@@ -1,5 +1,6 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -24,7 +25,6 @@ CONFIG_BF609=y
 CONFIG_PINT1_ASSIGN=0x01010000
 CONFIG_PINT2_ASSIGN=0x07000101
 CONFIG_PINT3_ASSIGN=0x02020303
-CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IP_CHECKSUM_L1=y
 CONFIG_SYSCALL_TAB_L1=y
 CONFIG_CPLB_SWITCH_TAB_L1=y
@@ -116,9 +116,6 @@ CONFIG_SND_PCM_OSS=m
 # CONFIG_SND_SPI is not set
 # CONFIG_SND_USB is not set
 CONFIG_SND_SOC=m
-CONFIG_SND_BF6XX_I2S=m
-CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61=m
-CONFIG_SND_SOC_ALL_CODECS=m
 CONFIG_USB=y
 CONFIG_USB_MUSB_HDRC=y
 CONFIG_USB_MUSB_BLACKFIN=m
@@ -136,7 +133,6 @@ CONFIG_VFAT_FS=y
 CONFIG_JFFS2_FS=m
 CONFIG_UBIFS_FS=m
 CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_DEBUG_FS=y
@@ -149,9 +145,9 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_CPLB_INFO=y
 CONFIG_BFIN_PSEUDODBG_INSNS=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_ARC4=y
+CONFIG_CRYPTO_HMAC=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_ARC4=m
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_BFIN_CRC=y
+CONFIG_CRYPTO_DEV_BFIN_CRC=m
diff --git a/arch/blackfin/include/asm/module.h b/arch/blackfin/include/asm/module.h
index ed5689b82c9..231a149b3f7 100644
--- a/arch/blackfin/include/asm/module.h
+++ b/arch/blackfin/include/asm/module.h
@@ -7,9 +7,7 @@
 #ifndef _ASM_BFIN_MODULE_H
 #define _ASM_BFIN_MODULE_H
 
-#define Elf_Shdr        Elf32_Shdr
-#define Elf_Sym         Elf32_Sym
-#define Elf_Ehdr        Elf32_Ehdr
+#include <asm-generic/module.h>
 
 struct mod_arch_specific {
 	Elf_Shdr	*text_l1;
diff --git a/arch/blackfin/include/asm/thread_info.h b/arch/blackfin/include/asm/thread_info.h
index 53ad10005ae..3894005337b 100644
--- a/arch/blackfin/include/asm/thread_info.h
+++ b/arch/blackfin/include/asm/thread_info.h
@@ -96,8 +96,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SYSCALL_TRACE	0	/* syscall trace active */
 #define TIF_SIGPENDING		1	/* signal pending */
 #define TIF_NEED_RESCHED	2	/* rescheduling necessary */
-#define TIF_POLLING_NRFLAG	3	/* true if poll_idle() is polling
-					   TIF_NEED_RESCHED */
 #define TIF_MEMDIE		4	/* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK	5	/* restore signal mask in do_signal() */
 #define TIF_IRQ_SYNC		7	/* sync pipeline stage */
@@ -108,8 +106,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
-#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
 #define _TIF_IRQ_SYNC		(1<<TIF_IRQ_SYNC)
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
 #define _TIF_SINGLESTEP		(1<<TIF_SINGLESTEP)
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 83139aaf307..ed978f1c5cb 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -1265,8 +1265,8 @@ static __init int gpio_register_proc(void)
 {
 	struct proc_dir_entry *proc_gpio;
 
-	proc_gpio = proc_create("gpio", S_IRUGO, NULL, &gpio_proc_ops);
-	return proc_gpio != NULL;
+	proc_gpio = proc_create("gpio", 0, NULL, &gpio_proc_ops);
+	return proc_gpio == NULL;
 }
 __initcall(gpio_register_proc);
 #endif
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 62bcea7dcc6..bb1cc721fcf 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -213,14 +213,14 @@ asmlinkage int sys_execve(const char __user *name,
 			  const char __user *const __user *envp)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 	struct pt_regs *regs = (struct pt_regs *)((&name) + 6);
 
 	filename = getname(name);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		return error;
-	error = do_execve(filename, argv, envp, regs);
+	error = do_execve(filename->name, argv, envp, regs);
 	putname(filename);
 	return error;
 }
diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c
index 5272e6eefd9..c4f50a32850 100644
--- a/arch/blackfin/kernel/reboot.c
+++ b/arch/blackfin/kernel/reboot.c
@@ -86,7 +86,6 @@ void native_machine_restart(char *cmd)
 void machine_restart(char *cmd)
 {
 	native_machine_restart(cmd);
-	local_irq_disable();
 	if (smp_processor_id())
 		smp_call_function((void *)bfin_reset, 0, 1);
 	else
diff --git a/arch/blackfin/kernel/signal.c b/arch/blackfin/kernel/signal.c
index 6682b73a852..6ed20a1a4af 100644
--- a/arch/blackfin/kernel/signal.c
+++ b/arch/blackfin/kernel/signal.c
@@ -10,7 +10,6 @@
 #include <linux/tty.h>
 #include <linux/personality.h>
 #include <linux/binfmts.h>
-#include <linux/freezer.h>
 #include <linux/uaccess.h>
 #include <linux/tracehook.h>
 
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index fc179ca0779..29f16e5c37b 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -587,6 +587,21 @@ static struct platform_device bfin_tdm = {
 };
 #endif
 
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
+	        || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+static const char * const ad1836_link[] = {
+	"bfin-tdm.0",
+	"spi0.4",
+};
+static struct platform_device bfin_ad1836_machine = {
+	.name = "bfin-snd-ad1836",
+	.id = -1,
+	.dev = {
+		.platform_data = (void *)ad1836_link,
+	},
+};
+#endif
+
 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #if defined(CONFIG_MTD_M25P80) \
 	|| defined(CONFIG_MTD_M25P80_MODULE)
@@ -1269,6 +1284,11 @@ static struct platform_device *stamp_devices[] __initdata = {
 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 	&bfin_tdm,
 #endif
+
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
+	defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+	&bfin_ad1836_machine,
+#endif
 };
 
 static int __init ezkit_init(void)
diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c
index ce88a7165b6..6fca8698bf3 100644
--- a/arch/blackfin/mach-bf533/boards/stamp.c
+++ b/arch/blackfin/mach-bf533/boards/stamp.c
@@ -617,6 +617,21 @@ static struct platform_device bfin_ac97_pcm = {
 };
 #endif
 
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
+	        || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+static const char * const ad1836_link[] = {
+	"bfin-tdm.0",
+	"spi0.4",
+};
+static struct platform_device bfin_ad1836_machine = {
+	.name = "bfin-snd-ad1836",
+	.id = -1,
+	.dev = {
+		.platform_data = (void *)ad1836_link,
+	},
+};
+#endif
+
 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
 	defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
 static const unsigned ad73311_gpio[] = {
@@ -754,6 +769,11 @@ static struct platform_device *stamp_devices[] __initdata = {
 	&bfin_ac97_pcm,
 #endif
 
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
+	defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+	&bfin_ad1836_machine,
+#endif
+
 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
 	defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
 	&bfin_ad73311_machine,
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
index 9408ab56d87..85e4fc9f9c2 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c
@@ -25,6 +25,7 @@
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
 #include <asm/dpmc.h>
+#include <asm/bfin_sport.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -143,6 +144,71 @@ static struct platform_device bfin_spi0_device = {
 };
 #endif  /* spi master and devices */
 
+#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
+
+/* SPORT SPI controller data */
+static struct bfin5xx_spi_master bfin_sport_spi0_info = {
+	.num_chipselect = MAX_BLACKFIN_GPIOS,
+	.enable_dma = 0,  /* master don't support DMA */
+	.pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
+		P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
+};
+
+static struct resource bfin_sport_spi0_resource[] = {
+	[0] = {
+		.start = SPORT0_TCR1,
+		.end   = SPORT0_TCR1 + 0xFF,
+		.flags = IORESOURCE_MEM,
+		},
+	[1] = {
+		.start = IRQ_SPORT0_ERROR,
+		.end   = IRQ_SPORT0_ERROR,
+		.flags = IORESOURCE_IRQ,
+		},
+};
+
+static struct platform_device bfin_sport_spi0_device = {
+	.name = "bfin-sport-spi",
+	.id = 1, /* Bus number */
+	.num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
+	.resource = bfin_sport_spi0_resource,
+	.dev = {
+		.platform_data = &bfin_sport_spi0_info, /* Passed to driver */
+	},
+};
+
+static struct bfin5xx_spi_master bfin_sport_spi1_info = {
+	.num_chipselect = MAX_BLACKFIN_GPIOS,
+	.enable_dma = 0,  /* master don't support DMA */
+	.pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
+		P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
+};
+
+static struct resource bfin_sport_spi1_resource[] = {
+	[0] = {
+		.start = SPORT1_TCR1,
+		.end   = SPORT1_TCR1 + 0xFF,
+		.flags = IORESOURCE_MEM,
+		},
+	[1] = {
+		.start = IRQ_SPORT1_ERROR,
+		.end   = IRQ_SPORT1_ERROR,
+		.flags = IORESOURCE_IRQ,
+		},
+};
+
+static struct platform_device bfin_sport_spi1_device = {
+	.name = "bfin-sport-spi",
+	.id = 2, /* Bus number */
+	.num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
+	.resource = bfin_sport_spi1_resource,
+	.dev = {
+		.platform_data = &bfin_sport_spi1_info, /* Passed to driver */
+	},
+};
+
+#endif  /* sport spi master and devices */
+
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 static struct platform_device rtc_device = {
 	.name = "rtc-bfin",
@@ -512,6 +578,13 @@ static struct platform_device i2c_bfin_twi_device = {
 };
 #endif
 
+#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \
+|| defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
+unsigned short bfin_sport0_peripherals[] = {
+	P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
+	P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
+};
+#endif
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 static struct resource bfin_sport0_uart_resources[] = {
@@ -532,11 +605,6 @@ static struct resource bfin_sport0_uart_resources[] = {
 	},
 };
 
-static unsigned short bfin_sport0_peripherals[] = {
-	P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
-	P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
-};
-
 static struct platform_device bfin_sport0_uart_device = {
 	.name = "bfin-sport-uart",
 	.id = 0,
@@ -582,6 +650,49 @@ static struct platform_device bfin_sport1_uart_device = {
 };
 #endif
 #endif
+#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
+static struct resource bfin_sport0_resources[] = {
+	{
+		.start = SPORT0_TCR1,
+		.end = SPORT0_MRCS3+4,
+		.flags = IORESOURCE_MEM,
+	},
+	{
+		.start = IRQ_SPORT0_RX,
+		.end = IRQ_SPORT0_RX+1,
+		.flags = IORESOURCE_IRQ,
+	},
+	{
+		.start = IRQ_SPORT0_TX,
+		.end = IRQ_SPORT0_TX+1,
+		.flags = IORESOURCE_IRQ,
+	},
+	{
+		.start = IRQ_SPORT0_ERROR,
+		.end = IRQ_SPORT0_ERROR,
+		.flags = IORESOURCE_IRQ,
+	},
+	{
+		.start = CH_SPORT0_TX,
+		.end = CH_SPORT0_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	{
+		.start = CH_SPORT0_RX,
+		.end = CH_SPORT0_RX,
+		.flags = IORESOURCE_DMA,
+	},
+};
+static struct platform_device bfin_sport0_device = {
+	.name = "bfin_sport_raw",
+	.id = 0,
+	.num_resources = ARRAY_SIZE(bfin_sport0_resources),
+	.resource = bfin_sport0_resources,
+	.dev = {
+		.platform_data = &bfin_sport0_peripherals, /* Passed to driver */
+	},
+};
+#endif
 
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 #include <linux/bfin_mac.h>
@@ -684,6 +795,10 @@ static struct platform_device *cm_bf537e_devices[] __initdata = {
 
 	&bfin_dpmc,
 
+#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
+	&bfin_sport0_device,
+#endif
+
 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
 	&hitachi_fb_device,
 #endif
@@ -744,6 +859,11 @@ static struct platform_device *cm_bf537e_devices[] __initdata = {
 	&bfin_spi0_device,
 #endif
 
+#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
+	&bfin_sport_spi0_device,
+	&bfin_sport_spi1_device,
+#endif
+
 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 	&bfin_pata_device,
 #endif
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 5ed654ae66e..95114ed395a 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -1525,7 +1525,7 @@ static struct platform_device bfin_sport_spi1_device = {
 
 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
 static struct platform_device bfin_fb_device = {
-	.name = "bf537-lq035",
+	.name = "bf537_lq035",
 };
 #endif
 
@@ -2641,6 +2641,21 @@ static struct platform_device bfin_ac97_pcm = {
 };
 #endif
 
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
+	        || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+static const char * const ad1836_link[] = {
+	"bfin-tdm.0",
+	"spi0.4",
+};
+static struct platform_device bfin_ad1836_machine = {
+	.name = "bfin-snd-ad1836",
+	.id = -1,
+	.dev = {
+		.platform_data = (void *)ad1836_link,
+	},
+};
+#endif
+
 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
 				defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
 static const unsigned ad73311_gpio[] = {
@@ -2927,6 +2942,11 @@ static struct platform_device *stamp_devices[] __initdata = {
 	&bfin_ac97_pcm,
 #endif
 
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
+	defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+	&bfin_ad1836_machine,
+#endif
+
 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
 		defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
 	&bfin_ad73311_machine,
diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c
index 7c36777c645..551f866172c 100644
--- a/arch/blackfin/mach-bf561/boards/ezkit.c
+++ b/arch/blackfin/mach-bf561/boards/ezkit.c
@@ -539,6 +539,21 @@ static struct platform_device bfin_ac97 = {
 };
 #endif
 
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
+	        || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+static const char * const ad1836_link[] = {
+	"bfin-tdm.0",
+	"spi0.4",
+};
+static struct platform_device bfin_ad1836_machine = {
+	.name = "bfin-snd-ad1836",
+	.id = -1,
+	.dev = {
+		.platform_data = (void *)ad1836_link,
+	},
+};
+#endif
+
 static struct platform_device *ezkit_devices[] __initdata = {
 
 	&bfin_dpmc,
@@ -603,6 +618,11 @@ static struct platform_device *ezkit_devices[] __initdata = {
 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
 	&bfin_ac97,
 #endif
+
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
+	defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+	&bfin_ad1836_machine,
+#endif
 };
 
 static int __init net2272_init(void)
diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c
index c2cf1ae3118..61c1f47a4bf 100644
--- a/arch/blackfin/mach-bf609/boards/ezkit.c
+++ b/arch/blackfin/mach-bf609/boards/ezkit.c
@@ -818,6 +818,21 @@ static struct platform_device bfin_i2s = {
 };
 #endif
 
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
+	        || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+static const char * const ad1836_link[] = {
+	"bfin-tdm.0",
+	"spi0.76",
+};
+static struct platform_device bfin_ad1836_machine = {
+	.name = "bfin-snd-ad1836",
+	.id = -1,
+	.dev = {
+		.platform_data = (void *)ad1836_link,
+	},
+};
+#endif
+
 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
 	defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
 static struct platform_device adau1761_device = {
@@ -1557,6 +1572,10 @@ static struct platform_device *ezkit_devices[] __initdata = {
 	defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
 	&bfin_i2s,
 #endif
+#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
+	defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
+	&bfin_ad1836_machine,
+#endif
 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
 	defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
 	&adau1761_device,
diff --git a/arch/blackfin/mach-bf609/include/mach/defBF609.h b/arch/blackfin/mach-bf609/include/mach/defBF609.h
index 19690cc4211..8045ade3437 100644
--- a/arch/blackfin/mach-bf609/include/mach/defBF609.h
+++ b/arch/blackfin/mach-bf609/include/mach/defBF609.h
@@ -11,5 +11,276 @@
 #include "defBF60x_base.h"
 
 /* The following are the #defines needed by ADSP-BF609 that are not in the common header */
+/* =========================
+	PIXC Registers
+   ========================= */
+
+/* =========================
+	PIXC0
+   ========================= */
+#define PIXC0_CTL                   0xFFC19000         /* PIXC0 Control Register */
+#define PIXC0_PPL                   0xFFC19004         /* PIXC0 Pixels Per Line Register */
+#define PIXC0_LPF                   0xFFC19008         /* PIXC0 Line Per Frame Register */
+#define PIXC0_HSTART_A              0xFFC1900C         /* PIXC0 Overlay A Horizontal Start Register */
+#define PIXC0_HEND_A                0xFFC19010         /* PIXC0 Overlay A Horizontal End Register */
+#define PIXC0_VSTART_A              0xFFC19014         /* PIXC0 Overlay A Vertical Start Register */
+#define PIXC0_VEND_A                0xFFC19018         /* PIXC0 Overlay A Vertical End Register */
+#define PIXC0_TRANSP_A              0xFFC1901C         /* PIXC0 Overlay A Transparency Ratio Register */
+#define PIXC0_HSTART_B              0xFFC19020         /* PIXC0 Overlay B Horizontal Start Register */
+#define PIXC0_HEND_B                0xFFC19024         /* PIXC0 Overlay B Horizontal End Register */
+#define PIXC0_VSTART_B              0xFFC19028         /* PIXC0 Overlay B Vertical Start Register */
+#define PIXC0_VEND_B                0xFFC1902C         /* PIXC0 Overlay B Vertical End Register */
+#define PIXC0_TRANSP_B              0xFFC19030         /* PIXC0 Overlay B Transparency Ratio Register */
+#define PIXC0_IRQSTAT               0xFFC1903C         /* PIXC0 Interrupt Status Register */
+#define PIXC0_CONRY                 0xFFC19040         /* PIXC0 RY Conversion Component Register */
+#define PIXC0_CONGU                 0xFFC19044         /* PIXC0 GU Conversion Component Register */
+#define PIXC0_CONBV                 0xFFC19048         /* PIXC0 BV Conversion Component Register */
+#define PIXC0_CCBIAS                0xFFC1904C         /* PIXC0 Conversion Bias Register */
+#define PIXC0_TC                    0xFFC19050         /* PIXC0 Transparency Register */
+#define PIXC0_REVID                 0xFFC19054         /* PIXC0 PIXC Revision Id */
+
+/* =========================
+	PVP Registers
+   ========================= */
+
+/* =========================
+	PVP0
+   ========================= */
+#define PVP0_REVID                  0xFFC1A000         /* PVP0 Revision ID */
+#define PVP0_CTL                    0xFFC1A004         /* PVP0 Control */
+#define PVP0_IMSK0                  0xFFC1A008         /* PVP0 INTn interrupt line masks */
+#define PVP0_IMSK1                  0xFFC1A00C         /* PVP0 INTn interrupt line masks */
+#define PVP0_STAT                   0xFFC1A010         /* PVP0 Status */
+#define PVP0_ILAT                   0xFFC1A014         /* PVP0 Latched status */
+#define PVP0_IREQ0                  0xFFC1A018         /* PVP0 INT0 masked latched status */
+#define PVP0_IREQ1                  0xFFC1A01C         /* PVP0 INT0 masked latched status */
+#define PVP0_OPF0_CFG               0xFFC1A020         /* PVP0 Config */
+#define PVP0_OPF1_CFG               0xFFC1A040         /* PVP0 Config */
+#define PVP0_OPF2_CFG               0xFFC1A060         /* PVP0 Config */
+#define PVP0_OPF0_CTL               0xFFC1A024         /* PVP0 Control */
+#define PVP0_OPF1_CTL               0xFFC1A044         /* PVP0 Control */
+#define PVP0_OPF2_CTL               0xFFC1A064         /* PVP0 Control */
+#define PVP0_OPF3_CFG               0xFFC1A080         /* PVP0 Config */
+#define PVP0_OPF3_CTL               0xFFC1A084         /* PVP0 Control */
+#define PVP0_PEC_CFG                0xFFC1A0A0         /* PVP0 Config */
+#define PVP0_PEC_CTL                0xFFC1A0A4         /* PVP0 Control */
+#define PVP0_PEC_D1TH0              0xFFC1A0A8         /* PVP0 Lower Hysteresis Threshold */
+#define PVP0_PEC_D1TH1              0xFFC1A0AC         /* PVP0 Upper Hysteresis Threshold */
+#define PVP0_PEC_D2TH0              0xFFC1A0B0         /* PVP0 Weak Zero Crossing Threshold */
+#define PVP0_PEC_D2TH1              0xFFC1A0B4         /* PVP0 Strong Zero Crossing Threshold */
+#define PVP0_IIM0_CFG               0xFFC1A0C0         /* PVP0 Config */
+#define PVP0_IIM1_CFG               0xFFC1A0E0         /* PVP0 Config */
+#define PVP0_IIM0_CTL               0xFFC1A0C4         /* PVP0 Control */
+#define PVP0_IIM1_CTL               0xFFC1A0E4         /* PVP0 Control */
+#define PVP0_IIM0_SCALE             0xFFC1A0C8         /* PVP0 Scaler Values */
+#define PVP0_IIM1_SCALE             0xFFC1A0E8         /* PVP0 Scaler Values */
+#define PVP0_IIM0_SOVF_STAT         0xFFC1A0CC         /* PVP0 Signed Overflow Status */
+#define PVP0_IIM1_SOVF_STAT         0xFFC1A0EC         /* PVP0 Signed Overflow Status */
+#define PVP0_IIM0_UOVF_STAT         0xFFC1A0D0         /* PVP0 Unsigned Overflow Status */
+#define PVP0_IIM1_UOVF_STAT         0xFFC1A0F0         /* PVP0 Unsigned Overflow Status */
+#define PVP0_ACU_CFG                0xFFC1A100         /* PVP0 ACU Configuration Register */
+#define PVP0_ACU_CTL                0xFFC1A104         /* PVP0 ACU Control Register */
+#define PVP0_ACU_OFFSET             0xFFC1A108         /* PVP0 SUM constant register */
+#define PVP0_ACU_FACTOR             0xFFC1A10C         /* PVP0 PROD constant register */
+#define PVP0_ACU_SHIFT              0xFFC1A110         /* PVP0 Shift constant register */
+#define PVP0_ACU_MIN                0xFFC1A114         /* PVP0 Lower saturation threshold set to MIN */
+#define PVP0_ACU_MAX                0xFFC1A118         /* PVP0 Upper saturation threshold set to MAX */
+#define PVP0_UDS_CFG                0xFFC1A140         /* PVP0 UDS Configuration Register */
+#define PVP0_UDS_CTL                0xFFC1A144         /* PVP0 UDS Control Register */
+#define PVP0_UDS_OHCNT              0xFFC1A148         /* PVP0 UDS Output H Dimension */
+#define PVP0_UDS_OVCNT              0xFFC1A14C         /* PVP0 UDS Output V Dimension */
+#define PVP0_UDS_HAVG               0xFFC1A150         /* PVP0 UDS H Taps */
+#define PVP0_UDS_VAVG               0xFFC1A154         /* PVP0 UDS V Taps */
+#define PVP0_IPF0_CFG               0xFFC1A180         /* PVP0 Configuration */
+#define PVP0_IPF0_PIPECTL           0xFFC1A184         /* PVP0 Pipe Control */
+#define PVP0_IPF1_PIPECTL           0xFFC1A1C4         /* PVP0 Pipe Control */
+#define PVP0_IPF0_CTL               0xFFC1A188         /* PVP0 Control */
+#define PVP0_IPF1_CTL               0xFFC1A1C8         /* PVP0 Control */
+#define PVP0_IPF0_TAG               0xFFC1A18C         /* PVP0 TAG Value */
+#define PVP0_IPF1_TAG               0xFFC1A1CC         /* PVP0 TAG Value */
+#define PVP0_IPF0_FCNT              0xFFC1A190         /* PVP0 Frame Count */
+#define PVP0_IPF1_FCNT              0xFFC1A1D0         /* PVP0 Frame Count */
+#define PVP0_IPF0_HCNT              0xFFC1A194         /* PVP0 Horizontal Count */
+#define PVP0_IPF1_HCNT              0xFFC1A1D4         /* PVP0 Horizontal Count */
+#define PVP0_IPF0_VCNT              0xFFC1A198         /* PVP0 Vertical Count */
+#define PVP0_IPF1_VCNT              0xFFC1A1D8         /* PVP0 Vertical Count */
+#define PVP0_IPF0_HPOS              0xFFC1A19C         /* PVP0 Horizontal Position */
+#define PVP0_IPF0_VPOS              0xFFC1A1A0         /* PVP0 Vertical Position */
+#define PVP0_IPF0_TAG_STAT          0xFFC1A1A4         /* PVP0 TAG Status */
+#define PVP0_IPF1_TAG_STAT          0xFFC1A1E4         /* PVP0 TAG Status */
+#define PVP0_IPF1_CFG               0xFFC1A1C0         /* PVP0 Configuration */
+#define PVP0_CNV0_CFG               0xFFC1A200         /* PVP0 Configuration */
+#define PVP0_CNV1_CFG               0xFFC1A280         /* PVP0 Configuration */
+#define PVP0_CNV2_CFG               0xFFC1A300         /* PVP0 Configuration */
+#define PVP0_CNV3_CFG               0xFFC1A380         /* PVP0 Configuration */
+#define PVP0_CNV0_CTL               0xFFC1A204         /* PVP0 Control */
+#define PVP0_CNV1_CTL               0xFFC1A284         /* PVP0 Control */
+#define PVP0_CNV2_CTL               0xFFC1A304         /* PVP0 Control */
+#define PVP0_CNV3_CTL               0xFFC1A384         /* PVP0 Control */
+#define PVP0_CNV0_C00C01            0xFFC1A208         /* PVP0 Coefficients 0, 0 and 0, 1 */
+#define PVP0_CNV1_C00C01            0xFFC1A288         /* PVP0 Coefficients 0, 0 and 0, 1 */
+#define PVP0_CNV2_C00C01            0xFFC1A308         /* PVP0 Coefficients 0, 0 and 0, 1 */
+#define PVP0_CNV3_C00C01            0xFFC1A388         /* PVP0 Coefficients 0, 0 and 0, 1 */
+#define PVP0_CNV0_C02C03            0xFFC1A20C         /* PVP0 Coefficients 0, 2 and 0, 3 */
+#define PVP0_CNV1_C02C03            0xFFC1A28C         /* PVP0 Coefficients 0, 2 and 0, 3 */
+#define PVP0_CNV2_C02C03            0xFFC1A30C         /* PVP0 Coefficients 0, 2 and 0, 3 */
+#define PVP0_CNV3_C02C03            0xFFC1A38C         /* PVP0 Coefficients 0, 2 and 0, 3 */
+#define PVP0_CNV0_C04               0xFFC1A210         /* PVP0 Coefficient 0, 4 */
+#define PVP0_CNV1_C04               0xFFC1A290         /* PVP0 Coefficient 0, 4 */
+#define PVP0_CNV2_C04               0xFFC1A310         /* PVP0 Coefficient 0, 4 */
+#define PVP0_CNV3_C04               0xFFC1A390         /* PVP0 Coefficient 0, 4 */
+#define PVP0_CNV0_C10C11            0xFFC1A214         /* PVP0 Coefficients 1, 0 and 1, 1 */
+#define PVP0_CNV1_C10C11            0xFFC1A294         /* PVP0 Coefficients 1, 0 and 1, 1 */
+#define PVP0_CNV2_C10C11            0xFFC1A314         /* PVP0 Coefficients 1, 0 and 1, 1 */
+#define PVP0_CNV3_C10C11            0xFFC1A394         /* PVP0 Coefficients 1, 0 and 1, 1 */
+#define PVP0_CNV0_C12C13            0xFFC1A218         /* PVP0 Coefficients 1, 2 and 1, 3 */
+#define PVP0_CNV1_C12C13            0xFFC1A298         /* PVP0 Coefficients 1, 2 and 1, 3 */
+#define PVP0_CNV2_C12C13            0xFFC1A318         /* PVP0 Coefficients 1, 2 and 1, 3 */
+#define PVP0_CNV3_C12C13            0xFFC1A398         /* PVP0 Coefficients 1, 2 and 1, 3 */
+#define PVP0_CNV0_C14               0xFFC1A21C         /* PVP0 Coefficient 1, 4 */
+#define PVP0_CNV1_C14               0xFFC1A29C         /* PVP0 Coefficient 1, 4 */
+#define PVP0_CNV2_C14               0xFFC1A31C         /* PVP0 Coefficient 1, 4 */
+#define PVP0_CNV3_C14               0xFFC1A39C         /* PVP0 Coefficient 1, 4 */
+#define PVP0_CNV0_C20C21            0xFFC1A220         /* PVP0 Coefficients 2, 0 and 2, 1 */
+#define PVP0_CNV1_C20C21            0xFFC1A2A0         /* PVP0 Coefficients 2, 0 and 2, 1 */
+#define PVP0_CNV2_C20C21            0xFFC1A320         /* PVP0 Coefficients 2, 0 and 2, 1 */
+#define PVP0_CNV3_C20C21            0xFFC1A3A0         /* PVP0 Coefficients 2, 0 and 2, 1 */
+#define PVP0_CNV0_C22C23            0xFFC1A224         /* PVP0 Coefficients 2, 2 and 2, 3 */
+#define PVP0_CNV1_C22C23            0xFFC1A2A4         /* PVP0 Coefficients 2, 2 and 2, 3 */
+#define PVP0_CNV2_C22C23            0xFFC1A324         /* PVP0 Coefficients 2, 2 and 2, 3 */
+#define PVP0_CNV3_C22C23            0xFFC1A3A4         /* PVP0 Coefficients 2, 2 and 2, 3 */
+#define PVP0_CNV0_C24               0xFFC1A228         /* PVP0 Coefficient 2,4 */
+#define PVP0_CNV1_C24               0xFFC1A2A8         /* PVP0 Coefficient 2,4 */
+#define PVP0_CNV2_C24               0xFFC1A328         /* PVP0 Coefficient 2,4 */
+#define PVP0_CNV3_C24               0xFFC1A3A8         /* PVP0 Coefficient 2,4 */
+#define PVP0_CNV0_C30C31            0xFFC1A22C         /* PVP0 Coefficients 3, 0 and 3, 1 */
+#define PVP0_CNV1_C30C31            0xFFC1A2AC         /* PVP0 Coefficients 3, 0 and 3, 1 */
+#define PVP0_CNV2_C30C31            0xFFC1A32C         /* PVP0 Coefficients 3, 0 and 3, 1 */
+#define PVP0_CNV3_C30C31            0xFFC1A3AC         /* PVP0 Coefficients 3, 0 and 3, 1 */
+#define PVP0_CNV0_C32C33            0xFFC1A230         /* PVP0 Coefficients 3, 2 and 3, 3 */
+#define PVP0_CNV1_C32C33            0xFFC1A2B0         /* PVP0 Coefficients 3, 2 and 3, 3 */
+#define PVP0_CNV2_C32C33            0xFFC1A330         /* PVP0 Coefficients 3, 2 and 3, 3 */
+#define PVP0_CNV3_C32C33            0xFFC1A3B0         /* PVP0 Coefficients 3, 2 and 3, 3 */
+#define PVP0_CNV0_C34               0xFFC1A234         /* PVP0 Coefficient 3, 4 */
+#define PVP0_CNV1_C34               0xFFC1A2B4         /* PVP0 Coefficient 3, 4 */
+#define PVP0_CNV2_C34               0xFFC1A334         /* PVP0 Coefficient 3, 4 */
+#define PVP0_CNV3_C34               0xFFC1A3B4         /* PVP0 Coefficient 3, 4 */
+#define PVP0_CNV0_C40C41            0xFFC1A238         /* PVP0 Coefficients 4, 0 and 4, 1 */
+#define PVP0_CNV1_C40C41            0xFFC1A2B8         /* PVP0 Coefficients 4, 0 and 4, 1 */
+#define PVP0_CNV2_C40C41            0xFFC1A338         /* PVP0 Coefficients 4, 0 and 4, 1 */
+#define PVP0_CNV3_C40C41            0xFFC1A3B8         /* PVP0 Coefficients 4, 0 and 4, 1 */
+#define PVP0_CNV0_C42C43            0xFFC1A23C         /* PVP0 Coefficients 4, 2 and 4, 3 */
+#define PVP0_CNV1_C42C43            0xFFC1A2BC         /* PVP0 Coefficients 4, 2 and 4, 3 */
+#define PVP0_CNV2_C42C43            0xFFC1A33C         /* PVP0 Coefficients 4, 2 and 4, 3 */
+#define PVP0_CNV3_C42C43            0xFFC1A3BC         /* PVP0 Coefficients 4, 2 and 4, 3 */
+#define PVP0_CNV0_C44               0xFFC1A240         /* PVP0 Coefficient 4, 4 */
+#define PVP0_CNV1_C44               0xFFC1A2C0         /* PVP0 Coefficient 4, 4 */
+#define PVP0_CNV2_C44               0xFFC1A340         /* PVP0 Coefficient 4, 4 */
+#define PVP0_CNV3_C44               0xFFC1A3C0         /* PVP0 Coefficient 4, 4 */
+#define PVP0_CNV0_SCALE             0xFFC1A244         /* PVP0 Scaling factor */
+#define PVP0_CNV1_SCALE             0xFFC1A2C4         /* PVP0 Scaling factor */
+#define PVP0_CNV2_SCALE             0xFFC1A344         /* PVP0 Scaling factor */
+#define PVP0_CNV3_SCALE             0xFFC1A3C4         /* PVP0 Scaling factor */
+#define PVP0_THC0_CFG               0xFFC1A400         /* PVP0 Configuration */
+#define PVP0_THC1_CFG               0xFFC1A500         /* PVP0 Configuration */
+#define PVP0_THC0_CTL               0xFFC1A404         /* PVP0 Control */
+#define PVP0_THC1_CTL               0xFFC1A504         /* PVP0 Control */
+#define PVP0_THC0_HFCNT             0xFFC1A408         /* PVP0 Number of frames */
+#define PVP0_THC1_HFCNT             0xFFC1A508         /* PVP0 Number of frames */
+#define PVP0_THC0_RMAXREP           0xFFC1A40C         /* PVP0 Maximum number of RLE reports */
+#define PVP0_THC1_RMAXREP           0xFFC1A50C         /* PVP0 Maximum number of RLE reports */
+#define PVP0_THC0_CMINVAL           0xFFC1A410         /* PVP0 Min clip value */
+#define PVP0_THC1_CMINVAL           0xFFC1A510         /* PVP0 Min clip value */
+#define PVP0_THC0_CMINTH            0xFFC1A414         /* PVP0 Clip Min Threshold */
+#define PVP0_THC1_CMINTH            0xFFC1A514         /* PVP0 Clip Min Threshold */
+#define PVP0_THC0_CMAXTH            0xFFC1A418         /* PVP0 Clip Max Threshold */
+#define PVP0_THC1_CMAXTH            0xFFC1A518         /* PVP0 Clip Max Threshold */
+#define PVP0_THC0_CMAXVAL           0xFFC1A41C         /* PVP0 Max clip value */
+#define PVP0_THC1_CMAXVAL           0xFFC1A51C         /* PVP0 Max clip value */
+#define PVP0_THC0_TH0               0xFFC1A420         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH0               0xFFC1A520         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH1               0xFFC1A424         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH1               0xFFC1A524         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH2               0xFFC1A428         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH2               0xFFC1A528         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH3               0xFFC1A42C         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH3               0xFFC1A52C         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH4               0xFFC1A430         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH4               0xFFC1A530         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH5               0xFFC1A434         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH5               0xFFC1A534         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH6               0xFFC1A438         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH6               0xFFC1A538         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH7               0xFFC1A43C         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH7               0xFFC1A53C         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH8               0xFFC1A440         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH8               0xFFC1A540         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH9               0xFFC1A444         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH9               0xFFC1A544         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH10              0xFFC1A448         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH10              0xFFC1A548         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH11              0xFFC1A44C         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH11              0xFFC1A54C         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH12              0xFFC1A450         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH12              0xFFC1A550         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH13              0xFFC1A454         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH13              0xFFC1A554         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH14              0xFFC1A458         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH14              0xFFC1A558         /* PVP0 Threshold Value */
+#define PVP0_THC0_TH15              0xFFC1A45C         /* PVP0 Threshold Value */
+#define PVP0_THC1_TH15              0xFFC1A55C         /* PVP0 Threshold Value */
+#define PVP0_THC0_HHPOS             0xFFC1A460         /* PVP0 Window start X-coordinate */
+#define PVP0_THC1_HHPOS             0xFFC1A560         /* PVP0 Window start X-coordinate */
+#define PVP0_THC0_HVPOS             0xFFC1A464         /* PVP0 Window start Y-coordinate */
+#define PVP0_THC1_HVPOS             0xFFC1A564         /* PVP0 Window start Y-coordinate */
+#define PVP0_THC0_HHCNT             0xFFC1A468         /* PVP0 Window width in X dimension */
+#define PVP0_THC1_HHCNT             0xFFC1A568         /* PVP0 Window width in X dimension */
+#define PVP0_THC0_HVCNT             0xFFC1A46C         /* PVP0 Window width in Y dimension */
+#define PVP0_THC1_HVCNT             0xFFC1A56C         /* PVP0 Window width in Y dimension */
+#define PVP0_THC0_RHPOS             0xFFC1A470         /* PVP0 Window start X-coordinate */
+#define PVP0_THC1_RHPOS             0xFFC1A570         /* PVP0 Window start X-coordinate */
+#define PVP0_THC0_RVPOS             0xFFC1A474         /* PVP0 Window start Y-coordinate */
+#define PVP0_THC1_RVPOS             0xFFC1A574         /* PVP0 Window start Y-coordinate */
+#define PVP0_THC0_RHCNT             0xFFC1A478         /* PVP0 Window width in X dimension */
+#define PVP0_THC1_RHCNT             0xFFC1A578         /* PVP0 Window width in X dimension */
+#define PVP0_THC0_RVCNT             0xFFC1A47C         /* PVP0 Window width in Y dimension */
+#define PVP0_THC1_RVCNT             0xFFC1A57C         /* PVP0 Window width in Y dimension */
+#define PVP0_THC0_HFCNT_STAT        0xFFC1A480         /* PVP0 Current Frame counter */
+#define PVP0_THC1_HFCNT_STAT        0xFFC1A580         /* PVP0 Current Frame counter */
+#define PVP0_THC0_HCNT0_STAT        0xFFC1A484         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT0_STAT        0xFFC1A584         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT1_STAT        0xFFC1A488         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT1_STAT        0xFFC1A588         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT2_STAT        0xFFC1A48C         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT2_STAT        0xFFC1A58C         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT3_STAT        0xFFC1A490         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT3_STAT        0xFFC1A590         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT4_STAT        0xFFC1A494         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT4_STAT        0xFFC1A594         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT5_STAT        0xFFC1A498         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT5_STAT        0xFFC1A598         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT6_STAT        0xFFC1A49C         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT6_STAT        0xFFC1A59C         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT7_STAT        0xFFC1A4A0         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT7_STAT        0xFFC1A5A0         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT8_STAT        0xFFC1A4A4         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT8_STAT        0xFFC1A5A4         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT9_STAT        0xFFC1A4A8         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT9_STAT        0xFFC1A5A8         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT10_STAT       0xFFC1A4AC         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT10_STAT       0xFFC1A5AC         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT11_STAT       0xFFC1A4B0         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT11_STAT       0xFFC1A5B0         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT12_STAT       0xFFC1A4B4         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT12_STAT       0xFFC1A5B4         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT13_STAT       0xFFC1A4B8         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT13_STAT       0xFFC1A5B8         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT14_STAT       0xFFC1A4BC         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT14_STAT       0xFFC1A5BC         /* PVP0 Histogram counter value */
+#define PVP0_THC0_HCNT15_STAT       0xFFC1A4C0         /* PVP0 Histogram counter value */
+#define PVP0_THC1_HCNT15_STAT       0xFFC1A5C0         /* PVP0 Histogram counter value */
+#define PVP0_THC0_RREP_STAT         0xFFC1A4C4         /* PVP0 Number of RLE Reports */
+#define PVP0_THC1_RREP_STAT         0xFFC1A5C4         /* PVP0 Number of RLE Reports */
+#define PVP0_PMA_CFG                0xFFC1A600         /* PVP0 PMA Configuration Register */
 
 #endif /* _DEF_BF609_H */
diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c
index c854a27cbea..d88bd31319e 100644
--- a/arch/blackfin/mach-common/cpufreq.c
+++ b/arch/blackfin/mach-common/cpufreq.c
@@ -77,15 +77,14 @@ static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk)
 	csel = bfin_read32(CGU0_DIV) & 0x1F;
 #endif
 
-	for (index = 0;  (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) {
+	for (index = 0;  (cclk >> index) >= min_cclk && csel <= 3 && index < 3; index++, csel++) {
 		bfin_freq_table[index].frequency = cclk >> index;
 #ifndef CONFIG_BF60x
 		dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */
-		dpm_state_table[index].tscale =  (TIME_SCALE / (1 << csel)) - 1;
 #else
 		dpm_state_table[index].csel = csel;
-		dpm_state_table[index].tscale =  TIME_SCALE >> index;
 #endif
+		dpm_state_table[index].tscale =  (TIME_SCALE >> index) - 1;
 
 		pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n",
 						 bfin_freq_table[index].frequency,
@@ -135,7 +134,7 @@ static int bfin_target(struct cpufreq_policy *poli,
 	unsigned int plldiv;
 #endif
 	unsigned int index, cpu;
-	unsigned long flags, cclk_hz;
+	unsigned long cclk_hz;
 	struct cpufreq_freqs freqs;
 	static unsigned long lpj_ref;
 	static unsigned int  lpj_ref_freq;
@@ -166,7 +165,6 @@ static int bfin_target(struct cpufreq_policy *poli,
 
 		cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 		if (cpu == CPUFREQ_CPU) {
-			flags = hard_local_irq_save();
 #ifndef CONFIG_BF60x
 			plldiv = (bfin_read_PLL_DIV() & SSEL) |
 						dpm_state_table[index].csel;
@@ -195,7 +193,6 @@ static int bfin_target(struct cpufreq_policy *poli,
 				loops_per_jiffy = cpufreq_scale(lpj_ref,
 						lpj_ref_freq, freqs.new);
 			}
-			hard_local_irq_restore(flags);
 		}
 		/* TODO: just test case for cycles clock source, remove later */
 		cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 7ca09ec2ca5..902bebc434c 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1441,7 +1441,6 @@ int __init init_arch_irq(void)
 		IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
 		IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
 
-	bfin_sti(bfin_irq_flags);
 
 	/* This implicitly covers ANOMALY_05000171
 	 * Boot-ROM code modifies SICA_IWRx wakeup registers
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c
index a40151306b7..bb61ae4986e 100644
--- a/arch/blackfin/mach-common/smp.c
+++ b/arch/blackfin/mach-common/smp.c
@@ -146,7 +146,7 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
 	platform_clear_ipi(cpu, IRQ_SUPPLE_1);
 
 	bfin_ipi_data = &__get_cpu_var(bfin_ipi);
-
+	smp_mb();
 	while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) {
 		msg = 0;
 		do {
@@ -195,7 +195,7 @@ void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg)
 	unsigned long flags;
 
 	local_irq_save(flags);
-
+	smp_mb();
 	for_each_cpu(cpu, cpumask) {
 		bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
 		smp_mb();
diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig
index 983c859e40b..aee1b569ee6 100644
--- a/arch/c6x/Kconfig
+++ b/arch/c6x/Kconfig
@@ -17,6 +17,8 @@ config C6X
 	select OF
 	select OF_EARLY_FLATTREE
 	select GENERIC_CLOCKEVENTS
+	select GENERIC_KERNEL_THREAD
+	select MODULES_USE_ELF_RELA
 
 config MMU
 	def_bool n
diff --git a/arch/c6x/include/asm/Kbuild b/arch/c6x/include/asm/Kbuild
index 277f1a4ecb0..112a496d835 100644
--- a/arch/c6x/include/asm/Kbuild
+++ b/arch/c6x/include/asm/Kbuild
@@ -1,4 +1,3 @@
-include include/asm-generic/Kbuild.asm
 
 generic-y += atomic.h
 generic-y += auxvec.h
@@ -12,6 +11,7 @@ generic-y += div64.h
 generic-y += dma.h
 generic-y += emergency-restart.h
 generic-y += errno.h
+generic-y += exec.h
 generic-y += fb.h
 generic-y += fcntl.h
 generic-y += futex.h
diff --git a/arch/c6x/include/asm/exec.h b/arch/c6x/include/asm/exec.h
deleted file mode 100644
index 0fea482cdc8..00000000000
--- a/arch/c6x/include/asm/exec.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_C6X_EXEC_H
-#define _ASM_C6X_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* _ASM_C6X_EXEC_H */
diff --git a/arch/c6x/include/asm/module.h b/arch/c6x/include/asm/module.h
index a453f9744f4..5c7269c7ef7 100644
--- a/arch/c6x/include/asm/module.h
+++ b/arch/c6x/include/asm/module.h
@@ -13,17 +13,7 @@
 #ifndef _ASM_C6X_MODULE_H
 #define _ASM_C6X_MODULE_H
 
-#define Elf_Shdr	Elf32_Shdr
-#define Elf_Sym		Elf32_Sym
-#define Elf_Ehdr	Elf32_Ehdr
-#define Elf_Addr	Elf32_Addr
-#define Elf_Word	Elf32_Word
-
-/*
- * This file contains the C6x architecture specific module code.
- */
-struct mod_arch_specific {
-};
+#include <asm-generic/module.h>
 
 struct loaded_sections {
 	unsigned int new_vaddr;
diff --git a/arch/c6x/include/asm/processor.h b/arch/c6x/include/asm/processor.h
index c50af7ef1c9..b9eb3da7f27 100644
--- a/arch/c6x/include/asm/processor.h
+++ b/arch/c6x/include/asm/processor.h
@@ -92,8 +92,6 @@ static inline void release_thread(struct task_struct *dead_task)
 {
 }
 
-extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-
 #define copy_segments(tsk, mm)		do { } while (0)
 #define release_segments(mm)		do { } while (0)
 
diff --git a/arch/c6x/include/asm/ptrace.h b/arch/c6x/include/asm/ptrace.h
index b04ff596425..76da6ad6610 100644
--- a/arch/c6x/include/asm/ptrace.h
+++ b/arch/c6x/include/asm/ptrace.h
@@ -11,156 +11,13 @@
 #ifndef _ASM_C6X_PTRACE_H
 #define _ASM_C6X_PTRACE_H
 
-#define BKPT_OPCODE	0x56454314	/* illegal opcode */
-
-#ifdef _BIG_ENDIAN
-#define PT_LO(odd, even)  odd
-#define PT_HI(odd, even)  even
-#else
-#define PT_LO(odd, even)  even
-#define PT_HI(odd, even)  odd
-#endif
-
-#define PT_A4_ORG  PT_LO(1, 0)
-#define PT_TSR	   PT_HI(1, 0)
-#define PT_ILC	   PT_LO(3, 2)
-#define PT_RILC    PT_HI(3, 2)
-#define PT_CSR	   PT_LO(5, 4)
-#define PT_PC	   PT_HI(5, 4)
-#define PT_B16	   PT_LO(7, 6)
-#define PT_B17	   PT_HI(7, 6)
-#define PT_B18	   PT_LO(9, 8)
-#define PT_B19	   PT_HI(9, 8)
-#define PT_B20	   PT_LO(11, 10)
-#define PT_B21	   PT_HI(11, 10)
-#define PT_B22	   PT_LO(13, 12)
-#define PT_B23	   PT_HI(13, 12)
-#define PT_B24	   PT_LO(15, 14)
-#define PT_B25	   PT_HI(15, 14)
-#define PT_B26	   PT_LO(17, 16)
-#define PT_B27	   PT_HI(17, 16)
-#define PT_B28	   PT_LO(19, 18)
-#define PT_B29	   PT_HI(19, 18)
-#define PT_B30	   PT_LO(21, 20)
-#define PT_B31	   PT_HI(21, 20)
-#define PT_B0	   PT_LO(23, 22)
-#define PT_B1	   PT_HI(23, 22)
-#define PT_B2	   PT_LO(25, 24)
-#define PT_B3	   PT_HI(25, 24)
-#define PT_B4	   PT_LO(27, 26)
-#define PT_B5	   PT_HI(27, 26)
-#define PT_B6	   PT_LO(29, 28)
-#define PT_B7	   PT_HI(29, 28)
-#define PT_B8	   PT_LO(31, 30)
-#define PT_B9	   PT_HI(31, 30)
-#define PT_B10	   PT_LO(33, 32)
-#define PT_B11	   PT_HI(33, 32)
-#define PT_B12	   PT_LO(35, 34)
-#define PT_B13	   PT_HI(35, 34)
-#define PT_A16	   PT_LO(37, 36)
-#define PT_A17	   PT_HI(37, 36)
-#define PT_A18	   PT_LO(39, 38)
-#define PT_A19	   PT_HI(39, 38)
-#define PT_A20	   PT_LO(41, 40)
-#define PT_A21	   PT_HI(41, 40)
-#define PT_A22	   PT_LO(43, 42)
-#define PT_A23	   PT_HI(43, 42)
-#define PT_A24	   PT_LO(45, 44)
-#define PT_A25	   PT_HI(45, 44)
-#define PT_A26	   PT_LO(47, 46)
-#define PT_A27	   PT_HI(47, 46)
-#define PT_A28	   PT_LO(49, 48)
-#define PT_A29	   PT_HI(49, 48)
-#define PT_A30	   PT_LO(51, 50)
-#define PT_A31	   PT_HI(51, 50)
-#define PT_A0	   PT_LO(53, 52)
-#define PT_A1	   PT_HI(53, 52)
-#define PT_A2	   PT_LO(55, 54)
-#define PT_A3	   PT_HI(55, 54)
-#define PT_A4	   PT_LO(57, 56)
-#define PT_A5	   PT_HI(57, 56)
-#define PT_A6	   PT_LO(59, 58)
-#define PT_A7	   PT_HI(59, 58)
-#define PT_A8	   PT_LO(61, 60)
-#define PT_A9	   PT_HI(61, 60)
-#define PT_A10	   PT_LO(63, 62)
-#define PT_A11	   PT_HI(63, 62)
-#define PT_A12	   PT_LO(65, 64)
-#define PT_A13	   PT_HI(65, 64)
-#define PT_A14	   PT_LO(67, 66)
-#define PT_A15	   PT_HI(67, 66)
-#define PT_B14	   PT_LO(69, 68)
-#define PT_B15	   PT_HI(69, 68)
-
-#define NR_PTREGS  70
-
-#define PT_DP	   PT_B14  /* Data Segment Pointer (B14) */
-#define PT_SP	   PT_B15  /* Stack Pointer (B15)  */
-
-#define PTRACE_GETFDPIC		31	/* get the ELF fdpic loadmap address */
-
-#define PTRACE_GETFDPIC_EXEC	0	/* [addr] request the executable loadmap */
-#define PTRACE_GETFDPIC_INTERP	1	/* [addr] request the interpreter loadmap */
+#include <uapi/asm/ptrace.h>
 
 #ifndef __ASSEMBLY__
-
 #ifdef _BIG_ENDIAN
-#define REG_PAIR(odd, even) unsigned long odd; unsigned long even
 #else
-#define REG_PAIR(odd, even) unsigned long even; unsigned long odd
 #endif
 
-/*
- * this struct defines the way the registers are stored on the
- * stack during a system call. fields defined with REG_PAIR
- * are saved and restored using double-word memory operations
- * which means the word ordering of the pair depends on endianess.
- */
-struct pt_regs {
-	REG_PAIR(tsr, orig_a4);
-	REG_PAIR(rilc, ilc);
-	REG_PAIR(pc, csr);
-
-	REG_PAIR(b17, b16);
-	REG_PAIR(b19, b18);
-	REG_PAIR(b21, b20);
-	REG_PAIR(b23, b22);
-	REG_PAIR(b25, b24);
-	REG_PAIR(b27, b26);
-	REG_PAIR(b29, b28);
-	REG_PAIR(b31, b30);
-
-	REG_PAIR(b1, b0);
-	REG_PAIR(b3, b2);
-	REG_PAIR(b5, b4);
-	REG_PAIR(b7, b6);
-	REG_PAIR(b9, b8);
-	REG_PAIR(b11, b10);
-	REG_PAIR(b13, b12);
-
-	REG_PAIR(a17, a16);
-	REG_PAIR(a19, a18);
-	REG_PAIR(a21, a20);
-	REG_PAIR(a23, a22);
-	REG_PAIR(a25, a24);
-	REG_PAIR(a27, a26);
-	REG_PAIR(a29, a28);
-	REG_PAIR(a31, a30);
-
-	REG_PAIR(a1, a0);
-	REG_PAIR(a3, a2);
-	REG_PAIR(a5, a4);
-	REG_PAIR(a7, a6);
-	REG_PAIR(a9, a8);
-	REG_PAIR(a11, a10);
-	REG_PAIR(a13, a12);
-
-	REG_PAIR(a15, a14);
-	REG_PAIR(sp, dp);
-};
-
-#ifdef __KERNEL__
-
 #include <linux/linkage.h>
 
 #define user_mode(regs)	((((regs)->tsr) & 0x40) != 0)
@@ -174,6 +31,5 @@ extern void show_regs(struct pt_regs *);
 extern asmlinkage unsigned long syscall_trace_entry(struct pt_regs *regs);
 extern asmlinkage void syscall_trace_exit(struct pt_regs *regs);
 
-#endif /* __KERNEL__ */
 #endif /* __ASSEMBLY__ */
 #endif /* _ASM_C6X_PTRACE_H */
diff --git a/arch/c6x/include/asm/syscalls.h b/arch/c6x/include/asm/syscalls.h
index aed53da703c..e7b8991dc07 100644
--- a/arch/c6x/include/asm/syscalls.h
+++ b/arch/c6x/include/asm/syscalls.h
@@ -44,11 +44,6 @@ extern int sys_cache_sync(unsigned long s, unsigned long e);
 struct pt_regs;
 
 extern asmlinkage long sys_c6x_clone(struct pt_regs *regs);
-extern asmlinkage long sys_c6x_execve(const char __user *name,
-				      const char __user *const __user *argv,
-				      const char __user *const __user *envp,
-				      struct pt_regs *regs);
-
 
 #include <asm-generic/syscalls.h>
 
diff --git a/arch/c6x/include/asm/thread_info.h b/arch/c6x/include/asm/thread_info.h
index 1710bcbb8d0..4c8dc562bd9 100644
--- a/arch/c6x/include/asm/thread_info.h
+++ b/arch/c6x/include/asm/thread_info.h
@@ -97,7 +97,6 @@ struct thread_info *current_thread_info(void)
 #define TIF_NEED_RESCHED	3	/* rescheduling necessary */
 #define TIF_RESTORE_SIGMASK	4	/* restore signal mask in do_signal() */
 
-#define TIF_POLLING_NRFLAG	16	/* true if polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE		17	/* OOM killer killed process */
 
 #define TIF_WORK_MASK		0x00007FFE /* work on irq/exception return */
diff --git a/arch/c6x/include/uapi/asm/Kbuild b/arch/c6x/include/uapi/asm/Kbuild
index baebb3da1d4..c312b424c43 100644
--- a/arch/c6x/include/uapi/asm/Kbuild
+++ b/arch/c6x/include/uapi/asm/Kbuild
@@ -1,3 +1,10 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += byteorder.h
+header-y += kvm_para.h
+header-y += ptrace.h
+header-y += setup.h
+header-y += sigcontext.h
+header-y += swab.h
+header-y += unistd.h
diff --git a/arch/c6x/include/asm/byteorder.h b/arch/c6x/include/uapi/asm/byteorder.h
index 166038db342..166038db342 100644
--- a/arch/c6x/include/asm/byteorder.h
+++ b/arch/c6x/include/uapi/asm/byteorder.h
diff --git a/arch/c6x/include/asm/kvm_para.h b/arch/c6x/include/uapi/asm/kvm_para.h
index 14fab8f0b95..14fab8f0b95 100644
--- a/arch/c6x/include/asm/kvm_para.h
+++ b/arch/c6x/include/uapi/asm/kvm_para.h
diff --git a/arch/c6x/include/uapi/asm/ptrace.h b/arch/c6x/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..cc0a4d99151
--- /dev/null
+++ b/arch/c6x/include/uapi/asm/ptrace.h
@@ -0,0 +1,163 @@
+/*
+ *  Copyright (C) 2004, 2006, 2009, 2010 Texas Instruments Incorporated
+ *  Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
+ *
+ *  Updated for 2.6.34: Mark Salter <msalter@redhat.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ */
+#ifndef _UAPI_ASM_C6X_PTRACE_H
+#define _UAPI_ASM_C6X_PTRACE_H
+
+#define BKPT_OPCODE	0x56454314	/* illegal opcode */
+
+#ifdef _BIG_ENDIAN
+#define PT_LO(odd, even)  odd
+#define PT_HI(odd, even)  even
+#else
+#define PT_LO(odd, even)  even
+#define PT_HI(odd, even)  odd
+#endif
+
+#define PT_A4_ORG  PT_LO(1, 0)
+#define PT_TSR	   PT_HI(1, 0)
+#define PT_ILC	   PT_LO(3, 2)
+#define PT_RILC    PT_HI(3, 2)
+#define PT_CSR	   PT_LO(5, 4)
+#define PT_PC	   PT_HI(5, 4)
+#define PT_B16	   PT_LO(7, 6)
+#define PT_B17	   PT_HI(7, 6)
+#define PT_B18	   PT_LO(9, 8)
+#define PT_B19	   PT_HI(9, 8)
+#define PT_B20	   PT_LO(11, 10)
+#define PT_B21	   PT_HI(11, 10)
+#define PT_B22	   PT_LO(13, 12)
+#define PT_B23	   PT_HI(13, 12)
+#define PT_B24	   PT_LO(15, 14)
+#define PT_B25	   PT_HI(15, 14)
+#define PT_B26	   PT_LO(17, 16)
+#define PT_B27	   PT_HI(17, 16)
+#define PT_B28	   PT_LO(19, 18)
+#define PT_B29	   PT_HI(19, 18)
+#define PT_B30	   PT_LO(21, 20)
+#define PT_B31	   PT_HI(21, 20)
+#define PT_B0	   PT_LO(23, 22)
+#define PT_B1	   PT_HI(23, 22)
+#define PT_B2	   PT_LO(25, 24)
+#define PT_B3	   PT_HI(25, 24)
+#define PT_B4	   PT_LO(27, 26)
+#define PT_B5	   PT_HI(27, 26)
+#define PT_B6	   PT_LO(29, 28)
+#define PT_B7	   PT_HI(29, 28)
+#define PT_B8	   PT_LO(31, 30)
+#define PT_B9	   PT_HI(31, 30)
+#define PT_B10	   PT_LO(33, 32)
+#define PT_B11	   PT_HI(33, 32)
+#define PT_B12	   PT_LO(35, 34)
+#define PT_B13	   PT_HI(35, 34)
+#define PT_A16	   PT_LO(37, 36)
+#define PT_A17	   PT_HI(37, 36)
+#define PT_A18	   PT_LO(39, 38)
+#define PT_A19	   PT_HI(39, 38)
+#define PT_A20	   PT_LO(41, 40)
+#define PT_A21	   PT_HI(41, 40)
+#define PT_A22	   PT_LO(43, 42)
+#define PT_A23	   PT_HI(43, 42)
+#define PT_A24	   PT_LO(45, 44)
+#define PT_A25	   PT_HI(45, 44)
+#define PT_A26	   PT_LO(47, 46)
+#define PT_A27	   PT_HI(47, 46)
+#define PT_A28	   PT_LO(49, 48)
+#define PT_A29	   PT_HI(49, 48)
+#define PT_A30	   PT_LO(51, 50)
+#define PT_A31	   PT_HI(51, 50)
+#define PT_A0	   PT_LO(53, 52)
+#define PT_A1	   PT_HI(53, 52)
+#define PT_A2	   PT_LO(55, 54)
+#define PT_A3	   PT_HI(55, 54)
+#define PT_A4	   PT_LO(57, 56)
+#define PT_A5	   PT_HI(57, 56)
+#define PT_A6	   PT_LO(59, 58)
+#define PT_A7	   PT_HI(59, 58)
+#define PT_A8	   PT_LO(61, 60)
+#define PT_A9	   PT_HI(61, 60)
+#define PT_A10	   PT_LO(63, 62)
+#define PT_A11	   PT_HI(63, 62)
+#define PT_A12	   PT_LO(65, 64)
+#define PT_A13	   PT_HI(65, 64)
+#define PT_A14	   PT_LO(67, 66)
+#define PT_A15	   PT_HI(67, 66)
+#define PT_B14	   PT_LO(69, 68)
+#define PT_B15	   PT_HI(69, 68)
+
+#define NR_PTREGS  70
+
+#define PT_DP	   PT_B14  /* Data Segment Pointer (B14) */
+#define PT_SP	   PT_B15  /* Stack Pointer (B15)  */
+
+#define PTRACE_GETFDPIC		31	/* get the ELF fdpic loadmap address */
+
+#define PTRACE_GETFDPIC_EXEC	0	/* [addr] request the executable loadmap */
+#define PTRACE_GETFDPIC_INTERP	1	/* [addr] request the interpreter loadmap */
+
+#ifndef __ASSEMBLY__
+
+#ifdef _BIG_ENDIAN
+#define REG_PAIR(odd, even) unsigned long odd; unsigned long even
+#else
+#define REG_PAIR(odd, even) unsigned long even; unsigned long odd
+#endif
+
+/*
+ * this struct defines the way the registers are stored on the
+ * stack during a system call. fields defined with REG_PAIR
+ * are saved and restored using double-word memory operations
+ * which means the word ordering of the pair depends on endianess.
+ */
+struct pt_regs {
+	REG_PAIR(tsr, orig_a4);
+	REG_PAIR(rilc, ilc);
+	REG_PAIR(pc, csr);
+
+	REG_PAIR(b17, b16);
+	REG_PAIR(b19, b18);
+	REG_PAIR(b21, b20);
+	REG_PAIR(b23, b22);
+	REG_PAIR(b25, b24);
+	REG_PAIR(b27, b26);
+	REG_PAIR(b29, b28);
+	REG_PAIR(b31, b30);
+
+	REG_PAIR(b1, b0);
+	REG_PAIR(b3, b2);
+	REG_PAIR(b5, b4);
+	REG_PAIR(b7, b6);
+	REG_PAIR(b9, b8);
+	REG_PAIR(b11, b10);
+	REG_PAIR(b13, b12);
+
+	REG_PAIR(a17, a16);
+	REG_PAIR(a19, a18);
+	REG_PAIR(a21, a20);
+	REG_PAIR(a23, a22);
+	REG_PAIR(a25, a24);
+	REG_PAIR(a27, a26);
+	REG_PAIR(a29, a28);
+	REG_PAIR(a31, a30);
+
+	REG_PAIR(a1, a0);
+	REG_PAIR(a3, a2);
+	REG_PAIR(a5, a4);
+	REG_PAIR(a7, a6);
+	REG_PAIR(a9, a8);
+	REG_PAIR(a11, a10);
+	REG_PAIR(a13, a12);
+
+	REG_PAIR(a15, a14);
+	REG_PAIR(sp, dp);
+};
+
+#endif /* __ASSEMBLY__ */
+#endif /* _UAPI_ASM_C6X_PTRACE_H */
diff --git a/arch/c6x/include/asm/setup.h b/arch/c6x/include/uapi/asm/setup.h
index a01e31896fa..a01e31896fa 100644
--- a/arch/c6x/include/asm/setup.h
+++ b/arch/c6x/include/uapi/asm/setup.h
diff --git a/arch/c6x/include/asm/sigcontext.h b/arch/c6x/include/uapi/asm/sigcontext.h
index eb702f39cde..eb702f39cde 100644
--- a/arch/c6x/include/asm/sigcontext.h
+++ b/arch/c6x/include/uapi/asm/sigcontext.h
diff --git a/arch/c6x/include/asm/swab.h b/arch/c6x/include/uapi/asm/swab.h
index fd4bb0520e5..fd4bb0520e5 100644
--- a/arch/c6x/include/asm/swab.h
+++ b/arch/c6x/include/uapi/asm/swab.h
diff --git a/arch/c6x/include/asm/unistd.h b/arch/c6x/include/uapi/asm/unistd.h
index ed2259043ee..4ff747d12da 100644
--- a/arch/c6x/include/asm/unistd.h
+++ b/arch/c6x/include/uapi/asm/unistd.h
@@ -14,6 +14,9 @@
  *   more details.
  */
 
+#define __ARCH_WANT_KERNEL_EXECVE
+#define __ARCH_WANT_SYS_EXECVE
+
 /* Use the standard ABI for syscalls. */
 #include <asm-generic/unistd.h>
 
diff --git a/arch/c6x/kernel/asm-offsets.c b/arch/c6x/kernel/asm-offsets.c
index 759ad6d207b..60f1e437745 100644
--- a/arch/c6x/kernel/asm-offsets.c
+++ b/arch/c6x/kernel/asm-offsets.c
@@ -116,7 +116,6 @@ void foo(void)
 	DEFINE(_TIF_NOTIFY_RESUME, (1<<TIF_NOTIFY_RESUME));
 	DEFINE(_TIF_SIGPENDING, (1<<TIF_SIGPENDING));
 	DEFINE(_TIF_NEED_RESCHED, (1<<TIF_NEED_RESCHED));
-	DEFINE(_TIF_POLLING_NRFLAG, (1<<TIF_POLLING_NRFLAG));
 
 	DEFINE(_TIF_ALLWORK_MASK, TIF_ALLWORK_MASK);
 	DEFINE(_TIF_WORK_MASK, TIF_WORK_MASK);
diff --git a/arch/c6x/kernel/entry.S b/arch/c6x/kernel/entry.S
index 30b37e5f4a6..5449c36018f 100644
--- a/arch/c6x/kernel/entry.S
+++ b/arch/c6x/kernel/entry.S
@@ -400,6 +400,32 @@ ret_from_fork_2:
 	STW	.D2T2	B0,*+SP(REGS_A4+8)
 ENDPROC(ret_from_fork)
 
+ENTRY(ret_from_kernel_thread)
+#ifdef CONFIG_C6X_BIG_KERNEL
+	MVKL	.S1	schedule_tail,A0
+	MVKH	.S1	schedule_tail,A0
+	B	.S2X	A0
+#else
+	B	.S2	schedule_tail
+#endif
+	LDW	.D2T2	*+SP(REGS_A0+8),B10 /* get fn  */
+	ADDKPC	.S2	0f,B3,3
+0:
+	B	.S2	B10		   /* call fn */
+	LDW	.D2T1	*+SP(REGS_A1+8),A4 /* get arg */
+	MVKL	.S2	sys_exit,B11
+	MVKH	.S2	sys_exit,B11
+	ADDKPC	.S2	0f,B3,1
+0:
+	BNOP	.S2	B11,5	/* jump to sys_exit */
+ENDPROC(ret_from_kernel_thread)
+
+ENTRY(ret_from_kernel_execve)
+	GET_THREAD_INFO A12
+	BNOP	.S2	syscall_exit,4
+	ADD	.D2X	A4,-8,SP
+ENDPROC(ret_from_kernel_execve)
+
 	;;
 	;; These are the interrupt handlers, responsible for calling __do_IRQ()
 	;; int6 is used for syscalls (see _system_call entry)
@@ -593,13 +619,6 @@ ENTRY(sys_sigaltstack)
 	NOP	4
 ENDPROC(sys_sigaltstack)
 
-	;; kernel_execve
-ENTRY(kernel_execve)
-	MVK	.S2	__NR_execve,B0
-	SWE
-	BNOP	.S2	B3,5
-ENDPROC(kernel_execve)
-
 	;;
 	;; Special system calls
 	;; return address is in B3
@@ -628,29 +647,6 @@ ENTRY(sys_rt_sigreturn)
 #endif
 ENDPROC(sys_rt_sigreturn)
 
-ENTRY(sys_execve)
-	ADDAW	.D2	SP,2,B6		; put regs addr in 4th parameter
-					; & adjust regs stack addr
-	LDW	.D2T2	*+SP(REGS_B4+8),B4
-
-	;; c6x_execve(char *name, char **argv,
-	;;            char **envp, struct pt_regs *regs)
-#ifdef CONFIG_C6X_BIG_KERNEL
- ||	MVKL	.S1	sys_c6x_execve,A0
-	MVKH	.S1	sys_c6x_execve,A0
-	B	.S2X	A0
-#else
- ||	B	.S2	sys_c6x_execve
-#endif
-	STW	.D2T2	B3,*SP--[2]
-	ADDKPC	.S2	ret_from_c6x_execve,B3,3
-
-ret_from_c6x_execve:
-	LDW	.D2T2	*++SP[2],B3
-	NOP	4
-	BNOP	.S2	B3,5
-ENDPROC(sys_execve)
-
 ENTRY(sys_pread_c6x)
 	MV	.D2X	A8,B7
 #ifdef CONFIG_C6X_BIG_KERNEL
diff --git a/arch/c6x/kernel/process.c b/arch/c6x/kernel/process.c
index 45e924a636a..2770d9a9a84 100644
--- a/arch/c6x/kernel/process.c
+++ b/arch/c6x/kernel/process.c
@@ -25,6 +25,7 @@ void	(*c6x_restart)(void);
 void	(*c6x_halt)(void);
 
 extern asmlinkage void ret_from_fork(void);
+extern asmlinkage void ret_from_kernel_thread(void);
 
 /*
  * power off function, if any
@@ -103,37 +104,6 @@ void machine_power_off(void)
 	halt_loop();
 }
 
-static void kernel_thread_helper(int dummy, void *arg, int (*fn)(void *))
-{
-	do_exit(fn(arg));
-}
-
-/*
- * Create a kernel thread
- */
-int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
-{
-	struct pt_regs regs;
-
-	/*
-	 * copy_thread sets a4 to zero (child return from fork)
-	 * so we can't just set things up to directly return to
-	 * fn.
-	 */
-	memset(&regs, 0, sizeof(regs));
-	regs.b4 = (unsigned long) arg;
-	regs.a6 = (unsigned long) fn;
-	regs.pc = (unsigned long) kernel_thread_helper;
-	local_save_flags(regs.csr);
-	regs.csr |= 1;
-	regs.tsr = 5; /* Set GEE and GIE in TSR */
-
-	/* Ok, create the new process.. */
-	return do_fork(flags | CLONE_VM | CLONE_UNTRACED, -1, &regs,
-		       0, NULL, NULL);
-}
-EXPORT_SYMBOL(kernel_thread);
-
 void flush_thread(void)
 {
 }
@@ -191,22 +161,24 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 
 	childregs = task_pt_regs(p);
 
-	*childregs = *regs;
-	childregs->a4 = 0;
-
-	if (usp == -1)
+	if (!regs) {
 		/* case of  __kernel_thread: we return to supervisor space */
+		memset(childregs, 0, sizeof(struct pt_regs));
 		childregs->sp = (unsigned long)(childregs + 1);
-	else
+		p->thread.pc = (unsigned long) ret_from_kernel_thread;
+		childregs->a0 = usp;		/* function */
+		childregs->a1 = ustk_size;	/* argument */
+	} else {
 		/* Otherwise use the given stack */
+		*childregs = *regs;
 		childregs->sp = usp;
+		p->thread.pc = (unsigned long) ret_from_fork;
+	}
 
 	/* Set usp/ksp */
 	p->thread.usp = childregs->sp;
-	/* switch_to uses stack to save/restore 14 callee-saved regs */
 	thread_saved_ksp(p) = (unsigned long)childregs - 8;
-	p->thread.pc = (unsigned int) ret_from_fork;
-	p->thread.wchan	= (unsigned long) ret_from_fork;
+	p->thread.wchan	= p->thread.pc;
 #ifdef __DSBT__
 	{
 		unsigned long dp;
@@ -221,28 +193,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 	return 0;
 }
 
-/*
- * c6x_execve() executes a new program.
- */
-SYSCALL_DEFINE4(c6x_execve, const char __user *, name,
-		const char __user *const __user *, argv,
-		const char __user *const __user *, envp,
-		struct pt_regs *, regs)
-{
-	int error;
-	char *filename;
-
-	filename = getname(name);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		goto out;
-
-	error = do_execve(filename, argv, envp, regs);
-	putname(filename);
-out:
-	return error;
-}
-
 unsigned long get_wchan(struct task_struct *p)
 {
 	return p->thread.wchan;
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig
index 72bd5ae50a8..a67244473a3 100644
--- a/arch/cris/Kconfig
+++ b/arch/cris/Kconfig
@@ -42,11 +42,13 @@ config CRIS
 	select HAVE_IDE
 	select GENERIC_ATOMIC64
 	select HAVE_GENERIC_HARDIRQS
+	select HAVE_UID16
 	select ARCH_WANT_IPC_PARSE_VERSION
 	select GENERIC_IRQ_SHOW
 	select GENERIC_IOMAP
 	select GENERIC_SMP_IDLE_THREAD if ETRAX_ARCH_V32
 	select GENERIC_CMOS_UPDATE
+	select MODULES_USE_ELF_RELA
 
 config HZ
 	int
diff --git a/arch/cris/arch-v10/kernel/process.c b/arch/cris/arch-v10/kernel/process.c
index bee8df43c20..15ac7150371 100644
--- a/arch/cris/arch-v10/kernel/process.c
+++ b/arch/cris/arch-v10/kernel/process.c
@@ -212,14 +212,14 @@ asmlinkage int sys_execve(const char *fname,
 			  struct pt_regs *regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname(fname);
 	error = PTR_ERR(filename);
 
 	if (IS_ERR(filename))
 	        goto out;
-	error = do_execve(filename, argv, envp, regs);
+	error = do_execve(filename->name, argv, envp, regs);
 	putname(filename);
  out:
 	return error;
diff --git a/arch/cris/arch-v32/kernel/process.c b/arch/cris/arch-v32/kernel/process.c
index 0570e8ce603..4e999224635 100644
--- a/arch/cris/arch-v32/kernel/process.c
+++ b/arch/cris/arch-v32/kernel/process.c
@@ -224,7 +224,7 @@ sys_execve(const char *fname,
 	   struct pt_regs *regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname(fname);
 	error = PTR_ERR(filename);
@@ -232,7 +232,7 @@ sys_execve(const char *fname,
 	if (IS_ERR(filename))
 	        goto out;
 
-	error = do_execve(filename, argv, envp, regs);
+	error = do_execve(filename->name, argv, envp, regs);
 	putname(filename);
  out:
 	return error;
diff --git a/arch/cris/include/asm/Kbuild b/arch/cris/include/asm/Kbuild
index 04d02a51c5e..6d43a951b5e 100644
--- a/arch/cris/include/asm/Kbuild
+++ b/arch/cris/include/asm/Kbuild
@@ -7,3 +7,7 @@ header-y += ethernet.h
 header-y += etraxgpio.h
 header-y += rs485.h
 header-y += sync_serial.h
+
+generic-y += clkdev.h
+generic-y += exec.h
+generic-y += module.h
diff --git a/arch/cris/include/asm/exec.h b/arch/cris/include/asm/exec.h
deleted file mode 100644
index 9665dab7e25..00000000000
--- a/arch/cris/include/asm/exec.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_CRIS_EXEC_H
-#define __ASM_CRIS_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* __ASM_CRIS_EXEC_H */
diff --git a/arch/cris/include/asm/module.h b/arch/cris/include/asm/module.h
deleted file mode 100644
index 7ee72311bd7..00000000000
--- a/arch/cris/include/asm/module.h
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef _ASM_CRIS_MODULE_H
-#define _ASM_CRIS_MODULE_H
-/* cris is simple */
-struct mod_arch_specific { };
-
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
-#endif /* _ASM_CRIS_MODULE_H */
diff --git a/arch/cris/include/asm/thread_info.h b/arch/cris/include/asm/thread_info.h
index 5b1c448df5c..07c8c40c52b 100644
--- a/arch/cris/include/asm/thread_info.h
+++ b/arch/cris/include/asm/thread_info.h
@@ -78,15 +78,12 @@ struct thread_info {
 #define TIF_SIGPENDING		2	/* signal pending */
 #define TIF_NEED_RESCHED	3	/* rescheduling necessary */
 #define TIF_RESTORE_SIGMASK	9	/* restore signal mask in do_signal() */
-#define TIF_POLLING_NRFLAG	16	/* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE		17	/* is terminating due to OOM killer */
 
 #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
-#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
 
 #define _TIF_WORK_MASK		0x0000FFFE	/* work to do on interrupt/exception return */
 #define _TIF_ALLWORK_MASK	0x0000FFFF	/* work to do on any return to u-space */
diff --git a/arch/cris/mm/fault.c b/arch/cris/mm/fault.c
index 45fd542cf17..73312ab6c69 100644
--- a/arch/cris/mm/fault.c
+++ b/arch/cris/mm/fault.c
@@ -186,6 +186,7 @@ retry:
 			tsk->min_flt++;
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			/*
 			 * No need to up_read(&mm->mmap_sem) as we would
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index 971c0a19fac..b7412504f08 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -5,11 +5,14 @@ config FRV
 	select HAVE_ARCH_TRACEHOOK
 	select HAVE_IRQ_WORK
 	select HAVE_PERF_EVENTS
+	select HAVE_UID16
 	select HAVE_GENERIC_HARDIRQS
 	select GENERIC_IRQ_SHOW
+	select HAVE_DEBUG_BUGVERBOSE
 	select ARCH_HAVE_NMI_SAFE_CMPXCHG
 	select GENERIC_CPU_DEVICES
 	select ARCH_WANT_IPC_PARSE_VERSION
+	select GENERIC_KERNEL_THREAD
 
 config ZONE_DMA
 	bool
diff --git a/arch/frv/include/asm/Kbuild b/arch/frv/include/asm/Kbuild
index 5be6663cfee..4a159da2363 100644
--- a/arch/frv/include/asm/Kbuild
+++ b/arch/frv/include/asm/Kbuild
@@ -1,4 +1,3 @@
-include include/asm-generic/Kbuild.asm
 
-header-y += registers.h
-header-y += termios.h
+generic-y += clkdev.h
+generic-y += exec.h
diff --git a/arch/frv/include/asm/module.h b/arch/frv/include/asm/module.h
index 3d5c6360289..a8848f09a21 100644
--- a/arch/frv/include/asm/module.h
+++ b/arch/frv/include/asm/module.h
@@ -11,13 +11,7 @@
 #ifndef _ASM_MODULE_H
 #define _ASM_MODULE_H
 
-struct mod_arch_specific
-{
-};
-
-#define Elf_Shdr	Elf32_Shdr
-#define Elf_Sym		Elf32_Sym
-#define Elf_Ehdr	Elf32_Ehdr
+#include <asm-generic/module.h>
 
 /*
  * Include the architecture version.
diff --git a/arch/frv/include/asm/processor.h b/arch/frv/include/asm/processor.h
index dccb9d16231..a34f309e580 100644
--- a/arch/frv/include/asm/processor.h
+++ b/arch/frv/include/asm/processor.h
@@ -92,14 +92,12 @@ extern struct task_struct *__kernel_current_task;
 
 /*
  * do necessary setup to start up a newly executed thread.
- * - need to discard the frame stacked by init() invoking the execve syscall
  */
 #define start_thread(_regs, _pc, _usp)			\
 do {							\
-	__frame = __kernel_frame0_ptr;			\
-	__frame->pc	= (_pc);			\
-	__frame->psr	&= ~PSR_S;			\
-	__frame->sp	= (_usp);			\
+	_regs->pc	= (_pc);			\
+	_regs->psr	&= ~PSR_S;			\
+	_regs->sp	= (_usp);			\
 } while(0)
 
 /* Free all resources held by a thread. */
@@ -107,7 +105,6 @@ static inline void release_thread(struct task_struct *dead_task)
 {
 }
 
-extern asmlinkage int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 extern asmlinkage void save_user_regs(struct user_context *target);
 extern asmlinkage void *restore_user_regs(const struct user_context *target, ...);
 
diff --git a/arch/frv/include/asm/ptrace.h b/arch/frv/include/asm/ptrace.h
index ef6635ca4ec..034f1793419 100644
--- a/arch/frv/include/asm/ptrace.h
+++ b/arch/frv/include/asm/ptrace.h
@@ -11,58 +11,10 @@
 #ifndef _ASM_PTRACE_H
 #define _ASM_PTRACE_H
 
-#include <asm/registers.h>
-#ifdef __KERNEL__
 #include <asm/irq_regs.h>
+#include <uapi/asm/ptrace.h>
 
 #define in_syscall(regs) (((regs)->tbr & TBR_TT) == TBR_TT_TRAP0)
-#endif
-
-
-#define PT_PSR		0
-#define	PT_ISR		1
-#define PT_CCR		2
-#define PT_CCCR		3
-#define PT_LR		4
-#define PT_LCR		5
-#define PT_PC		6
-
-#define PT__STATUS	7	/* exception status */
-#define PT_SYSCALLNO	8	/* syscall number or -1 */
-#define PT_ORIG_GR8	9	/* saved GR8 for signal handling */
-#define PT_GNER0	10
-#define PT_GNER1	11
-#define PT_IACC0H	12
-#define PT_IACC0L	13
-
-#define PT_GR(j)	( 14 + (j))	/* GRj for 0<=j<=63 */
-#define PT_FR(j)	( 78 + (j))	/* FRj for 0<=j<=63 */
-#define PT_FNER(j)	(142 + (j))	/* FNERj for 0<=j<=1 */
-#define PT_MSR(j)	(144 + (j))	/* MSRj for 0<=j<=2 */
-#define PT_ACC(j)	(146 + (j))	/* ACCj for 0<=j<=7 */
-#define PT_ACCG(jklm)	(154 + (jklm))	/* ACCGjklm for 0<=jklm<=1 (reads four regs per slot) */
-#define PT_FSR(j)	(156 + (j))	/* FSRj for 0<=j<=0 */
-#define PT__GPEND	78
-#define PT__END		157
-
-#define PT_TBR		PT_GR(0)
-#define PT_SP		PT_GR(1)
-#define PT_FP		PT_GR(2)
-#define PT_PREV_FRAME	PT_GR(28)	/* previous exception frame pointer (old gr28 value) */
-#define PT_CURR_TASK	PT_GR(29)	/* current task */
-
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS		12
-#define PTRACE_SETREGS		13
-#define PTRACE_GETFPREGS	14
-#define PTRACE_SETFPREGS	15
-#define PTRACE_GETFDPIC		31	/* get the ELF fdpic loadmap address */
-
-#define PTRACE_GETFDPIC_EXEC	0	/* [addr] request the executable loadmap */
-#define PTRACE_GETFDPIC_INTERP	1	/* [addr] request the interpreter loadmap */
-
-#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 
 struct task_struct;
@@ -76,6 +28,7 @@ register struct pt_regs *__frame asm("gr28");
 #define user_mode(regs)			(!((regs)->psr & PSR_S))
 #define instruction_pointer(regs)	((regs)->pc)
 #define user_stack_pointer(regs)	((regs)->sp)
+#define current_pt_regs()		(__frame)
 
 extern unsigned long user_stack(const struct pt_regs *);
 #define profile_pc(regs) ((regs)->pc)
@@ -85,5 +38,4 @@ extern unsigned long user_stack(const struct pt_regs *);
 #define arch_has_single_step()	(1)
 
 #endif /* !__ASSEMBLY__ */
-#endif /* __KERNEL__ */
 #endif /* _ASM_PTRACE_H */
diff --git a/arch/frv/include/asm/setup.h b/arch/frv/include/asm/setup.h
index afd787ceede..aa76f2eac09 100644
--- a/arch/frv/include/asm/setup.h
+++ b/arch/frv/include/asm/setup.h
@@ -8,15 +8,12 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
-
 #ifndef _ASM_SETUP_H
 #define _ASM_SETUP_H
 
-#define COMMAND_LINE_SIZE       512
-
-#ifdef __KERNEL__
 
 #include <linux/init.h>
+#include <uapi/asm/setup.h>
 
 #ifndef __ASSEMBLY__
 
@@ -26,6 +23,4 @@ extern unsigned long __initdata num_mappedpages;
 
 #endif /* !__ASSEMBLY__ */
 
-#endif  /*  __KERNEL__  */
-
 #endif /* _ASM_SETUP_H */
diff --git a/arch/frv/include/asm/signal.h b/arch/frv/include/asm/signal.h
index f071e813dcb..599500a3102 100644
--- a/arch/frv/include/asm/signal.h
+++ b/arch/frv/include/asm/signal.h
@@ -1,21 +1,8 @@
 #ifndef _ASM_SIGNAL_H
 #define _ASM_SIGNAL_H
 
-#include <linux/types.h>
+#include <uapi/asm/signal.h>
 
-#ifndef __KERNEL__
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-#define NSIG		32
-typedef unsigned long sigset_t;
-
-#endif /* !__KERNEL__ */
-
-#define SA_RESTORER	0x04000000 /* to get struct sigaction correct */
-
-#include <asm-generic/signal.h>
-
-#ifdef __KERNEL__
 struct old_sigaction {
 	__sighandler_t sa_handler;
 	old_sigset_t sa_mask;
@@ -23,22 +10,4 @@ struct old_sigaction {
 	__sigrestore_t sa_restorer;
 };
 
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-struct sigaction {
-	union {
-	  __sighandler_t _sa_handler;
-	  void (*_sa_sigaction)(int, struct siginfo *, void *);
-	} _u;
-	sigset_t sa_mask;
-	unsigned long sa_flags;
-	void (*sa_restorer)(void);
-};
-
-#define sa_handler	_u._sa_handler
-#define sa_sigaction	_u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_SIGNAL_H */
diff --git a/arch/frv/include/asm/termios.h b/arch/frv/include/asm/termios.h
index b4868aafe79..9f753fc0953 100644
--- a/arch/frv/include/asm/termios.h
+++ b/arch/frv/include/asm/termios.h
@@ -1,27 +1,8 @@
 #ifndef _ASM_TERMIOS_H
 #define _ASM_TERMIOS_H
 
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
+#include <uapi/asm/termios.h>
 
-struct winsize {
-	unsigned short ws_row;
-	unsigned short ws_col;
-	unsigned short ws_xpixel;
-	unsigned short ws_ypixel;
-};
-
-#define NCC 8
-struct termio {
-	unsigned short c_iflag;		/* input mode flags */
-	unsigned short c_oflag;		/* output mode flags */
-	unsigned short c_cflag;		/* control mode flags */
-	unsigned short c_lflag;		/* local mode flags */
-	unsigned char c_line;		/* line discipline */
-	unsigned char c_cc[NCC];	/* control characters */
-};
-
-#ifdef __KERNEL__
 /*	intr=^C		quit=^|		erase=del	kill=^U
 	eof=^D		vtime=\0	vmin=\1		sxtc=\0
 	start=^Q	stop=^S		susp=^Z		eol=\0
@@ -29,30 +10,5 @@ struct termio {
 	eol2=\0
 */
 #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
-#endif
-
-/* modem lines */
-#define TIOCM_LE	0x001
-#define TIOCM_DTR	0x002
-#define TIOCM_RTS	0x004
-#define TIOCM_ST	0x008
-#define TIOCM_SR	0x010
-#define TIOCM_CTS	0x020
-#define TIOCM_CAR	0x040
-#define TIOCM_RNG	0x080
-#define TIOCM_DSR	0x100
-#define TIOCM_CD	TIOCM_CAR
-#define TIOCM_RI	TIOCM_RNG
-#define TIOCM_OUT1	0x2000
-#define TIOCM_OUT2	0x4000
-#define TIOCM_LOOP	0x8000
-
-#define TIOCM_MODEM_BITS       TIOCM_OUT2      /* IRDA support */
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-
-#ifdef __KERNEL__
 #include <asm-generic/termios-base.h>
-#endif
-
 #endif /* _ASM_TERMIOS_H */
diff --git a/arch/frv/include/asm/thread_info.h b/arch/frv/include/asm/thread_info.h
index 0ff03a33c81..bebd7eadc77 100644
--- a/arch/frv/include/asm/thread_info.h
+++ b/arch/frv/include/asm/thread_info.h
@@ -94,7 +94,6 @@ register struct thread_info *__current_thread_info asm("gr15");
 #define TIF_NEED_RESCHED	3	/* rescheduling necessary */
 #define TIF_SINGLESTEP		4	/* restore singlestep on return to user mode */
 #define TIF_RESTORE_SIGMASK	5	/* restore signal mask in do_signal() */
-#define TIF_POLLING_NRFLAG	6	/* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE		7	/* is terminating due to OOM killer */
 
 #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
@@ -102,8 +101,6 @@ register struct thread_info *__current_thread_info asm("gr15");
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
 #define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
-#define _TIF_RESTORE_SIGMASK	(1 << TIF_RESTORE_SIGMASK)
-#define _TIF_POLLING_NRFLAG	(1 << TIF_POLLING_NRFLAG)
 
 /* work to do on interrupt/exception return */
 #define _TIF_WORK_MASK		\
diff --git a/arch/frv/include/asm/types.h b/arch/frv/include/asm/types.h
index 390a612f3a5..6bc63650d83 100644
--- a/arch/frv/include/asm/types.h
+++ b/arch/frv/include/asm/types.h
@@ -8,19 +8,15 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
-
 #ifndef _ASM_TYPES_H
 #define _ASM_TYPES_H
 
-#include <asm-generic/int-ll64.h>
+#include <uapi/asm/types.h>
 
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
-#ifdef __KERNEL__
 
 #define BITS_PER_LONG 32
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_TYPES_H */
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h
index 67f23a311db..266a5b25a0c 100644
--- a/arch/frv/include/asm/unistd.h
+++ b/arch/frv/include/asm/unistd.h
@@ -1,351 +1,8 @@
 #ifndef _ASM_UNISTD_H_
 #define _ASM_UNISTD_H_
 
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_restart_syscall      0
-#define __NR_exit		  1
-#define __NR_fork		  2
-#define __NR_read		  3
-#define __NR_write		  4
-#define __NR_open		  5
-#define __NR_close		  6
-#define __NR_waitpid		  7
-#define __NR_creat		  8
-#define __NR_link		  9
-#define __NR_unlink		 10
-#define __NR_execve		 11
-#define __NR_chdir		 12
-#define __NR_time		 13
-#define __NR_mknod		 14
-#define __NR_chmod		 15
-#define __NR_lchown		 16
-#define __NR_break		 17
-#define __NR_oldstat		 18
-#define __NR_lseek		 19
-#define __NR_getpid		 20
-#define __NR_mount		 21
-#define __NR_umount		 22
-#define __NR_setuid		 23
-#define __NR_getuid		 24
-#define __NR_stime		 25
-#define __NR_ptrace		 26
-#define __NR_alarm		 27
-#define __NR_oldfstat		 28
-#define __NR_pause		 29
-#define __NR_utime		 30
-#define __NR_stty		 31
-#define __NR_gtty		 32
-#define __NR_access		 33
-#define __NR_nice		 34
-#define __NR_ftime		 35
-#define __NR_sync		 36
-#define __NR_kill		 37
-#define __NR_rename		 38
-#define __NR_mkdir		 39
-#define __NR_rmdir		 40
-#define __NR_dup		 41
-#define __NR_pipe		 42
-#define __NR_times		 43
-#define __NR_prof		 44
-#define __NR_brk		 45
-#define __NR_setgid		 46
-#define __NR_getgid		 47
-#define __NR_signal		 48
-#define __NR_geteuid		 49
-#define __NR_getegid		 50
-#define __NR_acct		 51
-#define __NR_umount2		 52
-#define __NR_lock		 53
-#define __NR_ioctl		 54
-#define __NR_fcntl		 55
-#define __NR_mpx		 56
-#define __NR_setpgid		 57
-#define __NR_ulimit		 58
-// #define __NR_oldolduname	 /* 59 */ obsolete
-#define __NR_umask		 60
-#define __NR_chroot		 61
-#define __NR_ustat		 62
-#define __NR_dup2		 63
-#define __NR_getppid		 64
-#define __NR_getpgrp		 65
-#define __NR_setsid		 66
-#define __NR_sigaction		 67
-#define __NR_sgetmask		 68
-#define __NR_ssetmask		 69
-#define __NR_setreuid		 70
-#define __NR_setregid		 71
-#define __NR_sigsuspend		 72
-#define __NR_sigpending		 73
-#define __NR_sethostname	 74
-#define __NR_setrlimit		 75
-#define __NR_getrlimit		 76	/* Back compatible 2Gig limited rlimit */
-#define __NR_getrusage		 77
-#define __NR_gettimeofday	 78
-#define __NR_settimeofday	 79
-#define __NR_getgroups		 80
-#define __NR_setgroups		 81
-#define __NR_select		 82
-#define __NR_symlink		 83
-#define __NR_oldlstat		 84
-#define __NR_readlink		 85
-#define __NR_uselib		 86
-#define __NR_swapon		 87
-#define __NR_reboot		 88
-#define __NR_readdir		 89
-// #define __NR_mmap		 90	/* obsolete - not implemented */
-#define __NR_munmap		 91
-#define __NR_truncate		 92
-#define __NR_ftruncate		 93
-#define __NR_fchmod		 94
-#define __NR_fchown		 95
-#define __NR_getpriority	 96
-#define __NR_setpriority	 97
-// #define __NR_profil		 /* 98 */ obsolete
-#define __NR_statfs		 99
-#define __NR_fstatfs		100
-// #define __NR_ioperm		/* 101 */ not supported
-#define __NR_socketcall		102
-#define __NR_syslog		103
-#define __NR_setitimer		104
-#define __NR_getitimer		105
-#define __NR_stat		106
-#define __NR_lstat		107
-#define __NR_fstat		108
-// #define __NR_olduname		/* 109 */ obsolete
-// #define __NR_iopl		/* 110 */ not supported
-#define __NR_vhangup		111
-// #define __NR_idle		/* 112 */ Obsolete
-// #define __NR_vm86old		/* 113 */ not supported
-#define __NR_wait4		114
-#define __NR_swapoff		115
-#define __NR_sysinfo		116
-#define __NR_ipc		117
-#define __NR_fsync		118
-#define __NR_sigreturn		119
-#define __NR_clone		120
-#define __NR_setdomainname	121
-#define __NR_uname		122
-// #define __NR_modify_ldt	/* 123 */ not supported
-#define __NR_cacheflush		123
-#define __NR_adjtimex		124
-#define __NR_mprotect		125
-#define __NR_sigprocmask	126
-#define __NR_create_module	127
-#define __NR_init_module	128
-#define __NR_delete_module	129
-#define __NR_get_kernel_syms	130
-#define __NR_quotactl		131
-#define __NR_getpgid		132
-#define __NR_fchdir		133
-#define __NR_bdflush		134
-#define __NR_sysfs		135
-#define __NR_personality	136
-#define __NR_afs_syscall	137 /* Syscall for Andrew File System */
-#define __NR_setfsuid		138
-#define __NR_setfsgid		139
-#define __NR__llseek		140
-#define __NR_getdents		141
-#define __NR__newselect		142
-#define __NR_flock		143
-#define __NR_msync		144
-#define __NR_readv		145
-#define __NR_writev		146
-#define __NR_getsid		147
-#define __NR_fdatasync		148
-#define __NR__sysctl		149
-#define __NR_mlock		150
-#define __NR_munlock		151
-#define __NR_mlockall		152
-#define __NR_munlockall		153
-#define __NR_sched_setparam		154
-#define __NR_sched_getparam		155
-#define __NR_sched_setscheduler		156
-#define __NR_sched_getscheduler		157
-#define __NR_sched_yield		158
-#define __NR_sched_get_priority_max	159
-#define __NR_sched_get_priority_min	160
-#define __NR_sched_rr_get_interval	161
-#define __NR_nanosleep		162
-#define __NR_mremap		163
-#define __NR_setresuid		164
-#define __NR_getresuid		165
-// #define __NR_vm86		/* 166 */ not supported
-#define __NR_query_module	167
-#define __NR_poll		168
-#define __NR_nfsservctl		169
-#define __NR_setresgid		170
-#define __NR_getresgid		171
-#define __NR_prctl		172
-#define __NR_rt_sigreturn	173
-#define __NR_rt_sigaction	174
-#define __NR_rt_sigprocmask	175
-#define __NR_rt_sigpending	176
-#define __NR_rt_sigtimedwait	177
-#define __NR_rt_sigqueueinfo	178
-#define __NR_rt_sigsuspend	179
-#define __NR_pread64		180
-#define __NR_pwrite64		181
-#define __NR_chown		182
-#define __NR_getcwd		183
-#define __NR_capget		184
-#define __NR_capset		185
-#define __NR_sigaltstack	186
-#define __NR_sendfile		187
-#define __NR_getpmsg		188	/* some people actually want streams */
-#define __NR_putpmsg		189	/* some people actually want streams */
-#define __NR_vfork		190
-#define __NR_ugetrlimit		191	/* SuS compliant getrlimit */
-#define __NR_mmap2		192
-#define __NR_truncate64		193
-#define __NR_ftruncate64	194
-#define __NR_stat64		195
-#define __NR_lstat64		196
-#define __NR_fstat64		197
-#define __NR_lchown32		198
-#define __NR_getuid32		199
-#define __NR_getgid32		200
-#define __NR_geteuid32		201
-#define __NR_getegid32		202
-#define __NR_setreuid32		203
-#define __NR_setregid32		204
-#define __NR_getgroups32	205
-#define __NR_setgroups32	206
-#define __NR_fchown32		207
-#define __NR_setresuid32	208
-#define __NR_getresuid32	209
-#define __NR_setresgid32	210
-#define __NR_getresgid32	211
-#define __NR_chown32		212
-#define __NR_setuid32		213
-#define __NR_setgid32		214
-#define __NR_setfsuid32		215
-#define __NR_setfsgid32		216
-#define __NR_pivot_root		217
-#define __NR_mincore		218
-#define __NR_madvise		219
-
-#define __NR_getdents64		220
-#define __NR_fcntl64		221
-#define __NR_security		223	/* syscall for security modules */
-#define __NR_gettid		224
-#define __NR_readahead		225
-#define __NR_setxattr		226
-#define __NR_lsetxattr		227
-#define __NR_fsetxattr		228
-#define __NR_getxattr		229
-#define __NR_lgetxattr		230
-#define __NR_fgetxattr		231
-#define __NR_listxattr		232
-#define __NR_llistxattr		233
-#define __NR_flistxattr		234
-#define __NR_removexattr	235
-#define __NR_lremovexattr	236
-#define __NR_fremovexattr	237
-#define __NR_tkill		238
-#define __NR_sendfile64		239
-#define __NR_futex		240
-#define __NR_sched_setaffinity	241
-#define __NR_sched_getaffinity	242
-#define __NR_set_thread_area	243
-#define __NR_get_thread_area	244
-#define __NR_io_setup		245
-#define __NR_io_destroy		246
-#define __NR_io_getevents	247
-#define __NR_io_submit		248
-#define __NR_io_cancel		249
-#define __NR_fadvise64		250
-
-#define __NR_exit_group		252
-#define __NR_lookup_dcookie	253
-#define __NR_epoll_create	254
-#define __NR_epoll_ctl		255
-#define __NR_epoll_wait		256
-#define __NR_remap_file_pages	257
-#define __NR_set_tid_address	258
-#define __NR_timer_create	259
-#define __NR_timer_settime	(__NR_timer_create+1)
-#define __NR_timer_gettime	(__NR_timer_create+2)
-#define __NR_timer_getoverrun	(__NR_timer_create+3)
-#define __NR_timer_delete	(__NR_timer_create+4)
-#define __NR_clock_settime	(__NR_timer_create+5)
-#define __NR_clock_gettime	(__NR_timer_create+6)
-#define __NR_clock_getres	(__NR_timer_create+7)
-#define __NR_clock_nanosleep	(__NR_timer_create+8)
-#define __NR_statfs64		268
-#define __NR_fstatfs64		269
-#define __NR_tgkill		270
-#define __NR_utimes		271
-#define __NR_fadvise64_64	272
-#define __NR_vserver		273
-#define __NR_mbind		274
-#define __NR_get_mempolicy	275
-#define __NR_set_mempolicy	276
-#define __NR_mq_open 		277
-#define __NR_mq_unlink		(__NR_mq_open+1)
-#define __NR_mq_timedsend	(__NR_mq_open+2)
-#define __NR_mq_timedreceive	(__NR_mq_open+3)
-#define __NR_mq_notify		(__NR_mq_open+4)
-#define __NR_mq_getsetattr	(__NR_mq_open+5)
-#define __NR_kexec_load		283
-#define __NR_waitid		284
-/* #define __NR_sys_setaltroot	285 */
-#define __NR_add_key		286
-#define __NR_request_key	287
-#define __NR_keyctl		288
-#define __NR_ioprio_set		289
-#define __NR_ioprio_get		290
-#define __NR_inotify_init	291
-#define __NR_inotify_add_watch	292
-#define __NR_inotify_rm_watch	293
-#define __NR_migrate_pages	294
-#define __NR_openat		295
-#define __NR_mkdirat		296
-#define __NR_mknodat		297
-#define __NR_fchownat		298
-#define __NR_futimesat		299
-#define __NR_fstatat64		300
-#define __NR_unlinkat		301
-#define __NR_renameat		302
-#define __NR_linkat		303
-#define __NR_symlinkat		304
-#define __NR_readlinkat		305
-#define __NR_fchmodat		306
-#define __NR_faccessat		307
-#define __NR_pselect6		308
-#define __NR_ppoll		309
-#define __NR_unshare		310
-#define __NR_set_robust_list	311
-#define __NR_get_robust_list	312
-#define __NR_splice		313
-#define __NR_sync_file_range	314
-#define __NR_tee		315
-#define __NR_vmsplice		316
-#define __NR_move_pages		317
-#define __NR_getcpu		318
-#define __NR_epoll_pwait	319
-#define __NR_utimensat		320
-#define __NR_signalfd		321
-#define __NR_timerfd_create	322
-#define __NR_eventfd		323
-#define __NR_fallocate		324
-#define __NR_timerfd_settime	325
-#define __NR_timerfd_gettime	326
-#define __NR_signalfd4		327
-#define __NR_eventfd2		328
-#define __NR_epoll_create1	329
-#define __NR_dup3		330
-#define __NR_pipe2		331
-#define __NR_inotify_init1	332
-#define __NR_preadv		333
-#define __NR_pwritev		334
-#define __NR_rt_tgsigqueueinfo	335
-#define __NR_perf_event_open	336
-#define __NR_setns		337
+#include <uapi/asm/unistd.h>
 
-#ifdef __KERNEL__
 
 #define NR_syscalls 338
 
@@ -372,6 +29,8 @@
 #define __ARCH_WANT_SYS_SIGPROCMASK
 #define __ARCH_WANT_SYS_RT_SIGACTION
 #define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_SYS_EXECVE
+#define __ARCH_WANT_KERNEL_EXECVE
 
 /*
  * "Conditional" syscalls
@@ -383,5 +42,4 @@
 #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
 #endif
 
-#endif /* __KERNEL__ */
 #endif /* _ASM_UNISTD_H_ */
diff --git a/arch/frv/include/uapi/asm/Kbuild b/arch/frv/include/uapi/asm/Kbuild
index baebb3da1d4..42a2b33461c 100644
--- a/arch/frv/include/uapi/asm/Kbuild
+++ b/arch/frv/include/uapi/asm/Kbuild
@@ -1,3 +1,35 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += byteorder.h
+header-y += errno.h
+header-y += fcntl.h
+header-y += ioctl.h
+header-y += ioctls.h
+header-y += ipcbuf.h
+header-y += kvm_para.h
+header-y += mman.h
+header-y += msgbuf.h
+header-y += param.h
+header-y += poll.h
+header-y += posix_types.h
+header-y += ptrace.h
+header-y += registers.h
+header-y += resource.h
+header-y += sembuf.h
+header-y += setup.h
+header-y += shmbuf.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += socket.h
+header-y += sockios.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += termbits.h
+header-y += termios.h
+header-y += types.h
+header-y += unistd.h
diff --git a/arch/frv/include/asm/auxvec.h b/arch/frv/include/uapi/asm/auxvec.h
index 07710778fa1..07710778fa1 100644
--- a/arch/frv/include/asm/auxvec.h
+++ b/arch/frv/include/uapi/asm/auxvec.h
diff --git a/arch/frv/include/asm/bitsperlong.h b/arch/frv/include/uapi/asm/bitsperlong.h
index 6dc0bb0c13b..6dc0bb0c13b 100644
--- a/arch/frv/include/asm/bitsperlong.h
+++ b/arch/frv/include/uapi/asm/bitsperlong.h
diff --git a/arch/frv/include/asm/byteorder.h b/arch/frv/include/uapi/asm/byteorder.h
index f29b7593e08..f29b7593e08 100644
--- a/arch/frv/include/asm/byteorder.h
+++ b/arch/frv/include/uapi/asm/byteorder.h
diff --git a/arch/frv/include/asm/errno.h b/arch/frv/include/uapi/asm/errno.h
index d010795ceef..d010795ceef 100644
--- a/arch/frv/include/asm/errno.h
+++ b/arch/frv/include/uapi/asm/errno.h
diff --git a/arch/frv/include/asm/fcntl.h b/arch/frv/include/uapi/asm/fcntl.h
index 46ab12db573..46ab12db573 100644
--- a/arch/frv/include/asm/fcntl.h
+++ b/arch/frv/include/uapi/asm/fcntl.h
diff --git a/arch/frv/include/asm/ioctl.h b/arch/frv/include/uapi/asm/ioctl.h
index b279fe06dfe..b279fe06dfe 100644
--- a/arch/frv/include/asm/ioctl.h
+++ b/arch/frv/include/uapi/asm/ioctl.h
diff --git a/arch/frv/include/asm/ioctls.h b/arch/frv/include/uapi/asm/ioctls.h
index 2f9fb436ec3..2f9fb436ec3 100644
--- a/arch/frv/include/asm/ioctls.h
+++ b/arch/frv/include/uapi/asm/ioctls.h
diff --git a/arch/frv/include/asm/ipcbuf.h b/arch/frv/include/uapi/asm/ipcbuf.h
index 84c7e51cb6d..84c7e51cb6d 100644
--- a/arch/frv/include/asm/ipcbuf.h
+++ b/arch/frv/include/uapi/asm/ipcbuf.h
diff --git a/arch/frv/include/asm/kvm_para.h b/arch/frv/include/uapi/asm/kvm_para.h
index 14fab8f0b95..14fab8f0b95 100644
--- a/arch/frv/include/asm/kvm_para.h
+++ b/arch/frv/include/uapi/asm/kvm_para.h
diff --git a/arch/frv/include/asm/mman.h b/arch/frv/include/uapi/asm/mman.h
index 8eebf89f5ab..8eebf89f5ab 100644
--- a/arch/frv/include/asm/mman.h
+++ b/arch/frv/include/uapi/asm/mman.h
diff --git a/arch/frv/include/asm/msgbuf.h b/arch/frv/include/uapi/asm/msgbuf.h
index 97ceb55a06f..97ceb55a06f 100644
--- a/arch/frv/include/asm/msgbuf.h
+++ b/arch/frv/include/uapi/asm/msgbuf.h
diff --git a/arch/frv/include/asm/param.h b/arch/frv/include/uapi/asm/param.h
index a52dca9a956..a52dca9a956 100644
--- a/arch/frv/include/asm/param.h
+++ b/arch/frv/include/uapi/asm/param.h
diff --git a/arch/frv/include/asm/poll.h b/arch/frv/include/uapi/asm/poll.h
index 0d01479ccc5..0d01479ccc5 100644
--- a/arch/frv/include/asm/poll.h
+++ b/arch/frv/include/uapi/asm/poll.h
diff --git a/arch/frv/include/asm/posix_types.h b/arch/frv/include/uapi/asm/posix_types.h
index fe512af74a5..fe512af74a5 100644
--- a/arch/frv/include/asm/posix_types.h
+++ b/arch/frv/include/uapi/asm/posix_types.h
diff --git a/arch/frv/include/uapi/asm/ptrace.h b/arch/frv/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..3887e493468
--- /dev/null
+++ b/arch/frv/include/uapi/asm/ptrace.h
@@ -0,0 +1,60 @@
+/* ptrace.h: ptrace() relevant definitions
+ *
+ * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_PTRACE_H
+#define _UAPI_ASM_PTRACE_H
+
+#include <asm/registers.h>
+
+
+#define PT_PSR		0
+#define	PT_ISR		1
+#define PT_CCR		2
+#define PT_CCCR		3
+#define PT_LR		4
+#define PT_LCR		5
+#define PT_PC		6
+
+#define PT__STATUS	7	/* exception status */
+#define PT_SYSCALLNO	8	/* syscall number or -1 */
+#define PT_ORIG_GR8	9	/* saved GR8 for signal handling */
+#define PT_GNER0	10
+#define PT_GNER1	11
+#define PT_IACC0H	12
+#define PT_IACC0L	13
+
+#define PT_GR(j)	( 14 + (j))	/* GRj for 0<=j<=63 */
+#define PT_FR(j)	( 78 + (j))	/* FRj for 0<=j<=63 */
+#define PT_FNER(j)	(142 + (j))	/* FNERj for 0<=j<=1 */
+#define PT_MSR(j)	(144 + (j))	/* MSRj for 0<=j<=2 */
+#define PT_ACC(j)	(146 + (j))	/* ACCj for 0<=j<=7 */
+#define PT_ACCG(jklm)	(154 + (jklm))	/* ACCGjklm for 0<=jklm<=1 (reads four regs per slot) */
+#define PT_FSR(j)	(156 + (j))	/* FSRj for 0<=j<=0 */
+#define PT__GPEND	78
+#define PT__END		157
+
+#define PT_TBR		PT_GR(0)
+#define PT_SP		PT_GR(1)
+#define PT_FP		PT_GR(2)
+#define PT_PREV_FRAME	PT_GR(28)	/* previous exception frame pointer (old gr28 value) */
+#define PT_CURR_TASK	PT_GR(29)	/* current task */
+
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS		12
+#define PTRACE_SETREGS		13
+#define PTRACE_GETFPREGS	14
+#define PTRACE_SETFPREGS	15
+#define PTRACE_GETFDPIC		31	/* get the ELF fdpic loadmap address */
+
+#define PTRACE_GETFDPIC_EXEC	0	/* [addr] request the executable loadmap */
+#define PTRACE_GETFDPIC_INTERP	1	/* [addr] request the interpreter loadmap */
+
+#endif /* _UAPI_ASM_PTRACE_H */
diff --git a/arch/frv/include/asm/registers.h b/arch/frv/include/uapi/asm/registers.h
index 9666119fcf6..9666119fcf6 100644
--- a/arch/frv/include/asm/registers.h
+++ b/arch/frv/include/uapi/asm/registers.h
diff --git a/arch/frv/include/asm/resource.h b/arch/frv/include/uapi/asm/resource.h
index 5fc60548fd0..5fc60548fd0 100644
--- a/arch/frv/include/asm/resource.h
+++ b/arch/frv/include/uapi/asm/resource.h
diff --git a/arch/frv/include/asm/sembuf.h b/arch/frv/include/uapi/asm/sembuf.h
index 164b12786d6..164b12786d6 100644
--- a/arch/frv/include/asm/sembuf.h
+++ b/arch/frv/include/uapi/asm/sembuf.h
diff --git a/arch/frv/include/uapi/asm/setup.h b/arch/frv/include/uapi/asm/setup.h
new file mode 100644
index 00000000000..fbf3fc96aae
--- /dev/null
+++ b/arch/frv/include/uapi/asm/setup.h
@@ -0,0 +1,18 @@
+/* setup.h: setup stuff
+ *
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _UAPI_ASM_SETUP_H
+#define _UAPI_ASM_SETUP_H
+
+#define COMMAND_LINE_SIZE       512
+
+
+#endif /* _UAPI_ASM_SETUP_H */
diff --git a/arch/frv/include/asm/shmbuf.h b/arch/frv/include/uapi/asm/shmbuf.h
index 4c6e711a477..4c6e711a477 100644
--- a/arch/frv/include/asm/shmbuf.h
+++ b/arch/frv/include/uapi/asm/shmbuf.h
diff --git a/arch/frv/include/asm/sigcontext.h b/arch/frv/include/uapi/asm/sigcontext.h
index 3b263f3cc96..3b263f3cc96 100644
--- a/arch/frv/include/asm/sigcontext.h
+++ b/arch/frv/include/uapi/asm/sigcontext.h
diff --git a/arch/frv/include/asm/siginfo.h b/arch/frv/include/uapi/asm/siginfo.h
index d3fd1ca4565..d3fd1ca4565 100644
--- a/arch/frv/include/asm/siginfo.h
+++ b/arch/frv/include/uapi/asm/siginfo.h
diff --git a/arch/frv/include/uapi/asm/signal.h b/arch/frv/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..bf3b162f9be
--- /dev/null
+++ b/arch/frv/include/uapi/asm/signal.h
@@ -0,0 +1,36 @@
+#ifndef _UAPI_ASM_SIGNAL_H
+#define _UAPI_ASM_SIGNAL_H
+
+#include <linux/types.h>
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG		32
+typedef unsigned long sigset_t;
+
+#endif /* !__KERNEL__ */
+
+#define SA_RESTORER	0x04000000 /* to get struct sigaction correct */
+
+#include <asm-generic/signal.h>
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+	union {
+	  __sighandler_t _sa_handler;
+	  void (*_sa_sigaction)(int, struct siginfo *, void *);
+	} _u;
+	sigset_t sa_mask;
+	unsigned long sa_flags;
+	void (*sa_restorer)(void);
+};
+
+#define sa_handler	_u._sa_handler
+#define sa_sigaction	_u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+#endif /* _UAPI_ASM_SIGNAL_H */
diff --git a/arch/frv/include/asm/socket.h b/arch/frv/include/uapi/asm/socket.h
index a5b1d7dbb20..a5b1d7dbb20 100644
--- a/arch/frv/include/asm/socket.h
+++ b/arch/frv/include/uapi/asm/socket.h
diff --git a/arch/frv/include/asm/sockios.h b/arch/frv/include/uapi/asm/sockios.h
index 5dbdd13e6de..5dbdd13e6de 100644
--- a/arch/frv/include/asm/sockios.h
+++ b/arch/frv/include/uapi/asm/sockios.h
diff --git a/arch/frv/include/asm/stat.h b/arch/frv/include/uapi/asm/stat.h
index ce56de9b37b..ce56de9b37b 100644
--- a/arch/frv/include/asm/stat.h
+++ b/arch/frv/include/uapi/asm/stat.h
diff --git a/arch/frv/include/asm/statfs.h b/arch/frv/include/uapi/asm/statfs.h
index 741f586045b..741f586045b 100644
--- a/arch/frv/include/asm/statfs.h
+++ b/arch/frv/include/uapi/asm/statfs.h
diff --git a/arch/frv/include/asm/swab.h b/arch/frv/include/uapi/asm/swab.h
index f305834b479..f305834b479 100644
--- a/arch/frv/include/asm/swab.h
+++ b/arch/frv/include/uapi/asm/swab.h
diff --git a/arch/frv/include/asm/termbits.h b/arch/frv/include/uapi/asm/termbits.h
index 7722e19cc34..7722e19cc34 100644
--- a/arch/frv/include/asm/termbits.h
+++ b/arch/frv/include/uapi/asm/termbits.h
diff --git a/arch/frv/include/uapi/asm/termios.h b/arch/frv/include/uapi/asm/termios.h
new file mode 100644
index 00000000000..edcc08a2238
--- /dev/null
+++ b/arch/frv/include/uapi/asm/termios.h
@@ -0,0 +1,46 @@
+#ifndef _UAPI_ASM_TERMIOS_H
+#define _UAPI_ASM_TERMIOS_H
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+	unsigned short ws_row;
+	unsigned short ws_col;
+	unsigned short ws_xpixel;
+	unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+	unsigned short c_iflag;		/* input mode flags */
+	unsigned short c_oflag;		/* output mode flags */
+	unsigned short c_cflag;		/* control mode flags */
+	unsigned short c_lflag;		/* local mode flags */
+	unsigned char c_line;		/* line discipline */
+	unsigned char c_cc[NCC];	/* control characters */
+};
+
+
+/* modem lines */
+#define TIOCM_LE	0x001
+#define TIOCM_DTR	0x002
+#define TIOCM_RTS	0x004
+#define TIOCM_ST	0x008
+#define TIOCM_SR	0x010
+#define TIOCM_CTS	0x020
+#define TIOCM_CAR	0x040
+#define TIOCM_RNG	0x080
+#define TIOCM_DSR	0x100
+#define TIOCM_CD	TIOCM_CAR
+#define TIOCM_RI	TIOCM_RNG
+#define TIOCM_OUT1	0x2000
+#define TIOCM_OUT2	0x4000
+#define TIOCM_LOOP	0x8000
+
+#define TIOCM_MODEM_BITS       TIOCM_OUT2      /* IRDA support */
+
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+
+
+#endif /* _UAPI_ASM_TERMIOS_H */
diff --git a/arch/frv/include/asm/exec.h b/arch/frv/include/uapi/asm/types.h
index 65c91305d4a..cf23149943f 100644
--- a/arch/frv/include/asm/exec.h
+++ b/arch/frv/include/uapi/asm/types.h
@@ -1,6 +1,6 @@
-/* FR-V CPU executable handling
+/* types.h: FRV types
  *
- * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
+ * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
  * Written by David Howells (dhowells@redhat.com)
  *
  * This program is free software; you can redistribute it and/or
@@ -8,10 +8,4 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
-
-#ifndef _ASM_EXEC_H
-#define _ASM_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* _ASM_EXEC_H */
+#include <asm-generic/int-ll64.h>
diff --git a/arch/frv/include/uapi/asm/unistd.h b/arch/frv/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..9e2612ff1c9
--- /dev/null
+++ b/arch/frv/include/uapi/asm/unistd.h
@@ -0,0 +1,348 @@
+#ifndef _UAPI_ASM_UNISTD_H_
+#define _UAPI_ASM_UNISTD_H_
+
+/*
+ * This file contains the system call numbers.
+ */
+
+#define __NR_restart_syscall      0
+#define __NR_exit		  1
+#define __NR_fork		  2
+#define __NR_read		  3
+#define __NR_write		  4
+#define __NR_open		  5
+#define __NR_close		  6
+#define __NR_waitpid		  7
+#define __NR_creat		  8
+#define __NR_link		  9
+#define __NR_unlink		 10
+#define __NR_execve		 11
+#define __NR_chdir		 12
+#define __NR_time		 13
+#define __NR_mknod		 14
+#define __NR_chmod		 15
+#define __NR_lchown		 16
+#define __NR_break		 17
+#define __NR_oldstat		 18
+#define __NR_lseek		 19
+#define __NR_getpid		 20
+#define __NR_mount		 21
+#define __NR_umount		 22
+#define __NR_setuid		 23
+#define __NR_getuid		 24
+#define __NR_stime		 25
+#define __NR_ptrace		 26
+#define __NR_alarm		 27
+#define __NR_oldfstat		 28
+#define __NR_pause		 29
+#define __NR_utime		 30
+#define __NR_stty		 31
+#define __NR_gtty		 32
+#define __NR_access		 33
+#define __NR_nice		 34
+#define __NR_ftime		 35
+#define __NR_sync		 36
+#define __NR_kill		 37
+#define __NR_rename		 38
+#define __NR_mkdir		 39
+#define __NR_rmdir		 40
+#define __NR_dup		 41
+#define __NR_pipe		 42
+#define __NR_times		 43
+#define __NR_prof		 44
+#define __NR_brk		 45
+#define __NR_setgid		 46
+#define __NR_getgid		 47
+#define __NR_signal		 48
+#define __NR_geteuid		 49
+#define __NR_getegid		 50
+#define __NR_acct		 51
+#define __NR_umount2		 52
+#define __NR_lock		 53
+#define __NR_ioctl		 54
+#define __NR_fcntl		 55
+#define __NR_mpx		 56
+#define __NR_setpgid		 57
+#define __NR_ulimit		 58
+// #define __NR_oldolduname	 /* 59 */ obsolete
+#define __NR_umask		 60
+#define __NR_chroot		 61
+#define __NR_ustat		 62
+#define __NR_dup2		 63
+#define __NR_getppid		 64
+#define __NR_getpgrp		 65
+#define __NR_setsid		 66
+#define __NR_sigaction		 67
+#define __NR_sgetmask		 68
+#define __NR_ssetmask		 69
+#define __NR_setreuid		 70
+#define __NR_setregid		 71
+#define __NR_sigsuspend		 72
+#define __NR_sigpending		 73
+#define __NR_sethostname	 74
+#define __NR_setrlimit		 75
+#define __NR_getrlimit		 76	/* Back compatible 2Gig limited rlimit */
+#define __NR_getrusage		 77
+#define __NR_gettimeofday	 78
+#define __NR_settimeofday	 79
+#define __NR_getgroups		 80
+#define __NR_setgroups		 81
+#define __NR_select		 82
+#define __NR_symlink		 83
+#define __NR_oldlstat		 84
+#define __NR_readlink		 85
+#define __NR_uselib		 86
+#define __NR_swapon		 87
+#define __NR_reboot		 88
+#define __NR_readdir		 89
+// #define __NR_mmap		 90	/* obsolete - not implemented */
+#define __NR_munmap		 91
+#define __NR_truncate		 92
+#define __NR_ftruncate		 93
+#define __NR_fchmod		 94
+#define __NR_fchown		 95
+#define __NR_getpriority	 96
+#define __NR_setpriority	 97
+// #define __NR_profil		 /* 98 */ obsolete
+#define __NR_statfs		 99
+#define __NR_fstatfs		100
+// #define __NR_ioperm		/* 101 */ not supported
+#define __NR_socketcall		102
+#define __NR_syslog		103
+#define __NR_setitimer		104
+#define __NR_getitimer		105
+#define __NR_stat		106
+#define __NR_lstat		107
+#define __NR_fstat		108
+// #define __NR_olduname		/* 109 */ obsolete
+// #define __NR_iopl		/* 110 */ not supported
+#define __NR_vhangup		111
+// #define __NR_idle		/* 112 */ Obsolete
+// #define __NR_vm86old		/* 113 */ not supported
+#define __NR_wait4		114
+#define __NR_swapoff		115
+#define __NR_sysinfo		116
+#define __NR_ipc		117
+#define __NR_fsync		118
+#define __NR_sigreturn		119
+#define __NR_clone		120
+#define __NR_setdomainname	121
+#define __NR_uname		122
+// #define __NR_modify_ldt	/* 123 */ not supported
+#define __NR_cacheflush		123
+#define __NR_adjtimex		124
+#define __NR_mprotect		125
+#define __NR_sigprocmask	126
+#define __NR_create_module	127
+#define __NR_init_module	128
+#define __NR_delete_module	129
+#define __NR_get_kernel_syms	130
+#define __NR_quotactl		131
+#define __NR_getpgid		132
+#define __NR_fchdir		133
+#define __NR_bdflush		134
+#define __NR_sysfs		135
+#define __NR_personality	136
+#define __NR_afs_syscall	137 /* Syscall for Andrew File System */
+#define __NR_setfsuid		138
+#define __NR_setfsgid		139
+#define __NR__llseek		140
+#define __NR_getdents		141
+#define __NR__newselect		142
+#define __NR_flock		143
+#define __NR_msync		144
+#define __NR_readv		145
+#define __NR_writev		146
+#define __NR_getsid		147
+#define __NR_fdatasync		148
+#define __NR__sysctl		149
+#define __NR_mlock		150
+#define __NR_munlock		151
+#define __NR_mlockall		152
+#define __NR_munlockall		153
+#define __NR_sched_setparam		154
+#define __NR_sched_getparam		155
+#define __NR_sched_setscheduler		156
+#define __NR_sched_getscheduler		157
+#define __NR_sched_yield		158
+#define __NR_sched_get_priority_max	159
+#define __NR_sched_get_priority_min	160
+#define __NR_sched_rr_get_interval	161
+#define __NR_nanosleep		162
+#define __NR_mremap		163
+#define __NR_setresuid		164
+#define __NR_getresuid		165
+// #define __NR_vm86		/* 166 */ not supported
+#define __NR_query_module	167
+#define __NR_poll		168
+#define __NR_nfsservctl		169
+#define __NR_setresgid		170
+#define __NR_getresgid		171
+#define __NR_prctl		172
+#define __NR_rt_sigreturn	173
+#define __NR_rt_sigaction	174
+#define __NR_rt_sigprocmask	175
+#define __NR_rt_sigpending	176
+#define __NR_rt_sigtimedwait	177
+#define __NR_rt_sigqueueinfo	178
+#define __NR_rt_sigsuspend	179
+#define __NR_pread64		180
+#define __NR_pwrite64		181
+#define __NR_chown		182
+#define __NR_getcwd		183
+#define __NR_capget		184
+#define __NR_capset		185
+#define __NR_sigaltstack	186
+#define __NR_sendfile		187
+#define __NR_getpmsg		188	/* some people actually want streams */
+#define __NR_putpmsg		189	/* some people actually want streams */
+#define __NR_vfork		190
+#define __NR_ugetrlimit		191	/* SuS compliant getrlimit */
+#define __NR_mmap2		192
+#define __NR_truncate64		193
+#define __NR_ftruncate64	194
+#define __NR_stat64		195
+#define __NR_lstat64		196
+#define __NR_fstat64		197
+#define __NR_lchown32		198
+#define __NR_getuid32		199
+#define __NR_getgid32		200
+#define __NR_geteuid32		201
+#define __NR_getegid32		202
+#define __NR_setreuid32		203
+#define __NR_setregid32		204
+#define __NR_getgroups32	205
+#define __NR_setgroups32	206
+#define __NR_fchown32		207
+#define __NR_setresuid32	208
+#define __NR_getresuid32	209
+#define __NR_setresgid32	210
+#define __NR_getresgid32	211
+#define __NR_chown32		212
+#define __NR_setuid32		213
+#define __NR_setgid32		214
+#define __NR_setfsuid32		215
+#define __NR_setfsgid32		216
+#define __NR_pivot_root		217
+#define __NR_mincore		218
+#define __NR_madvise		219
+
+#define __NR_getdents64		220
+#define __NR_fcntl64		221
+#define __NR_security		223	/* syscall for security modules */
+#define __NR_gettid		224
+#define __NR_readahead		225
+#define __NR_setxattr		226
+#define __NR_lsetxattr		227
+#define __NR_fsetxattr		228
+#define __NR_getxattr		229
+#define __NR_lgetxattr		230
+#define __NR_fgetxattr		231
+#define __NR_listxattr		232
+#define __NR_llistxattr		233
+#define __NR_flistxattr		234
+#define __NR_removexattr	235
+#define __NR_lremovexattr	236
+#define __NR_fremovexattr	237
+#define __NR_tkill		238
+#define __NR_sendfile64		239
+#define __NR_futex		240
+#define __NR_sched_setaffinity	241
+#define __NR_sched_getaffinity	242
+#define __NR_set_thread_area	243
+#define __NR_get_thread_area	244
+#define __NR_io_setup		245
+#define __NR_io_destroy		246
+#define __NR_io_getevents	247
+#define __NR_io_submit		248
+#define __NR_io_cancel		249
+#define __NR_fadvise64		250
+
+#define __NR_exit_group		252
+#define __NR_lookup_dcookie	253
+#define __NR_epoll_create	254
+#define __NR_epoll_ctl		255
+#define __NR_epoll_wait		256
+#define __NR_remap_file_pages	257
+#define __NR_set_tid_address	258
+#define __NR_timer_create	259
+#define __NR_timer_settime	(__NR_timer_create+1)
+#define __NR_timer_gettime	(__NR_timer_create+2)
+#define __NR_timer_getoverrun	(__NR_timer_create+3)
+#define __NR_timer_delete	(__NR_timer_create+4)
+#define __NR_clock_settime	(__NR_timer_create+5)
+#define __NR_clock_gettime	(__NR_timer_create+6)
+#define __NR_clock_getres	(__NR_timer_create+7)
+#define __NR_clock_nanosleep	(__NR_timer_create+8)
+#define __NR_statfs64		268
+#define __NR_fstatfs64		269
+#define __NR_tgkill		270
+#define __NR_utimes		271
+#define __NR_fadvise64_64	272
+#define __NR_vserver		273
+#define __NR_mbind		274
+#define __NR_get_mempolicy	275
+#define __NR_set_mempolicy	276
+#define __NR_mq_open 		277
+#define __NR_mq_unlink		(__NR_mq_open+1)
+#define __NR_mq_timedsend	(__NR_mq_open+2)
+#define __NR_mq_timedreceive	(__NR_mq_open+3)
+#define __NR_mq_notify		(__NR_mq_open+4)
+#define __NR_mq_getsetattr	(__NR_mq_open+5)
+#define __NR_kexec_load		283
+#define __NR_waitid		284
+/* #define __NR_sys_setaltroot	285 */
+#define __NR_add_key		286
+#define __NR_request_key	287
+#define __NR_keyctl		288
+#define __NR_ioprio_set		289
+#define __NR_ioprio_get		290
+#define __NR_inotify_init	291
+#define __NR_inotify_add_watch	292
+#define __NR_inotify_rm_watch	293
+#define __NR_migrate_pages	294
+#define __NR_openat		295
+#define __NR_mkdirat		296
+#define __NR_mknodat		297
+#define __NR_fchownat		298
+#define __NR_futimesat		299
+#define __NR_fstatat64		300
+#define __NR_unlinkat		301
+#define __NR_renameat		302
+#define __NR_linkat		303
+#define __NR_symlinkat		304
+#define __NR_readlinkat		305
+#define __NR_fchmodat		306
+#define __NR_faccessat		307
+#define __NR_pselect6		308
+#define __NR_ppoll		309
+#define __NR_unshare		310
+#define __NR_set_robust_list	311
+#define __NR_get_robust_list	312
+#define __NR_splice		313
+#define __NR_sync_file_range	314
+#define __NR_tee		315
+#define __NR_vmsplice		316
+#define __NR_move_pages		317
+#define __NR_getcpu		318
+#define __NR_epoll_pwait	319
+#define __NR_utimensat		320
+#define __NR_signalfd		321
+#define __NR_timerfd_create	322
+#define __NR_eventfd		323
+#define __NR_fallocate		324
+#define __NR_timerfd_settime	325
+#define __NR_timerfd_gettime	326
+#define __NR_signalfd4		327
+#define __NR_eventfd2		328
+#define __NR_epoll_create1	329
+#define __NR_dup3		330
+#define __NR_pipe2		331
+#define __NR_inotify_init1	332
+#define __NR_preadv		333
+#define __NR_pwritev		334
+#define __NR_rt_tgsigqueueinfo	335
+#define __NR_perf_event_open	336
+#define __NR_setns		337
+
+#endif /* _UAPI_ASM_UNISTD_H_ */
diff --git a/arch/frv/kernel/Makefile b/arch/frv/kernel/Makefile
index ad4087b6996..3cbb3294b9f 100644
--- a/arch/frv/kernel/Makefile
+++ b/arch/frv/kernel/Makefile
@@ -7,8 +7,8 @@ heads-$(CONFIG_MMU)		:= head-mmu-fr451.o
 
 extra-y:= head.o vmlinux.lds
 
-obj-y := $(heads-y) entry.o entry-table.o break.o switch_to.o kernel_thread.o \
-	 kernel_execve.o process.o traps.o ptrace.o signal.o dma.o \
+obj-y := $(heads-y) entry.o entry-table.o break.o switch_to.o \
+	 process.o traps.o ptrace.o signal.o dma.o \
 	 sys_frv.o time.o setup.o frv_ksyms.o \
 	 debug-stub.o irq.o sleep.o uaccess.o
 
diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S
index 7d5e000fd32..00273296031 100644
--- a/arch/frv/kernel/entry.S
+++ b/arch/frv/kernel/entry.S
@@ -863,6 +863,19 @@ ret_from_fork:
 	setlos.p	#0,gr8
 	bra		__syscall_exit
 
+	.globl		ret_from_kernel_thread
+ret_from_kernel_thread:
+	lddi.p		@(gr28,#REG_GR(8)),gr20
+	call		schedule_tail
+	or.p		gr20,gr20,gr8
+	calll		@(gr21,gr0)
+	bra		sys_exit
+
+	.globl		ret_from_kernel_execve
+ret_from_kernel_execve:
+	ori		gr28,0,sp
+	bra		__syscall_exit
+
 ###################################################################################################
 #
 # Return to user mode is not as complex as all this looks,
diff --git a/arch/frv/kernel/frv_ksyms.c b/arch/frv/kernel/frv_ksyms.c
index a89803b58b9..86c516d96dc 100644
--- a/arch/frv/kernel/frv_ksyms.c
+++ b/arch/frv/kernel/frv_ksyms.c
@@ -30,7 +30,6 @@ EXPORT_SYMBOL(ip_fast_csum);
 EXPORT_SYMBOL(local_irq_count);
 EXPORT_SYMBOL(local_bh_count);
 #endif
-EXPORT_SYMBOL(kernel_thread);
 
 EXPORT_SYMBOL(__res_bus_clock_speed_HZ);
 EXPORT_SYMBOL(__page_offset);
diff --git a/arch/frv/kernel/kernel_execve.S b/arch/frv/kernel/kernel_execve.S
deleted file mode 100644
index 9b074a16a05..00000000000
--- a/arch/frv/kernel/kernel_execve.S
+++ /dev/null
@@ -1,33 +0,0 @@
-/* in-kernel program execution
- *
- * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/linkage.h>
-#include <asm/unistd.h>
-
-###############################################################################
-#
-# Do a system call from kernel instead of calling sys_execve so we end up with
-# proper pt_regs.
-#
-# int kernel_execve(const char *filename, char *const argv[], char *const envp[])
-#
-# On entry: GR8/GR9/GR10: arguments to function
-# On return: GR8: syscall return.
-#
-###############################################################################
-	.globl		kernel_execve
-	.type		kernel_execve,@function
-kernel_execve:
-	setlos		__NR_execve,gr7
-	tira		gr0,#0
-	bralr
-
-	.size		kernel_execve,.-kernel_execve
diff --git a/arch/frv/kernel/kernel_thread.S b/arch/frv/kernel/kernel_thread.S
deleted file mode 100644
index f0e52943f92..00000000000
--- a/arch/frv/kernel/kernel_thread.S
+++ /dev/null
@@ -1,77 +0,0 @@
-/* kernel_thread.S: kernel thread creation
- *
- * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/linkage.h>
-#include <linux/kern_levels.h>
-#include <asm/unistd.h>
-
-#define CLONE_VM	0x00000100	/* set if VM shared between processes */
-
-	.section .rodata
-kernel_thread_emsg:
-	.asciz	KERN_ERR "failed to create kernel thread: error=%d\n"
-
-	.text
-	.balign		4
-
-###############################################################################
-#
-# Create a kernel thread
-#
-# int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
-#
-###############################################################################
-	.globl		kernel_thread
-	.type		kernel_thread,@function
-kernel_thread:
-	or.p		gr8,gr0,gr4
-	or		gr9,gr0,gr5
-
-	# start by forking the current process, but with shared VM
-	setlos.p	#__NR_clone,gr7		; syscall number
-	ori		gr10,#CLONE_VM,gr8	; first syscall arg	[clone_flags]
-	sethi.p		#0xe4e4,gr9		; second syscall arg	[newsp]
-	setlo		#0xe4e4,gr9
-	setlos.p	#0,gr10			; third syscall arg	[parent_tidptr]
-	setlos		#0,gr11			; fourth syscall arg	[child_tidptr]
-	tira		gr0,#0
-	setlos.p	#4095,gr7
-	andcc		gr8,gr8,gr0,icc0
-	addcc.p		gr8,gr7,gr0,icc1
-	bnelr		icc0,#2
-	bc		icc1,#0,kernel_thread_error
-
-	# now invoke the work function
-	or		gr5,gr0,gr8
-	calll		@(gr4,gr0)
-
-	# and finally exit the thread
-	setlos		#__NR_exit,gr7		; syscall number
-	tira		gr0,#0
-
-kernel_thread_error:
-	subi		sp,#8,sp
-	movsg		lr,gr4
-	sti		gr8,@(sp,#0)
-	sti.p		gr4,@(sp,#4)
-
-	or		gr8,gr0,gr9
-	sethi.p		%hi(kernel_thread_emsg),gr8
-	setlo		%lo(kernel_thread_emsg),gr8
-
-	call		printk
-
-	ldi		@(sp,#4),gr4
-	ldi		@(sp,#0),gr8
-	subi		sp,#8,sp
-	jmpl		@(gr4,gr0)
-
-	.size		kernel_thread,.-kernel_thread
diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c
index 2eb7fa5bf9d..655d90d20bb 100644
--- a/arch/frv/kernel/process.c
+++ b/arch/frv/kernel/process.c
@@ -38,6 +38,7 @@
 #include "local.h"
 
 asmlinkage void ret_from_fork(void);
+asmlinkage void ret_from_kernel_thread(void);
 
 #include <asm/pgalloc.h>
 
@@ -172,32 +173,13 @@ asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp,
  * set up the kernel stack and exception frames for a new process
  */
 int copy_thread(unsigned long clone_flags,
-		unsigned long usp, unsigned long topstk,
+		unsigned long usp, unsigned long arg,
 		struct task_struct *p, struct pt_regs *regs)
 {
-	struct pt_regs *childregs0, *childregs, *regs0;
+	struct pt_regs *childregs;
 
-	regs0 = __kernel_frame0_ptr;
-	childregs0 = (struct pt_regs *)
+	childregs = (struct pt_regs *)
 		(task_stack_page(p) + THREAD_SIZE - FRV_FRAME0_SIZE);
-	childregs = childregs0;
-
-	/* set up the userspace frame (the only place that the USP is stored) */
-	*childregs0 = *regs0;
-
-	childregs0->gr8		= 0;
-	childregs0->sp		= usp;
-	childregs0->next_frame	= NULL;
-
-	/* set up the return kernel frame if called from kernel_thread() */
-	if (regs != regs0) {
-		childregs--;
-		*childregs = *regs;
-		childregs->sp = (unsigned long) childregs0;
-		childregs->next_frame = childregs0;
-		childregs->gr15 = (unsigned long) task_thread_info(p);
-		childregs->gr29 = (unsigned long) p;
-	}
 
 	p->set_child_tid = p->clear_child_tid = NULL;
 
@@ -206,8 +188,25 @@ int copy_thread(unsigned long clone_flags,
 	p->thread.sp	 = (unsigned long) childregs;
 	p->thread.fp	 = 0;
 	p->thread.lr	 = 0;
-	p->thread.pc	 = (unsigned long) ret_from_fork;
-	p->thread.frame0 = childregs0;
+	p->thread.frame0 = childregs;
+
+	if (unlikely(!regs)) {
+		memset(childregs, 0, sizeof(struct pt_regs));
+		childregs->gr9 = usp; /* function */
+		childregs->gr8 = arg;
+		chilregs->psr = PSR_S;
+		p->thread.pc = (unsigned long) ret_from_kernel_thread;
+		save_user_regs(p->thread.user);
+		return 0;
+	}
+
+	/* set up the userspace frame (the only place that the USP is stored) */
+	*childregs = *regs;
+
+	childregs->sp		= usp;
+	childregs->next_frame	= NULL;
+
+	p->thread.pc = (unsigned long) ret_from_fork;
 
 	/* the new TLS pointer is passed in as arg #5 to sys_clone() */
 	if (clone_flags & CLONE_SETTLS)
@@ -218,25 +217,6 @@ int copy_thread(unsigned long clone_flags,
 	return 0;
 } /* end copy_thread() */
 
-/*
- * sys_execve() executes a new program.
- */
-asmlinkage int sys_execve(const char __user *name,
-			  const char __user *const __user *argv,
-			  const char __user *const __user *envp)
-{
-	int error;
-	char * filename;
-
-	filename = getname(name);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		return error;
-	error = do_execve(filename, argv, envp, __frame);
-	putname(filename);
-	return error;
-}
-
 unsigned long get_wchan(struct task_struct *p)
 {
 	struct pt_regs *regs0;
diff --git a/arch/frv/kernel/signal.c b/arch/frv/kernel/signal.c
index 864c2f0d497..535810a3217 100644
--- a/arch/frv/kernel/signal.c
+++ b/arch/frv/kernel/signal.c
@@ -20,7 +20,6 @@
 #include <linux/ptrace.h>
 #include <linux/unistd.h>
 #include <linux/personality.h>
-#include <linux/freezer.h>
 #include <linux/tracehook.h>
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
@@ -298,10 +297,6 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set)
 	__frame->lr   = (unsigned long) &frame->retcode;
 	__frame->gr8  = sig;
 
-	/* the tracer may want to single-step inside the handler */
-	if (test_thread_flag(TIF_SINGLESTEP))
-		ptrace_notify(SIGTRAP);
-
 #if DEBUG_SIG
 	printk("SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n",
 	       sig, current->comm, current->pid, frame, __frame->pc,
@@ -400,10 +395,6 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 	__frame->gr8 = sig;
 	__frame->gr9 = (unsigned long) &frame->info;
 
-	/* the tracer may want to single-step inside the handler */
-	if (test_thread_flag(TIF_SINGLESTEP))
-		ptrace_notify(SIGTRAP);
-
 #if DEBUG_SIG
 	printk("SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n",
 	       sig, current->comm, current->pid, frame, __frame->pc,
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
index 5e8a0d9a09c..98fabd10e95 100644
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -3,9 +3,11 @@ config H8300
 	default y
 	select HAVE_IDE
 	select HAVE_GENERIC_HARDIRQS
+	select HAVE_UID16
 	select ARCH_WANT_IPC_PARSE_VERSION
 	select GENERIC_IRQ_SHOW
 	select GENERIC_CPU_DEVICES
+	select MODULES_USE_ELF_RELA
 
 config SYMBOL_PREFIX
 	string
diff --git a/arch/h8300/include/asm/Kbuild b/arch/h8300/include/asm/Kbuild
index c68e1680da0..50bbf387b2f 100644
--- a/arch/h8300/include/asm/Kbuild
+++ b/arch/h8300/include/asm/Kbuild
@@ -1 +1,5 @@
 include include/asm-generic/Kbuild.asm
+
+generic-y += clkdev.h
+generic-y += exec.h
+generic-y += module.h
diff --git a/arch/h8300/include/asm/exec.h b/arch/h8300/include/asm/exec.h
deleted file mode 100644
index c01c45ccadf..00000000000
--- a/arch/h8300/include/asm/exec.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _H8300_EXEC_H
-#define _H8300_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* _H8300_EXEC_H */
diff --git a/arch/h8300/include/asm/module.h b/arch/h8300/include/asm/module.h
deleted file mode 100644
index 8e46724b7c0..00000000000
--- a/arch/h8300/include/asm/module.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef _ASM_H8300_MODULE_H
-#define _ASM_H8300_MODULE_H
-/*
- * This file contains the H8/300 architecture specific module code.
- */
-struct mod_arch_specific { };
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
-
-#endif /* _ASM_H8/300_MODULE_H */
diff --git a/arch/h8300/include/asm/thread_info.h b/arch/h8300/include/asm/thread_info.h
index 9c126e0c09a..ec2f7777c65 100644
--- a/arch/h8300/include/asm/thread_info.h
+++ b/arch/h8300/include/asm/thread_info.h
@@ -85,8 +85,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SYSCALL_TRACE	0	/* syscall trace active */
 #define TIF_SIGPENDING		1	/* signal pending */
 #define TIF_NEED_RESCHED	2	/* rescheduling necessary */
-#define TIF_POLLING_NRFLAG	3	/* true if poll_idle() is polling
-					   TIF_NEED_RESCHED */
 #define TIF_MEMDIE		4	/* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK	5	/* restore signal mask in do_signal() */
 #define TIF_NOTIFY_RESUME	6	/* callback before returning to user */
@@ -95,11 +93,10 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
-#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
 
-#define _TIF_WORK_MASK		0x0000FFFE	/* work to do on interrupt/exception return */
+#define _TIF_WORK_MASK		(_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
+				 _TIF_NOTIFY_RESUME)
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/h8300/kernel/process.c b/arch/h8300/kernel/process.c
index f153ed1a4c0..e8dc1393a13 100644
--- a/arch/h8300/kernel/process.c
+++ b/arch/h8300/kernel/process.c
@@ -217,14 +217,14 @@ asmlinkage int sys_execve(const char *name,
 			  int dummy, ...)
 {
 	int error;
-	char * filename;
+	struct filename *filename;
 	struct pt_regs *regs = (struct pt_regs *) ((unsigned char *)&dummy-4);
 
 	filename = getname(name);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		return error;
-	error = do_execve(filename, argv, envp, regs);
+	error = do_execve(filename->name, argv, envp, regs);
 	putname(filename);
 	return error;
 }
diff --git a/arch/h8300/kernel/signal.c b/arch/h8300/kernel/signal.c
index 5adaadaf921..0e81b96c642 100644
--- a/arch/h8300/kernel/signal.c
+++ b/arch/h8300/kernel/signal.c
@@ -38,7 +38,6 @@
 #include <linux/personality.h>
 #include <linux/tty.h>
 #include <linux/binfmts.h>
-#include <linux/freezer.h>
 #include <linux/tracehook.h>
 
 #include <asm/setup.h>
diff --git a/arch/hexagon/Kconfig b/arch/hexagon/Kconfig
index b2fdfb700f5..0744f7d7b1f 100644
--- a/arch/hexagon/Kconfig
+++ b/arch/hexagon/Kconfig
@@ -30,6 +30,7 @@ config HEXAGON
 	select KTIME_SCALAR
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_CLOCKEVENTS_BROADCAST
+	select MODULES_USE_ELF_RELA
 	---help---
 	  Qualcomm Hexagon is a processor architecture designed for high
 	  performance and low power across a wide variety of applications.
diff --git a/arch/hexagon/include/asm/Kbuild b/arch/hexagon/include/asm/Kbuild
index 06906427c0a..3364b6966d2 100644
--- a/arch/hexagon/include/asm/Kbuild
+++ b/arch/hexagon/include/asm/Kbuild
@@ -7,6 +7,7 @@ header-y += user.h
 generic-y += auxvec.h
 generic-y += bug.h
 generic-y += bugs.h
+generic-y += clkdev.h
 generic-y += cputime.h
 generic-y += current.h
 generic-y += device.h
diff --git a/arch/hexagon/include/asm/thread_info.h b/arch/hexagon/include/asm/thread_info.h
index 4f936a7ee84..e4a0aad69cb 100644
--- a/arch/hexagon/include/asm/thread_info.h
+++ b/arch/hexagon/include/asm/thread_info.h
@@ -120,10 +120,8 @@ register struct thread_info *__current_thread_info asm(QUOTED_THREADINFO_REG);
 #define TIF_SIGPENDING          2       /* signal pending */
 #define TIF_NEED_RESCHED        3       /* rescheduling necessary */
 #define TIF_SINGLESTEP          4       /* restore ss @ return to usr mode */
-#define TIF_IRET                5       /* return with iret */
 #define TIF_RESTORE_SIGMASK     6       /* restore sig mask in do_signal() */
 /* true if poll_idle() is polling TIF_NEED_RESCHED */
-#define TIF_POLLING_NRFLAG      16
 #define TIF_MEMDIE              17      /* OOM killer killed process */
 
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
@@ -131,9 +129,6 @@ register struct thread_info *__current_thread_info asm(QUOTED_THREADINFO_REG);
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
 #define _TIF_SINGLESTEP         (1 << TIF_SINGLESTEP)
-#define _TIF_IRET               (1 << TIF_IRET)
-#define _TIF_RESTORE_SIGMASK    (1 << TIF_RESTORE_SIGMASK)
-#define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 
 /* work to do on interrupt/exception return - All but TIF_SYSCALL_TRACE */
 #define _TIF_WORK_MASK          (0x0000FFFF & ~_TIF_SYSCALL_TRACE)
diff --git a/arch/hexagon/kernel/signal.c b/arch/hexagon/kernel/signal.c
index 304b0808d07..1ea16bec7b9 100644
--- a/arch/hexagon/kernel/signal.c
+++ b/arch/hexagon/kernel/signal.c
@@ -20,7 +20,6 @@
 
 #include <linux/linkage.h>
 #include <linux/syscalls.h>
-#include <linux/freezer.h>
 #include <linux/tracehook.h>
 #include <asm/registers.h>
 #include <asm/thread_info.h>
diff --git a/arch/hexagon/kernel/syscall.c b/arch/hexagon/kernel/syscall.c
index 620dd18197a..25a9bfe3445 100644
--- a/arch/hexagon/kernel/syscall.c
+++ b/arch/hexagon/kernel/syscall.c
@@ -40,7 +40,7 @@ asmlinkage int sys_execve(char __user *ufilename,
 			  const char __user *const __user *envp)
 {
 	struct pt_regs *pregs = current_thread_info()->regs;
-	char *filename;
+	struct filename *filename;
 	int retval;
 
 	filename = getname(ufilename);
@@ -48,7 +48,7 @@ asmlinkage int sys_execve(char __user *ufilename,
 	if (IS_ERR(filename))
 		return retval;
 
-	retval = do_execve(filename, argv, envp, pregs);
+	retval = do_execve(filename->name, argv, envp, pregs);
 	putname(filename);
 
 	return retval;
@@ -87,4 +87,3 @@ int kernel_execve(const char *filename,
 
 	return retval;
 }
-EXPORT_SYMBOL(kernel_execve);
diff --git a/arch/hexagon/mm/vm_fault.c b/arch/hexagon/mm/vm_fault.c
index 06695cc4fe5..513b74cb397 100644
--- a/arch/hexagon/mm/vm_fault.c
+++ b/arch/hexagon/mm/vm_fault.c
@@ -113,6 +113,7 @@ good_area:
 				current->min_flt++;
 			if (fault & VM_FAULT_RETRY) {
 				flags &= ~FAULT_FLAG_ALLOW_RETRY;
+				flags |= FAULT_FLAG_TRIED;
 				goto retry;
 			}
 		}
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 3c720ef6c32..3279646120e 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -39,7 +39,9 @@ config IA64
 	select ARCH_TASK_STRUCT_ALLOCATOR
 	select ARCH_THREAD_INFO_ALLOCATOR
 	select ARCH_CLOCKSOURCE_DATA
-	select GENERIC_TIME_VSYSCALL
+	select GENERIC_TIME_VSYSCALL_OLD
+	select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_RELA
 	default y
 	help
 	  The Itanium Processor Family is Intel's 64-bit successor to
diff --git a/arch/ia64/include/asm/Kbuild b/arch/ia64/include/asm/Kbuild
index d4eb9383f5f..4a159da2363 100644
--- a/arch/ia64/include/asm/Kbuild
+++ b/arch/ia64/include/asm/Kbuild
@@ -1,15 +1,3 @@
-include include/asm-generic/Kbuild.asm
 
-header-y += break.h
-header-y += cmpxchg.h
-header-y += fpu.h
-header-y += gcc_intrin.h
-header-y += ia64regs.h
-header-y += intel_intrin.h
-header-y += intrinsics.h
-header-y += perfmon.h
-header-y += perfmon_default_smpl.h
-header-y += ptrace_offsets.h
-header-y += rse.h
-header-y += ucontext.h
-header-y += ustack.h
+generic-y += clkdev.h
+generic-y += exec.h
diff --git a/arch/ia64/include/asm/exec.h b/arch/ia64/include/asm/exec.h
deleted file mode 100644
index b26242490e3..00000000000
--- a/arch/ia64/include/asm/exec.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * Process execution defines.
- *
- * Copyright (C) 1998-2003 Hewlett-Packard Co
- *	David Mosberger-Tang <davidm@hpl.hp.com>
- * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
- * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
- */
-#ifndef _ASM_IA64_EXEC_H
-#define _ASM_IA64_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* _ASM_IA64_EXEC_H */
diff --git a/arch/ia64/include/asm/gcc_intrin.h b/arch/ia64/include/asm/gcc_intrin.h
index 21ddee54ada..f9495b1757a 100644
--- a/arch/ia64/include/asm/gcc_intrin.h
+++ b/arch/ia64/include/asm/gcc_intrin.h
@@ -1,621 +1,12 @@
-#ifndef _ASM_IA64_GCC_INTRIN_H
-#define _ASM_IA64_GCC_INTRIN_H
 /*
  *
  * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
  * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
  */
+#ifndef _ASM_IA64_GCC_INTRIN_H
+#define _ASM_IA64_GCC_INTRIN_H
 
-#include <linux/types.h>
-#include <linux/compiler.h>
-
-/* define this macro to get some asm stmts included in 'c' files */
-#define ASM_SUPPORTED
-
-/* Optimization barrier */
-/* The "volatile" is due to gcc bugs */
-#define ia64_barrier()	asm volatile ("":::"memory")
-
-#define ia64_stop()	asm volatile (";;"::)
-
-#define ia64_invala_gr(regnum)	asm volatile ("invala.e r%0" :: "i"(regnum))
-
-#define ia64_invala_fr(regnum)	asm volatile ("invala.e f%0" :: "i"(regnum))
-
-#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
-
-#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
-
-extern void ia64_bad_param_for_setreg (void);
-extern void ia64_bad_param_for_getreg (void);
+#include <uapi/asm/gcc_intrin.h>
 
-#ifdef __KERNEL__
 register unsigned long ia64_r13 asm ("r13") __used;
-#endif
-
-#define ia64_native_setreg(regnum, val)						\
-({										\
-	switch (regnum) {							\
-	    case _IA64_REG_PSR_L:						\
-		    asm volatile ("mov psr.l=%0" :: "r"(val) : "memory");	\
-		    break;							\
-	    case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:				\
-		    asm volatile ("mov ar%0=%1" ::				\
-		    			  "i" (regnum - _IA64_REG_AR_KR0),	\
-					  "r"(val): "memory");			\
-		    break;							\
-	    case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:			\
-		    asm volatile ("mov cr%0=%1" ::				\
-				          "i" (regnum - _IA64_REG_CR_DCR),	\
-					  "r"(val): "memory" );			\
-		    break;							\
-	    case _IA64_REG_SP:							\
-		    asm volatile ("mov r12=%0" ::				\
-			    		  "r"(val): "memory");			\
-		    break;							\
-	    case _IA64_REG_GP:							\
-		    asm volatile ("mov gp=%0" :: "r"(val) : "memory");		\
-		break;								\
-	    default:								\
-		    ia64_bad_param_for_setreg();				\
-		    break;							\
-	}									\
-})
-
-#define ia64_native_getreg(regnum)						\
-({										\
-	__u64 ia64_intri_res;							\
-										\
-	switch (regnum) {							\
-	case _IA64_REG_GP:							\
-		asm volatile ("mov %0=gp" : "=r"(ia64_intri_res));		\
-		break;								\
-	case _IA64_REG_IP:							\
-		asm volatile ("mov %0=ip" : "=r"(ia64_intri_res));		\
-		break;								\
-	case _IA64_REG_PSR:							\
-		asm volatile ("mov %0=psr" : "=r"(ia64_intri_res));		\
-		break;								\
-	case _IA64_REG_TP:	/* for current() */				\
-		ia64_intri_res = ia64_r13;					\
-		break;								\
-	case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:				\
-		asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res)		\
-				      : "i"(regnum - _IA64_REG_AR_KR0));	\
-		break;								\
-	case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:				\
-		asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res)		\
-				      : "i" (regnum - _IA64_REG_CR_DCR));	\
-		break;								\
-	case _IA64_REG_SP:							\
-		asm volatile ("mov %0=sp" : "=r" (ia64_intri_res));		\
-		break;								\
-	default:								\
-		ia64_bad_param_for_getreg();					\
-		break;								\
-	}									\
-	ia64_intri_res;								\
-})
-
-#define ia64_hint_pause 0
-
-#define ia64_hint(mode)						\
-({								\
-	switch (mode) {						\
-	case ia64_hint_pause:					\
-		asm volatile ("hint @pause" ::: "memory");	\
-		break;						\
-	}							\
-})
-
-
-/* Integer values for mux1 instruction */
-#define ia64_mux1_brcst 0
-#define ia64_mux1_mix   8
-#define ia64_mux1_shuf  9
-#define ia64_mux1_alt  10
-#define ia64_mux1_rev  11
-
-#define ia64_mux1(x, mode)							\
-({										\
-	__u64 ia64_intri_res;							\
-										\
-	switch (mode) {								\
-	case ia64_mux1_brcst:							\
-		asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x));	\
-		break;								\
-	case ia64_mux1_mix:							\
-		asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x));	\
-		break;								\
-	case ia64_mux1_shuf:							\
-		asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x));	\
-		break;								\
-	case ia64_mux1_alt:							\
-		asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x));	\
-		break;								\
-	case ia64_mux1_rev:							\
-		asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x));	\
-		break;								\
-	}									\
-	ia64_intri_res;								\
-})
-
-#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
-# define ia64_popcnt(x)		__builtin_popcountl(x)
-#else
-# define ia64_popcnt(x)						\
-  ({								\
-	__u64 ia64_intri_res;					\
-	asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x));	\
-								\
-	ia64_intri_res;						\
-  })
-#endif
-
-#define ia64_getf_exp(x)					\
-({								\
-	long ia64_intri_res;					\
-								\
-	asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x));	\
-								\
-	ia64_intri_res;						\
-})
-
-#define ia64_shrp(a, b, count)								\
-({											\
-	__u64 ia64_intri_res;								\
-	asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count));	\
-	ia64_intri_res;									\
-})
-
-#define ia64_ldfs(regnum, x)					\
-({								\
-	register double __f__ asm ("f"#regnum);			\
-	asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x));	\
-})
-
-#define ia64_ldfd(regnum, x)					\
-({								\
-	register double __f__ asm ("f"#regnum);			\
-	asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x));	\
-})
-
-#define ia64_ldfe(regnum, x)					\
-({								\
-	register double __f__ asm ("f"#regnum);			\
-	asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x));	\
-})
-
-#define ia64_ldf8(regnum, x)					\
-({								\
-	register double __f__ asm ("f"#regnum);			\
-	asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x));	\
-})
-
-#define ia64_ldf_fill(regnum, x)				\
-({								\
-	register double __f__ asm ("f"#regnum);			\
-	asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x));	\
-})
-
-#define ia64_st4_rel_nta(m, val)					\
-({									\
-	asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val));	\
-})
-
-#define ia64_stfs(x, regnum)						\
-({									\
-	register double __f__ asm ("f"#regnum);				\
-	asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
-})
-
-#define ia64_stfd(x, regnum)						\
-({									\
-	register double __f__ asm ("f"#regnum);				\
-	asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
-})
-
-#define ia64_stfe(x, regnum)						\
-({									\
-	register double __f__ asm ("f"#regnum);				\
-	asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
-})
-
-#define ia64_stf8(x, regnum)						\
-({									\
-	register double __f__ asm ("f"#regnum);				\
-	asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
-})
-
-#define ia64_stf_spill(x, regnum)						\
-({										\
-	register double __f__ asm ("f"#regnum);					\
-	asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
-})
-
-#define ia64_fetchadd4_acq(p, inc)						\
-({										\
-										\
-	__u64 ia64_intri_res;							\
-	asm volatile ("fetchadd4.acq %0=[%1],%2"				\
-				: "=r"(ia64_intri_res) : "r"(p), "i" (inc)	\
-				: "memory");					\
-										\
-	ia64_intri_res;								\
-})
-
-#define ia64_fetchadd4_rel(p, inc)						\
-({										\
-	__u64 ia64_intri_res;							\
-	asm volatile ("fetchadd4.rel %0=[%1],%2"				\
-				: "=r"(ia64_intri_res) : "r"(p), "i" (inc)	\
-				: "memory");					\
-										\
-	ia64_intri_res;								\
-})
-
-#define ia64_fetchadd8_acq(p, inc)						\
-({										\
-										\
-	__u64 ia64_intri_res;							\
-	asm volatile ("fetchadd8.acq %0=[%1],%2"				\
-				: "=r"(ia64_intri_res) : "r"(p), "i" (inc)	\
-				: "memory");					\
-										\
-	ia64_intri_res;								\
-})
-
-#define ia64_fetchadd8_rel(p, inc)						\
-({										\
-	__u64 ia64_intri_res;							\
-	asm volatile ("fetchadd8.rel %0=[%1],%2"				\
-				: "=r"(ia64_intri_res) : "r"(p), "i" (inc)	\
-				: "memory");					\
-										\
-	ia64_intri_res;								\
-})
-
-#define ia64_xchg1(ptr,x)							\
-({										\
-	__u64 ia64_intri_res;							\
-	asm volatile ("xchg1 %0=[%1],%2"					\
-		      : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory");	\
-	ia64_intri_res;								\
-})
-
-#define ia64_xchg2(ptr,x)						\
-({									\
-	__u64 ia64_intri_res;						\
-	asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res)	\
-		      : "r" (ptr), "r" (x) : "memory");			\
-	ia64_intri_res;							\
-})
-
-#define ia64_xchg4(ptr,x)						\
-({									\
-	__u64 ia64_intri_res;						\
-	asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res)	\
-		      : "r" (ptr), "r" (x) : "memory");			\
-	ia64_intri_res;							\
-})
-
-#define ia64_xchg8(ptr,x)						\
-({									\
-	__u64 ia64_intri_res;						\
-	asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res)	\
-		      : "r" (ptr), "r" (x) : "memory");			\
-	ia64_intri_res;							\
-})
-
-#define ia64_cmpxchg1_acq(ptr, new, old)						\
-({											\
-	__u64 ia64_intri_res;								\
-	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
-	asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv":					\
-			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
-	ia64_intri_res;									\
-})
-
-#define ia64_cmpxchg1_rel(ptr, new, old)						\
-({											\
-	__u64 ia64_intri_res;								\
-	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
-	asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv":					\
-			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
-	ia64_intri_res;									\
-})
-
-#define ia64_cmpxchg2_acq(ptr, new, old)						\
-({											\
-	__u64 ia64_intri_res;								\
-	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
-	asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv":					\
-			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
-	ia64_intri_res;									\
-})
-
-#define ia64_cmpxchg2_rel(ptr, new, old)						\
-({											\
-	__u64 ia64_intri_res;								\
-	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
-											\
-	asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv":					\
-			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
-	ia64_intri_res;									\
-})
-
-#define ia64_cmpxchg4_acq(ptr, new, old)						\
-({											\
-	__u64 ia64_intri_res;								\
-	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
-	asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv":					\
-			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
-	ia64_intri_res;									\
-})
-
-#define ia64_cmpxchg4_rel(ptr, new, old)						\
-({											\
-	__u64 ia64_intri_res;								\
-	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
-	asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv":					\
-			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
-	ia64_intri_res;									\
-})
-
-#define ia64_cmpxchg8_acq(ptr, new, old)						\
-({											\
-	__u64 ia64_intri_res;								\
-	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
-	asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv":					\
-			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
-	ia64_intri_res;									\
-})
-
-#define ia64_cmpxchg8_rel(ptr, new, old)						\
-({											\
-	__u64 ia64_intri_res;								\
-	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
-											\
-	asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv":					\
-			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
-	ia64_intri_res;									\
-})
-
-#define ia64_mf()	asm volatile ("mf" ::: "memory")
-#define ia64_mfa()	asm volatile ("mf.a" ::: "memory")
-
-#define ia64_invala() asm volatile ("invala" ::: "memory")
-
-#define ia64_native_thash(addr)							\
-({										\
-	unsigned long ia64_intri_res;						\
-	asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr));	\
-	ia64_intri_res;								\
-})
-
-#define ia64_srlz_i()	asm volatile (";; srlz.i ;;" ::: "memory")
-#define ia64_srlz_d()	asm volatile (";; srlz.d" ::: "memory");
-
-#ifdef HAVE_SERIALIZE_DIRECTIVE
-# define ia64_dv_serialize_data()		asm volatile (".serialize.data");
-# define ia64_dv_serialize_instruction()	asm volatile (".serialize.instruction");
-#else
-# define ia64_dv_serialize_data()
-# define ia64_dv_serialize_instruction()
-#endif
-
-#define ia64_nop(x)	asm volatile ("nop %0"::"i"(x));
-
-#define ia64_itci(addr)	asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
-
-#define ia64_itcd(addr)	asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
-
-
-#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1"				\
-					     :: "r"(trnum), "r"(addr) : "memory")
-
-#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1"				\
-					     :: "r"(trnum), "r"(addr) : "memory")
-
-#define ia64_tpa(addr)								\
-({										\
-	unsigned long ia64_pa;							\
-	asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory");	\
-	ia64_pa;								\
-})
-
-#define __ia64_set_dbr(index, val)						\
-	asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_set_ibr(index, val)						\
-	asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_set_pkr(index, val)						\
-	asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_set_pmc(index, val)						\
-	asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_set_pmd(index, val)						\
-	asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
-
-#define ia64_native_set_rr(index, val)							\
-	asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
-
-#define ia64_native_get_cpuid(index)							\
-({											\
-	unsigned long ia64_intri_res;							\
-	asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index));	\
-	ia64_intri_res;									\
-})
-
-#define __ia64_get_dbr(index)							\
-({										\
-	unsigned long ia64_intri_res;						\
-	asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
-	ia64_intri_res;								\
-})
-
-#define ia64_get_ibr(index)							\
-({										\
-	unsigned long ia64_intri_res;						\
-	asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
-	ia64_intri_res;								\
-})
-
-#define ia64_get_pkr(index)							\
-({										\
-	unsigned long ia64_intri_res;						\
-	asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
-	ia64_intri_res;								\
-})
-
-#define ia64_get_pmc(index)							\
-({										\
-	unsigned long ia64_intri_res;						\
-	asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
-	ia64_intri_res;								\
-})
-
-
-#define ia64_native_get_pmd(index)						\
-({										\
-	unsigned long ia64_intri_res;						\
-	asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
-	ia64_intri_res;								\
-})
-
-#define ia64_native_get_rr(index)						\
-({										\
-	unsigned long ia64_intri_res;						\
-	asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index));	\
-	ia64_intri_res;								\
-})
-
-#define ia64_native_fc(addr)	asm volatile ("fc %0" :: "r"(addr) : "memory")
-
-
-#define ia64_sync_i()	asm volatile (";; sync.i" ::: "memory")
-
-#define ia64_native_ssm(mask)	asm volatile ("ssm %0":: "i"((mask)) : "memory")
-#define ia64_native_rsm(mask)	asm volatile ("rsm %0":: "i"((mask)) : "memory")
-#define ia64_sum(mask)	asm volatile ("sum %0":: "i"((mask)) : "memory")
-#define ia64_rum(mask)	asm volatile ("rum %0":: "i"((mask)) : "memory")
-
-#define ia64_ptce(addr)	asm volatile ("ptc.e %0" :: "r"(addr))
-
-#define ia64_native_ptcga(addr, size)						\
-do {										\
-	asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory");	\
-	ia64_dv_serialize_data();						\
-} while (0)
-
-#define ia64_ptcl(addr, size)							\
-do {										\
-	asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory");	\
-	ia64_dv_serialize_data();						\
-} while (0)
-
-#define ia64_ptri(addr, size)						\
-	asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
-
-#define ia64_ptrd(addr, size)						\
-	asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
-
-#define ia64_ttag(addr)							\
-({									  \
-	__u64 ia64_intri_res;						   \
-	asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr));   \
-	ia64_intri_res;							 \
-})
-
-
-/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
-
-#define ia64_lfhint_none   0
-#define ia64_lfhint_nt1    1
-#define ia64_lfhint_nt2    2
-#define ia64_lfhint_nta    3
-
-#define ia64_lfetch(lfhint, y)					\
-({								\
-        switch (lfhint) {					\
-        case ia64_lfhint_none:					\
-                asm volatile ("lfetch [%0]" : : "r"(y));	\
-                break;						\
-        case ia64_lfhint_nt1:					\
-                asm volatile ("lfetch.nt1 [%0]" : : "r"(y));	\
-                break;						\
-        case ia64_lfhint_nt2:					\
-                asm volatile ("lfetch.nt2 [%0]" : : "r"(y));	\
-                break;						\
-        case ia64_lfhint_nta:					\
-                asm volatile ("lfetch.nta [%0]" : : "r"(y));	\
-                break;						\
-        }							\
-})
-
-#define ia64_lfetch_excl(lfhint, y)					\
-({									\
-        switch (lfhint) {						\
-        case ia64_lfhint_none:						\
-                asm volatile ("lfetch.excl [%0]" :: "r"(y));		\
-                break;							\
-        case ia64_lfhint_nt1:						\
-                asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y));	\
-                break;							\
-        case ia64_lfhint_nt2:						\
-                asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y));	\
-                break;							\
-        case ia64_lfhint_nta:						\
-                asm volatile ("lfetch.excl.nta [%0]" :: "r"(y));	\
-                break;							\
-        }								\
-})
-
-#define ia64_lfetch_fault(lfhint, y)					\
-({									\
-        switch (lfhint) {						\
-        case ia64_lfhint_none:						\
-                asm volatile ("lfetch.fault [%0]" : : "r"(y));		\
-                break;							\
-        case ia64_lfhint_nt1:						\
-                asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y));	\
-                break;							\
-        case ia64_lfhint_nt2:						\
-                asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y));	\
-                break;							\
-        case ia64_lfhint_nta:						\
-                asm volatile ("lfetch.fault.nta [%0]" : : "r"(y));	\
-                break;							\
-        }								\
-})
-
-#define ia64_lfetch_fault_excl(lfhint, y)				\
-({									\
-        switch (lfhint) {						\
-        case ia64_lfhint_none:						\
-                asm volatile ("lfetch.fault.excl [%0]" :: "r"(y));	\
-                break;							\
-        case ia64_lfhint_nt1:						\
-                asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y));	\
-                break;							\
-        case ia64_lfhint_nt2:						\
-                asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y));	\
-                break;							\
-        case ia64_lfhint_nta:						\
-                asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y));	\
-                break;							\
-        }								\
-})
-
-#define ia64_native_intrin_local_irq_restore(x)			\
-do {								\
-	asm volatile (";;   cmp.ne p6,p7=%0,r0;;"		\
-		      "(p6) ssm psr.i;"				\
-		      "(p7) rsm psr.i;;"			\
-		      "(p6) srlz.d"				\
-		      :: "r"((x)) : "p6", "p7", "memory");	\
-} while (0)
-
 #endif /* _ASM_IA64_GCC_INTRIN_H */
diff --git a/arch/ia64/include/asm/hugetlb.h b/arch/ia64/include/asm/hugetlb.h
index da55c63728e..94eaa5bd5d0 100644
--- a/arch/ia64/include/asm/hugetlb.h
+++ b/arch/ia64/include/asm/hugetlb.h
@@ -77,4 +77,8 @@ static inline void arch_release_hugepage(struct page *page)
 {
 }
 
+static inline void arch_clear_hugepage_flags(struct page *page)
+{
+}
+
 #endif /* _ASM_IA64_HUGETLB_H */
diff --git a/arch/ia64/include/asm/intrinsics.h b/arch/ia64/include/asm/intrinsics.h
index d129e367e76..20477ea111b 100644
--- a/arch/ia64/include/asm/intrinsics.h
+++ b/arch/ia64/include/asm/intrinsics.h
@@ -1,99 +1,16 @@
-#ifndef _ASM_IA64_INTRINSICS_H
-#define _ASM_IA64_INTRINSICS_H
-
 /*
  * Compiler-dependent intrinsics.
  *
  * Copyright (C) 2002-2003 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  */
+#ifndef _ASM_IA64_INTRINSICS_H
+#define _ASM_IA64_INTRINSICS_H
 
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-/* include compiler specific intrinsics */
-#include <asm/ia64regs.h>
-#ifdef __INTEL_COMPILER
-# include <asm/intel_intrin.h>
-#else
-# include <asm/gcc_intrin.h>
-#endif
-#include <asm/cmpxchg.h>
-
-#define ia64_native_get_psr_i()	(ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
-
-#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4)	\
-do {									\
-	ia64_native_set_rr(0x0000000000000000UL, (val0));		\
-	ia64_native_set_rr(0x2000000000000000UL, (val1));		\
-	ia64_native_set_rr(0x4000000000000000UL, (val2));		\
-	ia64_native_set_rr(0x6000000000000000UL, (val3));		\
-	ia64_native_set_rr(0x8000000000000000UL, (val4));		\
-} while (0)
-
-/*
- * Force an unresolved reference if someone tries to use
- * ia64_fetch_and_add() with a bad value.
- */
-extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
-extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
-
-#define IA64_FETCHADD(tmp,v,n,sz,sem)						\
-({										\
-	switch (sz) {								\
-	      case 4:								\
-	        tmp = ia64_fetchadd4_##sem((unsigned int *) v, n);		\
-		break;								\
-										\
-	      case 8:								\
-	        tmp = ia64_fetchadd8_##sem((unsigned long *) v, n);		\
-		break;								\
-										\
-	      default:								\
-		__bad_size_for_ia64_fetch_and_add();				\
-	}									\
-})
-
-#define ia64_fetchadd(i,v,sem)								\
-({											\
-	__u64 _tmp;									\
-	volatile __typeof__(*(v)) *_v = (v);						\
-	/* Can't use a switch () here: gcc isn't always smart enough for that... */	\
-	if ((i) == -16)									\
-		IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem);			\
-	else if ((i) == -8)								\
-		IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem);				\
-	else if ((i) == -4)								\
-		IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem);				\
-	else if ((i) == -1)								\
-		IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem);				\
-	else if ((i) == 1)								\
-		IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem);				\
-	else if ((i) == 4)								\
-		IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem);				\
-	else if ((i) == 8)								\
-		IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem);				\
-	else if ((i) == 16)								\
-		IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem);				\
-	else										\
-		_tmp = __bad_increment_for_ia64_fetch_and_add();			\
-	(__typeof__(*(v))) (_tmp);	/* return old value */				\
-})
-
-#define ia64_fetch_and_add(i,v)	(ia64_fetchadd(i, v, rel) + (i)) /* return new value */
-
-#endif
-
-#ifdef __KERNEL__
 #include <asm/paravirt_privop.h>
-#endif
+#include <uapi/asm/intrinsics.h>
 
 #ifndef __ASSEMBLY__
-
-#define IA64_INTRINSIC_API(name)	ia64_native_ ## name
-#define IA64_INTRINSIC_MACRO(name)	ia64_native_ ## name
-
-#if defined(__KERNEL__)
 #if defined(CONFIG_PARAVIRT)
 # undef IA64_INTRINSIC_API
 # undef IA64_INTRINSIC_MACRO
@@ -104,36 +21,5 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
 # endif
 #define IA64_INTRINSIC_MACRO(name)	paravirt_ ## name
 #endif
-#endif
-
-/************************************************/
-/* Instructions paravirtualized for correctness */
-/************************************************/
-/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
-/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
- * is not currently used (though it may be in a long-format VHPT system!)
- */
-#define ia64_fc				IA64_INTRINSIC_API(fc)
-#define ia64_thash			IA64_INTRINSIC_API(thash)
-#define ia64_get_cpuid			IA64_INTRINSIC_API(get_cpuid)
-#define ia64_get_pmd			IA64_INTRINSIC_API(get_pmd)
-
-
-/************************************************/
-/* Instructions paravirtualized for performance */
-/************************************************/
-#define ia64_ssm			IA64_INTRINSIC_MACRO(ssm)
-#define ia64_rsm			IA64_INTRINSIC_MACRO(rsm)
-#define ia64_getreg			IA64_INTRINSIC_MACRO(getreg)
-#define ia64_setreg			IA64_INTRINSIC_API(setreg)
-#define ia64_set_rr			IA64_INTRINSIC_API(set_rr)
-#define ia64_get_rr			IA64_INTRINSIC_API(get_rr)
-#define ia64_ptcga			IA64_INTRINSIC_API(ptcga)
-#define ia64_get_psr_i			IA64_INTRINSIC_API(get_psr_i)
-#define ia64_intrin_local_irq_restore	\
-	IA64_INTRINSIC_API(intrin_local_irq_restore)
-#define ia64_set_rr0_to_rr4		IA64_INTRINSIC_API(set_rr0_to_rr4)
-
 #endif /* !__ASSEMBLY__ */
-
 #endif /* _ASM_IA64_INTRINSICS_H */
diff --git a/arch/ia64/include/asm/kvm_para.h b/arch/ia64/include/asm/kvm_para.h
index 2019cb99335..47c00f91043 100644
--- a/arch/ia64/include/asm/kvm_para.h
+++ b/arch/ia64/include/asm/kvm_para.h
@@ -1,6 +1,3 @@
-#ifndef __IA64_KVM_PARA_H
-#define __IA64_KVM_PARA_H
-
 /*
  * Copyright (C) 2007 Xiantao Zhang <xiantao.zhang@intel.com>
  *
@@ -18,8 +15,11 @@
  * Place - Suite 330, Boston, MA 02111-1307 USA.
  *
  */
+#ifndef __IA64_KVM_PARA_H
+#define __IA64_KVM_PARA_H
+
+#include <uapi/asm/kvm_para.h>
 
-#ifdef __KERNEL__
 
 static inline unsigned int kvm_arch_para_features(void)
 {
@@ -32,5 +32,3 @@ static inline bool kvm_check_and_clear_guest_paused(void)
 }
 
 #endif
-
-#endif
diff --git a/arch/ia64/include/asm/mman.h b/arch/ia64/include/asm/mman.h
index 4459028e5aa..fdd5f5229f7 100644
--- a/arch/ia64/include/asm/mman.h
+++ b/arch/ia64/include/asm/mman.h
@@ -1,23 +1,17 @@
-#ifndef _ASM_IA64_MMAN_H
-#define _ASM_IA64_MMAN_H
-
 /*
  * Based on <asm-i386/mman.h>.
  *
  * Modified 1998-2000, 2002
  *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
+#ifndef _ASM_IA64_MMAN_H
+#define _ASM_IA64_MMAN_H
 
-#include <asm-generic/mman.h>
-
-#define MAP_GROWSUP	0x0200		/* register stack-like segment */
+#include <uapi/asm/mman.h>
 
-#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 #define arch_mmap_check	ia64_mmap_check
 int ia64_mmap_check(unsigned long addr, unsigned long len,
 		unsigned long flags);
 #endif
-#endif
-
 #endif /* _ASM_IA64_MMAN_H */
diff --git a/arch/ia64/include/asm/module.h b/arch/ia64/include/asm/module.h
index 908eaef42a0..dfba22a872c 100644
--- a/arch/ia64/include/asm/module.h
+++ b/arch/ia64/include/asm/module.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_IA64_MODULE_H
 #define _ASM_IA64_MODULE_H
 
+#include <asm-generic/module.h>
+
 /*
  * IA-64-specific support for kernel module loader.
  *
@@ -29,10 +31,6 @@ struct mod_arch_specific {
 	unsigned int next_got_entry;	/* index of next available got entry */
 };
 
-#define Elf_Shdr	Elf64_Shdr
-#define Elf_Sym		Elf64_Sym
-#define Elf_Ehdr	Elf64_Ehdr
-
 #define MODULE_PROC_FAMILY	"ia64"
 #define MODULE_ARCH_VERMAGIC	MODULE_PROC_FAMILY \
 	"gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__)
diff --git a/arch/ia64/include/asm/param.h b/arch/ia64/include/asm/param.h
index 0964c32c135..1295913d6a8 100644
--- a/arch/ia64/include/asm/param.h
+++ b/arch/ia64/include/asm/param.h
@@ -1,6 +1,3 @@
-#ifndef _ASM_IA64_PARAM_H
-#define _ASM_IA64_PARAM_H
-
 /*
  * Fundamental kernel parameters.
  *
@@ -9,25 +6,12 @@
  * Modified 1998, 1999, 2002-2003
  *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
+#ifndef _ASM_IA64_PARAM_H
+#define _ASM_IA64_PARAM_H
 
-#define EXEC_PAGESIZE	65536
-
-#ifndef NOGROUP
-# define NOGROUP	(-1)
-#endif
-
-#define MAXHOSTNAMELEN	64	/* max length of hostname */
+#include <uapi/asm/param.h>
 
-#ifdef __KERNEL__
 # define HZ		CONFIG_HZ
 # define USER_HZ	HZ
 # define CLOCKS_PER_SEC	HZ	/* frequency at which times() counts */
-#else
-   /*
-    * Technically, this is wrong, but some old apps still refer to it.  The proper way to
-    * get the HZ value is via sysconf(_SC_CLK_TCK).
-    */
-# define HZ 1024
-#endif
-
 #endif /* _ASM_IA64_PARAM_H */
diff --git a/arch/ia64/include/asm/perfmon.h b/arch/ia64/include/asm/perfmon.h
index d551183fee9..15476dd3a8b 100644
--- a/arch/ia64/include/asm/perfmon.h
+++ b/arch/ia64/include/asm/perfmon.h
@@ -2,179 +2,12 @@
  * Copyright (C) 2001-2003 Hewlett-Packard Co
  *               Stephane Eranian <eranian@hpl.hp.com>
  */
-
 #ifndef _ASM_IA64_PERFMON_H
 #define _ASM_IA64_PERFMON_H
 
-/*
- * perfmon commands supported on all CPU models
- */
-#define PFM_WRITE_PMCS		0x01
-#define PFM_WRITE_PMDS		0x02
-#define PFM_READ_PMDS		0x03
-#define PFM_STOP		0x04
-#define PFM_START		0x05
-#define PFM_ENABLE		0x06 /* obsolete */
-#define PFM_DISABLE		0x07 /* obsolete */
-#define PFM_CREATE_CONTEXT	0x08
-#define PFM_DESTROY_CONTEXT	0x09 /* obsolete use close() */
-#define PFM_RESTART		0x0a
-#define PFM_PROTECT_CONTEXT	0x0b /* obsolete */
-#define PFM_GET_FEATURES	0x0c
-#define PFM_DEBUG		0x0d
-#define PFM_UNPROTECT_CONTEXT	0x0e /* obsolete */
-#define PFM_GET_PMC_RESET_VAL	0x0f
-#define PFM_LOAD_CONTEXT	0x10
-#define PFM_UNLOAD_CONTEXT	0x11
-
-/*
- * PMU model specific commands (may not be supported on all PMU models)
- */
-#define PFM_WRITE_IBRS		0x20
-#define PFM_WRITE_DBRS		0x21
-
-/*
- * context flags
- */
-#define PFM_FL_NOTIFY_BLOCK    	 0x01	/* block task on user level notifications */
-#define PFM_FL_SYSTEM_WIDE	 0x02	/* create a system wide context */
-#define PFM_FL_OVFL_NO_MSG	 0x80   /* do not post overflow/end messages for notification */
-
-/*
- * event set flags
- */
-#define PFM_SETFL_EXCL_IDLE      0x01   /* exclude idle task (syswide only) XXX: DO NOT USE YET */
-
-/*
- * PMC flags
- */
-#define PFM_REGFL_OVFL_NOTIFY	0x1	/* send notification on overflow */
-#define PFM_REGFL_RANDOM	0x2	/* randomize sampling interval   */
-
-/*
- * PMD/PMC/IBR/DBR return flags (ignored on input)
- *
- * Those flags are used on output and must be checked in case EAGAIN is returned
- * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure.
- */
-#define PFM_REG_RETFL_NOTAVAIL	(1UL<<31) /* set if register is implemented but not available */
-#define PFM_REG_RETFL_EINVAL	(1UL<<30) /* set if register entry is invalid */
-#define PFM_REG_RETFL_MASK	(PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL)
-
-#define PFM_REG_HAS_ERROR(flag)	(((flag) & PFM_REG_RETFL_MASK) != 0)
-
-typedef unsigned char pfm_uuid_t[16];	/* custom sampling buffer identifier type */
-
-/*
- * Request structure used to define a context
- */
-typedef struct {
-	pfm_uuid_t     ctx_smpl_buf_id;	 /* which buffer format to use (if needed) */
-	unsigned long  ctx_flags;	 /* noblock/block */
-	unsigned short ctx_nextra_sets;	 /* number of extra event sets (you always get 1) */
-	unsigned short ctx_reserved1;	 /* for future use */
-	int	       ctx_fd;		 /* return arg: unique identification for context */
-	void	       *ctx_smpl_vaddr;	 /* return arg: virtual address of sampling buffer, is used */
-	unsigned long  ctx_reserved2[11];/* for future use */
-} pfarg_context_t;
-
-/*
- * Request structure used to write/read a PMC or PMD
- */
-typedef struct {
-	unsigned int	reg_num;	   /* which register */
-	unsigned short	reg_set;	   /* event set for this register */
-	unsigned short	reg_reserved1;	   /* for future use */
-
-	unsigned long	reg_value;	   /* initial pmc/pmd value */
-	unsigned long	reg_flags;	   /* input: pmc/pmd flags, return: reg error */
-
-	unsigned long	reg_long_reset;	   /* reset after buffer overflow notification */
-	unsigned long	reg_short_reset;   /* reset after counter overflow */
-
-	unsigned long	reg_reset_pmds[4]; /* which other counters to reset on overflow */
-	unsigned long	reg_random_seed;   /* seed value when randomization is used */
-	unsigned long	reg_random_mask;   /* bitmask used to limit random value */
-	unsigned long   reg_last_reset_val;/* return: PMD last reset value */
-
-	unsigned long	reg_smpl_pmds[4];  /* which pmds are accessed when PMC overflows */
-	unsigned long	reg_smpl_eventid;  /* opaque sampling event identifier */
-
-	unsigned long   reg_reserved2[3];   /* for future use */
-} pfarg_reg_t;
-
-typedef struct {
-	unsigned int	dbreg_num;		/* which debug register */
-	unsigned short	dbreg_set;		/* event set for this register */
-	unsigned short	dbreg_reserved1;	/* for future use */
-	unsigned long	dbreg_value;		/* value for debug register */
-	unsigned long	dbreg_flags;		/* return: dbreg error */
-	unsigned long	dbreg_reserved2[1];	/* for future use */
-} pfarg_dbreg_t;
-
-typedef struct {
-	unsigned int	ft_version;	/* perfmon: major [16-31], minor [0-15] */
-	unsigned int	ft_reserved;	/* reserved for future use */
-	unsigned long	reserved[4];	/* for future use */
-} pfarg_features_t;
-
-typedef struct {
-	pid_t		load_pid;	   /* process to load the context into */
-	unsigned short	load_set;	   /* first event set to load */
-	unsigned short	load_reserved1;	   /* for future use */
-	unsigned long	load_reserved2[3]; /* for future use */
-} pfarg_load_t;
-
-typedef struct {
-	int		msg_type;		/* generic message header */
-	int		msg_ctx_fd;		/* generic message header */
-	unsigned long	msg_ovfl_pmds[4];	/* which PMDs overflowed */
-	unsigned short  msg_active_set;		/* active set at the time of overflow */
-	unsigned short  msg_reserved1;		/* for future use */
-	unsigned int    msg_reserved2;		/* for future use */
-	unsigned long	msg_tstamp;		/* for perf tuning/debug */
-} pfm_ovfl_msg_t;
-
-typedef struct {
-	int		msg_type;		/* generic message header */
-	int		msg_ctx_fd;		/* generic message header */
-	unsigned long	msg_tstamp;		/* for perf tuning */
-} pfm_end_msg_t;
-
-typedef struct {
-	int		msg_type;		/* type of the message */
-	int		msg_ctx_fd;		/* unique identifier for the context */
-	unsigned long	msg_tstamp;		/* for perf tuning */
-} pfm_gen_msg_t;
-
-#define PFM_MSG_OVFL	1	/* an overflow happened */
-#define PFM_MSG_END	2	/* task to which context was attached ended */
-
-typedef union {
-	pfm_ovfl_msg_t	pfm_ovfl_msg;
-	pfm_end_msg_t	pfm_end_msg;
-	pfm_gen_msg_t	pfm_gen_msg;
-} pfm_msg_t;
-
-/*
- * Define the version numbers for both perfmon as a whole and the sampling buffer format.
- */
-#define PFM_VERSION_MAJ		 2U
-#define PFM_VERSION_MIN		 0U
-#define PFM_VERSION		 (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff))
-#define PFM_VERSION_MAJOR(x)	 (((x)>>16) & 0xffff)
-#define PFM_VERSION_MINOR(x)	 ((x) & 0xffff)
+#include <uapi/asm/perfmon.h>
 
 
-/*
- * miscellaneous architected definitions
- */
-#define PMU_FIRST_COUNTER	4	/* first counting monitor (PMC/PMD) */
-#define PMU_MAX_PMCS		256	/* maximum architected number of PMC registers */
-#define PMU_MAX_PMDS		256	/* maximum architected number of PMD registers */
-
-#ifdef __KERNEL__
-
 extern long perfmonctl(int fd, int cmd, void *arg, int narg);
 
 typedef struct {
@@ -274,6 +107,4 @@ typedef struct {
 extern pfm_sysctl_t pfm_sysctl;
 
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_IA64_PERFMON_H */
diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h
index 68c98f5b3ca..b0e973649cb 100644
--- a/arch/ia64/include/asm/ptrace.h
+++ b/arch/ia64/include/asm/ptrace.h
@@ -1,6 +1,3 @@
-#ifndef _ASM_IA64_PTRACE_H
-#define _ASM_IA64_PTRACE_H
-
 /*
  * Copyright (C) 1998-2004 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
@@ -15,52 +12,13 @@
  *  6/17/99	D. Mosberger	added second unat member to "struct switch_stack"
  *
  */
-/*
- * When a user process is blocked, its state looks as follows:
- *
- *            +----------------------+	-------	IA64_STK_OFFSET
- *     	      |			     |	 ^
- *            | struct pt_regs       |	 |
- *	      |			     |	 |
- *            +----------------------+	 |
- *	      |			     |	 |
- *     	      |	   memory stack	     |	 |
- *	      |	(growing downwards)  |	 |
- *	      //.....................//	 |
- *					 |
- *	      //.....................//	 |
- *	      |			     |	 |
- *            +----------------------+	 |
- *            | struct switch_stack  |	 |
- *	      |			     |	 |
- *	      +----------------------+	 |
- *	      |			     |	 |
- *	      //.....................//	 |
- *					 |
- *	      //.....................//	 |
- *	      |			     |	 |
- *	      |	 register stack	     |	 |
- *	      |	(growing upwards)    |	 |
- *            |			     |	 |
- *	      +----------------------+	 |  ---	IA64_RBS_OFFSET
- *            |  struct thread_info  |	 |  ^
- *	      +----------------------+	 |  |
- *	      |			     |	 |  |
- *            |  struct task_struct  |	 |  |
- * current -> |			     |   |  |
- *	      +----------------------+ -------
- *
- * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
- * This is because ar.ec is saved as part of ar.pfs.
- */
-
-
-#include <asm/fpu.h>
+#ifndef _ASM_IA64_PTRACE_H
+#define _ASM_IA64_PTRACE_H
 
-#ifdef __KERNEL__
 #ifndef ASM_OFFSETS_C
 #include <asm/asm-offsets.h>
 #endif
+#include <uapi/asm/ptrace.h>
 
 /*
  * Base-2 logarithm of number of pages to allocate per task structure
@@ -81,155 +39,8 @@
 
 #define KERNEL_STACK_SIZE		IA64_STK_OFFSET
 
-#endif /* __KERNEL__ */
-
 #ifndef __ASSEMBLY__
 
-/*
- * This struct defines the way the registers are saved on system
- * calls.
- *
- * We don't save all floating point register because the kernel
- * is compiled to use only a very small subset, so the other are
- * untouched.
- *
- * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
- * (because the memory stack pointer MUST ALWAYS be aligned this way)
- *
- */
-struct pt_regs {
-	/* The following registers are saved by SAVE_MIN: */
-	unsigned long b6;		/* scratch */
-	unsigned long b7;		/* scratch */
-
-	unsigned long ar_csd;           /* used by cmp8xchg16 (scratch) */
-	unsigned long ar_ssd;           /* reserved for future use (scratch) */
-
-	unsigned long r8;		/* scratch (return value register 0) */
-	unsigned long r9;		/* scratch (return value register 1) */
-	unsigned long r10;		/* scratch (return value register 2) */
-	unsigned long r11;		/* scratch (return value register 3) */
-
-	unsigned long cr_ipsr;		/* interrupted task's psr */
-	unsigned long cr_iip;		/* interrupted task's instruction pointer */
-	/*
-	 * interrupted task's function state; if bit 63 is cleared, it
-	 * contains syscall's ar.pfs.pfm:
-	 */
-	unsigned long cr_ifs;
-
-	unsigned long ar_unat;		/* interrupted task's NaT register (preserved) */
-	unsigned long ar_pfs;		/* prev function state  */
-	unsigned long ar_rsc;		/* RSE configuration */
-	/* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
-	unsigned long ar_rnat;		/* RSE NaT */
-	unsigned long ar_bspstore;	/* RSE bspstore */
-
-	unsigned long pr;		/* 64 predicate registers (1 bit each) */
-	unsigned long b0;		/* return pointer (bp) */
-	unsigned long loadrs;		/* size of dirty partition << 16 */
-
-	unsigned long r1;		/* the gp pointer */
-	unsigned long r12;		/* interrupted task's memory stack pointer */
-	unsigned long r13;		/* thread pointer */
-
-	unsigned long ar_fpsr;		/* floating point status (preserved) */
-	unsigned long r15;		/* scratch */
-
-	/* The remaining registers are NOT saved for system calls.  */
-
-	unsigned long r14;		/* scratch */
-	unsigned long r2;		/* scratch */
-	unsigned long r3;		/* scratch */
-
-	/* The following registers are saved by SAVE_REST: */
-	unsigned long r16;		/* scratch */
-	unsigned long r17;		/* scratch */
-	unsigned long r18;		/* scratch */
-	unsigned long r19;		/* scratch */
-	unsigned long r20;		/* scratch */
-	unsigned long r21;		/* scratch */
-	unsigned long r22;		/* scratch */
-	unsigned long r23;		/* scratch */
-	unsigned long r24;		/* scratch */
-	unsigned long r25;		/* scratch */
-	unsigned long r26;		/* scratch */
-	unsigned long r27;		/* scratch */
-	unsigned long r28;		/* scratch */
-	unsigned long r29;		/* scratch */
-	unsigned long r30;		/* scratch */
-	unsigned long r31;		/* scratch */
-
-	unsigned long ar_ccv;		/* compare/exchange value (scratch) */
-
-	/*
-	 * Floating point registers that the kernel considers scratch:
-	 */
-	struct ia64_fpreg f6;		/* scratch */
-	struct ia64_fpreg f7;		/* scratch */
-	struct ia64_fpreg f8;		/* scratch */
-	struct ia64_fpreg f9;		/* scratch */
-	struct ia64_fpreg f10;		/* scratch */
-	struct ia64_fpreg f11;		/* scratch */
-};
-
-/*
- * This structure contains the addition registers that need to
- * preserved across a context switch.  This generally consists of
- * "preserved" registers.
- */
-struct switch_stack {
-	unsigned long caller_unat;	/* user NaT collection register (preserved) */
-	unsigned long ar_fpsr;		/* floating-point status register */
-
-	struct ia64_fpreg f2;		/* preserved */
-	struct ia64_fpreg f3;		/* preserved */
-	struct ia64_fpreg f4;		/* preserved */
-	struct ia64_fpreg f5;		/* preserved */
-
-	struct ia64_fpreg f12;		/* scratch, but untouched by kernel */
-	struct ia64_fpreg f13;		/* scratch, but untouched by kernel */
-	struct ia64_fpreg f14;		/* scratch, but untouched by kernel */
-	struct ia64_fpreg f15;		/* scratch, but untouched by kernel */
-	struct ia64_fpreg f16;		/* preserved */
-	struct ia64_fpreg f17;		/* preserved */
-	struct ia64_fpreg f18;		/* preserved */
-	struct ia64_fpreg f19;		/* preserved */
-	struct ia64_fpreg f20;		/* preserved */
-	struct ia64_fpreg f21;		/* preserved */
-	struct ia64_fpreg f22;		/* preserved */
-	struct ia64_fpreg f23;		/* preserved */
-	struct ia64_fpreg f24;		/* preserved */
-	struct ia64_fpreg f25;		/* preserved */
-	struct ia64_fpreg f26;		/* preserved */
-	struct ia64_fpreg f27;		/* preserved */
-	struct ia64_fpreg f28;		/* preserved */
-	struct ia64_fpreg f29;		/* preserved */
-	struct ia64_fpreg f30;		/* preserved */
-	struct ia64_fpreg f31;		/* preserved */
-
-	unsigned long r4;		/* preserved */
-	unsigned long r5;		/* preserved */
-	unsigned long r6;		/* preserved */
-	unsigned long r7;		/* preserved */
-
-	unsigned long b0;		/* so we can force a direct return in copy_thread */
-	unsigned long b1;
-	unsigned long b2;
-	unsigned long b3;
-	unsigned long b4;
-	unsigned long b5;
-
-	unsigned long ar_pfs;		/* previous function state */
-	unsigned long ar_lc;		/* loop counter (preserved) */
-	unsigned long ar_unat;		/* NaT bits for r4-r7 */
-	unsigned long ar_rnat;		/* RSE NaT collection register */
-	unsigned long ar_bspstore;	/* RSE dirty base (preserved) */
-	unsigned long pr;		/* 64 predicate registers (1 bit each) */
-};
-
-#ifdef __KERNEL__
-
 #include <asm/current.h>
 #include <asm/page.h>
 
@@ -331,46 +142,5 @@ static inline long regs_return_value(struct pt_regs *regs)
   #define arch_has_single_step()  (1)
   #define arch_has_block_step()   (1)
 
-#endif /* !__KERNEL__ */
-
-/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
-struct pt_all_user_regs {
-	unsigned long nat;
-	unsigned long cr_iip;
-	unsigned long cfm;
-	unsigned long cr_ipsr;
-	unsigned long pr;
-
-	unsigned long gr[32];
-	unsigned long br[8];
-	unsigned long ar[128];
-	struct ia64_fpreg fr[128];
-};
-
 #endif /* !__ASSEMBLY__ */
-
-/* indices to application-registers array in pt_all_user_regs */
-#define PT_AUR_RSC	16
-#define PT_AUR_BSP	17
-#define PT_AUR_BSPSTORE	18
-#define PT_AUR_RNAT	19
-#define PT_AUR_CCV	32
-#define PT_AUR_UNAT	36
-#define PT_AUR_FPSR	40
-#define PT_AUR_PFS	64
-#define PT_AUR_LC	65
-#define PT_AUR_EC	66
-
-/*
- * The numbers chosen here are somewhat arbitrary but absolutely MUST
- * not overlap with any of the number assigned in <linux/ptrace.h>.
- */
-#define PTRACE_SINGLEBLOCK	12	/* resume execution until next branch */
-#define PTRACE_OLD_GETSIGINFO	13	/* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>)  */
-#define PTRACE_OLD_SETSIGINFO	14	/* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>)  */
-#define PTRACE_GETREGS		18	/* get all registers (pt_all_user_regs) in one shot */
-#define PTRACE_SETREGS		19	/* set all registers (pt_all_user_regs) in one shot */
-
-#define PTRACE_OLDSETOPTIONS	21
-
 #endif /* _ASM_IA64_PTRACE_H */
diff --git a/arch/ia64/include/asm/siginfo.h b/arch/ia64/include/asm/siginfo.h
index c8fcaa2ac48..6f2e2dd0f28 100644
--- a/arch/ia64/include/asm/siginfo.h
+++ b/arch/ia64/include/asm/siginfo.h
@@ -1,124 +1,14 @@
-#ifndef _ASM_IA64_SIGINFO_H
-#define _ASM_IA64_SIGINFO_H
-
 /*
  * Based on <asm-i386/siginfo.h>.
  *
  * Modified 1998-2002
  *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
+#ifndef _ASM_IA64_SIGINFO_H
+#define _ASM_IA64_SIGINFO_H
 
-#define __ARCH_SI_PREAMBLE_SIZE	(4 * sizeof(int))
-
-#define HAVE_ARCH_SIGINFO_T
-#define HAVE_ARCH_COPY_SIGINFO
-#define HAVE_ARCH_COPY_SIGINFO_TO_USER
-
-#include <asm-generic/siginfo.h>
-
-typedef struct siginfo {
-	int si_signo;
-	int si_errno;
-	int si_code;
-	int __pad0;
-
-	union {
-		int _pad[SI_PAD_SIZE];
-
-		/* kill() */
-		struct {
-			pid_t _pid;		/* sender's pid */
-			uid_t _uid;		/* sender's uid */
-		} _kill;
-
-		/* POSIX.1b timers */
-		struct {
-			timer_t _tid;		/* timer id */
-			int _overrun;		/* overrun count */
-			char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)];
-			sigval_t _sigval;	/* must overlay ._rt._sigval! */
-			int _sys_private;	/* not to be passed to user */
-		} _timer;
-
-		/* POSIX.1b signals */
-		struct {
-			pid_t _pid;		/* sender's pid */
-			uid_t _uid;		/* sender's uid */
-			sigval_t _sigval;
-		} _rt;
-
-		/* SIGCHLD */
-		struct {
-			pid_t _pid;		/* which child */
-			uid_t _uid;		/* sender's uid */
-			int _status;		/* exit code */
-			clock_t _utime;
-			clock_t _stime;
-		} _sigchld;
-
-		/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
-		struct {
-			void __user *_addr;	/* faulting insn/memory ref. */
-			int _imm;		/* immediate value for "break" */
-			unsigned int _flags;	/* see below */
-			unsigned long _isr;	/* isr */
-			short _addr_lsb;	/* lsb of faulting address */
-		} _sigfault;
-
-		/* SIGPOLL */
-		struct {
-			long _band;	/* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */
-			int _fd;
-		} _sigpoll;
-	} _sifields;
-} siginfo_t;
-
-#define si_imm		_sifields._sigfault._imm	/* as per UNIX SysV ABI spec */
-#define si_flags	_sifields._sigfault._flags
-/*
- * si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that
- * si_code is non-zero and __ISR_VALID is set in si_flags.
- */
-#define si_isr		_sifields._sigfault._isr
-
-/*
- * Flag values for si_flags:
- */
-#define __ISR_VALID_BIT	0
-#define __ISR_VALID	(1 << __ISR_VALID_BIT)
-
-/*
- * SIGILL si_codes
- */
-#define ILL_BADIADDR	(__SI_FAULT|9)	/* unimplemented instruction address */
-#define __ILL_BREAK	(__SI_FAULT|10)	/* illegal break */
-#define __ILL_BNDMOD	(__SI_FAULT|11)	/* bundle-update (modification) in progress */
-#undef NSIGILL
-#define NSIGILL		11
-
-/*
- * SIGFPE si_codes
- */
-#define __FPE_DECOVF	(__SI_FAULT|9)	/* decimal overflow */
-#define __FPE_DECDIV	(__SI_FAULT|10)	/* decimal division by zero */
-#define __FPE_DECERR	(__SI_FAULT|11)	/* packed decimal error */
-#define __FPE_INVASC	(__SI_FAULT|12)	/* invalid ASCII digit */
-#define __FPE_INVDEC	(__SI_FAULT|13)	/* invalid decimal digit */
-#undef NSIGFPE
-#define NSIGFPE		13
-
-/*
- * SIGSEGV si_codes
- */
-#define __SEGV_PSTKOVF	(__SI_FAULT|3)	/* paragraph stack overflow */
-#undef NSIGSEGV
-#define NSIGSEGV	3
-
-#undef NSIGTRAP
-#define NSIGTRAP	4
-
-#ifdef __KERNEL__
 #include <linux/string.h>
+#include <uapi/asm/siginfo.h>
 
 static inline void
 copy_siginfo (siginfo_t *to, siginfo_t *from)
@@ -130,6 +20,4 @@ copy_siginfo (siginfo_t *to, siginfo_t *from)
 		memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld));
 }
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_IA64_SIGINFO_H */
diff --git a/arch/ia64/include/asm/signal.h b/arch/ia64/include/asm/signal.h
index b166248d49a..aecda5b9eb4 100644
--- a/arch/ia64/include/asm/signal.h
+++ b/arch/ia64/include/asm/signal.h
@@ -1,6 +1,3 @@
-#ifndef _ASM_IA64_SIGNAL_H
-#define _ASM_IA64_SIGNAL_H
-
 /*
  * Modified 1998-2001, 2003
  *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
@@ -8,129 +5,18 @@
  * Unfortunately, this file is being included by bits/signal.h in
  * glibc-2.x.  Hence the #ifdef __KERNEL__ ugliness.
  */
+#ifndef _ASM_IA64_SIGNAL_H
+#define _ASM_IA64_SIGNAL_H
 
-#define SIGHUP		 1
-#define SIGINT		 2
-#define SIGQUIT		 3
-#define SIGILL		 4
-#define SIGTRAP		 5
-#define SIGABRT		 6
-#define SIGIOT		 6
-#define SIGBUS		 7
-#define SIGFPE		 8
-#define SIGKILL		 9
-#define SIGUSR1		10
-#define SIGSEGV		11
-#define SIGUSR2		12
-#define SIGPIPE		13
-#define SIGALRM		14
-#define SIGTERM		15
-#define SIGSTKFLT	16
-#define SIGCHLD		17
-#define SIGCONT		18
-#define SIGSTOP		19
-#define SIGTSTP		20
-#define SIGTTIN		21
-#define SIGTTOU		22
-#define SIGURG		23
-#define SIGXCPU		24
-#define SIGXFSZ		25
-#define SIGVTALRM	26
-#define SIGPROF		27
-#define SIGWINCH	28
-#define SIGIO		29
-#define SIGPOLL		SIGIO
-/*
-#define SIGLOST		29
-*/
-#define SIGPWR		30
-#define SIGSYS		31
-/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */
-#define	SIGUNUSED	31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN	32
-#define SIGRTMAX	_NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP	0x00000001
-#define SA_NOCLDWAIT	0x00000002
-#define SA_SIGINFO	0x00000004
-#define SA_ONSTACK	0x08000000
-#define SA_RESTART	0x10000000
-#define SA_NODEFER	0x40000000
-#define SA_RESETHAND	0x80000000
-
-#define SA_NOMASK	SA_NODEFER
-#define SA_ONESHOT	SA_RESETHAND
-
-#define SA_RESTORER	0x04000000
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK	1
-#define SS_DISABLE	2
-
-/*
- * The minimum stack size needs to be fairly large because we want to
- * be sure that an app compiled for today's CPUs will continue to run
- * on all future CPU models.  The CPU model matters because the signal
- * frame needs to have space for the complete machine state, including
- * all physical stacked registers.  The number of physical stacked
- * registers is CPU model dependent, but given that the width of
- * ar.rsc.loadrs is 14 bits, we can assume that they'll never take up
- * more than 16KB of space.
- */
-#if 1
-  /*
-   * This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it
-   * in wrong. ;-(  To preserve backwards compatibility, we leave the kernel at the
-   * incorrect value and fix libc only.
-   */
-# define MINSIGSTKSZ	131027	/* min. stack size for sigaltstack() */
-#else
-# define MINSIGSTKSZ	131072	/* min. stack size for sigaltstack() */
-#endif
-#define SIGSTKSZ	262144	/* default stack size for sigaltstack() */
+#include <uapi/asm/signal.h>
 
-#ifdef __KERNEL__
 
 #define _NSIG		64
 #define _NSIG_BPW	64
 #define _NSIG_WORDS	(_NSIG / _NSIG_BPW)
 
-#endif /* __KERNEL__ */
-
-#include <asm-generic/signal-defs.h>
-
 # ifndef __ASSEMBLY__
 
-#  include <linux/types.h>
-
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-typedef struct sigaltstack {
-	void __user *ss_sp;
-	int ss_flags;
-	size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
-
 /* Most things should be clean enough to redefine this at will, if care
    is taken to make libc match.  */
 
@@ -154,7 +40,5 @@ struct k_sigaction {
 
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 
-#endif /* __KERNEL__ */
-
 # endif /* !__ASSEMBLY__ */
 #endif /* _ASM_IA64_SIGNAL_H */
diff --git a/arch/ia64/include/asm/termios.h b/arch/ia64/include/asm/termios.h
index 689d218c0c2..a42f870ca4f 100644
--- a/arch/ia64/include/asm/termios.h
+++ b/arch/ia64/include/asm/termios.h
@@ -1,52 +1,14 @@
-#ifndef _ASM_IA64_TERMIOS_H
-#define _ASM_IA64_TERMIOS_H
-
 /*
  * Modified 1999
  *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  *
  * 99/01/28	Added N_IRDA and N_SMSBLOCK
  */
+#ifndef _ASM_IA64_TERMIOS_H
+#define _ASM_IA64_TERMIOS_H
 
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
-
-struct winsize {
-	unsigned short ws_row;
-	unsigned short ws_col;
-	unsigned short ws_xpixel;
-	unsigned short ws_ypixel;
-};
-
-#define NCC 8
-struct termio {
-	unsigned short c_iflag;		/* input mode flags */
-	unsigned short c_oflag;		/* output mode flags */
-	unsigned short c_cflag;		/* control mode flags */
-	unsigned short c_lflag;		/* local mode flags */
-	unsigned char c_line;		/* line discipline */
-	unsigned char c_cc[NCC];	/* control characters */
-};
-
-/* modem lines */
-#define TIOCM_LE	0x001
-#define TIOCM_DTR	0x002
-#define TIOCM_RTS	0x004
-#define TIOCM_ST	0x008
-#define TIOCM_SR	0x010
-#define TIOCM_CTS	0x020
-#define TIOCM_CAR	0x040
-#define TIOCM_RNG	0x080
-#define TIOCM_DSR	0x100
-#define TIOCM_CD	TIOCM_CAR
-#define TIOCM_RI	TIOCM_RNG
-#define TIOCM_OUT1	0x2000
-#define TIOCM_OUT2	0x4000
-#define TIOCM_LOOP	0x8000
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+#include <uapi/asm/termios.h>
 
-# ifdef __KERNEL__
 
 /*	intr=^C		quit=^\		erase=del	kill=^U
 	eof=^D		vtime=\0	vmin=\1		sxtc=\0
@@ -92,6 +54,4 @@ struct termio {
 #define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
 #define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
 
-# endif /* __KERNEL__ */
-
 #endif /* _ASM_IA64_TERMIOS_H */
diff --git a/arch/ia64/include/asm/thread_info.h b/arch/ia64/include/asm/thread_info.h
index f7ee8537831..ff2ae413658 100644
--- a/arch/ia64/include/asm/thread_info.h
+++ b/arch/ia64/include/asm/thread_info.h
@@ -106,7 +106,6 @@ struct thread_info {
 #define TIF_SYSCALL_AUDIT	3	/* syscall auditing active */
 #define TIF_SINGLESTEP		4	/* restore singlestep on return to user mode */
 #define TIF_NOTIFY_RESUME	6	/* resumption notification requested */
-#define TIF_POLLING_NRFLAG	16	/* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE		17	/* is terminating due to OOM killer */
 #define TIF_MCA_INIT		18	/* this task is processing MCA or INIT */
 #define TIF_DB_DISABLED		19	/* debug trap disabled for fsyscall */
@@ -119,7 +118,6 @@ struct thread_info {
 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
-#define _TIF_POLLING_NRFLAG	(1 << TIF_POLLING_NRFLAG)
 #define _TIF_MCA_INIT		(1 << TIF_MCA_INIT)
 #define _TIF_DB_DISABLED	(1 << TIF_DB_DISABLED)
 #define _TIF_RESTORE_RSE	(1 << TIF_RESTORE_RSE)
diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h
index 3f5b122d997..4c351b169da 100644
--- a/arch/ia64/include/asm/types.h
+++ b/arch/ia64/include/asm/types.h
@@ -1,6 +1,3 @@
-#ifndef _ASM_IA64_TYPES_H
-#define _ASM_IA64_TYPES_H
-
 /*
  * This file is never included by application software unless explicitly
  * requested (e.g., via linux/types.h) in which case the application is
@@ -13,32 +10,22 @@
  * Modified 1998-2000, 2002
  *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
  */
+#ifndef _ASM_IA64_TYPES_H
+#define _ASM_IA64_TYPES_H
 
-#ifdef __KERNEL__
 #include <asm-generic/int-ll64.h>
-#else
-#include <asm-generic/int-l64.h>
-#endif
+#include <uapi/asm/types.h>
 
 #ifdef __ASSEMBLY__
-# define __IA64_UL(x)		(x)
-# define __IA64_UL_CONST(x)	x
-
 #else
-# define __IA64_UL(x)		((unsigned long)(x))
-# define __IA64_UL_CONST(x)	x##UL
-
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
-# ifdef __KERNEL__
 
 struct fnptr {
 	unsigned long ip;
 	unsigned long gp;
 };
 
-# endif /* __KERNEL__ */
 #endif /* !__ASSEMBLY__ */
-
 #endif /* _ASM_IA64_TYPES_H */
diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h
index 7a3bd252494..8b3ff2f5b86 100644
--- a/arch/ia64/include/asm/unistd.h
+++ b/arch/ia64/include/asm/unistd.h
@@ -1,331 +1,14 @@
-#ifndef _ASM_IA64_UNISTD_H
-#define _ASM_IA64_UNISTD_H
-
 /*
  * IA-64 Linux syscall numbers and inline-functions.
  *
  * Copyright (C) 1998-2005 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  */
+#ifndef _ASM_IA64_UNISTD_H
+#define _ASM_IA64_UNISTD_H
 
-#include <asm/break.h>
-
-#define __BREAK_SYSCALL			__IA64_BREAK_SYSCALL
-
-#define __NR_ni_syscall			1024
-#define __NR_exit			1025
-#define __NR_read			1026
-#define __NR_write			1027
-#define __NR_open			1028
-#define __NR_close			1029
-#define __NR_creat			1030
-#define __NR_link			1031
-#define __NR_unlink			1032
-#define __NR_execve			1033
-#define __NR_chdir			1034
-#define __NR_fchdir			1035
-#define __NR_utimes			1036
-#define __NR_mknod			1037
-#define __NR_chmod			1038
-#define __NR_chown			1039
-#define __NR_lseek			1040
-#define __NR_getpid			1041
-#define __NR_getppid			1042
-#define __NR_mount			1043
-#define __NR_umount			1044
-#define __NR_setuid			1045
-#define __NR_getuid			1046
-#define __NR_geteuid			1047
-#define __NR_ptrace			1048
-#define __NR_access			1049
-#define __NR_sync			1050
-#define __NR_fsync			1051
-#define __NR_fdatasync			1052
-#define __NR_kill			1053
-#define __NR_rename			1054
-#define __NR_mkdir			1055
-#define __NR_rmdir			1056
-#define __NR_dup			1057
-#define __NR_pipe			1058
-#define __NR_times			1059
-#define __NR_brk			1060
-#define __NR_setgid			1061
-#define __NR_getgid			1062
-#define __NR_getegid			1063
-#define __NR_acct			1064
-#define __NR_ioctl			1065
-#define __NR_fcntl			1066
-#define __NR_umask			1067
-#define __NR_chroot			1068
-#define __NR_ustat			1069
-#define __NR_dup2			1070
-#define __NR_setreuid			1071
-#define __NR_setregid			1072
-#define __NR_getresuid			1073
-#define __NR_setresuid			1074
-#define __NR_getresgid			1075
-#define __NR_setresgid			1076
-#define __NR_getgroups			1077
-#define __NR_setgroups			1078
-#define __NR_getpgid			1079
-#define __NR_setpgid			1080
-#define __NR_setsid			1081
-#define __NR_getsid			1082
-#define __NR_sethostname		1083
-#define __NR_setrlimit			1084
-#define __NR_getrlimit			1085
-#define __NR_getrusage			1086
-#define __NR_gettimeofday		1087
-#define __NR_settimeofday		1088
-#define __NR_select			1089
-#define __NR_poll			1090
-#define __NR_symlink			1091
-#define __NR_readlink			1092
-#define __NR_uselib			1093
-#define __NR_swapon			1094
-#define __NR_swapoff			1095
-#define __NR_reboot			1096
-#define __NR_truncate			1097
-#define __NR_ftruncate			1098
-#define __NR_fchmod			1099
-#define __NR_fchown			1100
-#define __NR_getpriority		1101
-#define __NR_setpriority		1102
-#define __NR_statfs			1103
-#define __NR_fstatfs			1104
-#define __NR_gettid			1105
-#define __NR_semget			1106
-#define __NR_semop			1107
-#define __NR_semctl			1108
-#define __NR_msgget			1109
-#define __NR_msgsnd			1110
-#define __NR_msgrcv			1111
-#define __NR_msgctl			1112
-#define __NR_shmget			1113
-#define __NR_shmat			1114
-#define __NR_shmdt			1115
-#define __NR_shmctl			1116
-/* also known as klogctl() in GNU libc: */
-#define __NR_syslog			1117
-#define __NR_setitimer			1118
-#define __NR_getitimer			1119
-/* 1120 was __NR_old_stat */
-/* 1121 was __NR_old_lstat */
-/* 1122 was __NR_old_fstat */
-#define __NR_vhangup			1123
-#define __NR_lchown			1124
-#define __NR_remap_file_pages		1125
-#define __NR_wait4			1126
-#define __NR_sysinfo			1127
-#define __NR_clone			1128
-#define __NR_setdomainname		1129
-#define __NR_uname			1130
-#define __NR_adjtimex			1131
-/* 1132 was __NR_create_module */
-#define __NR_init_module		1133
-#define __NR_delete_module		1134
-/* 1135 was __NR_get_kernel_syms */
-/* 1136 was __NR_query_module */
-#define __NR_quotactl			1137
-#define __NR_bdflush			1138
-#define __NR_sysfs			1139
-#define __NR_personality		1140
-#define __NR_afs_syscall		1141
-#define __NR_setfsuid			1142
-#define __NR_setfsgid			1143
-#define __NR_getdents			1144
-#define __NR_flock			1145
-#define __NR_readv			1146
-#define __NR_writev			1147
-#define __NR_pread64			1148
-#define __NR_pwrite64			1149
-#define __NR__sysctl			1150
-#define __NR_mmap			1151
-#define __NR_munmap			1152
-#define __NR_mlock			1153
-#define __NR_mlockall			1154
-#define __NR_mprotect			1155
-#define __NR_mremap			1156
-#define __NR_msync			1157
-#define __NR_munlock			1158
-#define __NR_munlockall			1159
-#define __NR_sched_getparam		1160
-#define __NR_sched_setparam		1161
-#define __NR_sched_getscheduler		1162
-#define __NR_sched_setscheduler		1163
-#define __NR_sched_yield		1164
-#define __NR_sched_get_priority_max	1165
-#define __NR_sched_get_priority_min	1166
-#define __NR_sched_rr_get_interval	1167
-#define __NR_nanosleep			1168
-#define __NR_nfsservctl			1169
-#define __NR_prctl			1170
-/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */
-#define __NR_mmap2			1172
-#define __NR_pciconfig_read		1173
-#define __NR_pciconfig_write		1174
-#define __NR_perfmonctl			1175
-#define __NR_sigaltstack		1176
-#define __NR_rt_sigaction		1177
-#define __NR_rt_sigpending		1178
-#define __NR_rt_sigprocmask		1179
-#define __NR_rt_sigqueueinfo		1180
-#define __NR_rt_sigreturn		1181
-#define __NR_rt_sigsuspend		1182
-#define __NR_rt_sigtimedwait		1183
-#define __NR_getcwd			1184
-#define __NR_capget			1185
-#define __NR_capset			1186
-#define __NR_sendfile			1187
-#define __NR_getpmsg			1188
-#define __NR_putpmsg			1189
-#define __NR_socket			1190
-#define __NR_bind			1191
-#define __NR_connect			1192
-#define __NR_listen			1193
-#define __NR_accept			1194
-#define __NR_getsockname		1195
-#define __NR_getpeername		1196
-#define __NR_socketpair			1197
-#define __NR_send			1198
-#define __NR_sendto			1199
-#define __NR_recv			1200
-#define __NR_recvfrom			1201
-#define __NR_shutdown			1202
-#define __NR_setsockopt			1203
-#define __NR_getsockopt			1204
-#define __NR_sendmsg			1205
-#define __NR_recvmsg			1206
-#define __NR_pivot_root			1207
-#define __NR_mincore			1208
-#define __NR_madvise			1209
-#define __NR_stat			1210
-#define __NR_lstat			1211
-#define __NR_fstat			1212
-#define __NR_clone2			1213
-#define __NR_getdents64			1214
-#define __NR_getunwind			1215
-#define __NR_readahead			1216
-#define __NR_setxattr			1217
-#define __NR_lsetxattr			1218
-#define __NR_fsetxattr			1219
-#define __NR_getxattr			1220
-#define __NR_lgetxattr			1221
-#define __NR_fgetxattr			1222
-#define __NR_listxattr			1223
-#define __NR_llistxattr			1224
-#define __NR_flistxattr			1225
-#define __NR_removexattr		1226
-#define __NR_lremovexattr		1227
-#define __NR_fremovexattr		1228
-#define __NR_tkill			1229
-#define __NR_futex			1230
-#define __NR_sched_setaffinity		1231
-#define __NR_sched_getaffinity		1232
-#define __NR_set_tid_address		1233
-#define __NR_fadvise64			1234
-#define __NR_tgkill			1235
-#define __NR_exit_group			1236
-#define __NR_lookup_dcookie		1237
-#define __NR_io_setup			1238
-#define __NR_io_destroy			1239
-#define __NR_io_getevents		1240
-#define __NR_io_submit			1241
-#define __NR_io_cancel			1242
-#define __NR_epoll_create		1243
-#define __NR_epoll_ctl			1244
-#define __NR_epoll_wait			1245
-#define __NR_restart_syscall		1246
-#define __NR_semtimedop			1247
-#define __NR_timer_create		1248
-#define __NR_timer_settime		1249
-#define __NR_timer_gettime		1250
-#define __NR_timer_getoverrun		1251
-#define __NR_timer_delete		1252
-#define __NR_clock_settime		1253
-#define __NR_clock_gettime		1254
-#define __NR_clock_getres		1255
-#define __NR_clock_nanosleep		1256
-#define __NR_fstatfs64			1257
-#define __NR_statfs64			1258
-#define __NR_mbind			1259
-#define __NR_get_mempolicy		1260
-#define __NR_set_mempolicy		1261
-#define __NR_mq_open			1262
-#define __NR_mq_unlink			1263
-#define __NR_mq_timedsend		1264
-#define __NR_mq_timedreceive		1265
-#define __NR_mq_notify			1266
-#define __NR_mq_getsetattr		1267
-#define __NR_kexec_load			1268
-#define __NR_vserver			1269
-#define __NR_waitid			1270
-#define __NR_add_key			1271
-#define __NR_request_key		1272
-#define __NR_keyctl			1273
-#define __NR_ioprio_set			1274
-#define __NR_ioprio_get			1275
-#define __NR_move_pages			1276
-#define __NR_inotify_init		1277
-#define __NR_inotify_add_watch		1278
-#define __NR_inotify_rm_watch		1279
-#define __NR_migrate_pages		1280
-#define __NR_openat			1281
-#define __NR_mkdirat			1282
-#define __NR_mknodat			1283
-#define __NR_fchownat			1284
-#define __NR_futimesat			1285
-#define __NR_newfstatat			1286
-#define __NR_unlinkat			1287
-#define __NR_renameat			1288
-#define __NR_linkat			1289
-#define __NR_symlinkat			1290
-#define __NR_readlinkat			1291
-#define __NR_fchmodat			1292
-#define __NR_faccessat			1293
-#define __NR_pselect6			1294
-#define __NR_ppoll			1295
-#define __NR_unshare			1296
-#define __NR_splice			1297
-#define __NR_set_robust_list		1298
-#define __NR_get_robust_list		1299
-#define __NR_sync_file_range		1300
-#define __NR_tee			1301
-#define __NR_vmsplice			1302
-#define __NR_fallocate			1303
-#define __NR_getcpu			1304
-#define __NR_epoll_pwait		1305
-#define __NR_utimensat			1306
-#define __NR_signalfd			1307
-#define __NR_timerfd			1308
-#define __NR_eventfd			1309
-#define __NR_timerfd_create		1310
-#define __NR_timerfd_settime		1311
-#define __NR_timerfd_gettime		1312
-#define __NR_signalfd4			1313
-#define __NR_eventfd2			1314
-#define __NR_epoll_create1		1315
-#define __NR_dup3			1316
-#define __NR_pipe2			1317
-#define __NR_inotify_init1		1318
-#define __NR_preadv			1319
-#define __NR_pwritev			1320
-#define __NR_rt_tgsigqueueinfo		1321
-#define __NR_recvmmsg			1322
-#define __NR_fanotify_init		1323
-#define __NR_fanotify_mark		1324
-#define __NR_prlimit64			1325
-#define __NR_name_to_handle_at		1326
-#define __NR_open_by_handle_at  	1327
-#define __NR_clock_adjtime		1328
-#define __NR_syncfs			1329
-#define __NR_setns			1330
-#define __NR_sendmmsg			1331
-#define __NR_process_vm_readv		1332
-#define __NR_process_vm_writev		1333
-#define __NR_accept4			1334
+#include <uapi/asm/unistd.h>
 
-#ifdef __KERNEL__
 
 
 #define NR_syscalls			311 /* length of syscall table */
@@ -382,5 +65,4 @@ asmlinkage long sys_rt_sigaction(int sig,
 #define cond_syscall(x) asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall")))
 
 #endif /* !__ASSEMBLY__ */
-#endif /* __KERNEL__ */
 #endif /* _ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/include/asm/ustack.h b/arch/ia64/include/asm/ustack.h
index 504167c35b8..b275401b96d 100644
--- a/arch/ia64/include/asm/ustack.h
+++ b/arch/ia64/include/asm/ustack.h
@@ -1,20 +1,11 @@
 #ifndef _ASM_IA64_USTACK_H
 #define _ASM_IA64_USTACK_H
 
-/*
- * Constants for the user stack size
- */
-
-#ifdef __KERNEL__
 #include <asm/page.h>
+#include <uapi/asm/ustack.h>
 
 /* The absolute hard limit for stack size is 1/2 of the mappable space in the region */
 #define MAX_USER_STACK_SIZE	(RGN_MAP_LIMIT/2)
 #define STACK_TOP		(0x6000000000000000UL + RGN_MAP_LIMIT)
 #define STACK_TOP_MAX		STACK_TOP
-#endif
-
-/* Make a default stack size of 2GiB */
-#define DEFAULT_USER_STACK_SIZE	(1UL << 31)
-
 #endif /* _ASM_IA64_USTACK_H */
diff --git a/arch/ia64/include/uapi/asm/Kbuild b/arch/ia64/include/uapi/asm/Kbuild
index baebb3da1d4..30cafac9370 100644
--- a/arch/ia64/include/uapi/asm/Kbuild
+++ b/arch/ia64/include/uapi/asm/Kbuild
@@ -1,3 +1,48 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += break.h
+header-y += byteorder.h
+header-y += cmpxchg.h
+header-y += errno.h
+header-y += fcntl.h
+header-y += fpu.h
+header-y += gcc_intrin.h
+header-y += ia64regs.h
+header-y += intel_intrin.h
+header-y += intrinsics.h
+header-y += ioctl.h
+header-y += ioctls.h
+header-y += ipcbuf.h
+header-y += kvm.h
+header-y += kvm_para.h
+header-y += mman.h
+header-y += msgbuf.h
+header-y += param.h
+header-y += perfmon.h
+header-y += perfmon_default_smpl.h
+header-y += poll.h
+header-y += posix_types.h
+header-y += ptrace.h
+header-y += ptrace_offsets.h
+header-y += resource.h
+header-y += rse.h
+header-y += sembuf.h
+header-y += setup.h
+header-y += shmbuf.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += socket.h
+header-y += sockios.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += termbits.h
+header-y += termios.h
+header-y += types.h
+header-y += ucontext.h
+header-y += unistd.h
+header-y += ustack.h
diff --git a/arch/ia64/include/asm/auxvec.h b/arch/ia64/include/uapi/asm/auxvec.h
index 58277fc650e..58277fc650e 100644
--- a/arch/ia64/include/asm/auxvec.h
+++ b/arch/ia64/include/uapi/asm/auxvec.h
diff --git a/arch/ia64/include/asm/bitsperlong.h b/arch/ia64/include/uapi/asm/bitsperlong.h
index ec4db3c970b..ec4db3c970b 100644
--- a/arch/ia64/include/asm/bitsperlong.h
+++ b/arch/ia64/include/uapi/asm/bitsperlong.h
diff --git a/arch/ia64/include/asm/break.h b/arch/ia64/include/uapi/asm/break.h
index e90c40ec9ed..e90c40ec9ed 100644
--- a/arch/ia64/include/asm/break.h
+++ b/arch/ia64/include/uapi/asm/break.h
diff --git a/arch/ia64/include/asm/byteorder.h b/arch/ia64/include/uapi/asm/byteorder.h
index a8dd7355815..a8dd7355815 100644
--- a/arch/ia64/include/asm/byteorder.h
+++ b/arch/ia64/include/uapi/asm/byteorder.h
diff --git a/arch/ia64/include/asm/cmpxchg.h b/arch/ia64/include/uapi/asm/cmpxchg.h
index 4f37dbbb864..4f37dbbb864 100644
--- a/arch/ia64/include/asm/cmpxchg.h
+++ b/arch/ia64/include/uapi/asm/cmpxchg.h
diff --git a/arch/ia64/include/asm/errno.h b/arch/ia64/include/uapi/asm/errno.h
index 4c82b503d92..4c82b503d92 100644
--- a/arch/ia64/include/asm/errno.h
+++ b/arch/ia64/include/uapi/asm/errno.h
diff --git a/arch/ia64/include/asm/fcntl.h b/arch/ia64/include/uapi/asm/fcntl.h
index 1dd275dc8f6..1dd275dc8f6 100644
--- a/arch/ia64/include/asm/fcntl.h
+++ b/arch/ia64/include/uapi/asm/fcntl.h
diff --git a/arch/ia64/include/asm/fpu.h b/arch/ia64/include/uapi/asm/fpu.h
index b6395ad1500..b6395ad1500 100644
--- a/arch/ia64/include/asm/fpu.h
+++ b/arch/ia64/include/uapi/asm/fpu.h
diff --git a/arch/ia64/include/uapi/asm/gcc_intrin.h b/arch/ia64/include/uapi/asm/gcc_intrin.h
new file mode 100644
index 00000000000..61d0d011197
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/gcc_intrin.h
@@ -0,0 +1,618 @@
+/*
+ *
+ * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
+ * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
+ */
+#ifndef _UAPI_ASM_IA64_GCC_INTRIN_H
+#define _UAPI_ASM_IA64_GCC_INTRIN_H
+
+#include <linux/types.h>
+#include <linux/compiler.h>
+
+/* define this macro to get some asm stmts included in 'c' files */
+#define ASM_SUPPORTED
+
+/* Optimization barrier */
+/* The "volatile" is due to gcc bugs */
+#define ia64_barrier()	asm volatile ("":::"memory")
+
+#define ia64_stop()	asm volatile (";;"::)
+
+#define ia64_invala_gr(regnum)	asm volatile ("invala.e r%0" :: "i"(regnum))
+
+#define ia64_invala_fr(regnum)	asm volatile ("invala.e f%0" :: "i"(regnum))
+
+#define ia64_flushrs() asm volatile ("flushrs;;":::"memory")
+
+#define ia64_loadrs() asm volatile ("loadrs;;":::"memory")
+
+extern void ia64_bad_param_for_setreg (void);
+extern void ia64_bad_param_for_getreg (void);
+
+
+#define ia64_native_setreg(regnum, val)						\
+({										\
+	switch (regnum) {							\
+	    case _IA64_REG_PSR_L:						\
+		    asm volatile ("mov psr.l=%0" :: "r"(val) : "memory");	\
+		    break;							\
+	    case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:				\
+		    asm volatile ("mov ar%0=%1" ::				\
+		    			  "i" (regnum - _IA64_REG_AR_KR0),	\
+					  "r"(val): "memory");			\
+		    break;							\
+	    case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:			\
+		    asm volatile ("mov cr%0=%1" ::				\
+				          "i" (regnum - _IA64_REG_CR_DCR),	\
+					  "r"(val): "memory" );			\
+		    break;							\
+	    case _IA64_REG_SP:							\
+		    asm volatile ("mov r12=%0" ::				\
+			    		  "r"(val): "memory");			\
+		    break;							\
+	    case _IA64_REG_GP:							\
+		    asm volatile ("mov gp=%0" :: "r"(val) : "memory");		\
+		break;								\
+	    default:								\
+		    ia64_bad_param_for_setreg();				\
+		    break;							\
+	}									\
+})
+
+#define ia64_native_getreg(regnum)						\
+({										\
+	__u64 ia64_intri_res;							\
+										\
+	switch (regnum) {							\
+	case _IA64_REG_GP:							\
+		asm volatile ("mov %0=gp" : "=r"(ia64_intri_res));		\
+		break;								\
+	case _IA64_REG_IP:							\
+		asm volatile ("mov %0=ip" : "=r"(ia64_intri_res));		\
+		break;								\
+	case _IA64_REG_PSR:							\
+		asm volatile ("mov %0=psr" : "=r"(ia64_intri_res));		\
+		break;								\
+	case _IA64_REG_TP:	/* for current() */				\
+		ia64_intri_res = ia64_r13;					\
+		break;								\
+	case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:				\
+		asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res)		\
+				      : "i"(regnum - _IA64_REG_AR_KR0));	\
+		break;								\
+	case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:				\
+		asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res)		\
+				      : "i" (regnum - _IA64_REG_CR_DCR));	\
+		break;								\
+	case _IA64_REG_SP:							\
+		asm volatile ("mov %0=sp" : "=r" (ia64_intri_res));		\
+		break;								\
+	default:								\
+		ia64_bad_param_for_getreg();					\
+		break;								\
+	}									\
+	ia64_intri_res;								\
+})
+
+#define ia64_hint_pause 0
+
+#define ia64_hint(mode)						\
+({								\
+	switch (mode) {						\
+	case ia64_hint_pause:					\
+		asm volatile ("hint @pause" ::: "memory");	\
+		break;						\
+	}							\
+})
+
+
+/* Integer values for mux1 instruction */
+#define ia64_mux1_brcst 0
+#define ia64_mux1_mix   8
+#define ia64_mux1_shuf  9
+#define ia64_mux1_alt  10
+#define ia64_mux1_rev  11
+
+#define ia64_mux1(x, mode)							\
+({										\
+	__u64 ia64_intri_res;							\
+										\
+	switch (mode) {								\
+	case ia64_mux1_brcst:							\
+		asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x));	\
+		break;								\
+	case ia64_mux1_mix:							\
+		asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x));	\
+		break;								\
+	case ia64_mux1_shuf:							\
+		asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x));	\
+		break;								\
+	case ia64_mux1_alt:							\
+		asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x));	\
+		break;								\
+	case ia64_mux1_rev:							\
+		asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x));	\
+		break;								\
+	}									\
+	ia64_intri_res;								\
+})
+
+#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
+# define ia64_popcnt(x)		__builtin_popcountl(x)
+#else
+# define ia64_popcnt(x)						\
+  ({								\
+	__u64 ia64_intri_res;					\
+	asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x));	\
+								\
+	ia64_intri_res;						\
+  })
+#endif
+
+#define ia64_getf_exp(x)					\
+({								\
+	long ia64_intri_res;					\
+								\
+	asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x));	\
+								\
+	ia64_intri_res;						\
+})
+
+#define ia64_shrp(a, b, count)								\
+({											\
+	__u64 ia64_intri_res;								\
+	asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count));	\
+	ia64_intri_res;									\
+})
+
+#define ia64_ldfs(regnum, x)					\
+({								\
+	register double __f__ asm ("f"#regnum);			\
+	asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x));	\
+})
+
+#define ia64_ldfd(regnum, x)					\
+({								\
+	register double __f__ asm ("f"#regnum);			\
+	asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x));	\
+})
+
+#define ia64_ldfe(regnum, x)					\
+({								\
+	register double __f__ asm ("f"#regnum);			\
+	asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x));	\
+})
+
+#define ia64_ldf8(regnum, x)					\
+({								\
+	register double __f__ asm ("f"#regnum);			\
+	asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x));	\
+})
+
+#define ia64_ldf_fill(regnum, x)				\
+({								\
+	register double __f__ asm ("f"#regnum);			\
+	asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x));	\
+})
+
+#define ia64_st4_rel_nta(m, val)					\
+({									\
+	asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val));	\
+})
+
+#define ia64_stfs(x, regnum)						\
+({									\
+	register double __f__ asm ("f"#regnum);				\
+	asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
+})
+
+#define ia64_stfd(x, regnum)						\
+({									\
+	register double __f__ asm ("f"#regnum);				\
+	asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
+})
+
+#define ia64_stfe(x, regnum)						\
+({									\
+	register double __f__ asm ("f"#regnum);				\
+	asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
+})
+
+#define ia64_stf8(x, regnum)						\
+({									\
+	register double __f__ asm ("f"#regnum);				\
+	asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
+})
+
+#define ia64_stf_spill(x, regnum)						\
+({										\
+	register double __f__ asm ("f"#regnum);					\
+	asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory");	\
+})
+
+#define ia64_fetchadd4_acq(p, inc)						\
+({										\
+										\
+	__u64 ia64_intri_res;							\
+	asm volatile ("fetchadd4.acq %0=[%1],%2"				\
+				: "=r"(ia64_intri_res) : "r"(p), "i" (inc)	\
+				: "memory");					\
+										\
+	ia64_intri_res;								\
+})
+
+#define ia64_fetchadd4_rel(p, inc)						\
+({										\
+	__u64 ia64_intri_res;							\
+	asm volatile ("fetchadd4.rel %0=[%1],%2"				\
+				: "=r"(ia64_intri_res) : "r"(p), "i" (inc)	\
+				: "memory");					\
+										\
+	ia64_intri_res;								\
+})
+
+#define ia64_fetchadd8_acq(p, inc)						\
+({										\
+										\
+	__u64 ia64_intri_res;							\
+	asm volatile ("fetchadd8.acq %0=[%1],%2"				\
+				: "=r"(ia64_intri_res) : "r"(p), "i" (inc)	\
+				: "memory");					\
+										\
+	ia64_intri_res;								\
+})
+
+#define ia64_fetchadd8_rel(p, inc)						\
+({										\
+	__u64 ia64_intri_res;							\
+	asm volatile ("fetchadd8.rel %0=[%1],%2"				\
+				: "=r"(ia64_intri_res) : "r"(p), "i" (inc)	\
+				: "memory");					\
+										\
+	ia64_intri_res;								\
+})
+
+#define ia64_xchg1(ptr,x)							\
+({										\
+	__u64 ia64_intri_res;							\
+	asm volatile ("xchg1 %0=[%1],%2"					\
+		      : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory");	\
+	ia64_intri_res;								\
+})
+
+#define ia64_xchg2(ptr,x)						\
+({									\
+	__u64 ia64_intri_res;						\
+	asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res)	\
+		      : "r" (ptr), "r" (x) : "memory");			\
+	ia64_intri_res;							\
+})
+
+#define ia64_xchg4(ptr,x)						\
+({									\
+	__u64 ia64_intri_res;						\
+	asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res)	\
+		      : "r" (ptr), "r" (x) : "memory");			\
+	ia64_intri_res;							\
+})
+
+#define ia64_xchg8(ptr,x)						\
+({									\
+	__u64 ia64_intri_res;						\
+	asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res)	\
+		      : "r" (ptr), "r" (x) : "memory");			\
+	ia64_intri_res;							\
+})
+
+#define ia64_cmpxchg1_acq(ptr, new, old)						\
+({											\
+	__u64 ia64_intri_res;								\
+	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
+	asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv":					\
+			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
+	ia64_intri_res;									\
+})
+
+#define ia64_cmpxchg1_rel(ptr, new, old)						\
+({											\
+	__u64 ia64_intri_res;								\
+	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
+	asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv":					\
+			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
+	ia64_intri_res;									\
+})
+
+#define ia64_cmpxchg2_acq(ptr, new, old)						\
+({											\
+	__u64 ia64_intri_res;								\
+	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
+	asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv":					\
+			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
+	ia64_intri_res;									\
+})
+
+#define ia64_cmpxchg2_rel(ptr, new, old)						\
+({											\
+	__u64 ia64_intri_res;								\
+	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
+											\
+	asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv":					\
+			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
+	ia64_intri_res;									\
+})
+
+#define ia64_cmpxchg4_acq(ptr, new, old)						\
+({											\
+	__u64 ia64_intri_res;								\
+	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
+	asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv":					\
+			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
+	ia64_intri_res;									\
+})
+
+#define ia64_cmpxchg4_rel(ptr, new, old)						\
+({											\
+	__u64 ia64_intri_res;								\
+	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
+	asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv":					\
+			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
+	ia64_intri_res;									\
+})
+
+#define ia64_cmpxchg8_acq(ptr, new, old)						\
+({											\
+	__u64 ia64_intri_res;								\
+	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
+	asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv":					\
+			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
+	ia64_intri_res;									\
+})
+
+#define ia64_cmpxchg8_rel(ptr, new, old)						\
+({											\
+	__u64 ia64_intri_res;								\
+	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
+											\
+	asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv":					\
+			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
+	ia64_intri_res;									\
+})
+
+#define ia64_mf()	asm volatile ("mf" ::: "memory")
+#define ia64_mfa()	asm volatile ("mf.a" ::: "memory")
+
+#define ia64_invala() asm volatile ("invala" ::: "memory")
+
+#define ia64_native_thash(addr)							\
+({										\
+	unsigned long ia64_intri_res;						\
+	asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr));	\
+	ia64_intri_res;								\
+})
+
+#define ia64_srlz_i()	asm volatile (";; srlz.i ;;" ::: "memory")
+#define ia64_srlz_d()	asm volatile (";; srlz.d" ::: "memory");
+
+#ifdef HAVE_SERIALIZE_DIRECTIVE
+# define ia64_dv_serialize_data()		asm volatile (".serialize.data");
+# define ia64_dv_serialize_instruction()	asm volatile (".serialize.instruction");
+#else
+# define ia64_dv_serialize_data()
+# define ia64_dv_serialize_instruction()
+#endif
+
+#define ia64_nop(x)	asm volatile ("nop %0"::"i"(x));
+
+#define ia64_itci(addr)	asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
+
+#define ia64_itcd(addr)	asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
+
+
+#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1"				\
+					     :: "r"(trnum), "r"(addr) : "memory")
+
+#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1"				\
+					     :: "r"(trnum), "r"(addr) : "memory")
+
+#define ia64_tpa(addr)								\
+({										\
+	unsigned long ia64_pa;							\
+	asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory");	\
+	ia64_pa;								\
+})
+
+#define __ia64_set_dbr(index, val)						\
+	asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_set_ibr(index, val)						\
+	asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_set_pkr(index, val)						\
+	asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_set_pmc(index, val)						\
+	asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_set_pmd(index, val)						\
+	asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
+
+#define ia64_native_set_rr(index, val)							\
+	asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
+
+#define ia64_native_get_cpuid(index)							\
+({											\
+	unsigned long ia64_intri_res;							\
+	asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index));	\
+	ia64_intri_res;									\
+})
+
+#define __ia64_get_dbr(index)							\
+({										\
+	unsigned long ia64_intri_res;						\
+	asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
+	ia64_intri_res;								\
+})
+
+#define ia64_get_ibr(index)							\
+({										\
+	unsigned long ia64_intri_res;						\
+	asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
+	ia64_intri_res;								\
+})
+
+#define ia64_get_pkr(index)							\
+({										\
+	unsigned long ia64_intri_res;						\
+	asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
+	ia64_intri_res;								\
+})
+
+#define ia64_get_pmc(index)							\
+({										\
+	unsigned long ia64_intri_res;						\
+	asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
+	ia64_intri_res;								\
+})
+
+
+#define ia64_native_get_pmd(index)						\
+({										\
+	unsigned long ia64_intri_res;						\
+	asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index));	\
+	ia64_intri_res;								\
+})
+
+#define ia64_native_get_rr(index)						\
+({										\
+	unsigned long ia64_intri_res;						\
+	asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index));	\
+	ia64_intri_res;								\
+})
+
+#define ia64_native_fc(addr)	asm volatile ("fc %0" :: "r"(addr) : "memory")
+
+
+#define ia64_sync_i()	asm volatile (";; sync.i" ::: "memory")
+
+#define ia64_native_ssm(mask)	asm volatile ("ssm %0":: "i"((mask)) : "memory")
+#define ia64_native_rsm(mask)	asm volatile ("rsm %0":: "i"((mask)) : "memory")
+#define ia64_sum(mask)	asm volatile ("sum %0":: "i"((mask)) : "memory")
+#define ia64_rum(mask)	asm volatile ("rum %0":: "i"((mask)) : "memory")
+
+#define ia64_ptce(addr)	asm volatile ("ptc.e %0" :: "r"(addr))
+
+#define ia64_native_ptcga(addr, size)						\
+do {										\
+	asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory");	\
+	ia64_dv_serialize_data();						\
+} while (0)
+
+#define ia64_ptcl(addr, size)							\
+do {										\
+	asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory");	\
+	ia64_dv_serialize_data();						\
+} while (0)
+
+#define ia64_ptri(addr, size)						\
+	asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
+
+#define ia64_ptrd(addr, size)						\
+	asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
+
+#define ia64_ttag(addr)							\
+({									  \
+	__u64 ia64_intri_res;						   \
+	asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr));   \
+	ia64_intri_res;							 \
+})
+
+
+/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */
+
+#define ia64_lfhint_none   0
+#define ia64_lfhint_nt1    1
+#define ia64_lfhint_nt2    2
+#define ia64_lfhint_nta    3
+
+#define ia64_lfetch(lfhint, y)					\
+({								\
+        switch (lfhint) {					\
+        case ia64_lfhint_none:					\
+                asm volatile ("lfetch [%0]" : : "r"(y));	\
+                break;						\
+        case ia64_lfhint_nt1:					\
+                asm volatile ("lfetch.nt1 [%0]" : : "r"(y));	\
+                break;						\
+        case ia64_lfhint_nt2:					\
+                asm volatile ("lfetch.nt2 [%0]" : : "r"(y));	\
+                break;						\
+        case ia64_lfhint_nta:					\
+                asm volatile ("lfetch.nta [%0]" : : "r"(y));	\
+                break;						\
+        }							\
+})
+
+#define ia64_lfetch_excl(lfhint, y)					\
+({									\
+        switch (lfhint) {						\
+        case ia64_lfhint_none:						\
+                asm volatile ("lfetch.excl [%0]" :: "r"(y));		\
+                break;							\
+        case ia64_lfhint_nt1:						\
+                asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y));	\
+                break;							\
+        case ia64_lfhint_nt2:						\
+                asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y));	\
+                break;							\
+        case ia64_lfhint_nta:						\
+                asm volatile ("lfetch.excl.nta [%0]" :: "r"(y));	\
+                break;							\
+        }								\
+})
+
+#define ia64_lfetch_fault(lfhint, y)					\
+({									\
+        switch (lfhint) {						\
+        case ia64_lfhint_none:						\
+                asm volatile ("lfetch.fault [%0]" : : "r"(y));		\
+                break;							\
+        case ia64_lfhint_nt1:						\
+                asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y));	\
+                break;							\
+        case ia64_lfhint_nt2:						\
+                asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y));	\
+                break;							\
+        case ia64_lfhint_nta:						\
+                asm volatile ("lfetch.fault.nta [%0]" : : "r"(y));	\
+                break;							\
+        }								\
+})
+
+#define ia64_lfetch_fault_excl(lfhint, y)				\
+({									\
+        switch (lfhint) {						\
+        case ia64_lfhint_none:						\
+                asm volatile ("lfetch.fault.excl [%0]" :: "r"(y));	\
+                break;							\
+        case ia64_lfhint_nt1:						\
+                asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y));	\
+                break;							\
+        case ia64_lfhint_nt2:						\
+                asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y));	\
+                break;							\
+        case ia64_lfhint_nta:						\
+                asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y));	\
+                break;							\
+        }								\
+})
+
+#define ia64_native_intrin_local_irq_restore(x)			\
+do {								\
+	asm volatile (";;   cmp.ne p6,p7=%0,r0;;"		\
+		      "(p6) ssm psr.i;"				\
+		      "(p7) rsm psr.i;;"			\
+		      "(p6) srlz.d"				\
+		      :: "r"((x)) : "p6", "p7", "memory");	\
+} while (0)
+
+#endif /* _UAPI_ASM_IA64_GCC_INTRIN_H */
diff --git a/arch/ia64/include/asm/ia64regs.h b/arch/ia64/include/uapi/asm/ia64regs.h
index 1757f1c11ad..1757f1c11ad 100644
--- a/arch/ia64/include/asm/ia64regs.h
+++ b/arch/ia64/include/uapi/asm/ia64regs.h
diff --git a/arch/ia64/include/asm/intel_intrin.h b/arch/ia64/include/uapi/asm/intel_intrin.h
index 53cec577558..53cec577558 100644
--- a/arch/ia64/include/asm/intel_intrin.h
+++ b/arch/ia64/include/uapi/asm/intel_intrin.h
diff --git a/arch/ia64/include/uapi/asm/intrinsics.h b/arch/ia64/include/uapi/asm/intrinsics.h
new file mode 100644
index 00000000000..5829978ff46
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/intrinsics.h
@@ -0,0 +1,124 @@
+/*
+ * Compiler-dependent intrinsics.
+ *
+ * Copyright (C) 2002-2003 Hewlett-Packard Co
+ *	David Mosberger-Tang <davidm@hpl.hp.com>
+ */
+#ifndef _UAPI_ASM_IA64_INTRINSICS_H
+#define _UAPI_ASM_IA64_INTRINSICS_H
+
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+/* include compiler specific intrinsics */
+#include <asm/ia64regs.h>
+#ifdef __INTEL_COMPILER
+# include <asm/intel_intrin.h>
+#else
+# include <asm/gcc_intrin.h>
+#endif
+#include <asm/cmpxchg.h>
+
+#define ia64_native_get_psr_i()	(ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
+
+#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4)	\
+do {									\
+	ia64_native_set_rr(0x0000000000000000UL, (val0));		\
+	ia64_native_set_rr(0x2000000000000000UL, (val1));		\
+	ia64_native_set_rr(0x4000000000000000UL, (val2));		\
+	ia64_native_set_rr(0x6000000000000000UL, (val3));		\
+	ia64_native_set_rr(0x8000000000000000UL, (val4));		\
+} while (0)
+
+/*
+ * Force an unresolved reference if someone tries to use
+ * ia64_fetch_and_add() with a bad value.
+ */
+extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
+extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
+
+#define IA64_FETCHADD(tmp,v,n,sz,sem)						\
+({										\
+	switch (sz) {								\
+	      case 4:								\
+	        tmp = ia64_fetchadd4_##sem((unsigned int *) v, n);		\
+		break;								\
+										\
+	      case 8:								\
+	        tmp = ia64_fetchadd8_##sem((unsigned long *) v, n);		\
+		break;								\
+										\
+	      default:								\
+		__bad_size_for_ia64_fetch_and_add();				\
+	}									\
+})
+
+#define ia64_fetchadd(i,v,sem)								\
+({											\
+	__u64 _tmp;									\
+	volatile __typeof__(*(v)) *_v = (v);						\
+	/* Can't use a switch () here: gcc isn't always smart enough for that... */	\
+	if ((i) == -16)									\
+		IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem);			\
+	else if ((i) == -8)								\
+		IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem);				\
+	else if ((i) == -4)								\
+		IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem);				\
+	else if ((i) == -1)								\
+		IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem);				\
+	else if ((i) == 1)								\
+		IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem);				\
+	else if ((i) == 4)								\
+		IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem);				\
+	else if ((i) == 8)								\
+		IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem);				\
+	else if ((i) == 16)								\
+		IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem);				\
+	else										\
+		_tmp = __bad_increment_for_ia64_fetch_and_add();			\
+	(__typeof__(*(v))) (_tmp);	/* return old value */				\
+})
+
+#define ia64_fetch_and_add(i,v)	(ia64_fetchadd(i, v, rel) + (i)) /* return new value */
+
+#endif
+
+
+#ifndef __ASSEMBLY__
+
+#define IA64_INTRINSIC_API(name)	ia64_native_ ## name
+#define IA64_INTRINSIC_MACRO(name)	ia64_native_ ## name
+
+
+/************************************************/
+/* Instructions paravirtualized for correctness */
+/************************************************/
+/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
+/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
+ * is not currently used (though it may be in a long-format VHPT system!)
+ */
+#define ia64_fc				IA64_INTRINSIC_API(fc)
+#define ia64_thash			IA64_INTRINSIC_API(thash)
+#define ia64_get_cpuid			IA64_INTRINSIC_API(get_cpuid)
+#define ia64_get_pmd			IA64_INTRINSIC_API(get_pmd)
+
+
+/************************************************/
+/* Instructions paravirtualized for performance */
+/************************************************/
+#define ia64_ssm			IA64_INTRINSIC_MACRO(ssm)
+#define ia64_rsm			IA64_INTRINSIC_MACRO(rsm)
+#define ia64_getreg			IA64_INTRINSIC_MACRO(getreg)
+#define ia64_setreg			IA64_INTRINSIC_API(setreg)
+#define ia64_set_rr			IA64_INTRINSIC_API(set_rr)
+#define ia64_get_rr			IA64_INTRINSIC_API(get_rr)
+#define ia64_ptcga			IA64_INTRINSIC_API(ptcga)
+#define ia64_get_psr_i			IA64_INTRINSIC_API(get_psr_i)
+#define ia64_intrin_local_irq_restore	\
+	IA64_INTRINSIC_API(intrin_local_irq_restore)
+#define ia64_set_rr0_to_rr4		IA64_INTRINSIC_API(set_rr0_to_rr4)
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _UAPI_ASM_IA64_INTRINSICS_H */
diff --git a/arch/ia64/include/asm/ioctl.h b/arch/ia64/include/uapi/asm/ioctl.h
index b279fe06dfe..b279fe06dfe 100644
--- a/arch/ia64/include/asm/ioctl.h
+++ b/arch/ia64/include/uapi/asm/ioctl.h
diff --git a/arch/ia64/include/asm/ioctls.h b/arch/ia64/include/uapi/asm/ioctls.h
index f3aab5512e9..f3aab5512e9 100644
--- a/arch/ia64/include/asm/ioctls.h
+++ b/arch/ia64/include/uapi/asm/ioctls.h
diff --git a/arch/ia64/include/asm/ipcbuf.h b/arch/ia64/include/uapi/asm/ipcbuf.h
index 84c7e51cb6d..84c7e51cb6d 100644
--- a/arch/ia64/include/asm/ipcbuf.h
+++ b/arch/ia64/include/uapi/asm/ipcbuf.h
diff --git a/arch/ia64/include/asm/kvm.h b/arch/ia64/include/uapi/asm/kvm.h
index ec6c6b30123..ec6c6b30123 100644
--- a/arch/ia64/include/asm/kvm.h
+++ b/arch/ia64/include/uapi/asm/kvm.h
diff --git a/arch/ia64/include/uapi/asm/kvm_para.h b/arch/ia64/include/uapi/asm/kvm_para.h
new file mode 100644
index 00000000000..e69de29bb2d
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/kvm_para.h
diff --git a/arch/ia64/include/uapi/asm/mman.h b/arch/ia64/include/uapi/asm/mman.h
new file mode 100644
index 00000000000..8740819adc5
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/mman.h
@@ -0,0 +1,16 @@
+/*
+ * Based on <asm-i386/mman.h>.
+ *
+ * Modified 1998-2000, 2002
+ *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ */
+#ifndef _UAPI_ASM_IA64_MMAN_H
+#define _UAPI_ASM_IA64_MMAN_H
+
+
+#include <asm-generic/mman.h>
+
+#define MAP_GROWSUP	0x0200		/* register stack-like segment */
+
+
+#endif /* _UAPI_ASM_IA64_MMAN_H */
diff --git a/arch/ia64/include/asm/msgbuf.h b/arch/ia64/include/uapi/asm/msgbuf.h
index 6c64c0d2aae..6c64c0d2aae 100644
--- a/arch/ia64/include/asm/msgbuf.h
+++ b/arch/ia64/include/uapi/asm/msgbuf.h
diff --git a/arch/ia64/include/uapi/asm/param.h b/arch/ia64/include/uapi/asm/param.h
new file mode 100644
index 00000000000..d7da41d9497
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/param.h
@@ -0,0 +1,29 @@
+/*
+ * Fundamental kernel parameters.
+ *
+ * Based on <asm-i386/param.h>.
+ *
+ * Modified 1998, 1999, 2002-2003
+ *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ */
+#ifndef _UAPI_ASM_IA64_PARAM_H
+#define _UAPI_ASM_IA64_PARAM_H
+
+
+#define EXEC_PAGESIZE	65536
+
+#ifndef NOGROUP
+# define NOGROUP	(-1)
+#endif
+
+#define MAXHOSTNAMELEN	64	/* max length of hostname */
+
+#ifndef __KERNEL__
+   /*
+    * Technically, this is wrong, but some old apps still refer to it.  The proper way to
+    * get the HZ value is via sysconf(_SC_CLK_TCK).
+    */
+# define HZ 1024
+#endif
+
+#endif /* _UAPI_ASM_IA64_PARAM_H */
diff --git a/arch/ia64/include/uapi/asm/perfmon.h b/arch/ia64/include/uapi/asm/perfmon.h
new file mode 100644
index 00000000000..1a10a2dd58a
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/perfmon.h
@@ -0,0 +1,177 @@
+/*
+ * Copyright (C) 2001-2003 Hewlett-Packard Co
+ *               Stephane Eranian <eranian@hpl.hp.com>
+ */
+
+#ifndef _UAPI_ASM_IA64_PERFMON_H
+#define _UAPI_ASM_IA64_PERFMON_H
+
+/*
+ * perfmon commands supported on all CPU models
+ */
+#define PFM_WRITE_PMCS		0x01
+#define PFM_WRITE_PMDS		0x02
+#define PFM_READ_PMDS		0x03
+#define PFM_STOP		0x04
+#define PFM_START		0x05
+#define PFM_ENABLE		0x06 /* obsolete */
+#define PFM_DISABLE		0x07 /* obsolete */
+#define PFM_CREATE_CONTEXT	0x08
+#define PFM_DESTROY_CONTEXT	0x09 /* obsolete use close() */
+#define PFM_RESTART		0x0a
+#define PFM_PROTECT_CONTEXT	0x0b /* obsolete */
+#define PFM_GET_FEATURES	0x0c
+#define PFM_DEBUG		0x0d
+#define PFM_UNPROTECT_CONTEXT	0x0e /* obsolete */
+#define PFM_GET_PMC_RESET_VAL	0x0f
+#define PFM_LOAD_CONTEXT	0x10
+#define PFM_UNLOAD_CONTEXT	0x11
+
+/*
+ * PMU model specific commands (may not be supported on all PMU models)
+ */
+#define PFM_WRITE_IBRS		0x20
+#define PFM_WRITE_DBRS		0x21
+
+/*
+ * context flags
+ */
+#define PFM_FL_NOTIFY_BLOCK    	 0x01	/* block task on user level notifications */
+#define PFM_FL_SYSTEM_WIDE	 0x02	/* create a system wide context */
+#define PFM_FL_OVFL_NO_MSG	 0x80   /* do not post overflow/end messages for notification */
+
+/*
+ * event set flags
+ */
+#define PFM_SETFL_EXCL_IDLE      0x01   /* exclude idle task (syswide only) XXX: DO NOT USE YET */
+
+/*
+ * PMC flags
+ */
+#define PFM_REGFL_OVFL_NOTIFY	0x1	/* send notification on overflow */
+#define PFM_REGFL_RANDOM	0x2	/* randomize sampling interval   */
+
+/*
+ * PMD/PMC/IBR/DBR return flags (ignored on input)
+ *
+ * Those flags are used on output and must be checked in case EAGAIN is returned
+ * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure.
+ */
+#define PFM_REG_RETFL_NOTAVAIL	(1UL<<31) /* set if register is implemented but not available */
+#define PFM_REG_RETFL_EINVAL	(1UL<<30) /* set if register entry is invalid */
+#define PFM_REG_RETFL_MASK	(PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL)
+
+#define PFM_REG_HAS_ERROR(flag)	(((flag) & PFM_REG_RETFL_MASK) != 0)
+
+typedef unsigned char pfm_uuid_t[16];	/* custom sampling buffer identifier type */
+
+/*
+ * Request structure used to define a context
+ */
+typedef struct {
+	pfm_uuid_t     ctx_smpl_buf_id;	 /* which buffer format to use (if needed) */
+	unsigned long  ctx_flags;	 /* noblock/block */
+	unsigned short ctx_nextra_sets;	 /* number of extra event sets (you always get 1) */
+	unsigned short ctx_reserved1;	 /* for future use */
+	int	       ctx_fd;		 /* return arg: unique identification for context */
+	void	       *ctx_smpl_vaddr;	 /* return arg: virtual address of sampling buffer, is used */
+	unsigned long  ctx_reserved2[11];/* for future use */
+} pfarg_context_t;
+
+/*
+ * Request structure used to write/read a PMC or PMD
+ */
+typedef struct {
+	unsigned int	reg_num;	   /* which register */
+	unsigned short	reg_set;	   /* event set for this register */
+	unsigned short	reg_reserved1;	   /* for future use */
+
+	unsigned long	reg_value;	   /* initial pmc/pmd value */
+	unsigned long	reg_flags;	   /* input: pmc/pmd flags, return: reg error */
+
+	unsigned long	reg_long_reset;	   /* reset after buffer overflow notification */
+	unsigned long	reg_short_reset;   /* reset after counter overflow */
+
+	unsigned long	reg_reset_pmds[4]; /* which other counters to reset on overflow */
+	unsigned long	reg_random_seed;   /* seed value when randomization is used */
+	unsigned long	reg_random_mask;   /* bitmask used to limit random value */
+	unsigned long   reg_last_reset_val;/* return: PMD last reset value */
+
+	unsigned long	reg_smpl_pmds[4];  /* which pmds are accessed when PMC overflows */
+	unsigned long	reg_smpl_eventid;  /* opaque sampling event identifier */
+
+	unsigned long   reg_reserved2[3];   /* for future use */
+} pfarg_reg_t;
+
+typedef struct {
+	unsigned int	dbreg_num;		/* which debug register */
+	unsigned short	dbreg_set;		/* event set for this register */
+	unsigned short	dbreg_reserved1;	/* for future use */
+	unsigned long	dbreg_value;		/* value for debug register */
+	unsigned long	dbreg_flags;		/* return: dbreg error */
+	unsigned long	dbreg_reserved2[1];	/* for future use */
+} pfarg_dbreg_t;
+
+typedef struct {
+	unsigned int	ft_version;	/* perfmon: major [16-31], minor [0-15] */
+	unsigned int	ft_reserved;	/* reserved for future use */
+	unsigned long	reserved[4];	/* for future use */
+} pfarg_features_t;
+
+typedef struct {
+	pid_t		load_pid;	   /* process to load the context into */
+	unsigned short	load_set;	   /* first event set to load */
+	unsigned short	load_reserved1;	   /* for future use */
+	unsigned long	load_reserved2[3]; /* for future use */
+} pfarg_load_t;
+
+typedef struct {
+	int		msg_type;		/* generic message header */
+	int		msg_ctx_fd;		/* generic message header */
+	unsigned long	msg_ovfl_pmds[4];	/* which PMDs overflowed */
+	unsigned short  msg_active_set;		/* active set at the time of overflow */
+	unsigned short  msg_reserved1;		/* for future use */
+	unsigned int    msg_reserved2;		/* for future use */
+	unsigned long	msg_tstamp;		/* for perf tuning/debug */
+} pfm_ovfl_msg_t;
+
+typedef struct {
+	int		msg_type;		/* generic message header */
+	int		msg_ctx_fd;		/* generic message header */
+	unsigned long	msg_tstamp;		/* for perf tuning */
+} pfm_end_msg_t;
+
+typedef struct {
+	int		msg_type;		/* type of the message */
+	int		msg_ctx_fd;		/* unique identifier for the context */
+	unsigned long	msg_tstamp;		/* for perf tuning */
+} pfm_gen_msg_t;
+
+#define PFM_MSG_OVFL	1	/* an overflow happened */
+#define PFM_MSG_END	2	/* task to which context was attached ended */
+
+typedef union {
+	pfm_ovfl_msg_t	pfm_ovfl_msg;
+	pfm_end_msg_t	pfm_end_msg;
+	pfm_gen_msg_t	pfm_gen_msg;
+} pfm_msg_t;
+
+/*
+ * Define the version numbers for both perfmon as a whole and the sampling buffer format.
+ */
+#define PFM_VERSION_MAJ		 2U
+#define PFM_VERSION_MIN		 0U
+#define PFM_VERSION		 (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff))
+#define PFM_VERSION_MAJOR(x)	 (((x)>>16) & 0xffff)
+#define PFM_VERSION_MINOR(x)	 ((x) & 0xffff)
+
+
+/*
+ * miscellaneous architected definitions
+ */
+#define PMU_FIRST_COUNTER	4	/* first counting monitor (PMC/PMD) */
+#define PMU_MAX_PMCS		256	/* maximum architected number of PMC registers */
+#define PMU_MAX_PMDS		256	/* maximum architected number of PMD registers */
+
+
+#endif /* _UAPI_ASM_IA64_PERFMON_H */
diff --git a/arch/ia64/include/asm/perfmon_default_smpl.h b/arch/ia64/include/uapi/asm/perfmon_default_smpl.h
index a2d560c6723..a2d560c6723 100644
--- a/arch/ia64/include/asm/perfmon_default_smpl.h
+++ b/arch/ia64/include/uapi/asm/perfmon_default_smpl.h
diff --git a/arch/ia64/include/asm/poll.h b/arch/ia64/include/uapi/asm/poll.h
index c98509d3149..c98509d3149 100644
--- a/arch/ia64/include/asm/poll.h
+++ b/arch/ia64/include/uapi/asm/poll.h
diff --git a/arch/ia64/include/asm/posix_types.h b/arch/ia64/include/uapi/asm/posix_types.h
index 99ee1d6510c..99ee1d6510c 100644
--- a/arch/ia64/include/asm/posix_types.h
+++ b/arch/ia64/include/uapi/asm/posix_types.h
diff --git a/arch/ia64/include/uapi/asm/ptrace.h b/arch/ia64/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..0a02f634e12
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ptrace.h
@@ -0,0 +1,247 @@
+/*
+ * Copyright (C) 1998-2004 Hewlett-Packard Co
+ *	David Mosberger-Tang <davidm@hpl.hp.com>
+ *	Stephane Eranian <eranian@hpl.hp.com>
+ * Copyright (C) 2003 Intel Co
+ *	Suresh Siddha <suresh.b.siddha@intel.com>
+ *	Fenghua Yu <fenghua.yu@intel.com>
+ *	Arun Sharma <arun.sharma@intel.com>
+ *
+ * 12/07/98	S. Eranian	added pt_regs & switch_stack
+ * 12/21/98	D. Mosberger	updated to match latest code
+ *  6/17/99	D. Mosberger	added second unat member to "struct switch_stack"
+ *
+ */
+#ifndef _UAPI_ASM_IA64_PTRACE_H
+#define _UAPI_ASM_IA64_PTRACE_H
+
+/*
+ * When a user process is blocked, its state looks as follows:
+ *
+ *            +----------------------+	-------	IA64_STK_OFFSET
+ *     	      |			     |	 ^
+ *            | struct pt_regs       |	 |
+ *	      |			     |	 |
+ *            +----------------------+	 |
+ *	      |			     |	 |
+ *     	      |	   memory stack	     |	 |
+ *	      |	(growing downwards)  |	 |
+ *	      //.....................//	 |
+ *					 |
+ *	      //.....................//	 |
+ *	      |			     |	 |
+ *            +----------------------+	 |
+ *            | struct switch_stack  |	 |
+ *	      |			     |	 |
+ *	      +----------------------+	 |
+ *	      |			     |	 |
+ *	      //.....................//	 |
+ *					 |
+ *	      //.....................//	 |
+ *	      |			     |	 |
+ *	      |	 register stack	     |	 |
+ *	      |	(growing upwards)    |	 |
+ *            |			     |	 |
+ *	      +----------------------+	 |  ---	IA64_RBS_OFFSET
+ *            |  struct thread_info  |	 |  ^
+ *	      +----------------------+	 |  |
+ *	      |			     |	 |  |
+ *            |  struct task_struct  |	 |  |
+ * current -> |			     |   |  |
+ *	      +----------------------+ -------
+ *
+ * Note that ar.ec is not saved explicitly in pt_reg or switch_stack.
+ * This is because ar.ec is saved as part of ar.pfs.
+ */
+
+
+#include <asm/fpu.h>
+
+
+#ifndef __ASSEMBLY__
+
+/*
+ * This struct defines the way the registers are saved on system
+ * calls.
+ *
+ * We don't save all floating point register because the kernel
+ * is compiled to use only a very small subset, so the other are
+ * untouched.
+ *
+ * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE
+ * (because the memory stack pointer MUST ALWAYS be aligned this way)
+ *
+ */
+struct pt_regs {
+	/* The following registers are saved by SAVE_MIN: */
+	unsigned long b6;		/* scratch */
+	unsigned long b7;		/* scratch */
+
+	unsigned long ar_csd;           /* used by cmp8xchg16 (scratch) */
+	unsigned long ar_ssd;           /* reserved for future use (scratch) */
+
+	unsigned long r8;		/* scratch (return value register 0) */
+	unsigned long r9;		/* scratch (return value register 1) */
+	unsigned long r10;		/* scratch (return value register 2) */
+	unsigned long r11;		/* scratch (return value register 3) */
+
+	unsigned long cr_ipsr;		/* interrupted task's psr */
+	unsigned long cr_iip;		/* interrupted task's instruction pointer */
+	/*
+	 * interrupted task's function state; if bit 63 is cleared, it
+	 * contains syscall's ar.pfs.pfm:
+	 */
+	unsigned long cr_ifs;
+
+	unsigned long ar_unat;		/* interrupted task's NaT register (preserved) */
+	unsigned long ar_pfs;		/* prev function state  */
+	unsigned long ar_rsc;		/* RSE configuration */
+	/* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */
+	unsigned long ar_rnat;		/* RSE NaT */
+	unsigned long ar_bspstore;	/* RSE bspstore */
+
+	unsigned long pr;		/* 64 predicate registers (1 bit each) */
+	unsigned long b0;		/* return pointer (bp) */
+	unsigned long loadrs;		/* size of dirty partition << 16 */
+
+	unsigned long r1;		/* the gp pointer */
+	unsigned long r12;		/* interrupted task's memory stack pointer */
+	unsigned long r13;		/* thread pointer */
+
+	unsigned long ar_fpsr;		/* floating point status (preserved) */
+	unsigned long r15;		/* scratch */
+
+	/* The remaining registers are NOT saved for system calls.  */
+
+	unsigned long r14;		/* scratch */
+	unsigned long r2;		/* scratch */
+	unsigned long r3;		/* scratch */
+
+	/* The following registers are saved by SAVE_REST: */
+	unsigned long r16;		/* scratch */
+	unsigned long r17;		/* scratch */
+	unsigned long r18;		/* scratch */
+	unsigned long r19;		/* scratch */
+	unsigned long r20;		/* scratch */
+	unsigned long r21;		/* scratch */
+	unsigned long r22;		/* scratch */
+	unsigned long r23;		/* scratch */
+	unsigned long r24;		/* scratch */
+	unsigned long r25;		/* scratch */
+	unsigned long r26;		/* scratch */
+	unsigned long r27;		/* scratch */
+	unsigned long r28;		/* scratch */
+	unsigned long r29;		/* scratch */
+	unsigned long r30;		/* scratch */
+	unsigned long r31;		/* scratch */
+
+	unsigned long ar_ccv;		/* compare/exchange value (scratch) */
+
+	/*
+	 * Floating point registers that the kernel considers scratch:
+	 */
+	struct ia64_fpreg f6;		/* scratch */
+	struct ia64_fpreg f7;		/* scratch */
+	struct ia64_fpreg f8;		/* scratch */
+	struct ia64_fpreg f9;		/* scratch */
+	struct ia64_fpreg f10;		/* scratch */
+	struct ia64_fpreg f11;		/* scratch */
+};
+
+/*
+ * This structure contains the addition registers that need to
+ * preserved across a context switch.  This generally consists of
+ * "preserved" registers.
+ */
+struct switch_stack {
+	unsigned long caller_unat;	/* user NaT collection register (preserved) */
+	unsigned long ar_fpsr;		/* floating-point status register */
+
+	struct ia64_fpreg f2;		/* preserved */
+	struct ia64_fpreg f3;		/* preserved */
+	struct ia64_fpreg f4;		/* preserved */
+	struct ia64_fpreg f5;		/* preserved */
+
+	struct ia64_fpreg f12;		/* scratch, but untouched by kernel */
+	struct ia64_fpreg f13;		/* scratch, but untouched by kernel */
+	struct ia64_fpreg f14;		/* scratch, but untouched by kernel */
+	struct ia64_fpreg f15;		/* scratch, but untouched by kernel */
+	struct ia64_fpreg f16;		/* preserved */
+	struct ia64_fpreg f17;		/* preserved */
+	struct ia64_fpreg f18;		/* preserved */
+	struct ia64_fpreg f19;		/* preserved */
+	struct ia64_fpreg f20;		/* preserved */
+	struct ia64_fpreg f21;		/* preserved */
+	struct ia64_fpreg f22;		/* preserved */
+	struct ia64_fpreg f23;		/* preserved */
+	struct ia64_fpreg f24;		/* preserved */
+	struct ia64_fpreg f25;		/* preserved */
+	struct ia64_fpreg f26;		/* preserved */
+	struct ia64_fpreg f27;		/* preserved */
+	struct ia64_fpreg f28;		/* preserved */
+	struct ia64_fpreg f29;		/* preserved */
+	struct ia64_fpreg f30;		/* preserved */
+	struct ia64_fpreg f31;		/* preserved */
+
+	unsigned long r4;		/* preserved */
+	unsigned long r5;		/* preserved */
+	unsigned long r6;		/* preserved */
+	unsigned long r7;		/* preserved */
+
+	unsigned long b0;		/* so we can force a direct return in copy_thread */
+	unsigned long b1;
+	unsigned long b2;
+	unsigned long b3;
+	unsigned long b4;
+	unsigned long b5;
+
+	unsigned long ar_pfs;		/* previous function state */
+	unsigned long ar_lc;		/* loop counter (preserved) */
+	unsigned long ar_unat;		/* NaT bits for r4-r7 */
+	unsigned long ar_rnat;		/* RSE NaT collection register */
+	unsigned long ar_bspstore;	/* RSE dirty base (preserved) */
+	unsigned long pr;		/* 64 predicate registers (1 bit each) */
+};
+
+
+/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */
+struct pt_all_user_regs {
+	unsigned long nat;
+	unsigned long cr_iip;
+	unsigned long cfm;
+	unsigned long cr_ipsr;
+	unsigned long pr;
+
+	unsigned long gr[32];
+	unsigned long br[8];
+	unsigned long ar[128];
+	struct ia64_fpreg fr[128];
+};
+
+#endif /* !__ASSEMBLY__ */
+
+/* indices to application-registers array in pt_all_user_regs */
+#define PT_AUR_RSC	16
+#define PT_AUR_BSP	17
+#define PT_AUR_BSPSTORE	18
+#define PT_AUR_RNAT	19
+#define PT_AUR_CCV	32
+#define PT_AUR_UNAT	36
+#define PT_AUR_FPSR	40
+#define PT_AUR_PFS	64
+#define PT_AUR_LC	65
+#define PT_AUR_EC	66
+
+/*
+ * The numbers chosen here are somewhat arbitrary but absolutely MUST
+ * not overlap with any of the number assigned in <linux/ptrace.h>.
+ */
+#define PTRACE_SINGLEBLOCK	12	/* resume execution until next branch */
+#define PTRACE_OLD_GETSIGINFO	13	/* (replaced by PTRACE_GETSIGINFO in <linux/ptrace.h>)  */
+#define PTRACE_OLD_SETSIGINFO	14	/* (replaced by PTRACE_SETSIGINFO in <linux/ptrace.h>)  */
+#define PTRACE_GETREGS		18	/* get all registers (pt_all_user_regs) in one shot */
+#define PTRACE_SETREGS		19	/* set all registers (pt_all_user_regs) in one shot */
+
+#define PTRACE_OLDSETOPTIONS	21
+
+#endif /* _UAPI_ASM_IA64_PTRACE_H */
diff --git a/arch/ia64/include/asm/ptrace_offsets.h b/arch/ia64/include/uapi/asm/ptrace_offsets.h
index b712773c759..b712773c759 100644
--- a/arch/ia64/include/asm/ptrace_offsets.h
+++ b/arch/ia64/include/uapi/asm/ptrace_offsets.h
diff --git a/arch/ia64/include/asm/resource.h b/arch/ia64/include/uapi/asm/resource.h
index ba2272a87fc..ba2272a87fc 100644
--- a/arch/ia64/include/asm/resource.h
+++ b/arch/ia64/include/uapi/asm/resource.h
diff --git a/arch/ia64/include/asm/rse.h b/arch/ia64/include/uapi/asm/rse.h
index 02830a3b019..02830a3b019 100644
--- a/arch/ia64/include/asm/rse.h
+++ b/arch/ia64/include/uapi/asm/rse.h
diff --git a/arch/ia64/include/asm/sembuf.h b/arch/ia64/include/uapi/asm/sembuf.h
index 1340fbc04d3..1340fbc04d3 100644
--- a/arch/ia64/include/asm/sembuf.h
+++ b/arch/ia64/include/uapi/asm/sembuf.h
diff --git a/arch/ia64/include/asm/setup.h b/arch/ia64/include/uapi/asm/setup.h
index 8d56458310b..8d56458310b 100644
--- a/arch/ia64/include/asm/setup.h
+++ b/arch/ia64/include/uapi/asm/setup.h
diff --git a/arch/ia64/include/asm/shmbuf.h b/arch/ia64/include/uapi/asm/shmbuf.h
index 585002a77ac..585002a77ac 100644
--- a/arch/ia64/include/asm/shmbuf.h
+++ b/arch/ia64/include/uapi/asm/shmbuf.h
diff --git a/arch/ia64/include/asm/sigcontext.h b/arch/ia64/include/uapi/asm/sigcontext.h
index 57ff777bcc4..57ff777bcc4 100644
--- a/arch/ia64/include/asm/sigcontext.h
+++ b/arch/ia64/include/uapi/asm/sigcontext.h
diff --git a/arch/ia64/include/uapi/asm/siginfo.h b/arch/ia64/include/uapi/asm/siginfo.h
new file mode 100644
index 00000000000..4ea6225196b
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/siginfo.h
@@ -0,0 +1,121 @@
+/*
+ * Based on <asm-i386/siginfo.h>.
+ *
+ * Modified 1998-2002
+ *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ */
+#ifndef _UAPI_ASM_IA64_SIGINFO_H
+#define _UAPI_ASM_IA64_SIGINFO_H
+
+
+#define __ARCH_SI_PREAMBLE_SIZE	(4 * sizeof(int))
+
+#define HAVE_ARCH_SIGINFO_T
+#define HAVE_ARCH_COPY_SIGINFO
+#define HAVE_ARCH_COPY_SIGINFO_TO_USER
+
+#include <asm-generic/siginfo.h>
+
+typedef struct siginfo {
+	int si_signo;
+	int si_errno;
+	int si_code;
+	int __pad0;
+
+	union {
+		int _pad[SI_PAD_SIZE];
+
+		/* kill() */
+		struct {
+			pid_t _pid;		/* sender's pid */
+			uid_t _uid;		/* sender's uid */
+		} _kill;
+
+		/* POSIX.1b timers */
+		struct {
+			timer_t _tid;		/* timer id */
+			int _overrun;		/* overrun count */
+			char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)];
+			sigval_t _sigval;	/* must overlay ._rt._sigval! */
+			int _sys_private;	/* not to be passed to user */
+		} _timer;
+
+		/* POSIX.1b signals */
+		struct {
+			pid_t _pid;		/* sender's pid */
+			uid_t _uid;		/* sender's uid */
+			sigval_t _sigval;
+		} _rt;
+
+		/* SIGCHLD */
+		struct {
+			pid_t _pid;		/* which child */
+			uid_t _uid;		/* sender's uid */
+			int _status;		/* exit code */
+			clock_t _utime;
+			clock_t _stime;
+		} _sigchld;
+
+		/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
+		struct {
+			void __user *_addr;	/* faulting insn/memory ref. */
+			int _imm;		/* immediate value for "break" */
+			unsigned int _flags;	/* see below */
+			unsigned long _isr;	/* isr */
+			short _addr_lsb;	/* lsb of faulting address */
+		} _sigfault;
+
+		/* SIGPOLL */
+		struct {
+			long _band;	/* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */
+			int _fd;
+		} _sigpoll;
+	} _sifields;
+} siginfo_t;
+
+#define si_imm		_sifields._sigfault._imm	/* as per UNIX SysV ABI spec */
+#define si_flags	_sifields._sigfault._flags
+/*
+ * si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that
+ * si_code is non-zero and __ISR_VALID is set in si_flags.
+ */
+#define si_isr		_sifields._sigfault._isr
+
+/*
+ * Flag values for si_flags:
+ */
+#define __ISR_VALID_BIT	0
+#define __ISR_VALID	(1 << __ISR_VALID_BIT)
+
+/*
+ * SIGILL si_codes
+ */
+#define ILL_BADIADDR	(__SI_FAULT|9)	/* unimplemented instruction address */
+#define __ILL_BREAK	(__SI_FAULT|10)	/* illegal break */
+#define __ILL_BNDMOD	(__SI_FAULT|11)	/* bundle-update (modification) in progress */
+#undef NSIGILL
+#define NSIGILL		11
+
+/*
+ * SIGFPE si_codes
+ */
+#define __FPE_DECOVF	(__SI_FAULT|9)	/* decimal overflow */
+#define __FPE_DECDIV	(__SI_FAULT|10)	/* decimal division by zero */
+#define __FPE_DECERR	(__SI_FAULT|11)	/* packed decimal error */
+#define __FPE_INVASC	(__SI_FAULT|12)	/* invalid ASCII digit */
+#define __FPE_INVDEC	(__SI_FAULT|13)	/* invalid decimal digit */
+#undef NSIGFPE
+#define NSIGFPE		13
+
+/*
+ * SIGSEGV si_codes
+ */
+#define __SEGV_PSTKOVF	(__SI_FAULT|3)	/* paragraph stack overflow */
+#undef NSIGSEGV
+#define NSIGSEGV	3
+
+#undef NSIGTRAP
+#define NSIGTRAP	4
+
+
+#endif /* _UAPI_ASM_IA64_SIGINFO_H */
diff --git a/arch/ia64/include/uapi/asm/signal.h b/arch/ia64/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..e531c424434
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/signal.h
@@ -0,0 +1,127 @@
+/*
+ * Modified 1998-2001, 2003
+ *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ *
+ * Unfortunately, this file is being included by bits/signal.h in
+ * glibc-2.x.  Hence the #ifdef __KERNEL__ ugliness.
+ */
+#ifndef _UAPI_ASM_IA64_SIGNAL_H
+#define _UAPI_ASM_IA64_SIGNAL_H
+
+
+#define SIGHUP		 1
+#define SIGINT		 2
+#define SIGQUIT		 3
+#define SIGILL		 4
+#define SIGTRAP		 5
+#define SIGABRT		 6
+#define SIGIOT		 6
+#define SIGBUS		 7
+#define SIGFPE		 8
+#define SIGKILL		 9
+#define SIGUSR1		10
+#define SIGSEGV		11
+#define SIGUSR2		12
+#define SIGPIPE		13
+#define SIGALRM		14
+#define SIGTERM		15
+#define SIGSTKFLT	16
+#define SIGCHLD		17
+#define SIGCONT		18
+#define SIGSTOP		19
+#define SIGTSTP		20
+#define SIGTTIN		21
+#define SIGTTOU		22
+#define SIGURG		23
+#define SIGXCPU		24
+#define SIGXFSZ		25
+#define SIGVTALRM	26
+#define SIGPROF		27
+#define SIGWINCH	28
+#define SIGIO		29
+#define SIGPOLL		SIGIO
+/*
+#define SIGLOST		29
+*/
+#define SIGPWR		30
+#define SIGSYS		31
+/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */
+#define	SIGUNUSED	31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN	32
+#define SIGRTMAX	_NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP	0x00000001
+#define SA_NOCLDWAIT	0x00000002
+#define SA_SIGINFO	0x00000004
+#define SA_ONSTACK	0x08000000
+#define SA_RESTART	0x10000000
+#define SA_NODEFER	0x40000000
+#define SA_RESETHAND	0x80000000
+
+#define SA_NOMASK	SA_NODEFER
+#define SA_ONESHOT	SA_RESETHAND
+
+#define SA_RESTORER	0x04000000
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK	1
+#define SS_DISABLE	2
+
+/*
+ * The minimum stack size needs to be fairly large because we want to
+ * be sure that an app compiled for today's CPUs will continue to run
+ * on all future CPU models.  The CPU model matters because the signal
+ * frame needs to have space for the complete machine state, including
+ * all physical stacked registers.  The number of physical stacked
+ * registers is CPU model dependent, but given that the width of
+ * ar.rsc.loadrs is 14 bits, we can assume that they'll never take up
+ * more than 16KB of space.
+ */
+#if 1
+  /*
+   * This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it
+   * in wrong. ;-(  To preserve backwards compatibility, we leave the kernel at the
+   * incorrect value and fix libc only.
+   */
+# define MINSIGSTKSZ	131027	/* min. stack size for sigaltstack() */
+#else
+# define MINSIGSTKSZ	131072	/* min. stack size for sigaltstack() */
+#endif
+#define SIGSTKSZ	262144	/* default stack size for sigaltstack() */
+
+
+#include <asm-generic/signal-defs.h>
+
+# ifndef __ASSEMBLY__
+
+#  include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+typedef struct sigaltstack {
+	void __user *ss_sp;
+	int ss_flags;
+	size_t ss_size;
+} stack_t;
+
+
+# endif /* !__ASSEMBLY__ */
+#endif /* _UAPI_ASM_IA64_SIGNAL_H */
diff --git a/arch/ia64/include/asm/socket.h b/arch/ia64/include/uapi/asm/socket.h
index 41fc28a4a18..41fc28a4a18 100644
--- a/arch/ia64/include/asm/socket.h
+++ b/arch/ia64/include/uapi/asm/socket.h
diff --git a/arch/ia64/include/asm/sockios.h b/arch/ia64/include/uapi/asm/sockios.h
index 15c92468ad3..15c92468ad3 100644
--- a/arch/ia64/include/asm/sockios.h
+++ b/arch/ia64/include/uapi/asm/sockios.h
diff --git a/arch/ia64/include/asm/stat.h b/arch/ia64/include/uapi/asm/stat.h
index 367bb90cdff..367bb90cdff 100644
--- a/arch/ia64/include/asm/stat.h
+++ b/arch/ia64/include/uapi/asm/stat.h
diff --git a/arch/ia64/include/asm/statfs.h b/arch/ia64/include/uapi/asm/statfs.h
index 1e589669de5..1e589669de5 100644
--- a/arch/ia64/include/asm/statfs.h
+++ b/arch/ia64/include/uapi/asm/statfs.h
diff --git a/arch/ia64/include/asm/swab.h b/arch/ia64/include/uapi/asm/swab.h
index c89a8cb5d8a..c89a8cb5d8a 100644
--- a/arch/ia64/include/asm/swab.h
+++ b/arch/ia64/include/uapi/asm/swab.h
diff --git a/arch/ia64/include/asm/termbits.h b/arch/ia64/include/uapi/asm/termbits.h
index c009b94e58d..c009b94e58d 100644
--- a/arch/ia64/include/asm/termbits.h
+++ b/arch/ia64/include/uapi/asm/termbits.h
diff --git a/arch/ia64/include/uapi/asm/termios.h b/arch/ia64/include/uapi/asm/termios.h
new file mode 100644
index 00000000000..d59b48c307f
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/termios.h
@@ -0,0 +1,50 @@
+/*
+ * Modified 1999
+ *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ *
+ * 99/01/28	Added N_IRDA and N_SMSBLOCK
+ */
+#ifndef _UAPI_ASM_IA64_TERMIOS_H
+#define _UAPI_ASM_IA64_TERMIOS_H
+
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+	unsigned short ws_row;
+	unsigned short ws_col;
+	unsigned short ws_xpixel;
+	unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+	unsigned short c_iflag;		/* input mode flags */
+	unsigned short c_oflag;		/* output mode flags */
+	unsigned short c_cflag;		/* control mode flags */
+	unsigned short c_lflag;		/* local mode flags */
+	unsigned char c_line;		/* line discipline */
+	unsigned char c_cc[NCC];	/* control characters */
+};
+
+/* modem lines */
+#define TIOCM_LE	0x001
+#define TIOCM_DTR	0x002
+#define TIOCM_RTS	0x004
+#define TIOCM_ST	0x008
+#define TIOCM_SR	0x010
+#define TIOCM_CTS	0x020
+#define TIOCM_CAR	0x040
+#define TIOCM_RNG	0x080
+#define TIOCM_DSR	0x100
+#define TIOCM_CD	TIOCM_CAR
+#define TIOCM_RI	TIOCM_RNG
+#define TIOCM_OUT1	0x2000
+#define TIOCM_OUT2	0x4000
+#define TIOCM_LOOP	0x8000
+
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+
+
+#endif /* _UAPI_ASM_IA64_TERMIOS_H */
diff --git a/arch/ia64/include/uapi/asm/types.h b/arch/ia64/include/uapi/asm/types.h
new file mode 100644
index 00000000000..321193b05ee
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/types.h
@@ -0,0 +1,31 @@
+/*
+ * This file is never included by application software unless explicitly
+ * requested (e.g., via linux/types.h) in which case the application is
+ * Linux specific so (user-) name space pollution is not a major issue.
+ * However, for interoperability, libraries still need to be careful to
+ * avoid naming clashes.
+ *
+ * Based on <asm-alpha/types.h>.
+ *
+ * Modified 1998-2000, 2002
+ *	David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
+ */
+#ifndef _UAPI_ASM_IA64_TYPES_H
+#define _UAPI_ASM_IA64_TYPES_H
+
+
+#ifndef __KERNEL__
+#include <asm-generic/int-l64.h>
+#endif
+
+#ifdef __ASSEMBLY__
+# define __IA64_UL(x)		(x)
+# define __IA64_UL_CONST(x)	x
+
+#else
+# define __IA64_UL(x)		((unsigned long)(x))
+# define __IA64_UL_CONST(x)	x##UL
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* _UAPI_ASM_IA64_TYPES_H */
diff --git a/arch/ia64/include/asm/ucontext.h b/arch/ia64/include/uapi/asm/ucontext.h
index bf573dc8ca6..bf573dc8ca6 100644
--- a/arch/ia64/include/asm/ucontext.h
+++ b/arch/ia64/include/uapi/asm/ucontext.h
diff --git a/arch/ia64/include/uapi/asm/unistd.h b/arch/ia64/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..b706aa54df2
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/unistd.h
@@ -0,0 +1,328 @@
+/*
+ * IA-64 Linux syscall numbers and inline-functions.
+ *
+ * Copyright (C) 1998-2005 Hewlett-Packard Co
+ *	David Mosberger-Tang <davidm@hpl.hp.com>
+ */
+#ifndef _UAPI_ASM_IA64_UNISTD_H
+#define _UAPI_ASM_IA64_UNISTD_H
+
+
+#include <asm/break.h>
+
+#define __BREAK_SYSCALL			__IA64_BREAK_SYSCALL
+
+#define __NR_ni_syscall			1024
+#define __NR_exit			1025
+#define __NR_read			1026
+#define __NR_write			1027
+#define __NR_open			1028
+#define __NR_close			1029
+#define __NR_creat			1030
+#define __NR_link			1031
+#define __NR_unlink			1032
+#define __NR_execve			1033
+#define __NR_chdir			1034
+#define __NR_fchdir			1035
+#define __NR_utimes			1036
+#define __NR_mknod			1037
+#define __NR_chmod			1038
+#define __NR_chown			1039
+#define __NR_lseek			1040
+#define __NR_getpid			1041
+#define __NR_getppid			1042
+#define __NR_mount			1043
+#define __NR_umount			1044
+#define __NR_setuid			1045
+#define __NR_getuid			1046
+#define __NR_geteuid			1047
+#define __NR_ptrace			1048
+#define __NR_access			1049
+#define __NR_sync			1050
+#define __NR_fsync			1051
+#define __NR_fdatasync			1052
+#define __NR_kill			1053
+#define __NR_rename			1054
+#define __NR_mkdir			1055
+#define __NR_rmdir			1056
+#define __NR_dup			1057
+#define __NR_pipe			1058
+#define __NR_times			1059
+#define __NR_brk			1060
+#define __NR_setgid			1061
+#define __NR_getgid			1062
+#define __NR_getegid			1063
+#define __NR_acct			1064
+#define __NR_ioctl			1065
+#define __NR_fcntl			1066
+#define __NR_umask			1067
+#define __NR_chroot			1068
+#define __NR_ustat			1069
+#define __NR_dup2			1070
+#define __NR_setreuid			1071
+#define __NR_setregid			1072
+#define __NR_getresuid			1073
+#define __NR_setresuid			1074
+#define __NR_getresgid			1075
+#define __NR_setresgid			1076
+#define __NR_getgroups			1077
+#define __NR_setgroups			1078
+#define __NR_getpgid			1079
+#define __NR_setpgid			1080
+#define __NR_setsid			1081
+#define __NR_getsid			1082
+#define __NR_sethostname		1083
+#define __NR_setrlimit			1084
+#define __NR_getrlimit			1085
+#define __NR_getrusage			1086
+#define __NR_gettimeofday		1087
+#define __NR_settimeofday		1088
+#define __NR_select			1089
+#define __NR_poll			1090
+#define __NR_symlink			1091
+#define __NR_readlink			1092
+#define __NR_uselib			1093
+#define __NR_swapon			1094
+#define __NR_swapoff			1095
+#define __NR_reboot			1096
+#define __NR_truncate			1097
+#define __NR_ftruncate			1098
+#define __NR_fchmod			1099
+#define __NR_fchown			1100
+#define __NR_getpriority		1101
+#define __NR_setpriority		1102
+#define __NR_statfs			1103
+#define __NR_fstatfs			1104
+#define __NR_gettid			1105
+#define __NR_semget			1106
+#define __NR_semop			1107
+#define __NR_semctl			1108
+#define __NR_msgget			1109
+#define __NR_msgsnd			1110
+#define __NR_msgrcv			1111
+#define __NR_msgctl			1112
+#define __NR_shmget			1113
+#define __NR_shmat			1114
+#define __NR_shmdt			1115
+#define __NR_shmctl			1116
+/* also known as klogctl() in GNU libc: */
+#define __NR_syslog			1117
+#define __NR_setitimer			1118
+#define __NR_getitimer			1119
+/* 1120 was __NR_old_stat */
+/* 1121 was __NR_old_lstat */
+/* 1122 was __NR_old_fstat */
+#define __NR_vhangup			1123
+#define __NR_lchown			1124
+#define __NR_remap_file_pages		1125
+#define __NR_wait4			1126
+#define __NR_sysinfo			1127
+#define __NR_clone			1128
+#define __NR_setdomainname		1129
+#define __NR_uname			1130
+#define __NR_adjtimex			1131
+/* 1132 was __NR_create_module */
+#define __NR_init_module		1133
+#define __NR_delete_module		1134
+/* 1135 was __NR_get_kernel_syms */
+/* 1136 was __NR_query_module */
+#define __NR_quotactl			1137
+#define __NR_bdflush			1138
+#define __NR_sysfs			1139
+#define __NR_personality		1140
+#define __NR_afs_syscall		1141
+#define __NR_setfsuid			1142
+#define __NR_setfsgid			1143
+#define __NR_getdents			1144
+#define __NR_flock			1145
+#define __NR_readv			1146
+#define __NR_writev			1147
+#define __NR_pread64			1148
+#define __NR_pwrite64			1149
+#define __NR__sysctl			1150
+#define __NR_mmap			1151
+#define __NR_munmap			1152
+#define __NR_mlock			1153
+#define __NR_mlockall			1154
+#define __NR_mprotect			1155
+#define __NR_mremap			1156
+#define __NR_msync			1157
+#define __NR_munlock			1158
+#define __NR_munlockall			1159
+#define __NR_sched_getparam		1160
+#define __NR_sched_setparam		1161
+#define __NR_sched_getscheduler		1162
+#define __NR_sched_setscheduler		1163
+#define __NR_sched_yield		1164
+#define __NR_sched_get_priority_max	1165
+#define __NR_sched_get_priority_min	1166
+#define __NR_sched_rr_get_interval	1167
+#define __NR_nanosleep			1168
+#define __NR_nfsservctl			1169
+#define __NR_prctl			1170
+/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */
+#define __NR_mmap2			1172
+#define __NR_pciconfig_read		1173
+#define __NR_pciconfig_write		1174
+#define __NR_perfmonctl			1175
+#define __NR_sigaltstack		1176
+#define __NR_rt_sigaction		1177
+#define __NR_rt_sigpending		1178
+#define __NR_rt_sigprocmask		1179
+#define __NR_rt_sigqueueinfo		1180
+#define __NR_rt_sigreturn		1181
+#define __NR_rt_sigsuspend		1182
+#define __NR_rt_sigtimedwait		1183
+#define __NR_getcwd			1184
+#define __NR_capget			1185
+#define __NR_capset			1186
+#define __NR_sendfile			1187
+#define __NR_getpmsg			1188
+#define __NR_putpmsg			1189
+#define __NR_socket			1190
+#define __NR_bind			1191
+#define __NR_connect			1192
+#define __NR_listen			1193
+#define __NR_accept			1194
+#define __NR_getsockname		1195
+#define __NR_getpeername		1196
+#define __NR_socketpair			1197
+#define __NR_send			1198
+#define __NR_sendto			1199
+#define __NR_recv			1200
+#define __NR_recvfrom			1201
+#define __NR_shutdown			1202
+#define __NR_setsockopt			1203
+#define __NR_getsockopt			1204
+#define __NR_sendmsg			1205
+#define __NR_recvmsg			1206
+#define __NR_pivot_root			1207
+#define __NR_mincore			1208
+#define __NR_madvise			1209
+#define __NR_stat			1210
+#define __NR_lstat			1211
+#define __NR_fstat			1212
+#define __NR_clone2			1213
+#define __NR_getdents64			1214
+#define __NR_getunwind			1215
+#define __NR_readahead			1216
+#define __NR_setxattr			1217
+#define __NR_lsetxattr			1218
+#define __NR_fsetxattr			1219
+#define __NR_getxattr			1220
+#define __NR_lgetxattr			1221
+#define __NR_fgetxattr			1222
+#define __NR_listxattr			1223
+#define __NR_llistxattr			1224
+#define __NR_flistxattr			1225
+#define __NR_removexattr		1226
+#define __NR_lremovexattr		1227
+#define __NR_fremovexattr		1228
+#define __NR_tkill			1229
+#define __NR_futex			1230
+#define __NR_sched_setaffinity		1231
+#define __NR_sched_getaffinity		1232
+#define __NR_set_tid_address		1233
+#define __NR_fadvise64			1234
+#define __NR_tgkill			1235
+#define __NR_exit_group			1236
+#define __NR_lookup_dcookie		1237
+#define __NR_io_setup			1238
+#define __NR_io_destroy			1239
+#define __NR_io_getevents		1240
+#define __NR_io_submit			1241
+#define __NR_io_cancel			1242
+#define __NR_epoll_create		1243
+#define __NR_epoll_ctl			1244
+#define __NR_epoll_wait			1245
+#define __NR_restart_syscall		1246
+#define __NR_semtimedop			1247
+#define __NR_timer_create		1248
+#define __NR_timer_settime		1249
+#define __NR_timer_gettime		1250
+#define __NR_timer_getoverrun		1251
+#define __NR_timer_delete		1252
+#define __NR_clock_settime		1253
+#define __NR_clock_gettime		1254
+#define __NR_clock_getres		1255
+#define __NR_clock_nanosleep		1256
+#define __NR_fstatfs64			1257
+#define __NR_statfs64			1258
+#define __NR_mbind			1259
+#define __NR_get_mempolicy		1260
+#define __NR_set_mempolicy		1261
+#define __NR_mq_open			1262
+#define __NR_mq_unlink			1263
+#define __NR_mq_timedsend		1264
+#define __NR_mq_timedreceive		1265
+#define __NR_mq_notify			1266
+#define __NR_mq_getsetattr		1267
+#define __NR_kexec_load			1268
+#define __NR_vserver			1269
+#define __NR_waitid			1270
+#define __NR_add_key			1271
+#define __NR_request_key		1272
+#define __NR_keyctl			1273
+#define __NR_ioprio_set			1274
+#define __NR_ioprio_get			1275
+#define __NR_move_pages			1276
+#define __NR_inotify_init		1277
+#define __NR_inotify_add_watch		1278
+#define __NR_inotify_rm_watch		1279
+#define __NR_migrate_pages		1280
+#define __NR_openat			1281
+#define __NR_mkdirat			1282
+#define __NR_mknodat			1283
+#define __NR_fchownat			1284
+#define __NR_futimesat			1285
+#define __NR_newfstatat			1286
+#define __NR_unlinkat			1287
+#define __NR_renameat			1288
+#define __NR_linkat			1289
+#define __NR_symlinkat			1290
+#define __NR_readlinkat			1291
+#define __NR_fchmodat			1292
+#define __NR_faccessat			1293
+#define __NR_pselect6			1294
+#define __NR_ppoll			1295
+#define __NR_unshare			1296
+#define __NR_splice			1297
+#define __NR_set_robust_list		1298
+#define __NR_get_robust_list		1299
+#define __NR_sync_file_range		1300
+#define __NR_tee			1301
+#define __NR_vmsplice			1302
+#define __NR_fallocate			1303
+#define __NR_getcpu			1304
+#define __NR_epoll_pwait		1305
+#define __NR_utimensat			1306
+#define __NR_signalfd			1307
+#define __NR_timerfd			1308
+#define __NR_eventfd			1309
+#define __NR_timerfd_create		1310
+#define __NR_timerfd_settime		1311
+#define __NR_timerfd_gettime		1312
+#define __NR_signalfd4			1313
+#define __NR_eventfd2			1314
+#define __NR_epoll_create1		1315
+#define __NR_dup3			1316
+#define __NR_pipe2			1317
+#define __NR_inotify_init1		1318
+#define __NR_preadv			1319
+#define __NR_pwritev			1320
+#define __NR_rt_tgsigqueueinfo		1321
+#define __NR_recvmmsg			1322
+#define __NR_fanotify_init		1323
+#define __NR_fanotify_mark		1324
+#define __NR_prlimit64			1325
+#define __NR_name_to_handle_at		1326
+#define __NR_open_by_handle_at  	1327
+#define __NR_clock_adjtime		1328
+#define __NR_syncfs			1329
+#define __NR_setns			1330
+#define __NR_sendmmsg			1331
+#define __NR_process_vm_readv		1332
+#define __NR_process_vm_writev		1333
+#define __NR_accept4			1334
+
+#endif /* _UAPI_ASM_IA64_UNISTD_H */
diff --git a/arch/ia64/include/uapi/asm/ustack.h b/arch/ia64/include/uapi/asm/ustack.h
new file mode 100644
index 00000000000..1dfebc62269
--- /dev/null
+++ b/arch/ia64/include/uapi/asm/ustack.h
@@ -0,0 +1,12 @@
+#ifndef _UAPI_ASM_IA64_USTACK_H
+#define _UAPI_ASM_IA64_USTACK_H
+
+/*
+ * Constants for the user stack size
+ */
+
+
+/* Make a default stack size of 2GiB */
+#define DEFAULT_USER_STACK_SIZE	(1UL << 31)
+
+#endif /* _UAPI_ASM_IA64_USTACK_H */
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index f388b4e18a3..ea39eba61ef 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -2307,7 +2307,7 @@ pfm_smpl_buffer_alloc(struct task_struct *task, struct file *filp, pfm_context_t
 	 */
 	vma->vm_mm	     = mm;
 	vma->vm_file	     = get_file(filp);
-	vma->vm_flags	     = VM_READ| VM_MAYREAD |VM_RESERVED;
+	vma->vm_flags	     = VM_READ|VM_MAYREAD|VM_DONTEXPAND|VM_DONTDUMP;
 	vma->vm_page_prot    = PAGE_READONLY; /* XXX may need to change */
 
 	/*
diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c
index ee31fe9b310..35e106f2ed1 100644
--- a/arch/ia64/kernel/process.c
+++ b/arch/ia64/kernel/process.c
@@ -614,14 +614,14 @@ sys_execve (const char __user *filename,
 	    const char __user *const __user *envp,
 	    struct pt_regs *regs)
 {
-	char *fname;
+	struct filename *fname;
 	int error;
 
 	fname = getname(filename);
 	error = PTR_ERR(fname);
 	if (IS_ERR(fname))
 		goto out;
-	error = do_execve(fname, argv, envp, regs);
+	error = do_execve(fname->name, argv, envp, regs);
 	putname(fname);
 out:
 	return error;
diff --git a/arch/ia64/kernel/signal.c b/arch/ia64/kernel/signal.c
index 37dd79511cb..680b73786be 100644
--- a/arch/ia64/kernel/signal.c
+++ b/arch/ia64/kernel/signal.c
@@ -438,14 +438,6 @@ ia64_do_signal (struct sigscratch *scr, long in_syscall)
 	long errno = scr->pt.r8;
 
 	/*
-	 * In the ia64_leave_kernel code path, we want the common case to go fast, which
-	 * is why we may in certain cases get here from kernel mode. Just return without
-	 * doing anything if so.
-	 */
-	if (!user_mode(&scr->pt))
-		return;
-
-	/*
 	 * This only loops in the rare cases of handle_signal() failing, in which case we
 	 * need to push through a forced SIGSEGV.
 	 */
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index 80ff9acc5ed..f6388216080 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -19,7 +19,7 @@
 #include <linux/interrupt.h>
 #include <linux/efi.h>
 #include <linux/timex.h>
-#include <linux/clocksource.h>
+#include <linux/timekeeper_internal.h>
 #include <linux/platform_device.h>
 
 #include <asm/machvec.h>
@@ -454,7 +454,7 @@ void update_vsyscall_tz(void)
 {
 }
 
-void update_vsyscall(struct timespec *wall, struct timespec *wtm,
+void update_vsyscall_old(struct timespec *wall, struct timespec *wtm,
 			struct clocksource *c, u32 mult)
 {
 	write_seqcount_begin(&fsyscall_gtod_data.seq);
diff --git a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c
index 8443daf4f51..6cf0341f978 100644
--- a/arch/ia64/mm/fault.c
+++ b/arch/ia64/mm/fault.c
@@ -184,6 +184,7 @@ retry:
 			current->min_flt++;
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			 /* No need to up_read(&mm->mmap_sem) as we would
 			 * have already released it in __lock_page_or_retry
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
index 0eab454867a..acd5b68e887 100644
--- a/arch/ia64/mm/init.c
+++ b/arch/ia64/mm/init.c
@@ -138,7 +138,8 @@ ia64_init_addr_space (void)
 			vma->vm_mm = current->mm;
 			vma->vm_end = PAGE_SIZE;
 			vma->vm_page_prot = __pgprot(pgprot_val(PAGE_READONLY) | _PAGE_MA_NAT);
-			vma->vm_flags = VM_READ | VM_MAYREAD | VM_IO | VM_RESERVED;
+			vma->vm_flags = VM_READ | VM_MAYREAD | VM_IO |
+					VM_DONTEXPAND | VM_DONTDUMP;
 			down_write(&current->mm->mmap_sem);
 			if (insert_vm_struct(current->mm, vma)) {
 				up_write(&current->mm->mmap_sem);
@@ -636,6 +637,7 @@ mem_init (void)
 
 	high_memory = __va(max_low_pfn * PAGE_SIZE);
 
+	reset_zone_present_pages();
 	for_each_online_pgdat(pgdat)
 		if (pgdat->bdata->node_bootmem_map)
 			totalram_pages += free_all_bootmem_node(pgdat);
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index 49498bbb961..f807721e19a 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -8,11 +8,13 @@ config M32R
 	select HAVE_KERNEL_BZIP2
 	select HAVE_KERNEL_LZMA
 	select ARCH_WANT_IPC_PARSE_VERSION
+	select HAVE_DEBUG_BUGVERBOSE
 	select HAVE_GENERIC_HARDIRQS
 	select GENERIC_IRQ_PROBE
 	select GENERIC_IRQ_SHOW
 	select GENERIC_ATOMIC64
 	select ARCH_USES_GETTIMEOFFSET
+	select MODULES_USE_ELF_RELA
 
 config SBUS
 	bool
diff --git a/arch/m32r/include/asm/Kbuild b/arch/m32r/include/asm/Kbuild
index c68e1680da0..50bbf387b2f 100644
--- a/arch/m32r/include/asm/Kbuild
+++ b/arch/m32r/include/asm/Kbuild
@@ -1 +1,5 @@
 include include/asm-generic/Kbuild.asm
+
+generic-y += clkdev.h
+generic-y += exec.h
+generic-y += module.h
diff --git a/arch/m32r/include/asm/exec.h b/arch/m32r/include/asm/exec.h
deleted file mode 100644
index c805dbd75b5..00000000000
--- a/arch/m32r/include/asm/exec.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001  Hiroyuki Kondo, Hirokazu Takata, and Hitoshi Yamamoto
- * Copyright (C) 2004, 2006  Hirokazu Takata <takata at linux-m32r.org>
- */
-#ifndef _ASM_M32R_EXEC_H
-#define _ASM_M32R_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* _ASM_M32R_EXEC_H */
diff --git a/arch/m32r/include/asm/module.h b/arch/m32r/include/asm/module.h
deleted file mode 100644
index eb73ee01121..00000000000
--- a/arch/m32r/include/asm/module.h
+++ /dev/null
@@ -1,10 +0,0 @@
-#ifndef _ASM_M32R_MODULE_H
-#define _ASM_M32R_MODULE_H
-
-struct mod_arch_specific { };
-
-#define Elf_Shdr	Elf32_Shdr
-#define Elf_Sym		Elf32_Sym
-#define Elf_Ehdr	Elf32_Ehdr
-
-#endif /* _ASM_M32R_MODULE_H */
diff --git a/arch/m32r/include/asm/thread_info.h b/arch/m32r/include/asm/thread_info.h
index c083f6073ef..c074f4c2e85 100644
--- a/arch/m32r/include/asm/thread_info.h
+++ b/arch/m32r/include/asm/thread_info.h
@@ -119,25 +119,20 @@ static inline unsigned int get_thread_fault_code(void)
 #define TIF_SIGPENDING		1	/* signal pending */
 #define TIF_NEED_RESCHED	2	/* rescheduling necessary */
 #define TIF_SINGLESTEP		3	/* restore singlestep on return to user mode */
-#define TIF_IRET		4	/* return with iret */
 #define TIF_NOTIFY_RESUME	5	/* callback before returning to user */
 #define TIF_RESTORE_SIGMASK	8	/* restore signal mask in do_signal() */
 #define TIF_USEDFPU		16	/* FPU was used by this task this quantum (SMP) */
-#define TIF_POLLING_NRFLAG	17	/* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE		18	/* is terminating due to OOM killer */
 
 #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
 #define _TIF_SINGLESTEP		(1<<TIF_SINGLESTEP)
-#define _TIF_IRET		(1<<TIF_IRET)
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
 #define _TIF_USEDFPU		(1<<TIF_USEDFPU)
-#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
 
-#define _TIF_WORK_MASK		0x0000FFFE	/* work to do on interrupt/exception return */
-#define _TIF_ALLWORK_MASK	0x0000FFFF	/* work to do on any return to u-space */
+#define _TIF_WORK_MASK		(_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME)
+#define _TIF_ALLWORK_MASK	(_TIF_WORK_MASK | _TIF_SYSCALL_TRACE)
 
 /*
  * Thread-synchronous status.
diff --git a/arch/m32r/kernel/module.c b/arch/m32r/kernel/module.c
index 3071fe83ffc..38233b6596b 100644
--- a/arch/m32r/kernel/module.c
+++ b/arch/m32r/kernel/module.c
@@ -201,18 +201,3 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
 	}
 	return 0;
 }
-
-int apply_relocate(Elf32_Shdr *sechdrs,
-		       const char *strtab,
-		       unsigned int symindex,
-		       unsigned int relsec,
-		       struct module *me)
-{
-#if 0
-	printk(KERN_ERR "module %s: REL RELOCATION unsupported\n",
-	       me->name);
-	return -ENOEXEC;
-#endif
-	return 0;
-
-}
diff --git a/arch/m32r/kernel/process.c b/arch/m32r/kernel/process.c
index 384e63f3a4c..e7366276ef3 100644
--- a/arch/m32r/kernel/process.c
+++ b/arch/m32r/kernel/process.c
@@ -296,14 +296,14 @@ asmlinkage int sys_execve(const char __user *ufilename,
 			  unsigned long r6, struct pt_regs regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname(ufilename);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
 
-	error = do_execve(filename, uargv, uenvp, &regs);
+	error = do_execve(filename->name, uargv, uenvp, &regs);
 	putname(filename);
 out:
 	return error;
diff --git a/arch/m32r/kernel/signal.c b/arch/m32r/kernel/signal.c
index d0f60b97bbc..6e3c26a1607 100644
--- a/arch/m32r/kernel/signal.c
+++ b/arch/m32r/kernel/signal.c
@@ -20,7 +20,6 @@
 #include <linux/unistd.h>
 #include <linux/stddef.h>
 #include <linux/personality.h>
-#include <linux/freezer.h>
 #include <linux/tracehook.h>
 #include <asm/cacheflush.h>
 #include <asm/ucontext.h>
@@ -366,6 +365,4 @@ void do_notify_resume(struct pt_regs *regs, __u32 thread_info_flags)
 		clear_thread_flag(TIF_NOTIFY_RESUME);
 		tracehook_notify_resume(regs);
 	}
-
-	clear_thread_flag(TIF_IRET);
 }
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index b22df9410dc..e7c161433ea 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -3,9 +3,11 @@ config M68K
 	default y
 	select HAVE_IDE
 	select HAVE_AOUT if MMU
+	select HAVE_DEBUG_BUGVERBOSE
 	select HAVE_GENERIC_HARDIRQS
 	select GENERIC_IRQ_SHOW
 	select GENERIC_ATOMIC64
+	select HAVE_UID16
 	select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
 	select GENERIC_CPU_DEVICES
 	select GENERIC_STRNCPY_FROM_USER if MMU
@@ -13,6 +15,10 @@ config M68K
 	select FPU if MMU
 	select ARCH_WANT_IPC_PARSE_VERSION
 	select ARCH_USES_GETTIMEOFFSET if MMU && !COLDFIRE
+	select GENERIC_KERNEL_THREAD
+	select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_REL
+	select MODULES_USE_ELF_RELA
 
 config RWSEM_GENERIC_SPINLOCK
 	bool
diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild
index a74e5d95c38..ecb540810ab 100644
--- a/arch/m68k/include/asm/Kbuild
+++ b/arch/m68k/include/asm/Kbuild
@@ -2,10 +2,12 @@ include include/asm-generic/Kbuild.asm
 header-y += cachectl.h
 
 generic-y += bitsperlong.h
+generic-y += clkdev.h
 generic-y += cputime.h
 generic-y += device.h
 generic-y += emergency-restart.h
 generic-y += errno.h
+generic-y += exec.h
 generic-y += futex.h
 generic-y += ioctl.h
 generic-y += ipcbuf.h
diff --git a/arch/m68k/include/asm/exec.h b/arch/m68k/include/asm/exec.h
deleted file mode 100644
index 0499adf9023..00000000000
--- a/arch/m68k/include/asm/exec.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _M68K_EXEC_H
-#define _M68K_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* _M68K_EXEC_H */
diff --git a/arch/m68k/include/asm/module.h b/arch/m68k/include/asm/module.h
index edffe66b7f4..8b58fce843d 100644
--- a/arch/m68k/include/asm/module.h
+++ b/arch/m68k/include/asm/module.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_M68K_MODULE_H
 #define _ASM_M68K_MODULE_H
 
+#include <asm-generic/module.h>
+
 enum m68k_fixup_type {
 	m68k_fixup_memoffset,
 	m68k_fixup_vnode_shift,
@@ -36,8 +38,4 @@ struct module;
 extern void module_fixup(struct module *mod, struct m68k_fixup_info *start,
 			 struct m68k_fixup_info *end);
 
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
-
 #endif /* _ASM_M68K_MODULE_H */
diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h
index f17c42aff7f..ae700f49e51 100644
--- a/arch/m68k/include/asm/processor.h
+++ b/arch/m68k/include/asm/processor.h
@@ -100,6 +100,16 @@ struct thread_struct {
 	.fs	= __KERNEL_DS,						\
 }
 
+/*
+ * ColdFire stack format sbould be 0x4 for an aligned usp (will always be
+ * true on thread creation). We need to set this explicitly.
+ */
+#ifdef CONFIG_COLDFIRE
+#define setframeformat(_regs)	do { (_regs)->format = 0x4; } while(0)
+#else
+#define setframeformat(_regs)	do { } while (0)
+#endif
+
 #ifdef CONFIG_MMU
 /*
  * Do necessary setup to start up a newly executed thread.
@@ -109,6 +119,7 @@ static inline void start_thread(struct pt_regs * regs, unsigned long pc,
 {
 	regs->pc = pc;
 	regs->sr &= ~0x2000;
+	setframeformat(regs);
 	wrusp(usp);
 }
 
@@ -116,21 +127,11 @@ extern int handle_kernel_fault(struct pt_regs *regs);
 
 #else
 
-/*
- * Coldfire stacks need to be re-aligned on trap exit, conventional
- * 68k can handle this case cleanly.
- */
-#ifdef CONFIG_COLDFIRE
-#define reformat(_regs)		do { (_regs)->format = 0x4; } while(0)
-#else
-#define reformat(_regs)		do { } while (0)
-#endif
-
 #define start_thread(_regs, _pc, _usp)                  \
 do {                                                    \
 	(_regs)->pc = (_pc);                            \
 	((struct switch_stack *)(_regs))[-1].a6 = 0;    \
-	reformat(_regs);                                \
+	setframeformat(_regs);                          \
 	if (current->mm)                                \
 		(_regs)->d5 = current->mm->start_data;  \
 	(_regs)->sr &= ~0x2000;                         \
@@ -153,8 +154,6 @@ static inline void release_thread(struct task_struct *dead_task)
 {
 }
 
-extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-
 /*
  * Free current thread data structures etc..
  */
diff --git a/arch/m68k/include/asm/ptrace.h b/arch/m68k/include/asm/ptrace.h
index 65322b17b6c..5e08b597f01 100644
--- a/arch/m68k/include/asm/ptrace.h
+++ b/arch/m68k/include/asm/ptrace.h
@@ -85,6 +85,8 @@ struct switch_stack {
 #define user_mode(regs) (!((regs)->sr & PS_S))
 #define instruction_pointer(regs) ((regs)->pc)
 #define profile_pc(regs) instruction_pointer(regs)
+#define current_pt_regs() \
+	(struct pt_regs *)((char *)current_thread_info() + THREAD_SIZE) - 1
 
 #define arch_has_single_step()	(1)
 
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 045cfd6a9e3..c702ad71679 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -382,6 +382,8 @@
 #define __ARCH_WANT_SYS_SIGPROCMASK
 #define __ARCH_WANT_SYS_RT_SIGACTION
 #define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_SYS_EXECVE
+#define __ARCH_WANT_KERNEL_EXECVE
 
 /*
  * "Conditional" syscalls
diff --git a/arch/m68k/kernel/entry.S b/arch/m68k/kernel/entry.S
index 165ee9f9d5c..946cb018775 100644
--- a/arch/m68k/kernel/entry.S
+++ b/arch/m68k/kernel/entry.S
@@ -111,6 +111,22 @@ ENTRY(ret_from_fork)
 	addql	#4,%sp
 	jra	ret_from_exception
 
+ENTRY(ret_from_kernel_thread)
+	| a3 contains the kernel thread payload, d7 - its argument
+	movel	%d1,%sp@-
+	jsr	schedule_tail
+	GET_CURRENT(%d0)
+	movel	%d7,(%sp)
+	jsr	%a3@
+	addql	#4,%sp
+	movel	%d0,(%sp)
+	jra	sys_exit
+
+ENTRY(ret_from_kernel_execve)
+	movel	4(%sp), %sp
+	GET_CURRENT(%d0)
+	jra	ret_from_exception
+
 #if defined(CONFIG_COLDFIRE) || !defined(CONFIG_MMU)
 
 #ifdef TRAP_DBG_INTERRUPT
diff --git a/arch/m68k/kernel/process.c b/arch/m68k/kernel/process.c
index ac2892e49c7..c51bb172e14 100644
--- a/arch/m68k/kernel/process.c
+++ b/arch/m68k/kernel/process.c
@@ -35,6 +35,7 @@
 
 
 asmlinkage void ret_from_fork(void);
+asmlinkage void ret_from_kernel_thread(void);
 
 
 /*
@@ -123,51 +124,6 @@ void show_regs(struct pt_regs * regs)
 		printk("USP: %08lx\n", rdusp());
 }
 
-/*
- * Create a kernel thread
- */
-int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
-{
-	int pid;
-	mm_segment_t fs;
-
-	fs = get_fs();
-	set_fs (KERNEL_DS);
-
-	{
-	register long retval __asm__ ("d0");
-	register long clone_arg __asm__ ("d1") = flags | CLONE_VM | CLONE_UNTRACED;
-
-	retval = __NR_clone;
-	__asm__ __volatile__
-	  ("clrl %%d2\n\t"
-	   "trap #0\n\t"		/* Linux/m68k system call */
-	   "tstl %0\n\t"		/* child or parent */
-	   "jne 1f\n\t"			/* parent - jump */
-#ifdef CONFIG_MMU
-	   "lea %%sp@(%c7),%6\n\t"	/* reload current */
-	   "movel %6@,%6\n\t"
-#endif
-	   "movel %3,%%sp@-\n\t"	/* push argument */
-	   "jsr %4@\n\t"		/* call fn */
-	   "movel %0,%%d1\n\t"		/* pass exit value */
-	   "movel %2,%%d0\n\t"		/* exit */
-	   "trap #0\n"
-	   "1:"
-	   : "+d" (retval)
-	   : "i" (__NR_clone), "i" (__NR_exit),
-	     "r" (arg), "a" (fn), "d" (clone_arg), "r" (current),
-	     "i" (-THREAD_SIZE)
-	   : "d2");
-
-	pid = retval;
-	}
-
-	set_fs (fs);
-	return pid;
-}
-EXPORT_SYMBOL(kernel_thread);
-
 void flush_thread(void)
 {
 	current->thread.fs = __USER_DS;
@@ -219,30 +175,18 @@ asmlinkage int m68k_clone(struct pt_regs *regs)
 }
 
 int copy_thread(unsigned long clone_flags, unsigned long usp,
-		 unsigned long unused,
+		 unsigned long arg,
 		 struct task_struct * p, struct pt_regs * regs)
 {
 	struct pt_regs * childregs;
-	struct switch_stack * childstack, *stack;
-	unsigned long *retp;
+	struct switch_stack *childstack;
 
 	childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
-
-	*childregs = *regs;
-	childregs->d0 = 0;
-
-	retp = ((unsigned long *) regs);
-	stack = ((struct switch_stack *) retp) - 1;
-
 	childstack = ((struct switch_stack *) childregs) - 1;
-	*childstack = *stack;
-	childstack->retpc = (unsigned long)ret_from_fork;
 
 	p->thread.usp = usp;
 	p->thread.ksp = (unsigned long)childstack;
-
-	if (clone_flags & CLONE_SETTLS)
-		task_thread_info(p)->tp_value = regs->d5;
+	p->thread.esp0 = (unsigned long)childregs;
 
 	/*
 	 * Must save the current SFC/DFC value, NOT the value when
@@ -250,6 +194,26 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 	 */
 	p->thread.fs = get_fs().seg;
 
+	if (unlikely(!regs)) {
+		/* kernel thread */
+		memset(childstack, 0,
+			sizeof(struct switch_stack) + sizeof(struct pt_regs));
+		childregs->sr = PS_S;
+		childstack->a3 = usp; /* function */
+		childstack->d7 = arg;
+		childstack->retpc = (unsigned long)ret_from_kernel_thread;
+		p->thread.usp = 0;
+		return 0;
+	}
+	*childregs = *regs;
+	childregs->d0 = 0;
+
+	*childstack = ((struct switch_stack *) regs)[-1];
+	childstack->retpc = (unsigned long)ret_from_fork;
+
+	if (clone_flags & CLONE_SETTLS)
+		task_thread_info(p)->tp_value = regs->d5;
+
 #ifdef CONFIG_FPU
 	if (!FPU_IS_EMU) {
 		/* Copy the current fpu state */
@@ -337,26 +301,6 @@ int dump_fpu (struct pt_regs *regs, struct user_m68kfp_struct *fpu)
 EXPORT_SYMBOL(dump_fpu);
 #endif /* CONFIG_FPU */
 
-/*
- * sys_execve() executes a new program.
- */
-asmlinkage int sys_execve(const char __user *name,
-			  const char __user *const __user *argv,
-			  const char __user *const __user *envp)
-{
-	int error;
-	char * filename;
-	struct pt_regs *regs = (struct pt_regs *) &name;
-
-	filename = getname(name);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		return error;
-	error = do_execve(filename, argv, envp, regs);
-	putname(filename);
-	return error;
-}
-
 unsigned long get_wchan(struct task_struct *p)
 {
 	unsigned long fp, pc;
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index 9a5932ec368..3a480b3df0d 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -549,23 +549,6 @@ asmlinkage int sys_getpagesize(void)
 	return PAGE_SIZE;
 }
 
-/*
- * Do a system call from kernel instead of calling sys_execve so we
- * end up with proper pt_regs.
- */
-int kernel_execve(const char *filename,
-		  const char *const argv[],
-		  const char *const envp[])
-{
-	register long __res asm ("%d0") = __NR_execve;
-	register long __a asm ("%d1") = (long)(filename);
-	register long __b asm ("%d2") = (long)(argv);
-	register long __c asm ("%d3") = (long)(envp);
-	asm volatile ("trap  #0" : "+d" (__res)
-			: "d" (__a), "d" (__b), "d" (__c));
-	return __res;
-}
-
 asmlinkage unsigned long sys_get_thread_area(void)
 {
 	return current_thread_info()->tp_value;
diff --git a/arch/m68k/mm/fault.c b/arch/m68k/mm/fault.c
index aeebbb7b30f..a563727806b 100644
--- a/arch/m68k/mm/fault.c
+++ b/arch/m68k/mm/fault.c
@@ -170,6 +170,7 @@ good_area:
 			/* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
 			 * of starvation. */
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			/*
 			 * No need to up_read(&mm->mmap_sem) as we would
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 6133bed2b85..4cba7439f9d 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -16,6 +16,7 @@ config MICROBLAZE
 	select OF
 	select OF_EARLY_FLATTREE
 	select ARCH_WANT_IPC_PARSE_VERSION
+	select HAVE_DEBUG_KMEMLEAK
 	select IRQ_DOMAIN
 	select HAVE_GENERIC_HARDIRQS
 	select GENERIC_IRQ_PROBE
@@ -24,6 +25,7 @@ config MICROBLAZE
 	select GENERIC_CPU_DEVICES
 	select GENERIC_ATOMIC64
 	select GENERIC_CLOCKEVENTS
+	select MODULES_USE_ELF_RELA
 
 config SWAP
 	def_bool n
diff --git a/arch/microblaze/include/asm/Kbuild b/arch/microblaze/include/asm/Kbuild
index db5294c30ca..8653072d7e9 100644
--- a/arch/microblaze/include/asm/Kbuild
+++ b/arch/microblaze/include/asm/Kbuild
@@ -1,3 +1,5 @@
 include include/asm-generic/Kbuild.asm
 
 header-y  += elf.h
+generic-y += clkdev.h
+generic-y += exec.h
diff --git a/arch/microblaze/include/asm/atomic.h b/arch/microblaze/include/asm/atomic.h
index 472d8bf726d..42ac382a09d 100644
--- a/arch/microblaze/include/asm/atomic.h
+++ b/arch/microblaze/include/asm/atomic.h
@@ -22,5 +22,6 @@ static inline int atomic_dec_if_positive(atomic_t *v)
 
 	return res;
 }
+#define atomic_dec_if_positive atomic_dec_if_positive
 
 #endif /* _ASM_MICROBLAZE_ATOMIC_H */
diff --git a/arch/microblaze/include/asm/exec.h b/arch/microblaze/include/asm/exec.h
deleted file mode 100644
index e750de1fe8f..00000000000
--- a/arch/microblaze/include/asm/exec.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASM_MICROBLAZE_EXEC_H
-#define _ASM_MICROBLAZE_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* _ASM_MICROBLAZE_EXEC_H */
diff --git a/arch/microblaze/include/asm/thread_info.h b/arch/microblaze/include/asm/thread_info.h
index 6c610234ffa..008f30433d2 100644
--- a/arch/microblaze/include/asm/thread_info.h
+++ b/arch/microblaze/include/asm/thread_info.h
@@ -121,7 +121,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_NEED_RESCHED	3 /* rescheduling necessary */
 /* restore singlestep on return to user mode */
 #define TIF_SINGLESTEP		4
-#define TIF_IRET		5 /* return with iret */
 #define TIF_MEMDIE		6	/* is terminating due to OOM killer */
 #define TIF_SYSCALL_AUDIT	9       /* syscall auditing active */
 #define TIF_SECCOMP		10      /* secure computing */
@@ -134,7 +133,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
 #define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
-#define _TIF_IRET		(1 << TIF_IRET)
 #define _TIF_POLLING_NRFLAG	(1 << TIF_POLLING_NRFLAG)
 #define _TIF_SYSCALL_AUDIT	(1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP		(1 << TIF_SECCOMP)
@@ -184,6 +182,7 @@ static inline bool test_and_clear_restore_sigmask(void)
 	ti->status &= ~TS_RESTORE_SIGMASK;
 	return true;
 }
+#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
 #endif
 
 #endif /* __KERNEL__ */
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
index c1220dbf87c..3847e5b9c60 100644
--- a/arch/microblaze/kernel/signal.c
+++ b/arch/microblaze/kernel/signal.c
@@ -254,10 +254,6 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 
 	set_fs(USER_DS);
 
-	/* the tracer may want to single-step inside the handler */
-	if (test_thread_flag(TIF_SINGLESTEP))
-		ptrace_notify(SIGTRAP);
-
 #ifdef DEBUG_SIG
 	printk(KERN_INFO "SIG deliver (%s:%d): sp=%p pc=%08lx\n",
 		current->comm, current->pid, frame, regs->pc);
@@ -315,7 +311,8 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
 	if (ret)
 		return;
 
-	signal_delivered(sig, info, ka, regs, 0);
+	signal_delivered(sig, info, ka, regs,
+			test_thread_flag(TIF_SINGLESTEP));
 }
 
 /*
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c
index e5b154f24f8..404c0f24bd4 100644
--- a/arch/microblaze/kernel/sys_microblaze.c
+++ b/arch/microblaze/kernel/sys_microblaze.c
@@ -54,13 +54,13 @@ asmlinkage long microblaze_execve(const char __user *filenamei,
 				  struct pt_regs *regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname(filenamei);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = do_execve(filename, argv, envp, regs);
+	error = do_execve(filename->name, argv, envp, regs);
 	putname(filename);
 out:
 	return error;
diff --git a/arch/microblaze/mm/fault.c b/arch/microblaze/mm/fault.c
index eb365d6795f..714b35a9c4f 100644
--- a/arch/microblaze/mm/fault.c
+++ b/arch/microblaze/mm/fault.c
@@ -233,6 +233,7 @@ good_area:
 			current->min_flt++;
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			/*
 			 * No need to up_read(&mm->mmap_sem) as we would
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index d64786d5e2f..91b9d69f465 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -15,8 +15,8 @@ platforms += lantiq
 platforms += lasat
 platforms += loongson
 platforms += loongson1
-platforms += mipssim
 platforms += mti-malta
+platforms += mti-sead3
 platforms += netlogic
 platforms += pmc-sierra
 platforms += pnx833x
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index faf65286574..dba9390d37c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -17,6 +17,7 @@ config MIPS
 	select HAVE_FUNCTION_GRAPH_TRACER
 	select HAVE_KPROBES
 	select HAVE_KRETPROBES
+	select HAVE_DEBUG_KMEMLEAK
 	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
 	select RTC_LIB if !MACH_LOONGSON
 	select GENERIC_ATOMIC64 if !64BIT
@@ -36,6 +37,9 @@ config MIPS
 	select BUILDTIME_EXTABLE_SORT
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_CMOS_UPDATE
+	select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_REL
+	select MODULES_USE_ELF_RELA if 64BIT
 
 menu "Machine selection"
 
@@ -242,6 +246,8 @@ config LANTIQ
 	select HAVE_MACH_CLKDEV
 	select CLKDEV_LOOKUP
 	select USE_OF
+	select PINCTRL
+	select PINCTRL_LANTIQ
 
 config LASAT
 	bool "LASAT Networks platforms"
@@ -320,24 +326,35 @@ config MIPS_MALTA
 	  This enables support for the MIPS Technologies Malta evaluation
 	  board.
 
-config MIPS_SIM
-	bool 'MIPS simulator (MIPSsim)'
+config MIPS_SEAD3
+	bool "MIPS SEAD3 board"
+	select BOOT_ELF32
+	select BOOT_RAW
 	select CEVT_R4K
 	select CSRC_R4K
+	select CPU_MIPSR2_IRQ_VI
+	select CPU_MIPSR2_IRQ_EI
 	select DMA_NONCOHERENT
-	select SYS_HAS_EARLY_PRINTK
 	select IRQ_CPU
-	select BOOT_RAW
+	select IRQ_GIC
+	select MIPS_BOARDS_GEN
+	select MIPS_CPU_SCACHE
+	select MIPS_MSC
 	select SYS_HAS_CPU_MIPS32_R1
 	select SYS_HAS_CPU_MIPS32_R2
+	select SYS_HAS_CPU_MIPS64_R1
 	select SYS_HAS_EARLY_PRINTK
 	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_64BIT_KERNEL
 	select SYS_SUPPORTS_BIG_ENDIAN
-	select SYS_SUPPORTS_MULTITHREADING
 	select SYS_SUPPORTS_LITTLE_ENDIAN
+	select SYS_SUPPORTS_SMARTMIPS
+	select USB_ARCH_HAS_EHCI
+	select USB_EHCI_BIG_ENDIAN_DESC
+	select USB_EHCI_BIG_ENDIAN_MMIO
 	help
-	  This option enables support for MIPS Technologies MIPSsim software
-	  emulator.
+	  This enables support for the MIPS Technologies SEAD3 evaluation
+	  board.
 
 config NEC_MARKEINS
 	bool "NEC EMMA2RH Mark-eins board"
@@ -831,6 +848,7 @@ config NLM_XLP_BOARD
 	select ZONE_DMA if 64BIT
 	select SYNC_R4K
 	select SYS_HAS_EARLY_PRINTK
+	select USE_OF
 	help
 	  This board is based on Netlogic XLP Processor.
 	  Say Y here if you have a XLP based board.
@@ -1749,7 +1767,6 @@ config HARDWARE_WATCHPOINTS
 menu "Kernel type"
 
 choice
-
 	prompt "Kernel code model"
 	help
 	  You should only select this option if you have a workload that
@@ -1880,6 +1897,18 @@ config SIBYTE_DMA_PAGEOPS
 config CPU_HAS_PREFETCH
 	bool
 
+config CPU_GENERIC_DUMP_TLB
+	bool
+	default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
+
+config CPU_R4K_FPU
+	bool
+	default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
+
+config CPU_R4K_CACHE_TLB
+	bool
+	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
+
 choice
 	prompt "MIPS MT options"
 
@@ -1902,6 +1931,7 @@ config MIPS_MT_SMP
 	select SYS_SUPPORTS_SCHED_SMT if SMP
 	select SYS_SUPPORTS_SMP
 	select SMP_UP
+	select MIPS_PERF_SHARED_TC_COUNTERS
 	help
 	  This is a kernel model which is known a VSMP but lately has been
 	  marketesed into SMVP.
@@ -1955,7 +1985,6 @@ config SCHED_SMT
 config SYS_SUPPORTS_SCHED_SMT
 	bool
 
-
 config SYS_SUPPORTS_MULTITHREADING
 	bool
 
@@ -2013,16 +2042,6 @@ config MIPS_VPE_APSP_API
 	depends on MIPS_VPE_LOADER
 	help
 
-config MIPS_APSP_KSPD
-	bool "Enable KSPD"
-	depends on MIPS_VPE_APSP_API
-	default y
-	help
-	  KSPD is a kernel daemon that accepts syscall requests from the SP
-	  side, actions them and returns the results. It also handles the
-	  "exit" syscall notifying other kernel modules the SP program is
-	  exiting.  You probably want to say yes here.
-
 config MIPS_CMP
 	bool "MIPS CMP framework support"
 	depends on SYS_SUPPORTS_MIPS_CMP
@@ -2252,6 +2271,9 @@ config NR_CPUS
 	  performance should round up your number of processors to the next
 	  power of two.
 
+config MIPS_PERF_SHARED_TC_COUNTERS
+	bool
+
 #
 # Timer Interrupt Frequency Configuration
 #
@@ -2360,12 +2382,10 @@ config SECCOMP
 	  If unsure, say Y. Only embedded should say N here.
 
 config USE_OF
-	bool "Flattened Device Tree support"
+	bool
 	select OF
 	select OF_EARLY_FLATTREE
 	select IRQ_DOMAIN
-	help
-	  Include support for flattened device tree machine descriptions.
 
 endmenu
 
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 764e37a9dbb..654b1ad39f0 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -225,7 +225,7 @@ KBUILD_CPPFLAGS += -DDATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)
 LDFLAGS			+= -m $(ld-emul)
 
 ifdef CONFIG_MIPS
-CHECKFLAGS += $(shell $(CC) $(KBUILD_CFLAGS) -dM -E -xc /dev/null | \
+CHECKFLAGS += $(shell $(CC) $(KBUILD_CFLAGS) -dM -E -x c /dev/null | \
 	egrep -vw '__GNUC_(|MINOR_|PATCHLEVEL_)_' | \
 	sed -e "s/^\#define /-D'/" -e "s/ /'='/" -e "s/$$/'/")
 ifdef CONFIG_64BIT
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 0faaab24376..c8862bdc2ff 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -27,7 +27,7 @@ config MIPS_MTX1
 	select SYS_HAS_EARLY_PRINTK
 
 config MIPS_DB1000
-	bool "Alchemy DB1000/DB1500/DB1100 boards"
+	bool "Alchemy DB1000/DB1500/DB1100 PB1500/1100 boards"
 	select ALCHEMY_GPIOINT_AU1000
 	select DMA_NONCOHERENT
 	select HW_HAS_PCI
@@ -36,57 +36,15 @@ config MIPS_DB1000
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 	select SYS_HAS_EARLY_PRINTK
 
-config MIPS_DB1200
-	bool "Alchemy DB1200/PB1200 board"
-	select ALCHEMY_GPIOINT_AU1000
-	select DMA_COHERENT
-	select MIPS_DISABLE_OBSOLETE_IDE
-	select SYS_SUPPORTS_LITTLE_ENDIAN
-	select SYS_HAS_EARLY_PRINTK
-
-config MIPS_DB1300
-	bool "NetLogic DB1300 board"
-	select ALCHEMY_GPIOINT_AU1300
-	select DMA_COHERENT
-	select MIPS_DISABLE_OBSOLETE_IDE
-	select SYS_SUPPORTS_LITTLE_ENDIAN
-	select SYS_HAS_EARLY_PRINTK
-
-config MIPS_DB1550
-	bool "Alchemy DB1550 board"
-	select ALCHEMY_GPIOINT_AU1000
+config MIPS_DB1235
+	bool "Alchemy DB1200/PB1200/DB1300/DB1550/PB1550 boards"
+	select ARCH_REQUIRE_GPIOLIB
 	select HW_HAS_PCI
 	select DMA_COHERENT
 	select MIPS_DISABLE_OBSOLETE_IDE
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 	select SYS_HAS_EARLY_PRINTK
 
-config MIPS_PB1100
-	bool "Alchemy PB1100 board"
-	select ALCHEMY_GPIOINT_AU1000
-	select DMA_NONCOHERENT
-	select HW_HAS_PCI
-	select SWAP_IO_SPACE
-	select SYS_SUPPORTS_LITTLE_ENDIAN
-	select SYS_HAS_EARLY_PRINTK
-
-config MIPS_PB1500
-	bool "Alchemy PB1500 board"
-	select ALCHEMY_GPIOINT_AU1000
-	select DMA_NONCOHERENT
-	select HW_HAS_PCI
-	select SYS_SUPPORTS_LITTLE_ENDIAN
-	select SYS_HAS_EARLY_PRINTK
-
-config MIPS_PB1550
-	bool "Alchemy PB1550 board"
-	select ALCHEMY_GPIOINT_AU1000
-	select DMA_NONCOHERENT
-	select HW_HAS_PCI
-	select MIPS_DISABLE_OBSOLETE_IDE
-	select SYS_SUPPORTS_LITTLE_ENDIAN
-	select SYS_HAS_EARLY_PRINTK
-
 config MIPS_XXS1500
 	bool "MyCable XXS1500 board"
 	select DMA_NONCOHERENT
diff --git a/arch/mips/alchemy/Platform b/arch/mips/alchemy/Platform
index 7956274de15..942c5800a68 100644
--- a/arch/mips/alchemy/Platform
+++ b/arch/mips/alchemy/Platform
@@ -30,25 +30,11 @@ cflags-$(CONFIG_MIPS_DB1000)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00
 load-$(CONFIG_MIPS_DB1000)	+= 0xffffffff80100000
 
 #
-# AMD Alchemy Db1550 eval board
+# AMD Alchemy Db1200/Pb1200/Db1550/Db1300 eval boards
 #
-platform-$(CONFIG_MIPS_DB1550)	+= alchemy/devboards/
-cflags-$(CONFIG_MIPS_DB1550)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00
-load-$(CONFIG_MIPS_DB1550)	+= 0xffffffff80100000
-
-#
-# AMD Alchemy Db1200/Pb1200 eval boards
-#
-platform-$(CONFIG_MIPS_DB1200)	+= alchemy/devboards/
-cflags-$(CONFIG_MIPS_DB1200)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00
-load-$(CONFIG_MIPS_DB1200)	+= 0xffffffff80100000
-
-#
-# NetLogic DBAu1300 development platform
-#
-platform-$(CONFIG_MIPS_DB1300)	+= alchemy/devboards/
-cflags-$(CONFIG_MIPS_DB1300)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00
-load-$(CONFIG_MIPS_DB1300)	+= 0xffffffff80100000
+platform-$(CONFIG_MIPS_DB1235)	+= alchemy/devboards/
+cflags-$(CONFIG_MIPS_DB1235)	+= -I$(srctree)/arch/mips/include/asm/mach-db1x00
+load-$(CONFIG_MIPS_DB1235)	+= 0xffffffff80100000
 
 #
 # 4G-Systems MTX-1 "MeshCube" wireless router
diff --git a/arch/mips/alchemy/devboards/Makefile b/arch/mips/alchemy/devboards/Makefile
index c9e747dd9fc..15bf7306648 100644
--- a/arch/mips/alchemy/devboards/Makefile
+++ b/arch/mips/alchemy/devboards/Makefile
@@ -4,10 +4,5 @@
 
 obj-y += bcsr.o platform.o
 obj-$(CONFIG_PM)		+= pm.o
-obj-$(CONFIG_MIPS_PB1100)	+= pb1100.o
-obj-$(CONFIG_MIPS_PB1500)	+= pb1500.o
-obj-$(CONFIG_MIPS_PB1550)	+= pb1550.o
 obj-$(CONFIG_MIPS_DB1000)	+= db1000.o
-obj-$(CONFIG_MIPS_DB1200)	+= db1200.o
-obj-$(CONFIG_MIPS_DB1300)	+= db1300.o
-obj-$(CONFIG_MIPS_DB1550)	+= db1550.o
+obj-$(CONFIG_MIPS_DB1235)	+= db1235.o db1200.o db1300.o db1550.o
diff --git a/arch/mips/alchemy/devboards/db1000.c b/arch/mips/alchemy/devboards/db1000.c
index 1b81dbf6b80..8187845650f 100644
--- a/arch/mips/alchemy/devboards/db1000.c
+++ b/arch/mips/alchemy/devboards/db1000.c
@@ -1,5 +1,5 @@
 /*
- * DBAu1000/1500/1100 board support
+ * DBAu1000/1500/1100 PBAu1100/1500 board support
  *
  * Copyright 2000, 2008 MontaVista Software Inc.
  * Author: MontaVista Software, Inc. <source@mvista.com>
@@ -52,6 +52,11 @@ static const char *board_type_str(void)
 		return "DB1500";
 	case BCSR_WHOAMI_DB1100:
 		return "DB1100";
+	case BCSR_WHOAMI_PB1500:
+	case BCSR_WHOAMI_PB1500R2:
+		return "PB1500";
+	case BCSR_WHOAMI_PB1100:
+		return "PB1100";
 	default:
 		return "(unknown)";
 	}
@@ -111,7 +116,9 @@ static struct platform_device db1500_pci_host_dev = {
 
 static int __init db1500_pci_init(void)
 {
-	if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1500)
+	int id = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
+	if ((id == BCSR_WHOAMI_DB1500) || (id == BCSR_WHOAMI_PB1500) ||
+	    (id == BCSR_WHOAMI_PB1500R2))
 		return platform_device_register(&db1500_pci_host_dev);
 	return 0;
 }
@@ -199,27 +206,37 @@ static irqreturn_t db1100_mmc_cd(int irq, void *ptr)
 
 static int db1100_mmc_cd_setup(void *mmc_host, int en)
 {
-	int ret = 0;
+	int ret = 0, irq;
+
+	if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
+		irq = AU1100_GPIO19_INT;
+	else
+		irq = AU1100_GPIO14_INT;	/* PB1100 SD0 CD# */
 
 	if (en) {
-		irq_set_irq_type(AU1100_GPIO19_INT, IRQ_TYPE_EDGE_BOTH);
-		ret = request_irq(AU1100_GPIO19_INT, db1100_mmc_cd, 0,
+		irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);
+		ret = request_irq(irq, db1100_mmc_cd, 0,
 				  "sd0_cd", mmc_host);
 	} else
-		free_irq(AU1100_GPIO19_INT, mmc_host);
+		free_irq(irq, mmc_host);
 	return ret;
 }
 
 static int db1100_mmc1_cd_setup(void *mmc_host, int en)
 {
-	int ret = 0;
+	int ret = 0, irq;
+
+	if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
+		irq = AU1100_GPIO20_INT;
+	else
+		irq = AU1100_GPIO15_INT;	/* PB1100 SD1 CD# */
 
 	if (en) {
-		irq_set_irq_type(AU1100_GPIO20_INT, IRQ_TYPE_EDGE_BOTH);
-		ret = request_irq(AU1100_GPIO20_INT, db1100_mmc_cd, 0,
+		irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);
+		ret = request_irq(irq, db1100_mmc_cd, 0,
 				  "sd1_cd", mmc_host);
 	} else
-		free_irq(AU1100_GPIO20_INT, mmc_host);
+		free_irq(irq, mmc_host);
 	return ret;
 }
 
@@ -236,11 +253,18 @@ static int db1100_mmc_card_inserted(void *mmc_host)
 
 static void db1100_mmc_set_power(void *mmc_host, int state)
 {
+	int bit;
+
+	if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
+		bit = BCSR_BOARD_SD0PWR;
+	else
+		bit = BCSR_BOARD_PB1100_SD0PWR;
+
 	if (state) {
-		bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
+		bcsr_mod(BCSR_BOARD, 0, bit);
 		msleep(400);	/* stabilization time */
 	} else
-		bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
+		bcsr_mod(BCSR_BOARD, bit, 0);
 }
 
 static void db1100_mmcled_set(struct led_classdev *led, enum led_brightness b)
@@ -267,11 +291,18 @@ static int db1100_mmc1_card_inserted(void *mmc_host)
 
 static void db1100_mmc1_set_power(void *mmc_host, int state)
 {
+	int bit;
+
+	if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
+		bit = BCSR_BOARD_SD1PWR;
+	else
+		bit = BCSR_BOARD_PB1100_SD1PWR;
+
 	if (state) {
-		bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);
+		bcsr_mod(BCSR_BOARD, 0, bit);
 		msleep(400);	/* stabilization time */
 	} else
-		bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);
+		bcsr_mod(BCSR_BOARD, bit, 0);
 }
 
 static void db1100_mmc1led_set(struct led_classdev *led, enum led_brightness b)
@@ -480,13 +511,12 @@ static struct platform_device *db1100_devs[] = {
 	&db1100_mmc0_dev,
 	&db1100_mmc1_dev,
 	&db1000_irda_dev,
-	&db1100_spi_dev,
 };
 
 static int __init db1000_dev_init(void)
 {
 	int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
-	int c0, c1, d0, d1, s0, s1;
+	int c0, c1, d0, d1, s0, s1, flashsize = 32,  twosocks = 1;
 	unsigned long pfc;
 
 	if (board == BCSR_WHOAMI_DB1500) {
@@ -522,6 +552,7 @@ static int __init db1000_dev_init(void)
 					ARRAY_SIZE(db1100_spi_info));
 
 		platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
+		platform_device_register(&db1100_spi_dev);
 	} else if (board == BCSR_WHOAMI_DB1000) {
 		c0 = AU1000_GPIO2_INT;
 		c1 = AU1000_GPIO5_INT;
@@ -530,15 +561,42 @@ static int __init db1000_dev_init(void)
 		s0 = AU1000_GPIO1_INT;
 		s1 = AU1000_GPIO4_INT;
 		platform_add_devices(db1000_devs, ARRAY_SIZE(db1000_devs));
+	} else if ((board == BCSR_WHOAMI_PB1500) ||
+		   (board == BCSR_WHOAMI_PB1500R2)) {
+		c0 = AU1500_GPIO203_INT;
+		d0 = AU1500_GPIO201_INT;
+		s0 = AU1500_GPIO202_INT;
+		twosocks = 0;
+		flashsize = 64;
+		/* RTC and daughtercard irqs */
+		irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_LOW);
+		irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
+		/* EPSON S1D13806 0x1b000000
+		 * SRAM 1MB/2MB   0x1a000000
+		 * DS1693 RTC	  0x0c000000
+		 */
+	} else if (board == BCSR_WHOAMI_PB1100) {
+		c0 = AU1100_GPIO11_INT;
+		d0 = AU1100_GPIO9_INT;
+		s0 = AU1100_GPIO10_INT;
+		twosocks = 0;
+		flashsize = 64;
+		/* pendown, rtc, daughtercard irqs */
+		irq_set_irq_type(AU1100_GPIO8_INT, IRQ_TYPE_LEVEL_LOW);
+		irq_set_irq_type(AU1100_GPIO12_INT, IRQ_TYPE_LEVEL_LOW);
+		irq_set_irq_type(AU1100_GPIO13_INT, IRQ_TYPE_LEVEL_LOW);
+		/* EPSON S1D13806 0x1b000000
+		 * SRAM 1MB/2MB   0x1a000000
+		 * DiskOnChip	  0x0d000000
+		 * DS1693 RTC	  0x0c000000
+		 */
+		platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
 	} else
 		return 0; /* unknown board, no further dev setup to do */
 
 	irq_set_irq_type(d0, IRQ_TYPE_EDGE_BOTH);
-	irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH);
 	irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW);
-	irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW);
 	irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW);
-	irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW);
 
 	db1x_register_pcmcia_socket(
 		AU1000_PCMCIA_ATTR_PHYS_ADDR,
@@ -549,17 +607,23 @@ static int __init db1000_dev_init(void)
 		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
 		c0, d0,	/*s0*/0, 0, 0);
 
-	db1x_register_pcmcia_socket(
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
-		c1, d1,	/*s1*/0, 0, 1);
+	if (twosocks) {
+		irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH);
+		irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW);
+		irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW);
+
+		db1x_register_pcmcia_socket(
+			AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
+			AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
+			AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
+			AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
+			AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
+			AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
+			c1, d1,	/*s1*/0, 0, 1);
+	}
 
 	platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs));
-	db1x_register_norflash(32 << 20, 4 /* 32bit */, F_SWAPPED);
+	db1x_register_norflash(flashsize << 20, 4 /* 32bit */, F_SWAPPED);
 	return 0;
 }
 device_initcall(db1000_dev_init);
diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c
index bf2248474fa..299b7d202be 100644
--- a/arch/mips/alchemy/devboards/db1200.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -45,25 +45,9 @@
 
 #include "platform.h"
 
-static const char *board_type_str(void)
-{
-	switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
-	case BCSR_WHOAMI_PB1200_DDR1:
-	case BCSR_WHOAMI_PB1200_DDR2:
-		return "PB1200";
-	case BCSR_WHOAMI_DB1200:
-		return "DB1200";
-	default:
-		return "(unknown)";
-	}
-}
+const char *get_system_type(void);
 
-const char *get_system_type(void)
-{
-	return board_type_str();
-}
-
-static int __init detect_board(void)
+static int __init db1200_detect_board(void)
 {
 	int bid;
 
@@ -96,19 +80,17 @@ static int __init detect_board(void)
 	return 1;	/* it's neither */
 }
 
-void __init board_setup(void)
+int __init db1200_board_setup(void)
 {
 	unsigned long freq0, clksrc, div, pfc;
 	unsigned short whoami;
 
-	if (detect_board()) {
-		printk(KERN_ERR "NOT running on a DB1200/PB1200 board!\n");
-		return;
-	}
+	if (db1200_detect_board())
+		return -ENODEV;
 
 	whoami = bcsr_read(BCSR_WHOAMI);
 	printk(KERN_INFO "Alchemy/AMD/RMI %s Board, CPLD Rev %d"
-		"  Board-ID %d  Daughtercard ID %d\n", board_type_str(),
+		"  Board-ID %d  Daughtercard ID %d\n", get_system_type(),
 		(whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);
 
 	/* SMBus/SPI on PSC0, Audio on PSC1 */
@@ -138,6 +120,8 @@ void __init board_setup(void)
 	clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;
 	__raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);
 	wmb();
+
+	return 0;
 }
 
 /******************************************************************************/
@@ -796,7 +780,7 @@ static int __init pb1200_res_fixup(void)
 	return 0;
 }
 
-static int __init db1200_dev_init(void)
+int __init db1200_dev_setup(void)
 {
 	unsigned long pfc;
 	unsigned short sw;
@@ -846,7 +830,7 @@ static int __init db1200_dev_init(void)
 	gpio_request(215, "otg-vbus");
 	gpio_direction_output(215, 1);
 
-	printk(KERN_INFO "%s device configuration:\n", board_type_str());
+	printk(KERN_INFO "%s device configuration:\n", get_system_type());
 
 	sw = bcsr_read(BCSR_SWITCHES);
 	if (sw & BCSR_SWITCHES_DIP_8) {
@@ -922,4 +906,3 @@ static int __init db1200_dev_init(void)
 
 	return 0;
 }
-device_initcall(db1200_dev_init);
diff --git a/arch/mips/alchemy/devboards/db1235.c b/arch/mips/alchemy/devboards/db1235.c
new file mode 100644
index 00000000000..c76a90f7866
--- /dev/null
+++ b/arch/mips/alchemy/devboards/db1235.c
@@ -0,0 +1,94 @@
+/*
+ * DB1200/PB1200 / DB1550 / DB1300 board support.
+ *
+ * These 4 boards can reliably be supported in a single kernel image.
+ */
+
+#include <asm/mach-au1x00/au1000.h>
+#include <asm/mach-db1x00/bcsr.h>
+
+int __init db1200_board_setup(void);
+int __init db1200_dev_setup(void);
+int __init db1300_board_setup(void);
+int __init db1300_dev_setup(void);
+int __init db1550_board_setup(void);
+int __init db1550_dev_setup(void);
+int __init db1550_pci_setup(int);
+
+static const char *board_type_str(void)
+{
+	switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
+	case BCSR_WHOAMI_PB1200_DDR1:
+	case BCSR_WHOAMI_PB1200_DDR2:
+		return "PB1200";
+	case BCSR_WHOAMI_DB1200:
+		return "DB1200";
+	case BCSR_WHOAMI_DB1300:
+		return "DB1300";
+	case BCSR_WHOAMI_DB1550:
+		return "DB1550";
+	case BCSR_WHOAMI_PB1550_SDR:
+	case BCSR_WHOAMI_PB1550_DDR:
+		return "PB1550";
+	default:
+		return "(unknown)";
+	}
+}
+
+const char *get_system_type(void)
+{
+	return board_type_str();
+}
+
+void __init board_setup(void)
+{
+	int ret;
+
+	switch (alchemy_get_cputype()) {
+	case ALCHEMY_CPU_AU1550:
+		ret = db1550_board_setup();
+		break;
+	case ALCHEMY_CPU_AU1200:
+		ret = db1200_board_setup();
+		break;
+	case ALCHEMY_CPU_AU1300:
+		ret = db1300_board_setup();
+		break;
+	default:
+		pr_err("unsupported CPU on board\n");
+		ret = -ENODEV;
+	}
+	if (ret)
+		panic("cannot initialize board support\n");
+}
+
+int __init db1235_arch_init(void)
+{
+	int id = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
+	if (id == BCSR_WHOAMI_DB1550)
+		return db1550_pci_setup(0);
+	else if ((id == BCSR_WHOAMI_PB1550_SDR) ||
+		 (id == BCSR_WHOAMI_PB1550_DDR))
+		return db1550_pci_setup(1);
+
+	return 0;
+}
+arch_initcall(db1235_arch_init);
+
+int __init db1235_dev_init(void)
+{
+	switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
+	case BCSR_WHOAMI_PB1200_DDR1:
+	case BCSR_WHOAMI_PB1200_DDR2:
+	case BCSR_WHOAMI_DB1200:
+		return db1200_dev_setup();
+	case BCSR_WHOAMI_DB1300:
+		return db1300_dev_setup();
+	case BCSR_WHOAMI_DB1550:
+	case BCSR_WHOAMI_PB1550_SDR:
+	case BCSR_WHOAMI_PB1550_DDR:
+		return db1550_dev_setup();
+	}
+	return 0;
+}
+device_initcall(db1235_dev_init);
diff --git a/arch/mips/alchemy/devboards/db1300.c b/arch/mips/alchemy/devboards/db1300.c
index c56e0246694..cdf37cbd3d1 100644
--- a/arch/mips/alchemy/devboards/db1300.c
+++ b/arch/mips/alchemy/devboards/db1300.c
@@ -110,11 +110,6 @@ static void __init db1300_gpio_config(void)
 	au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
 }
 
-char *get_system_type(void)
-{
-	return "DB1300";
-}
-
 /**********************************************************************/
 
 static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
@@ -701,7 +696,7 @@ static struct platform_device *db1300_dev[] __initdata = {
 	&db1300_sndi2s_dev,
 };
 
-static int __init db1300_device_init(void)
+int __init db1300_dev_setup(void)
 {
 	int swapped, cpldirq;
 
@@ -758,10 +753,9 @@ static int __init db1300_device_init(void)
 
 	return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
 }
-device_initcall(db1300_device_init);
 
 
-void __init board_setup(void)
+int __init db1300_board_setup(void)
 {
 	unsigned short whoami;
 
@@ -779,4 +773,6 @@ void __init board_setup(void)
 	alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
 	alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
 	alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
+
+	return 0;
 }
diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c
index 9eb79062f46..5a9ae609542 100644
--- a/arch/mips/alchemy/devboards/db1550.c
+++ b/arch/mips/alchemy/devboards/db1550.c
@@ -1,5 +1,5 @@
 /*
- * Alchemy Db1550 board support
+ * Alchemy Db1550/Pb1550 board support
  *
  * (c) 2011 Manuel Lauss <manuel.lauss@googlemail.com>
  */
@@ -17,34 +17,29 @@
 #include <linux/pm.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
+#include <asm/bootinfo.h>
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-au1x00/au1xxx_eth.h>
 #include <asm/mach-au1x00/au1xxx_dbdma.h>
 #include <asm/mach-au1x00/au1xxx_psc.h>
 #include <asm/mach-au1x00/au1550_spi.h>
+#include <asm/mach-au1x00/au1550nd.h>
 #include <asm/mach-db1x00/bcsr.h>
 #include <prom.h>
 #include "platform.h"
 
-
-const char *get_system_type(void)
-{
-	return "DB1550";
-}
-
 static void __init db1550_hw_setup(void)
 {
 	void __iomem *base;
 
-	alchemy_gpio_direction_output(203, 0);	/* red led on */
-
 	/* complete SPI setup: link psc0_intclk to a 48MHz source,
-	 * and assign GPIO16 to PSC0_SYNC1 (SPI cs# line)
+	 * and assign GPIO16 to PSC0_SYNC1 (SPI cs# line) as well as PSC1_SYNC
+	 * for AC97 on PB1550.
 	 */
 	base = (void __iomem *)SYS_CLKSRC;
 	__raw_writel(__raw_readl(base) | 0x000001e0, base);
 	base = (void __iomem *)SYS_PINFUNC;
-	__raw_writel(__raw_readl(base) | 1, base);
+	__raw_writel(__raw_readl(base) | 1 | SYS_PF_PSC1_S1, base);
 	wmb();
 
 	/* reset the AC97 codec now, the reset time in the psc-ac97 driver
@@ -57,23 +52,27 @@ static void __init db1550_hw_setup(void)
 	wmb();
 	__raw_writel(PSC_AC97RST_RST, base + PSC_AC97RST_OFFSET);
 	wmb();
-
-	alchemy_gpio_direction_output(202, 0);	/* green led on */
 }
 
-void __init board_setup(void)
+int __init db1550_board_setup(void)
 {
 	unsigned short whoami;
 
 	bcsr_init(DB1550_BCSR_PHYS_ADDR,
 		  DB1550_BCSR_PHYS_ADDR + DB1550_BCSR_HEXLED_OFS);
 
-	whoami = bcsr_read(BCSR_WHOAMI);
-	printk(KERN_INFO "Alchemy/AMD DB1550 Board, CPLD Rev %d"
-		"  Board-ID %d  Daughtercard ID %d\n",
+	whoami = bcsr_read(BCSR_WHOAMI); /* PB1550 hexled offset differs */
+	if ((BCSR_WHOAMI_BOARD(whoami) == BCSR_WHOAMI_PB1550_SDR) ||
+	    (BCSR_WHOAMI_BOARD(whoami) == BCSR_WHOAMI_PB1550_DDR))
+		bcsr_init(PB1550_BCSR_PHYS_ADDR,
+			  PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS);
+
+	pr_info("Alchemy/AMD %s Board, CPLD Rev %d Board-ID %d  "	\
+		"Daughtercard ID %d\n", get_system_type(),
 		(whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);
 
 	db1550_hw_setup();
+	return 0;
 }
 
 /*****************************************************************************/
@@ -194,6 +193,39 @@ static struct platform_device db1550_nand_dev = {
 	}
 };
 
+static struct au1550nd_platdata pb1550_nand_pd = {
+	.parts		= db1550_nand_parts,
+	.num_parts	= ARRAY_SIZE(db1550_nand_parts),
+	.devwidth	= 0,	/* x8 NAND default, needs fixing up */
+};
+
+static struct platform_device pb1550_nand_dev = {
+	.name		= "au1550-nand",
+	.id		= -1,
+	.resource	= db1550_nand_res,
+	.num_resources	= ARRAY_SIZE(db1550_nand_res),
+	.dev		= {
+		.platform_data	= &pb1550_nand_pd,
+	},
+};
+
+static void __init pb1550_nand_setup(void)
+{
+	int boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) |
+			    ((bcsr_read(BCSR_STATUS) >> 6) & 0x1);
+
+	gpio_direction_input(206);	/* de-assert NAND CS# */
+	switch (boot_swapboot) {
+	case 0: case 2: case 8: case 0xC: case 0xD:
+		/* x16 NAND Flash */
+		pb1550_nand_pd.devwidth = 1;
+		/* fallthrough */
+	case 1: case 3: case 9: case 0xE: case 0xF:
+		/* x8 NAND, already set up */
+		platform_device_register(&pb1550_nand_dev);
+	}
+}
+
 /**********************************************************************/
 
 static struct resource au1550_psc0_res[] = {
@@ -394,6 +426,29 @@ static int db1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
 	return -1;
 }
 
+static int pb1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
+{
+	if ((slot < 12) || (slot > 13) || pin == 0)
+		return -1;
+	if (slot == 12) {
+		switch (pin) {
+		case 1: return AU1500_PCI_INTB;
+		case 2: return AU1500_PCI_INTC;
+		case 3: return AU1500_PCI_INTD;
+		case 4: return AU1500_PCI_INTA;
+		}
+	}
+	if (slot == 13) {
+		switch (pin) {
+		case 1: return AU1500_PCI_INTA;
+		case 2: return AU1500_PCI_INTB;
+		case 3: return AU1500_PCI_INTC;
+		case 4: return AU1500_PCI_INTD;
+		}
+	}
+	return -1;
+}
+
 static struct resource alchemy_pci_host_res[] = {
 	[0] = {
 		.start	= AU1500_PCI_PHYS_ADDR,
@@ -417,7 +472,6 @@ static struct platform_device db1550_pci_host_dev = {
 /**********************************************************************/
 
 static struct platform_device *db1550_devs[] __initdata = {
-	&db1550_nand_dev,
 	&db1550_i2c_dev,
 	&db1550_ac97_dev,
 	&db1550_spi_dev,
@@ -430,15 +484,16 @@ static struct platform_device *db1550_devs[] __initdata = {
 };
 
 /* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
-static int __init db1550_pci_init(void)
+int __init db1550_pci_setup(int id)
 {
+	if (id)
+		db1550_pci_pd.board_map_irq = pb1550_map_pci_irq;
 	return platform_device_register(&db1550_pci_host_dev);
 }
-arch_initcall(db1550_pci_init);
 
-static int __init db1550_dev_init(void)
+static void __init db1550_devices(void)
 {
-	int swapped;
+	alchemy_gpio_direction_output(203, 0);	/* red led on */
 
 	irq_set_irq_type(AU1550_GPIO0_INT, IRQ_TYPE_EDGE_BOTH);  /* CD0# */
 	irq_set_irq_type(AU1550_GPIO1_INT, IRQ_TYPE_EDGE_BOTH);  /* CD1# */
@@ -447,6 +502,75 @@ static int __init db1550_dev_init(void)
 	irq_set_irq_type(AU1550_GPIO21_INT, IRQ_TYPE_LEVEL_LOW); /* STSCHG0# */
 	irq_set_irq_type(AU1550_GPIO22_INT, IRQ_TYPE_LEVEL_LOW); /* STSCHG1# */
 
+	db1x_register_pcmcia_socket(
+		AU1000_PCMCIA_ATTR_PHYS_ADDR,
+		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
+		AU1000_PCMCIA_MEM_PHYS_ADDR,
+		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
+		AU1000_PCMCIA_IO_PHYS_ADDR,
+		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
+		AU1550_GPIO3_INT, AU1550_GPIO0_INT,
+		/*AU1550_GPIO21_INT*/0, 0, 0);
+
+	db1x_register_pcmcia_socket(
+		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
+		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
+		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
+		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
+		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
+		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
+		AU1550_GPIO5_INT, AU1550_GPIO1_INT,
+		/*AU1550_GPIO22_INT*/0, 0, 1);
+
+	platform_device_register(&db1550_nand_dev);
+
+	alchemy_gpio_direction_output(202, 0);	/* green led on */
+}
+
+static void __init pb1550_devices(void)
+{
+	irq_set_irq_type(AU1550_GPIO0_INT, IRQ_TYPE_LEVEL_LOW);
+	irq_set_irq_type(AU1550_GPIO1_INT, IRQ_TYPE_LEVEL_LOW);
+	irq_set_irq_type(AU1550_GPIO201_205_INT, IRQ_TYPE_LEVEL_HIGH);
+
+	/* enable both PCMCIA card irqs in the shared line */
+	alchemy_gpio2_enable_int(201);	/* socket 0 card irq */
+	alchemy_gpio2_enable_int(202);	/* socket 1 card irq */
+
+	/* Pb1550, like all others, also has statuschange irqs; however they're
+	* wired up on one of the Au1550's shared GPIO201_205 line, which also
+	* services the PCMCIA card interrupts.  So we ignore statuschange and
+	* use the GPIO201_205 exclusively for card interrupts, since a) pcmcia
+	* drivers are used to shared irqs and b) statuschange isn't really use-
+	* ful anyway.
+	*/
+	db1x_register_pcmcia_socket(
+		AU1000_PCMCIA_ATTR_PHYS_ADDR,
+		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
+		AU1000_PCMCIA_MEM_PHYS_ADDR,
+		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
+		AU1000_PCMCIA_IO_PHYS_ADDR,
+		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
+		AU1550_GPIO201_205_INT, AU1550_GPIO0_INT, 0, 0, 0);
+
+	db1x_register_pcmcia_socket(
+		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008000000,
+		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1,
+		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x008000000,
+		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x008400000 - 1,
+		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x008000000,
+		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x008010000 - 1,
+		AU1550_GPIO201_205_INT, AU1550_GPIO1_INT, 0, 0, 1);
+
+	pb1550_nand_setup();
+}
+
+int __init db1550_dev_setup(void)
+{
+	int swapped, id;
+
+	id = (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) != BCSR_WHOAMI_DB1550);
+
 	i2c_register_board_info(0, db1550_i2c_devs,
 				ARRAY_SIZE(db1550_i2c_devs));
 	spi_register_board_info(db1550_spi_devs,
@@ -467,29 +591,11 @@ static int __init db1550_dev_init(void)
 	    (void __iomem *)KSEG1ADDR(AU1550_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
 	wmb();
 
-	db1x_register_pcmcia_socket(
-		AU1000_PCMCIA_ATTR_PHYS_ADDR,
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
-		AU1000_PCMCIA_MEM_PHYS_ADDR,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
-		AU1000_PCMCIA_IO_PHYS_ADDR,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
-		AU1550_GPIO3_INT, AU1550_GPIO0_INT,
-		/*AU1550_GPIO21_INT*/0, 0, 0);
-
-	db1x_register_pcmcia_socket(
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
-		AU1550_GPIO5_INT, AU1550_GPIO1_INT,
-		/*AU1550_GPIO22_INT*/0, 0, 1);
+	id ? pb1550_devices() : db1550_devices();
 
-	swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
+	swapped = bcsr_read(BCSR_STATUS) &
+	       (id ? BCSR_STATUS_PB1550_SWAPBOOT : BCSR_STATUS_DB1000_SWAPBOOT);
 	db1x_register_norflash(128 << 20, 4, swapped);
 
 	return platform_add_devices(db1550_devs, ARRAY_SIZE(db1550_devs));
 }
-device_initcall(db1550_dev_init);
diff --git a/arch/mips/alchemy/devboards/pb1100.c b/arch/mips/alchemy/devboards/pb1100.c
deleted file mode 100644
index 78c77a44a31..00000000000
--- a/arch/mips/alchemy/devboards/pb1100.c
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
- * Pb1100 board platform device registration
- *
- * Copyright (C) 2009 Manuel Lauss
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-#include <linux/delay.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <asm/mach-au1x00/au1000.h>
-#include <asm/mach-db1x00/bcsr.h>
-#include <prom.h>
-#include "platform.h"
-
-const char *get_system_type(void)
-{
-	return "PB1100";
-}
-
-void __init board_setup(void)
-{
-	volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;
-
-	bcsr_init(DB1000_BCSR_PHYS_ADDR,
-		  DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
-
-	/* Set AUX clock to 12 MHz * 8 = 96 MHz */
-	au_writel(8, SYS_AUXPLL);
-	alchemy_gpio1_input_enable();
-	udelay(100);
-
-#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
-	{
-		u32 pin_func, sys_freqctrl, sys_clksrc;
-
-		/* Configure pins GPIO[14:9] as GPIO */
-		pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
-
-		/* Zero and disable FREQ2 */
-		sys_freqctrl = au_readl(SYS_FREQCTRL0);
-		sys_freqctrl &= ~0xFFF00000;
-		au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
-		/* Zero and disable USBH/USBD/IrDA clock */
-		sys_clksrc = au_readl(SYS_CLKSRC);
-		sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
-		au_writel(sys_clksrc, SYS_CLKSRC);
-
-		sys_freqctrl = au_readl(SYS_FREQCTRL0);
-		sys_freqctrl &= ~0xFFF00000;
-
-		sys_clksrc = au_readl(SYS_CLKSRC);
-		sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
-
-		/* FREQ2 = aux / 2 = 48 MHz */
-		sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
-				SYS_FC_FE2 | SYS_FC_FS2;
-		au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
-		/*
-		 * Route 48 MHz FREQ2 into USBH/USBD/IrDA
-		 */
-		sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT;
-		au_writel(sys_clksrc, SYS_CLKSRC);
-
-		/* Setup the static bus controller */
-		au_writel(0x00000002, MEM_STCFG3);  /* type = PCMCIA */
-		au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
-		au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
-
-		/*
-		 * Get USB Functionality pin state (device vs host drive pins).
-		 */
-		pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
-		/* 2nd USB port is USB host. */
-		pin_func |= SYS_PF_USB;
-		au_writel(pin_func, SYS_PINFUNC);
-	}
-#endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */
-
-	/* Enable sys bus clock divider when IDLE state or no bus activity. */
-	au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
-
-	/* Enable the RTC if not already enabled. */
-	if (!(readb(base + 0x28) & 0x20)) {
-		writeb(readb(base + 0x28) | 0x20, base + 0x28);
-		au_sync();
-	}
-	/* Put the clock in BCD mode. */
-	if (readb(base + 0x2C) & 0x4) { /* reg B */
-		writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
-		au_sync();
-	}
-}
-
-/******************************************************************************/
-
-static struct resource au1100_lcd_resources[] = {
-	[0] = {
-		.start	= AU1100_LCD_PHYS_ADDR,
-		.end	= AU1100_LCD_PHYS_ADDR + 0x800 - 1,
-		.flags	= IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= AU1100_LCD_INT,
-		.end	= AU1100_LCD_INT,
-		.flags	= IORESOURCE_IRQ,
-	}
-};
-
-static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
-
-static struct platform_device au1100_lcd_device = {
-	.name		= "au1100-lcd",
-	.id		= 0,
-	.dev = {
-		.dma_mask		= &au1100_lcd_dmamask,
-		.coherent_dma_mask	= DMA_BIT_MASK(32),
-	},
-	.num_resources	= ARRAY_SIZE(au1100_lcd_resources),
-	.resource	= au1100_lcd_resources,
-};
-
-static int __init pb1100_dev_init(void)
-{
-	int swapped;
-
-	irq_set_irq_type(AU1100_GPIO9_INT, IRQF_TRIGGER_LOW); /* PCCD# */
-	irq_set_irq_type(AU1100_GPIO10_INT, IRQF_TRIGGER_LOW); /* PCSTSCHG# */
-	irq_set_irq_type(AU1100_GPIO11_INT, IRQF_TRIGGER_LOW); /* PCCard# */
-	irq_set_irq_type(AU1100_GPIO13_INT, IRQF_TRIGGER_LOW); /* DC_IRQ# */
-
-	/* PCMCIA. single socket, identical to Pb1500 */
-	db1x_register_pcmcia_socket(
-		AU1000_PCMCIA_ATTR_PHYS_ADDR,
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
-		AU1000_PCMCIA_MEM_PHYS_ADDR,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
-		AU1000_PCMCIA_IO_PHYS_ADDR,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
-		AU1100_GPIO11_INT, AU1100_GPIO9_INT,	 /* card / insert */
-		/*AU1100_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
-
-	swapped = bcsr_read(BCSR_STATUS) &  BCSR_STATUS_DB1000_SWAPBOOT;
-	db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
-	platform_device_register(&au1100_lcd_device);
-
-	return 0;
-}
-device_initcall(pb1100_dev_init);
diff --git a/arch/mips/alchemy/devboards/pb1500.c b/arch/mips/alchemy/devboards/pb1500.c
deleted file mode 100644
index 232fee94200..00000000000
--- a/arch/mips/alchemy/devboards/pb1500.c
+++ /dev/null
@@ -1,198 +0,0 @@
-/*
- * Pb1500 board support.
- *
- * Copyright (C) 2009 Manuel Lauss
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-#include <linux/delay.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <asm/mach-au1x00/au1000.h>
-#include <asm/mach-db1x00/bcsr.h>
-#include <prom.h>
-#include "platform.h"
-
-const char *get_system_type(void)
-{
-	return "PB1500";
-}
-
-void __init board_setup(void)
-{
-	u32 pin_func;
-	u32 sys_freqctrl, sys_clksrc;
-
-	bcsr_init(DB1000_BCSR_PHYS_ADDR,
-		  DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
-
-	sys_clksrc = sys_freqctrl = pin_func = 0;
-	/* Set AUX clock to 12 MHz * 8 = 96 MHz */
-	au_writel(8, SYS_AUXPLL);
-	alchemy_gpio1_input_enable();
-	udelay(100);
-
-	/* GPIO201 is input for PCMCIA card detect */
-	/* GPIO203 is input for PCMCIA interrupt request */
-	alchemy_gpio_direction_input(201);
-	alchemy_gpio_direction_input(203);
-
-#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
-
-	/* Zero and disable FREQ2 */
-	sys_freqctrl = au_readl(SYS_FREQCTRL0);
-	sys_freqctrl &= ~0xFFF00000;
-	au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
-	/* zero and disable USBH/USBD clocks */
-	sys_clksrc = au_readl(SYS_CLKSRC);
-	sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
-			SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
-	au_writel(sys_clksrc, SYS_CLKSRC);
-
-	sys_freqctrl = au_readl(SYS_FREQCTRL0);
-	sys_freqctrl &= ~0xFFF00000;
-
-	sys_clksrc = au_readl(SYS_CLKSRC);
-	sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
-			SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
-
-	/* FREQ2 = aux/2 = 48 MHz */
-	sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2;
-	au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
-	/*
-	 * Route 48MHz FREQ2 into USB Host and/or Device
-	 */
-	sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
-	au_writel(sys_clksrc, SYS_CLKSRC);
-
-	pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
-	/* 2nd USB port is USB host */
-	pin_func |= SYS_PF_USB;
-	au_writel(pin_func, SYS_PINFUNC);
-#endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */
-
-#ifdef CONFIG_PCI
-	{
-		void __iomem *base =
-				(void __iomem *)KSEG1ADDR(AU1500_PCI_PHYS_ADDR);
-		/* Setup PCI bus controller */
-		__raw_writel(0x00003fff, base + PCI_REG_CMEM);
-		__raw_writel(0xf0000000, base + PCI_REG_MWMASK_DEV);
-		__raw_writel(0, base + PCI_REG_MWBASE_REV_CCL);
-		__raw_writel(0x02a00356, base + PCI_REG_STATCMD);
-		__raw_writel(0x00003c04, base + PCI_REG_PARAM);
-		__raw_writel(0x00000008, base + PCI_REG_MBAR);
-		wmb();
-	}
-#endif
-
-	/* Enable sys bus clock divider when IDLE state or no bus activity. */
-	au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
-
-	/* Enable the RTC if not already enabled */
-	if (!(au_readl(0xac000028) & 0x20)) {
-		printk(KERN_INFO "enabling clock ...\n");
-		au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
-	}
-	/* Put the clock in BCD mode */
-	if (au_readl(0xac00002c) & 0x4) { /* reg B */
-		au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
-		au_sync();
-	}
-}
-
-/******************************************************************************/
-
-static int pb1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
-{
-	if ((slot < 12) || (slot > 13) || pin == 0)
-		return -1;
-	if (slot == 12)
-		return (pin == 1) ? AU1500_PCI_INTA : 0xff;
-	if (slot == 13) {
-		switch (pin) {
-		case 1: return AU1500_PCI_INTA;
-		case 2: return AU1500_PCI_INTB;
-		case 3: return AU1500_PCI_INTC;
-		case 4: return AU1500_PCI_INTD;
-		}
-	}
-	return -1;
-}
-
-static struct resource alchemy_pci_host_res[] = {
-	[0] = {
-		.start	= AU1500_PCI_PHYS_ADDR,
-		.end	= AU1500_PCI_PHYS_ADDR + 0xfff,
-		.flags	= IORESOURCE_MEM,
-	},
-};
-
-static struct alchemy_pci_platdata pb1500_pci_pd = {
-	.board_map_irq	= pb1500_map_pci_irq,
-	.pci_cfg_set	= PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
-			  PCI_CONFIG_CH |
-#if defined(__MIPSEB__)
-			  PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
-#else
-			  0,
-#endif
-};
-
-static struct platform_device pb1500_pci_host = {
-	.dev.platform_data = &pb1500_pci_pd,
-	.name		= "alchemy-pci",
-	.id		= 0,
-	.num_resources	= ARRAY_SIZE(alchemy_pci_host_res),
-	.resource	= alchemy_pci_host_res,
-};
-
-static int __init pb1500_dev_init(void)
-{
-	int swapped;
-
-	irq_set_irq_type(AU1500_GPIO9_INT,   IRQF_TRIGGER_LOW);   /* CD0# */
-	irq_set_irq_type(AU1500_GPIO10_INT,  IRQF_TRIGGER_LOW);  /* CARD0 */
-	irq_set_irq_type(AU1500_GPIO11_INT,  IRQF_TRIGGER_LOW);  /* STSCHG0# */
-	irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
-	irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
-	irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
-	irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
-	irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
-
-	/* PCMCIA. single socket, identical to Pb1100 */
-	db1x_register_pcmcia_socket(
-		AU1000_PCMCIA_ATTR_PHYS_ADDR,
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
-		AU1000_PCMCIA_MEM_PHYS_ADDR,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
-		AU1000_PCMCIA_IO_PHYS_ADDR,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
-		AU1500_GPIO11_INT, AU1500_GPIO9_INT,	 /* card / insert */
-		/*AU1500_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
-
-	swapped = bcsr_read(BCSR_STATUS) &  BCSR_STATUS_DB1000_SWAPBOOT;
-	db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
-	platform_device_register(&pb1500_pci_host);
-
-	return 0;
-}
-arch_initcall(pb1500_dev_init);
diff --git a/arch/mips/alchemy/devboards/pb1550.c b/arch/mips/alchemy/devboards/pb1550.c
deleted file mode 100644
index b37e7de8d92..00000000000
--- a/arch/mips/alchemy/devboards/pb1550.c
+++ /dev/null
@@ -1,244 +0,0 @@
-/*
- * Pb1550 board support.
- *
- * Copyright (C) 2009-2011 Manuel Lauss
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-#include <linux/dma-mapping.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <asm/mach-au1x00/au1000.h>
-#include <asm/mach-au1x00/au1xxx_dbdma.h>
-#include <asm/mach-au1x00/au1550nd.h>
-#include <asm/mach-au1x00/gpio.h>
-#include <asm/mach-db1x00/bcsr.h>
-#include "platform.h"
-
-const char *get_system_type(void)
-{
-	return "PB1550";
-}
-
-void __init board_setup(void)
-{
-	u32 pin_func;
-
-	bcsr_init(PB1550_BCSR_PHYS_ADDR,
-		  PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS);
-
-	alchemy_gpio2_enable();
-
-	/*
-	 * Enable PSC1 SYNC for AC'97.  Normaly done in audio driver,
-	 * but it is board specific code, so put it here.
-	 */
-	pin_func = au_readl(SYS_PINFUNC);
-	au_sync();
-	pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
-	au_writel(pin_func, SYS_PINFUNC);
-
-	bcsr_write(BCSR_PCMCIA, 0);	/* turn off PCMCIA power */
-
-	printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
-}
-
-/******************************************************************************/
-
-static int pb1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
-{
-	if ((slot < 12) || (slot > 13) || pin == 0)
-		return -1;
-	if (slot == 12) {
-		switch (pin) {
-		case 1: return AU1500_PCI_INTB;
-		case 2: return AU1500_PCI_INTC;
-		case 3: return AU1500_PCI_INTD;
-		case 4: return AU1500_PCI_INTA;
-		}
-	}
-	if (slot == 13) {
-		switch (pin) {
-		case 1: return AU1500_PCI_INTA;
-		case 2: return AU1500_PCI_INTB;
-		case 3: return AU1500_PCI_INTC;
-		case 4: return AU1500_PCI_INTD;
-		}
-	}
-	return -1;
-}
-
-static struct resource alchemy_pci_host_res[] = {
-	[0] = {
-		.start	= AU1500_PCI_PHYS_ADDR,
-		.end	= AU1500_PCI_PHYS_ADDR + 0xfff,
-		.flags	= IORESOURCE_MEM,
-	},
-};
-
-static struct alchemy_pci_platdata pb1550_pci_pd = {
-	.board_map_irq	= pb1550_map_pci_irq,
-};
-
-static struct platform_device pb1550_pci_host = {
-	.dev.platform_data = &pb1550_pci_pd,
-	.name		= "alchemy-pci",
-	.id		= 0,
-	.num_resources	= ARRAY_SIZE(alchemy_pci_host_res),
-	.resource	= alchemy_pci_host_res,
-};
-
-static struct resource au1550_psc2_res[] = {
-	[0] = {
-		.start	= AU1550_PSC2_PHYS_ADDR,
-		.end	= AU1550_PSC2_PHYS_ADDR + 0xfff,
-		.flags	= IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= AU1550_PSC2_INT,
-		.end	= AU1550_PSC2_INT,
-		.flags	= IORESOURCE_IRQ,
-	},
-	[2] = {
-		.start	= AU1550_DSCR_CMD0_PSC2_TX,
-		.end	= AU1550_DSCR_CMD0_PSC2_TX,
-		.flags	= IORESOURCE_DMA,
-	},
-	[3] = {
-		.start	= AU1550_DSCR_CMD0_PSC2_RX,
-		.end	= AU1550_DSCR_CMD0_PSC2_RX,
-		.flags	= IORESOURCE_DMA,
-	},
-};
-
-static struct platform_device pb1550_i2c_dev = {
-	.name		= "au1xpsc_smbus",
-	.id		= 0,	/* bus number */
-	.num_resources	= ARRAY_SIZE(au1550_psc2_res),
-	.resource	= au1550_psc2_res,
-};
-
-static struct mtd_partition pb1550_nand_parts[] = {
-	[0] = {
-		.name	= "NAND FS 0",
-		.offset	= 0,
-		.size	= 8 * 1024 * 1024,
-	},
-	[1] = {
-		.name	= "NAND FS 1",
-		.offset	= MTDPART_OFS_APPEND,
-		.size	= MTDPART_SIZ_FULL,
-	},
-};
-
-static struct au1550nd_platdata pb1550_nand_pd = {
-	.parts		= pb1550_nand_parts,
-	.num_parts	= ARRAY_SIZE(pb1550_nand_parts),
-	.devwidth	= 0,	/* x8 NAND default, needs fixing up */
-};
-
-static struct resource pb1550_nand_res[] = {
-	[0] = {
-		.start	= 0x20000000,
-		.end	= 0x20000fff,
-		.flags	= IORESOURCE_MEM,
-	},
-};
-
-static struct platform_device pb1550_nand_dev = {
-	.name		= "au1550-nand",
-	.id		= -1,
-	.resource	= pb1550_nand_res,
-	.num_resources	= ARRAY_SIZE(pb1550_nand_res),
-	.dev		= {
-		.platform_data	= &pb1550_nand_pd,
-	},
-};
-
-static void __init pb1550_nand_setup(void)
-{
-	int boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) |
-			    ((bcsr_read(BCSR_STATUS) >> 6) & 0x1);
-
-	switch (boot_swapboot) {
-	case 0:
-	case 2:
-	case 8:
-	case 0xC:
-	case 0xD:
-		/* x16 NAND Flash */
-		pb1550_nand_pd.devwidth = 1;
-		/* fallthrough */
-	case 1:
-	case 9:
-	case 3:
-	case 0xE:
-	case 0xF:
-		/* x8 NAND, already set up */
-		platform_device_register(&pb1550_nand_dev);
-	}
-}
-
-static int __init pb1550_dev_init(void)
-{
-	int swapped;
-
-	irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW);
-	irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW);
-	irq_set_irq_type(AU1550_GPIO201_205_INT, IRQF_TRIGGER_HIGH);
-
-	/* enable both PCMCIA card irqs in the shared line */
-	alchemy_gpio2_enable_int(201);
-	alchemy_gpio2_enable_int(202);
-
-	/* Pb1550, like all others, also has statuschange irqs; however they're
-	* wired up on one of the Au1550's shared GPIO201_205 line, which also
-	* services the PCMCIA card interrupts.  So we ignore statuschange and
-	* use the GPIO201_205 exclusively for card interrupts, since a) pcmcia
-	* drivers are used to shared irqs and b) statuschange isn't really use-
-	* ful anyway.
-	*/
-	db1x_register_pcmcia_socket(
-		AU1000_PCMCIA_ATTR_PHYS_ADDR,
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
-		AU1000_PCMCIA_MEM_PHYS_ADDR,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
-		AU1000_PCMCIA_IO_PHYS_ADDR,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
-		AU1550_GPIO201_205_INT, AU1550_GPIO0_INT, 0, 0, 0);
-
-	db1x_register_pcmcia_socket(
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008000000,
-		AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x008400000 - 1,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x008000000,
-		AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x008400000 - 1,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x008000000,
-		AU1000_PCMCIA_IO_PHYS_ADDR   + 0x008010000 - 1,
-		AU1550_GPIO201_205_INT, AU1550_GPIO1_INT, 0, 0, 1);
-
-	/* NAND setup */
-	gpio_direction_input(206);	/* GPIO206 high */
-	pb1550_nand_setup();
-
-	swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_PB1550_SWAPBOOT;
-	db1x_register_norflash(128 * 1024 * 1024, 4, swapped);
-	platform_device_register(&pb1550_pci_host);
-	platform_device_register(&pb1550_i2c_dev);
-
-	return 0;
-}
-arch_initcall(pb1550_dev_init);
diff --git a/arch/mips/alchemy/devboards/platform.c b/arch/mips/alchemy/devboards/platform.c
index f39042e99d0..8df86eb9497 100644
--- a/arch/mips/alchemy/devboards/platform.c
+++ b/arch/mips/alchemy/devboards/platform.c
@@ -36,11 +36,10 @@ void __init prom_init(void)
 
 void prom_putchar(unsigned char c)
 {
-#ifdef CONFIG_MIPS_DB1300
-	alchemy_uart_putchar(AU1300_UART2_PHYS_ADDR, c);
-#else
-	alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
-#endif
+	if (alchemy_get_cputype() == ALCHEMY_CPU_AU1300)
+		alchemy_uart_putchar(AU1300_UART2_PHYS_ADDR, c);
+	else
+		alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
 }
 
 
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
index b91ad3efe29..579f452c0b4 100644
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -17,6 +17,8 @@
 #include <linux/err.h>
 #include <linux/clk.h>
 
+#include <asm/div64.h>
+
 #include <asm/mach-ath79/ath79.h>
 #include <asm/mach-ath79/ar71xx_regs.h>
 #include "common.h"
@@ -166,11 +168,34 @@ static void __init ar933x_clocks_init(void)
 	ath79_uart_clk.rate = ath79_ref_clk.rate;
 }
 
+static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac,
+				      u32 frac, u32 out_div)
+{
+	u64 t;
+	u32 ret;
+
+	t = ath79_ref_clk.rate;
+	t *= nint;
+	do_div(t, ref_div);
+	ret = t;
+
+	t = ath79_ref_clk.rate;
+	t *= nfrac;
+	do_div(t, ref_div * frac);
+	ret += t;
+
+	ret /= (1 << out_div);
+	return ret;
+}
+
 static void __init ar934x_clocks_init(void)
 {
-	u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv;
+	u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv;
 	u32 cpu_pll, ddr_pll;
 	u32 bootstrap;
+	void __iomem *dpll_base;
+
+	dpll_base = ioremap(AR934X_SRIF_BASE, AR934X_SRIF_SIZE);
 
 	bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
 	if (bootstrap &	AR934X_BOOTSTRAP_REF_CLK_40)
@@ -178,33 +203,59 @@ static void __init ar934x_clocks_init(void)
 	else
 		ath79_ref_clk.rate = 25 * 1000 * 1000;
 
-	pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG);
-	out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
-		  AR934X_PLL_CPU_CONFIG_OUTDIV_MASK;
-	ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
-		  AR934X_PLL_CPU_CONFIG_REFDIV_MASK;
-	nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) &
-	       AR934X_PLL_CPU_CONFIG_NINT_MASK;
-	frac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
-	       AR934X_PLL_CPU_CONFIG_NFRAC_MASK;
-
-	cpu_pll = nint * ath79_ref_clk.rate / ref_div;
-	cpu_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 6));
-	cpu_pll /= (1 << out_div);
-
-	pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG);
-	out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
-		  AR934X_PLL_DDR_CONFIG_OUTDIV_MASK;
-	ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
-		  AR934X_PLL_DDR_CONFIG_REFDIV_MASK;
-	nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) &
-	       AR934X_PLL_DDR_CONFIG_NINT_MASK;
-	frac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
-	       AR934X_PLL_DDR_CONFIG_NFRAC_MASK;
-
-	ddr_pll = nint * ath79_ref_clk.rate / ref_div;
-	ddr_pll += frac * ath79_ref_clk.rate / (ref_div * (2 << 10));
-	ddr_pll /= (1 << out_div);
+	pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL2_REG);
+	if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) {
+		out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) &
+			  AR934X_SRIF_DPLL2_OUTDIV_MASK;
+		pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL1_REG);
+		nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) &
+		       AR934X_SRIF_DPLL1_NINT_MASK;
+		nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK;
+		ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &
+			  AR934X_SRIF_DPLL1_REFDIV_MASK;
+		frac = 1 << 18;
+	} else {
+		pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG);
+		out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
+			AR934X_PLL_CPU_CONFIG_OUTDIV_MASK;
+		ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
+			  AR934X_PLL_CPU_CONFIG_REFDIV_MASK;
+		nint = (pll >> AR934X_PLL_CPU_CONFIG_NINT_SHIFT) &
+		       AR934X_PLL_CPU_CONFIG_NINT_MASK;
+		nfrac = (pll >> AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT) &
+			AR934X_PLL_CPU_CONFIG_NFRAC_MASK;
+		frac = 1 << 6;
+	}
+
+	cpu_pll = ar934x_get_pll_freq(ath79_ref_clk.rate, ref_div, nint,
+				      nfrac, frac, out_div);
+
+	pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL2_REG);
+	if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) {
+		out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) &
+			  AR934X_SRIF_DPLL2_OUTDIV_MASK;
+		pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL1_REG);
+		nint = (pll >> AR934X_SRIF_DPLL1_NINT_SHIFT) &
+		       AR934X_SRIF_DPLL1_NINT_MASK;
+		nfrac = pll & AR934X_SRIF_DPLL1_NFRAC_MASK;
+		ref_div = (pll >> AR934X_SRIF_DPLL1_REFDIV_SHIFT) &
+			  AR934X_SRIF_DPLL1_REFDIV_MASK;
+		frac = 1 << 18;
+	} else {
+		pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG);
+		out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
+			  AR934X_PLL_DDR_CONFIG_OUTDIV_MASK;
+		ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
+			   AR934X_PLL_DDR_CONFIG_REFDIV_MASK;
+		nint = (pll >> AR934X_PLL_DDR_CONFIG_NINT_SHIFT) &
+		       AR934X_PLL_DDR_CONFIG_NINT_MASK;
+		nfrac = (pll >> AR934X_PLL_DDR_CONFIG_NFRAC_SHIFT) &
+			AR934X_PLL_DDR_CONFIG_NFRAC_MASK;
+		frac = 1 << 10;
+	}
+
+	ddr_pll = ar934x_get_pll_freq(ath79_ref_clk.rate, ref_div, nint,
+				      nfrac, frac, out_div);
 
 	clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG);
 
@@ -240,6 +291,8 @@ static void __init ar934x_clocks_init(void)
 
 	ath79_wdt_clk.rate = ath79_ref_clk.rate;
 	ath79_uart_clk.rate = ath79_ref_clk.rate;
+
+	iounmap(dpll_base);
 }
 
 void __init ath79_clocks_init(void)
diff --git a/arch/mips/ath79/dev-usb.c b/arch/mips/ath79/dev-usb.c
index b2a2311ec85..072bb9be230 100644
--- a/arch/mips/ath79/dev-usb.c
+++ b/arch/mips/ath79/dev-usb.c
@@ -25,17 +25,7 @@
 #include "common.h"
 #include "dev-usb.h"
 
-static struct resource ath79_ohci_resources[] = {
-	[0] = {
-		/* .start and .end fields are filled dynamically */
-		.flags	= IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= ATH79_MISC_IRQ_OHCI,
-		.end	= ATH79_MISC_IRQ_OHCI,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
+static struct resource ath79_ohci_resources[2];
 
 static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32);
 
@@ -54,17 +44,7 @@ static struct platform_device ath79_ohci_device = {
 	},
 };
 
-static struct resource ath79_ehci_resources[] = {
-	[0] = {
-		/* .start and .end fields are filled dynamically */
-		.flags	= IORESOURCE_MEM,
-	},
-	[1] = {
-		.start	= ATH79_CPU_IRQ_USB,
-		.end	= ATH79_CPU_IRQ_USB,
-		.flags	= IORESOURCE_IRQ,
-	},
-};
+static struct resource ath79_ehci_resources[2];
 
 static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
 
@@ -90,6 +70,20 @@ static struct platform_device ath79_ehci_device = {
 	},
 };
 
+static void __init ath79_usb_init_resource(struct resource res[2],
+					   unsigned long base,
+					   unsigned long size,
+					   int irq)
+{
+	res[0].flags = IORESOURCE_MEM;
+	res[0].start = base;
+	res[0].end = base + size - 1;
+
+	res[1].flags = IORESOURCE_IRQ;
+	res[1].start = irq;
+	res[1].end = irq;
+}
+
 #define AR71XX_USB_RESET_MASK	(AR71XX_RESET_USB_HOST | \
 				 AR71XX_RESET_USB_PHY | \
 				 AR71XX_RESET_USB_OHCI_DLL)
@@ -114,12 +108,12 @@ static void __init ath79_usb_setup(void)
 
 	mdelay(900);
 
-	ath79_ohci_resources[0].start = AR71XX_OHCI_BASE;
-	ath79_ohci_resources[0].end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1;
+	ath79_usb_init_resource(ath79_ohci_resources, AR71XX_OHCI_BASE,
+				AR71XX_OHCI_SIZE, ATH79_MISC_IRQ_OHCI);
 	platform_device_register(&ath79_ohci_device);
 
-	ath79_ehci_resources[0].start = AR71XX_EHCI_BASE;
-	ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1;
+	ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE,
+				AR71XX_EHCI_SIZE, ATH79_CPU_IRQ_USB);
 	ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
 	platform_device_register(&ath79_ehci_device);
 }
@@ -143,10 +137,8 @@ static void __init ar7240_usb_setup(void)
 
 	iounmap(usb_ctrl_base);
 
-	ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
-	ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
-	ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;
-	ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;
+	ath79_usb_init_resource(ath79_ohci_resources, AR7240_OHCI_BASE,
+				AR7240_OHCI_SIZE, ATH79_CPU_IRQ_USB);
 	platform_device_register(&ath79_ohci_device);
 }
 
@@ -161,8 +153,8 @@ static void __init ar724x_usb_setup(void)
 	ath79_device_reset_clear(AR724X_RESET_USB_PHY);
 	mdelay(10);
 
-	ath79_ehci_resources[0].start = AR724X_EHCI_BASE;
-	ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1;
+	ath79_usb_init_resource(ath79_ehci_resources, AR724X_EHCI_BASE,
+				AR724X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
 	ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
 	platform_device_register(&ath79_ehci_device);
 }
@@ -178,8 +170,8 @@ static void __init ar913x_usb_setup(void)
 	ath79_device_reset_clear(AR913X_RESET_USB_PHY);
 	mdelay(10);
 
-	ath79_ehci_resources[0].start = AR913X_EHCI_BASE;
-	ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1;
+	ath79_usb_init_resource(ath79_ehci_resources, AR913X_EHCI_BASE,
+				AR913X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
 	ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
 	platform_device_register(&ath79_ehci_device);
 }
@@ -195,8 +187,34 @@ static void __init ar933x_usb_setup(void)
 	ath79_device_reset_clear(AR933X_RESET_USB_PHY);
 	mdelay(10);
 
-	ath79_ehci_resources[0].start = AR933X_EHCI_BASE;
-	ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1;
+	ath79_usb_init_resource(ath79_ehci_resources, AR933X_EHCI_BASE,
+				AR933X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
+	ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
+	platform_device_register(&ath79_ehci_device);
+}
+
+static void __init ar934x_usb_setup(void)
+{
+	u32 bootstrap;
+
+	bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
+	if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
+		return;
+
+	ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE);
+	udelay(1000);
+
+	ath79_device_reset_clear(AR934X_RESET_USB_PHY);
+	udelay(1000);
+
+	ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG);
+	udelay(1000);
+
+	ath79_device_reset_clear(AR934X_RESET_USB_HOST);
+	udelay(1000);
+
+	ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE,
+				AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
 	ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
 	platform_device_register(&ath79_ehci_device);
 }
@@ -213,6 +231,8 @@ void __init ath79_register_usb(void)
 		ar913x_usb_setup();
 	else if (soc_is_ar933x())
 		ar933x_usb_setup();
+	else if (soc_is_ar934x())
+		ar934x_usb_setup();
 	else
 		BUG();
 }
diff --git a/arch/mips/ath79/mach-db120.c b/arch/mips/ath79/mach-db120.c
index 1983e4d2af4..42f540a724f 100644
--- a/arch/mips/ath79/mach-db120.c
+++ b/arch/mips/ath79/mach-db120.c
@@ -25,6 +25,7 @@
 #include "dev-gpio-buttons.h"
 #include "dev-leds-gpio.h"
 #include "dev-spi.h"
+#include "dev-usb.h"
 #include "dev-wmac.h"
 #include "pci.h"
 
@@ -126,6 +127,7 @@ static void __init db120_setup(void)
 					db120_gpio_keys);
 	ath79_register_spi(&db120_spi_data, db120_spi_info,
 			   ARRAY_SIZE(db120_spi_info));
+	ath79_register_usb();
 	ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
 	db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
 }
diff --git a/arch/mips/bcm63xx/Makefile b/arch/mips/bcm63xx/Makefile
index 833af72c852..9bbb30a9dc2 100644
--- a/arch/mips/bcm63xx/Makefile
+++ b/arch/mips/bcm63xx/Makefile
@@ -1,6 +1,6 @@
 obj-y		+= clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
 		   dev-dsp.o dev-enet.o dev-flash.o dev-pcmcia.o dev-rng.o \
-		   dev-spi.o dev-uart.o dev-wdt.o
+		   dev-spi.o dev-uart.o dev-wdt.o dev-usb-usbd.o
 obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
 
 obj-y		+= boards/
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index dd18e4b761a..1cd4d73f23c 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -24,6 +24,7 @@
 #include <bcm63xx_dev_flash.h>
 #include <bcm63xx_dev_pcmcia.h>
 #include <bcm63xx_dev_spi.h>
+#include <bcm63xx_dev_usb_usbd.h>
 #include <board_bcm963xx.h>
 
 #define PFX	"board_bcm963xx: "
@@ -42,6 +43,12 @@ static struct board_info __initdata board_96328avng = {
 
 	.has_uart0			= 1,
 	.has_pci			= 1,
+	.has_usbd			= 0,
+
+	.usbd = {
+		.use_fullspeed		= 0,
+		.port_no		= 0,
+	},
 
 	.leds = {
 		{
@@ -713,7 +720,7 @@ const char *board_get_name(void)
  */
 static int board_get_mac_address(u8 *mac)
 {
-	u8 *p;
+	u8 *oui;
 	int count;
 
 	if (mac_addr_used >= nvram.mac_addr_count) {
@@ -722,21 +729,23 @@ static int board_get_mac_address(u8 *mac)
 	}
 
 	memcpy(mac, nvram.mac_addr_base, ETH_ALEN);
-	p = mac + ETH_ALEN - 1;
+	oui = mac + ETH_ALEN/2 - 1;
 	count = mac_addr_used;
 
 	while (count--) {
+		u8 *p = mac + ETH_ALEN - 1;
+
 		do {
 			(*p)++;
 			if (*p != 0)
 				break;
 			p--;
-		} while (p != mac);
-	}
+		} while (p != oui);
 
-	if (p == mac) {
-		printk(KERN_ERR PFX "unable to fetch mac address\n");
-		return -ENODEV;
+		if (p == oui) {
+			printk(KERN_ERR PFX "unable to fetch mac address\n");
+			return -ENODEV;
+		}
 	}
 
 	mac_addr_used++;
@@ -888,6 +897,9 @@ int __init board_register_devices(void)
 	    !board_get_mac_address(board.enet1.mac_addr))
 		bcm63xx_enet_register(1, &board.enet1);
 
+	if (board.has_usbd)
+		bcm63xx_usbd_register(&board.usbd);
+
 	if (board.has_dsp)
 		bcm63xx_dsp_register(&board.dsp);
 
diff --git a/arch/mips/bcm63xx/clk.c b/arch/mips/bcm63xx/clk.c
index 1db48adb543..dff79ab6005 100644
--- a/arch/mips/bcm63xx/clk.c
+++ b/arch/mips/bcm63xx/clk.c
@@ -160,7 +160,9 @@ static struct clk clk_pcm = {
  */
 static void usbh_set(struct clk *clk, int enable)
 {
-	if (BCMCPU_IS_6348())
+	if (BCMCPU_IS_6328())
+		bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);
+	else if (BCMCPU_IS_6348())
 		bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
 	else if (BCMCPU_IS_6368())
 		bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
@@ -171,6 +173,21 @@ static struct clk clk_usbh = {
 };
 
 /*
+ * USB device clock
+ */
+static void usbd_set(struct clk *clk, int enable)
+{
+	if (BCMCPU_IS_6328())
+		bcm_hwclock_set(CKCTL_6328_USBD_EN, enable);
+	else if (BCMCPU_IS_6368())
+		bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
+}
+
+static struct clk clk_usbd = {
+	.set	= usbd_set,
+};
+
+/*
  * SPI clock
  */
 static void spi_set(struct clk *clk, int enable)
@@ -284,6 +301,8 @@ struct clk *clk_get(struct device *dev, const char *id)
 		return &clk_ephy;
 	if (!strcmp(id, "usbh"))
 		return &clk_usbh;
+	if (!strcmp(id, "usbd"))
+		return &clk_usbd;
 	if (!strcmp(id, "spi"))
 		return &clk_spi;
 	if (!strcmp(id, "xtm"))
diff --git a/arch/mips/bcm63xx/dev-usb-usbd.c b/arch/mips/bcm63xx/dev-usb-usbd.c
new file mode 100644
index 00000000000..508bd9d8df2
--- /dev/null
+++ b/arch/mips/bcm63xx/dev-usb-usbd.c
@@ -0,0 +1,65 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
+ * Copyright (C) 2012 Broadcom Corporation
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <bcm63xx_cpu.h>
+#include <bcm63xx_dev_usb_usbd.h>
+
+#define NUM_MMIO		2
+#define NUM_IRQ			7
+
+static struct resource usbd_resources[NUM_MMIO + NUM_IRQ];
+
+static u64 usbd_dmamask = DMA_BIT_MASK(32);
+
+static struct platform_device bcm63xx_usbd_device = {
+	.name		= "bcm63xx_udc",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(usbd_resources),
+	.resource	= usbd_resources,
+	.dev		= {
+		.dma_mask		= &usbd_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+	},
+};
+
+int __init bcm63xx_usbd_register(const struct bcm63xx_usbd_platform_data *pd)
+{
+	const int irq_list[NUM_IRQ] = { IRQ_USBD,
+		IRQ_USBD_RXDMA0, IRQ_USBD_TXDMA0,
+		IRQ_USBD_RXDMA1, IRQ_USBD_TXDMA1,
+		IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 };
+	int i;
+
+	if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
+		return 0;
+
+	usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD);
+	usbd_resources[0].end = usbd_resources[0].start + RSET_USBD_SIZE - 1;
+	usbd_resources[0].flags = IORESOURCE_MEM;
+
+	usbd_resources[1].start = bcm63xx_regset_address(RSET_USBDMA);
+	usbd_resources[1].end = usbd_resources[1].start + RSET_USBDMA_SIZE - 1;
+	usbd_resources[1].flags = IORESOURCE_MEM;
+
+	for (i = 0; i < NUM_IRQ; i++) {
+		struct resource *r = &usbd_resources[NUM_MMIO + i];
+
+		r->start = r->end = bcm63xx_get_irq_number(irq_list[i]);
+		r->flags = IORESOURCE_IRQ;
+	}
+
+	platform_device_add_data(&bcm63xx_usbd_device, pd, sizeof(*pd));
+
+	return platform_device_register(&bcm63xx_usbd_device);
+}
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index 18e051ad18a..da24c2bd9b7 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -56,8 +56,8 @@ static void __internal_irq_unmask_64(unsigned int irq) __maybe_unused;
 #define is_ext_irq_cascaded	0
 #define ext_irq_start		0
 #define ext_irq_end		0
-#define ext_irq_count		0
-#define ext_irq_cfg_reg1	0
+#define ext_irq_count		4
+#define ext_irq_cfg_reg1	PERF_EXTIRQ_CFG_REG_6345
 #define ext_irq_cfg_reg2	0
 #endif
 #ifdef CONFIG_BCM63XX_CPU_6348
@@ -143,11 +143,15 @@ static void bcm63xx_init_irq(void)
 		irq_stat_addr += PERF_IRQSTAT_6338_REG;
 		irq_mask_addr += PERF_IRQMASK_6338_REG;
 		irq_bits = 32;
+		ext_irq_count = 4;
+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
 		break;
 	case BCM6345_CPU_ID:
 		irq_stat_addr += PERF_IRQSTAT_6345_REG;
 		irq_mask_addr += PERF_IRQMASK_6345_REG;
 		irq_bits = 32;
+		ext_irq_count = 4;
+		ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
 		break;
 	case BCM6348_CPU_ID:
 		irq_stat_addr += PERF_IRQSTAT_6348_REG;
@@ -434,7 +438,8 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
 	reg = bcm_perf_readl(regaddr);
 	irq %= 4;
 
-	if (BCMCPU_IS_6348()) {
+	switch (bcm63xx_get_cpu_id()) {
+	case BCM6348_CPU_ID:
 		if (levelsense)
 			reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
 		else
@@ -447,9 +452,13 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
 			reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
 		else
 			reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
-	}
+		break;
 
-	if (BCMCPU_IS_6338() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
+	case BCM6328_CPU_ID:
+	case BCM6338_CPU_ID:
+	case BCM6345_CPU_ID:
+	case BCM6358_CPU_ID:
+	case BCM6368_CPU_ID:
 		if (levelsense)
 			reg |= EXTIRQ_CFG_LEVELSENSE(irq);
 		else
@@ -462,6 +471,9 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
 			reg |= EXTIRQ_CFG_BOTHEDGE(irq);
 		else
 			reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
+		break;
+	default:
+		BUG();
 	}
 
 	bcm_perf_writel(reg, regaddr);
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c
index 0e74a13639c..314231be788 100644
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -74,6 +74,9 @@ void bcm63xx_machine_reboot(void)
 	case BCM6338_CPU_ID:
 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
 		break;
+	case BCM6345_CPU_ID:
+		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6345;
+		break;
 	case BCM6348_CPU_ID:
 		perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348;
 		break;
@@ -83,6 +86,9 @@ void bcm63xx_machine_reboot(void)
 	}
 
 	for (i = 0; i < 2; i++) {
+		if (!perf_regs[i])
+			break;
+
 		reg = bcm_perf_readl(perf_regs[i]);
 		if (BCMCPU_IS_6348()) {
 			reg &= ~EXTIRQ_CFG_MASK_ALL_6348;
diff --git a/arch/mips/boot/compressed/uart-alchemy.c b/arch/mips/boot/compressed/uart-alchemy.c
index 3112df8f90d..4bee55b93f6 100644
--- a/arch/mips/boot/compressed/uart-alchemy.c
+++ b/arch/mips/boot/compressed/uart-alchemy.c
@@ -2,9 +2,5 @@
 
 void putc(char c)
 {
-#ifdef CONFIG_MIPS_DB1300
-	alchemy_uart_putchar(AU1300_UART2_PHYS_ADDR, c);
-#else
 	alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
-#endif
 }
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
index ce6483a9302..02193953eb9 100644
--- a/arch/mips/cavium-octeon/csrc-octeon.c
+++ b/arch/mips/cavium-octeon/csrc-octeon.c
@@ -4,7 +4,7 @@
  * for more details.
  *
  * Copyright (C) 2007 by Ralf Baechle
- * Copyright (C) 2009, 2010 Cavium Networks, Inc.
+ * Copyright (C) 2009, 2012 Cavium, Inc.
  */
 #include <linux/clocksource.h>
 #include <linux/export.h>
@@ -18,6 +18,33 @@
 #include <asm/octeon/cvmx-ipd-defs.h>
 #include <asm/octeon/cvmx-mio-defs.h>
 
+
+static u64 f;
+static u64 rdiv;
+static u64 sdiv;
+static u64 octeon_udelay_factor;
+static u64 octeon_ndelay_factor;
+
+void __init octeon_setup_delays(void)
+{
+	octeon_udelay_factor = octeon_get_clock_rate() / 1000000;
+	/*
+	 * For __ndelay we divide by 2^16, so the factor is multiplied
+	 * by the same amount.
+	 */
+	octeon_ndelay_factor = (octeon_udelay_factor * 0x10000ull) / 1000ull;
+
+	preset_lpj = octeon_get_clock_rate() / HZ;
+
+	if (current_cpu_type() == CPU_CAVIUM_OCTEON2) {
+		union cvmx_mio_rst_boot rst_boot;
+		rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT);
+		rdiv = rst_boot.s.c_mul;	/* CPU clock */
+		sdiv = rst_boot.s.pnr_mul;	/* I/O clock */
+		f = (0x8000000000000000ull / sdiv) * 2;
+	}
+}
+
 /*
  * Set the current core's cvmcount counter to the value of the
  * IPD_CLK_COUNT.  We do this on all cores as they are brought
@@ -30,17 +57,6 @@ void octeon_init_cvmcount(void)
 {
 	unsigned long flags;
 	unsigned loops = 2;
-	u64 f = 0;
-	u64 rdiv = 0;
-	u64 sdiv = 0;
-	if (current_cpu_type() == CPU_CAVIUM_OCTEON2) {
-		union cvmx_mio_rst_boot rst_boot;
-		rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT);
-		rdiv = rst_boot.s.c_mul;	/* CPU clock */
-		sdiv = rst_boot.s.pnr_mul;	/* I/O clock */
-		f = (0x8000000000000000ull / sdiv) * 2;
-	}
-
 
 	/* Clobber loops so GCC will not unroll the following while loop. */
 	asm("" : "+r" (loops));
@@ -57,9 +73,9 @@ void octeon_init_cvmcount(void)
 			if (f != 0) {
 				asm("dmultu\t%[cnt],%[f]\n\t"
 				    "mfhi\t%[cnt]"
-				    : [cnt] "+r" (ipd_clk_count),
-				      [f] "=r" (f)
-				    : : "hi", "lo");
+				    : [cnt] "+r" (ipd_clk_count)
+				    : [f] "r" (f)
+				    : "hi", "lo");
 			}
 		}
 		write_c0_cvmcount(ipd_clk_count);
@@ -109,21 +125,6 @@ void __init plat_time_init(void)
 	clocksource_register_hz(&clocksource_mips, octeon_get_clock_rate());
 }
 
-static u64 octeon_udelay_factor;
-static u64 octeon_ndelay_factor;
-
-void __init octeon_setup_delays(void)
-{
-	octeon_udelay_factor = octeon_get_clock_rate() / 1000000;
-	/*
-	 * For __ndelay we divide by 2^16, so the factor is multiplied
-	 * by the same amount.
-	 */
-	octeon_ndelay_factor = (octeon_udelay_factor * 0x10000ull) / 1000ull;
-
-	preset_lpj = octeon_get_clock_rate() / HZ;
-}
-
 void __udelay(unsigned long us)
 {
 	u64 cur, end, inc;
@@ -163,3 +164,35 @@ void __delay(unsigned long loops)
 		cur = read_c0_cvmcount();
 }
 EXPORT_SYMBOL(__delay);
+
+
+/**
+ * octeon_io_clk_delay - wait for a given number of io clock cycles to pass.
+ *
+ * We scale the wait by the clock ratio, and then wait for the
+ * corresponding number of core clocks.
+ *
+ * @count: The number of clocks to wait.
+ */
+void octeon_io_clk_delay(unsigned long count)
+{
+	u64 cur, end;
+
+	cur = read_c0_cvmcount();
+	if (rdiv != 0) {
+		end = count * rdiv;
+		if (f != 0) {
+			asm("dmultu\t%[cnt],%[f]\n\t"
+				"mfhi\t%[cnt]"
+				: [cnt] "+r" (end)
+				: [f] "r" (f)
+				: "hi", "lo");
+		}
+		end = cur + end;
+	} else {
+		end = cur + count;
+	}
+	while (end > cur)
+		cur = read_c0_cvmcount();
+}
+EXPORT_SYMBOL(octeon_io_clk_delay);
diff --git a/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c b/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c
index bea7538ea4e..560e034aa02 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-interrupt-rsl.c
@@ -130,7 +130,7 @@ void __cvmx_interrupt_gmxx_enable(int interface)
 	if (num_ports) {
 		if (OCTEON_IS_MODEL(OCTEON_CN38XX)
 		    || OCTEON_IS_MODEL(OCTEON_CN58XX))
-			gmx_tx_int_en.s.ncb_nxa = 1;
+			gmx_tx_int_en.cn38xx.ncb_nxa = 1;
 		gmx_tx_int_en.s.pko_nxa = 1;
 	}
 	gmx_tx_int_en.s.undflw = (1 << num_ports) - 1;
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 274cd4fad30..02b15eed4bc 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -16,12 +16,11 @@
 #include <linux/of.h>
 
 #include <asm/octeon/octeon.h>
-
-static DEFINE_RAW_SPINLOCK(octeon_irq_ciu0_lock);
-static DEFINE_RAW_SPINLOCK(octeon_irq_ciu1_lock);
+#include <asm/octeon/cvmx-ciu2-defs.h>
 
 static DEFINE_PER_CPU(unsigned long, octeon_irq_ciu0_en_mirror);
 static DEFINE_PER_CPU(unsigned long, octeon_irq_ciu1_en_mirror);
+static DEFINE_PER_CPU(raw_spinlock_t, octeon_irq_ciu_spinlock);
 
 static __read_mostly u8 octeon_irq_ciu_to_irq[8][64];
 
@@ -29,8 +28,9 @@ union octeon_ciu_chip_data {
 	void *p;
 	unsigned long l;
 	struct {
-		unsigned int line:6;
-		unsigned int bit:6;
+		unsigned long line:6;
+		unsigned long bit:6;
+		unsigned long gpio_line:6;
 	} s;
 };
 
@@ -45,7 +45,7 @@ struct octeon_core_chip_data {
 
 static struct octeon_core_chip_data octeon_irq_core_chip_data[MIPS_CORE_IRQ_LINES];
 
-static void octeon_irq_set_ciu_mapping(int irq, int line, int bit,
+static void octeon_irq_set_ciu_mapping(int irq, int line, int bit, int gpio_line,
 				       struct irq_chip *chip,
 				       irq_flow_handler_t handler)
 {
@@ -56,6 +56,7 @@ static void octeon_irq_set_ciu_mapping(int irq, int line, int bit,
 	cd.l = 0;
 	cd.s.line = line;
 	cd.s.bit = bit;
+	cd.s.gpio_line = gpio_line;
 
 	irq_set_chip_data(irq, cd.p);
 	octeon_irq_ciu_to_irq[line][bit] = irq;
@@ -231,22 +232,31 @@ static void octeon_irq_ciu_enable(struct irq_data *data)
 	unsigned long *pen;
 	unsigned long flags;
 	union octeon_ciu_chip_data cd;
+	raw_spinlock_t *lock = &per_cpu(octeon_irq_ciu_spinlock, cpu);
 
 	cd.p = irq_data_get_irq_chip_data(data);
 
+	raw_spin_lock_irqsave(lock, flags);
 	if (cd.s.line == 0) {
-		raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags);
 		pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
-		set_bit(cd.s.bit, pen);
+		__set_bit(cd.s.bit, pen);
+		/*
+		 * Must be visible to octeon_irq_ip{2,3}_ciu() before
+		 * enabling the irq.
+		 */
+		wmb();
 		cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags);
 	} else {
-		raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags);
 		pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
-		set_bit(cd.s.bit, pen);
+		__set_bit(cd.s.bit, pen);
+		/*
+		 * Must be visible to octeon_irq_ip{2,3}_ciu() before
+		 * enabling the irq.
+		 */
+		wmb();
 		cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen);
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags);
 	}
+	raw_spin_unlock_irqrestore(lock, flags);
 }
 
 static void octeon_irq_ciu_enable_local(struct irq_data *data)
@@ -254,22 +264,31 @@ static void octeon_irq_ciu_enable_local(struct irq_data *data)
 	unsigned long *pen;
 	unsigned long flags;
 	union octeon_ciu_chip_data cd;
+	raw_spinlock_t *lock = &__get_cpu_var(octeon_irq_ciu_spinlock);
 
 	cd.p = irq_data_get_irq_chip_data(data);
 
+	raw_spin_lock_irqsave(lock, flags);
 	if (cd.s.line == 0) {
-		raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags);
 		pen = &__get_cpu_var(octeon_irq_ciu0_en_mirror);
-		set_bit(cd.s.bit, pen);
+		__set_bit(cd.s.bit, pen);
+		/*
+		 * Must be visible to octeon_irq_ip{2,3}_ciu() before
+		 * enabling the irq.
+		 */
+		wmb();
 		cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags);
 	} else {
-		raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags);
 		pen = &__get_cpu_var(octeon_irq_ciu1_en_mirror);
-		set_bit(cd.s.bit, pen);
+		__set_bit(cd.s.bit, pen);
+		/*
+		 * Must be visible to octeon_irq_ip{2,3}_ciu() before
+		 * enabling the irq.
+		 */
+		wmb();
 		cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1), *pen);
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags);
 	}
+	raw_spin_unlock_irqrestore(lock, flags);
 }
 
 static void octeon_irq_ciu_disable_local(struct irq_data *data)
@@ -277,22 +296,31 @@ static void octeon_irq_ciu_disable_local(struct irq_data *data)
 	unsigned long *pen;
 	unsigned long flags;
 	union octeon_ciu_chip_data cd;
+	raw_spinlock_t *lock = &__get_cpu_var(octeon_irq_ciu_spinlock);
 
 	cd.p = irq_data_get_irq_chip_data(data);
 
+	raw_spin_lock_irqsave(lock, flags);
 	if (cd.s.line == 0) {
-		raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags);
 		pen = &__get_cpu_var(octeon_irq_ciu0_en_mirror);
-		clear_bit(cd.s.bit, pen);
+		__clear_bit(cd.s.bit, pen);
+		/*
+		 * Must be visible to octeon_irq_ip{2,3}_ciu() before
+		 * enabling the irq.
+		 */
+		wmb();
 		cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags);
 	} else {
-		raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags);
 		pen = &__get_cpu_var(octeon_irq_ciu1_en_mirror);
-		clear_bit(cd.s.bit, pen);
+		__clear_bit(cd.s.bit, pen);
+		/*
+		 * Must be visible to octeon_irq_ip{2,3}_ciu() before
+		 * enabling the irq.
+		 */
+		wmb();
 		cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1), *pen);
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags);
 	}
+	raw_spin_unlock_irqrestore(lock, flags);
 }
 
 static void octeon_irq_ciu_disable_all(struct irq_data *data)
@@ -301,29 +329,30 @@ static void octeon_irq_ciu_disable_all(struct irq_data *data)
 	unsigned long *pen;
 	int cpu;
 	union octeon_ciu_chip_data cd;
-
-	wmb(); /* Make sure flag changes arrive before register updates. */
+	raw_spinlock_t *lock;
 
 	cd.p = irq_data_get_irq_chip_data(data);
 
-	if (cd.s.line == 0) {
-		raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags);
-		for_each_online_cpu(cpu) {
-			int coreid = octeon_coreid_for_cpu(cpu);
+	for_each_online_cpu(cpu) {
+		int coreid = octeon_coreid_for_cpu(cpu);
+		lock = &per_cpu(octeon_irq_ciu_spinlock, cpu);
+		if (cd.s.line == 0)
 			pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
-			clear_bit(cd.s.bit, pen);
-			cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
-		}
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags);
-	} else {
-		raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags);
-		for_each_online_cpu(cpu) {
-			int coreid = octeon_coreid_for_cpu(cpu);
+		else
 			pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
-			clear_bit(cd.s.bit, pen);
+
+		raw_spin_lock_irqsave(lock, flags);
+		__clear_bit(cd.s.bit, pen);
+		/*
+		 * Must be visible to octeon_irq_ip{2,3}_ciu() before
+		 * enabling the irq.
+		 */
+		wmb();
+		if (cd.s.line == 0)
+			cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
+		else
 			cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen);
-		}
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags);
+		raw_spin_unlock_irqrestore(lock, flags);
 	}
 }
 
@@ -333,27 +362,30 @@ static void octeon_irq_ciu_enable_all(struct irq_data *data)
 	unsigned long *pen;
 	int cpu;
 	union octeon_ciu_chip_data cd;
+	raw_spinlock_t *lock;
 
 	cd.p = irq_data_get_irq_chip_data(data);
 
-	if (cd.s.line == 0) {
-		raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags);
-		for_each_online_cpu(cpu) {
-			int coreid = octeon_coreid_for_cpu(cpu);
+	for_each_online_cpu(cpu) {
+		int coreid = octeon_coreid_for_cpu(cpu);
+		lock = &per_cpu(octeon_irq_ciu_spinlock, cpu);
+		if (cd.s.line == 0)
 			pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
-			set_bit(cd.s.bit, pen);
-			cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
-		}
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags);
-	} else {
-		raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags);
-		for_each_online_cpu(cpu) {
-			int coreid = octeon_coreid_for_cpu(cpu);
+		else
 			pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
-			set_bit(cd.s.bit, pen);
+
+		raw_spin_lock_irqsave(lock, flags);
+		__set_bit(cd.s.bit, pen);
+		/*
+		 * Must be visible to octeon_irq_ip{2,3}_ciu() before
+		 * enabling the irq.
+		 */
+		wmb();
+		if (cd.s.line == 0)
+			cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
+		else
 			cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen);
-		}
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags);
+		raw_spin_unlock_irqrestore(lock, flags);
 	}
 }
 
@@ -435,7 +467,7 @@ static void octeon_irq_ciu_ack(struct irq_data *data)
 	u64 mask;
 	union octeon_ciu_chip_data cd;
 
-	cd.p = data->chip_data;
+	cd.p = irq_data_get_irq_chip_data(data);
 	mask = 1ull << (cd.s.bit);
 
 	if (cd.s.line == 0) {
@@ -456,9 +488,7 @@ static void octeon_irq_ciu_disable_all_v2(struct irq_data *data)
 	u64 mask;
 	union octeon_ciu_chip_data cd;
 
-	wmb(); /* Make sure flag changes arrive before register updates. */
-
-	cd.p = data->chip_data;
+	cd.p = irq_data_get_irq_chip_data(data);
 	mask = 1ull << (cd.s.bit);
 
 	if (cd.s.line == 0) {
@@ -486,7 +516,7 @@ static void octeon_irq_ciu_enable_all_v2(struct irq_data *data)
 	u64 mask;
 	union octeon_ciu_chip_data cd;
 
-	cd.p = data->chip_data;
+	cd.p = irq_data_get_irq_chip_data(data);
 	mask = 1ull << (cd.s.bit);
 
 	if (cd.s.line == 0) {
@@ -521,7 +551,7 @@ static void octeon_irq_gpio_setup(struct irq_data *data)
 	cfg.s.fil_cnt = 7;
 	cfg.s.fil_sel = 3;
 
-	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.bit - 16), cfg.u64);
+	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.gpio_line), cfg.u64);
 }
 
 static void octeon_irq_ciu_enable_gpio_v2(struct irq_data *data)
@@ -549,7 +579,7 @@ static void octeon_irq_ciu_disable_gpio_v2(struct irq_data *data)
 	union octeon_ciu_chip_data cd;
 
 	cd.p = irq_data_get_irq_chip_data(data);
-	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.bit - 16), 0);
+	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.gpio_line), 0);
 
 	octeon_irq_ciu_disable_all_v2(data);
 }
@@ -559,7 +589,7 @@ static void octeon_irq_ciu_disable_gpio(struct irq_data *data)
 	union octeon_ciu_chip_data cd;
 
 	cd.p = irq_data_get_irq_chip_data(data);
-	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.bit - 16), 0);
+	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.gpio_line), 0);
 
 	octeon_irq_ciu_disable_all(data);
 }
@@ -570,7 +600,7 @@ static void octeon_irq_ciu_gpio_ack(struct irq_data *data)
 	u64 mask;
 
 	cd.p = irq_data_get_irq_chip_data(data);
-	mask = 1ull << (cd.s.bit - 16);
+	mask = 1ull << (cd.s.gpio_line);
 
 	cvmx_write_csr(CVMX_GPIO_INT_CLR, mask);
 }
@@ -615,8 +645,10 @@ static int octeon_irq_ciu_set_affinity(struct irq_data *data,
 	bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data);
 	unsigned long flags;
 	union octeon_ciu_chip_data cd;
+	unsigned long *pen;
+	raw_spinlock_t *lock;
 
-	cd.p = data->chip_data;
+	cd.p = irq_data_get_irq_chip_data(data);
 
 	/*
 	 * For non-v2 CIU, we will allow only single CPU affinity.
@@ -629,36 +661,36 @@ static int octeon_irq_ciu_set_affinity(struct irq_data *data,
 	if (!enable_one)
 		return 0;
 
-	if (cd.s.line == 0) {
-		raw_spin_lock_irqsave(&octeon_irq_ciu0_lock, flags);
-		for_each_online_cpu(cpu) {
-			int coreid = octeon_coreid_for_cpu(cpu);
-			unsigned long *pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
 
-			if (cpumask_test_cpu(cpu, dest) && enable_one) {
-				enable_one = false;
-				set_bit(cd.s.bit, pen);
-			} else {
-				clear_bit(cd.s.bit, pen);
-			}
-			cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
+	for_each_online_cpu(cpu) {
+		int coreid = octeon_coreid_for_cpu(cpu);
+
+		lock = &per_cpu(octeon_irq_ciu_spinlock, cpu);
+		raw_spin_lock_irqsave(lock, flags);
+
+		if (cd.s.line == 0)
+			pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
+		else
+			pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
+
+		if (cpumask_test_cpu(cpu, dest) && enable_one) {
+			enable_one = 0;
+			__set_bit(cd.s.bit, pen);
+		} else {
+			__clear_bit(cd.s.bit, pen);
 		}
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu0_lock, flags);
-	} else {
-		raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags);
-		for_each_online_cpu(cpu) {
-			int coreid = octeon_coreid_for_cpu(cpu);
-			unsigned long *pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
+		/*
+		 * Must be visible to octeon_irq_ip{2,3}_ciu() before
+		 * enabling the irq.
+		 */
+		wmb();
 
-			if (cpumask_test_cpu(cpu, dest) && enable_one) {
-				enable_one = false;
-				set_bit(cd.s.bit, pen);
-			} else {
-				clear_bit(cd.s.bit, pen);
-			}
+		if (cd.s.line == 0)
+			cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
+		else
 			cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen);
-		}
-		raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags);
+
+		raw_spin_unlock_irqrestore(lock, flags);
 	}
 	return 0;
 }
@@ -679,7 +711,7 @@ static int octeon_irq_ciu_set_affinity_v2(struct irq_data *data,
 	if (!enable_one)
 		return 0;
 
-	cd.p = data->chip_data;
+	cd.p = irq_data_get_irq_chip_data(data);
 	mask = 1ull << cd.s.bit;
 
 	if (cd.s.line == 0) {
@@ -714,14 +746,6 @@ static int octeon_irq_ciu_set_affinity_v2(struct irq_data *data,
 #endif
 
 /*
- * The v1 CIU code already masks things, so supply a dummy version to
- * the core chip code.
- */
-static void octeon_irq_dummy_mask(struct irq_data *data)
-{
-}
-
-/*
  * Newer octeon chips have support for lockless CIU operation.
  */
 static struct irq_chip octeon_irq_chip_ciu_v2 = {
@@ -742,7 +766,8 @@ static struct irq_chip octeon_irq_chip_ciu = {
 	.irq_enable = octeon_irq_ciu_enable,
 	.irq_disable = octeon_irq_ciu_disable_all,
 	.irq_ack = octeon_irq_ciu_ack,
-	.irq_mask = octeon_irq_dummy_mask,
+	.irq_mask = octeon_irq_ciu_disable_local,
+	.irq_unmask = octeon_irq_ciu_enable,
 #ifdef CONFIG_SMP
 	.irq_set_affinity = octeon_irq_ciu_set_affinity,
 	.irq_cpu_offline = octeon_irq_cpu_offline_ciu,
@@ -766,6 +791,8 @@ static struct irq_chip octeon_irq_chip_ciu_mbox = {
 	.name = "CIU-M",
 	.irq_enable = octeon_irq_ciu_enable_all,
 	.irq_disable = octeon_irq_ciu_disable_all,
+	.irq_ack = octeon_irq_ciu_disable_local,
+	.irq_eoi = octeon_irq_ciu_enable_local,
 
 	.irq_cpu_online = octeon_irq_ciu_enable_local,
 	.irq_cpu_offline = octeon_irq_ciu_disable_local,
@@ -790,7 +817,8 @@ static struct irq_chip octeon_irq_chip_ciu_gpio = {
 	.name = "CIU-GPIO",
 	.irq_enable = octeon_irq_ciu_enable_gpio,
 	.irq_disable = octeon_irq_ciu_disable_gpio,
-	.irq_mask = octeon_irq_dummy_mask,
+	.irq_mask = octeon_irq_ciu_disable_local,
+	.irq_unmask = octeon_irq_ciu_enable,
 	.irq_ack = octeon_irq_ciu_gpio_ack,
 	.irq_set_type = octeon_irq_ciu_gpio_set_type,
 #ifdef CONFIG_SMP
@@ -809,12 +837,18 @@ static void octeon_irq_ciu_wd_enable(struct irq_data *data)
 	unsigned long *pen;
 	int coreid = data->irq - OCTEON_IRQ_WDOG0;	/* Bit 0-63 of EN1 */
 	int cpu = octeon_cpu_for_coreid(coreid);
+	raw_spinlock_t *lock = &per_cpu(octeon_irq_ciu_spinlock, cpu);
 
-	raw_spin_lock_irqsave(&octeon_irq_ciu1_lock, flags);
+	raw_spin_lock_irqsave(lock, flags);
 	pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
-	set_bit(coreid, pen);
+	__set_bit(coreid, pen);
+	/*
+	 * Must be visible to octeon_irq_ip{2,3}_ciu() before enabling
+	 * the irq.
+	 */
+	wmb();
 	cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen);
-	raw_spin_unlock_irqrestore(&octeon_irq_ciu1_lock, flags);
+	raw_spin_unlock_irqrestore(lock, flags);
 }
 
 /*
@@ -843,7 +877,8 @@ static struct irq_chip octeon_irq_chip_ciu_wd = {
 	.name = "CIU-W",
 	.irq_enable = octeon_irq_ciu_wd_enable,
 	.irq_disable = octeon_irq_ciu_disable_all,
-	.irq_mask = octeon_irq_dummy_mask,
+	.irq_mask = octeon_irq_ciu_disable_local,
+	.irq_unmask = octeon_irq_ciu_enable_local,
 };
 
 static bool octeon_irq_ciu_is_edge(unsigned int line, unsigned int bit)
@@ -976,19 +1011,20 @@ static int octeon_irq_ciu_map(struct irq_domain *d,
 		return -EINVAL;
 
 	if (octeon_irq_ciu_is_edge(line, bit))
-		octeon_irq_set_ciu_mapping(virq, line, bit,
+		octeon_irq_set_ciu_mapping(virq, line, bit, 0,
 					   octeon_irq_ciu_chip,
 					   handle_edge_irq);
 	else
-		octeon_irq_set_ciu_mapping(virq, line, bit,
+		octeon_irq_set_ciu_mapping(virq, line, bit, 0,
 					   octeon_irq_ciu_chip,
 					   handle_level_irq);
 
 	return 0;
 }
 
-static int octeon_irq_gpio_map(struct irq_domain *d,
-			       unsigned int virq, irq_hw_number_t hw)
+static int octeon_irq_gpio_map_common(struct irq_domain *d,
+				      unsigned int virq, irq_hw_number_t hw,
+				      int line_limit, struct irq_chip *chip)
 {
 	struct octeon_irq_gpio_domain_data *gpiod = d->host_data;
 	unsigned int line, bit;
@@ -999,15 +1035,20 @@ static int octeon_irq_gpio_map(struct irq_domain *d,
 	hw += gpiod->base_hwirq;
 	line = hw >> 6;
 	bit = hw & 63;
-	if (line > 1 || octeon_irq_ciu_to_irq[line][bit] != 0)
+	if (line > line_limit || octeon_irq_ciu_to_irq[line][bit] != 0)
 		return -EINVAL;
 
-	octeon_irq_set_ciu_mapping(virq, line, bit,
-				   octeon_irq_gpio_chip,
-				   octeon_irq_handle_gpio);
+	octeon_irq_set_ciu_mapping(virq, line, bit, hw,
+				   chip, octeon_irq_handle_gpio);
 	return 0;
 }
 
+static int octeon_irq_gpio_map(struct irq_domain *d,
+			       unsigned int virq, irq_hw_number_t hw)
+{
+	return octeon_irq_gpio_map_common(d, virq, hw, 1, octeon_irq_gpio_chip);
+}
+
 static struct irq_domain_ops octeon_irq_domain_ciu_ops = {
 	.map = octeon_irq_ciu_map,
 	.xlate = octeon_irq_ciu_xlat,
@@ -1018,13 +1059,12 @@ static struct irq_domain_ops octeon_irq_domain_gpio_ops = {
 	.xlate = octeon_irq_gpio_xlat,
 };
 
-static void octeon_irq_ip2_v1(void)
+static void octeon_irq_ip2_ciu(void)
 {
 	const unsigned long core_id = cvmx_get_core_num();
 	u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(core_id * 2));
 
 	ciu_sum &= __get_cpu_var(octeon_irq_ciu0_en_mirror);
-	clear_c0_status(STATUSF_IP2);
 	if (likely(ciu_sum)) {
 		int bit = fls64(ciu_sum) - 1;
 		int irq = octeon_irq_ciu_to_irq[0][bit];
@@ -1035,32 +1075,13 @@ static void octeon_irq_ip2_v1(void)
 	} else {
 		spurious_interrupt();
 	}
-	set_c0_status(STATUSF_IP2);
 }
 
-static void octeon_irq_ip2_v2(void)
-{
-	const unsigned long core_id = cvmx_get_core_num();
-	u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(core_id * 2));
-
-	ciu_sum &= __get_cpu_var(octeon_irq_ciu0_en_mirror);
-	if (likely(ciu_sum)) {
-		int bit = fls64(ciu_sum) - 1;
-		int irq = octeon_irq_ciu_to_irq[0][bit];
-		if (likely(irq))
-			do_IRQ(irq);
-		else
-			spurious_interrupt();
-	} else {
-		spurious_interrupt();
-	}
-}
-static void octeon_irq_ip3_v1(void)
+static void octeon_irq_ip3_ciu(void)
 {
 	u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1);
 
 	ciu_sum &= __get_cpu_var(octeon_irq_ciu1_en_mirror);
-	clear_c0_status(STATUSF_IP3);
 	if (likely(ciu_sum)) {
 		int bit = fls64(ciu_sum) - 1;
 		int irq = octeon_irq_ciu_to_irq[1][bit];
@@ -1071,24 +1092,13 @@ static void octeon_irq_ip3_v1(void)
 	} else {
 		spurious_interrupt();
 	}
-	set_c0_status(STATUSF_IP3);
 }
 
-static void octeon_irq_ip3_v2(void)
-{
-	u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1);
+static bool octeon_irq_use_ip4;
 
-	ciu_sum &= __get_cpu_var(octeon_irq_ciu1_en_mirror);
-	if (likely(ciu_sum)) {
-		int bit = fls64(ciu_sum) - 1;
-		int irq = octeon_irq_ciu_to_irq[1][bit];
-		if (likely(irq))
-			do_IRQ(irq);
-		else
-			spurious_interrupt();
-	} else {
-		spurious_interrupt();
-	}
+static void __cpuinit octeon_irq_local_enable_ip4(void *arg)
+{
+	set_c0_status(STATUSF_IP4);
 }
 
 static void octeon_irq_ip4_mask(void)
@@ -1103,6 +1113,13 @@ static void (*octeon_irq_ip4)(void);
 
 void __cpuinitdata (*octeon_irq_setup_secondary)(void);
 
+void __cpuinit octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t h)
+{
+	octeon_irq_ip4 = h;
+	octeon_irq_use_ip4 = true;
+	on_each_cpu(octeon_irq_local_enable_ip4, NULL, 1);
+}
+
 static void __cpuinit octeon_irq_percpu_enable(void)
 {
 	irq_cpu_online();
@@ -1111,6 +1128,12 @@ static void __cpuinit octeon_irq_percpu_enable(void)
 static void __cpuinit octeon_irq_init_ciu_percpu(void)
 {
 	int coreid = cvmx_get_core_num();
+
+
+	__get_cpu_var(octeon_irq_ciu0_en_mirror) = 0;
+	__get_cpu_var(octeon_irq_ciu1_en_mirror) = 0;
+	wmb();
+	raw_spin_lock_init(&__get_cpu_var(octeon_irq_ciu_spinlock));
 	/*
 	 * Disable All CIU Interrupts. The ones we need will be
 	 * enabled later.  Read the SUM register so we know the write
@@ -1123,12 +1146,30 @@ static void __cpuinit octeon_irq_init_ciu_percpu(void)
 	cvmx_read_csr(CVMX_CIU_INTX_SUM0((coreid * 2)));
 }
 
-static void __cpuinit octeon_irq_setup_secondary_ciu(void)
+static void octeon_irq_init_ciu2_percpu(void)
 {
+	u64 regx, ipx;
+	int coreid = cvmx_get_core_num();
+	u64 base = CVMX_CIU2_EN_PPX_IP2_WRKQ(coreid);
 
-	__get_cpu_var(octeon_irq_ciu0_en_mirror) = 0;
-	__get_cpu_var(octeon_irq_ciu1_en_mirror) = 0;
+	/*
+	 * Disable All CIU2 Interrupts. The ones we need will be
+	 * enabled later.  Read the SUM register so we know the write
+	 * completed.
+	 *
+	 * There are 9 registers and 3 IPX levels with strides 0x1000
+	 * and 0x200 respectivly.  Use loops to clear them.
+	 */
+	for (regx = 0; regx <= 0x8000; regx += 0x1000) {
+		for (ipx = 0; ipx <= 0x400; ipx += 0x200)
+			cvmx_write_csr(base + regx + ipx, 0);
+	}
 
+	cvmx_read_csr(CVMX_CIU2_SUM_PPX_IP2(coreid));
+}
+
+static void __cpuinit octeon_irq_setup_secondary_ciu(void)
+{
 	octeon_irq_init_ciu_percpu();
 	octeon_irq_percpu_enable();
 
@@ -1137,6 +1178,19 @@ static void __cpuinit octeon_irq_setup_secondary_ciu(void)
 	clear_c0_status(STATUSF_IP4);
 }
 
+static void octeon_irq_setup_secondary_ciu2(void)
+{
+	octeon_irq_init_ciu2_percpu();
+	octeon_irq_percpu_enable();
+
+	/* Enable the CIU lines */
+	set_c0_status(STATUSF_IP3 | STATUSF_IP2);
+	if (octeon_irq_use_ip4)
+		set_c0_status(STATUSF_IP4);
+	else
+		clear_c0_status(STATUSF_IP4);
+}
+
 static void __init octeon_irq_init_ciu(void)
 {
 	unsigned int i;
@@ -1150,19 +1204,17 @@ static void __init octeon_irq_init_ciu(void)
 	octeon_irq_init_ciu_percpu();
 	octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu;
 
+	octeon_irq_ip2 = octeon_irq_ip2_ciu;
+	octeon_irq_ip3 = octeon_irq_ip3_ciu;
 	if (OCTEON_IS_MODEL(OCTEON_CN58XX_PASS2_X) ||
 	    OCTEON_IS_MODEL(OCTEON_CN56XX_PASS2_X) ||
 	    OCTEON_IS_MODEL(OCTEON_CN52XX_PASS2_X) ||
 	    OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
-		octeon_irq_ip2 = octeon_irq_ip2_v2;
-		octeon_irq_ip3 = octeon_irq_ip3_v2;
 		chip = &octeon_irq_chip_ciu_v2;
 		chip_mbox = &octeon_irq_chip_ciu_mbox_v2;
 		chip_wd = &octeon_irq_chip_ciu_wd_v2;
 		octeon_irq_gpio_chip = &octeon_irq_chip_ciu_gpio_v2;
 	} else {
-		octeon_irq_ip2 = octeon_irq_ip2_v1;
-		octeon_irq_ip3 = octeon_irq_ip3_v1;
 		chip = &octeon_irq_chip_ciu;
 		chip_mbox = &octeon_irq_chip_ciu_mbox;
 		chip_wd = &octeon_irq_chip_ciu_wd;
@@ -1192,6 +1244,7 @@ static void __init octeon_irq_init_ciu(void)
 	ciu_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-ciu");
 	if (ciu_node) {
 		ciu_domain = irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu_ops, NULL);
+		irq_set_default_host(ciu_domain);
 		of_node_put(ciu_node);
 	} else
 		panic("Cannot find device node for cavium,octeon-3860-ciu.");
@@ -1200,8 +1253,8 @@ static void __init octeon_irq_init_ciu(void)
 	for (i = 0; i < 16; i++)
 		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_WORKQ0, 0, i + 0);
 
-	octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq);
-	octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq);
+	octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, 0, chip_mbox, handle_percpu_irq);
+	octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, 0, chip_mbox, handle_percpu_irq);
 
 	for (i = 0; i < 4; i++)
 		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_INT0, 0, i + 36);
@@ -1217,7 +1270,7 @@ static void __init octeon_irq_init_ciu(void)
 
 	/* CIU_1 */
 	for (i = 0; i < 16; i++)
-		octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, chip_wd, handle_level_irq);
+		octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, 0, chip_wd, handle_level_irq);
 
 	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB1, 1, 17);
 
@@ -1226,6 +1279,466 @@ static void __init octeon_irq_init_ciu(void)
 	clear_c0_status(STATUSF_IP4);
 }
 
+/*
+ * Watchdog interrupts are special.  They are associated with a single
+ * core, so we hardwire the affinity to that core.
+ */
+static void octeon_irq_ciu2_wd_enable(struct irq_data *data)
+{
+	u64 mask;
+	u64 en_addr;
+	int coreid = data->irq - OCTEON_IRQ_WDOG0;
+	union octeon_ciu_chip_data cd;
+
+	cd.p = irq_data_get_irq_chip_data(data);
+	mask = 1ull << (cd.s.bit);
+
+	en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(coreid) + (0x1000ull * cd.s.line);
+	cvmx_write_csr(en_addr, mask);
+
+}
+
+static void octeon_irq_ciu2_enable(struct irq_data *data)
+{
+	u64 mask;
+	u64 en_addr;
+	int cpu = next_cpu_for_irq(data);
+	int coreid = octeon_coreid_for_cpu(cpu);
+	union octeon_ciu_chip_data cd;
+
+	cd.p = irq_data_get_irq_chip_data(data);
+	mask = 1ull << (cd.s.bit);
+
+	en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(coreid) + (0x1000ull * cd.s.line);
+	cvmx_write_csr(en_addr, mask);
+}
+
+static void octeon_irq_ciu2_enable_local(struct irq_data *data)
+{
+	u64 mask;
+	u64 en_addr;
+	int coreid = cvmx_get_core_num();
+	union octeon_ciu_chip_data cd;
+
+	cd.p = irq_data_get_irq_chip_data(data);
+	mask = 1ull << (cd.s.bit);
+
+	en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(coreid) + (0x1000ull * cd.s.line);
+	cvmx_write_csr(en_addr, mask);
+
+}
+
+static void octeon_irq_ciu2_disable_local(struct irq_data *data)
+{
+	u64 mask;
+	u64 en_addr;
+	int coreid = cvmx_get_core_num();
+	union octeon_ciu_chip_data cd;
+
+	cd.p = irq_data_get_irq_chip_data(data);
+	mask = 1ull << (cd.s.bit);
+
+	en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(coreid) + (0x1000ull * cd.s.line);
+	cvmx_write_csr(en_addr, mask);
+
+}
+
+static void octeon_irq_ciu2_ack(struct irq_data *data)
+{
+	u64 mask;
+	u64 en_addr;
+	int coreid = cvmx_get_core_num();
+	union octeon_ciu_chip_data cd;
+
+	cd.p = irq_data_get_irq_chip_data(data);
+	mask = 1ull << (cd.s.bit);
+
+	en_addr = CVMX_CIU2_RAW_PPX_IP2_WRKQ(coreid) + (0x1000ull * cd.s.line);
+	cvmx_write_csr(en_addr, mask);
+
+}
+
+static void octeon_irq_ciu2_disable_all(struct irq_data *data)
+{
+	int cpu;
+	u64 mask;
+	union octeon_ciu_chip_data cd;
+
+	cd.p = irq_data_get_irq_chip_data(data);
+	mask = 1ull << (cd.s.bit);
+
+	for_each_online_cpu(cpu) {
+		u64 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(octeon_coreid_for_cpu(cpu)) + (0x1000ull * cd.s.line);
+		cvmx_write_csr(en_addr, mask);
+	}
+}
+
+static void octeon_irq_ciu2_mbox_enable_all(struct irq_data *data)
+{
+	int cpu;
+	u64 mask;
+
+	mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);
+
+	for_each_online_cpu(cpu) {
+		u64 en_addr = CVMX_CIU2_EN_PPX_IP3_MBOX_W1S(octeon_coreid_for_cpu(cpu));
+		cvmx_write_csr(en_addr, mask);
+	}
+}
+
+static void octeon_irq_ciu2_mbox_disable_all(struct irq_data *data)
+{
+	int cpu;
+	u64 mask;
+
+	mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);
+
+	for_each_online_cpu(cpu) {
+		u64 en_addr = CVMX_CIU2_EN_PPX_IP3_MBOX_W1C(octeon_coreid_for_cpu(cpu));
+		cvmx_write_csr(en_addr, mask);
+	}
+}
+
+static void octeon_irq_ciu2_mbox_enable_local(struct irq_data *data)
+{
+	u64 mask;
+	u64 en_addr;
+	int coreid = cvmx_get_core_num();
+
+	mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);
+	en_addr = CVMX_CIU2_EN_PPX_IP3_MBOX_W1S(coreid);
+	cvmx_write_csr(en_addr, mask);
+}
+
+static void octeon_irq_ciu2_mbox_disable_local(struct irq_data *data)
+{
+	u64 mask;
+	u64 en_addr;
+	int coreid = cvmx_get_core_num();
+
+	mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);
+	en_addr = CVMX_CIU2_EN_PPX_IP3_MBOX_W1C(coreid);
+	cvmx_write_csr(en_addr, mask);
+}
+
+#ifdef CONFIG_SMP
+static int octeon_irq_ciu2_set_affinity(struct irq_data *data,
+					const struct cpumask *dest, bool force)
+{
+	int cpu;
+	bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data);
+	u64 mask;
+	union octeon_ciu_chip_data cd;
+
+	if (!enable_one)
+		return 0;
+
+	cd.p = irq_data_get_irq_chip_data(data);
+	mask = 1ull << cd.s.bit;
+
+	for_each_online_cpu(cpu) {
+		u64 en_addr;
+		if (cpumask_test_cpu(cpu, dest) && enable_one) {
+			enable_one = false;
+			en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(octeon_coreid_for_cpu(cpu)) + (0x1000ull * cd.s.line);
+		} else {
+			en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(octeon_coreid_for_cpu(cpu)) + (0x1000ull * cd.s.line);
+		}
+		cvmx_write_csr(en_addr, mask);
+	}
+
+	return 0;
+}
+#endif
+
+static void octeon_irq_ciu2_enable_gpio(struct irq_data *data)
+{
+	octeon_irq_gpio_setup(data);
+	octeon_irq_ciu2_enable(data);
+}
+
+static void octeon_irq_ciu2_disable_gpio(struct irq_data *data)
+{
+	union octeon_ciu_chip_data cd;
+	cd.p = irq_data_get_irq_chip_data(data);
+
+	cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.gpio_line), 0);
+
+	octeon_irq_ciu2_disable_all(data);
+}
+
+static struct irq_chip octeon_irq_chip_ciu2 = {
+	.name = "CIU2-E",
+	.irq_enable = octeon_irq_ciu2_enable,
+	.irq_disable = octeon_irq_ciu2_disable_all,
+	.irq_ack = octeon_irq_ciu2_ack,
+	.irq_mask = octeon_irq_ciu2_disable_local,
+	.irq_unmask = octeon_irq_ciu2_enable,
+#ifdef CONFIG_SMP
+	.irq_set_affinity = octeon_irq_ciu2_set_affinity,
+	.irq_cpu_offline = octeon_irq_cpu_offline_ciu,
+#endif
+};
+
+static struct irq_chip octeon_irq_chip_ciu2_mbox = {
+	.name = "CIU2-M",
+	.irq_enable = octeon_irq_ciu2_mbox_enable_all,
+	.irq_disable = octeon_irq_ciu2_mbox_disable_all,
+	.irq_ack = octeon_irq_ciu2_mbox_disable_local,
+	.irq_eoi = octeon_irq_ciu2_mbox_enable_local,
+
+	.irq_cpu_online = octeon_irq_ciu2_mbox_enable_local,
+	.irq_cpu_offline = octeon_irq_ciu2_mbox_disable_local,
+	.flags = IRQCHIP_ONOFFLINE_ENABLED,
+};
+
+static struct irq_chip octeon_irq_chip_ciu2_wd = {
+	.name = "CIU2-W",
+	.irq_enable = octeon_irq_ciu2_wd_enable,
+	.irq_disable = octeon_irq_ciu2_disable_all,
+	.irq_mask = octeon_irq_ciu2_disable_local,
+	.irq_unmask = octeon_irq_ciu2_enable_local,
+};
+
+static struct irq_chip octeon_irq_chip_ciu2_gpio = {
+	.name = "CIU-GPIO",
+	.irq_enable = octeon_irq_ciu2_enable_gpio,
+	.irq_disable = octeon_irq_ciu2_disable_gpio,
+	.irq_ack = octeon_irq_ciu_gpio_ack,
+	.irq_mask = octeon_irq_ciu2_disable_local,
+	.irq_unmask = octeon_irq_ciu2_enable,
+	.irq_set_type = octeon_irq_ciu_gpio_set_type,
+#ifdef CONFIG_SMP
+	.irq_set_affinity = octeon_irq_ciu2_set_affinity,
+	.irq_cpu_offline = octeon_irq_cpu_offline_ciu,
+#endif
+	.flags = IRQCHIP_SET_TYPE_MASKED,
+};
+
+static int octeon_irq_ciu2_xlat(struct irq_domain *d,
+				struct device_node *node,
+				const u32 *intspec,
+				unsigned int intsize,
+				unsigned long *out_hwirq,
+				unsigned int *out_type)
+{
+	unsigned int ciu, bit;
+
+	ciu = intspec[0];
+	bit = intspec[1];
+
+	/* Line 7  are the GPIO lines */
+	if (ciu > 6 || bit > 63)
+		return -EINVAL;
+
+	*out_hwirq = (ciu << 6) | bit;
+	*out_type = 0;
+
+	return 0;
+}
+
+static bool octeon_irq_ciu2_is_edge(unsigned int line, unsigned int bit)
+{
+	bool edge = false;
+
+	if (line == 3) /* MIO */
+		switch (bit) {
+		case 2:  /* IPD_DRP */
+		case 8 ... 11: /* Timers */
+		case 48: /* PTP */
+			edge = true;
+			break;
+		default:
+			break;
+		}
+	else if (line == 6) /* PKT */
+		switch (bit) {
+		case 52 ... 53: /* ILK_DRP */
+		case 8 ... 12:  /* GMX_DRP */
+			edge = true;
+			break;
+		default:
+			break;
+		}
+	return edge;
+}
+
+static int octeon_irq_ciu2_map(struct irq_domain *d,
+			       unsigned int virq, irq_hw_number_t hw)
+{
+	unsigned int line = hw >> 6;
+	unsigned int bit = hw & 63;
+
+	if (!octeon_irq_virq_in_range(virq))
+		return -EINVAL;
+
+	/* Line 7  are the GPIO lines */
+	if (line > 6 || octeon_irq_ciu_to_irq[line][bit] != 0)
+		return -EINVAL;
+
+	if (octeon_irq_ciu2_is_edge(line, bit))
+		octeon_irq_set_ciu_mapping(virq, line, bit, 0,
+					   &octeon_irq_chip_ciu2,
+					   handle_edge_irq);
+	else
+		octeon_irq_set_ciu_mapping(virq, line, bit, 0,
+					   &octeon_irq_chip_ciu2,
+					   handle_level_irq);
+
+	return 0;
+}
+static int octeon_irq_ciu2_gpio_map(struct irq_domain *d,
+				    unsigned int virq, irq_hw_number_t hw)
+{
+	return octeon_irq_gpio_map_common(d, virq, hw, 7, &octeon_irq_chip_ciu2_gpio);
+}
+
+static struct irq_domain_ops octeon_irq_domain_ciu2_ops = {
+	.map = octeon_irq_ciu2_map,
+	.xlate = octeon_irq_ciu2_xlat,
+};
+
+static struct irq_domain_ops octeon_irq_domain_ciu2_gpio_ops = {
+	.map = octeon_irq_ciu2_gpio_map,
+	.xlate = octeon_irq_gpio_xlat,
+};
+
+static void octeon_irq_ciu2(void)
+{
+	int line;
+	int bit;
+	int irq;
+	u64 src_reg, src, sum;
+	const unsigned long core_id = cvmx_get_core_num();
+
+	sum = cvmx_read_csr(CVMX_CIU2_SUM_PPX_IP2(core_id)) & 0xfful;
+
+	if (unlikely(!sum))
+		goto spurious;
+
+	line = fls64(sum) - 1;
+	src_reg = CVMX_CIU2_SRC_PPX_IP2_WRKQ(core_id) + (0x1000 * line);
+	src = cvmx_read_csr(src_reg);
+
+	if (unlikely(!src))
+		goto spurious;
+
+	bit = fls64(src) - 1;
+	irq = octeon_irq_ciu_to_irq[line][bit];
+	if (unlikely(!irq))
+		goto spurious;
+
+	do_IRQ(irq);
+	goto out;
+
+spurious:
+	spurious_interrupt();
+out:
+	/* CN68XX pass 1.x has an errata that accessing the ACK registers
+		can stop interrupts from propagating */
+	if (OCTEON_IS_MODEL(OCTEON_CN68XX))
+		cvmx_read_csr(CVMX_CIU2_INTR_CIU_READY);
+	else
+		cvmx_read_csr(CVMX_CIU2_ACK_PPX_IP2(core_id));
+	return;
+}
+
+static void octeon_irq_ciu2_mbox(void)
+{
+	int line;
+
+	const unsigned long core_id = cvmx_get_core_num();
+	u64 sum = cvmx_read_csr(CVMX_CIU2_SUM_PPX_IP3(core_id)) >> 60;
+
+	if (unlikely(!sum))
+		goto spurious;
+
+	line = fls64(sum) - 1;
+
+	do_IRQ(OCTEON_IRQ_MBOX0 + line);
+	goto out;
+
+spurious:
+	spurious_interrupt();
+out:
+	/* CN68XX pass 1.x has an errata that accessing the ACK registers
+		can stop interrupts from propagating */
+	if (OCTEON_IS_MODEL(OCTEON_CN68XX))
+		cvmx_read_csr(CVMX_CIU2_INTR_CIU_READY);
+	else
+		cvmx_read_csr(CVMX_CIU2_ACK_PPX_IP3(core_id));
+	return;
+}
+
+static void __init octeon_irq_init_ciu2(void)
+{
+	unsigned int i;
+	struct device_node *gpio_node;
+	struct device_node *ciu_node;
+	struct irq_domain *ciu_domain = NULL;
+
+	octeon_irq_init_ciu2_percpu();
+	octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu2;
+
+	octeon_irq_ip2 = octeon_irq_ciu2;
+	octeon_irq_ip3 = octeon_irq_ciu2_mbox;
+	octeon_irq_ip4 = octeon_irq_ip4_mask;
+
+	/* Mips internal */
+	octeon_irq_init_core();
+
+	gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio");
+	if (gpio_node) {
+		struct octeon_irq_gpio_domain_data *gpiod;
+
+		gpiod = kzalloc(sizeof(*gpiod), GFP_KERNEL);
+		if (gpiod) {
+			/* gpio domain host_data is the base hwirq number. */
+			gpiod->base_hwirq = 7 << 6;
+			irq_domain_add_linear(gpio_node, 16, &octeon_irq_domain_ciu2_gpio_ops, gpiod);
+			of_node_put(gpio_node);
+		} else
+			pr_warn("Cannot allocate memory for GPIO irq_domain.\n");
+	} else
+		pr_warn("Cannot find device node for cavium,octeon-3860-gpio.\n");
+
+	ciu_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-6880-ciu2");
+	if (ciu_node) {
+		ciu_domain = irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu2_ops, NULL);
+		irq_set_default_host(ciu_domain);
+		of_node_put(ciu_node);
+	} else
+		panic("Cannot find device node for cavium,octeon-6880-ciu2.");
+
+	/* CUI2 */
+	for (i = 0; i < 64; i++)
+		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_WORKQ0, 0, i);
+
+	for (i = 0; i < 32; i++)
+		octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i, 0,
+					   &octeon_irq_chip_ciu2_wd, handle_level_irq);
+
+	for (i = 0; i < 4; i++)
+		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_TIMER0, 3, i + 8);
+
+	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 3, 44);
+
+	for (i = 0; i < 4; i++)
+		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_INT0, 4, i);
+
+	for (i = 0; i < 4; i++)
+		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 4, i + 8);
+
+	irq_set_chip_and_handler(OCTEON_IRQ_MBOX0, &octeon_irq_chip_ciu2_mbox, handle_percpu_irq);
+	irq_set_chip_and_handler(OCTEON_IRQ_MBOX1, &octeon_irq_chip_ciu2_mbox, handle_percpu_irq);
+	irq_set_chip_and_handler(OCTEON_IRQ_MBOX2, &octeon_irq_chip_ciu2_mbox, handle_percpu_irq);
+	irq_set_chip_and_handler(OCTEON_IRQ_MBOX3, &octeon_irq_chip_ciu2_mbox, handle_percpu_irq);
+
+	/* Enable the CIU lines */
+	set_c0_status(STATUSF_IP3 | STATUSF_IP2);
+	clear_c0_status(STATUSF_IP4);
+}
+
 void __init arch_init_irq(void)
 {
 #ifdef CONFIG_SMP
@@ -1233,7 +1746,10 @@ void __init arch_init_irq(void)
 	cpumask_clear(irq_default_affinity);
 	cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
 #endif
-	octeon_irq_init_ciu();
+	if (OCTEON_IS_MODEL(OCTEON_CN68XX))
+		octeon_irq_init_ciu2();
+	else
+		octeon_irq_init_ciu();
 }
 
 asmlinkage void plat_irq_dispatch(void)
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 919b0fb7bb1..04dd8ff0e0d 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -548,6 +548,8 @@ void __init prom_init(void)
 	}
 #endif
 
+	octeon_setup_delays();
+
 	/*
 	 * BIST should always be enabled when doing a soft reset. L2
 	 * Cache locking for instance is not cleared unless BIST is
@@ -611,7 +613,6 @@ void __init prom_init(void)
 	mips_hpt_frequency = octeon_get_clock_rate();
 
 	octeon_init_cvmcount();
-	octeon_setup_delays();
 
 	_machine_restart = octeon_restart;
 	_machine_halt = octeon_halt;
diff --git a/arch/mips/configs/cavium-octeon_defconfig b/arch/mips/configs/cavium_octeon_defconfig
index 75165dfa60c..75165dfa60c 100644
--- a/arch/mips/configs/cavium-octeon_defconfig
+++ b/arch/mips/configs/cavium_octeon_defconfig
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
deleted file mode 100644
index 1f69249b839..00000000000
--- a/arch/mips/configs/db1200_defconfig
+++ /dev/null
@@ -1,170 +0,0 @@
-CONFIG_MIPS_ALCHEMY=y
-CONFIG_MIPS_DB1200=y
-CONFIG_KSM=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_HZ_100=y
-# CONFIG_SECCOMP is not set
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="-db1200"
-CONFIG_KERNEL_LZMA=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_TINY_RCU=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-# CONFIG_SYSCTL_SYSCALL is not set
-# CONFIG_KALLSYMS is not set
-# CONFIG_PCSPKR_PLATFORM is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y
-CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
-CONFIG_BINFMT_MISC=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_UB=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_IDE_TASK_IOCTL=y
-# CONFIG_IDE_PROC_FS is not set
-CONFIG_BLK_DEV_IDE_AU1XXX=y
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMC91X=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
-CONFIG_I2C_CHARDEV=y
-# CONFIG_I2C_HELPER_AUTO is not set
-CONFIG_I2C_AU1550=y
-CONFIG_SPI=y
-CONFIG_SPI_AU1550=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_SYSFS=y
-CONFIG_SENSORS_ADM1025=y
-CONFIG_SENSORS_LM70=y
-CONFIG_FB=y
-CONFIG_FB_AU1200=y
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_8x16=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_DYNAMIC_MINORS=y
-# CONFIG_SND_SUPPORT_OLD_API is not set
-# CONFIG_SND_VERBOSE_PROCFS is not set
-# CONFIG_SND_DRIVERS is not set
-# CONFIG_SND_SPI is not set
-# CONFIG_SND_MIPS is not set
-# CONFIG_SND_USB is not set
-# CONFIG_SND_PCMCIA is not set
-CONFIG_SND_SOC=y
-CONFIG_SND_SOC_AU1XPSC=y
-CONFIG_SND_SOC_DB1200=y
-CONFIG_HIDRAW=y
-CONFIG_USB_HIDDEV=y
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_MMC=y
-# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_MMC_AU1X=y
-CONFIG_NEW_LEDS=y
-CONFIG_LEDS_CLASS=y
-CONFIG_LEDS_TRIGGERS=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AU1XXX=y
-CONFIG_EXT2_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_SQUASHFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_EFI_PARTITION=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_CODEPAGE_1250=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_FTRACE is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyS0,115200"
-CONFIG_DEBUG_ZBOOT=y
-CONFIG_KEYS=y
-CONFIG_KEYS_DEBUG_PROC_KEYS=y
-CONFIG_SECURITYFS=y
diff --git a/arch/mips/configs/db1235_defconfig b/arch/mips/configs/db1235_defconfig
new file mode 100644
index 00000000000..c48998ffd19
--- /dev/null
+++ b/arch/mips/configs/db1235_defconfig
@@ -0,0 +1,434 @@
+CONFIG_MIPS_ALCHEMY=y
+CONFIG_MIPS_DB1235=y
+CONFIG_COMPACTION=y
+CONFIG_KSM=y
+CONFIG_HZ_100=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_LOCALVERSION="-db1235"
+CONFIG_KERNEL_LZMA=y
+CONFIG_DEFAULT_HOSTNAME="db1235"
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_FHANDLE=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_AUDIT=y
+CONFIG_AUDIT_LOGINUID_IMMUTABLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_NAMESPACES=y
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_JUMP_LABEL=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_LDM_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_PCI=y
+CONFIG_PCCARD=y
+CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y
+CONFIG_PM_RUNTIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_UNIX_DIAG=y
+CONFIG_XFRM_USER=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+CONFIG_NET_IPGRE_DEMUX=y
+CONFIG_NET_IPGRE=y
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_ARPD=y
+CONFIG_SYN_COOKIES=y
+CONFIG_NET_IPVTI=y
+CONFIG_INET_AH=y
+CONFIG_INET_ESP=y
+CONFIG_INET_IPCOMP=y
+CONFIG_INET_UDP_DIAG=y
+CONFIG_TCP_CONG_ADVANCED=y
+CONFIG_TCP_CONG_HSTCP=y
+CONFIG_TCP_CONG_HYBLA=y
+CONFIG_TCP_CONG_SCALABLE=y
+CONFIG_TCP_CONG_LP=y
+CONFIG_TCP_CONG_VENO=y
+CONFIG_TCP_CONG_YEAH=y
+CONFIG_TCP_CONG_ILLINOIS=y
+CONFIG_DEFAULT_HYBLA=y
+CONFIG_TCP_MD5SIG=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+CONFIG_IPV6_ROUTE_INFO=y
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=y
+CONFIG_IPV6_SIT_6RD=y
+CONFIG_IPV6_TUNNEL=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+CONFIG_IPV6_SUBTREES=y
+CONFIG_IPV6_MROUTE=y
+CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y
+CONFIG_IPV6_PIMSM_V2=y
+CONFIG_NETFILTER=y
+CONFIG_NF_CONNTRACK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+CONFIG_NF_CONNTRACK_TIMEOUT=y
+CONFIG_NF_CONNTRACK_TIMESTAMP=y
+CONFIG_NF_CT_PROTO_DCCP=y
+CONFIG_NF_CT_PROTO_SCTP=y
+CONFIG_NF_CT_PROTO_UDPLITE=y
+CONFIG_NF_CONNTRACK_AMANDA=y
+CONFIG_NF_CONNTRACK_FTP=y
+CONFIG_NF_CONNTRACK_H323=y
+CONFIG_NF_CONNTRACK_IRC=y
+CONFIG_NF_CONNTRACK_NETBIOS_NS=y
+CONFIG_NF_CONNTRACK_SNMP=y
+CONFIG_NF_CONNTRACK_PPTP=y
+CONFIG_NF_CONNTRACK_SANE=y
+CONFIG_NF_CONNTRACK_SIP=y
+CONFIG_NF_CONNTRACK_TFTP=y
+CONFIG_NF_CT_NETLINK=y
+CONFIG_NF_CT_NETLINK_TIMEOUT=y
+CONFIG_NF_CT_NETLINK_HELPER=y
+CONFIG_NETFILTER_NETLINK_QUEUE_CT=y
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
+CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+CONFIG_NETFILTER_XT_TARGET_HMARK=y
+CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+CONFIG_NETFILTER_XT_TARGET_LED=y
+CONFIG_NETFILTER_XT_TARGET_LOG=y
+CONFIG_NETFILTER_XT_TARGET_MARK=y
+CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+CONFIG_NETFILTER_XT_TARGET_TEE=y
+CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
+CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
+CONFIG_NETFILTER_XT_MATCH_CLUSTER=y
+CONFIG_NETFILTER_XT_MATCH_COMMENT=y
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y
+CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
+CONFIG_NETFILTER_XT_MATCH_CPU=y
+CONFIG_NETFILTER_XT_MATCH_DCCP=y
+CONFIG_NETFILTER_XT_MATCH_DEVGROUP=y
+CONFIG_NETFILTER_XT_MATCH_DSCP=y
+CONFIG_NETFILTER_XT_MATCH_ESP=y
+CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
+CONFIG_NETFILTER_XT_MATCH_HELPER=y
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
+CONFIG_NETFILTER_XT_MATCH_LENGTH=y
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MARK=y
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
+CONFIG_NETFILTER_XT_MATCH_NFACCT=y
+CONFIG_NETFILTER_XT_MATCH_OSF=y
+CONFIG_NETFILTER_XT_MATCH_OWNER=y
+CONFIG_NETFILTER_XT_MATCH_POLICY=y
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=y
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
+CONFIG_NETFILTER_XT_MATCH_QUOTA=y
+CONFIG_NETFILTER_XT_MATCH_RATEEST=y
+CONFIG_NETFILTER_XT_MATCH_REALM=y
+CONFIG_NETFILTER_XT_MATCH_RECENT=y
+CONFIG_NETFILTER_XT_MATCH_SCTP=y
+CONFIG_NETFILTER_XT_MATCH_STATE=y
+CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
+CONFIG_NETFILTER_XT_MATCH_STRING=y
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=y
+CONFIG_NETFILTER_XT_MATCH_TIME=y
+CONFIG_NETFILTER_XT_MATCH_U32=y
+CONFIG_NF_CONNTRACK_IPV4=y
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_MATCH_AH=y
+CONFIG_IP_NF_MATCH_ECN=y
+CONFIG_IP_NF_MATCH_RPFILTER=y
+CONFIG_IP_NF_MATCH_TTL=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_TARGET_ULOG=y
+CONFIG_NF_NAT=y
+CONFIG_IP_NF_TARGET_MASQUERADE=y
+CONFIG_IP_NF_TARGET_NETMAP=y
+CONFIG_IP_NF_TARGET_REDIRECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_IP_NF_TARGET_CLUSTERIP=y
+CONFIG_IP_NF_TARGET_ECN=y
+CONFIG_IP_NF_TARGET_TTL=y
+CONFIG_IP_NF_RAW=y
+CONFIG_IP_NF_ARPTABLES=y
+CONFIG_IP_NF_ARPFILTER=y
+CONFIG_IP_NF_ARP_MANGLE=y
+CONFIG_NF_CONNTRACK_IPV6=y
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_MATCH_AH=y
+CONFIG_IP6_NF_MATCH_EUI64=y
+CONFIG_IP6_NF_MATCH_FRAG=y
+CONFIG_IP6_NF_MATCH_OPTS=y
+CONFIG_IP6_NF_MATCH_HL=y
+CONFIG_IP6_NF_MATCH_IPV6HEADER=y
+CONFIG_IP6_NF_MATCH_MH=y
+CONFIG_IP6_NF_MATCH_RPFILTER=y
+CONFIG_IP6_NF_MATCH_RT=y
+CONFIG_IP6_NF_TARGET_HL=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_IP6_NF_RAW=y
+CONFIG_BRIDGE_NF_EBTABLES=y
+CONFIG_BRIDGE_EBT_BROUTE=y
+CONFIG_BRIDGE_EBT_T_FILTER=y
+CONFIG_BRIDGE_EBT_T_NAT=y
+CONFIG_BRIDGE_EBT_802_3=y
+CONFIG_BRIDGE_EBT_AMONG=y
+CONFIG_BRIDGE_EBT_ARP=y
+CONFIG_BRIDGE_EBT_IP=y
+CONFIG_BRIDGE_EBT_IP6=y
+CONFIG_BRIDGE_EBT_LIMIT=y
+CONFIG_BRIDGE_EBT_MARK=y
+CONFIG_BRIDGE_EBT_PKTTYPE=y
+CONFIG_BRIDGE_EBT_STP=y
+CONFIG_BRIDGE_EBT_VLAN=y
+CONFIG_BRIDGE_EBT_ARPREPLY=y
+CONFIG_BRIDGE_EBT_DNAT=y
+CONFIG_BRIDGE_EBT_MARK_T=y
+CONFIG_BRIDGE_EBT_REDIRECT=y
+CONFIG_BRIDGE_EBT_SNAT=y
+CONFIG_BRIDGE_EBT_LOG=y
+CONFIG_BRIDGE_EBT_NFLOG=y
+CONFIG_L2TP=y
+CONFIG_L2TP_V3=y
+CONFIG_L2TP_IP=y
+CONFIG_L2TP_ETH=y
+CONFIG_BRIDGE=y
+CONFIG_VLAN_8021Q=y
+CONFIG_VLAN_8021Q_GVRP=y
+CONFIG_LLC2=y
+CONFIG_NET_SCHED=y
+CONFIG_NET_SCH_CBQ=y
+CONFIG_NET_SCH_HTB=y
+CONFIG_NET_SCH_HFSC=y
+CONFIG_NET_SCH_PRIO=y
+CONFIG_NET_SCH_MULTIQ=y
+CONFIG_NET_SCH_RED=y
+CONFIG_NET_SCH_SFB=y
+CONFIG_NET_SCH_SFQ=y
+CONFIG_NET_SCH_TEQL=y
+CONFIG_NET_SCH_TBF=y
+CONFIG_NET_SCH_GRED=y
+CONFIG_NET_SCH_DSMARK=y
+CONFIG_NET_SCH_NETEM=y
+CONFIG_NET_SCH_DRR=y
+CONFIG_NET_SCH_MQPRIO=y
+CONFIG_NET_SCH_CHOKE=y
+CONFIG_NET_SCH_QFQ=y
+CONFIG_NET_SCH_CODEL=y
+CONFIG_NET_SCH_FQ_CODEL=y
+CONFIG_NET_SCH_INGRESS=y
+CONFIG_NET_SCH_PLUG=y
+CONFIG_NET_CLS_BASIC=y
+CONFIG_NET_CLS_TCINDEX=y
+CONFIG_NET_CLS_ROUTE4=y
+CONFIG_NET_CLS_FW=y
+CONFIG_NET_CLS_U32=y
+CONFIG_CLS_U32_PERF=y
+CONFIG_CLS_U32_MARK=y
+CONFIG_NET_CLS_RSVP=y
+CONFIG_NET_CLS_RSVP6=y
+CONFIG_NET_CLS_FLOW=y
+CONFIG_NET_EMATCH=y
+CONFIG_NET_EMATCH_CMP=y
+CONFIG_NET_EMATCH_NBYTE=y
+CONFIG_NET_EMATCH_U32=y
+CONFIG_NET_EMATCH_META=y
+CONFIG_NET_EMATCH_TEXT=y
+CONFIG_NET_CLS_ACT=y
+CONFIG_NET_ACT_POLICE=y
+CONFIG_NET_ACT_GACT=y
+CONFIG_GACT_PROB=y
+CONFIG_NET_ACT_MIRRED=y
+CONFIG_NET_ACT_NAT=y
+CONFIG_NET_ACT_PEDIT=y
+CONFIG_NET_ACT_SIMP=y
+CONFIG_NET_ACT_SKBEDIT=y
+CONFIG_NET_ACT_CSUM=y
+CONFIG_NET_CLS_IND=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_HCIBTUSB=y
+CONFIG_CFG80211=y
+CONFIG_CFG80211_CERTIFICATION_ONUS=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_MAC80211=y
+CONFIG_MAC80211_LEDS=y
+CONFIG_RFKILL=y
+CONFIG_RFKILL_INPUT=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_MTD=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_PLATFORM=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE_AU1XXX=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+CONFIG_SCSI_MULTI_LUN=y
+CONFIG_ATA=y
+CONFIG_PATA_HPT37X=y
+CONFIG_PATA_PCMCIA=y
+CONFIG_PATA_PLATFORM=y
+CONFIG_NETDEVICES=y
+CONFIG_MIPS_AU1X00_ENET=y
+CONFIG_SMC91X=y
+CONFIG_SMSC911X=y
+CONFIG_AMD_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_RT2X00=y
+CONFIG_RT73USB=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_TOUCHSCREEN=y
+CONFIG_TOUCHSCREEN_WM97XX=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_TTY_PRINTK=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_AU1550=y
+CONFIG_SPI=y
+CONFIG_SPI_AU1550=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_SENSORS_ADM1025=y
+CONFIG_SENSORS_LM70=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_HRTIMER=y
+CONFIG_SND_DYNAMIC_MINORS=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_AU1XPSC=y
+CONFIG_SND_SOC_DB1200=y
+CONFIG_HIDRAW=y
+CONFIG_UHID=y
+CONFIG_USB_HIDDEV=y
+CONFIG_USB=y
+CONFIG_USB_DYNAMIC_MINORS=y
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_CLKGATE=y
+CONFIG_MMC_AU1X=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_AU1XXX=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_XFS_FS=y
+CONFIG_XFS_POSIX_ACL=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_SUMMARY=y
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_CMODE_FAVOURLZO=y
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_LZO=y
+CONFIG_SQUASHFS_XZ=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3_ACL=y
+CONFIG_NFSD_V4=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_CODEPAGE_852=y
+CONFIG_NLS_CODEPAGE_1250=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_UTF8=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_STRIP_ASM_SYMS=y
+CONFIG_SECURITYFS=y
+CONFIG_CRYPTO_USER=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_CRYPTD=y
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_CTS=y
+CONFIG_CRYPTO_LRW=y
+CONFIG_CRYPTO_PCBC=y
+CONFIG_CRYPTO_XTS=y
+CONFIG_CRYPTO_XCBC=y
+CONFIG_CRYPTO_VMAC=y
+CONFIG_CRYPTO_MD4=y
+CONFIG_CRYPTO_MICHAEL_MIC=y
+CONFIG_CRYPTO_RMD128=y
+CONFIG_CRYPTO_RMD160=y
+CONFIG_CRYPTO_RMD256=y
+CONFIG_CRYPTO_RMD320=y
+CONFIG_CRYPTO_SHA256=y
+CONFIG_CRYPTO_SHA512=y
+CONFIG_CRYPTO_TGR192=y
+CONFIG_CRYPTO_WP512=y
+CONFIG_CRYPTO_ANUBIS=y
+CONFIG_CRYPTO_BLOWFISH=y
+CONFIG_CRYPTO_CAMELLIA=y
+CONFIG_CRYPTO_CAST5=y
+CONFIG_CRYPTO_CAST6=y
+CONFIG_CRYPTO_FCRYPT=y
+CONFIG_CRYPTO_KHAZAD=y
+CONFIG_CRYPTO_SALSA20=y
+CONFIG_CRYPTO_SEED=y
+CONFIG_CRYPTO_SERPENT=y
+CONFIG_CRYPTO_TEA=y
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_ZLIB=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_USER_API_HASH=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
diff --git a/arch/mips/configs/db1300_defconfig b/arch/mips/configs/db1300_defconfig
deleted file mode 100644
index 3590ab5d979..00000000000
--- a/arch/mips/configs/db1300_defconfig
+++ /dev/null
@@ -1,391 +0,0 @@
-CONFIG_MIPS=y
-CONFIG_MIPS_ALCHEMY=y
-CONFIG_ALCHEMY_GPIOINT_AU1300=y
-CONFIG_MIPS_DB1300=y
-CONFIG_SOC_AU1300=y
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-CONFIG_ARCH_SUPPORTS_OPROFILE=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_SCHED_OMIT_FRAME_POINTER=y
-CONFIG_CEVT_R4K_LIB=y
-CONFIG_CSRC_R4K_LIB=y
-CONFIG_DMA_COHERENT=y
-CONFIG_SYS_HAS_EARLY_PRINTK=y
-CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-CONFIG_CPU_MIPS32_R1=y
-CONFIG_SYS_SUPPORTS_ZBOOT=y
-CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPSR1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_HARDWARE_WATCHPOINTS=y
-CONFIG_32BIT=y
-CONFIG_PAGE_SIZE_4KB=y
-CONFIG_FORCE_MAX_ZONEORDER=11
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_MIPS_MT_DISABLED=y
-CONFIG_64BIT_PHYS_ADDR=y
-CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_ARCH_POPULATES_NODE_MAP=y
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-CONFIG_PAGEFLAGS_EXTENDED=y
-CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_COMPACTION=y
-CONFIG_MIGRATION=y
-CONFIG_PHYS_ADDR_T_64BIT=y
-CONFIG_ZONE_DMA_FLAG=0
-CONFIG_VIRT_TO_BUS=y
-CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
-CONFIG_NEED_PER_CPU_KM=y
-CONFIG_TICK_ONESHOT=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-CONFIG_HZ_100=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_HZ=100
-CONFIG_PREEMPT_NONE=y
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-CONFIG_CONSTRUCTORS=y
-CONFIG_HAVE_IRQ_WORK=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_CROSS_COMPILE=""
-CONFIG_LOCALVERSION="-db1300"
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_HAVE_KERNEL_GZIP=y
-CONFIG_HAVE_KERNEL_BZIP2=y
-CONFIG_HAVE_KERNEL_LZMA=y
-CONFIG_HAVE_KERNEL_LZO=y
-CONFIG_KERNEL_LZMA=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_POSIX_MQUEUE_SYSCTL=y
-CONFIG_FHANDLE=y
-CONFIG_HAVE_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_TINY_RCU=y
-CONFIG_LOG_BUF_SHIFT=19
-CONFIG_NAMESPACES=y
-CONFIG_UTS_NS=y
-CONFIG_IPC_NS=y
-CONFIG_USER_NS=y
-CONFIG_PID_NS=y
-CONFIG_NET_NS=y
-CONFIG_SYSCTL=y
-CONFIG_ANON_INODES=y
-CONFIG_EXPERT=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_AIO=y
-CONFIG_EMBEDDED=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_SLAB=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_KPROBES=y
-CONFIG_HAVE_KRETPROBES=y
-CONFIG_HAVE_DMA_ATTRS=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_SLABINFO=y
-CONFIG_RT_MUTEXES=y
-CONFIG_BASE_SMALL=0
-CONFIG_BLOCK=y
-CONFIG_LBDAF=y
-CONFIG_BLK_DEV_BSG=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_DEFAULT_NOOP=y
-CONFIG_DEFAULT_IOSCHED="noop"
-# CONFIG_UNINLINE_SPIN_UNLOCK is not set
-CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
-CONFIG_INLINE_READ_UNLOCK=y
-CONFIG_INLINE_READ_UNLOCK_IRQ=y
-CONFIG_INLINE_WRITE_UNLOCK=y
-CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
-CONFIG_MMU=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA=y
-CONFIG_PCMCIA_LOAD_CIS=y
-CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y
-CONFIG_BINFMT_ELF=y
-CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
-CONFIG_TRAD_SIGNALS=y
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_INET_TUNNEL=y
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-CONFIG_IPV6=y
-CONFIG_INET6_XFRM_MODE_TRANSPORT=y
-CONFIG_INET6_XFRM_MODE_TUNNEL=y
-CONFIG_INET6_XFRM_MODE_BEET=y
-CONFIG_IPV6_SIT=y
-CONFIG_IPV6_NDISC_NODETYPE=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
-CONFIG_FIRMWARE_IN_KERNEL=y
-CONFIG_EXTRA_FIRMWARE=""
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_IDS=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_BLK_DEV=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_UB=y
-CONFIG_HAVE_IDE=y
-CONFIG_IDE=y
-CONFIG_IDE_GD=y
-CONFIG_IDE_GD_ATA=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_IDE_TASK_IOCTL=y
-CONFIG_IDE_PROC_FS=y
-CONFIG_BLK_DEV_PLATFORM=y
-CONFIG_SCSI_MOD=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_PHYLIB=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_SMSC911X=y
-CONFIG_INPUT=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_GPIO=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_TOUCHSCREEN_WM97XX=y
-CONFIG_TOUCHSCREEN_WM9712=y
-CONFIG_TOUCHSCREEN_WM9713=y
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_UINPUT=y
-CONFIG_VT=y
-CONFIG_CONSOLE_TRANSLATIONS=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_SMBUS=y
-CONFIG_I2C_AU1550=y
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_AU1550=y
-CONFIG_SPI_BITBANG=y
-CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
-CONFIG_HWMON=y
-CONFIG_HWMON_VID=y
-CONFIG_SENSORS_ADM1025=y
-CONFIG_FB=y
-CONFIG_FB_AU1200=y
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_FONTS=y
-CONFIG_FONT_ACORN_8x8=y
-CONFIG_LOGO=y
-CONFIG_LOGO_LINUX_CLUT224=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_TIMER=y
-CONFIG_SND_PCM=y
-CONFIG_SND_JACK=y
-CONFIG_SND_HRTIMER=y
-CONFIG_SND_DYNAMIC_MINORS=y
-CONFIG_SND_VERBOSE_PROCFS=y
-CONFIG_SND_VERBOSE_PRINTK=y
-CONFIG_SND_VMASTER=y
-CONFIG_SND_AC97_CODEC=y
-CONFIG_SND_SOC=y
-CONFIG_SND_SOC_CACHE_LZO=y
-CONFIG_SND_SOC_AC97_BUS=y
-CONFIG_SND_SOC_AU1XPSC=y
-CONFIG_SND_SOC_AU1XPSC_I2S=y
-CONFIG_SND_SOC_AU1XPSC_AC97=y
-CONFIG_SND_SOC_DB1300=y
-CONFIG_SND_SOC_I2C_AND_SPI=y
-CONFIG_SND_SOC_WM8731=y
-CONFIG_SND_SOC_WM9712=y
-CONFIG_AC97_BUS=y
-CONFIG_HID_SUPPORT=y
-CONFIG_HID=y
-CONFIG_HIDRAW=y
-CONFIG_USB_HID=y
-CONFIG_USB_HIDDEV=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-CONFIG_USB_ARCH_HAS_EHCI=y
-CONFIG_USB=y
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_EHCI_TT_NEWSCHED=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_LITTLE_ENDIAN=y
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-CONFIG_RTC_DRV_AU1XXX=y
-CONFIG_EXT2_FS=y
-CONFIG_FS_POSIX_ACL=y
-CONFIG_EXPORTFS=y
-CONFIG_FILE_LOCKING=y
-CONFIG_FSNOTIFY=y
-CONFIG_DNOTIFY=y
-CONFIG_INOTIFY_USER=y
-CONFIG_GENERIC_ACL=y
-CONFIG_FAT_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-CONFIG_PROC_FS=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_PROC_PAGE_MONITOR=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_TMPFS_XATTR=y
-CONFIG_MISC_FILESYSTEMS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_WRITEBUFFER=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_JFFS2_FS_POSIX_ACL=y
-CONFIG_JFFS2_FS_SECURITY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RTIME=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_JFFS2_CMODE_PRIORITY=y
-CONFIG_SQUASHFS=y
-CONFIG_SQUASHFS_XZ=y
-CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
-CONFIG_NETWORK_FILESYSTEMS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-CONFIG_MSDOS_PARTITION=y
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-CONFIG_PRINTK_TIME=y
-CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
-CONFIG_ENABLE_WARN_DEPRECATED=y
-CONFIG_ENABLE_MUST_CHECK=y
-CONFIG_FRAME_WARN=1024
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_TRACING_SUPPORT=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="video=au1200fb:panel:bs console=tty console=ttyS2,115200"
-CONFIG_DEBUG_ZBOOT=y
-CONFIG_DEFAULT_SECURITY_DAC=y
-CONFIG_DEFAULT_SECURITY=""
-CONFIG_CRYPTO=y
-CONFIG_BITREVERSE=y
-CONFIG_CRC32=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_XZ_DEC=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
-CONFIG_NLATTR=y
-CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
deleted file mode 100644
index 36cda27725e..00000000000
--- a/arch/mips/configs/db1550_defconfig
+++ /dev/null
@@ -1,285 +0,0 @@
-CONFIG_MIPS=y
-CONFIG_MIPS_ALCHEMY=y
-CONFIG_MIPS_DB1550=y
-CONFIG_SCHED_OMIT_FRAME_POINTER=y
-CONFIG_GENERIC_GPIO=y
-CONFIG_TICK_ONESHOT=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_HZ_100=y
-CONFIG_HZ=100
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_LOCALVERSION="-db1550"
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_KERNEL_LZMA=y
-CONFIG_DEFAULT_HOSTNAME="db1550"
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_SYSVIPC_SYSCTL=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_POSIX_MQUEUE_SYSCTL=y
-CONFIG_FHANDLE=y
-CONFIG_AUDIT=y
-CONFIG_TINY_RCU=y
-CONFIG_LOG_BUF_SHIFT=18
-CONFIG_NAMESPACES=y
-CONFIG_UTS_NS=y
-CONFIG_IPC_NS=y
-CONFIG_USER_NS=y
-CONFIG_PID_NS=y
-CONFIG_NET_NS=y
-CONFIG_EXPERT=y
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_AIO=y
-CONFIG_EMBEDDED=y
-CONFIG_PCI_QUIRKS=y
-CONFIG_SLAB=y
-CONFIG_BLOCK=y
-CONFIG_LBDAF=y
-CONFIG_BLK_DEV_BSG=y
-CONFIG_BLK_DEV_BSGLIB=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_DEFAULT_NOOP=y
-CONFIG_DEFAULT_IOSCHED="noop"
-CONFIG_PCI=y
-CONFIG_PCCARD=y
-CONFIG_PCMCIA=y
-CONFIG_PCMCIA_LOAD_CIS=y
-CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y
-CONFIG_BINFMT_ELF=y
-CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
-CONFIG_BINFMT_MISC=y
-CONFIG_SUSPEND=y
-CONFIG_SUSPEND_FREEZER=y
-CONFIG_PM_SLEEP=y
-CONFIG_PM_RUNTIME=y
-CONFIG_PM=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_INET_TUNNEL=y
-CONFIG_INET_LRO=y
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-CONFIG_IPV6=y
-CONFIG_INET6_XFRM_MODE_TRANSPORT=y
-CONFIG_INET6_XFRM_MODE_TUNNEL=y
-CONFIG_INET6_XFRM_MODE_BEET=y
-CONFIG_IPV6_SIT=y
-CONFIG_IPV6_NDISC_NODETYPE=y
-CONFIG_DNS_RESOLVER=y
-CONFIG_UEVENT_HELPER_PATH=""
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
-CONFIG_FIRMWARE_IN_KERNEL=y
-CONFIG_MTD=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_UTIL=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_IDS=y
-CONFIG_MTD_NAND_PLATFORM=y
-CONFIG_MISC_DEVICES=y
-CONFIG_EEPROM_AT24=y
-CONFIG_SCSI_MOD=y
-CONFIG_SCSI=y
-CONFIG_SCSI_DMA=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_SCAN_ASYNC=y
-CONFIG_ATA=y
-CONFIG_ATA_SFF=y
-CONFIG_ATA_BMDMA=y
-CONFIG_PATA_HPT37X=y
-CONFIG_PATA_PCMCIA=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_DM=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_PHYLIB=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MIPS_AU1X00_ENET=y
-CONFIG_NET_PCMCIA=y
-CONFIG_PCMCIA_3C589=y
-CONFIG_PCMCIA_PCNET=y
-CONFIG_INPUT=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_VT=y
-CONFIG_CONSOLE_TRANSLATIONS=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
-CONFIG_DEVKMEM=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_DEVPORT=y
-CONFIG_I2C=y
-CONFIG_I2C_BOARDINFO=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_AU1550=y
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SPI_AU1550=y
-CONFIG_SPI_BITBANG=y
-CONFIG_HWMON=y
-CONFIG_SENSORS_ADM1025=y
-CONFIG_SENSORS_LM70=y
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_SOUND=y
-CONFIG_SND=y
-CONFIG_SND_TIMER=y
-CONFIG_SND_PCM=y
-CONFIG_SND_JACK=y
-CONFIG_SND_VMASTER=y
-CONFIG_SND_AC97_CODEC=y
-CONFIG_SND_SOC=y
-CONFIG_SND_SOC_AC97_BUS=y
-CONFIG_SND_SOC_AU1XPSC=y
-CONFIG_SND_SOC_AU1XPSC_I2S=y
-CONFIG_SND_SOC_AU1XPSC_AC97=y
-CONFIG_SND_SOC_DB1200=y
-CONFIG_SND_SOC_I2C_AND_SPI=y
-CONFIG_SND_SOC_AC97_CODEC=y
-CONFIG_SND_SOC_WM8731=y
-CONFIG_SND_SOC_WM9712=y
-CONFIG_AC97_BUS=y
-CONFIG_USB=y
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_EHCI_TT_NEWSCHED=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_OHCI_LITTLE_ENDIAN=y
-CONFIG_USB_UHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-CONFIG_RTC_DRV_AU1XXX=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_USE_FOR_EXT23=y
-CONFIG_EXT4_FS_XATTR=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_JBD2=y
-CONFIG_FS_MBCACHE=y
-CONFIG_FS_POSIX_ACL=y
-CONFIG_EXPORTFS=y
-CONFIG_FILE_LOCKING=y
-CONFIG_FSNOTIFY=y
-CONFIG_DNOTIFY=y
-CONFIG_INOTIFY_USER=y
-CONFIG_PROC_FS=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-CONFIG_CONFIGFS_FS=y
-CONFIG_MISC_FILESYSTEMS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_WRITEBUFFER=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RTIME=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_JFFS2_CMODE_PRIORITY=y
-CONFIG_SQUASHFS=y
-CONFIG_SQUASHFS_ZLIB=y
-CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
-CONFIG_NETWORK_FILESYSTEMS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_V4_1=y
-CONFIG_PNFS_FILE_LAYOUT=y
-CONFIG_PNFS_BLOCK=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFS_USE_KERNEL_DNS=y
-CONFIG_NFS_USE_NEW_IDMAPPER=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V2_ACL=y
-CONFIG_NFSD_V3=y
-CONFIG_NFSD_V3_ACL=y
-CONFIG_NFSD_V4=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_ACL_SUPPORT=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-CONFIG_SUNRPC_GSS=y
-CONFIG_SUNRPC_BACKCHANNEL=y
-CONFIG_MSDOS_PARTITION=y
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_CODEPAGE_1250=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
-CONFIG_FRAME_WARN=1024
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="noirqdebug console=ttyS0,115200 root=/dev/sda1 rootfstype=ext4"
-CONFIG_KEYS=y
-CONFIG_SECURITYFS=y
-CONFIG_DEFAULT_SECURITY_DAC=y
-CONFIG_BITREVERSE=y
-CONFIG_CRC16=y
-CONFIG_CRC_ITU_T=y
-CONFIG_CRC32=y
-CONFIG_AUDIT_GENERIC=y
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_LZO_COMPRESS=y
-CONFIG_LZO_DECOMPRESS=y
-CONFIG_BCH=y
-CONFIG_NLATTR=y
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
deleted file mode 100644
index b5ad7387bbb..00000000000
--- a/arch/mips/configs/mipssim_defconfig
+++ /dev/null
@@ -1,64 +0,0 @@
-CONFIG_MIPS_SIM=y
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_HZ_100=y
-# CONFIG_SECCOMP is not set
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_STANDALONE is not set
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-# CONFIG_FW_LOADER is not set
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MIPS_SIM_NET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=1
-CONFIG_SERIAL_8250_RUNTIME_UARTS=1
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_DNOTIFY is not set
-CONFIG_TMPFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_DEBUG_INFO=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp"
-# CONFIG_CRC32 is not set
diff --git a/arch/mips/configs/nlm_xlp_defconfig b/arch/mips/configs/nlm_xlp_defconfig
index 84624b17b76..5468b1c7b2a 100644
--- a/arch/mips/configs/nlm_xlp_defconfig
+++ b/arch/mips/configs/nlm_xlp_defconfig
@@ -1,14 +1,12 @@
 CONFIG_NLM_XLP_BOARD=y
 CONFIG_64BIT=y
+CONFIG_PAGE_SIZE_16KB=y
+# CONFIG_HW_PERF_EVENTS is not set
 CONFIG_KSM=y
 CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
 CONFIG_SMP=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
 # CONFIG_SECCOMP is not set
-CONFIG_USE_OF=y
 CONFIG_EXPERIMENTAL=y
-CONFIG_CROSS_COMPILE=""
 # CONFIG_LOCALVERSION_AUTO is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -19,13 +17,13 @@ CONFIG_TASK_DELAY_ACCT=y
 CONFIG_TASK_XACCT=y
 CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_AUDIT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_CGROUPS=y
 CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
-CONFIG_INITRAMFS_COMPRESSION_LZMA=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_EMBEDDED=y
 # CONFIG_COMPAT_BRK is not set
@@ -35,6 +33,29 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
 CONFIG_BLK_DEV_INTEGRITY=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_ACORN_PARTITION=y
+CONFIG_ACORN_PARTITION_ICS=y
+CONFIG_ACORN_PARTITION_RISCIX=y
+CONFIG_OSF_PARTITION=y
+CONFIG_AMIGA_PARTITION=y
+CONFIG_ATARI_PARTITION=y
+CONFIG_MAC_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_LDM_PARTITION=y
+CONFIG_SGI_PARTITION=y
+CONFIG_ULTRIX_PARTITION=y
+CONFIG_SUN_PARTITION=y
+CONFIG_KARMA_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_SYSV68_PARTITION=y
+CONFIG_PCI=y
+CONFIG_PCI_DEBUG=y
+CONFIG_PCI_REALLOC_ENABLE_AUTO=y
+CONFIG_PCI_STUB=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_BINFMT_MISC=y
 CONFIG_MIPS32_COMPAT=y
@@ -169,7 +190,6 @@ CONFIG_IP_NF_MATCH_ECN=m
 CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=m
 CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_LOG=m
 CONFIG_IP_NF_TARGET_ULOG=m
 CONFIG_NF_NAT=m
 CONFIG_IP_NF_TARGET_MASQUERADE=m
@@ -185,7 +205,6 @@ CONFIG_IP_NF_ARPTABLES=m
 CONFIG_IP_NF_ARPFILTER=m
 CONFIG_IP_NF_ARP_MANGLE=m
 CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_QUEUE=m
 CONFIG_IP6_NF_IPTABLES=m
 CONFIG_IP6_NF_MATCH_AH=m
 CONFIG_IP6_NF_MATCH_EUI64=m
@@ -196,7 +215,6 @@ CONFIG_IP6_NF_MATCH_IPV6HEADER=m
 CONFIG_IP6_NF_MATCH_MH=m
 CONFIG_IP6_NF_MATCH_RT=m
 CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_TARGET_LOG=m
 CONFIG_IP6_NF_FILTER=m
 CONFIG_IP6_NF_TARGET_REJECT=m
 CONFIG_IP6_NF_MANGLE=m
@@ -247,9 +265,6 @@ CONFIG_IPDDP_ENCAP=y
 CONFIG_IPDDP_DECAP=y
 CONFIG_X25=m
 CONFIG_LAPB=m
-CONFIG_ECONET=m
-CONFIG_ECONET_AUNUDP=y
-CONFIG_ECONET_NATIVE=y
 CONFIG_WAN_ROUTER=m
 CONFIG_PHONET=m
 CONFIG_IEEE802154=m
@@ -296,11 +311,21 @@ CONFIG_NET_ACT_SIMP=m
 CONFIG_NET_ACT_SKBEDIT=m
 CONFIG_DCB=y
 CONFIG_NET_PKTGEN=m
-# CONFIG_WIRELESS is not set
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 # CONFIG_STANDALONE is not set
 CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_LE_BYTE_SWAP=y
+CONFIG_MTD_CFI_GEOMETRY=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_CRYPTOLOOP=m
 CONFIG_BLK_DEV_NBD=m
@@ -309,7 +334,6 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
 CONFIG_CDROM_PKTCDVD=y
 CONFIG_RAID_ATTRS=m
-CONFIG_SCSI=y
 CONFIG_SCSI_TGT=m
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=m
@@ -336,6 +360,48 @@ CONFIG_SCSI_DH_EMC=m
 CONFIG_SCSI_DH_ALUA=m
 CONFIG_SCSI_OSD_INITIATOR=m
 CONFIG_SCSI_OSD_ULD=m
+CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_SIL24=y
+# CONFIG_ATA_SFF is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_ADAPTEC is not set
+# CONFIG_NET_VENDOR_ALTEON is not set
+# CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_VENDOR_ATHEROS is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_DEC is not set
+# CONFIG_NET_VENDOR_DLINK is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EXAR is not set
+# CONFIG_NET_VENDOR_HP is not set
+CONFIG_E1000E=y
+# CONFIG_NET_VENDOR_I825XX is not set
+CONFIG_SKY2=y
+# CONFIG_NET_VENDOR_MELLANOX is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MYRI is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NVIDIA is not set
+# CONFIG_NET_VENDOR_OKI is not set
+# CONFIG_NET_PACKET_ENGINE is not set
+# CONFIG_NET_VENDOR_QLOGIC is not set
+# CONFIG_NET_VENDOR_REALTEK is not set
+# CONFIG_NET_VENDOR_RDC is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SILAN is not set
+# CONFIG_NET_VENDOR_SIS is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_SUN is not set
+# CONFIG_NET_VENDOR_TEHUTI is not set
+# CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_TOSHIBA is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
 # CONFIG_INPUT_MOUSEDEV is not set
 CONFIG_INPUT_EVDEV=y
 CONFIG_INPUT_EVBUG=m
@@ -359,16 +425,23 @@ CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_SHARE_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
+CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_TIMERIOMEM=m
 CONFIG_RAW_DRIVER=m
-# CONFIG_HWMON is not set
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_OCORES=y
+CONFIG_SENSORS_LM90=y
+CONFIG_THERMAL=y
 # CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_DS1374=y
 CONFIG_UIO=y
 CONFIG_UIO_PDRV=m
 CONFIG_UIO_PDRV_GENIRQ=m
+# CONFIG_IOMMU_SUPPORT is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
@@ -380,15 +453,10 @@ CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
 CONFIG_GFS2_FS=m
-CONFIG_GFS2_FS_LOCKING_DLM=y
-CONFIG_OCFS2_FS=m
 CONFIG_BTRFS_FS=m
 CONFIG_BTRFS_FS_POSIX_ACL=y
 CONFIG_NILFS2_FS=m
 CONFIG_QUOTA_NETLINK_INTERFACE=y
-# CONFIG_PRINT_QUOTA_WARNING is not set
-CONFIG_QFMT_V1=m
-CONFIG_QFMT_V2=m
 CONFIG_AUTOFS4_FS=m
 CONFIG_FUSE_FS=y
 CONFIG_CUSE=m
@@ -414,6 +482,7 @@ CONFIG_HFSPLUS_FS=m
 CONFIG_BEFS_FS=m
 CONFIG_BFS_FS=m
 CONFIG_EFS_FS=m
+CONFIG_JFFS2_FS=y
 CONFIG_CRAMFS=m
 CONFIG_SQUASHFS=m
 CONFIG_VXFS_FS=m
@@ -426,7 +495,6 @@ CONFIG_SYSV_FS=m
 CONFIG_UFS_FS=m
 CONFIG_EXOFS_FS=m
 CONFIG_NFS_FS=m
-CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
 CONFIG_NFS_FSCACHE=y
@@ -449,25 +517,6 @@ CONFIG_NCPFS_NLS=y
 CONFIG_NCPFS_EXTRAS=y
 CONFIG_CODA_FS=m
 CONFIG_AFS_FS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_ACORN_PARTITION=y
-CONFIG_ACORN_PARTITION_ICS=y
-CONFIG_ACORN_PARTITION_RISCIX=y
-CONFIG_OSF_PARTITION=y
-CONFIG_AMIGA_PARTITION=y
-CONFIG_ATARI_PARTITION=y
-CONFIG_MAC_PARTITION=y
-CONFIG_BSD_DISKLABEL=y
-CONFIG_MINIX_SUBPARTITION=y
-CONFIG_SOLARIS_X86_PARTITION=y
-CONFIG_UNIXWARE_DISKLABEL=y
-CONFIG_LDM_PARTITION=y
-CONFIG_SGI_PARTITION=y
-CONFIG_ULTRIX_PARTITION=y
-CONFIG_SUN_PARTITION=y
-CONFIG_KARMA_PARTITION=y
-CONFIG_EFI_PARTITION=y
-CONFIG_SYSV68_PARTITION=y
 CONFIG_NLS=y
 CONFIG_NLS_DEFAULT="cp437"
 CONFIG_NLS_CODEPAGE_437=m
@@ -517,12 +566,10 @@ CONFIG_SCHEDSTATS=y
 CONFIG_TIMER_STATS=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_MEMORY_INIT=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_SCHED_TRACER=y
 CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_KGDB=y
 CONFIG_SECURITY=y
-CONFIG_SECURITY_NETWORK=y
 CONFIG_LSM_MMAP_MIN_ADDR=0
 CONFIG_SECURITY_SELINUX=y
 CONFIG_SECURITY_SELINUX_BOOTPARAM=y
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
deleted file mode 100644
index 75eb1b1f316..00000000000
--- a/arch/mips/configs/pb1100_defconfig
+++ /dev/null
@@ -1,124 +0,0 @@
-CONFIG_MIPS_ALCHEMY=y
-CONFIG_MIPS_PB1100=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_HZ_100=y
-# CONFIG_SECCOMP is not set
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="-pb1100"
-CONFIG_KERNEL_LZMA=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_TINY_RCU=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-# CONFIG_SYSCTL_SYSCALL is not set
-# CONFIG_KALLSYMS is not set
-# CONFIG_PCSPKR_PLATFORM is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_LBDAF is not set
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_PCCARD=y
-CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y
-CONFIG_PM=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_UB=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_IDE_TASK_IOCTL=y
-# CONFIG_IDE_PROC_FS is not set
-CONFIG_NETDEVICES=y
-CONFIG_MARVELL_PHY=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_QSEMI_PHY=y
-CONFIG_LXT_PHY=y
-CONFIG_CICADA_PHY=y
-CONFIG_VITESSE_PHY=y
-CONFIG_SMSC_PHY=y
-CONFIG_BROADCOM_PHY=y
-CONFIG_ICPLUS_PHY=y
-CONFIG_REALTEK_PHY=y
-CONFIG_NATIONAL_PHY=y
-CONFIG_STE10XP=y
-CONFIG_LSI_ET1011C_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_MIPS_AU1X00_ENET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_HIDRAW=y
-CONFIG_USB_HIDDEV=y
-CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AU1XXX=y
-CONFIG_EXT2_FS=y
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_FS_XATTR=y
-# CONFIG_JFFS2_FS_POSIX_ACL is not set
-# CONFIG_JFFS2_FS_SECURITY is not set
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_SQUASHFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_ZBOOT=y
-CONFIG_KEYS=y
-CONFIG_KEYS_DEBUG_PROC_KEYS=y
-CONFIG_SECURITYFS=y
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
deleted file mode 100644
index fa00487146f..00000000000
--- a/arch/mips/configs/pb1500_defconfig
+++ /dev/null
@@ -1,141 +0,0 @@
-CONFIG_MIPS_ALCHEMY=y
-CONFIG_MIPS_PB1500=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_HZ_100=y
-# CONFIG_SECCOMP is not set
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="-pb1500"
-CONFIG_KERNEL_LZMA=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_TINY_RCU=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-# CONFIG_SYSCTL_SYSCALL is not set
-# CONFIG_KALLSYMS is not set
-# CONFIG_PCSPKR_PLATFORM is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_PCI=y
-CONFIG_PCCARD=y
-# CONFIG_CARDBUS is not set
-CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y
-CONFIG_PM=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_WIRELESS is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_UB=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_IDE_TASK_IOCTL=y
-# CONFIG_IDEPCI_PCIBUS_ORDER is not set
-CONFIG_BLK_DEV_HPT366=y
-CONFIG_NETDEVICES=y
-CONFIG_MARVELL_PHY=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_QSEMI_PHY=y
-CONFIG_LXT_PHY=y
-CONFIG_CICADA_PHY=y
-CONFIG_VITESSE_PHY=y
-CONFIG_SMSC_PHY=y
-CONFIG_BROADCOM_PHY=y
-CONFIG_ICPLUS_PHY=y
-CONFIG_REALTEK_PHY=y
-CONFIG_NATIONAL_PHY=y
-CONFIG_STE10XP=y
-CONFIG_LSI_ET1011C_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_MIPS_AU1X00_ENET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_PCI is not set
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_HWMON is not set
-# CONFIG_VGA_ARB is not set
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_TILEBLITTING=y
-CONFIG_FB_S1D13XXX=y
-CONFIG_USB_HIDDEV=y
-CONFIG_USB=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_OTG_WHITELIST=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AU1XXX=y
-CONFIG_EXT2_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_SQUASHFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_CODEPAGE_1250=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_ZBOOT=y
-CONFIG_KEYS=y
-CONFIG_KEYS_DEBUG_PROC_KEYS=y
-CONFIG_SECURITYFS=y
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
deleted file mode 100644
index e83d6497e8b..00000000000
--- a/arch/mips/configs/pb1550_defconfig
+++ /dev/null
@@ -1,145 +0,0 @@
-CONFIG_MIPS_ALCHEMY=y
-CONFIG_MIPS_PB1550=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_HZ_100=y
-# CONFIG_SECCOMP is not set
-CONFIG_EXPERIMENTAL=y
-CONFIG_LOCALVERSION="-pb1550"
-CONFIG_KERNEL_LZMA=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_TINY_RCU=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EXPERT=y
-# CONFIG_SYSCTL_SYSCALL is not set
-# CONFIG_KALLSYMS is not set
-# CONFIG_PCSPKR_PLATFORM is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-# CONFIG_COMPAT_BRK is not set
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_PCI=y
-CONFIG_PCCARD=y
-# CONFIG_CARDBUS is not set
-CONFIG_PCMCIA_ALCHEMY_DEVBOARD=y
-CONFIG_PM=y
-CONFIG_PM_RUNTIME=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_AU1550=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_UB=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS is not set
-# CONFIG_IDEPCI_PCIBUS_ORDER is not set
-CONFIG_BLK_DEV_HPT366=y
-CONFIG_NETDEVICES=y
-CONFIG_MARVELL_PHY=y
-CONFIG_DAVICOM_PHY=y
-CONFIG_QSEMI_PHY=y
-CONFIG_LXT_PHY=y
-CONFIG_CICADA_PHY=y
-CONFIG_VITESSE_PHY=y
-CONFIG_SMSC_PHY=y
-CONFIG_BROADCOM_PHY=y
-CONFIG_ICPLUS_PHY=y
-CONFIG_REALTEK_PHY=y
-CONFIG_NATIONAL_PHY=y
-CONFIG_STE10XP=y
-CONFIG_LSI_ET1011C_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_MIPS_AU1X00_ENET=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-CONFIG_INPUT_EVDEV=y
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_PCI is not set
-# CONFIG_LEGACY_PTYS is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-# CONFIG_I2C_COMPAT is not set
-CONFIG_I2C_CHARDEV=y
-# CONFIG_I2C_HELPER_AUTO is not set
-CONFIG_I2C_AU1550=y
-# CONFIG_HWMON is not set
-# CONFIG_VGA_ARB is not set
-CONFIG_HIDRAW=y
-CONFIG_USB_HIDDEV=y
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_DYNAMIC_MINORS=y
-CONFIG_USB_SUSPEND=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AU1XXX=y
-CONFIG_EXT2_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=y
-CONFIG_VFAT_FS=y
-# CONFIG_PROC_PAGE_MONITOR is not set
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_SQUASHFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_CODEPAGE_852=y
-CONFIG_NLS_CODEPAGE_1250=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_15=y
-CONFIG_NLS_UTF8=y
-CONFIG_STRIP_ASM_SYMS=y
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_SCHED_DEBUG is not set
-# CONFIG_FTRACE is not set
-CONFIG_DEBUG_ZBOOT=y
-CONFIG_KEYS=y
-CONFIG_KEYS_DEBUG_PROC_KEYS=y
-CONFIG_SECURITYFS=y
diff --git a/arch/mips/configs/pnx8335-stb225_defconfig b/arch/mips/configs/pnx8335_stb225_defconfig
index f2925769dfa..f2925769dfa 100644
--- a/arch/mips/configs/pnx8335-stb225_defconfig
+++ b/arch/mips/configs/pnx8335_stb225_defconfig
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550_jbs_defconfig
index 1d1f2067f3e..1d1f2067f3e 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550_jbs_defconfig
diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550_stb810_defconfig
index 15c66a571f9..15c66a571f9 100644
--- a/arch/mips/configs/pnx8550-stb810_defconfig
+++ b/arch/mips/configs/pnx8550_stb810_defconfig
diff --git a/arch/mips/configs/rb532_defconfig b/arch/mips/configs/rb532_defconfig
index 55902d9cd0f..b85b121397c 100644
--- a/arch/mips/configs/rb532_defconfig
+++ b/arch/mips/configs/rb532_defconfig
@@ -119,7 +119,6 @@ CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_BLOCK2MTD=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_PLATFORM=y
 CONFIG_ATA=y
 # CONFIG_ATA_VERBOSE_ERROR is not set
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250_swarm_defconfig
index 5b0463ef938..5b0463ef938 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250_swarm_defconfig
diff --git a/arch/mips/configs/sead3_defconfig b/arch/mips/configs/sead3_defconfig
new file mode 100644
index 00000000000..e3eec68d913
--- /dev/null
+++ b/arch/mips/configs/sead3_defconfig
@@ -0,0 +1,124 @@
+CONFIG_MIPS_SEAD3=y
+CONFIG_CPU_LITTLE_ENDIAN=y
+CONFIG_CPU_MIPS32_R2=y
+CONFIG_HZ_100=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=15
+CONFIG_EMBEDDED=y
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_MODULES=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_GLUEBI=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_SCSI=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_SG=y
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_NETDEVICES=y
+CONFIG_SMSC911X=y
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_MARVELL_PHY=y
+CONFIG_DAVICOM_PHY=y
+CONFIG_QSEMI_PHY=y
+CONFIG_LXT_PHY=y
+CONFIG_CICADA_PHY=y
+CONFIG_VITESSE_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_ICPLUS_PHY=y
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_CONSOLE_TRANSLATIONS is not set
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_LEGACY_PTY_COUNT=32
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+# CONFIG_I2C_COMPAT is not set
+CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_HELPER_AUTO is not set
+CONFIG_SPI=y
+CONFIG_SENSORS_ADT7475=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_DEBUG=y
+CONFIG_MMC_SPI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_M41T80=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_XFS_FS=y
+CONFIG_XFS_QUOTA=y
+CONFIG_XFS_POSIX_ACL=y
+CONFIG_QUOTA=y
+# CONFIG_PRINT_QUOTA_WARNING is not set
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_TMPFS=y
+CONFIG_JFFS2_FS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_UTF8=y
+# CONFIG_FTRACE is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_AES=y
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild
index f53f9ca7399..e69de29bb2d 100644
--- a/arch/mips/include/asm/Kbuild
+++ b/arch/mips/include/asm/Kbuild
@@ -1,5 +0,0 @@
-include include/asm-generic/Kbuild.asm
-
-header-y += cachectl.h
-header-y += sgidefs.h
-header-y += sysmips.h
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 3f4c5cb6433..01cc6ba6483 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -59,8 +59,8 @@ static __inline__ void atomic_add(int i, atomic_t * v)
 		"	sc	%0, %1					\n"
 		"	beqzl	%0, 1b					\n"
 		"	.set	mips0					\n"
-		: "=&r" (temp), "=m" (v->counter)
-		: "Ir" (i), "m" (v->counter));
+		: "=&r" (temp), "+m" (v->counter)
+		: "Ir" (i));
 	} else if (kernel_uses_llsc) {
 		int temp;
 
@@ -71,8 +71,8 @@ static __inline__ void atomic_add(int i, atomic_t * v)
 			"	addu	%0, %2				\n"
 			"	sc	%0, %1				\n"
 			"	.set	mips0				\n"
-			: "=&r" (temp), "=m" (v->counter)
-			: "Ir" (i), "m" (v->counter));
+			: "=&r" (temp), "+m" (v->counter)
+			: "Ir" (i));
 		} while (unlikely(!temp));
 	} else {
 		unsigned long flags;
@@ -102,8 +102,8 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
 		"	sc	%0, %1					\n"
 		"	beqzl	%0, 1b					\n"
 		"	.set	mips0					\n"
-		: "=&r" (temp), "=m" (v->counter)
-		: "Ir" (i), "m" (v->counter));
+		: "=&r" (temp), "+m" (v->counter)
+		: "Ir" (i));
 	} else if (kernel_uses_llsc) {
 		int temp;
 
@@ -114,8 +114,8 @@ static __inline__ void atomic_sub(int i, atomic_t * v)
 			"	subu	%0, %2				\n"
 			"	sc	%0, %1				\n"
 			"	.set	mips0				\n"
-			: "=&r" (temp), "=m" (v->counter)
-			: "Ir" (i), "m" (v->counter));
+			: "=&r" (temp), "+m" (v->counter)
+			: "Ir" (i));
 		} while (unlikely(!temp));
 	} else {
 		unsigned long flags;
@@ -146,9 +146,8 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
 		"	beqzl	%0, 1b					\n"
 		"	addu	%0, %1, %3				\n"
 		"	.set	mips0					\n"
-		: "=&r" (result), "=&r" (temp), "=m" (v->counter)
-		: "Ir" (i), "m" (v->counter)
-		: "memory");
+		: "=&r" (result), "=&r" (temp), "+m" (v->counter)
+		: "Ir" (i));
 	} else if (kernel_uses_llsc) {
 		int temp;
 
@@ -159,9 +158,8 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
 			"	addu	%0, %1, %3			\n"
 			"	sc	%0, %2				\n"
 			"	.set	mips0				\n"
-			: "=&r" (result), "=&r" (temp), "=m" (v->counter)
-			: "Ir" (i), "m" (v->counter)
-			: "memory");
+			: "=&r" (result), "=&r" (temp), "+m" (v->counter)
+			: "Ir" (i));
 		} while (unlikely(!result));
 
 		result = temp + i;
@@ -212,9 +210,8 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
 			"	subu	%0, %1, %3			\n"
 			"	sc	%0, %2				\n"
 			"	.set	mips0				\n"
-			: "=&r" (result), "=&r" (temp), "=m" (v->counter)
-			: "Ir" (i), "m" (v->counter)
-			: "memory");
+			: "=&r" (result), "=&r" (temp), "+m" (v->counter)
+			: "Ir" (i));
 		} while (unlikely(!result));
 
 		result = temp - i;
@@ -262,7 +259,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
 		"	.set	reorder					\n"
 		"1:							\n"
 		"	.set	mips0					\n"
-		: "=&r" (result), "=&r" (temp), "=m" (v->counter)
+		: "=&r" (result), "=&r" (temp), "+m" (v->counter)
 		: "Ir" (i), "m" (v->counter)
 		: "memory");
 	} else if (kernel_uses_llsc) {
@@ -280,9 +277,8 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
 		"	.set	reorder					\n"
 		"1:							\n"
 		"	.set	mips0					\n"
-		: "=&r" (result), "=&r" (temp), "=m" (v->counter)
-		: "Ir" (i), "m" (v->counter)
-		: "memory");
+		: "=&r" (result), "=&r" (temp), "+m" (v->counter)
+		: "Ir" (i));
 	} else {
 		unsigned long flags;
 
@@ -430,8 +426,8 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
 		"	scd	%0, %1					\n"
 		"	beqzl	%0, 1b					\n"
 		"	.set	mips0					\n"
-		: "=&r" (temp), "=m" (v->counter)
-		: "Ir" (i), "m" (v->counter));
+		: "=&r" (temp), "+m" (v->counter)
+		: "Ir" (i));
 	} else if (kernel_uses_llsc) {
 		long temp;
 
@@ -442,8 +438,8 @@ static __inline__ void atomic64_add(long i, atomic64_t * v)
 			"	daddu	%0, %2				\n"
 			"	scd	%0, %1				\n"
 			"	.set	mips0				\n"
-			: "=&r" (temp), "=m" (v->counter)
-			: "Ir" (i), "m" (v->counter));
+			: "=&r" (temp), "+m" (v->counter)
+			: "Ir" (i));
 		} while (unlikely(!temp));
 	} else {
 		unsigned long flags;
@@ -473,8 +469,8 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
 		"	scd	%0, %1					\n"
 		"	beqzl	%0, 1b					\n"
 		"	.set	mips0					\n"
-		: "=&r" (temp), "=m" (v->counter)
-		: "Ir" (i), "m" (v->counter));
+		: "=&r" (temp), "+m" (v->counter)
+		: "Ir" (i));
 	} else if (kernel_uses_llsc) {
 		long temp;
 
@@ -485,8 +481,8 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v)
 			"	dsubu	%0, %2				\n"
 			"	scd	%0, %1				\n"
 			"	.set	mips0				\n"
-			: "=&r" (temp), "=m" (v->counter)
-			: "Ir" (i), "m" (v->counter));
+			: "=&r" (temp), "+m" (v->counter)
+			: "Ir" (i));
 		} while (unlikely(!temp));
 	} else {
 		unsigned long flags;
@@ -517,9 +513,8 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
 		"	beqzl	%0, 1b					\n"
 		"	daddu	%0, %1, %3				\n"
 		"	.set	mips0					\n"
-		: "=&r" (result), "=&r" (temp), "=m" (v->counter)
-		: "Ir" (i), "m" (v->counter)
-		: "memory");
+		: "=&r" (result), "=&r" (temp), "+m" (v->counter)
+		: "Ir" (i));
 	} else if (kernel_uses_llsc) {
 		long temp;
 
@@ -649,9 +644,8 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
 		"	.set	reorder					\n"
 		"1:							\n"
 		"	.set	mips0					\n"
-		: "=&r" (result), "=&r" (temp), "=m" (v->counter)
-		: "Ir" (i), "m" (v->counter)
-		: "memory");
+		: "=&r" (result), "=&r" (temp), "+m" (v->counter)
+		: "Ir" (i));
 	} else {
 		unsigned long flags;
 
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index ca400f7c3f5..c507b931b48 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -95,8 +95,8 @@
 #ifndef cpu_has_smartmips
 #define cpu_has_smartmips      (cpu_data[0].ases & MIPS_ASE_SMARTMIPS)
 #endif
-#ifndef kernel_uses_smartmips_rixi
-#define kernel_uses_smartmips_rixi 0
+#ifndef cpu_has_rixi
+#define cpu_has_rixi		(cpu_data[0].options & MIPS_CPU_RIXI)
 #endif
 #ifndef cpu_has_vtag_icache
 #define cpu_has_vtag_icache	(cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
@@ -171,6 +171,10 @@
 #define cpu_has_dsp		(cpu_data[0].ases & MIPS_ASE_DSP)
 #endif
 
+#ifndef cpu_has_dsp2
+#define cpu_has_dsp2		(cpu_data[0].ases & MIPS_ASE_DSP2P)
+#endif
+
 #ifndef cpu_has_mipsmt
 #define cpu_has_mipsmt		(cpu_data[0].ases & MIPS_ASE_MIPSMT)
 #endif
@@ -252,4 +256,8 @@
 #define cpu_hwrena_impl_bits		0
 #endif
 
+#ifndef cpu_has_perf_cntr_intr_bit
+#define cpu_has_perf_cntr_intr_bit	(cpu_data[0].options & MIPS_CPU_PCI)
+#endif
+
 #endif /* __ASM_CPU_FEATURES_H */
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index f21b7c04e95..52c4e914f95 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -94,6 +94,7 @@
 #define PRID_IMP_24KE		0x9600
 #define PRID_IMP_74K		0x9700
 #define PRID_IMP_1004K		0x9900
+#define PRID_IMP_1074K		0x9a00
 #define PRID_IMP_M14KC		0x9c00
 
 /*
@@ -319,6 +320,8 @@ enum cpu_type_enum {
 #define MIPS_CPU_VINT		0x00080000 /* CPU supports MIPSR2 vectored interrupts */
 #define MIPS_CPU_VEIC		0x00100000 /* CPU supports MIPSR2 external interrupt controller mode */
 #define MIPS_CPU_ULRI		0x00200000 /* CPU has ULRI feature */
+#define MIPS_CPU_PCI		0x00400000 /* CPU has Perf Ctr Int indicator */
+#define MIPS_CPU_RIXI		0x00800000 /* CPU has TLB Read/eXec Inhibit */
 
 /*
  * CPU ASE encodings
@@ -329,6 +332,7 @@ enum cpu_type_enum {
 #define MIPS_ASE_SMARTMIPS	0x00000008 /* SmartMIPS */
 #define MIPS_ASE_DSP		0x00000010 /* Signal Processing ASE */
 #define MIPS_ASE_MIPSMT		0x00000020 /* CPU supports MIPS MT */
+#define MIPS_ASE_DSP2P		0x00000040 /* Signal Processing ASE Rev 2 */
 
 
 #endif /* _ASM_CPU_H */
diff --git a/arch/mips/include/asm/errno.h b/arch/mips/include/asm/errno.h
index 6dcd3583ed0..21d91cdfe3c 100644
--- a/arch/mips/include/asm/errno.h
+++ b/arch/mips/include/asm/errno.h
@@ -8,128 +8,10 @@
 #ifndef _ASM_ERRNO_H
 #define _ASM_ERRNO_H
 
-/*
- * These error numbers are intended to be MIPS ABI compatible
- */
-
-#include <asm-generic/errno-base.h>
-
-#define	ENOMSG		35	/* No message of desired type */
-#define	EIDRM		36	/* Identifier removed */
-#define	ECHRNG		37	/* Channel number out of range */
-#define	EL2NSYNC	38	/* Level 2 not synchronized */
-#define	EL3HLT		39	/* Level 3 halted */
-#define	EL3RST		40	/* Level 3 reset */
-#define	ELNRNG		41	/* Link number out of range */
-#define	EUNATCH		42	/* Protocol driver not attached */
-#define	ENOCSI		43	/* No CSI structure available */
-#define	EL2HLT		44	/* Level 2 halted */
-#define	EDEADLK		45	/* Resource deadlock would occur */
-#define	ENOLCK		46	/* No record locks available */
-#define	EBADE		50	/* Invalid exchange */
-#define	EBADR		51	/* Invalid request descriptor */
-#define	EXFULL		52	/* Exchange full */
-#define	ENOANO		53	/* No anode */
-#define	EBADRQC		54	/* Invalid request code */
-#define	EBADSLT		55	/* Invalid slot */
-#define	EDEADLOCK	56	/* File locking deadlock error */
-#define	EBFONT		59	/* Bad font file format */
-#define	ENOSTR		60	/* Device not a stream */
-#define	ENODATA		61	/* No data available */
-#define	ETIME		62	/* Timer expired */
-#define	ENOSR		63	/* Out of streams resources */
-#define	ENONET		64	/* Machine is not on the network */
-#define	ENOPKG		65	/* Package not installed */
-#define	EREMOTE		66	/* Object is remote */
-#define	ENOLINK		67	/* Link has been severed */
-#define	EADV		68	/* Advertise error */
-#define	ESRMNT		69	/* Srmount error */
-#define	ECOMM		70	/* Communication error on send */
-#define	EPROTO		71	/* Protocol error */
-#define	EDOTDOT		73	/* RFS specific error */
-#define	EMULTIHOP	74	/* Multihop attempted */
-#define	EBADMSG		77	/* Not a data message */
-#define	ENAMETOOLONG	78	/* File name too long */
-#define	EOVERFLOW	79	/* Value too large for defined data type */
-#define	ENOTUNIQ	80	/* Name not unique on network */
-#define	EBADFD		81	/* File descriptor in bad state */
-#define	EREMCHG		82	/* Remote address changed */
-#define	ELIBACC		83	/* Can not access a needed shared library */
-#define	ELIBBAD		84	/* Accessing a corrupted shared library */
-#define	ELIBSCN		85	/* .lib section in a.out corrupted */
-#define	ELIBMAX		86	/* Attempting to link in too many shared libraries */
-#define	ELIBEXEC	87	/* Cannot exec a shared library directly */
-#define	EILSEQ		88	/* Illegal byte sequence */
-#define	ENOSYS		89	/* Function not implemented */
-#define	ELOOP		90	/* Too many symbolic links encountered */
-#define	ERESTART	91	/* Interrupted system call should be restarted */
-#define	ESTRPIPE	92	/* Streams pipe error */
-#define	ENOTEMPTY	93	/* Directory not empty */
-#define	EUSERS		94	/* Too many users */
-#define	ENOTSOCK	95	/* Socket operation on non-socket */
-#define	EDESTADDRREQ	96	/* Destination address required */
-#define	EMSGSIZE	97	/* Message too long */
-#define	EPROTOTYPE	98	/* Protocol wrong type for socket */
-#define	ENOPROTOOPT	99	/* Protocol not available */
-#define	EPROTONOSUPPORT	120	/* Protocol not supported */
-#define	ESOCKTNOSUPPORT	121	/* Socket type not supported */
-#define	EOPNOTSUPP	122	/* Operation not supported on transport endpoint */
-#define	EPFNOSUPPORT	123	/* Protocol family not supported */
-#define	EAFNOSUPPORT	124	/* Address family not supported by protocol */
-#define	EADDRINUSE	125	/* Address already in use */
-#define	EADDRNOTAVAIL	126	/* Cannot assign requested address */
-#define	ENETDOWN	127	/* Network is down */
-#define	ENETUNREACH	128	/* Network is unreachable */
-#define	ENETRESET	129	/* Network dropped connection because of reset */
-#define	ECONNABORTED	130	/* Software caused connection abort */
-#define	ECONNRESET	131	/* Connection reset by peer */
-#define	ENOBUFS		132	/* No buffer space available */
-#define	EISCONN		133	/* Transport endpoint is already connected */
-#define	ENOTCONN	134	/* Transport endpoint is not connected */
-#define	EUCLEAN		135	/* Structure needs cleaning */
-#define	ENOTNAM		137	/* Not a XENIX named type file */
-#define	ENAVAIL		138	/* No XENIX semaphores available */
-#define	EISNAM		139	/* Is a named type file */
-#define	EREMOTEIO	140	/* Remote I/O error */
-#define EINIT		141	/* Reserved */
-#define EREMDEV		142	/* Error 142 */
-#define	ESHUTDOWN	143	/* Cannot send after transport endpoint shutdown */
-#define	ETOOMANYREFS	144	/* Too many references: cannot splice */
-#define	ETIMEDOUT	145	/* Connection timed out */
-#define	ECONNREFUSED	146	/* Connection refused */
-#define	EHOSTDOWN	147	/* Host is down */
-#define	EHOSTUNREACH	148	/* No route to host */
-#define	EWOULDBLOCK	EAGAIN	/* Operation would block */
-#define	EALREADY	149	/* Operation already in progress */
-#define	EINPROGRESS	150	/* Operation now in progress */
-#define	ESTALE		151	/* Stale NFS file handle */
-#define ECANCELED	158	/* AIO operation canceled */
-
-/*
- * These error are Linux extensions.
- */
-#define ENOMEDIUM	159	/* No medium found */
-#define EMEDIUMTYPE	160	/* Wrong medium type */
-#define	ENOKEY		161	/* Required key not available */
-#define	EKEYEXPIRED	162	/* Key has expired */
-#define	EKEYREVOKED	163	/* Key has been revoked */
-#define	EKEYREJECTED	164	/* Key was rejected by service */
-
-/* for robust mutexes */
-#define	EOWNERDEAD	165	/* Owner died */
-#define	ENOTRECOVERABLE	166	/* State not recoverable */
-
-#define	ERFKILL		167	/* Operation not possible due to RF-kill */
+#include <uapi/asm/errno.h>
 
-#define EHWPOISON	168	/* Memory page has hardware error */
-
-#define EDQUOT		1133	/* Quota exceeded */
-
-#ifdef __KERNEL__
 
 /* The biggest error number defined here or in <linux/errno.h>. */
 #define EMAXERRNO	1133
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_ERRNO_H */
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 991b659e254..37620db588b 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -33,13 +33,13 @@
 	REG32(_gic_base + segment##_##SECTION_OFS + offset)
 
 #define GIC_ABS_REG(segment, offset) \
-       (_gic_base + segment##_##SECTION_OFS + offset##_##OFS)
+	(_gic_base + segment##_##SECTION_OFS + offset##_##OFS)
 #define GIC_REG_ABS_ADDR(segment, offset) \
-       (_gic_base + segment##_##SECTION_OFS + offset)
+	(_gic_base + segment##_##SECTION_OFS + offset)
 
 #ifdef GICISBYTELITTLEENDIAN
-#define GICREAD(reg, data)	(data) = (reg), (data) = le32_to_cpu(data)
-#define GICWRITE(reg, data)	(reg) = cpu_to_le32(data)
+#define GICREAD(reg, data)	((data) = (reg), (data) = le32_to_cpu(data))
+#define GICWRITE(reg, data)	((reg) = cpu_to_le32(data))
 #define GICBIS(reg, bits)			\
 	({unsigned int data;			\
 		GICREAD(reg, data);		\
@@ -48,9 +48,9 @@
 	})
 
 #else
-#define GICREAD(reg, data)	(data) = (reg)
-#define GICWRITE(reg, data)	(reg) = (data)
-#define GICBIS(reg, bits)	(reg) |= (bits)
+#define GICREAD(reg, data)	((data) = (reg))
+#define GICWRITE(reg, data)	((reg) = (data))
+#define GICBIS(reg, bits)	((reg) |= (bits))
 #endif
 
 
@@ -304,15 +304,15 @@
 		 GIC_SH_MAP_TO_VPE_REG_BIT(vpe))
 
 struct gic_pcpu_mask {
-       DECLARE_BITMAP(pcpu_mask, GIC_NUM_INTRS);
+	DECLARE_BITMAP(pcpu_mask, GIC_NUM_INTRS);
 };
 
 struct gic_pending_regs {
-       DECLARE_BITMAP(pending, GIC_NUM_INTRS);
+	DECLARE_BITMAP(pending, GIC_NUM_INTRS);
 };
 
 struct gic_intrmask_regs {
-       DECLARE_BITMAP(intrmask, GIC_NUM_INTRS);
+	DECLARE_BITMAP(intrmask, GIC_NUM_INTRS);
 };
 
 /*
@@ -341,15 +341,44 @@ struct gic_shared_intr_map {
 	unsigned int local_intr_mask;
 };
 
+/* GIC nomenclature for Core Interrupt Pins. */
+#define GIC_CPU_INT0		0 /* Core Interrupt 2 */
+#define GIC_CPU_INT1		1 /* .                */
+#define GIC_CPU_INT2		2 /* .                */
+#define GIC_CPU_INT3		3 /* .                */
+#define GIC_CPU_INT4		4 /* .                */
+#define GIC_CPU_INT5		5 /* Core Interrupt 5 */
+
+/* Local GIC interrupts. */
+#define GIC_INT_TMR		(GIC_CPU_INT5)
+#define GIC_INT_PERFCTR		(GIC_CPU_INT5)
+
+/* Add 2 to convert non-EIC hardware interrupt to EIC vector number. */
+#define GIC_CPU_TO_VEC_OFFSET	(2)
+
+/* Mapped interrupt to pin X, then GIC will generate the vector (X+1). */
+#define GIC_PIN_TO_VEC_OFFSET	(1)
+
+extern unsigned long _gic_base;
+extern unsigned int gic_irq_base;
+extern unsigned int gic_irq_flags[];
+extern struct gic_shared_intr_map gic_shared_intr_map[];
+
 extern void gic_init(unsigned long gic_base_addr,
 	unsigned long gic_addrspace_size, struct gic_intr_map *intrmap,
 	unsigned int intrmap_size, unsigned int irqbase);
 
+extern void gic_clocksource_init(unsigned int);
 extern unsigned int gic_get_int(void);
 extern void gic_send_ipi(unsigned int intr);
 extern unsigned int plat_ipi_call_int_xlate(unsigned int);
 extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
 extern void gic_bind_eic_interrupt(int irq, int set);
 extern unsigned int gic_get_timer_pending(void);
+extern void gic_enable_interrupt(int irq_vec);
+extern void gic_disable_interrupt(int irq_vec);
+extern void gic_irq_ack(struct irq_data *d);
+extern void gic_finish_irq(struct irq_data *d);
+extern void gic_platform_init(int irqs, struct irq_chip *irq_controller);
 
 #endif /* _ASM_GICREGS_H */
diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h
index 58d36889f09..bd94946a18f 100644
--- a/arch/mips/include/asm/hugetlb.h
+++ b/arch/mips/include/asm/hugetlb.h
@@ -112,4 +112,8 @@ static inline void arch_release_hugepage(struct page *page)
 {
 }
 
+static inline void arch_clear_hugepage_flags(struct page *page)
+{
+}
+
 #endif /* __ASM_HUGETLB_H */
diff --git a/arch/mips/include/asm/kspd.h b/arch/mips/include/asm/kspd.h
index 4e9e724c893..ec6832950ac 100644
--- a/arch/mips/include/asm/kspd.h
+++ b/arch/mips/include/asm/kspd.h
@@ -25,12 +25,8 @@ struct kspd_notifications {
 	struct list_head list;
 };
 
-#ifdef CONFIG_MIPS_APSP_KSPD
-extern void kspd_notify(struct kspd_notifications *notify);
-#else
 static inline void kspd_notify(struct kspd_notifications *notify)
 {
 }
-#endif
 
 #endif
diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
index dde504477fa..a5e0f17ea77 100644
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -63,6 +63,10 @@
 
 #define AR934X_WMAC_BASE	(AR71XX_APB_BASE + 0x00100000)
 #define AR934X_WMAC_SIZE	0x20000
+#define AR934X_EHCI_BASE	0x1b000000
+#define AR934X_EHCI_SIZE	0x200
+#define AR934X_SRIF_BASE	(AR71XX_APB_BASE + 0x00116000)
+#define AR934X_SRIF_SIZE	0x1000
 
 /*
  * DDR_CTRL block
@@ -288,6 +292,11 @@
 #define AR933X_RESET_USB_PHY		BIT(4)
 #define AR933X_RESET_USBSUS_OVERRIDE	BIT(3)
 
+#define AR934X_RESET_USB_PHY_ANALOG	BIT(11)
+#define AR934X_RESET_USB_HOST		BIT(5)
+#define AR934X_RESET_USB_PHY		BIT(4)
+#define AR934X_RESET_USBSUS_OVERRIDE	BIT(3)
+
 #define AR933X_BOOTSTRAP_REF_CLK_40	BIT(0)
 
 #define AR934X_BOOTSTRAP_SW_OPTION8	BIT(23)
@@ -399,4 +408,25 @@
 #define AR933X_GPIO_COUNT		30
 #define AR934X_GPIO_COUNT		23
 
+/*
+ * SRIF block
+ */
+#define AR934X_SRIF_CPU_DPLL1_REG	0x1c0
+#define AR934X_SRIF_CPU_DPLL2_REG	0x1c4
+#define AR934X_SRIF_CPU_DPLL3_REG	0x1c8
+
+#define AR934X_SRIF_DDR_DPLL1_REG	0x240
+#define AR934X_SRIF_DDR_DPLL2_REG	0x244
+#define AR934X_SRIF_DDR_DPLL3_REG	0x248
+
+#define AR934X_SRIF_DPLL1_REFDIV_SHIFT	27
+#define AR934X_SRIF_DPLL1_REFDIV_MASK	0x1f
+#define AR934X_SRIF_DPLL1_NINT_SHIFT	18
+#define AR934X_SRIF_DPLL1_NINT_MASK	0x1ff
+#define AR934X_SRIF_DPLL1_NFRAC_MASK	0x0003ffff
+
+#define AR934X_SRIF_DPLL2_LOCAL_PLL	BIT(30)
+#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT	13
+#define AR934X_SRIF_DPLL2_OUTDIV_MASK	0x7
+
 #endif /* __ASM_MACH_AR71XX_REGS_H */
diff --git a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
index 6ddae926bf7..ea4b66dccf6 100644
--- a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
@@ -42,6 +42,8 @@
 #define cpu_has_mips64r1	0
 #define cpu_has_mips64r2	0
 
+#define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_mipsmt		0
 
 #define cpu_has_64bits		0
diff --git a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
index 3f741af37d4..09f45e6afad 100644
--- a/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-au1x00/cpu-feature-overrides.h
@@ -37,6 +37,7 @@
 #define cpu_has_mips64r1		0
 #define cpu_has_mips64r2		0
 #define cpu_has_dsp			0
+#define cpu_has_dsp2			0
 #define cpu_has_mipsmt			0
 #define cpu_has_userlocal		0
 #define cpu_has_nofpuex			0
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
index e104ddb694a..dbd5b5ad07a 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -120,6 +120,8 @@ enum bcm63xx_regs_set {
 	RSET_OHCI0,
 	RSET_OHCI_PRIV,
 	RSET_USBH_PRIV,
+	RSET_USBD,
+	RSET_USBDMA,
 	RSET_MPI,
 	RSET_PCMCIA,
 	RSET_PCIE,
@@ -162,6 +164,8 @@ enum bcm63xx_regs_set {
 #define RSET_UDC_SIZE			256
 #define RSET_OHCI_SIZE			256
 #define RSET_EHCI_SIZE			256
+#define RSET_USBD_SIZE			256
+#define RSET_USBDMA_SIZE		1280
 #define RSET_PCMCIA_SIZE		12
 #define RSET_M2M_SIZE			256
 #define RSET_ATM_SIZE			4096
@@ -183,10 +187,11 @@ enum bcm63xx_regs_set {
 #define BCM_6328_GPIO_BASE		(0xb0000080)
 #define BCM_6328_SPI_BASE		(0xdeadbeef)
 #define BCM_6328_UDC0_BASE		(0xdeadbeef)
-#define BCM_6328_USBDMA_BASE		(0xdeadbeef)
-#define BCM_6328_OHCI0_BASE		(0xdeadbeef)
+#define BCM_6328_USBDMA_BASE		(0xb000c000)
+#define BCM_6328_OHCI0_BASE		(0xb0002600)
 #define BCM_6328_OHCI_PRIV_BASE		(0xdeadbeef)
-#define BCM_6328_USBH_PRIV_BASE		(0xdeadbeef)
+#define BCM_6328_USBH_PRIV_BASE		(0xb0002700)
+#define BCM_6328_USBD_BASE		(0xb0002400)
 #define BCM_6328_MPI_BASE		(0xdeadbeef)
 #define BCM_6328_PCMCIA_BASE		(0xdeadbeef)
 #define BCM_6328_PCIE_BASE		(0xb0e40000)
@@ -199,7 +204,7 @@ enum bcm63xx_regs_set {
 #define BCM_6328_ENETDMAC_BASE		(0xb000da00)
 #define BCM_6328_ENETDMAS_BASE		(0xb000dc00)
 #define BCM_6328_ENETSW_BASE		(0xb0e00000)
-#define BCM_6328_EHCI0_BASE		(0x10002500)
+#define BCM_6328_EHCI0_BASE		(0xb0002500)
 #define BCM_6328_SDRAM_BASE		(0xdeadbeef)
 #define BCM_6328_MEMC_BASE		(0xdeadbeef)
 #define BCM_6328_DDR_BASE		(0xb0003000)
@@ -232,6 +237,7 @@ enum bcm63xx_regs_set {
 #define BCM_6338_OHCI0_BASE		(0xdeadbeef)
 #define BCM_6338_OHCI_PRIV_BASE		(0xfffe3000)
 #define BCM_6338_USBH_PRIV_BASE		(0xdeadbeef)
+#define BCM_6338_USBD_BASE		(0xdeadbeef)
 #define BCM_6338_MPI_BASE		(0xfffe3160)
 #define BCM_6338_PCMCIA_BASE		(0xdeadbeef)
 #define BCM_6338_PCIE_BASE		(0xdeadbeef)
@@ -286,6 +292,7 @@ enum bcm63xx_regs_set {
 #define BCM_6345_OHCI0_BASE		(0xfffe2100)
 #define BCM_6345_OHCI_PRIV_BASE		(0xfffe2200)
 #define BCM_6345_USBH_PRIV_BASE		(0xdeadbeef)
+#define BCM_6345_USBD_BASE		(0xdeadbeef)
 #define BCM_6345_SDRAM_REGS_BASE	(0xfffe2300)
 #define BCM_6345_DSL_BASE		(0xdeadbeef)
 #define BCM_6345_UBUS_BASE		(0xdeadbeef)
@@ -319,9 +326,11 @@ enum bcm63xx_regs_set {
 #define BCM_6348_GPIO_BASE		(0xfffe0400)
 #define BCM_6348_SPI_BASE		(0xfffe0c00)
 #define BCM_6348_UDC0_BASE		(0xfffe1000)
+#define BCM_6348_USBDMA_BASE		(0xdeadbeef)
 #define BCM_6348_OHCI0_BASE		(0xfffe1b00)
 #define BCM_6348_OHCI_PRIV_BASE		(0xfffe1c00)
 #define BCM_6348_USBH_PRIV_BASE		(0xdeadbeef)
+#define BCM_6348_USBD_BASE		(0xdeadbeef)
 #define BCM_6348_MPI_BASE		(0xfffe2000)
 #define BCM_6348_PCMCIA_BASE		(0xfffe2054)
 #define BCM_6348_PCIE_BASE		(0xdeadbeef)
@@ -362,9 +371,11 @@ enum bcm63xx_regs_set {
 #define BCM_6358_GPIO_BASE		(0xfffe0080)
 #define BCM_6358_SPI_BASE		(0xfffe0800)
 #define BCM_6358_UDC0_BASE		(0xfffe0800)
+#define BCM_6358_USBDMA_BASE		(0xdeadbeef)
 #define BCM_6358_OHCI0_BASE		(0xfffe1400)
 #define BCM_6358_OHCI_PRIV_BASE		(0xdeadbeef)
 #define BCM_6358_USBH_PRIV_BASE		(0xfffe1500)
+#define BCM_6358_USBD_BASE		(0xdeadbeef)
 #define BCM_6358_MPI_BASE		(0xfffe1000)
 #define BCM_6358_PCMCIA_BASE		(0xfffe1054)
 #define BCM_6358_PCIE_BASE		(0xdeadbeef)
@@ -406,9 +417,11 @@ enum bcm63xx_regs_set {
 #define BCM_6368_GPIO_BASE		(0xb0000080)
 #define BCM_6368_SPI_BASE		(0xb0000800)
 #define BCM_6368_UDC0_BASE		(0xdeadbeef)
+#define BCM_6368_USBDMA_BASE		(0xb0004800)
 #define BCM_6368_OHCI0_BASE		(0xb0001600)
 #define BCM_6368_OHCI_PRIV_BASE		(0xdeadbeef)
 #define BCM_6368_USBH_PRIV_BASE		(0xb0001700)
+#define BCM_6368_USBD_BASE		(0xb0001400)
 #define BCM_6368_MPI_BASE		(0xb0001000)
 #define BCM_6368_PCMCIA_BASE		(0xb0001054)
 #define BCM_6368_PCIE_BASE		(0xdeadbeef)
@@ -458,6 +471,8 @@ extern const unsigned long *bcm63xx_regs_base;
 	__GEN_RSET_BASE(__cpu, OHCI0)					\
 	__GEN_RSET_BASE(__cpu, OHCI_PRIV)				\
 	__GEN_RSET_BASE(__cpu, USBH_PRIV)				\
+	__GEN_RSET_BASE(__cpu, USBD)					\
+	__GEN_RSET_BASE(__cpu, USBDMA)					\
 	__GEN_RSET_BASE(__cpu, MPI)					\
 	__GEN_RSET_BASE(__cpu, PCMCIA)					\
 	__GEN_RSET_BASE(__cpu, PCIE)					\
@@ -499,6 +514,8 @@ extern const unsigned long *bcm63xx_regs_base;
 	[RSET_OHCI0]		= BCM_## __cpu ##_OHCI0_BASE,		\
 	[RSET_OHCI_PRIV]	= BCM_## __cpu ##_OHCI_PRIV_BASE,	\
 	[RSET_USBH_PRIV]	= BCM_## __cpu ##_USBH_PRIV_BASE,	\
+	[RSET_USBD]		= BCM_## __cpu ##_USBD_BASE,		\
+	[RSET_USBDMA]		= BCM_## __cpu ##_USBDMA_BASE,		\
 	[RSET_MPI]		= BCM_## __cpu ##_MPI_BASE,		\
 	[RSET_PCMCIA]		= BCM_## __cpu ##_PCMCIA_BASE,		\
 	[RSET_PCIE]		= BCM_## __cpu ##_PCIE_BASE,		\
@@ -569,6 +586,13 @@ enum bcm63xx_irq {
 	IRQ_ENET_PHY,
 	IRQ_OHCI0,
 	IRQ_EHCI0,
+	IRQ_USBD,
+	IRQ_USBD_RXDMA0,
+	IRQ_USBD_TXDMA0,
+	IRQ_USBD_RXDMA1,
+	IRQ_USBD_TXDMA1,
+	IRQ_USBD_RXDMA2,
+	IRQ_USBD_TXDMA2,
 	IRQ_ENET0_RXDMA,
 	IRQ_ENET0_TXDMA,
 	IRQ_ENET1_RXDMA,
@@ -602,8 +626,15 @@ enum bcm63xx_irq {
 #define BCM_6328_ENET0_IRQ		0
 #define BCM_6328_ENET1_IRQ		0
 #define BCM_6328_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 12)
-#define BCM_6328_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 9)
-#define BCM_6328_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 10)
+#define BCM_6328_OHCI0_IRQ		(BCM_6328_HIGH_IRQ_BASE + 9)
+#define BCM_6328_EHCI0_IRQ		(BCM_6328_HIGH_IRQ_BASE + 10)
+#define BCM_6328_USBD_IRQ		(IRQ_INTERNAL_BASE + 4)
+#define BCM_6328_USBD_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 5)
+#define BCM_6328_USBD_TXDMA0_IRQ	(IRQ_INTERNAL_BASE + 6)
+#define BCM_6328_USBD_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 7)
+#define BCM_6328_USBD_TXDMA1_IRQ	(IRQ_INTERNAL_BASE + 8)
+#define BCM_6328_USBD_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 9)
+#define BCM_6328_USBD_TXDMA2_IRQ	(IRQ_INTERNAL_BASE + 10)
 #define BCM_6328_PCMCIA_IRQ		0
 #define BCM_6328_ENET0_RXDMA_IRQ	0
 #define BCM_6328_ENET0_TXDMA_IRQ	0
@@ -615,10 +646,10 @@ enum bcm63xx_irq {
 #define BCM_6328_ENETSW_RXDMA1_IRQ	(BCM_6328_HIGH_IRQ_BASE + 1)
 #define BCM_6328_ENETSW_RXDMA2_IRQ	(BCM_6328_HIGH_IRQ_BASE + 2)
 #define BCM_6328_ENETSW_RXDMA3_IRQ	(BCM_6328_HIGH_IRQ_BASE + 3)
-#define BCM_6328_ENETSW_TXDMA0_IRQ	(BCM_6328_HIGH_IRQ_BASE + 4)
-#define BCM_6328_ENETSW_TXDMA1_IRQ	(BCM_6328_HIGH_IRQ_BASE + 5)
-#define BCM_6328_ENETSW_TXDMA2_IRQ	(BCM_6328_HIGH_IRQ_BASE + 6)
-#define BCM_6328_ENETSW_TXDMA3_IRQ	(BCM_6328_HIGH_IRQ_BASE + 7)
+#define BCM_6328_ENETSW_TXDMA0_IRQ	0
+#define BCM_6328_ENETSW_TXDMA1_IRQ	0
+#define BCM_6328_ENETSW_TXDMA2_IRQ	0
+#define BCM_6328_ENETSW_TXDMA3_IRQ	0
 #define BCM_6328_XTM_IRQ		(BCM_6328_HIGH_IRQ_BASE + 31)
 #define BCM_6328_XTM_DMA0_IRQ		(BCM_6328_HIGH_IRQ_BASE + 11)
 
@@ -642,6 +673,13 @@ enum bcm63xx_irq {
 #define BCM_6338_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)
 #define BCM_6338_OHCI0_IRQ		0
 #define BCM_6338_EHCI0_IRQ		0
+#define BCM_6338_USBD_IRQ		0
+#define BCM_6338_USBD_RXDMA0_IRQ	0
+#define BCM_6338_USBD_TXDMA0_IRQ	0
+#define BCM_6338_USBD_RXDMA1_IRQ	0
+#define BCM_6338_USBD_TXDMA1_IRQ	0
+#define BCM_6338_USBD_RXDMA2_IRQ	0
+#define BCM_6338_USBD_TXDMA2_IRQ	0
 #define BCM_6338_ENET0_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 15)
 #define BCM_6338_ENET0_TXDMA_IRQ	(IRQ_INTERNAL_BASE + 16)
 #define BCM_6338_ENET1_RXDMA_IRQ	0
@@ -673,6 +711,13 @@ enum bcm63xx_irq {
 #define BCM_6345_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 12)
 #define BCM_6345_OHCI0_IRQ		0
 #define BCM_6345_EHCI0_IRQ		0
+#define BCM_6345_USBD_IRQ		0
+#define BCM_6345_USBD_RXDMA0_IRQ	0
+#define BCM_6345_USBD_TXDMA0_IRQ	0
+#define BCM_6345_USBD_RXDMA1_IRQ	0
+#define BCM_6345_USBD_TXDMA1_IRQ	0
+#define BCM_6345_USBD_RXDMA2_IRQ	0
+#define BCM_6345_USBD_TXDMA2_IRQ	0
 #define BCM_6345_ENET0_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 13 + 1)
 #define BCM_6345_ENET0_TXDMA_IRQ	(IRQ_INTERNAL_BASE + 13 + 2)
 #define BCM_6345_ENET1_RXDMA_IRQ	0
@@ -704,6 +749,13 @@ enum bcm63xx_irq {
 #define BCM_6348_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)
 #define BCM_6348_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 12)
 #define BCM_6348_EHCI0_IRQ		0
+#define BCM_6348_USBD_IRQ		0
+#define BCM_6348_USBD_RXDMA0_IRQ	0
+#define BCM_6348_USBD_TXDMA0_IRQ	0
+#define BCM_6348_USBD_RXDMA1_IRQ	0
+#define BCM_6348_USBD_TXDMA1_IRQ	0
+#define BCM_6348_USBD_RXDMA2_IRQ	0
+#define BCM_6348_USBD_TXDMA2_IRQ	0
 #define BCM_6348_ENET0_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 20)
 #define BCM_6348_ENET0_TXDMA_IRQ	(IRQ_INTERNAL_BASE + 21)
 #define BCM_6348_ENET1_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 22)
@@ -735,6 +787,13 @@ enum bcm63xx_irq {
 #define BCM_6358_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 9)
 #define BCM_6358_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 5)
 #define BCM_6358_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 10)
+#define BCM_6358_USBD_IRQ		0
+#define BCM_6358_USBD_RXDMA0_IRQ	0
+#define BCM_6358_USBD_TXDMA0_IRQ	0
+#define BCM_6358_USBD_RXDMA1_IRQ	0
+#define BCM_6358_USBD_TXDMA1_IRQ	0
+#define BCM_6358_USBD_RXDMA2_IRQ	0
+#define BCM_6358_USBD_TXDMA2_IRQ	0
 #define BCM_6358_ENET0_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 15)
 #define BCM_6358_ENET0_TXDMA_IRQ	(IRQ_INTERNAL_BASE + 16)
 #define BCM_6358_ENET1_RXDMA_IRQ	(IRQ_INTERNAL_BASE + 17)
@@ -775,6 +834,13 @@ enum bcm63xx_irq {
 #define BCM_6368_ENET_PHY_IRQ		(IRQ_INTERNAL_BASE + 15)
 #define BCM_6368_OHCI0_IRQ		(IRQ_INTERNAL_BASE + 5)
 #define BCM_6368_EHCI0_IRQ		(IRQ_INTERNAL_BASE + 7)
+#define BCM_6368_USBD_IRQ		(IRQ_INTERNAL_BASE + 8)
+#define BCM_6368_USBD_RXDMA0_IRQ	(IRQ_INTERNAL_BASE + 26)
+#define BCM_6368_USBD_TXDMA0_IRQ	(IRQ_INTERNAL_BASE + 27)
+#define BCM_6368_USBD_RXDMA1_IRQ	(IRQ_INTERNAL_BASE + 28)
+#define BCM_6368_USBD_TXDMA1_IRQ	(IRQ_INTERNAL_BASE + 29)
+#define BCM_6368_USBD_RXDMA2_IRQ	(IRQ_INTERNAL_BASE + 30)
+#define BCM_6368_USBD_TXDMA2_IRQ	(IRQ_INTERNAL_BASE + 31)
 #define BCM_6368_PCMCIA_IRQ		0
 #define BCM_6368_ENET0_RXDMA_IRQ	0
 #define BCM_6368_ENET0_TXDMA_IRQ	0
@@ -815,6 +881,13 @@ extern const int *bcm63xx_irqs;
 	[IRQ_ENET_PHY]		= BCM_## __cpu ##_ENET_PHY_IRQ,		\
 	[IRQ_OHCI0]		= BCM_## __cpu ##_OHCI0_IRQ,		\
 	[IRQ_EHCI0]		= BCM_## __cpu ##_EHCI0_IRQ,		\
+	[IRQ_USBD]		= BCM_## __cpu ##_USBD_IRQ,		\
+	[IRQ_USBD_RXDMA0]	= BCM_## __cpu ##_USBD_RXDMA0_IRQ,	\
+	[IRQ_USBD_TXDMA0]	= BCM_## __cpu ##_USBD_TXDMA0_IRQ,	\
+	[IRQ_USBD_RXDMA1]	= BCM_## __cpu ##_USBD_RXDMA1_IRQ,	\
+	[IRQ_USBD_TXDMA1]	= BCM_## __cpu ##_USBD_TXDMA1_IRQ,	\
+	[IRQ_USBD_RXDMA2]	= BCM_## __cpu ##_USBD_RXDMA2_IRQ,	\
+	[IRQ_USBD_TXDMA2]	= BCM_## __cpu ##_USBD_TXDMA2_IRQ,	\
 	[IRQ_ENET0_RXDMA]	= BCM_## __cpu ##_ENET0_RXDMA_IRQ,	\
 	[IRQ_ENET0_TXDMA]	= BCM_## __cpu ##_ENET0_TXDMA_IRQ,	\
 	[IRQ_ENET1_RXDMA]	= BCM_## __cpu ##_ENET1_RXDMA_IRQ,	\
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_usbd.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_usbd.h
new file mode 100644
index 00000000000..5d6d6986f40
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_usbd.h
@@ -0,0 +1,17 @@
+#ifndef BCM63XX_DEV_USB_USBD_H_
+#define BCM63XX_DEV_USB_USBD_H_
+
+/*
+ * usb device platform data
+ */
+struct bcm63xx_usbd_platform_data {
+	/* board can only support full speed (USB 1.1) */
+	int use_fullspeed;
+
+	/* 0-based port index, for chips with >1 USB PHY */
+	int port_no;
+};
+
+int bcm63xx_usbd_register(const struct bcm63xx_usbd_platform_data *pd);
+
+#endif /* BCM63XX_DEV_USB_USBD_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_iudma.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_iudma.h
new file mode 100644
index 00000000000..a5bbff31c89
--- /dev/null
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_iudma.h
@@ -0,0 +1,38 @@
+#ifndef BCM63XX_IUDMA_H_
+#define BCM63XX_IUDMA_H_
+
+#include <linux/types.h>
+
+/*
+ * rx/tx dma descriptor
+ */
+struct bcm_enet_desc {
+	u32 len_stat;
+	u32 address;
+};
+
+/* control */
+#define DMADESC_LENGTH_SHIFT	16
+#define DMADESC_LENGTH_MASK	(0xfff << DMADESC_LENGTH_SHIFT)
+#define DMADESC_OWNER_MASK	(1 << 15)
+#define DMADESC_EOP_MASK	(1 << 14)
+#define DMADESC_SOP_MASK	(1 << 13)
+#define DMADESC_ESOP_MASK	(DMADESC_EOP_MASK | DMADESC_SOP_MASK)
+#define DMADESC_WRAP_MASK	(1 << 12)
+#define DMADESC_USB_NOZERO_MASK	(1 << 1)
+#define DMADESC_USB_ZERO_MASK	(1 << 0)
+
+/* status */
+#define DMADESC_UNDER_MASK	(1 << 9)
+#define DMADESC_APPEND_CRC	(1 << 8)
+#define DMADESC_OVSIZE_MASK	(1 << 4)
+#define DMADESC_RXER_MASK	(1 << 2)
+#define DMADESC_CRC_MASK	(1 << 1)
+#define DMADESC_OV_MASK		(1 << 0)
+#define DMADESC_ERR_MASK	(DMADESC_UNDER_MASK | \
+				DMADESC_OVSIZE_MASK | \
+				DMADESC_RXER_MASK | \
+				DMADESC_CRC_MASK | \
+				DMADESC_OV_MASK)
+
+#endif /* ! BCM63XX_IUDMA_H_ */
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 61f2a2a5099..12963d05da8 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -161,6 +161,7 @@
 /* External Interrupt Configuration register */
 #define PERF_EXTIRQ_CFG_REG_6328	0x18
 #define PERF_EXTIRQ_CFG_REG_6338	0x14
+#define PERF_EXTIRQ_CFG_REG_6345	0x14
 #define PERF_EXTIRQ_CFG_REG_6348	0x14
 #define PERF_EXTIRQ_CFG_REG_6358	0x14
 #define PERF_EXTIRQ_CFG_REG_6368	0x18
@@ -543,6 +544,12 @@
 #define GPIO_MODE_6368_SPI_SSN5		(1 << 31)
 
 
+#define GPIO_PINMUX_OTHR_REG		0x24
+#define GPIO_PINMUX_OTHR_6328_USB_SHIFT	12
+#define GPIO_PINMUX_OTHR_6328_USB_MASK	(3 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
+#define GPIO_PINMUX_OTHR_6328_USB_HOST	(1 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
+#define GPIO_PINMUX_OTHR_6328_USB_DEV	(2 << GPIO_PINMUX_OTHR_6328_USB_SHIFT)
+
 #define GPIO_BASEMODE_6368_REG		0x38
 #define GPIO_BASEMODE_6368_UART2	0x1
 #define GPIO_BASEMODE_6368_GPIO		0x0
@@ -670,6 +677,12 @@
 #define ENETDMA_BUFALLOC_FORCE_SHIFT	31
 #define ENETDMA_BUFALLOC_FORCE_MASK	(1 << ENETDMA_BUFALLOC_FORCE_SHIFT)
 
+/* Global interrupt status */
+#define ENETDMA_GLB_IRQSTAT_REG		(0x40)
+
+/* Global interrupt mask */
+#define ENETDMA_GLB_IRQMASK_REG		(0x44)
+
 /* Channel Configuration register */
 #define ENETDMA_CHANCFG_REG(x)		(0x100 + (x) * 0x10)
 #define ENETDMA_CHANCFG_EN_SHIFT	0
@@ -709,9 +722,11 @@
 /* Channel Configuration register */
 #define ENETDMAC_CHANCFG_REG(x)		((x) * 0x10)
 #define ENETDMAC_CHANCFG_EN_SHIFT	0
-#define ENETDMAC_CHANCFG_EN_MASK	(1 << ENETDMA_CHANCFG_EN_SHIFT)
+#define ENETDMAC_CHANCFG_EN_MASK	(1 << ENETDMAC_CHANCFG_EN_SHIFT)
 #define ENETDMAC_CHANCFG_PKTHALT_SHIFT	1
-#define ENETDMAC_CHANCFG_PKTHALT_MASK	(1 << ENETDMA_CHANCFG_PKTHALT_SHIFT)
+#define ENETDMAC_CHANCFG_PKTHALT_MASK	(1 << ENETDMAC_CHANCFG_PKTHALT_SHIFT)
+#define ENETDMAC_CHANCFG_BUFHALT_SHIFT	2
+#define ENETDMAC_CHANCFG_BUFHALT_MASK	(1 << ENETDMAC_CHANCFG_BUFHALT_SHIFT)
 
 /* Interrupt Control/Status register */
 #define ENETDMAC_IR_REG(x)		(0x4 + (x) * 0x10)
@@ -770,6 +785,8 @@
 #define USBH_PRIV_SWAP_6358_REG		0x0
 #define USBH_PRIV_SWAP_6368_REG		0x1c
 
+#define USBH_PRIV_SWAP_USBD_SHIFT	6
+#define USBH_PRIV_SWAP_USBD_MASK	(1 << USBH_PRIV_SWAP_USBD_SHIFT)
 #define USBH_PRIV_SWAP_EHCI_ENDN_SHIFT	4
 #define USBH_PRIV_SWAP_EHCI_ENDN_MASK	(1 << USBH_PRIV_SWAP_EHCI_ENDN_SHIFT)
 #define USBH_PRIV_SWAP_EHCI_DATA_SHIFT	3
@@ -779,6 +796,12 @@
 #define USBH_PRIV_SWAP_OHCI_DATA_SHIFT	0
 #define USBH_PRIV_SWAP_OHCI_DATA_MASK	(1 << USBH_PRIV_SWAP_OHCI_DATA_SHIFT)
 
+#define USBH_PRIV_UTMI_CTL_6368_REG	0x10
+#define USBH_PRIV_UTMI_CTL_NODRIV_SHIFT	12
+#define USBH_PRIV_UTMI_CTL_NODRIV_MASK	(0xf << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT)
+#define USBH_PRIV_UTMI_CTL_HOSTB_SHIFT	0
+#define USBH_PRIV_UTMI_CTL_HOSTB_MASK	(0xf << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT)
+
 #define USBH_PRIV_TEST_6358_REG		0x24
 #define USBH_PRIV_TEST_6368_REG		0x14
 
@@ -787,6 +810,147 @@
 #define USBH_PRIV_SETUP_IOC_MASK	(1 << USBH_PRIV_SETUP_IOC_SHIFT)
 
 
+/*************************************************************************
+ * _REG relative to RSET_USBD
+ *************************************************************************/
+
+/* General control */
+#define USBD_CONTROL_REG		0x00
+#define USBD_CONTROL_TXZLENINS_SHIFT	14
+#define USBD_CONTROL_TXZLENINS_MASK	(1 << USBD_CONTROL_TXZLENINS_SHIFT)
+#define USBD_CONTROL_AUTO_CSRS_SHIFT	13
+#define USBD_CONTROL_AUTO_CSRS_MASK	(1 << USBD_CONTROL_AUTO_CSRS_SHIFT)
+#define USBD_CONTROL_RXZSCFG_SHIFT	12
+#define USBD_CONTROL_RXZSCFG_MASK	(1 << USBD_CONTROL_RXZSCFG_SHIFT)
+#define USBD_CONTROL_INIT_SEL_SHIFT	8
+#define USBD_CONTROL_INIT_SEL_MASK	(0xf << USBD_CONTROL_INIT_SEL_SHIFT)
+#define USBD_CONTROL_FIFO_RESET_SHIFT	6
+#define USBD_CONTROL_FIFO_RESET_MASK	(3 << USBD_CONTROL_FIFO_RESET_SHIFT)
+#define USBD_CONTROL_SETUPERRLOCK_SHIFT	5
+#define USBD_CONTROL_SETUPERRLOCK_MASK	(1 << USBD_CONTROL_SETUPERRLOCK_SHIFT)
+#define USBD_CONTROL_DONE_CSRS_SHIFT	0
+#define USBD_CONTROL_DONE_CSRS_MASK	(1 << USBD_CONTROL_DONE_CSRS_SHIFT)
+
+/* Strap options */
+#define USBD_STRAPS_REG			0x04
+#define USBD_STRAPS_APP_SELF_PWR_SHIFT	10
+#define USBD_STRAPS_APP_SELF_PWR_MASK	(1 << USBD_STRAPS_APP_SELF_PWR_SHIFT)
+#define USBD_STRAPS_APP_DISCON_SHIFT	9
+#define USBD_STRAPS_APP_DISCON_MASK	(1 << USBD_STRAPS_APP_DISCON_SHIFT)
+#define USBD_STRAPS_APP_CSRPRGSUP_SHIFT	8
+#define USBD_STRAPS_APP_CSRPRGSUP_MASK	(1 << USBD_STRAPS_APP_CSRPRGSUP_SHIFT)
+#define USBD_STRAPS_APP_RMTWKUP_SHIFT	6
+#define USBD_STRAPS_APP_RMTWKUP_MASK	(1 << USBD_STRAPS_APP_RMTWKUP_SHIFT)
+#define USBD_STRAPS_APP_RAM_IF_SHIFT	7
+#define USBD_STRAPS_APP_RAM_IF_MASK	(1 << USBD_STRAPS_APP_RAM_IF_SHIFT)
+#define USBD_STRAPS_APP_8BITPHY_SHIFT	2
+#define USBD_STRAPS_APP_8BITPHY_MASK	(1 << USBD_STRAPS_APP_8BITPHY_SHIFT)
+#define USBD_STRAPS_SPEED_SHIFT		0
+#define USBD_STRAPS_SPEED_MASK		(3 << USBD_STRAPS_SPEED_SHIFT)
+
+/* Stall control */
+#define USBD_STALL_REG			0x08
+#define USBD_STALL_UPDATE_SHIFT		7
+#define USBD_STALL_UPDATE_MASK		(1 << USBD_STALL_UPDATE_SHIFT)
+#define USBD_STALL_ENABLE_SHIFT		6
+#define USBD_STALL_ENABLE_MASK		(1 << USBD_STALL_ENABLE_SHIFT)
+#define USBD_STALL_EPNUM_SHIFT		0
+#define USBD_STALL_EPNUM_MASK		(0xf << USBD_STALL_EPNUM_SHIFT)
+
+/* General status */
+#define USBD_STATUS_REG			0x0c
+#define USBD_STATUS_SOF_SHIFT		16
+#define USBD_STATUS_SOF_MASK		(0x7ff << USBD_STATUS_SOF_SHIFT)
+#define USBD_STATUS_SPD_SHIFT		12
+#define USBD_STATUS_SPD_MASK		(3 << USBD_STATUS_SPD_SHIFT)
+#define USBD_STATUS_ALTINTF_SHIFT	8
+#define USBD_STATUS_ALTINTF_MASK	(0xf << USBD_STATUS_ALTINTF_SHIFT)
+#define USBD_STATUS_INTF_SHIFT		4
+#define USBD_STATUS_INTF_MASK		(0xf << USBD_STATUS_INTF_SHIFT)
+#define USBD_STATUS_CFG_SHIFT		0
+#define USBD_STATUS_CFG_MASK		(0xf << USBD_STATUS_CFG_SHIFT)
+
+/* Other events */
+#define USBD_EVENTS_REG			0x10
+#define USBD_EVENTS_USB_LINK_SHIFT	10
+#define USBD_EVENTS_USB_LINK_MASK	(1 << USBD_EVENTS_USB_LINK_SHIFT)
+
+/* IRQ status */
+#define USBD_EVENT_IRQ_STATUS_REG	0x14
+
+/* IRQ level (2 bits per IRQ event) */
+#define USBD_EVENT_IRQ_CFG_HI_REG	0x18
+
+#define USBD_EVENT_IRQ_CFG_LO_REG	0x1c
+
+#define USBD_EVENT_IRQ_CFG_SHIFT(x)	((x & 0xf) << 1)
+#define USBD_EVENT_IRQ_CFG_MASK(x)	(3 << USBD_EVENT_IRQ_CFG_SHIFT(x))
+#define USBD_EVENT_IRQ_CFG_RISING(x)	(0 << USBD_EVENT_IRQ_CFG_SHIFT(x))
+#define USBD_EVENT_IRQ_CFG_FALLING(x)	(1 << USBD_EVENT_IRQ_CFG_SHIFT(x))
+
+/* IRQ mask (1=unmasked) */
+#define USBD_EVENT_IRQ_MASK_REG		0x20
+
+/* IRQ bits */
+#define USBD_EVENT_IRQ_USB_LINK		10
+#define USBD_EVENT_IRQ_SETCFG		9
+#define USBD_EVENT_IRQ_SETINTF		8
+#define USBD_EVENT_IRQ_ERRATIC_ERR	7
+#define USBD_EVENT_IRQ_SET_CSRS		6
+#define USBD_EVENT_IRQ_SUSPEND		5
+#define USBD_EVENT_IRQ_EARLY_SUSPEND	4
+#define USBD_EVENT_IRQ_SOF		3
+#define USBD_EVENT_IRQ_ENUM_ON		2
+#define USBD_EVENT_IRQ_SETUP		1
+#define USBD_EVENT_IRQ_USB_RESET	0
+
+/* TX FIFO partitioning */
+#define USBD_TXFIFO_CONFIG_REG		0x40
+#define USBD_TXFIFO_CONFIG_END_SHIFT	16
+#define USBD_TXFIFO_CONFIG_END_MASK	(0xff << USBD_TXFIFO_CONFIG_END_SHIFT)
+#define USBD_TXFIFO_CONFIG_START_SHIFT	0
+#define USBD_TXFIFO_CONFIG_START_MASK	(0xff << USBD_TXFIFO_CONFIG_START_SHIFT)
+
+/* RX FIFO partitioning */
+#define USBD_RXFIFO_CONFIG_REG		0x44
+#define USBD_RXFIFO_CONFIG_END_SHIFT	16
+#define USBD_RXFIFO_CONFIG_END_MASK	(0xff << USBD_TXFIFO_CONFIG_END_SHIFT)
+#define USBD_RXFIFO_CONFIG_START_SHIFT	0
+#define USBD_RXFIFO_CONFIG_START_MASK	(0xff << USBD_TXFIFO_CONFIG_START_SHIFT)
+
+/* TX FIFO/endpoint configuration */
+#define USBD_TXFIFO_EPSIZE_REG		0x48
+
+/* RX FIFO/endpoint configuration */
+#define USBD_RXFIFO_EPSIZE_REG		0x4c
+
+/* Endpoint<->DMA mappings */
+#define USBD_EPNUM_TYPEMAP_REG		0x50
+#define USBD_EPNUM_TYPEMAP_TYPE_SHIFT	8
+#define USBD_EPNUM_TYPEMAP_TYPE_MASK	(0x3 << USBD_EPNUM_TYPEMAP_TYPE_SHIFT)
+#define USBD_EPNUM_TYPEMAP_DMA_CH_SHIFT	0
+#define USBD_EPNUM_TYPEMAP_DMA_CH_MASK	(0xf << USBD_EPNUM_TYPEMAP_DMACH_SHIFT)
+
+/* Misc per-endpoint settings */
+#define USBD_CSR_SETUPADDR_REG		0x80
+#define USBD_CSR_SETUPADDR_DEF		0xb550
+
+#define USBD_CSR_EP_REG(x)		(0x84 + (x) * 4)
+#define USBD_CSR_EP_MAXPKT_SHIFT	19
+#define USBD_CSR_EP_MAXPKT_MASK		(0x7ff << USBD_CSR_EP_MAXPKT_SHIFT)
+#define USBD_CSR_EP_ALTIFACE_SHIFT	15
+#define USBD_CSR_EP_ALTIFACE_MASK	(0xf << USBD_CSR_EP_ALTIFACE_SHIFT)
+#define USBD_CSR_EP_IFACE_SHIFT		11
+#define USBD_CSR_EP_IFACE_MASK		(0xf << USBD_CSR_EP_IFACE_SHIFT)
+#define USBD_CSR_EP_CFG_SHIFT		7
+#define USBD_CSR_EP_CFG_MASK		(0xf << USBD_CSR_EP_CFG_SHIFT)
+#define USBD_CSR_EP_TYPE_SHIFT		5
+#define USBD_CSR_EP_TYPE_MASK		(3 << USBD_CSR_EP_TYPE_SHIFT)
+#define USBD_CSR_EP_DIR_SHIFT		4
+#define USBD_CSR_EP_DIR_MASK		(1 << USBD_CSR_EP_DIR_SHIFT)
+#define USBD_CSR_EP_LOG_SHIFT		0
+#define USBD_CSR_EP_LOG_MASK		(0xf << USBD_CSR_EP_LOG_SHIFT)
+
 
 /*************************************************************************
  * _REG relative to RSET_MPI
diff --git a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
index 474daaa5349..b0dd4bb53f7 100644
--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
@@ -5,6 +5,7 @@
 #include <linux/gpio.h>
 #include <linux/leds.h>
 #include <bcm63xx_dev_enet.h>
+#include <bcm63xx_dev_usb_usbd.h>
 #include <bcm63xx_dev_dsp.h>
 
 /*
@@ -44,6 +45,7 @@ struct board_info {
 	unsigned int	has_pccard:1;
 	unsigned int	has_ohci0:1;
 	unsigned int	has_ehci0:1;
+	unsigned int	has_usbd:1;
 	unsigned int	has_dsp:1;
 	unsigned int	has_uart0:1;
 	unsigned int	has_uart1:1;
@@ -52,6 +54,9 @@ struct board_info {
 	struct bcm63xx_enet_platform_data enet0;
 	struct bcm63xx_enet_platform_data enet1;
 
+	/* USB config */
+	struct bcm63xx_usbd_platform_data usbd;
+
 	/* DSP config */
 	struct bcm63xx_dsp_platform_data dsp;
 
diff --git a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
index f453c01d067..e9c408e8ff4 100644
--- a/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h
@@ -37,6 +37,7 @@
 #define cpu_has_mips64r2		0
 
 #define cpu_has_dsp			0
+#define cpu_has_dsp2			0
 #define cpu_has_mipsmt			0
 #define cpu_has_userlocal		0
 
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
index a58addb98cf..94ed063eec9 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h
@@ -53,12 +53,13 @@
 #define cpu_has_mips64r2	1
 #define cpu_has_mips_r2_exec_hazard 0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_mipsmt		0
 #define cpu_has_vint		0
 #define cpu_has_veic		0
 #define cpu_hwrena_impl_bits	0xc0000000
 
-#define kernel_uses_smartmips_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON)
+#define cpu_has_rixi		(cpu_data[0].cputype != CPU_CAVIUM_OCTEON)
 
 #define ARCH_HAS_IRQ_PER_CPU	1
 #define ARCH_HAS_SPINLOCK_PREFETCH 1
diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h
index c22a3078bf1..ff0d4909d84 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/irq.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h
@@ -21,10 +21,11 @@ enum octeon_irq {
 	OCTEON_IRQ_TIMER,
 /* sources in CIU_INTX_EN0 */
 	OCTEON_IRQ_WORKQ0,
-	OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 16,
-	OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15,
-	OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16,
+	OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 64,
+	OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 32,
 	OCTEON_IRQ_MBOX1,
+	OCTEON_IRQ_MBOX2,
+	OCTEON_IRQ_MBOX3,
 	OCTEON_IRQ_PCI_INT0,
 	OCTEON_IRQ_PCI_INT1,
 	OCTEON_IRQ_PCI_INT2,
diff --git a/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
index b3314cf5319..babc8374e37 100644
--- a/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-cobalt/cpu-feature-overrides.h
@@ -45,6 +45,7 @@
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_icache_snoops_remote_store	0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_mipsmt		0
 #define cpu_has_userlocal	0
 
diff --git a/arch/mips/include/asm/mach-db1x00/bcsr.h b/arch/mips/include/asm/mach-db1x00/bcsr.h
index bb9fc23d853..16f1cf5982b 100644
--- a/arch/mips/include/asm/mach-db1x00/bcsr.h
+++ b/arch/mips/include/asm/mach-db1x00/bcsr.h
@@ -162,6 +162,8 @@ enum bcsr_whoami_boards {
 #define BCSR_BOARD_PCIEXTARB		0x0200
 #define BCSR_BOARD_GPIO200RST		0x0400
 #define BCSR_BOARD_PCICLKOUT		0x0800
+#define BCSR_BOARD_PB1100_SD0PWR	0x0400
+#define BCSR_BOARD_PB1100_SD1PWR	0x0800
 #define BCSR_BOARD_PCICFG		0x1000
 #define BCSR_BOARD_SPISEL		0x2000	/* PB/DB1550 */
 #define BCSR_BOARD_SD0WP		0x4000	/* DB1100 */
diff --git a/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
index 9c8735158da..f4caacd2555 100644
--- a/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ip22/cpu-feature-overrides.h
@@ -30,6 +30,7 @@
 #define cpu_has_ic_fills_f_dc	0
 
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_mipsmt		0
 #define cpu_has_userlocal	0
 
diff --git a/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
index 7d3112b148d..1d2b6ff60d3 100644
--- a/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ip27/cpu-feature-overrides.h
@@ -26,6 +26,7 @@
 #define cpu_has_dc_aliases	0
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_icache_snoops_remote_store	1
 #define cpu_has_mipsmt		0
 #define cpu_has_userlocal	0
diff --git a/arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h
index 9a53b326f84..50d344ca60a 100644
--- a/arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ip28/cpu-feature-overrides.h
@@ -27,6 +27,7 @@
 #define cpu_has_dc_aliases	0 /* see probe_pcache() */
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_icache_snoops_remote_store  1
 #define cpu_has_mipsmt		0
 #define cpu_has_userlocal	0
diff --git a/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
index 6782fccebe8..2e1ec6cfedd 100644
--- a/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ip32/cpu-feature-overrides.h
@@ -37,6 +37,7 @@
 #define cpu_has_vtag_icache	0
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_4k_cache	1
 #define cpu_has_mipsmt		0
 #define cpu_has_userlocal	0
diff --git a/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h b/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
index d12e5c6477b..a225baaa215 100644
--- a/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
@@ -38,6 +38,7 @@
 #define cpu_has_mips64r1	0
 #define cpu_has_mips64r2	0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_mipsmt		0
 #define cpu_has_userlocal	0
 #define cpu_has_nofpuex 0
diff --git a/arch/mips/include/asm/mach-jz4740/platform.h b/arch/mips/include/asm/mach-jz4740/platform.h
index 564ab81d6cd..163e81db880 100644
--- a/arch/mips/include/asm/mach-jz4740/platform.h
+++ b/arch/mips/include/asm/mach-jz4740/platform.h
@@ -31,6 +31,7 @@ extern struct platform_device jz4740_pcm_device;
 extern struct platform_device jz4740_codec_device;
 extern struct platform_device jz4740_adc_device;
 extern struct platform_device jz4740_wdt_device;
+extern struct platform_device jz4740_pwm_device;
 
 void jz4740_serial_device_register(void);
 
diff --git a/arch/mips/include/asm/mach-jz4740/timer.h b/arch/mips/include/asm/mach-jz4740/timer.h
index 9baa03ce748..a7759fb1f73 100644
--- a/arch/mips/include/asm/mach-jz4740/timer.h
+++ b/arch/mips/include/asm/mach-jz4740/timer.h
@@ -16,7 +16,120 @@
 #ifndef __ASM_MACH_JZ4740_TIMER
 #define __ASM_MACH_JZ4740_TIMER
 
+#define JZ_REG_TIMER_STOP		0x0C
+#define JZ_REG_TIMER_STOP_SET		0x1C
+#define JZ_REG_TIMER_STOP_CLEAR		0x2C
+#define JZ_REG_TIMER_ENABLE		0x00
+#define JZ_REG_TIMER_ENABLE_SET		0x04
+#define JZ_REG_TIMER_ENABLE_CLEAR	0x08
+#define JZ_REG_TIMER_FLAG		0x10
+#define JZ_REG_TIMER_FLAG_SET		0x14
+#define JZ_REG_TIMER_FLAG_CLEAR		0x18
+#define JZ_REG_TIMER_MASK		0x20
+#define JZ_REG_TIMER_MASK_SET		0x24
+#define JZ_REG_TIMER_MASK_CLEAR		0x28
+
+#define JZ_REG_TIMER_DFR(x) (((x) * 0x10) + 0x30)
+#define JZ_REG_TIMER_DHR(x) (((x) * 0x10) + 0x34)
+#define JZ_REG_TIMER_CNT(x) (((x) * 0x10) + 0x38)
+#define JZ_REG_TIMER_CTRL(x) (((x) * 0x10) + 0x3C)
+
+#define JZ_TIMER_IRQ_HALF(x) BIT((x) + 0x10)
+#define JZ_TIMER_IRQ_FULL(x) BIT(x)
+
+#define JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN	BIT(9)
+#define JZ_TIMER_CTRL_PWM_ACTIVE_LOW		BIT(8)
+#define JZ_TIMER_CTRL_PWM_ENABLE		BIT(7)
+#define JZ_TIMER_CTRL_PRESCALE_MASK		0x1c
+#define JZ_TIMER_CTRL_PRESCALE_OFFSET		0x3
+#define JZ_TIMER_CTRL_PRESCALE_1		(0 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_4		(1 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_16		(2 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_64		(3 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_256		(4 << 3)
+#define JZ_TIMER_CTRL_PRESCALE_1024		(5 << 3)
+
+#define JZ_TIMER_CTRL_PRESCALER(x) ((x) << JZ_TIMER_CTRL_PRESCALE_OFFSET)
+
+#define JZ_TIMER_CTRL_SRC_EXT		BIT(2)
+#define JZ_TIMER_CTRL_SRC_RTC		BIT(1)
+#define JZ_TIMER_CTRL_SRC_PCLK		BIT(0)
+
+extern void __iomem *jz4740_timer_base;
+void __init jz4740_timer_init(void);
+
 void jz4740_timer_enable_watchdog(void);
 void jz4740_timer_disable_watchdog(void);
 
+static inline void jz4740_timer_stop(unsigned int timer)
+{
+	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
+}
+
+static inline void jz4740_timer_start(unsigned int timer)
+{
+	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
+}
+
+static inline bool jz4740_timer_is_enabled(unsigned int timer)
+{
+	return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer);
+}
+
+static inline void jz4740_timer_enable(unsigned int timer)
+{
+	writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
+}
+
+static inline void jz4740_timer_disable(unsigned int timer)
+{
+	writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);
+}
+
+static inline void jz4740_timer_set_period(unsigned int timer, uint16_t period)
+{
+	writew(period, jz4740_timer_base + JZ_REG_TIMER_DFR(timer));
+}
+
+static inline void jz4740_timer_set_duty(unsigned int timer, uint16_t duty)
+{
+	writew(duty, jz4740_timer_base + JZ_REG_TIMER_DHR(timer));
+}
+
+static inline void jz4740_timer_set_count(unsigned int timer, uint16_t count)
+{
+	writew(count, jz4740_timer_base + JZ_REG_TIMER_CNT(timer));
+}
+
+static inline uint16_t jz4740_timer_get_count(unsigned int timer)
+{
+	return readw(jz4740_timer_base + JZ_REG_TIMER_CNT(timer));
+}
+
+static inline void jz4740_timer_ack_full(unsigned int timer)
+{
+	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
+}
+
+static inline void jz4740_timer_irq_full_enable(unsigned int timer)
+{
+	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
+	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_CLEAR);
+}
+
+static inline void jz4740_timer_irq_full_disable(unsigned int timer)
+{
+	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_SET);
+}
+
+static inline void jz4740_timer_set_ctrl(unsigned int timer, uint16_t ctrl)
+{
+	writew(ctrl, jz4740_timer_base + JZ_REG_TIMER_CTRL(timer));
+}
+
+static inline uint16_t jz4740_timer_get_ctrl(unsigned int timer)
+{
+	return readw(jz4740_timer_base + JZ_REG_TIMER_CTRL(timer));
+}
+
 #endif
diff --git a/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h b/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h
index 318f982f04f..c6b63a40964 100644
--- a/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h
+++ b/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h
@@ -20,4 +20,6 @@
 
 #define MIPS_CPU_TIMER_IRQ			7
 
+#define MAX_IM			5
+
 #endif /* _FALCON_IRQ__ */
diff --git a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
index b385252584e..fccac359265 100644
--- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
+++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
@@ -57,6 +57,10 @@ extern __iomem void *ltq_sys1_membase;
 #define ltq_sys1_w32_mask(clear, set, reg)   \
 	ltq_sys1_w32((ltq_sys1_r32(reg) & ~(clear)) | (set), reg)
 
+/* allow the gpio and pinctrl drivers to talk to eachother */
+extern int pinctrl_falcon_get_range_size(int id);
+extern void pinctrl_falcon_add_gpio_range(struct pinctrl_gpio_range *range);
+
 /*
  * to keep the irq code generic we need to define this to 0 as falcon
  * has no EIU/EBU
diff --git a/arch/mips/include/asm/mach-lantiq/gpio.h b/arch/mips/include/asm/mach-lantiq/gpio.h
index f79505b4360..9ba1caebca5 100644
--- a/arch/mips/include/asm/mach-lantiq/gpio.h
+++ b/arch/mips/include/asm/mach-lantiq/gpio.h
@@ -1,10 +1,7 @@
 #ifndef __ASM_MIPS_MACH_LANTIQ_GPIO_H
 #define __ASM_MIPS_MACH_LANTIQ_GPIO_H
 
-static inline int gpio_to_irq(unsigned int gpio)
-{
-	return -1;
-}
+#define gpio_to_irq __gpio_to_irq
 
 #define gpio_get_value __gpio_get_value
 #define gpio_set_value __gpio_set_value
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
index aa0b3b866f8..5eadfe58252 100644
--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
@@ -21,4 +21,6 @@
 
 #define MIPS_CPU_TIMER_IRQ	7
 
+#define MAX_IM			5
+
 #endif
diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
index 675bd8641d5..1a05d854e34 100644
--- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h
@@ -32,6 +32,7 @@
 #define cpu_has_dc_aliases	(PAGE_SIZE < 0x4000)
 #define cpu_has_divec		0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_ejtag		0
 #define cpu_has_fpu		1
 #define cpu_has_ic_fills_f_dc	0
diff --git a/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
index 966db4be377..091deb1700e 100644
--- a/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h
@@ -26,6 +26,7 @@
 #define cpu_has_vtag_icache	0
 #define cpu_has_ic_fills_f_dc	1
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_mipsmt		0
 #define cpu_icache_snoops_remote_store	1
 
diff --git a/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h b/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h
index f751e3ec56f..58c76ec32a1 100644
--- a/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-powertv/cpu-feature-overrides.h
@@ -45,6 +45,7 @@
 #define cpu_has_mips64r1		0
 #define cpu_has_mips64r2		0
 #define cpu_has_dsp			0
+#define cpu_has_dsp2			0
 #define cpu_has_mipsmt			0
 #define cpu_has_userlocal		0
 #define cpu_has_nofpuex			0
diff --git a/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h b/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
index c3e4d3a4c95..b15307597ee 100644
--- a/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
@@ -60,6 +60,7 @@
 #define cpu_has_mips64r2		0
 
 #define cpu_has_dsp			0
+#define cpu_has_dsp2			0
 #define cpu_has_mipsmt			0
 
 /* #define cpu_has_nofpuex		? */
diff --git a/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h b/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
index ccf54336353..f095c529c48 100644
--- a/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-rm/cpu-feature-overrides.h
@@ -30,6 +30,7 @@
 #define cpu_has_dc_aliases	(PAGE_SIZE < 0x4000)
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_nofpuex		0
 #define cpu_has_64bits		1
 #define cpu_has_mipsmt		0
diff --git a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h b/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h
index 27aaaa5d925..7f3e3f9bd23 100644
--- a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-sead3/cpu-feature-overrides.h
@@ -4,9 +4,10 @@
  * for more details.
  *
  * Copyright (C) 2003, 2004 Chris Dearman
+ * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
  */
-#ifndef __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H
-#define __ASM_MACH_SIM_CPU_FEATURE_OVERRIDES_H
+#ifndef __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H
 
 
 /*
@@ -16,7 +17,7 @@
 #define cpu_has_tlb		1
 #define cpu_has_4kex		1
 #define cpu_has_4k_cache	1
-#define cpu_has_fpu		0
+/* #define cpu_has_fpu		? */
 /* #define cpu_has_32fpr	? */
 #define cpu_has_counter		1
 /* #define cpu_has_watch	? */
@@ -27,15 +28,19 @@
 /* #define cpu_has_prefetch	? */
 #define cpu_has_mcheck		1
 /* #define cpu_has_ejtag	? */
+#ifdef CONFIG_CPU_HAS_LLSC
 #define cpu_has_llsc		1
+#else
+#define cpu_has_llsc		0
+#endif
 /* #define cpu_has_vtag_icache	? */
 /* #define cpu_has_dc_aliases	? */
 /* #define cpu_has_ic_fills_f_dc ? */
-#define cpu_has_clo_clz		1
 #define cpu_has_nofpuex		0
 /* #define cpu_has_64bits	? */
 /* #define cpu_has_64bit_zero_reg ? */
 /* #define cpu_has_inclusive_pcaches ? */
+#define cpu_icache_snoops_remote_store 1
 #endif
 
 #ifdef CONFIG_CPU_MIPS64
@@ -57,11 +62,11 @@
 /* #define cpu_has_vtag_icache	? */
 /* #define cpu_has_dc_aliases	? */
 /* #define cpu_has_ic_fills_f_dc ? */
-#define cpu_has_clo_clz		1
 #define cpu_has_nofpuex		0
 /* #define cpu_has_64bits	? */
 /* #define cpu_has_64bit_zero_reg ? */
 /* #define cpu_has_inclusive_pcaches ? */
+#define cpu_icache_snoops_remote_store 1
 #endif
 
 #endif /* __ASM_MACH_MIPS_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-sead3/irq.h b/arch/mips/include/asm/mach-sead3/irq.h
new file mode 100644
index 00000000000..652ea4c38cd
--- /dev/null
+++ b/arch/mips/include/asm/mach-sead3/irq.h
@@ -0,0 +1,9 @@
+#ifndef __ASM_MACH_MIPS_IRQ_H
+#define __ASM_MACH_MIPS_IRQ_H
+
+#define NR_IRQS	256
+
+
+#include_next <irq.h>
+
+#endif /* __ASM_MACH_MIPS_IRQ_H */
diff --git a/arch/mips/include/asm/mach-sead3/kernel-entry-init.h b/arch/mips/include/asm/mach-sead3/kernel-entry-init.h
new file mode 100644
index 00000000000..3dfbd8e7947
--- /dev/null
+++ b/arch/mips/include/asm/mach-sead3/kernel-entry-init.h
@@ -0,0 +1,52 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Chris Dearman (chris@mips.com)
+ * Copyright (C) 2007 Mips Technologies, Inc.
+ */
+#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
+#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
+
+	.macro	kernel_entry_setup
+#ifdef CONFIG_MIPS_MT_SMTC
+	mfc0	t0, CP0_CONFIG
+	bgez	t0, 9f
+	mfc0	t0, CP0_CONFIG, 1
+	bgez	t0, 9f
+	mfc0	t0, CP0_CONFIG, 2
+	bgez	t0, 9f
+	mfc0	t0, CP0_CONFIG, 3
+	and	t0, 1<<2
+	bnez	t0, 0f
+9 :
+	/* Assume we came from YAMON... */
+	PTR_LA	v0, 0x9fc00534	/* YAMON print */
+	lw	v0, (v0)
+	move	a0, zero
+	PTR_LA	a1, nonmt_processor
+	jal	v0
+
+	PTR_LA	v0, 0x9fc00520	/* YAMON exit */
+	lw	v0, (v0)
+	li	a0, 1
+	jal	v0
+
+1 :	b	1b
+
+	__INITDATA
+nonmt_processor :
+	.asciz	"SMTC kernel requires the MT ASE to run\n"
+	__FINIT
+0 :
+#endif
+	.endm
+
+/*
+ * Do SMP slave processor setup necessary before we can safely execute C code.
+ */
+	.macro	smp_slave_setup
+	.endm
+
+#endif /* __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H */
diff --git a/arch/mips/include/asm/mach-mipssim/war.h b/arch/mips/include/asm/mach-sead3/war.h
index c8a74a3515e..7c6931d5f45 100644
--- a/arch/mips/include/asm/mach-mipssim/war.h
+++ b/arch/mips/include/asm/mach-sead3/war.h
@@ -5,8 +5,8 @@
  *
  * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
  */
-#ifndef __ASM_MIPS_MACH_MIPSSIM_WAR_H
-#define __ASM_MIPS_MACH_MIPSSIM_WAR_H
+#ifndef __ASM_MIPS_MACH_MIPS_WAR_H
+#define __ASM_MIPS_MACH_MIPS_WAR_H
 
 #define R4600_V1_INDEX_ICACHEOP_WAR	0
 #define R4600_V1_HIT_CACHEOP_WAR	0
@@ -14,12 +14,12 @@
 #define R5432_CP0_INTERRUPT_WAR		0
 #define BCM1250_M3_WAR			0
 #define SIBYTE_1956_WAR			0
-#define MIPS4K_ICACHE_REFILL_WAR	0
-#define MIPS_CACHE_SYNC_WAR		0
+#define MIPS4K_ICACHE_REFILL_WAR	1
+#define MIPS_CACHE_SYNC_WAR		1
 #define TX49XX_ICACHE_INDEX_INV_WAR	0
 #define RM9000_CDEX_SMP_WAR		0
-#define ICACHE_REFILLS_WORKAROUND_WAR	0
+#define ICACHE_REFILLS_WORKAROUND_WAR	1
 #define R10000_LLSC_WAR			0
 #define MIPS34K_MISSED_ITLB_WAR		0
 
-#endif /* __ASM_MIPS_MACH_MIPSSIM_WAR_H */
+#endif /* __ASM_MIPS_MACH_MIPS_WAR_H */
diff --git a/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h b/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h
index 1c1f92415b9..92927b62b5a 100644
--- a/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-sibyte/cpu-feature-overrides.h
@@ -26,6 +26,7 @@
 #define cpu_has_dc_aliases	0
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_mipsmt		0
 #define cpu_has_userlocal	0
 #define cpu_icache_snoops_remote_store	0
diff --git a/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h b/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
index 275eaf92c74..7f5144c6ce2 100644
--- a/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-tx49xx/cpu-feature-overrides.h
@@ -12,6 +12,7 @@
 #define cpu_has_vtag_icache	0
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_dsp	0
+#define cpu_has_dsp2		0
 #define cpu_has_mipsmt	0
 #define cpu_has_userlocal	0
 
diff --git a/arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h b/arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h
index 470e5e9e10d..56bdd329860 100644
--- a/arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-yosemite/cpu-feature-overrides.h
@@ -26,6 +26,7 @@
 #define cpu_has_dc_aliases	0
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_dsp		0
+#define cpu_has_dsp2		0
 #define cpu_has_mipsmt		0
 #define cpu_has_userlocal	0
 #define cpu_icache_snoops_remote_store	0
diff --git a/arch/mips/include/asm/mips-boards/maltaint.h b/arch/mips/include/asm/mips-boards/maltaint.h
index 5447d9fc421..66924481575 100644
--- a/arch/mips/include/asm/mips-boards/maltaint.h
+++ b/arch/mips/include/asm/mips-boards/maltaint.h
@@ -1,31 +1,16 @@
 /*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
- *
- * ########################################################################
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Defines for the Malta interrupt controller.
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
  *
+ * Copyright (C) 2000,2012 MIPS Technologies, Inc.  All rights reserved.
+ *      Carsten Langgaard <carstenl@mips.com>
+ *      Steven J. Hill <sjhill@mips.com>
  */
 #ifndef _MIPS_MALTAINT_H
 #define _MIPS_MALTAINT_H
 
-#include <irq.h>
+#define MIPS_GIC_IRQ_BASE	(MIPS_CPU_IRQ_BASE + 8)
 
 /*
  * Interrupts 0..15 are used for Malta ISA compatible interrupts
@@ -78,26 +63,6 @@
 #define MSC01E_INT_PERFCTR	10
 #define MSC01E_INT_CPUCTR	11
 
-/* GIC's Nomenclature for Core Interrupt Pins on the Malta */
-#define GIC_CPU_INT0		0 /* Core Interrupt 2 	*/
-#define GIC_CPU_INT1		1 /* .			*/
-#define GIC_CPU_INT2		2 /* .			*/
-#define GIC_CPU_INT3		3 /* .			*/
-#define GIC_CPU_INT4		4 /* .			*/
-#define GIC_CPU_INT5		5 /* Core Interrupt 5   */
-
-/* MALTA GIC local interrupts */
-#define GIC_INT_TMR             (GIC_CPU_INT5)
-#define GIC_INT_PERFCTR         (GIC_CPU_INT5)
-
-/* GIC constants */
-/* Add 2 to convert non-eic hw int # to eic vector # */
-#define GIC_CPU_TO_VEC_OFFSET   (2)
-/* If we map an intr to pin X, GIC will actually generate vector X+1 */
-#define GIC_PIN_TO_VEC_OFFSET   (1)
-
-#define GIC_EXT_INTR(x)		x
-
 /* External Interrupts used for IPI */
 #define GIC_IPI_EXT_INTR_RESCHED_VPE0	16
 #define GIC_IPI_EXT_INTR_CALLFNC_VPE0	17
@@ -108,10 +73,4 @@
 #define GIC_IPI_EXT_INTR_RESCHED_VPE3	22
 #define GIC_IPI_EXT_INTR_CALLFNC_VPE3	23
 
-#define MIPS_GIC_IRQ_BASE	(MIPS_CPU_IRQ_BASE + 8)
-
-#ifndef __ASSEMBLY__
-extern void maltaint_init(void);
-#endif
-
 #endif /* !(_MIPS_MALTAINT_H) */
diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h
new file mode 100644
index 00000000000..d634d9a807f
--- /dev/null
+++ b/arch/mips/include/asm/mips-boards/sead3int.h
@@ -0,0 +1,19 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000,2012 MIPS Technologies, Inc.  All rights reserved.
+ *      Douglas Leung <douglas@mips.com>
+ *      Steven J. Hill <sjhill@mips.com>
+ */
+#ifndef _MIPS_SEAD3INT_H
+#define _MIPS_SEAD3INT_H
+
+/* SEAD-3 GIC address space definitions. */
+#define GIC_BASE_ADDR		0x1b1c0000
+#define GIC_ADDRSPACE_SZ	(128 * 1024)
+
+#define MIPS_GIC_IRQ_BASE	(MIPS_CPU_IRQ_BASE + 0)
+
+#endif /* !(_MIPS_SEAD3INT_H) */
diff --git a/arch/mips/include/asm/mips-boards/simint.h b/arch/mips/include/asm/mips-boards/simint.h
deleted file mode 100644
index 8ef6db76d5c..00000000000
--- a/arch/mips/include/asm/mips-boards/simint.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#ifndef _MIPS_SIMINT_H
-#define _MIPS_SIMINT_H
-
-#include <irq.h>
-
-#define SIM_INT_BASE		0
-#define MIPSCPU_INT_MB0		2
-#define MIPS_CPU_TIMER_IRQ	7
-
-
-#define MSC01E_INT_BASE		64
-
-#define MSC01E_INT_CPUCTR	11
-
-#endif
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 7f87d824eeb..eb742895dcb 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -458,6 +458,8 @@
 #define  CAUSEF_IP7		(_ULCAST_(1)   << 15)
 #define  CAUSEB_IV		23
 #define  CAUSEF_IV		(_ULCAST_(1)   << 23)
+#define  CAUSEB_PCI		26
+#define  CAUSEF_PCI		(_ULCAST_(1)   << 26)
 #define  CAUSEB_CE		28
 #define  CAUSEF_CE		(_ULCAST_(3)   << 28)
 #define  CAUSEB_TI		30
@@ -590,12 +592,16 @@
 #define MIPS_CONF3_VEIC		(_ULCAST_(1) <<  6)
 #define MIPS_CONF3_LPA		(_ULCAST_(1) <<  7)
 #define MIPS_CONF3_DSP		(_ULCAST_(1) << 10)
+#define MIPS_CONF3_DSP2P	(_ULCAST_(1) << 11)
+#define MIPS_CONF3_RXI		(_ULCAST_(1) << 12)
 #define MIPS_CONF3_ULRI		(_ULCAST_(1) << 13)
 
 #define MIPS_CONF4_MMUSIZEEXT	(_ULCAST_(255) << 0)
 #define MIPS_CONF4_MMUEXTDEF	(_ULCAST_(3) << 14)
 #define MIPS_CONF4_MMUEXTDEF_MMUSIZEEXT (_ULCAST_(1) << 14)
 
+#define MIPS_CONF6_SYND		(_ULCAST_(1) << 13)
+
 #define MIPS_CONF7_WII		(_ULCAST_(1) << 31)
 
 #define MIPS_CONF7_RPS		(_ULCAST_(1) << 2)
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index dca8bce8c7a..26137da1c71 100644
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -35,11 +35,14 @@ typedef struct {
 } Elf64_Mips_Rela;
 
 #ifdef CONFIG_32BIT
-
 #define Elf_Shdr	Elf32_Shdr
 #define Elf_Sym		Elf32_Sym
 #define Elf_Ehdr	Elf32_Ehdr
 #define Elf_Addr	Elf32_Addr
+#define Elf_Rel		Elf32_Rel
+#define Elf_Rela	Elf32_Rela
+#define ELF_R_TYPE(X)	ELF32_R_TYPE(X)
+#define ELF_R_SYM(X)	ELF32_R_SYM(X)
 
 #define Elf_Mips_Rel	Elf32_Rel
 #define Elf_Mips_Rela	Elf32_Rela
@@ -50,11 +53,14 @@ typedef struct {
 #endif
 
 #ifdef CONFIG_64BIT
-
 #define Elf_Shdr	Elf64_Shdr
 #define Elf_Sym		Elf64_Sym
 #define Elf_Ehdr	Elf64_Ehdr
 #define Elf_Addr	Elf64_Addr
+#define Elf_Rel		Elf64_Rel
+#define Elf_Rela	Elf64_Rela
+#define ELF_R_TYPE(X)	ELF64_R_TYPE(X)
+#define ELF_R_SYM(X)	ELF64_R_SYM(X)
 
 #define Elf_Mips_Rel	Elf64_Mips_Rel
 #define Elf_Mips_Rela	Elf64_Mips_Rela
diff --git a/arch/mips/include/asm/octeon/cvmx-agl-defs.h b/arch/mips/include/asm/octeon/cvmx-agl-defs.h
index 30d68f2365e..542ee09510b 100644
--- a/arch/mips/include/asm/octeon/cvmx-agl-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-agl-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -106,6 +106,7 @@
 union cvmx_agl_gmx_bad_reg {
 	uint64_t u64;
 	struct cvmx_agl_gmx_bad_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t txpsh1:1;
 		uint64_t txpop1:1;
@@ -120,8 +121,25 @@ union cvmx_agl_gmx_bad_reg {
 		uint64_t reserved_4_21:18;
 		uint64_t out_ovr:2;
 		uint64_t reserved_0_1:2;
+#else
+		uint64_t reserved_0_1:2;
+		uint64_t out_ovr:2;
+		uint64_t reserved_4_21:18;
+		uint64_t loststat:2;
+		uint64_t reserved_24_25:2;
+		uint64_t statovr:1;
+		uint64_t reserved_27_31:5;
+		uint64_t ovrflw:1;
+		uint64_t txpop:1;
+		uint64_t txpsh:1;
+		uint64_t ovrflw1:1;
+		uint64_t txpop1:1;
+		uint64_t txpsh1:1;
+		uint64_t reserved_38_63:26;
+#endif
 	} s;
 	struct cvmx_agl_gmx_bad_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t txpsh1:1;
 		uint64_t txpop1:1;
@@ -136,9 +154,26 @@ union cvmx_agl_gmx_bad_reg {
 		uint64_t reserved_4_21:18;
 		uint64_t out_ovr:2;
 		uint64_t reserved_0_1:2;
+#else
+		uint64_t reserved_0_1:2;
+		uint64_t out_ovr:2;
+		uint64_t reserved_4_21:18;
+		uint64_t loststat:1;
+		uint64_t reserved_23_25:3;
+		uint64_t statovr:1;
+		uint64_t reserved_27_31:5;
+		uint64_t ovrflw:1;
+		uint64_t txpop:1;
+		uint64_t txpsh:1;
+		uint64_t ovrflw1:1;
+		uint64_t txpop1:1;
+		uint64_t txpsh1:1;
+		uint64_t reserved_38_63:26;
+#endif
 	} cn52xx;
 	struct cvmx_agl_gmx_bad_reg_cn52xx cn52xxp1;
 	struct cvmx_agl_gmx_bad_reg_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_35_63:29;
 		uint64_t txpsh:1;
 		uint64_t txpop:1;
@@ -150,32 +185,64 @@ union cvmx_agl_gmx_bad_reg {
 		uint64_t reserved_3_21:19;
 		uint64_t out_ovr:1;
 		uint64_t reserved_0_1:2;
+#else
+		uint64_t reserved_0_1:2;
+		uint64_t out_ovr:1;
+		uint64_t reserved_3_21:19;
+		uint64_t loststat:1;
+		uint64_t reserved_23_25:3;
+		uint64_t statovr:1;
+		uint64_t reserved_27_31:5;
+		uint64_t ovrflw:1;
+		uint64_t txpop:1;
+		uint64_t txpsh:1;
+		uint64_t reserved_35_63:29;
+#endif
 	} cn56xx;
 	struct cvmx_agl_gmx_bad_reg_cn56xx cn56xxp1;
+	struct cvmx_agl_gmx_bad_reg_s cn61xx;
 	struct cvmx_agl_gmx_bad_reg_s cn63xx;
 	struct cvmx_agl_gmx_bad_reg_s cn63xxp1;
+	struct cvmx_agl_gmx_bad_reg_s cn66xx;
+	struct cvmx_agl_gmx_bad_reg_s cn68xx;
+	struct cvmx_agl_gmx_bad_reg_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_bist {
 	uint64_t u64;
 	struct cvmx_agl_gmx_bist_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t status:25;
+#else
+		uint64_t status:25;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_agl_gmx_bist_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t status:10;
+#else
+		uint64_t status:10;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn52xx;
 	struct cvmx_agl_gmx_bist_cn52xx cn52xxp1;
 	struct cvmx_agl_gmx_bist_cn52xx cn56xx;
 	struct cvmx_agl_gmx_bist_cn52xx cn56xxp1;
+	struct cvmx_agl_gmx_bist_s cn61xx;
 	struct cvmx_agl_gmx_bist_s cn63xx;
 	struct cvmx_agl_gmx_bist_s cn63xxp1;
+	struct cvmx_agl_gmx_bist_s cn66xx;
+	struct cvmx_agl_gmx_bist_s cn68xx;
+	struct cvmx_agl_gmx_bist_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_drv_ctl {
 	uint64_t u64;
 	struct cvmx_agl_gmx_drv_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t byp_en1:1;
 		uint64_t reserved_45_47:3;
@@ -188,16 +255,39 @@ union cvmx_agl_gmx_drv_ctl {
 		uint64_t pctl:5;
 		uint64_t reserved_5_7:3;
 		uint64_t nctl:5;
+#else
+		uint64_t nctl:5;
+		uint64_t reserved_5_7:3;
+		uint64_t pctl:5;
+		uint64_t reserved_13_15:3;
+		uint64_t byp_en:1;
+		uint64_t reserved_17_31:15;
+		uint64_t nctl1:5;
+		uint64_t reserved_37_39:3;
+		uint64_t pctl1:5;
+		uint64_t reserved_45_47:3;
+		uint64_t byp_en1:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} s;
 	struct cvmx_agl_gmx_drv_ctl_s cn52xx;
 	struct cvmx_agl_gmx_drv_ctl_s cn52xxp1;
 	struct cvmx_agl_gmx_drv_ctl_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t byp_en:1;
 		uint64_t reserved_13_15:3;
 		uint64_t pctl:5;
 		uint64_t reserved_5_7:3;
 		uint64_t nctl:5;
+#else
+		uint64_t nctl:5;
+		uint64_t reserved_5_7:3;
+		uint64_t pctl:5;
+		uint64_t reserved_13_15:3;
+		uint64_t byp_en:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn56xx;
 	struct cvmx_agl_gmx_drv_ctl_cn56xx cn56xxp1;
 };
@@ -205,9 +295,15 @@ union cvmx_agl_gmx_drv_ctl {
 union cvmx_agl_gmx_inf_mode {
 	uint64_t u64;
 	struct cvmx_agl_gmx_inf_mode_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t en:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t en:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_agl_gmx_inf_mode_s cn52xx;
 	struct cvmx_agl_gmx_inf_mode_s cn52xxp1;
@@ -218,6 +314,7 @@ union cvmx_agl_gmx_inf_mode {
 union cvmx_agl_gmx_prtx_cfg {
 	uint64_t u64;
 	struct cvmx_agl_gmx_prtx_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t tx_idle:1;
 		uint64_t rx_idle:1;
@@ -231,8 +328,24 @@ union cvmx_agl_gmx_prtx_cfg {
 		uint64_t duplex:1;
 		uint64_t speed:1;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t speed:1;
+		uint64_t duplex:1;
+		uint64_t slottime:1;
+		uint64_t rx_en:1;
+		uint64_t tx_en:1;
+		uint64_t burst:1;
+		uint64_t reserved_7_7:1;
+		uint64_t speed_msb:1;
+		uint64_t reserved_9_11:3;
+		uint64_t rx_idle:1;
+		uint64_t tx_idle:1;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_agl_gmx_prtx_cfg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t tx_en:1;
 		uint64_t rx_en:1;
@@ -240,139 +353,230 @@ union cvmx_agl_gmx_prtx_cfg {
 		uint64_t duplex:1;
 		uint64_t speed:1;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t speed:1;
+		uint64_t duplex:1;
+		uint64_t slottime:1;
+		uint64_t rx_en:1;
+		uint64_t tx_en:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn52xx;
 	struct cvmx_agl_gmx_prtx_cfg_cn52xx cn52xxp1;
 	struct cvmx_agl_gmx_prtx_cfg_cn52xx cn56xx;
 	struct cvmx_agl_gmx_prtx_cfg_cn52xx cn56xxp1;
+	struct cvmx_agl_gmx_prtx_cfg_s cn61xx;
 	struct cvmx_agl_gmx_prtx_cfg_s cn63xx;
 	struct cvmx_agl_gmx_prtx_cfg_s cn63xxp1;
+	struct cvmx_agl_gmx_prtx_cfg_s cn66xx;
+	struct cvmx_agl_gmx_prtx_cfg_s cn68xx;
+	struct cvmx_agl_gmx_prtx_cfg_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_adr_cam0 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_adr_cam0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t adr:64;
+#else
+		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_adr_cam0_s cn52xx;
 	struct cvmx_agl_gmx_rxx_adr_cam0_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_adr_cam0_s cn56xx;
 	struct cvmx_agl_gmx_rxx_adr_cam0_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam0_s cn61xx;
 	struct cvmx_agl_gmx_rxx_adr_cam0_s cn63xx;
 	struct cvmx_agl_gmx_rxx_adr_cam0_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam0_s cn66xx;
+	struct cvmx_agl_gmx_rxx_adr_cam0_s cn68xx;
+	struct cvmx_agl_gmx_rxx_adr_cam0_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_adr_cam1 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_adr_cam1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t adr:64;
+#else
+		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_adr_cam1_s cn52xx;
 	struct cvmx_agl_gmx_rxx_adr_cam1_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_adr_cam1_s cn56xx;
 	struct cvmx_agl_gmx_rxx_adr_cam1_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam1_s cn61xx;
 	struct cvmx_agl_gmx_rxx_adr_cam1_s cn63xx;
 	struct cvmx_agl_gmx_rxx_adr_cam1_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam1_s cn66xx;
+	struct cvmx_agl_gmx_rxx_adr_cam1_s cn68xx;
+	struct cvmx_agl_gmx_rxx_adr_cam1_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_adr_cam2 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_adr_cam2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t adr:64;
+#else
+		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_adr_cam2_s cn52xx;
 	struct cvmx_agl_gmx_rxx_adr_cam2_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_adr_cam2_s cn56xx;
 	struct cvmx_agl_gmx_rxx_adr_cam2_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam2_s cn61xx;
 	struct cvmx_agl_gmx_rxx_adr_cam2_s cn63xx;
 	struct cvmx_agl_gmx_rxx_adr_cam2_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam2_s cn66xx;
+	struct cvmx_agl_gmx_rxx_adr_cam2_s cn68xx;
+	struct cvmx_agl_gmx_rxx_adr_cam2_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_adr_cam3 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_adr_cam3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t adr:64;
+#else
+		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_adr_cam3_s cn52xx;
 	struct cvmx_agl_gmx_rxx_adr_cam3_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_adr_cam3_s cn56xx;
 	struct cvmx_agl_gmx_rxx_adr_cam3_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam3_s cn61xx;
 	struct cvmx_agl_gmx_rxx_adr_cam3_s cn63xx;
 	struct cvmx_agl_gmx_rxx_adr_cam3_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam3_s cn66xx;
+	struct cvmx_agl_gmx_rxx_adr_cam3_s cn68xx;
+	struct cvmx_agl_gmx_rxx_adr_cam3_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_adr_cam4 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_adr_cam4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t adr:64;
+#else
+		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_adr_cam4_s cn52xx;
 	struct cvmx_agl_gmx_rxx_adr_cam4_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_adr_cam4_s cn56xx;
 	struct cvmx_agl_gmx_rxx_adr_cam4_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam4_s cn61xx;
 	struct cvmx_agl_gmx_rxx_adr_cam4_s cn63xx;
 	struct cvmx_agl_gmx_rxx_adr_cam4_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam4_s cn66xx;
+	struct cvmx_agl_gmx_rxx_adr_cam4_s cn68xx;
+	struct cvmx_agl_gmx_rxx_adr_cam4_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_adr_cam5 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_adr_cam5_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t adr:64;
+#else
 		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_adr_cam5_s cn52xx;
 	struct cvmx_agl_gmx_rxx_adr_cam5_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_adr_cam5_s cn56xx;
 	struct cvmx_agl_gmx_rxx_adr_cam5_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam5_s cn61xx;
 	struct cvmx_agl_gmx_rxx_adr_cam5_s cn63xx;
 	struct cvmx_agl_gmx_rxx_adr_cam5_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam5_s cn66xx;
+	struct cvmx_agl_gmx_rxx_adr_cam5_s cn68xx;
+	struct cvmx_agl_gmx_rxx_adr_cam5_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_adr_cam_en {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_adr_cam_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t en:8;
+#else
+		uint64_t en:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn52xx;
 	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn56xx;
 	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn61xx;
 	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn63xx;
 	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn66xx;
+	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn68xx;
+	struct cvmx_agl_gmx_rxx_adr_cam_en_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_adr_ctl {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_adr_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t cam_mode:1;
 		uint64_t mcst:2;
 		uint64_t bcst:1;
+#else
+		uint64_t bcst:1;
+		uint64_t mcst:2;
+		uint64_t cam_mode:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_adr_ctl_s cn52xx;
 	struct cvmx_agl_gmx_rxx_adr_ctl_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_adr_ctl_s cn56xx;
 	struct cvmx_agl_gmx_rxx_adr_ctl_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_adr_ctl_s cn61xx;
 	struct cvmx_agl_gmx_rxx_adr_ctl_s cn63xx;
 	struct cvmx_agl_gmx_rxx_adr_ctl_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_adr_ctl_s cn66xx;
+	struct cvmx_agl_gmx_rxx_adr_ctl_s cn68xx;
+	struct cvmx_agl_gmx_rxx_adr_ctl_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_decision {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_decision_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t cnt:5;
+#else
+		uint64_t cnt:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_decision_s cn52xx;
 	struct cvmx_agl_gmx_rxx_decision_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_decision_s cn56xx;
 	struct cvmx_agl_gmx_rxx_decision_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_decision_s cn61xx;
 	struct cvmx_agl_gmx_rxx_decision_s cn63xx;
 	struct cvmx_agl_gmx_rxx_decision_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_decision_s cn66xx;
+	struct cvmx_agl_gmx_rxx_decision_s cn68xx;
+	struct cvmx_agl_gmx_rxx_decision_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_frm_chk {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_frm_chk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t niberr:1;
 		uint64_t skperr:1;
@@ -384,8 +588,22 @@ union cvmx_agl_gmx_rxx_frm_chk {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_frm_chk_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t skperr:1;
 		uint64_t rcverr:1;
@@ -396,17 +614,34 @@ union cvmx_agl_gmx_rxx_frm_chk {
 		uint64_t maxerr:1;
 		uint64_t reserved_1_1:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t reserved_1_1:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn52xx;
 	struct cvmx_agl_gmx_rxx_frm_chk_cn52xx cn52xxp1;
 	struct cvmx_agl_gmx_rxx_frm_chk_cn52xx cn56xx;
 	struct cvmx_agl_gmx_rxx_frm_chk_cn52xx cn56xxp1;
+	struct cvmx_agl_gmx_rxx_frm_chk_s cn61xx;
 	struct cvmx_agl_gmx_rxx_frm_chk_s cn63xx;
 	struct cvmx_agl_gmx_rxx_frm_chk_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_frm_chk_s cn66xx;
+	struct cvmx_agl_gmx_rxx_frm_chk_s cn68xx;
+	struct cvmx_agl_gmx_rxx_frm_chk_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_frm_ctl {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_frm_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t ptp_mode:1;
 		uint64_t reserved_11_11:1;
@@ -421,8 +656,25 @@ union cvmx_agl_gmx_rxx_frm_ctl {
 		uint64_t ctl_drp:1;
 		uint64_t pre_strp:1;
 		uint64_t pre_chk:1;
+#else
+		uint64_t pre_chk:1;
+		uint64_t pre_strp:1;
+		uint64_t ctl_drp:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_smac:1;
+		uint64_t pre_free:1;
+		uint64_t vlan_len:1;
+		uint64_t pad_len:1;
+		uint64_t pre_align:1;
+		uint64_t null_dis:1;
+		uint64_t reserved_11_11:1;
+		uint64_t ptp_mode:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t pre_align:1;
 		uint64_t pad_len:1;
@@ -434,59 +686,104 @@ union cvmx_agl_gmx_rxx_frm_ctl {
 		uint64_t ctl_drp:1;
 		uint64_t pre_strp:1;
 		uint64_t pre_chk:1;
+#else
+		uint64_t pre_chk:1;
+		uint64_t pre_strp:1;
+		uint64_t ctl_drp:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_smac:1;
+		uint64_t pre_free:1;
+		uint64_t vlan_len:1;
+		uint64_t pad_len:1;
+		uint64_t pre_align:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn52xx;
 	struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx cn52xxp1;
 	struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx cn56xx;
 	struct cvmx_agl_gmx_rxx_frm_ctl_cn52xx cn56xxp1;
+	struct cvmx_agl_gmx_rxx_frm_ctl_s cn61xx;
 	struct cvmx_agl_gmx_rxx_frm_ctl_s cn63xx;
 	struct cvmx_agl_gmx_rxx_frm_ctl_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_frm_ctl_s cn66xx;
+	struct cvmx_agl_gmx_rxx_frm_ctl_s cn68xx;
+	struct cvmx_agl_gmx_rxx_frm_ctl_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_frm_max {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_frm_max_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t len:16;
+#else
+		uint64_t len:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_frm_max_s cn52xx;
 	struct cvmx_agl_gmx_rxx_frm_max_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_frm_max_s cn56xx;
 	struct cvmx_agl_gmx_rxx_frm_max_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_frm_max_s cn61xx;
 	struct cvmx_agl_gmx_rxx_frm_max_s cn63xx;
 	struct cvmx_agl_gmx_rxx_frm_max_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_frm_max_s cn66xx;
+	struct cvmx_agl_gmx_rxx_frm_max_s cn68xx;
+	struct cvmx_agl_gmx_rxx_frm_max_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_frm_min {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_frm_min_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t len:16;
+#else
+		uint64_t len:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_frm_min_s cn52xx;
 	struct cvmx_agl_gmx_rxx_frm_min_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_frm_min_s cn56xx;
 	struct cvmx_agl_gmx_rxx_frm_min_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_frm_min_s cn61xx;
 	struct cvmx_agl_gmx_rxx_frm_min_s cn63xx;
 	struct cvmx_agl_gmx_rxx_frm_min_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_frm_min_s cn66xx;
+	struct cvmx_agl_gmx_rxx_frm_min_s cn68xx;
+	struct cvmx_agl_gmx_rxx_frm_min_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_ifg {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_ifg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t ifg:4;
+#else
+		uint64_t ifg:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_ifg_s cn52xx;
 	struct cvmx_agl_gmx_rxx_ifg_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_ifg_s cn56xx;
 	struct cvmx_agl_gmx_rxx_ifg_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_ifg_s cn61xx;
 	struct cvmx_agl_gmx_rxx_ifg_s cn63xx;
 	struct cvmx_agl_gmx_rxx_ifg_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_ifg_s cn66xx;
+	struct cvmx_agl_gmx_rxx_ifg_s cn68xx;
+	struct cvmx_agl_gmx_rxx_ifg_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_int_en {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t pause_drp:1;
 		uint64_t phy_dupx:1;
@@ -508,8 +805,32 @@ union cvmx_agl_gmx_rxx_int_en {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t pause_drp:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_int_en_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t pause_drp:1;
 		uint64_t reserved_16_18:3;
@@ -529,17 +850,43 @@ union cvmx_agl_gmx_rxx_int_en {
 		uint64_t maxerr:1;
 		uint64_t reserved_1_1:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t reserved_1_1:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t reserved_16_18:3;
+		uint64_t pause_drp:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_agl_gmx_rxx_int_en_cn52xx cn52xxp1;
 	struct cvmx_agl_gmx_rxx_int_en_cn52xx cn56xx;
 	struct cvmx_agl_gmx_rxx_int_en_cn52xx cn56xxp1;
+	struct cvmx_agl_gmx_rxx_int_en_s cn61xx;
 	struct cvmx_agl_gmx_rxx_int_en_s cn63xx;
 	struct cvmx_agl_gmx_rxx_int_en_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_int_en_s cn66xx;
+	struct cvmx_agl_gmx_rxx_int_en_s cn68xx;
+	struct cvmx_agl_gmx_rxx_int_en_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_int_reg {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t pause_drp:1;
 		uint64_t phy_dupx:1;
@@ -561,8 +908,32 @@ union cvmx_agl_gmx_rxx_int_reg {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t pause_drp:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_int_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t pause_drp:1;
 		uint64_t reserved_16_18:3;
@@ -582,666 +953,1130 @@ union cvmx_agl_gmx_rxx_int_reg {
 		uint64_t maxerr:1;
 		uint64_t reserved_1_1:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t reserved_1_1:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t reserved_16_18:3;
+		uint64_t pause_drp:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_agl_gmx_rxx_int_reg_cn52xx cn52xxp1;
 	struct cvmx_agl_gmx_rxx_int_reg_cn52xx cn56xx;
 	struct cvmx_agl_gmx_rxx_int_reg_cn52xx cn56xxp1;
+	struct cvmx_agl_gmx_rxx_int_reg_s cn61xx;
 	struct cvmx_agl_gmx_rxx_int_reg_s cn63xx;
 	struct cvmx_agl_gmx_rxx_int_reg_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_int_reg_s cn66xx;
+	struct cvmx_agl_gmx_rxx_int_reg_s cn68xx;
+	struct cvmx_agl_gmx_rxx_int_reg_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_jabber {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_jabber_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt:16;
+#else
+		uint64_t cnt:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_jabber_s cn52xx;
 	struct cvmx_agl_gmx_rxx_jabber_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_jabber_s cn56xx;
 	struct cvmx_agl_gmx_rxx_jabber_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_jabber_s cn61xx;
 	struct cvmx_agl_gmx_rxx_jabber_s cn63xx;
 	struct cvmx_agl_gmx_rxx_jabber_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_jabber_s cn66xx;
+	struct cvmx_agl_gmx_rxx_jabber_s cn68xx;
+	struct cvmx_agl_gmx_rxx_jabber_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_pause_drop_time {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_pause_drop_time_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t status:16;
+#else
+		uint64_t status:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn52xx;
 	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn56xx;
 	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn61xx;
 	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn63xx;
 	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn66xx;
+	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn68xx;
+	struct cvmx_agl_gmx_rxx_pause_drop_time_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_rx_inbnd {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_rx_inbnd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t duplex:1;
 		uint64_t speed:2;
 		uint64_t status:1;
+#else
+		uint64_t status:1;
+		uint64_t speed:2;
+		uint64_t duplex:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
+	struct cvmx_agl_gmx_rxx_rx_inbnd_s cn61xx;
 	struct cvmx_agl_gmx_rxx_rx_inbnd_s cn63xx;
 	struct cvmx_agl_gmx_rxx_rx_inbnd_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_rx_inbnd_s cn66xx;
+	struct cvmx_agl_gmx_rxx_rx_inbnd_s cn68xx;
+	struct cvmx_agl_gmx_rxx_rx_inbnd_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_ctl {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t rd_clr:1;
+#else
+		uint64_t rd_clr:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_ctl_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_ctl_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_ctl_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_ctl_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_ctl_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_ctl_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_ctl_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_ctl_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_ctl_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_ctl_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_octs {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_octs_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t cnt:48;
+#else
+		uint64_t cnt:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_octs_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_octs_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_octs_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_octs_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_octs_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_octs_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_octs_ctl {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t cnt:48;
+#else
+		uint64_t cnt:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_octs_dmac {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t cnt:48;
+#else
+		uint64_t cnt:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_octs_drp {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_octs_drp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t cnt:48;
+#else
+		uint64_t cnt:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_pkts {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_pkts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_pkts_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_pkts_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_pkts_bad {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_pkts_ctl {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_pkts_dmac {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_stats_pkts_drp {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn52xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn56xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn61xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn63xx;
 	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn66xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn68xx;
+	struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rxx_udd_skp {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rxx_udd_skp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t fcssel:1;
 		uint64_t reserved_7_7:1;
 		uint64_t len:7;
+#else
+		uint64_t len:7;
+		uint64_t reserved_7_7:1;
+		uint64_t fcssel:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rxx_udd_skp_s cn52xx;
 	struct cvmx_agl_gmx_rxx_udd_skp_s cn52xxp1;
 	struct cvmx_agl_gmx_rxx_udd_skp_s cn56xx;
 	struct cvmx_agl_gmx_rxx_udd_skp_s cn56xxp1;
+	struct cvmx_agl_gmx_rxx_udd_skp_s cn61xx;
 	struct cvmx_agl_gmx_rxx_udd_skp_s cn63xx;
 	struct cvmx_agl_gmx_rxx_udd_skp_s cn63xxp1;
+	struct cvmx_agl_gmx_rxx_udd_skp_s cn66xx;
+	struct cvmx_agl_gmx_rxx_udd_skp_s cn68xx;
+	struct cvmx_agl_gmx_rxx_udd_skp_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rx_bp_dropx {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rx_bp_dropx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t mark:6;
+#else
+		uint64_t mark:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rx_bp_dropx_s cn52xx;
 	struct cvmx_agl_gmx_rx_bp_dropx_s cn52xxp1;
 	struct cvmx_agl_gmx_rx_bp_dropx_s cn56xx;
 	struct cvmx_agl_gmx_rx_bp_dropx_s cn56xxp1;
+	struct cvmx_agl_gmx_rx_bp_dropx_s cn61xx;
 	struct cvmx_agl_gmx_rx_bp_dropx_s cn63xx;
 	struct cvmx_agl_gmx_rx_bp_dropx_s cn63xxp1;
+	struct cvmx_agl_gmx_rx_bp_dropx_s cn66xx;
+	struct cvmx_agl_gmx_rx_bp_dropx_s cn68xx;
+	struct cvmx_agl_gmx_rx_bp_dropx_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rx_bp_offx {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rx_bp_offx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t mark:6;
+#else
+		uint64_t mark:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rx_bp_offx_s cn52xx;
 	struct cvmx_agl_gmx_rx_bp_offx_s cn52xxp1;
 	struct cvmx_agl_gmx_rx_bp_offx_s cn56xx;
 	struct cvmx_agl_gmx_rx_bp_offx_s cn56xxp1;
+	struct cvmx_agl_gmx_rx_bp_offx_s cn61xx;
 	struct cvmx_agl_gmx_rx_bp_offx_s cn63xx;
 	struct cvmx_agl_gmx_rx_bp_offx_s cn63xxp1;
+	struct cvmx_agl_gmx_rx_bp_offx_s cn66xx;
+	struct cvmx_agl_gmx_rx_bp_offx_s cn68xx;
+	struct cvmx_agl_gmx_rx_bp_offx_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rx_bp_onx {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rx_bp_onx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t mark:9;
+#else
+		uint64_t mark:9;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rx_bp_onx_s cn52xx;
 	struct cvmx_agl_gmx_rx_bp_onx_s cn52xxp1;
 	struct cvmx_agl_gmx_rx_bp_onx_s cn56xx;
 	struct cvmx_agl_gmx_rx_bp_onx_s cn56xxp1;
+	struct cvmx_agl_gmx_rx_bp_onx_s cn61xx;
 	struct cvmx_agl_gmx_rx_bp_onx_s cn63xx;
 	struct cvmx_agl_gmx_rx_bp_onx_s cn63xxp1;
+	struct cvmx_agl_gmx_rx_bp_onx_s cn66xx;
+	struct cvmx_agl_gmx_rx_bp_onx_s cn68xx;
+	struct cvmx_agl_gmx_rx_bp_onx_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rx_prt_info {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rx_prt_info_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t drop:2;
 		uint64_t reserved_2_15:14;
 		uint64_t commit:2;
+#else
+		uint64_t commit:2;
+		uint64_t reserved_2_15:14;
+		uint64_t drop:2;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rx_prt_info_s cn52xx;
 	struct cvmx_agl_gmx_rx_prt_info_s cn52xxp1;
 	struct cvmx_agl_gmx_rx_prt_info_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t drop:1;
 		uint64_t reserved_1_15:15;
 		uint64_t commit:1;
+#else
+		uint64_t commit:1;
+		uint64_t reserved_1_15:15;
+		uint64_t drop:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn56xx;
 	struct cvmx_agl_gmx_rx_prt_info_cn56xx cn56xxp1;
+	struct cvmx_agl_gmx_rx_prt_info_s cn61xx;
 	struct cvmx_agl_gmx_rx_prt_info_s cn63xx;
 	struct cvmx_agl_gmx_rx_prt_info_s cn63xxp1;
+	struct cvmx_agl_gmx_rx_prt_info_s cn66xx;
+	struct cvmx_agl_gmx_rx_prt_info_s cn68xx;
+	struct cvmx_agl_gmx_rx_prt_info_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_rx_tx_status {
 	uint64_t u64;
 	struct cvmx_agl_gmx_rx_tx_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t tx:2;
 		uint64_t reserved_2_3:2;
 		uint64_t rx:2;
+#else
+		uint64_t rx:2;
+		uint64_t reserved_2_3:2;
+		uint64_t tx:2;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_agl_gmx_rx_tx_status_s cn52xx;
 	struct cvmx_agl_gmx_rx_tx_status_s cn52xxp1;
 	struct cvmx_agl_gmx_rx_tx_status_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t tx:1;
 		uint64_t reserved_1_3:3;
 		uint64_t rx:1;
+#else
+		uint64_t rx:1;
+		uint64_t reserved_1_3:3;
+		uint64_t tx:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} cn56xx;
 	struct cvmx_agl_gmx_rx_tx_status_cn56xx cn56xxp1;
+	struct cvmx_agl_gmx_rx_tx_status_s cn61xx;
 	struct cvmx_agl_gmx_rx_tx_status_s cn63xx;
 	struct cvmx_agl_gmx_rx_tx_status_s cn63xxp1;
+	struct cvmx_agl_gmx_rx_tx_status_s cn66xx;
+	struct cvmx_agl_gmx_rx_tx_status_s cn68xx;
+	struct cvmx_agl_gmx_rx_tx_status_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_smacx {
 	uint64_t u64;
 	struct cvmx_agl_gmx_smacx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t smac:48;
+#else
+		uint64_t smac:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_agl_gmx_smacx_s cn52xx;
 	struct cvmx_agl_gmx_smacx_s cn52xxp1;
 	struct cvmx_agl_gmx_smacx_s cn56xx;
 	struct cvmx_agl_gmx_smacx_s cn56xxp1;
+	struct cvmx_agl_gmx_smacx_s cn61xx;
 	struct cvmx_agl_gmx_smacx_s cn63xx;
 	struct cvmx_agl_gmx_smacx_s cn63xxp1;
+	struct cvmx_agl_gmx_smacx_s cn66xx;
+	struct cvmx_agl_gmx_smacx_s cn68xx;
+	struct cvmx_agl_gmx_smacx_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_stat_bp {
 	uint64_t u64;
 	struct cvmx_agl_gmx_stat_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t bp:1;
 		uint64_t cnt:16;
+#else
+		uint64_t cnt:16;
+		uint64_t bp:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_agl_gmx_stat_bp_s cn52xx;
 	struct cvmx_agl_gmx_stat_bp_s cn52xxp1;
 	struct cvmx_agl_gmx_stat_bp_s cn56xx;
 	struct cvmx_agl_gmx_stat_bp_s cn56xxp1;
+	struct cvmx_agl_gmx_stat_bp_s cn61xx;
 	struct cvmx_agl_gmx_stat_bp_s cn63xx;
 	struct cvmx_agl_gmx_stat_bp_s cn63xxp1;
+	struct cvmx_agl_gmx_stat_bp_s cn66xx;
+	struct cvmx_agl_gmx_stat_bp_s cn68xx;
+	struct cvmx_agl_gmx_stat_bp_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_append {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_append_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t force_fcs:1;
 		uint64_t fcs:1;
 		uint64_t pad:1;
 		uint64_t preamble:1;
+#else
+		uint64_t preamble:1;
+		uint64_t pad:1;
+		uint64_t fcs:1;
+		uint64_t force_fcs:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_append_s cn52xx;
 	struct cvmx_agl_gmx_txx_append_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_append_s cn56xx;
 	struct cvmx_agl_gmx_txx_append_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_append_s cn61xx;
 	struct cvmx_agl_gmx_txx_append_s cn63xx;
 	struct cvmx_agl_gmx_txx_append_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_append_s cn66xx;
+	struct cvmx_agl_gmx_txx_append_s cn68xx;
+	struct cvmx_agl_gmx_txx_append_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_clk {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_clk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t clk_cnt:6;
+#else
+		uint64_t clk_cnt:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
+	struct cvmx_agl_gmx_txx_clk_s cn61xx;
 	struct cvmx_agl_gmx_txx_clk_s cn63xx;
 	struct cvmx_agl_gmx_txx_clk_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_clk_s cn66xx;
+	struct cvmx_agl_gmx_txx_clk_s cn68xx;
+	struct cvmx_agl_gmx_txx_clk_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_ctl {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t xsdef_en:1;
 		uint64_t xscol_en:1;
+#else
+		uint64_t xscol_en:1;
+		uint64_t xsdef_en:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_ctl_s cn52xx;
 	struct cvmx_agl_gmx_txx_ctl_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_ctl_s cn56xx;
 	struct cvmx_agl_gmx_txx_ctl_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_ctl_s cn61xx;
 	struct cvmx_agl_gmx_txx_ctl_s cn63xx;
 	struct cvmx_agl_gmx_txx_ctl_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_ctl_s cn66xx;
+	struct cvmx_agl_gmx_txx_ctl_s cn68xx;
+	struct cvmx_agl_gmx_txx_ctl_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_min_pkt {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_min_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t min_size:8;
+#else
+		uint64_t min_size:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_min_pkt_s cn52xx;
 	struct cvmx_agl_gmx_txx_min_pkt_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_min_pkt_s cn56xx;
 	struct cvmx_agl_gmx_txx_min_pkt_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_min_pkt_s cn61xx;
 	struct cvmx_agl_gmx_txx_min_pkt_s cn63xx;
 	struct cvmx_agl_gmx_txx_min_pkt_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_min_pkt_s cn66xx;
+	struct cvmx_agl_gmx_txx_min_pkt_s cn68xx;
+	struct cvmx_agl_gmx_txx_min_pkt_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_pause_pkt_interval {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_pause_pkt_interval_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t interval:16;
+#else
+		uint64_t interval:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn52xx;
 	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn56xx;
 	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn61xx;
 	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn63xx;
 	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn66xx;
+	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn68xx;
+	struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_pause_pkt_time {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_pause_pkt_time_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t time:16;
+#else
+		uint64_t time:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn52xx;
 	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn56xx;
 	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn61xx;
 	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn63xx;
 	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn66xx;
+	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn68xx;
+	struct cvmx_agl_gmx_txx_pause_pkt_time_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_pause_togo {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_pause_togo_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t time:16;
+#else
+		uint64_t time:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_pause_togo_s cn52xx;
 	struct cvmx_agl_gmx_txx_pause_togo_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_pause_togo_s cn56xx;
 	struct cvmx_agl_gmx_txx_pause_togo_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_pause_togo_s cn61xx;
 	struct cvmx_agl_gmx_txx_pause_togo_s cn63xx;
 	struct cvmx_agl_gmx_txx_pause_togo_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_pause_togo_s cn66xx;
+	struct cvmx_agl_gmx_txx_pause_togo_s cn68xx;
+	struct cvmx_agl_gmx_txx_pause_togo_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_pause_zero {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_pause_zero_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t send:1;
+#else
+		uint64_t send:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_pause_zero_s cn52xx;
 	struct cvmx_agl_gmx_txx_pause_zero_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_pause_zero_s cn56xx;
 	struct cvmx_agl_gmx_txx_pause_zero_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_pause_zero_s cn61xx;
 	struct cvmx_agl_gmx_txx_pause_zero_s cn63xx;
 	struct cvmx_agl_gmx_txx_pause_zero_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_pause_zero_s cn66xx;
+	struct cvmx_agl_gmx_txx_pause_zero_s cn68xx;
+	struct cvmx_agl_gmx_txx_pause_zero_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_soft_pause {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_soft_pause_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t time:16;
+#else
+		uint64_t time:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_soft_pause_s cn52xx;
 	struct cvmx_agl_gmx_txx_soft_pause_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_soft_pause_s cn56xx;
 	struct cvmx_agl_gmx_txx_soft_pause_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_soft_pause_s cn61xx;
 	struct cvmx_agl_gmx_txx_soft_pause_s cn63xx;
 	struct cvmx_agl_gmx_txx_soft_pause_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_soft_pause_s cn66xx;
+	struct cvmx_agl_gmx_txx_soft_pause_s cn68xx;
+	struct cvmx_agl_gmx_txx_soft_pause_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat0 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t xsdef:32;
 		uint64_t xscol:32;
+#else
+		uint64_t xscol:32;
+		uint64_t xsdef:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat0_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat0_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat0_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat0_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat0_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat0_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat0_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat0_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat0_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat0_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat1 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t scol:32;
 		uint64_t mcol:32;
+#else
+		uint64_t mcol:32;
+		uint64_t scol:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat1_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat1_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat1_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat1_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat1_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat1_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat1_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat1_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat1_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat1_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat2 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t octs:48;
+#else
+		uint64_t octs:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat2_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat2_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat2_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat2_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat2_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat2_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat2_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat2_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat2_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat2_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat3 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t pkts:32;
+#else
+		uint64_t pkts:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat3_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat3_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat3_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat3_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat3_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat3_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat3_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat3_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat3_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat3_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat4 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t hist1:32;
 		uint64_t hist0:32;
+#else
+		uint64_t hist0:32;
+		uint64_t hist1:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat4_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat4_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat4_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat4_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat4_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat4_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat4_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat4_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat4_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat4_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat5 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat5_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t hist3:32;
 		uint64_t hist2:32;
+#else
+		uint64_t hist2:32;
+		uint64_t hist3:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat5_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat5_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat5_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat5_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat5_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat5_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat5_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat5_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat5_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat5_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat6 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat6_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t hist5:32;
 		uint64_t hist4:32;
+#else
+		uint64_t hist4:32;
+		uint64_t hist5:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat6_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat6_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat6_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat6_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat6_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat6_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat6_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat6_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat6_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat6_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat7 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat7_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t hist7:32;
 		uint64_t hist6:32;
+#else
+		uint64_t hist6:32;
+		uint64_t hist7:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat7_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat7_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat7_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat7_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat7_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat7_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat7_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat7_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat7_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat7_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat8 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat8_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mcst:32;
 		uint64_t bcst:32;
+#else
+		uint64_t bcst:32;
+		uint64_t mcst:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat8_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat8_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat8_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat8_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat8_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat8_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat8_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat8_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat8_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat8_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stat9 {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stat9_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t undflw:32;
 		uint64_t ctl:32;
+#else
+		uint64_t ctl:32;
+		uint64_t undflw:32;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stat9_s cn52xx;
 	struct cvmx_agl_gmx_txx_stat9_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stat9_s cn56xx;
 	struct cvmx_agl_gmx_txx_stat9_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stat9_s cn61xx;
 	struct cvmx_agl_gmx_txx_stat9_s cn63xx;
 	struct cvmx_agl_gmx_txx_stat9_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stat9_s cn66xx;
+	struct cvmx_agl_gmx_txx_stat9_s cn68xx;
+	struct cvmx_agl_gmx_txx_stat9_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_stats_ctl {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_stats_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t rd_clr:1;
+#else
+		uint64_t rd_clr:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_stats_ctl_s cn52xx;
 	struct cvmx_agl_gmx_txx_stats_ctl_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_stats_ctl_s cn56xx;
 	struct cvmx_agl_gmx_txx_stats_ctl_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_stats_ctl_s cn61xx;
 	struct cvmx_agl_gmx_txx_stats_ctl_s cn63xx;
 	struct cvmx_agl_gmx_txx_stats_ctl_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_stats_ctl_s cn66xx;
+	struct cvmx_agl_gmx_txx_stats_ctl_s cn68xx;
+	struct cvmx_agl_gmx_txx_stats_ctl_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_txx_thresh {
 	uint64_t u64;
 	struct cvmx_agl_gmx_txx_thresh_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t cnt:6;
+#else
+		uint64_t cnt:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_agl_gmx_txx_thresh_s cn52xx;
 	struct cvmx_agl_gmx_txx_thresh_s cn52xxp1;
 	struct cvmx_agl_gmx_txx_thresh_s cn56xx;
 	struct cvmx_agl_gmx_txx_thresh_s cn56xxp1;
+	struct cvmx_agl_gmx_txx_thresh_s cn61xx;
 	struct cvmx_agl_gmx_txx_thresh_s cn63xx;
 	struct cvmx_agl_gmx_txx_thresh_s cn63xxp1;
+	struct cvmx_agl_gmx_txx_thresh_s cn66xx;
+	struct cvmx_agl_gmx_txx_thresh_s cn68xx;
+	struct cvmx_agl_gmx_txx_thresh_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_bp {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t bp:2;
+#else
+		uint64_t bp:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_bp_s cn52xx;
 	struct cvmx_agl_gmx_tx_bp_s cn52xxp1;
 	struct cvmx_agl_gmx_tx_bp_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t bp:1;
+#else
+		uint64_t bp:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn56xx;
 	struct cvmx_agl_gmx_tx_bp_cn56xx cn56xxp1;
+	struct cvmx_agl_gmx_tx_bp_s cn61xx;
 	struct cvmx_agl_gmx_tx_bp_s cn63xx;
 	struct cvmx_agl_gmx_tx_bp_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_bp_s cn66xx;
+	struct cvmx_agl_gmx_tx_bp_s cn68xx;
+	struct cvmx_agl_gmx_tx_bp_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_col_attempt {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_col_attempt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t limit:5;
+#else
+		uint64_t limit:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_col_attempt_s cn52xx;
 	struct cvmx_agl_gmx_tx_col_attempt_s cn52xxp1;
 	struct cvmx_agl_gmx_tx_col_attempt_s cn56xx;
 	struct cvmx_agl_gmx_tx_col_attempt_s cn56xxp1;
+	struct cvmx_agl_gmx_tx_col_attempt_s cn61xx;
 	struct cvmx_agl_gmx_tx_col_attempt_s cn63xx;
 	struct cvmx_agl_gmx_tx_col_attempt_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_col_attempt_s cn66xx;
+	struct cvmx_agl_gmx_tx_col_attempt_s cn68xx;
+	struct cvmx_agl_gmx_tx_col_attempt_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_ifg {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_ifg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ifg2:4;
 		uint64_t ifg1:4;
+#else
+		uint64_t ifg1:4;
+		uint64_t ifg2:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_ifg_s cn52xx;
 	struct cvmx_agl_gmx_tx_ifg_s cn52xxp1;
 	struct cvmx_agl_gmx_tx_ifg_s cn56xx;
 	struct cvmx_agl_gmx_tx_ifg_s cn56xxp1;
+	struct cvmx_agl_gmx_tx_ifg_s cn61xx;
 	struct cvmx_agl_gmx_tx_ifg_s cn63xx;
 	struct cvmx_agl_gmx_tx_ifg_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_ifg_s cn66xx;
+	struct cvmx_agl_gmx_tx_ifg_s cn68xx;
+	struct cvmx_agl_gmx_tx_ifg_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_int_en {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_22_63:42;
 		uint64_t ptp_lost:2;
 		uint64_t reserved_18_19:2;
@@ -1254,8 +2089,23 @@ union cvmx_agl_gmx_tx_int_en {
 		uint64_t undflw:2;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:2;
+		uint64_t reserved_4_7:4;
+		uint64_t xscol:2;
+		uint64_t reserved_10_11:2;
+		uint64_t xsdef:2;
+		uint64_t reserved_14_15:2;
+		uint64_t late_col:2;
+		uint64_t reserved_18_19:2;
+		uint64_t ptp_lost:2;
+		uint64_t reserved_22_63:42;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_int_en_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t late_col:2;
 		uint64_t reserved_14_15:2;
@@ -1266,9 +2116,22 @@ union cvmx_agl_gmx_tx_int_en {
 		uint64_t undflw:2;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:2;
+		uint64_t reserved_4_7:4;
+		uint64_t xscol:2;
+		uint64_t reserved_10_11:2;
+		uint64_t xsdef:2;
+		uint64_t reserved_14_15:2;
+		uint64_t late_col:2;
+		uint64_t reserved_18_63:46;
+#endif
 	} cn52xx;
 	struct cvmx_agl_gmx_tx_int_en_cn52xx cn52xxp1;
 	struct cvmx_agl_gmx_tx_int_en_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t late_col:1;
 		uint64_t reserved_13_15:3;
@@ -1279,15 +2142,32 @@ union cvmx_agl_gmx_tx_int_en {
 		uint64_t undflw:1;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:1;
+		uint64_t reserved_3_7:5;
+		uint64_t xscol:1;
+		uint64_t reserved_9_11:3;
+		uint64_t xsdef:1;
+		uint64_t reserved_13_15:3;
+		uint64_t late_col:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn56xx;
 	struct cvmx_agl_gmx_tx_int_en_cn56xx cn56xxp1;
+	struct cvmx_agl_gmx_tx_int_en_s cn61xx;
 	struct cvmx_agl_gmx_tx_int_en_s cn63xx;
 	struct cvmx_agl_gmx_tx_int_en_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_int_en_s cn66xx;
+	struct cvmx_agl_gmx_tx_int_en_s cn68xx;
+	struct cvmx_agl_gmx_tx_int_en_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_int_reg {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_22_63:42;
 		uint64_t ptp_lost:2;
 		uint64_t reserved_18_19:2;
@@ -1300,8 +2180,23 @@ union cvmx_agl_gmx_tx_int_reg {
 		uint64_t undflw:2;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:2;
+		uint64_t reserved_4_7:4;
+		uint64_t xscol:2;
+		uint64_t reserved_10_11:2;
+		uint64_t xsdef:2;
+		uint64_t reserved_14_15:2;
+		uint64_t late_col:2;
+		uint64_t reserved_18_19:2;
+		uint64_t ptp_lost:2;
+		uint64_t reserved_22_63:42;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_int_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t late_col:2;
 		uint64_t reserved_14_15:2;
@@ -1312,9 +2207,22 @@ union cvmx_agl_gmx_tx_int_reg {
 		uint64_t undflw:2;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:2;
+		uint64_t reserved_4_7:4;
+		uint64_t xscol:2;
+		uint64_t reserved_10_11:2;
+		uint64_t xsdef:2;
+		uint64_t reserved_14_15:2;
+		uint64_t late_col:2;
+		uint64_t reserved_18_63:46;
+#endif
 	} cn52xx;
 	struct cvmx_agl_gmx_tx_int_reg_cn52xx cn52xxp1;
 	struct cvmx_agl_gmx_tx_int_reg_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t late_col:1;
 		uint64_t reserved_13_15:3;
@@ -1325,96 +2233,171 @@ union cvmx_agl_gmx_tx_int_reg {
 		uint64_t undflw:1;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:1;
+		uint64_t reserved_3_7:5;
+		uint64_t xscol:1;
+		uint64_t reserved_9_11:3;
+		uint64_t xsdef:1;
+		uint64_t reserved_13_15:3;
+		uint64_t late_col:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn56xx;
 	struct cvmx_agl_gmx_tx_int_reg_cn56xx cn56xxp1;
+	struct cvmx_agl_gmx_tx_int_reg_s cn61xx;
 	struct cvmx_agl_gmx_tx_int_reg_s cn63xx;
 	struct cvmx_agl_gmx_tx_int_reg_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_int_reg_s cn66xx;
+	struct cvmx_agl_gmx_tx_int_reg_s cn68xx;
+	struct cvmx_agl_gmx_tx_int_reg_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_jam {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_jam_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t jam:8;
+#else
+		uint64_t jam:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_jam_s cn52xx;
 	struct cvmx_agl_gmx_tx_jam_s cn52xxp1;
 	struct cvmx_agl_gmx_tx_jam_s cn56xx;
 	struct cvmx_agl_gmx_tx_jam_s cn56xxp1;
+	struct cvmx_agl_gmx_tx_jam_s cn61xx;
 	struct cvmx_agl_gmx_tx_jam_s cn63xx;
 	struct cvmx_agl_gmx_tx_jam_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_jam_s cn66xx;
+	struct cvmx_agl_gmx_tx_jam_s cn68xx;
+	struct cvmx_agl_gmx_tx_jam_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_lfsr {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_lfsr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t lfsr:16;
+#else
+		uint64_t lfsr:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_lfsr_s cn52xx;
 	struct cvmx_agl_gmx_tx_lfsr_s cn52xxp1;
 	struct cvmx_agl_gmx_tx_lfsr_s cn56xx;
 	struct cvmx_agl_gmx_tx_lfsr_s cn56xxp1;
+	struct cvmx_agl_gmx_tx_lfsr_s cn61xx;
 	struct cvmx_agl_gmx_tx_lfsr_s cn63xx;
 	struct cvmx_agl_gmx_tx_lfsr_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_lfsr_s cn66xx;
+	struct cvmx_agl_gmx_tx_lfsr_s cn68xx;
+	struct cvmx_agl_gmx_tx_lfsr_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_ovr_bp {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_ovr_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t en:2;
 		uint64_t reserved_6_7:2;
 		uint64_t bp:2;
 		uint64_t reserved_2_3:2;
 		uint64_t ign_full:2;
+#else
+		uint64_t ign_full:2;
+		uint64_t reserved_2_3:2;
+		uint64_t bp:2;
+		uint64_t reserved_6_7:2;
+		uint64_t en:2;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_ovr_bp_s cn52xx;
 	struct cvmx_agl_gmx_tx_ovr_bp_s cn52xxp1;
 	struct cvmx_agl_gmx_tx_ovr_bp_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t en:1;
 		uint64_t reserved_5_7:3;
 		uint64_t bp:1;
 		uint64_t reserved_1_3:3;
 		uint64_t ign_full:1;
+#else
+		uint64_t ign_full:1;
+		uint64_t reserved_1_3:3;
+		uint64_t bp:1;
+		uint64_t reserved_5_7:3;
+		uint64_t en:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn56xx;
 	struct cvmx_agl_gmx_tx_ovr_bp_cn56xx cn56xxp1;
+	struct cvmx_agl_gmx_tx_ovr_bp_s cn61xx;
 	struct cvmx_agl_gmx_tx_ovr_bp_s cn63xx;
 	struct cvmx_agl_gmx_tx_ovr_bp_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_ovr_bp_s cn66xx;
+	struct cvmx_agl_gmx_tx_ovr_bp_s cn68xx;
+	struct cvmx_agl_gmx_tx_ovr_bp_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_pause_pkt_dmac {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t dmac:48;
+#else
+		uint64_t dmac:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn52xx;
 	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn52xxp1;
 	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn56xx;
 	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn56xxp1;
+	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn61xx;
 	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn63xx;
 	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn66xx;
+	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn68xx;
+	struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn68xxp1;
 };
 
 union cvmx_agl_gmx_tx_pause_pkt_type {
 	uint64_t u64;
 	struct cvmx_agl_gmx_tx_pause_pkt_type_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t type:16;
+#else
+		uint64_t type:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn52xx;
 	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn52xxp1;
 	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn56xx;
 	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn56xxp1;
+	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn61xx;
 	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn63xx;
 	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn63xxp1;
+	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn66xx;
+	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn68xx;
+	struct cvmx_agl_gmx_tx_pause_pkt_type_s cn68xxp1;
 };
 
 union cvmx_agl_prtx_ctl {
 	uint64_t u64;
 	struct cvmx_agl_prtx_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t drv_byp:1;
 		uint64_t reserved_62_62:1;
 		uint64_t cmp_pctl:6;
@@ -1438,9 +2421,38 @@ union cvmx_agl_prtx_ctl {
 		uint64_t enable:1;
 		uint64_t clkrst:1;
 		uint64_t mode:1;
+#else
+		uint64_t mode:1;
+		uint64_t clkrst:1;
+		uint64_t enable:1;
+		uint64_t comp:1;
+		uint64_t dllrst:1;
+		uint64_t reserved_5_7:3;
+		uint64_t clktx_set:5;
+		uint64_t reserved_13_14:2;
+		uint64_t clktx_byp:1;
+		uint64_t clkrx_set:5;
+		uint64_t reserved_21_22:2;
+		uint64_t clkrx_byp:1;
+		uint64_t clk_set:5;
+		uint64_t reserved_29_31:3;
+		uint64_t drv_nctl:6;
+		uint64_t reserved_38_39:2;
+		uint64_t drv_pctl:6;
+		uint64_t reserved_46_47:2;
+		uint64_t cmp_nctl:6;
+		uint64_t reserved_54_55:2;
+		uint64_t cmp_pctl:6;
+		uint64_t reserved_62_62:1;
+		uint64_t drv_byp:1;
+#endif
 	} s;
+	struct cvmx_agl_prtx_ctl_s cn61xx;
 	struct cvmx_agl_prtx_ctl_s cn63xx;
 	struct cvmx_agl_prtx_ctl_s cn63xxp1;
+	struct cvmx_agl_prtx_ctl_s cn66xx;
+	struct cvmx_agl_prtx_ctl_s cn68xx;
+	struct cvmx_agl_prtx_ctl_s cn68xxp1;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-asxx-defs.h b/arch/mips/include/asm/octeon/cvmx-asxx-defs.h
index 91415a85e8d..a1e21a3854c 100644
--- a/arch/mips/include/asm/octeon/cvmx-asxx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-asxx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,64 +28,43 @@
 #ifndef __CVMX_ASXX_DEFS_H__
 #define __CVMX_ASXX_DEFS_H__
 
-#define CVMX_ASXX_GMII_RX_CLK_SET(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000180ull + (((block_id) & 0) * 0x8000000ull))
-#define CVMX_ASXX_GMII_RX_DAT_SET(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000188ull + (((block_id) & 0) * 0x8000000ull))
-#define CVMX_ASXX_INT_EN(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000018ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_INT_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000010ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_MII_RX_DAT_SET(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000190ull + (((block_id) & 0) * 0x8000000ull))
-#define CVMX_ASXX_PRT_LOOP(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000040ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_BYPASS(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000248ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_BYPASS_SETTING(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000250ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_COMP(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000220ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_DATA_DRV(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000218ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_FCRAM_MODE(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000210ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_NCTL_STRONG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000230ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_NCTL_WEAK(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000240ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_PCTL_STRONG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000228ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_PCTL_WEAK(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000238ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RLD_SETTING(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000258ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RX_CLK_SETX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000020ull + (((offset) & 3) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RX_PRT_EN(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000000ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RX_WOL(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000100ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RX_WOL_MSK(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000108ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RX_WOL_POWOK(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000118ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_RX_WOL_SIG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000110ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_TX_CLK_SETX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000048ull + (((offset) & 3) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_TX_COMP_BYP(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000068ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_TX_HI_WATERX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000080ull + (((offset) & 3) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_ASXX_TX_PRT_EN(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000008ull + (((block_id) & 1) * 0x8000000ull))
+#define CVMX_ASXX_GMII_RX_CLK_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000180ull))
+#define CVMX_ASXX_GMII_RX_DAT_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000188ull))
+#define CVMX_ASXX_INT_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000018ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000010ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_MII_RX_DAT_SET(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000190ull))
+#define CVMX_ASXX_PRT_LOOP(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000040ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_BYPASS(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000248ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_BYPASS_SETTING(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000250ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_COMP(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000220ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_DATA_DRV(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000218ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_FCRAM_MODE(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000210ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_NCTL_STRONG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000230ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_NCTL_WEAK(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000240ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_PCTL_STRONG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000228ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_PCTL_WEAK(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000238ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RLD_SETTING(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000258ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RX_CLK_SETX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800B0000020ull) + (((offset) & 3) + ((block_id) & 1) * 0x1000000ull) * 8)
+#define CVMX_ASXX_RX_PRT_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000000ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RX_WOL(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000100ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RX_WOL_MSK(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000108ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RX_WOL_POWOK(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000118ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_RX_WOL_SIG(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000110ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_TX_CLK_SETX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800B0000048ull) + (((offset) & 3) + ((block_id) & 1) * 0x1000000ull) * 8)
+#define CVMX_ASXX_TX_COMP_BYP(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000068ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_ASXX_TX_HI_WATERX(offset, block_id) (CVMX_ADD_IO_SEG(0x00011800B0000080ull) + (((offset) & 3) + ((block_id) & 1) * 0x1000000ull) * 8)
+#define CVMX_ASXX_TX_PRT_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800B0000008ull) + ((block_id) & 1) * 0x8000000ull)
 
 union cvmx_asxx_gmii_rx_clk_set {
 	uint64_t u64;
 	struct cvmx_asxx_gmii_rx_clk_set_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t setting:5;
+#else
+		uint64_t setting:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_gmii_rx_clk_set_s cn30xx;
 	struct cvmx_asxx_gmii_rx_clk_set_s cn31xx;
@@ -95,8 +74,13 @@ union cvmx_asxx_gmii_rx_clk_set {
 union cvmx_asxx_gmii_rx_dat_set {
 	uint64_t u64;
 	struct cvmx_asxx_gmii_rx_dat_set_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t setting:5;
+#else
+		uint64_t setting:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_gmii_rx_dat_set_s cn30xx;
 	struct cvmx_asxx_gmii_rx_dat_set_s cn31xx;
@@ -106,18 +90,34 @@ union cvmx_asxx_gmii_rx_dat_set {
 union cvmx_asxx_int_en {
 	uint64_t u64;
 	struct cvmx_asxx_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t txpsh:4;
 		uint64_t txpop:4;
 		uint64_t ovrflw:4;
+#else
+		uint64_t ovrflw:4;
+		uint64_t txpop:4;
+		uint64_t txpsh:4;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_asxx_int_en_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t txpsh:3;
 		uint64_t reserved_7_7:1;
 		uint64_t txpop:3;
 		uint64_t reserved_3_3:1;
 		uint64_t ovrflw:3;
+#else
+		uint64_t ovrflw:3;
+		uint64_t reserved_3_3:1;
+		uint64_t txpop:3;
+		uint64_t reserved_7_7:1;
+		uint64_t txpsh:3;
+		uint64_t reserved_11_63:53;
+#endif
 	} cn30xx;
 	struct cvmx_asxx_int_en_cn30xx cn31xx;
 	struct cvmx_asxx_int_en_s cn38xx;
@@ -130,18 +130,34 @@ union cvmx_asxx_int_en {
 union cvmx_asxx_int_reg {
 	uint64_t u64;
 	struct cvmx_asxx_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t txpsh:4;
 		uint64_t txpop:4;
 		uint64_t ovrflw:4;
+#else
+		uint64_t ovrflw:4;
+		uint64_t txpop:4;
+		uint64_t txpsh:4;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_asxx_int_reg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t txpsh:3;
 		uint64_t reserved_7_7:1;
 		uint64_t txpop:3;
 		uint64_t reserved_3_3:1;
 		uint64_t ovrflw:3;
+#else
+		uint64_t ovrflw:3;
+		uint64_t reserved_3_3:1;
+		uint64_t txpop:3;
+		uint64_t reserved_7_7:1;
+		uint64_t txpsh:3;
+		uint64_t reserved_11_63:53;
+#endif
 	} cn30xx;
 	struct cvmx_asxx_int_reg_cn30xx cn31xx;
 	struct cvmx_asxx_int_reg_s cn38xx;
@@ -154,8 +170,13 @@ union cvmx_asxx_int_reg {
 union cvmx_asxx_mii_rx_dat_set {
 	uint64_t u64;
 	struct cvmx_asxx_mii_rx_dat_set_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t setting:5;
+#else
+		uint64_t setting:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_mii_rx_dat_set_s cn30xx;
 	struct cvmx_asxx_mii_rx_dat_set_s cn50xx;
@@ -164,15 +185,28 @@ union cvmx_asxx_mii_rx_dat_set {
 union cvmx_asxx_prt_loop {
 	uint64_t u64;
 	struct cvmx_asxx_prt_loop_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ext_loop:4;
 		uint64_t int_loop:4;
+#else
+		uint64_t int_loop:4;
+		uint64_t ext_loop:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_asxx_prt_loop_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t ext_loop:3;
 		uint64_t reserved_3_3:1;
 		uint64_t int_loop:3;
+#else
+		uint64_t int_loop:3;
+		uint64_t reserved_3_3:1;
+		uint64_t ext_loop:3;
+		uint64_t reserved_7_63:57;
+#endif
 	} cn30xx;
 	struct cvmx_asxx_prt_loop_cn30xx cn31xx;
 	struct cvmx_asxx_prt_loop_s cn38xx;
@@ -185,8 +219,13 @@ union cvmx_asxx_prt_loop {
 union cvmx_asxx_rld_bypass {
 	uint64_t u64;
 	struct cvmx_asxx_rld_bypass_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t bypass:1;
+#else
+		uint64_t bypass:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_asxx_rld_bypass_s cn38xx;
 	struct cvmx_asxx_rld_bypass_s cn38xxp2;
@@ -197,8 +236,13 @@ union cvmx_asxx_rld_bypass {
 union cvmx_asxx_rld_bypass_setting {
 	uint64_t u64;
 	struct cvmx_asxx_rld_bypass_setting_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t setting:5;
+#else
+		uint64_t setting:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_rld_bypass_setting_s cn38xx;
 	struct cvmx_asxx_rld_bypass_setting_s cn38xxp2;
@@ -209,14 +253,26 @@ union cvmx_asxx_rld_bypass_setting {
 union cvmx_asxx_rld_comp {
 	uint64_t u64;
 	struct cvmx_asxx_rld_comp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t pctl:5;
 		uint64_t nctl:4;
+#else
+		uint64_t nctl:4;
+		uint64_t pctl:5;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_asxx_rld_comp_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t pctl:4;
 		uint64_t nctl:4;
+#else
+		uint64_t nctl:4;
+		uint64_t pctl:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} cn38xx;
 	struct cvmx_asxx_rld_comp_cn38xx cn38xxp2;
 	struct cvmx_asxx_rld_comp_s cn58xx;
@@ -226,9 +282,15 @@ union cvmx_asxx_rld_comp {
 union cvmx_asxx_rld_data_drv {
 	uint64_t u64;
 	struct cvmx_asxx_rld_data_drv_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t pctl:4;
 		uint64_t nctl:4;
+#else
+		uint64_t nctl:4;
+		uint64_t pctl:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_asxx_rld_data_drv_s cn38xx;
 	struct cvmx_asxx_rld_data_drv_s cn38xxp2;
@@ -239,8 +301,13 @@ union cvmx_asxx_rld_data_drv {
 union cvmx_asxx_rld_fcram_mode {
 	uint64_t u64;
 	struct cvmx_asxx_rld_fcram_mode_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t mode:1;
+#else
+		uint64_t mode:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_asxx_rld_fcram_mode_s cn38xx;
 	struct cvmx_asxx_rld_fcram_mode_s cn38xxp2;
@@ -249,8 +316,13 @@ union cvmx_asxx_rld_fcram_mode {
 union cvmx_asxx_rld_nctl_strong {
 	uint64_t u64;
 	struct cvmx_asxx_rld_nctl_strong_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t nctl:5;
+#else
+		uint64_t nctl:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_rld_nctl_strong_s cn38xx;
 	struct cvmx_asxx_rld_nctl_strong_s cn38xxp2;
@@ -261,8 +333,13 @@ union cvmx_asxx_rld_nctl_strong {
 union cvmx_asxx_rld_nctl_weak {
 	uint64_t u64;
 	struct cvmx_asxx_rld_nctl_weak_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t nctl:5;
+#else
+		uint64_t nctl:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_rld_nctl_weak_s cn38xx;
 	struct cvmx_asxx_rld_nctl_weak_s cn38xxp2;
@@ -273,8 +350,13 @@ union cvmx_asxx_rld_nctl_weak {
 union cvmx_asxx_rld_pctl_strong {
 	uint64_t u64;
 	struct cvmx_asxx_rld_pctl_strong_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t pctl:5;
+#else
+		uint64_t pctl:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_rld_pctl_strong_s cn38xx;
 	struct cvmx_asxx_rld_pctl_strong_s cn38xxp2;
@@ -285,8 +367,13 @@ union cvmx_asxx_rld_pctl_strong {
 union cvmx_asxx_rld_pctl_weak {
 	uint64_t u64;
 	struct cvmx_asxx_rld_pctl_weak_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t pctl:5;
+#else
+		uint64_t pctl:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_rld_pctl_weak_s cn38xx;
 	struct cvmx_asxx_rld_pctl_weak_s cn38xxp2;
@@ -297,16 +384,30 @@ union cvmx_asxx_rld_pctl_weak {
 union cvmx_asxx_rld_setting {
 	uint64_t u64;
 	struct cvmx_asxx_rld_setting_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t dfaset:5;
 		uint64_t dfalag:1;
 		uint64_t dfalead:1;
 		uint64_t dfalock:1;
 		uint64_t setting:5;
+#else
+		uint64_t setting:5;
+		uint64_t dfalock:1;
+		uint64_t dfalead:1;
+		uint64_t dfalag:1;
+		uint64_t dfaset:5;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_asxx_rld_setting_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t setting:5;
+#else
+		uint64_t setting:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} cn38xx;
 	struct cvmx_asxx_rld_setting_cn38xx cn38xxp2;
 	struct cvmx_asxx_rld_setting_s cn58xx;
@@ -316,8 +417,13 @@ union cvmx_asxx_rld_setting {
 union cvmx_asxx_rx_clk_setx {
 	uint64_t u64;
 	struct cvmx_asxx_rx_clk_setx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t setting:5;
+#else
+		uint64_t setting:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_rx_clk_setx_s cn30xx;
 	struct cvmx_asxx_rx_clk_setx_s cn31xx;
@@ -331,12 +437,22 @@ union cvmx_asxx_rx_clk_setx {
 union cvmx_asxx_rx_prt_en {
 	uint64_t u64;
 	struct cvmx_asxx_rx_prt_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t prt_en:4;
+#else
+		uint64_t prt_en:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_asxx_rx_prt_en_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t prt_en:3;
+#else
+		uint64_t prt_en:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn30xx;
 	struct cvmx_asxx_rx_prt_en_cn30xx cn31xx;
 	struct cvmx_asxx_rx_prt_en_s cn38xx;
@@ -349,9 +465,15 @@ union cvmx_asxx_rx_prt_en {
 union cvmx_asxx_rx_wol {
 	uint64_t u64;
 	struct cvmx_asxx_rx_wol_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t status:1;
 		uint64_t enable:1;
+#else
+		uint64_t enable:1;
+		uint64_t status:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_asxx_rx_wol_s cn38xx;
 	struct cvmx_asxx_rx_wol_s cn38xxp2;
@@ -360,7 +482,11 @@ union cvmx_asxx_rx_wol {
 union cvmx_asxx_rx_wol_msk {
 	uint64_t u64;
 	struct cvmx_asxx_rx_wol_msk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t msk:64;
+#else
 		uint64_t msk:64;
+#endif
 	} s;
 	struct cvmx_asxx_rx_wol_msk_s cn38xx;
 	struct cvmx_asxx_rx_wol_msk_s cn38xxp2;
@@ -369,8 +495,13 @@ union cvmx_asxx_rx_wol_msk {
 union cvmx_asxx_rx_wol_powok {
 	uint64_t u64;
 	struct cvmx_asxx_rx_wol_powok_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t powerok:1;
+#else
+		uint64_t powerok:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_asxx_rx_wol_powok_s cn38xx;
 	struct cvmx_asxx_rx_wol_powok_s cn38xxp2;
@@ -379,8 +510,13 @@ union cvmx_asxx_rx_wol_powok {
 union cvmx_asxx_rx_wol_sig {
 	uint64_t u64;
 	struct cvmx_asxx_rx_wol_sig_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t sig:32;
+#else
+		uint64_t sig:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_asxx_rx_wol_sig_s cn38xx;
 	struct cvmx_asxx_rx_wol_sig_s cn38xxp2;
@@ -389,8 +525,13 @@ union cvmx_asxx_rx_wol_sig {
 union cvmx_asxx_tx_clk_setx {
 	uint64_t u64;
 	struct cvmx_asxx_tx_clk_setx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t setting:5;
+#else
+		uint64_t setting:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_asxx_tx_clk_setx_s cn30xx;
 	struct cvmx_asxx_tx_clk_setx_s cn31xx;
@@ -404,34 +545,67 @@ union cvmx_asxx_tx_clk_setx {
 union cvmx_asxx_tx_comp_byp {
 	uint64_t u64;
 	struct cvmx_asxx_tx_comp_byp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
 		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_asxx_tx_comp_byp_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t bypass:1;
 		uint64_t pctl:4;
 		uint64_t nctl:4;
+#else
+		uint64_t nctl:4;
+		uint64_t pctl:4;
+		uint64_t bypass:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn30xx;
 	struct cvmx_asxx_tx_comp_byp_cn30xx cn31xx;
 	struct cvmx_asxx_tx_comp_byp_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t pctl:4;
 		uint64_t nctl:4;
+#else
+		uint64_t nctl:4;
+		uint64_t pctl:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} cn38xx;
 	struct cvmx_asxx_tx_comp_byp_cn38xx cn38xxp2;
 	struct cvmx_asxx_tx_comp_byp_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t bypass:1;
 		uint64_t reserved_13_15:3;
 		uint64_t pctl:5;
 		uint64_t reserved_5_7:3;
 		uint64_t nctl:5;
+#else
+		uint64_t nctl:5;
+		uint64_t reserved_5_7:3;
+		uint64_t pctl:5;
+		uint64_t reserved_13_15:3;
+		uint64_t bypass:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn50xx;
 	struct cvmx_asxx_tx_comp_byp_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t pctl:5;
 		uint64_t reserved_5_7:3;
 		uint64_t nctl:5;
+#else
+		uint64_t nctl:5;
+		uint64_t reserved_5_7:3;
+		uint64_t pctl:5;
+		uint64_t reserved_13_63:51;
+#endif
 	} cn58xx;
 	struct cvmx_asxx_tx_comp_byp_cn58xx cn58xxp1;
 };
@@ -439,12 +613,22 @@ union cvmx_asxx_tx_comp_byp {
 union cvmx_asxx_tx_hi_waterx {
 	uint64_t u64;
 	struct cvmx_asxx_tx_hi_waterx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t mark:4;
+#else
+		uint64_t mark:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_asxx_tx_hi_waterx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t mark:3;
+#else
+		uint64_t mark:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn30xx;
 	struct cvmx_asxx_tx_hi_waterx_cn30xx cn31xx;
 	struct cvmx_asxx_tx_hi_waterx_s cn38xx;
@@ -457,12 +641,22 @@ union cvmx_asxx_tx_hi_waterx {
 union cvmx_asxx_tx_prt_en {
 	uint64_t u64;
 	struct cvmx_asxx_tx_prt_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t prt_en:4;
+#else
+		uint64_t prt_en:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_asxx_tx_prt_en_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t prt_en:3;
+#else
+		uint64_t prt_en:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn30xx;
 	struct cvmx_asxx_tx_prt_en_cn30xx cn31xx;
 	struct cvmx_asxx_tx_prt_en_s cn38xx;
diff --git a/arch/mips/include/asm/octeon/cvmx-ciu-defs.h b/arch/mips/include/asm/octeon/cvmx-ciu-defs.h
index 27cead37041..0dd0e40c96d 100644
--- a/arch/mips/include/asm/octeon/cvmx-ciu-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-ciu-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -31,6 +31,18 @@
 #define CVMX_CIU_BIST (CVMX_ADD_IO_SEG(0x0001070000000730ull))
 #define CVMX_CIU_BLOCK_INT (CVMX_ADD_IO_SEG(0x00010700000007C0ull))
 #define CVMX_CIU_DINT (CVMX_ADD_IO_SEG(0x0001070000000720ull))
+#define CVMX_CIU_EN2_IOX_INT(offset) (CVMX_ADD_IO_SEG(0x000107000000A600ull) + ((offset) & 1) * 8)
+#define CVMX_CIU_EN2_IOX_INT_W1C(offset) (CVMX_ADD_IO_SEG(0x000107000000CE00ull) + ((offset) & 1) * 8)
+#define CVMX_CIU_EN2_IOX_INT_W1S(offset) (CVMX_ADD_IO_SEG(0x000107000000AE00ull) + ((offset) & 1) * 8)
+#define CVMX_CIU_EN2_PPX_IP2(offset) (CVMX_ADD_IO_SEG(0x000107000000A000ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_EN2_PPX_IP2_W1C(offset) (CVMX_ADD_IO_SEG(0x000107000000C800ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_EN2_PPX_IP2_W1S(offset) (CVMX_ADD_IO_SEG(0x000107000000A800ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_EN2_PPX_IP3(offset) (CVMX_ADD_IO_SEG(0x000107000000A200ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_EN2_PPX_IP3_W1C(offset) (CVMX_ADD_IO_SEG(0x000107000000CA00ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_EN2_PPX_IP3_W1S(offset) (CVMX_ADD_IO_SEG(0x000107000000AA00ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_EN2_PPX_IP4(offset) (CVMX_ADD_IO_SEG(0x000107000000A400ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_EN2_PPX_IP4_W1C(offset) (CVMX_ADD_IO_SEG(0x000107000000CC00ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_EN2_PPX_IP4_W1S(offset) (CVMX_ADD_IO_SEG(0x000107000000AC00ull) + ((offset) & 15) * 8)
 #define CVMX_CIU_FUSE (CVMX_ADD_IO_SEG(0x0001070000000728ull))
 #define CVMX_CIU_GSTOP (CVMX_ADD_IO_SEG(0x0001070000000710ull))
 #define CVMX_CIU_INT33_SUM0 (CVMX_ADD_IO_SEG(0x0001070000000110ull))
@@ -50,59 +62,378 @@
 #define CVMX_CIU_INTX_SUM4(offset) (CVMX_ADD_IO_SEG(0x0001070000000C00ull) + ((offset) & 15) * 8)
 #define CVMX_CIU_INT_DBG_SEL (CVMX_ADD_IO_SEG(0x00010700000007D0ull))
 #define CVMX_CIU_INT_SUM1 (CVMX_ADD_IO_SEG(0x0001070000000108ull))
-#define CVMX_CIU_MBOX_CLRX(offset) (CVMX_ADD_IO_SEG(0x0001070000000680ull) + ((offset) & 15) * 8)
-#define CVMX_CIU_MBOX_SETX(offset) (CVMX_ADD_IO_SEG(0x0001070000000600ull) + ((offset) & 15) * 8)
+static inline uint64_t CVMX_CIU_MBOX_CLRX(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000680ull) + (offset) * 8;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000680ull) + (offset) * 8;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000680ull) + (offset) * 8;
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000680ull) + (offset) * 8;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000680ull) + (offset) * 8;
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000680ull) + (offset) * 8;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000680ull) + (offset) * 8;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070100100600ull) + (offset) * 8;
+	}
+	return CVMX_ADD_IO_SEG(0x0001070000000680ull) + (offset) * 8;
+}
+
+static inline uint64_t CVMX_CIU_MBOX_SETX(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000600ull) + (offset) * 8;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000600ull) + (offset) * 8;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000600ull) + (offset) * 8;
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000600ull) + (offset) * 8;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000600ull) + (offset) * 8;
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000600ull) + (offset) * 8;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000600ull) + (offset) * 8;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070100100400ull) + (offset) * 8;
+	}
+	return CVMX_ADD_IO_SEG(0x0001070000000600ull) + (offset) * 8;
+}
+
 #define CVMX_CIU_NMI (CVMX_ADD_IO_SEG(0x0001070000000718ull))
 #define CVMX_CIU_PCI_INTA (CVMX_ADD_IO_SEG(0x0001070000000750ull))
+#define CVMX_CIU_PP_BIST_STAT (CVMX_ADD_IO_SEG(0x00010700000007E0ull))
 #define CVMX_CIU_PP_DBG (CVMX_ADD_IO_SEG(0x0001070000000708ull))
-#define CVMX_CIU_PP_POKEX(offset) (CVMX_ADD_IO_SEG(0x0001070000000580ull) + ((offset) & 15) * 8)
+static inline uint64_t CVMX_CIU_PP_POKEX(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070100100200ull) + (offset) * 8;
+	}
+	return CVMX_ADD_IO_SEG(0x0001070000000580ull) + (offset) * 8;
+}
+
 #define CVMX_CIU_PP_RST (CVMX_ADD_IO_SEG(0x0001070000000700ull))
 #define CVMX_CIU_QLM0 (CVMX_ADD_IO_SEG(0x0001070000000780ull))
 #define CVMX_CIU_QLM1 (CVMX_ADD_IO_SEG(0x0001070000000788ull))
 #define CVMX_CIU_QLM2 (CVMX_ADD_IO_SEG(0x0001070000000790ull))
+#define CVMX_CIU_QLM3 (CVMX_ADD_IO_SEG(0x0001070000000798ull))
+#define CVMX_CIU_QLM4 (CVMX_ADD_IO_SEG(0x00010700000007A0ull))
 #define CVMX_CIU_QLM_DCOK (CVMX_ADD_IO_SEG(0x0001070000000760ull))
 #define CVMX_CIU_QLM_JTGC (CVMX_ADD_IO_SEG(0x0001070000000768ull))
 #define CVMX_CIU_QLM_JTGD (CVMX_ADD_IO_SEG(0x0001070000000770ull))
 #define CVMX_CIU_SOFT_BIST (CVMX_ADD_IO_SEG(0x0001070000000738ull))
 #define CVMX_CIU_SOFT_PRST (CVMX_ADD_IO_SEG(0x0001070000000748ull))
 #define CVMX_CIU_SOFT_PRST1 (CVMX_ADD_IO_SEG(0x0001070000000758ull))
+#define CVMX_CIU_SOFT_PRST2 (CVMX_ADD_IO_SEG(0x00010700000007D8ull))
+#define CVMX_CIU_SOFT_PRST3 (CVMX_ADD_IO_SEG(0x00010700000007E0ull))
 #define CVMX_CIU_SOFT_RST (CVMX_ADD_IO_SEG(0x0001070000000740ull))
-#define CVMX_CIU_TIMX(offset) (CVMX_ADD_IO_SEG(0x0001070000000480ull) + ((offset) & 3) * 8)
-#define CVMX_CIU_WDOGX(offset) (CVMX_ADD_IO_SEG(0x0001070000000500ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_SUM1_IOX_INT(offset) (CVMX_ADD_IO_SEG(0x0001070000008600ull) + ((offset) & 1) * 8)
+#define CVMX_CIU_SUM1_PPX_IP2(offset) (CVMX_ADD_IO_SEG(0x0001070000008000ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_SUM1_PPX_IP3(offset) (CVMX_ADD_IO_SEG(0x0001070000008200ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_SUM1_PPX_IP4(offset) (CVMX_ADD_IO_SEG(0x0001070000008400ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_SUM2_IOX_INT(offset) (CVMX_ADD_IO_SEG(0x0001070000008E00ull) + ((offset) & 1) * 8)
+#define CVMX_CIU_SUM2_PPX_IP2(offset) (CVMX_ADD_IO_SEG(0x0001070000008800ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_SUM2_PPX_IP3(offset) (CVMX_ADD_IO_SEG(0x0001070000008A00ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_SUM2_PPX_IP4(offset) (CVMX_ADD_IO_SEG(0x0001070000008C00ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_TIMX(offset) (CVMX_ADD_IO_SEG(0x0001070000000480ull) + ((offset) & 15) * 8)
+#define CVMX_CIU_TIM_MULTI_CAST (CVMX_ADD_IO_SEG(0x000107000000C200ull))
+static inline uint64_t CVMX_CIU_WDOGX(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001070100100000ull) + (offset) * 8;
+	}
+	return CVMX_ADD_IO_SEG(0x0001070000000500ull) + (offset) * 8;
+}
 
 union cvmx_ciu_bist {
 	uint64_t u64;
 	struct cvmx_ciu_bist_s {
-		uint64_t reserved_5_63:59;
-		uint64_t bist:5;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t bist:7;
+#else
+		uint64_t bist:7;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_ciu_bist_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t bist:4;
+#else
+		uint64_t bist:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_bist_cn30xx cn31xx;
 	struct cvmx_ciu_bist_cn30xx cn38xx;
 	struct cvmx_ciu_bist_cn30xx cn38xxp2;
 	struct cvmx_ciu_bist_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t bist:2;
+#else
+		uint64_t bist:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn50xx;
 	struct cvmx_ciu_bist_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t bist:3;
+#else
+		uint64_t bist:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_bist_cn52xx cn52xxp1;
 	struct cvmx_ciu_bist_cn30xx cn56xx;
 	struct cvmx_ciu_bist_cn30xx cn56xxp1;
 	struct cvmx_ciu_bist_cn30xx cn58xx;
 	struct cvmx_ciu_bist_cn30xx cn58xxp1;
-	struct cvmx_ciu_bist_s cn63xx;
-	struct cvmx_ciu_bist_s cn63xxp1;
+	struct cvmx_ciu_bist_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_6_63:58;
+		uint64_t bist:6;
+#else
+		uint64_t bist:6;
+		uint64_t reserved_6_63:58;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_bist_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_5_63:59;
+		uint64_t bist:5;
+#else
+		uint64_t bist:5;
+		uint64_t reserved_5_63:59;
+#endif
+	} cn63xx;
+	struct cvmx_ciu_bist_cn63xx cn63xxp1;
+	struct cvmx_ciu_bist_cn61xx cn66xx;
+	struct cvmx_ciu_bist_s cn68xx;
+	struct cvmx_ciu_bist_s cn68xxp1;
+	struct cvmx_ciu_bist_cn61xx cnf71xx;
 };
 
 union cvmx_ciu_block_int {
 	uint64_t u64;
 	struct cvmx_ciu_block_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_62_63:2;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_43_59:17;
+		uint64_t ptp:1;
+		uint64_t dpi:1;
+		uint64_t dfm:1;
+		uint64_t reserved_34_39:6;
+		uint64_t srio1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_31_31:1;
+		uint64_t iob:1;
+		uint64_t reserved_29_29:1;
+		uint64_t agl:1;
+		uint64_t reserved_27_27:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t reserved_24_24:1;
+		uint64_t asxpcs1:1;
+		uint64_t asxpcs0:1;
+		uint64_t reserved_21_21:1;
+		uint64_t pip:1;
+		uint64_t reserved_18_19:2;
+		uint64_t lmc0:1;
+		uint64_t l2c:1;
+		uint64_t reserved_15_15:1;
+		uint64_t rad:1;
+		uint64_t usb:1;
+		uint64_t pow:1;
+		uint64_t tim:1;
+		uint64_t pko:1;
+		uint64_t ipd:1;
+		uint64_t reserved_8_8:1;
+		uint64_t zip:1;
+		uint64_t dfa:1;
+		uint64_t fpa:1;
+		uint64_t key:1;
+		uint64_t sli:1;
+		uint64_t gmx1:1;
+		uint64_t gmx0:1;
+		uint64_t mio:1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t gmx1:1;
+		uint64_t sli:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t dfa:1;
+		uint64_t zip:1;
+		uint64_t reserved_8_8:1;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t usb:1;
+		uint64_t rad:1;
+		uint64_t reserved_15_15:1;
+		uint64_t l2c:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_18_19:2;
+		uint64_t pip:1;
+		uint64_t reserved_21_21:1;
+		uint64_t asxpcs0:1;
+		uint64_t asxpcs1:1;
+		uint64_t reserved_24_24:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_27_27:1;
+		uint64_t agl:1;
+		uint64_t reserved_29_29:1;
+		uint64_t iob:1;
+		uint64_t reserved_31_31:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfm:1;
+		uint64_t dpi:1;
+		uint64_t ptp:1;
+		uint64_t reserved_43_59:17;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_63:2;
+#endif
+	} s;
+	struct cvmx_ciu_block_int_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_43_63:21;
+		uint64_t ptp:1;
+		uint64_t dpi:1;
+		uint64_t reserved_31_40:10;
+		uint64_t iob:1;
+		uint64_t reserved_29_29:1;
+		uint64_t agl:1;
+		uint64_t reserved_27_27:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t reserved_24_24:1;
+		uint64_t asxpcs1:1;
+		uint64_t asxpcs0:1;
+		uint64_t reserved_21_21:1;
+		uint64_t pip:1;
+		uint64_t reserved_18_19:2;
+		uint64_t lmc0:1;
+		uint64_t l2c:1;
+		uint64_t reserved_15_15:1;
+		uint64_t rad:1;
+		uint64_t usb:1;
+		uint64_t pow:1;
+		uint64_t tim:1;
+		uint64_t pko:1;
+		uint64_t ipd:1;
+		uint64_t reserved_8_8:1;
+		uint64_t zip:1;
+		uint64_t dfa:1;
+		uint64_t fpa:1;
+		uint64_t key:1;
+		uint64_t sli:1;
+		uint64_t gmx1:1;
+		uint64_t gmx0:1;
+		uint64_t mio:1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t gmx1:1;
+		uint64_t sli:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t dfa:1;
+		uint64_t zip:1;
+		uint64_t reserved_8_8:1;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t usb:1;
+		uint64_t rad:1;
+		uint64_t reserved_15_15:1;
+		uint64_t l2c:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_18_19:2;
+		uint64_t pip:1;
+		uint64_t reserved_21_21:1;
+		uint64_t asxpcs0:1;
+		uint64_t asxpcs1:1;
+		uint64_t reserved_24_24:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_27_27:1;
+		uint64_t agl:1;
+		uint64_t reserved_29_29:1;
+		uint64_t iob:1;
+		uint64_t reserved_31_40:10;
+		uint64_t dpi:1;
+		uint64_t ptp:1;
+		uint64_t reserved_43_63:21;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_block_int_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_43_63:21;
 		uint64_t ptp:1;
 		uint64_t dpi:1;
@@ -140,88 +471,789 @@ union cvmx_ciu_block_int {
 		uint64_t reserved_2_2:1;
 		uint64_t gmx0:1;
 		uint64_t mio:1;
-	} s;
-	struct cvmx_ciu_block_int_s cn63xx;
-	struct cvmx_ciu_block_int_s cn63xxp1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t reserved_2_2:1;
+		uint64_t sli:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t dfa:1;
+		uint64_t zip:1;
+		uint64_t reserved_8_8:1;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t usb:1;
+		uint64_t rad:1;
+		uint64_t reserved_15_15:1;
+		uint64_t l2c:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_18_19:2;
+		uint64_t pip:1;
+		uint64_t reserved_21_21:1;
+		uint64_t asxpcs0:1;
+		uint64_t reserved_23_24:2;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_27_27:1;
+		uint64_t agl:1;
+		uint64_t reserved_29_29:1;
+		uint64_t iob:1;
+		uint64_t reserved_31_31:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfm:1;
+		uint64_t dpi:1;
+		uint64_t ptp:1;
+		uint64_t reserved_43_63:21;
+#endif
+	} cn63xx;
+	struct cvmx_ciu_block_int_cn63xx cn63xxp1;
+	struct cvmx_ciu_block_int_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_62_63:2;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_43_59:17;
+		uint64_t ptp:1;
+		uint64_t dpi:1;
+		uint64_t dfm:1;
+		uint64_t reserved_33_39:7;
+		uint64_t srio0:1;
+		uint64_t reserved_31_31:1;
+		uint64_t iob:1;
+		uint64_t reserved_29_29:1;
+		uint64_t agl:1;
+		uint64_t reserved_27_27:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t reserved_24_24:1;
+		uint64_t asxpcs1:1;
+		uint64_t asxpcs0:1;
+		uint64_t reserved_21_21:1;
+		uint64_t pip:1;
+		uint64_t reserved_18_19:2;
+		uint64_t lmc0:1;
+		uint64_t l2c:1;
+		uint64_t reserved_15_15:1;
+		uint64_t rad:1;
+		uint64_t usb:1;
+		uint64_t pow:1;
+		uint64_t tim:1;
+		uint64_t pko:1;
+		uint64_t ipd:1;
+		uint64_t reserved_8_8:1;
+		uint64_t zip:1;
+		uint64_t dfa:1;
+		uint64_t fpa:1;
+		uint64_t key:1;
+		uint64_t sli:1;
+		uint64_t gmx1:1;
+		uint64_t gmx0:1;
+		uint64_t mio:1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t gmx1:1;
+		uint64_t sli:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t dfa:1;
+		uint64_t zip:1;
+		uint64_t reserved_8_8:1;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t usb:1;
+		uint64_t rad:1;
+		uint64_t reserved_15_15:1;
+		uint64_t l2c:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_18_19:2;
+		uint64_t pip:1;
+		uint64_t reserved_21_21:1;
+		uint64_t asxpcs0:1;
+		uint64_t asxpcs1:1;
+		uint64_t reserved_24_24:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_27_27:1;
+		uint64_t agl:1;
+		uint64_t reserved_29_29:1;
+		uint64_t iob:1;
+		uint64_t reserved_31_31:1;
+		uint64_t srio0:1;
+		uint64_t reserved_33_39:7;
+		uint64_t dfm:1;
+		uint64_t dpi:1;
+		uint64_t ptp:1;
+		uint64_t reserved_43_59:17;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_63:2;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_block_int_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_43_63:21;
+		uint64_t ptp:1;
+		uint64_t dpi:1;
+		uint64_t reserved_31_40:10;
+		uint64_t iob:1;
+		uint64_t reserved_27_29:3;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t reserved_23_24:2;
+		uint64_t asxpcs0:1;
+		uint64_t reserved_21_21:1;
+		uint64_t pip:1;
+		uint64_t reserved_18_19:2;
+		uint64_t lmc0:1;
+		uint64_t l2c:1;
+		uint64_t reserved_15_15:1;
+		uint64_t rad:1;
+		uint64_t usb:1;
+		uint64_t pow:1;
+		uint64_t tim:1;
+		uint64_t pko:1;
+		uint64_t ipd:1;
+		uint64_t reserved_6_8:3;
+		uint64_t fpa:1;
+		uint64_t key:1;
+		uint64_t sli:1;
+		uint64_t reserved_2_2:1;
+		uint64_t gmx0:1;
+		uint64_t mio:1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t reserved_2_2:1;
+		uint64_t sli:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t reserved_6_8:3;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t usb:1;
+		uint64_t rad:1;
+		uint64_t reserved_15_15:1;
+		uint64_t l2c:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_18_19:2;
+		uint64_t pip:1;
+		uint64_t reserved_21_21:1;
+		uint64_t asxpcs0:1;
+		uint64_t reserved_23_24:2;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_27_29:3;
+		uint64_t iob:1;
+		uint64_t reserved_31_40:10;
+		uint64_t dpi:1;
+		uint64_t ptp:1;
+		uint64_t reserved_43_63:21;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_dint {
 	uint64_t u64;
 	struct cvmx_ciu_dint_s {
-		uint64_t reserved_16_63:48;
-		uint64_t dint:16;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t dint:32;
+#else
+		uint64_t dint:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_ciu_dint_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t dint:1;
+#else
+		uint64_t dint:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_dint_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t dint:2;
+#else
+		uint64_t dint:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn31xx;
-	struct cvmx_ciu_dint_s cn38xx;
-	struct cvmx_ciu_dint_s cn38xxp2;
+	struct cvmx_ciu_dint_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t dint:16;
+#else
+		uint64_t dint:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} cn38xx;
+	struct cvmx_ciu_dint_cn38xx cn38xxp2;
 	struct cvmx_ciu_dint_cn31xx cn50xx;
 	struct cvmx_ciu_dint_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t dint:4;
+#else
+		uint64_t dint:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_dint_cn52xx cn52xxp1;
 	struct cvmx_ciu_dint_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t dint:12;
+#else
+		uint64_t dint:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_dint_cn56xx cn56xxp1;
-	struct cvmx_ciu_dint_s cn58xx;
-	struct cvmx_ciu_dint_s cn58xxp1;
+	struct cvmx_ciu_dint_cn38xx cn58xx;
+	struct cvmx_ciu_dint_cn38xx cn58xxp1;
+	struct cvmx_ciu_dint_cn52xx cn61xx;
 	struct cvmx_ciu_dint_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t dint:6;
+#else
+		uint64_t dint:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_dint_cn63xx cn63xxp1;
+	struct cvmx_ciu_dint_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t dint:10;
+#else
+		uint64_t dint:10;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_dint_s cn68xx;
+	struct cvmx_ciu_dint_s cn68xxp1;
+	struct cvmx_ciu_dint_cn52xx cnf71xx;
+};
+
+union cvmx_ciu_en2_iox_int {
+	uint64_t u64;
+	struct cvmx_ciu_en2_iox_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_iox_int_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_iox_int_cn61xx cn66xx;
+	struct cvmx_ciu_en2_iox_int_s cnf71xx;
+};
+
+union cvmx_ciu_en2_iox_int_w1c {
+	uint64_t u64;
+	struct cvmx_ciu_en2_iox_int_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_iox_int_w1c_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_iox_int_w1c_cn61xx cn66xx;
+	struct cvmx_ciu_en2_iox_int_w1c_s cnf71xx;
+};
+
+union cvmx_ciu_en2_iox_int_w1s {
+	uint64_t u64;
+	struct cvmx_ciu_en2_iox_int_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_iox_int_w1s_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_iox_int_w1s_cn61xx cn66xx;
+	struct cvmx_ciu_en2_iox_int_w1s_s cnf71xx;
+};
+
+union cvmx_ciu_en2_ppx_ip2 {
+	uint64_t u64;
+	struct cvmx_ciu_en2_ppx_ip2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_ppx_ip2_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_ppx_ip2_cn61xx cn66xx;
+	struct cvmx_ciu_en2_ppx_ip2_s cnf71xx;
+};
+
+union cvmx_ciu_en2_ppx_ip2_w1c {
+	uint64_t u64;
+	struct cvmx_ciu_en2_ppx_ip2_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_ppx_ip2_w1c_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_ppx_ip2_w1c_cn61xx cn66xx;
+	struct cvmx_ciu_en2_ppx_ip2_w1c_s cnf71xx;
+};
+
+union cvmx_ciu_en2_ppx_ip2_w1s {
+	uint64_t u64;
+	struct cvmx_ciu_en2_ppx_ip2_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_ppx_ip2_w1s_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_ppx_ip2_w1s_cn61xx cn66xx;
+	struct cvmx_ciu_en2_ppx_ip2_w1s_s cnf71xx;
+};
+
+union cvmx_ciu_en2_ppx_ip3 {
+	uint64_t u64;
+	struct cvmx_ciu_en2_ppx_ip3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_ppx_ip3_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_ppx_ip3_cn61xx cn66xx;
+	struct cvmx_ciu_en2_ppx_ip3_s cnf71xx;
+};
+
+union cvmx_ciu_en2_ppx_ip3_w1c {
+	uint64_t u64;
+	struct cvmx_ciu_en2_ppx_ip3_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_ppx_ip3_w1c_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_ppx_ip3_w1c_cn61xx cn66xx;
+	struct cvmx_ciu_en2_ppx_ip3_w1c_s cnf71xx;
+};
+
+union cvmx_ciu_en2_ppx_ip3_w1s {
+	uint64_t u64;
+	struct cvmx_ciu_en2_ppx_ip3_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_ppx_ip3_w1s_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_ppx_ip3_w1s_cn61xx cn66xx;
+	struct cvmx_ciu_en2_ppx_ip3_w1s_s cnf71xx;
+};
+
+union cvmx_ciu_en2_ppx_ip4 {
+	uint64_t u64;
+	struct cvmx_ciu_en2_ppx_ip4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_ppx_ip4_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_ppx_ip4_cn61xx cn66xx;
+	struct cvmx_ciu_en2_ppx_ip4_s cnf71xx;
+};
+
+union cvmx_ciu_en2_ppx_ip4_w1c {
+	uint64_t u64;
+	struct cvmx_ciu_en2_ppx_ip4_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_ppx_ip4_w1c_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_ppx_ip4_w1c_cn61xx cn66xx;
+	struct cvmx_ciu_en2_ppx_ip4_w1c_s cnf71xx;
+};
+
+union cvmx_ciu_en2_ppx_ip4_w1s {
+	uint64_t u64;
+	struct cvmx_ciu_en2_ppx_ip4_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_en2_ppx_ip4_w1s_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_en2_ppx_ip4_w1s_cn61xx cn66xx;
+	struct cvmx_ciu_en2_ppx_ip4_w1s_s cnf71xx;
 };
 
 union cvmx_ciu_fuse {
 	uint64_t u64;
 	struct cvmx_ciu_fuse_s {
-		uint64_t reserved_16_63:48;
-		uint64_t fuse:16;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t fuse:32;
+#else
+		uint64_t fuse:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_ciu_fuse_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t fuse:1;
+#else
+		uint64_t fuse:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_fuse_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t fuse:2;
+#else
+		uint64_t fuse:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn31xx;
-	struct cvmx_ciu_fuse_s cn38xx;
-	struct cvmx_ciu_fuse_s cn38xxp2;
+	struct cvmx_ciu_fuse_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t fuse:16;
+#else
+		uint64_t fuse:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} cn38xx;
+	struct cvmx_ciu_fuse_cn38xx cn38xxp2;
 	struct cvmx_ciu_fuse_cn31xx cn50xx;
 	struct cvmx_ciu_fuse_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t fuse:4;
+#else
+		uint64_t fuse:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_fuse_cn52xx cn52xxp1;
 	struct cvmx_ciu_fuse_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t fuse:12;
+#else
+		uint64_t fuse:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_fuse_cn56xx cn56xxp1;
-	struct cvmx_ciu_fuse_s cn58xx;
-	struct cvmx_ciu_fuse_s cn58xxp1;
+	struct cvmx_ciu_fuse_cn38xx cn58xx;
+	struct cvmx_ciu_fuse_cn38xx cn58xxp1;
+	struct cvmx_ciu_fuse_cn52xx cn61xx;
 	struct cvmx_ciu_fuse_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t fuse:6;
+#else
+		uint64_t fuse:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_fuse_cn63xx cn63xxp1;
+	struct cvmx_ciu_fuse_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t fuse:10;
+#else
+		uint64_t fuse:10;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_fuse_s cn68xx;
+	struct cvmx_ciu_fuse_s cn68xxp1;
+	struct cvmx_ciu_fuse_cn52xx cnf71xx;
 };
 
 union cvmx_ciu_gstop {
 	uint64_t u64;
 	struct cvmx_ciu_gstop_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t gstop:1;
+#else
+		uint64_t gstop:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_ciu_gstop_s cn30xx;
 	struct cvmx_ciu_gstop_s cn31xx;
@@ -234,13 +1266,19 @@ union cvmx_ciu_gstop {
 	struct cvmx_ciu_gstop_s cn56xxp1;
 	struct cvmx_ciu_gstop_s cn58xx;
 	struct cvmx_ciu_gstop_s cn58xxp1;
+	struct cvmx_ciu_gstop_s cn61xx;
 	struct cvmx_ciu_gstop_s cn63xx;
 	struct cvmx_ciu_gstop_s cn63xxp1;
+	struct cvmx_ciu_gstop_s cn66xx;
+	struct cvmx_ciu_gstop_s cn68xx;
+	struct cvmx_ciu_gstop_s cn68xxp1;
+	struct cvmx_ciu_gstop_s cnf71xx;
 };
 
 union cvmx_ciu_intx_en0 {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -263,8 +1301,33 @@ union cvmx_ciu_intx_en0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en0_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t mpi:1;
 		uint64_t pcm:1;
@@ -284,8 +1347,30 @@ union cvmx_ciu_intx_en0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t reserved_47_47:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t reserved_59_63:5;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_intx_en0_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t mpi:1;
 		uint64_t pcm:1;
@@ -305,8 +1390,30 @@ union cvmx_ciu_intx_en0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t reserved_59_63:5;
+#endif
 	} cn31xx;
 	struct cvmx_ciu_intx_en0_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -322,10 +1429,28 @@ union cvmx_ciu_intx_en0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn38xx;
 	struct cvmx_ciu_intx_en0_cn38xx cn38xxp2;
 	struct cvmx_ciu_intx_en0_cn30xx cn50xx;
 	struct cvmx_ciu_intx_en0_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -348,9 +1473,34 @@ union cvmx_ciu_intx_en0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_en0_cn52xx cn52xxp1;
 	struct cvmx_ciu_intx_en0_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -372,23 +1522,197 @@ union cvmx_ciu_intx_en0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_en0_cn56xx cn56xxp1;
 	struct cvmx_ciu_intx_en0_cn38xx cn58xx;
 	struct cvmx_ciu_intx_en0_cn38xx cn58xxp1;
+	struct cvmx_ciu_intx_en0_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en0_cn52xx cn63xx;
 	struct cvmx_ciu_intx_en0_cn52xx cn63xxp1;
+	struct cvmx_ciu_intx_en0_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t reserved_57_57:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_57:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en0_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t reserved_62_62:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t gmx_drp:1;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t reserved_62_62:1;
+		uint64_t bootdma:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en0_w1c {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en0_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
 		uint64_t powiq:1;
 		uint64_t twsi2:1;
-		uint64_t reserved_57_58:2;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
 		uint64_t usb:1;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -404,8 +1728,33 @@ union cvmx_ciu_intx_en0_w1c {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en0_w1c_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -428,9 +1777,80 @@ union cvmx_ciu_intx_en0_w1c {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn52xx;
-	struct cvmx_ciu_intx_en0_w1c_s cn56xx;
+	struct cvmx_ciu_intx_en0_w1c_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t reserved_57_58:2;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t key_zero:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn56xx;
 	struct cvmx_ciu_intx_en0_w1c_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -446,20 +1866,188 @@ union cvmx_ciu_intx_en0_w1c {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn58xx;
+	struct cvmx_ciu_intx_en0_w1c_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en0_w1c_cn52xx cn63xx;
 	struct cvmx_ciu_intx_en0_w1c_cn52xx cn63xxp1;
+	struct cvmx_ciu_intx_en0_w1c_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t reserved_57_57:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_57:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en0_w1c_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t reserved_62_62:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t gmx_drp:1;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t reserved_62_62:1;
+		uint64_t bootdma:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en0_w1s {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en0_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
 		uint64_t powiq:1;
 		uint64_t twsi2:1;
-		uint64_t reserved_57_58:2;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
 		uint64_t usb:1;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -475,8 +2063,33 @@ union cvmx_ciu_intx_en0_w1s {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en0_w1s_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -499,9 +2112,80 @@ union cvmx_ciu_intx_en0_w1s {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn52xx;
-	struct cvmx_ciu_intx_en0_w1s_s cn56xx;
+	struct cvmx_ciu_intx_en0_w1s_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t reserved_57_58:2;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t key_zero:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn56xx;
 	struct cvmx_ciu_intx_en0_w1s_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -517,16 +2201,186 @@ union cvmx_ciu_intx_en0_w1s {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn58xx;
+	struct cvmx_ciu_intx_en0_w1s_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en0_w1s_cn52xx cn63xx;
 	struct cvmx_ciu_intx_en0_w1s_cn52xx cn63xxp1;
+	struct cvmx_ciu_intx_en0_w1s_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t reserved_57_57:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_57:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en0_w1s_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t reserved_62_62:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t gmx_drp:1;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t reserved_62_62:1;
+		uint64_t bootdma:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en1 {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
-		uint64_t reserved_57_62:6;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
 		uint64_t dfm:1;
 		uint64_t reserved_53_55:3;
 		uint64_t lmc0:1;
@@ -536,7 +2390,10 @@ union cvmx_ciu_intx_en1 {
 		uint64_t pem0:1;
 		uint64_t ptp:1;
 		uint64_t agl:1;
-		uint64_t reserved_37_45:9;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
 		uint64_t agx0:1;
 		uint64_t dpi:1;
 		uint64_t sli:1;
@@ -559,22 +2416,80 @@ union cvmx_ciu_intx_en1 {
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en1_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t wdog:1;
+#else
+		uint64_t wdog:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_intx_en1_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t wdog:2;
+#else
+		uint64_t wdog:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn31xx;
 	struct cvmx_ciu_intx_en1_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xx;
 	struct cvmx_ciu_intx_en1_cn38xx cn38xxp2;
 	struct cvmx_ciu_intx_en1_cn31xx cn50xx;
 	struct cvmx_ciu_intx_en1_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t nand:1;
 		uint64_t mii1:1;
@@ -582,23 +2497,118 @@ union cvmx_ciu_intx_en1 {
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_en1_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t mii1:1;
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn52xxp1;
 	struct cvmx_ciu_intx_en1_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t wdog:12;
+#else
+		uint64_t wdog:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_en1_cn56xx cn56xxp1;
 	struct cvmx_ciu_intx_en1_cn38xx cn58xx;
 	struct cvmx_ciu_intx_en1_cn38xx cn58xxp1;
+	struct cvmx_ciu_intx_en1_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en1_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
 		uint64_t reserved_57_62:6;
 		uint64_t dfm:1;
@@ -632,15 +2642,198 @@ union cvmx_ciu_intx_en1 {
 		uint64_t mii1:1;
 		uint64_t reserved_6_17:12;
 		uint64_t wdog:6;
+#else
+		uint64_t wdog:6;
+		uint64_t reserved_6_17:12;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_45:9;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_62:6;
+		uint64_t rst:1;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_intx_en1_cn63xx cn63xxp1;
+	struct cvmx_ciu_intx_en1_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en1_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en1_w1c {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en1_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
-		uint64_t reserved_57_62:6;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
 		uint64_t dfm:1;
 		uint64_t reserved_53_55:3;
 		uint64_t lmc0:1;
@@ -650,7 +2843,10 @@ union cvmx_ciu_intx_en1_w1c {
 		uint64_t pem0:1;
 		uint64_t ptp:1;
 		uint64_t agl:1;
-		uint64_t reserved_37_45:9;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
 		uint64_t agx0:1;
 		uint64_t dpi:1;
 		uint64_t sli:1;
@@ -673,8 +2869,51 @@ union cvmx_ciu_intx_en1_w1c {
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en1_w1c_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t nand:1;
 		uint64_t mii1:1;
@@ -682,16 +2921,107 @@ union cvmx_ciu_intx_en1_w1c {
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_en1_w1c_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t wdog:12;
+#else
+		uint64_t wdog:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_en1_w1c_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn58xx;
+	struct cvmx_ciu_intx_en1_w1c_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en1_w1c_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
 		uint64_t reserved_57_62:6;
 		uint64_t dfm:1;
@@ -725,15 +3055,198 @@ union cvmx_ciu_intx_en1_w1c {
 		uint64_t mii1:1;
 		uint64_t reserved_6_17:12;
 		uint64_t wdog:6;
+#else
+		uint64_t wdog:6;
+		uint64_t reserved_6_17:12;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_45:9;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_62:6;
+		uint64_t rst:1;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_intx_en1_w1c_cn63xx cn63xxp1;
+	struct cvmx_ciu_intx_en1_w1c_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en1_w1c_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en1_w1s {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en1_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
-		uint64_t reserved_57_62:6;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
 		uint64_t dfm:1;
 		uint64_t reserved_53_55:3;
 		uint64_t lmc0:1;
@@ -743,7 +3256,10 @@ union cvmx_ciu_intx_en1_w1s {
 		uint64_t pem0:1;
 		uint64_t ptp:1;
 		uint64_t agl:1;
-		uint64_t reserved_37_45:9;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
 		uint64_t agx0:1;
 		uint64_t dpi:1;
 		uint64_t sli:1;
@@ -766,8 +3282,51 @@ union cvmx_ciu_intx_en1_w1s {
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en1_w1s_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t nand:1;
 		uint64_t mii1:1;
@@ -775,16 +3334,107 @@ union cvmx_ciu_intx_en1_w1s {
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_en1_w1s_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t wdog:12;
+#else
+		uint64_t wdog:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_en1_w1s_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn58xx;
+	struct cvmx_ciu_intx_en1_w1s_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en1_w1s_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
 		uint64_t reserved_57_62:6;
 		uint64_t dfm:1;
@@ -818,13 +3468,193 @@ union cvmx_ciu_intx_en1_w1s {
 		uint64_t mii1:1;
 		uint64_t reserved_6_17:12;
 		uint64_t wdog:6;
+#else
+		uint64_t wdog:6;
+		uint64_t reserved_6_17:12;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_45:9;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_62:6;
+		uint64_t rst:1;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_intx_en1_w1s_cn63xx cn63xxp1;
+	struct cvmx_ciu_intx_en1_w1s_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en1_w1s_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en4_0 {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en4_0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -847,8 +3677,33 @@ union cvmx_ciu_intx_en4_0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en4_0_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t mpi:1;
 		uint64_t pcm:1;
@@ -868,8 +3723,30 @@ union cvmx_ciu_intx_en4_0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t reserved_47_47:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t reserved_59_63:5;
+#endif
 	} cn50xx;
 	struct cvmx_ciu_intx_en4_0_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -892,9 +3769,34 @@ union cvmx_ciu_intx_en4_0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_en4_0_cn52xx cn52xxp1;
 	struct cvmx_ciu_intx_en4_0_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -916,9 +3818,33 @@ union cvmx_ciu_intx_en4_0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_en4_0_cn56xx cn56xxp1;
 	struct cvmx_ciu_intx_en4_0_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -934,21 +3860,189 @@ union cvmx_ciu_intx_en4_0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn58xx;
 	struct cvmx_ciu_intx_en4_0_cn58xx cn58xxp1;
+	struct cvmx_ciu_intx_en4_0_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en4_0_cn52xx cn63xx;
 	struct cvmx_ciu_intx_en4_0_cn52xx cn63xxp1;
+	struct cvmx_ciu_intx_en4_0_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t reserved_57_57:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_57:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en4_0_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t reserved_62_62:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t gmx_drp:1;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t reserved_62_62:1;
+		uint64_t bootdma:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en4_0_w1c {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en4_0_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
 		uint64_t powiq:1;
 		uint64_t twsi2:1;
-		uint64_t reserved_57_58:2;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
 		uint64_t usb:1;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -964,8 +4058,33 @@ union cvmx_ciu_intx_en4_0_w1c {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en4_0_w1c_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -988,9 +4107,80 @@ union cvmx_ciu_intx_en4_0_w1c {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn52xx;
-	struct cvmx_ciu_intx_en4_0_w1c_s cn56xx;
+	struct cvmx_ciu_intx_en4_0_w1c_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t reserved_57_58:2;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t key_zero:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn56xx;
 	struct cvmx_ciu_intx_en4_0_w1c_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -1006,20 +4196,188 @@ union cvmx_ciu_intx_en4_0_w1c {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn58xx;
+	struct cvmx_ciu_intx_en4_0_w1c_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en4_0_w1c_cn52xx cn63xx;
 	struct cvmx_ciu_intx_en4_0_w1c_cn52xx cn63xxp1;
+	struct cvmx_ciu_intx_en4_0_w1c_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t reserved_57_57:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_57:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en4_0_w1c_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t reserved_62_62:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t gmx_drp:1;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t reserved_62_62:1;
+		uint64_t bootdma:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en4_0_w1s {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en4_0_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
 		uint64_t powiq:1;
 		uint64_t twsi2:1;
-		uint64_t reserved_57_58:2;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
 		uint64_t usb:1;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -1035,8 +4393,33 @@ union cvmx_ciu_intx_en4_0_w1s {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en4_0_w1s_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -1059,9 +4442,80 @@ union cvmx_ciu_intx_en4_0_w1s {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn52xx;
-	struct cvmx_ciu_intx_en4_0_w1s_s cn56xx;
+	struct cvmx_ciu_intx_en4_0_w1s_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t reserved_57_58:2;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t key_zero:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn56xx;
 	struct cvmx_ciu_intx_en4_0_w1s_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -1077,16 +4531,186 @@ union cvmx_ciu_intx_en4_0_w1s {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn58xx;
+	struct cvmx_ciu_intx_en4_0_w1s_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en4_0_w1s_cn52xx cn63xx;
 	struct cvmx_ciu_intx_en4_0_w1s_cn52xx cn63xxp1;
+	struct cvmx_ciu_intx_en4_0_w1s_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t reserved_57_57:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_57:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en4_0_w1s_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t reserved_62_62:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t reserved_51_51:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t gmx_drp:1;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t reserved_44_44:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t reserved_44_44:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t reserved_62_62:1;
+		uint64_t bootdma:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en4_1 {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en4_1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
-		uint64_t reserved_57_62:6;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
 		uint64_t dfm:1;
 		uint64_t reserved_53_55:3;
 		uint64_t lmc0:1;
@@ -1096,7 +4720,10 @@ union cvmx_ciu_intx_en4_1 {
 		uint64_t pem0:1;
 		uint64_t ptp:1;
 		uint64_t agl:1;
-		uint64_t reserved_37_45:9;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
 		uint64_t agx0:1;
 		uint64_t dpi:1;
 		uint64_t sli:1;
@@ -1119,12 +4746,60 @@ union cvmx_ciu_intx_en4_1 {
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en4_1_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t wdog:2;
+#else
+		uint64_t wdog:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn50xx;
 	struct cvmx_ciu_intx_en4_1_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t nand:1;
 		uint64_t mii1:1;
@@ -1132,26 +4807,126 @@ union cvmx_ciu_intx_en4_1 {
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_en4_1_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t mii1:1;
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn52xxp1;
 	struct cvmx_ciu_intx_en4_1_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t wdog:12;
+#else
+		uint64_t wdog:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_en4_1_cn56xx cn56xxp1;
 	struct cvmx_ciu_intx_en4_1_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn58xx;
 	struct cvmx_ciu_intx_en4_1_cn58xx cn58xxp1;
+	struct cvmx_ciu_intx_en4_1_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en4_1_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
 		uint64_t reserved_57_62:6;
 		uint64_t dfm:1;
@@ -1185,15 +4960,198 @@ union cvmx_ciu_intx_en4_1 {
 		uint64_t mii1:1;
 		uint64_t reserved_6_17:12;
 		uint64_t wdog:6;
+#else
+		uint64_t wdog:6;
+		uint64_t reserved_6_17:12;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_45:9;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_62:6;
+		uint64_t rst:1;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_intx_en4_1_cn63xx cn63xxp1;
+	struct cvmx_ciu_intx_en4_1_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en4_1_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en4_1_w1c {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en4_1_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
-		uint64_t reserved_57_62:6;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
 		uint64_t dfm:1;
 		uint64_t reserved_53_55:3;
 		uint64_t lmc0:1;
@@ -1203,7 +5161,10 @@ union cvmx_ciu_intx_en4_1_w1c {
 		uint64_t pem0:1;
 		uint64_t ptp:1;
 		uint64_t agl:1;
-		uint64_t reserved_37_45:9;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
 		uint64_t agx0:1;
 		uint64_t dpi:1;
 		uint64_t sli:1;
@@ -1226,8 +5187,51 @@ union cvmx_ciu_intx_en4_1_w1c {
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en4_1_w1c_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t nand:1;
 		uint64_t mii1:1;
@@ -1235,16 +5239,107 @@ union cvmx_ciu_intx_en4_1_w1c {
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_en4_1_w1c_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t wdog:12;
+#else
+		uint64_t wdog:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_en4_1_w1c_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn58xx;
+	struct cvmx_ciu_intx_en4_1_w1c_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en4_1_w1c_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
 		uint64_t reserved_57_62:6;
 		uint64_t dfm:1;
@@ -1278,15 +5373,198 @@ union cvmx_ciu_intx_en4_1_w1c {
 		uint64_t mii1:1;
 		uint64_t reserved_6_17:12;
 		uint64_t wdog:6;
+#else
+		uint64_t wdog:6;
+		uint64_t reserved_6_17:12;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_45:9;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_62:6;
+		uint64_t rst:1;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_intx_en4_1_w1c_cn63xx cn63xxp1;
+	struct cvmx_ciu_intx_en4_1_w1c_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en4_1_w1c_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_en4_1_w1s {
 	uint64_t u64;
 	struct cvmx_ciu_intx_en4_1_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
-		uint64_t reserved_57_62:6;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
 		uint64_t dfm:1;
 		uint64_t reserved_53_55:3;
 		uint64_t lmc0:1;
@@ -1296,7 +5574,10 @@ union cvmx_ciu_intx_en4_1_w1s {
 		uint64_t pem0:1;
 		uint64_t ptp:1;
 		uint64_t agl:1;
-		uint64_t reserved_37_45:9;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
 		uint64_t agx0:1;
 		uint64_t dpi:1;
 		uint64_t sli:1;
@@ -1319,8 +5600,51 @@ union cvmx_ciu_intx_en4_1_w1s {
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_en4_1_w1s_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t nand:1;
 		uint64_t mii1:1;
@@ -1328,16 +5652,107 @@ union cvmx_ciu_intx_en4_1_w1s {
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_en4_1_w1s_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t wdog:12;
+#else
+		uint64_t wdog:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_en4_1_w1s_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn58xx;
+	struct cvmx_ciu_intx_en4_1_w1s_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_en4_1_w1s_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
 		uint64_t reserved_57_62:6;
 		uint64_t dfm:1;
@@ -1371,13 +5786,193 @@ union cvmx_ciu_intx_en4_1_w1s {
 		uint64_t mii1:1;
 		uint64_t reserved_6_17:12;
 		uint64_t wdog:6;
+#else
+		uint64_t wdog:6;
+		uint64_t reserved_6_17:12;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_45:9;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_62:6;
+		uint64_t rst:1;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_intx_en4_1_w1s_cn63xx cn63xxp1;
+	struct cvmx_ciu_intx_en4_1_w1s_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_en4_1_w1s_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_sum0 {
 	uint64_t u64;
 	struct cvmx_ciu_intx_sum0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -1387,7 +5982,7 @@ union cvmx_ciu_intx_sum0 {
 		uint64_t pcm:1;
 		uint64_t usb:1;
 		uint64_t timer:4;
-		uint64_t key_zero:1;
+		uint64_t reserved_51_51:1;
 		uint64_t ipd_drp:1;
 		uint64_t gmx_drp:2;
 		uint64_t trace:1;
@@ -1400,8 +5995,33 @@ union cvmx_ciu_intx_sum0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_sum0_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t mpi:1;
 		uint64_t pcm:1;
@@ -1421,8 +6041,30 @@ union cvmx_ciu_intx_sum0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t reserved_47_47:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t reserved_59_63:5;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_intx_sum0_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t mpi:1;
 		uint64_t pcm:1;
@@ -1442,8 +6084,30 @@ union cvmx_ciu_intx_sum0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t reserved_59_63:5;
+#endif
 	} cn31xx;
 	struct cvmx_ciu_intx_sum0_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -1459,10 +6123,28 @@ union cvmx_ciu_intx_sum0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn38xx;
 	struct cvmx_ciu_intx_sum0_cn38xx cn38xxp2;
 	struct cvmx_ciu_intx_sum0_cn30xx cn50xx;
 	struct cvmx_ciu_intx_sum0_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -1485,9 +6167,34 @@ union cvmx_ciu_intx_sum0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_sum0_cn52xx cn52xxp1;
 	struct cvmx_ciu_intx_sum0_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -1509,17 +6216,190 @@ union cvmx_ciu_intx_sum0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_sum0_cn56xx cn56xxp1;
 	struct cvmx_ciu_intx_sum0_cn38xx cn58xx;
 	struct cvmx_ciu_intx_sum0_cn38xx cn58xxp1;
+	struct cvmx_ciu_intx_sum0_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t sum2:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t wdog_sum:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t sum2:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_sum0_cn52xx cn63xx;
 	struct cvmx_ciu_intx_sum0_cn52xx cn63xxp1;
+	struct cvmx_ciu_intx_sum0_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t reserved_57_57:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t sum2:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t wdog_sum:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t sum2:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_57:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_sum0_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t reserved_62_62:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t sum2:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t gmx_drp:1;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t wdog_sum:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t sum2:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t reserved_62_62:1;
+		uint64_t bootdma:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_intx_sum4 {
 	uint64_t u64;
 	struct cvmx_ciu_intx_sum4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -1529,7 +6409,7 @@ union cvmx_ciu_intx_sum4 {
 		uint64_t pcm:1;
 		uint64_t usb:1;
 		uint64_t timer:4;
-		uint64_t key_zero:1;
+		uint64_t reserved_51_51:1;
 		uint64_t ipd_drp:1;
 		uint64_t gmx_drp:2;
 		uint64_t trace:1;
@@ -1542,8 +6422,33 @@ union cvmx_ciu_intx_sum4 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} s;
 	struct cvmx_ciu_intx_sum4_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t mpi:1;
 		uint64_t pcm:1;
@@ -1563,8 +6468,30 @@ union cvmx_ciu_intx_sum4 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t reserved_47_47:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t reserved_59_63:5;
+#endif
 	} cn50xx;
 	struct cvmx_ciu_intx_sum4_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -1587,9 +6514,34 @@ union cvmx_ciu_intx_sum4 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_intx_sum4_cn52xx cn52xxp1;
 	struct cvmx_ciu_intx_sum4_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -1611,9 +6563,33 @@ union cvmx_ciu_intx_sum4 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_intx_sum4_cn56xx cn56xxp1;
 	struct cvmx_ciu_intx_sum4_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t timer:4;
 		uint64_t key_zero:1;
@@ -1629,15 +6605,232 @@ union cvmx_ciu_intx_sum4 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t key_zero:1;
+		uint64_t timer:4;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn58xx;
 	struct cvmx_ciu_intx_sum4_cn58xx cn58xxp1;
+	struct cvmx_ciu_intx_sum4_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t sum2:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t wdog_sum:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t sum2:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_intx_sum4_cn52xx cn63xx;
 	struct cvmx_ciu_intx_sum4_cn52xx cn63xxp1;
+	struct cvmx_ciu_intx_sum4_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t reserved_57_57:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t sum2:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t wdog_sum:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t sum2:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_57:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_intx_sum4_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t reserved_62_62:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t sum2:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t gmx_drp:1;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t wdog_sum:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t sum2:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t reserved_62_62:1;
+		uint64_t bootdma:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_int33_sum0 {
 	uint64_t u64;
 	struct cvmx_ciu_int33_sum0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t sum2:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t wdog_sum:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t sum2:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} s;
+	struct cvmx_ciu_int33_sum0_s cn61xx;
+	struct cvmx_ciu_int33_sum0_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bootdma:1;
 		uint64_t mii:1;
 		uint64_t ipdppthr:1;
@@ -1660,29 +6853,202 @@ union cvmx_ciu_int33_sum0 {
 		uint64_t mbox:2;
 		uint64_t gpio:16;
 		uint64_t workq:16;
-	} s;
-	struct cvmx_ciu_int33_sum0_s cn63xx;
-	struct cvmx_ciu_int33_sum0_s cn63xxp1;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_51_51:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_58:2;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn63xx;
+	struct cvmx_ciu_int33_sum0_cn63xx cn63xxp1;
+	struct cvmx_ciu_int33_sum0_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t mii:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t reserved_57_57:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t sum2:1;
+		uint64_t ipd_drp:1;
+		uint64_t gmx_drp:2;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t wdog_sum:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:2;
+		uint64_t ipd_drp:1;
+		uint64_t sum2:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t reserved_57_57:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t mii:1;
+		uint64_t bootdma:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_int33_sum0_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bootdma:1;
+		uint64_t reserved_62_62:1;
+		uint64_t ipdppthr:1;
+		uint64_t powiq:1;
+		uint64_t twsi2:1;
+		uint64_t mpi:1;
+		uint64_t pcm:1;
+		uint64_t usb:1;
+		uint64_t timer:4;
+		uint64_t sum2:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t gmx_drp:1;
+		uint64_t trace:1;
+		uint64_t rml:1;
+		uint64_t twsi:1;
+		uint64_t wdog_sum:1;
+		uint64_t pci_msi:4;
+		uint64_t pci_int:4;
+		uint64_t uart:2;
+		uint64_t mbox:2;
+		uint64_t gpio:16;
+		uint64_t workq:16;
+#else
+		uint64_t workq:16;
+		uint64_t gpio:16;
+		uint64_t mbox:2;
+		uint64_t uart:2;
+		uint64_t pci_int:4;
+		uint64_t pci_msi:4;
+		uint64_t wdog_sum:1;
+		uint64_t twsi:1;
+		uint64_t rml:1;
+		uint64_t trace:1;
+		uint64_t gmx_drp:1;
+		uint64_t reserved_49_49:1;
+		uint64_t ipd_drp:1;
+		uint64_t sum2:1;
+		uint64_t timer:4;
+		uint64_t usb:1;
+		uint64_t pcm:1;
+		uint64_t mpi:1;
+		uint64_t twsi2:1;
+		uint64_t powiq:1;
+		uint64_t ipdppthr:1;
+		uint64_t reserved_62_62:1;
+		uint64_t bootdma:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_int_dbg_sel {
 	uint64_t u64;
 	struct cvmx_ciu_int_dbg_sel_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_19_63:45;
+		uint64_t sel:3;
+		uint64_t reserved_10_15:6;
+		uint64_t irq:2;
+		uint64_t reserved_5_7:3;
+		uint64_t pp:5;
+#else
+		uint64_t pp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t irq:2;
+		uint64_t reserved_10_15:6;
+		uint64_t sel:3;
+		uint64_t reserved_19_63:45;
+#endif
+	} s;
+	struct cvmx_ciu_int_dbg_sel_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_19_63:45;
+		uint64_t sel:3;
+		uint64_t reserved_10_15:6;
+		uint64_t irq:2;
+		uint64_t reserved_4_7:4;
+		uint64_t pp:4;
+#else
+		uint64_t pp:4;
+		uint64_t reserved_4_7:4;
+		uint64_t irq:2;
+		uint64_t reserved_10_15:6;
+		uint64_t sel:3;
+		uint64_t reserved_19_63:45;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_int_dbg_sel_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t sel:3;
 		uint64_t reserved_10_15:6;
 		uint64_t irq:2;
 		uint64_t reserved_3_7:5;
 		uint64_t pp:3;
-	} s;
-	struct cvmx_ciu_int_dbg_sel_s cn63xx;
+#else
+		uint64_t pp:3;
+		uint64_t reserved_3_7:5;
+		uint64_t irq:2;
+		uint64_t reserved_10_15:6;
+		uint64_t sel:3;
+		uint64_t reserved_19_63:45;
+#endif
+	} cn63xx;
+	struct cvmx_ciu_int_dbg_sel_cn61xx cn66xx;
+	struct cvmx_ciu_int_dbg_sel_s cn68xx;
+	struct cvmx_ciu_int_dbg_sel_s cn68xxp1;
+	struct cvmx_ciu_int_dbg_sel_cn61xx cnf71xx;
 };
 
 union cvmx_ciu_int_sum1 {
 	uint64_t u64;
 	struct cvmx_ciu_int_sum1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
-		uint64_t reserved_57_62:6;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
 		uint64_t dfm:1;
 		uint64_t reserved_53_55:3;
 		uint64_t lmc0:1;
@@ -1692,7 +7058,8 @@ union cvmx_ciu_int_sum1 {
 		uint64_t pem0:1;
 		uint64_t ptp:1;
 		uint64_t agl:1;
-		uint64_t reserved_37_45:9;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
 		uint64_t agx0:1;
 		uint64_t dpi:1;
 		uint64_t sli:1;
@@ -1715,22 +7082,78 @@ union cvmx_ciu_int_sum1 {
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
 	} s;
 	struct cvmx_ciu_int_sum1_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t wdog:1;
+#else
+		uint64_t wdog:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_int_sum1_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t wdog:2;
+#else
+		uint64_t wdog:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn31xx;
 	struct cvmx_ciu_int_sum1_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t wdog:16;
+#else
+		uint64_t wdog:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xx;
 	struct cvmx_ciu_int_sum1_cn38xx cn38xxp2;
 	struct cvmx_ciu_int_sum1_cn31xx cn50xx;
 	struct cvmx_ciu_int_sum1_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t nand:1;
 		uint64_t mii1:1;
@@ -1738,23 +7161,114 @@ union cvmx_ciu_int_sum1 {
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_int_sum1_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t mii1:1;
 		uint64_t usb1:1;
 		uint64_t uart2:1;
 		uint64_t reserved_4_15:12;
 		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_15:12;
+		uint64_t uart2:1;
+		uint64_t usb1:1;
+		uint64_t mii1:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn52xxp1;
 	struct cvmx_ciu_int_sum1_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t wdog:12;
+#else
+		uint64_t wdog:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_int_sum1_cn56xx cn56xxp1;
 	struct cvmx_ciu_int_sum1_cn38xx cn58xx;
 	struct cvmx_ciu_int_sum1_cn38xx cn58xxp1;
+	struct cvmx_ciu_int_sum1_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
 	struct cvmx_ciu_int_sum1_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rst:1;
 		uint64_t reserved_57_62:6;
 		uint64_t dfm:1;
@@ -1788,15 +7302,195 @@ union cvmx_ciu_int_sum1 {
 		uint64_t mii1:1;
 		uint64_t reserved_6_17:12;
 		uint64_t wdog:6;
+#else
+		uint64_t wdog:6;
+		uint64_t reserved_6_17:12;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_45:9;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t srio1:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_62:6;
+		uint64_t rst:1;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_int_sum1_cn63xx cn63xxp1;
+	struct cvmx_ciu_int_sum1_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_int_sum1_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_37_46:10;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_46:10;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_ciu_mbox_clrx {
 	uint64_t u64;
 	struct cvmx_ciu_mbox_clrx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t bits:32;
+#else
+		uint64_t bits:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_ciu_mbox_clrx_s cn30xx;
 	struct cvmx_ciu_mbox_clrx_s cn31xx;
@@ -1809,15 +7503,25 @@ union cvmx_ciu_mbox_clrx {
 	struct cvmx_ciu_mbox_clrx_s cn56xxp1;
 	struct cvmx_ciu_mbox_clrx_s cn58xx;
 	struct cvmx_ciu_mbox_clrx_s cn58xxp1;
+	struct cvmx_ciu_mbox_clrx_s cn61xx;
 	struct cvmx_ciu_mbox_clrx_s cn63xx;
 	struct cvmx_ciu_mbox_clrx_s cn63xxp1;
+	struct cvmx_ciu_mbox_clrx_s cn66xx;
+	struct cvmx_ciu_mbox_clrx_s cn68xx;
+	struct cvmx_ciu_mbox_clrx_s cn68xxp1;
+	struct cvmx_ciu_mbox_clrx_s cnf71xx;
 };
 
 union cvmx_ciu_mbox_setx {
 	uint64_t u64;
 	struct cvmx_ciu_mbox_setx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t bits:32;
+#else
+		uint64_t bits:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_ciu_mbox_setx_s cn30xx;
 	struct cvmx_ciu_mbox_setx_s cn31xx;
@@ -1830,51 +7534,112 @@ union cvmx_ciu_mbox_setx {
 	struct cvmx_ciu_mbox_setx_s cn56xxp1;
 	struct cvmx_ciu_mbox_setx_s cn58xx;
 	struct cvmx_ciu_mbox_setx_s cn58xxp1;
+	struct cvmx_ciu_mbox_setx_s cn61xx;
 	struct cvmx_ciu_mbox_setx_s cn63xx;
 	struct cvmx_ciu_mbox_setx_s cn63xxp1;
+	struct cvmx_ciu_mbox_setx_s cn66xx;
+	struct cvmx_ciu_mbox_setx_s cn68xx;
+	struct cvmx_ciu_mbox_setx_s cn68xxp1;
+	struct cvmx_ciu_mbox_setx_s cnf71xx;
 };
 
 union cvmx_ciu_nmi {
 	uint64_t u64;
 	struct cvmx_ciu_nmi_s {
-		uint64_t reserved_16_63:48;
-		uint64_t nmi:16;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t nmi:32;
+#else
+		uint64_t nmi:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_ciu_nmi_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t nmi:1;
+#else
+		uint64_t nmi:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_nmi_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t nmi:2;
+#else
+		uint64_t nmi:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn31xx;
-	struct cvmx_ciu_nmi_s cn38xx;
-	struct cvmx_ciu_nmi_s cn38xxp2;
+	struct cvmx_ciu_nmi_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t nmi:16;
+#else
+		uint64_t nmi:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} cn38xx;
+	struct cvmx_ciu_nmi_cn38xx cn38xxp2;
 	struct cvmx_ciu_nmi_cn31xx cn50xx;
 	struct cvmx_ciu_nmi_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t nmi:4;
+#else
+		uint64_t nmi:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_nmi_cn52xx cn52xxp1;
 	struct cvmx_ciu_nmi_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t nmi:12;
+#else
+		uint64_t nmi:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_nmi_cn56xx cn56xxp1;
-	struct cvmx_ciu_nmi_s cn58xx;
-	struct cvmx_ciu_nmi_s cn58xxp1;
+	struct cvmx_ciu_nmi_cn38xx cn58xx;
+	struct cvmx_ciu_nmi_cn38xx cn58xxp1;
+	struct cvmx_ciu_nmi_cn52xx cn61xx;
 	struct cvmx_ciu_nmi_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t nmi:6;
+#else
+		uint64_t nmi:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_nmi_cn63xx cn63xxp1;
+	struct cvmx_ciu_nmi_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t nmi:10;
+#else
+		uint64_t nmi:10;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_nmi_s cn68xx;
+	struct cvmx_ciu_nmi_s cn68xxp1;
+	struct cvmx_ciu_nmi_cn52xx cnf71xx;
 };
 
 union cvmx_ciu_pci_inta {
 	uint64_t u64;
 	struct cvmx_ciu_pci_inta_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t intr:2;
+#else
+		uint64_t intr:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_ciu_pci_inta_s cn30xx;
 	struct cvmx_ciu_pci_inta_s cn31xx;
@@ -1887,50 +7652,125 @@ union cvmx_ciu_pci_inta {
 	struct cvmx_ciu_pci_inta_s cn56xxp1;
 	struct cvmx_ciu_pci_inta_s cn58xx;
 	struct cvmx_ciu_pci_inta_s cn58xxp1;
+	struct cvmx_ciu_pci_inta_s cn61xx;
 	struct cvmx_ciu_pci_inta_s cn63xx;
 	struct cvmx_ciu_pci_inta_s cn63xxp1;
+	struct cvmx_ciu_pci_inta_s cn66xx;
+	struct cvmx_ciu_pci_inta_s cn68xx;
+	struct cvmx_ciu_pci_inta_s cn68xxp1;
+	struct cvmx_ciu_pci_inta_s cnf71xx;
+};
+
+union cvmx_ciu_pp_bist_stat {
+	uint64_t u64;
+	struct cvmx_ciu_pp_bist_stat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t pp_bist:32;
+#else
+		uint64_t pp_bist:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu_pp_bist_stat_s cn68xx;
+	struct cvmx_ciu_pp_bist_stat_s cn68xxp1;
 };
 
 union cvmx_ciu_pp_dbg {
 	uint64_t u64;
 	struct cvmx_ciu_pp_dbg_s {
-		uint64_t reserved_16_63:48;
-		uint64_t ppdbg:16;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t ppdbg:32;
+#else
+		uint64_t ppdbg:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_ciu_pp_dbg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t ppdbg:1;
+#else
+		uint64_t ppdbg:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_pp_dbg_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t ppdbg:2;
+#else
+		uint64_t ppdbg:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn31xx;
-	struct cvmx_ciu_pp_dbg_s cn38xx;
-	struct cvmx_ciu_pp_dbg_s cn38xxp2;
+	struct cvmx_ciu_pp_dbg_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t ppdbg:16;
+#else
+		uint64_t ppdbg:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} cn38xx;
+	struct cvmx_ciu_pp_dbg_cn38xx cn38xxp2;
 	struct cvmx_ciu_pp_dbg_cn31xx cn50xx;
 	struct cvmx_ciu_pp_dbg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t ppdbg:4;
+#else
+		uint64_t ppdbg:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_pp_dbg_cn52xx cn52xxp1;
 	struct cvmx_ciu_pp_dbg_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t ppdbg:12;
+#else
+		uint64_t ppdbg:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_pp_dbg_cn56xx cn56xxp1;
-	struct cvmx_ciu_pp_dbg_s cn58xx;
-	struct cvmx_ciu_pp_dbg_s cn58xxp1;
+	struct cvmx_ciu_pp_dbg_cn38xx cn58xx;
+	struct cvmx_ciu_pp_dbg_cn38xx cn58xxp1;
+	struct cvmx_ciu_pp_dbg_cn52xx cn61xx;
 	struct cvmx_ciu_pp_dbg_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t ppdbg:6;
+#else
+		uint64_t ppdbg:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_pp_dbg_cn63xx cn63xxp1;
+	struct cvmx_ciu_pp_dbg_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t ppdbg:10;
+#else
+		uint64_t ppdbg:10;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_pp_dbg_s cn68xx;
+	struct cvmx_ciu_pp_dbg_s cn68xxp1;
+	struct cvmx_ciu_pp_dbg_cn52xx cnf71xx;
 };
 
 union cvmx_ciu_pp_pokex {
 	uint64_t u64;
 	struct cvmx_ciu_pp_pokex_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t poke:64;
+#else
+		uint64_t poke:64;
+#endif
 	} s;
 	struct cvmx_ciu_pp_pokex_s cn30xx;
 	struct cvmx_ciu_pp_pokex_s cn31xx;
@@ -1943,54 +7783,120 @@ union cvmx_ciu_pp_pokex {
 	struct cvmx_ciu_pp_pokex_s cn56xxp1;
 	struct cvmx_ciu_pp_pokex_s cn58xx;
 	struct cvmx_ciu_pp_pokex_s cn58xxp1;
+	struct cvmx_ciu_pp_pokex_s cn61xx;
 	struct cvmx_ciu_pp_pokex_s cn63xx;
 	struct cvmx_ciu_pp_pokex_s cn63xxp1;
+	struct cvmx_ciu_pp_pokex_s cn66xx;
+	struct cvmx_ciu_pp_pokex_s cn68xx;
+	struct cvmx_ciu_pp_pokex_s cn68xxp1;
+	struct cvmx_ciu_pp_pokex_s cnf71xx;
 };
 
 union cvmx_ciu_pp_rst {
 	uint64_t u64;
 	struct cvmx_ciu_pp_rst_s {
-		uint64_t reserved_16_63:48;
-		uint64_t rst:15;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t rst:31;
+		uint64_t rst0:1;
+#else
 		uint64_t rst0:1;
+		uint64_t rst:31;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_ciu_pp_rst_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t rst0:1;
+#else
+		uint64_t rst0:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn30xx;
 	struct cvmx_ciu_pp_rst_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t rst:1;
 		uint64_t rst0:1;
+#else
+		uint64_t rst0:1;
+		uint64_t rst:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn31xx;
-	struct cvmx_ciu_pp_rst_s cn38xx;
-	struct cvmx_ciu_pp_rst_s cn38xxp2;
+	struct cvmx_ciu_pp_rst_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t rst:15;
+		uint64_t rst0:1;
+#else
+		uint64_t rst0:1;
+		uint64_t rst:15;
+		uint64_t reserved_16_63:48;
+#endif
+	} cn38xx;
+	struct cvmx_ciu_pp_rst_cn38xx cn38xxp2;
 	struct cvmx_ciu_pp_rst_cn31xx cn50xx;
 	struct cvmx_ciu_pp_rst_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t rst:3;
 		uint64_t rst0:1;
+#else
+		uint64_t rst0:1;
+		uint64_t rst:3;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_pp_rst_cn52xx cn52xxp1;
 	struct cvmx_ciu_pp_rst_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t rst:11;
 		uint64_t rst0:1;
+#else
+		uint64_t rst0:1;
+		uint64_t rst:11;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xx;
 	struct cvmx_ciu_pp_rst_cn56xx cn56xxp1;
-	struct cvmx_ciu_pp_rst_s cn58xx;
-	struct cvmx_ciu_pp_rst_s cn58xxp1;
+	struct cvmx_ciu_pp_rst_cn38xx cn58xx;
+	struct cvmx_ciu_pp_rst_cn38xx cn58xxp1;
+	struct cvmx_ciu_pp_rst_cn52xx cn61xx;
 	struct cvmx_ciu_pp_rst_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t rst:5;
 		uint64_t rst0:1;
+#else
+		uint64_t rst0:1;
+		uint64_t rst:5;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn63xx;
 	struct cvmx_ciu_pp_rst_cn63xx cn63xxp1;
+	struct cvmx_ciu_pp_rst_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t rst:9;
+		uint64_t rst0:1;
+#else
+		uint64_t rst0:1;
+		uint64_t rst:9;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_pp_rst_s cn68xx;
+	struct cvmx_ciu_pp_rst_s cn68xxp1;
+	struct cvmx_ciu_pp_rst_cn52xx cnf71xx;
 };
 
 union cvmx_ciu_qlm0 {
 	uint64_t u64;
 	struct cvmx_ciu_qlm0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t g2bypass:1;
 		uint64_t reserved_53_62:10;
 		uint64_t g2deemph:5;
@@ -2004,9 +7910,26 @@ union cvmx_ciu_qlm0 {
 		uint64_t txmargin:5;
 		uint64_t reserved_4_7:4;
 		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:5;
+		uint64_t reserved_21_30:10;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_39:8;
+		uint64_t g2margin:5;
+		uint64_t reserved_45_47:3;
+		uint64_t g2deemph:5;
+		uint64_t reserved_53_62:10;
+		uint64_t g2bypass:1;
+#endif
 	} s;
+	struct cvmx_ciu_qlm0_s cn61xx;
 	struct cvmx_ciu_qlm0_s cn63xx;
 	struct cvmx_ciu_qlm0_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t txbypass:1;
 		uint64_t reserved_20_30:11;
@@ -2015,12 +7938,47 @@ union cvmx_ciu_qlm0 {
 		uint64_t txmargin:5;
 		uint64_t reserved_4_7:4;
 		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:4;
+		uint64_t reserved_20_30:11;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn63xxp1;
+	struct cvmx_ciu_qlm0_s cn66xx;
+	struct cvmx_ciu_qlm0_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t txbypass:1;
+		uint64_t reserved_21_30:10;
+		uint64_t txdeemph:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txmargin:5;
+		uint64_t reserved_4_7:4;
+		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:5;
+		uint64_t reserved_21_30:10;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_63:32;
+#endif
+	} cn68xx;
+	struct cvmx_ciu_qlm0_cn68xx cn68xxp1;
+	struct cvmx_ciu_qlm0_s cnf71xx;
 };
 
 union cvmx_ciu_qlm1 {
 	uint64_t u64;
 	struct cvmx_ciu_qlm1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t g2bypass:1;
 		uint64_t reserved_53_62:10;
 		uint64_t g2deemph:5;
@@ -2034,9 +7992,26 @@ union cvmx_ciu_qlm1 {
 		uint64_t txmargin:5;
 		uint64_t reserved_4_7:4;
 		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:5;
+		uint64_t reserved_21_30:10;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_39:8;
+		uint64_t g2margin:5;
+		uint64_t reserved_45_47:3;
+		uint64_t g2deemph:5;
+		uint64_t reserved_53_62:10;
+		uint64_t g2bypass:1;
+#endif
 	} s;
+	struct cvmx_ciu_qlm1_s cn61xx;
 	struct cvmx_ciu_qlm1_s cn63xx;
 	struct cvmx_ciu_qlm1_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t txbypass:1;
 		uint64_t reserved_20_30:11;
@@ -2045,13 +8020,33 @@ union cvmx_ciu_qlm1 {
 		uint64_t txmargin:5;
 		uint64_t reserved_4_7:4;
 		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:4;
+		uint64_t reserved_20_30:11;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn63xxp1;
+	struct cvmx_ciu_qlm1_s cn66xx;
+	struct cvmx_ciu_qlm1_s cn68xx;
+	struct cvmx_ciu_qlm1_s cn68xxp1;
+	struct cvmx_ciu_qlm1_s cnf71xx;
 };
 
 union cvmx_ciu_qlm2 {
 	uint64_t u64;
 	struct cvmx_ciu_qlm2_s {
-		uint64_t reserved_32_63:32;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t g2bypass:1;
+		uint64_t reserved_53_62:10;
+		uint64_t g2deemph:5;
+		uint64_t reserved_45_47:3;
+		uint64_t g2margin:5;
+		uint64_t reserved_32_39:8;
 		uint64_t txbypass:1;
 		uint64_t reserved_21_30:10;
 		uint64_t txdeemph:5;
@@ -2059,9 +8054,46 @@ union cvmx_ciu_qlm2 {
 		uint64_t txmargin:5;
 		uint64_t reserved_4_7:4;
 		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:5;
+		uint64_t reserved_21_30:10;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_39:8;
+		uint64_t g2margin:5;
+		uint64_t reserved_45_47:3;
+		uint64_t g2deemph:5;
+		uint64_t reserved_53_62:10;
+		uint64_t g2bypass:1;
+#endif
 	} s;
-	struct cvmx_ciu_qlm2_s cn63xx;
+	struct cvmx_ciu_qlm2_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t txbypass:1;
+		uint64_t reserved_21_30:10;
+		uint64_t txdeemph:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txmargin:5;
+		uint64_t reserved_4_7:4;
+		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:5;
+		uint64_t reserved_21_30:10;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_63:32;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_qlm2_cn61xx cn63xx;
 	struct cvmx_ciu_qlm2_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t txbypass:1;
 		uint64_t reserved_20_30:11;
@@ -2070,18 +8102,116 @@ union cvmx_ciu_qlm2 {
 		uint64_t txmargin:5;
 		uint64_t reserved_4_7:4;
 		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:4;
+		uint64_t reserved_20_30:11;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn63xxp1;
+	struct cvmx_ciu_qlm2_cn61xx cn66xx;
+	struct cvmx_ciu_qlm2_s cn68xx;
+	struct cvmx_ciu_qlm2_s cn68xxp1;
+	struct cvmx_ciu_qlm2_cn61xx cnf71xx;
+};
+
+union cvmx_ciu_qlm3 {
+	uint64_t u64;
+	struct cvmx_ciu_qlm3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t g2bypass:1;
+		uint64_t reserved_53_62:10;
+		uint64_t g2deemph:5;
+		uint64_t reserved_45_47:3;
+		uint64_t g2margin:5;
+		uint64_t reserved_32_39:8;
+		uint64_t txbypass:1;
+		uint64_t reserved_21_30:10;
+		uint64_t txdeemph:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txmargin:5;
+		uint64_t reserved_4_7:4;
+		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:5;
+		uint64_t reserved_21_30:10;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_39:8;
+		uint64_t g2margin:5;
+		uint64_t reserved_45_47:3;
+		uint64_t g2deemph:5;
+		uint64_t reserved_53_62:10;
+		uint64_t g2bypass:1;
+#endif
+	} s;
+	struct cvmx_ciu_qlm3_s cn68xx;
+	struct cvmx_ciu_qlm3_s cn68xxp1;
+};
+
+union cvmx_ciu_qlm4 {
+	uint64_t u64;
+	struct cvmx_ciu_qlm4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t g2bypass:1;
+		uint64_t reserved_53_62:10;
+		uint64_t g2deemph:5;
+		uint64_t reserved_45_47:3;
+		uint64_t g2margin:5;
+		uint64_t reserved_32_39:8;
+		uint64_t txbypass:1;
+		uint64_t reserved_21_30:10;
+		uint64_t txdeemph:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txmargin:5;
+		uint64_t reserved_4_7:4;
+		uint64_t lane_en:4;
+#else
+		uint64_t lane_en:4;
+		uint64_t reserved_4_7:4;
+		uint64_t txmargin:5;
+		uint64_t reserved_13_15:3;
+		uint64_t txdeemph:5;
+		uint64_t reserved_21_30:10;
+		uint64_t txbypass:1;
+		uint64_t reserved_32_39:8;
+		uint64_t g2margin:5;
+		uint64_t reserved_45_47:3;
+		uint64_t g2deemph:5;
+		uint64_t reserved_53_62:10;
+		uint64_t g2bypass:1;
+#endif
+	} s;
+	struct cvmx_ciu_qlm4_s cn68xx;
+	struct cvmx_ciu_qlm4_s cn68xxp1;
 };
 
 union cvmx_ciu_qlm_dcok {
 	uint64_t u64;
 	struct cvmx_ciu_qlm_dcok_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t qlm_dcok:4;
+#else
+		uint64_t qlm_dcok:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_ciu_qlm_dcok_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t qlm_dcok:2;
+#else
+		uint64_t qlm_dcok:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_qlm_dcok_cn52xx cn52xxp1;
 	struct cvmx_ciu_qlm_dcok_s cn56xx;
@@ -2091,47 +8221,108 @@ union cvmx_ciu_qlm_dcok {
 union cvmx_ciu_qlm_jtgc {
 	uint64_t u64;
 	struct cvmx_ciu_qlm_jtgc_s {
-		uint64_t reserved_11_63:53;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_17_63:47;
+		uint64_t bypass_ext:1;
+		uint64_t reserved_11_15:5;
 		uint64_t clk_div:3;
-		uint64_t reserved_6_7:2;
-		uint64_t mux_sel:2;
+		uint64_t reserved_7_7:1;
+		uint64_t mux_sel:3;
 		uint64_t bypass:4;
+#else
+		uint64_t bypass:4;
+		uint64_t mux_sel:3;
+		uint64_t reserved_7_7:1;
+		uint64_t clk_div:3;
+		uint64_t reserved_11_15:5;
+		uint64_t bypass_ext:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_ciu_qlm_jtgc_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t clk_div:3;
 		uint64_t reserved_5_7:3;
 		uint64_t mux_sel:1;
 		uint64_t reserved_2_3:2;
 		uint64_t bypass:2;
+#else
+		uint64_t bypass:2;
+		uint64_t reserved_2_3:2;
+		uint64_t mux_sel:1;
+		uint64_t reserved_5_7:3;
+		uint64_t clk_div:3;
+		uint64_t reserved_11_63:53;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_qlm_jtgc_cn52xx cn52xxp1;
-	struct cvmx_ciu_qlm_jtgc_s cn56xx;
-	struct cvmx_ciu_qlm_jtgc_s cn56xxp1;
-	struct cvmx_ciu_qlm_jtgc_cn63xx {
+	struct cvmx_ciu_qlm_jtgc_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_11_63:53;
+		uint64_t clk_div:3;
+		uint64_t reserved_6_7:2;
+		uint64_t mux_sel:2;
+		uint64_t bypass:4;
+#else
+		uint64_t bypass:4;
+		uint64_t mux_sel:2;
+		uint64_t reserved_6_7:2;
+		uint64_t clk_div:3;
+		uint64_t reserved_11_63:53;
+#endif
+	} cn56xx;
+	struct cvmx_ciu_qlm_jtgc_cn56xx cn56xxp1;
+	struct cvmx_ciu_qlm_jtgc_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t clk_div:3;
 		uint64_t reserved_6_7:2;
 		uint64_t mux_sel:2;
 		uint64_t reserved_3_3:1;
 		uint64_t bypass:3;
-	} cn63xx;
-	struct cvmx_ciu_qlm_jtgc_cn63xx cn63xxp1;
+#else
+		uint64_t bypass:3;
+		uint64_t reserved_3_3:1;
+		uint64_t mux_sel:2;
+		uint64_t reserved_6_7:2;
+		uint64_t clk_div:3;
+		uint64_t reserved_11_63:53;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_qlm_jtgc_cn61xx cn63xx;
+	struct cvmx_ciu_qlm_jtgc_cn61xx cn63xxp1;
+	struct cvmx_ciu_qlm_jtgc_cn61xx cn66xx;
+	struct cvmx_ciu_qlm_jtgc_s cn68xx;
+	struct cvmx_ciu_qlm_jtgc_s cn68xxp1;
+	struct cvmx_ciu_qlm_jtgc_cn61xx cnf71xx;
 };
 
 union cvmx_ciu_qlm_jtgd {
 	uint64_t u64;
 	struct cvmx_ciu_qlm_jtgd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t capture:1;
 		uint64_t shift:1;
 		uint64_t update:1;
-		uint64_t reserved_44_60:17;
-		uint64_t select:4;
+		uint64_t reserved_45_60:16;
+		uint64_t select:5;
 		uint64_t reserved_37_39:3;
 		uint64_t shft_cnt:5;
 		uint64_t shft_reg:32;
+#else
+		uint64_t shft_reg:32;
+		uint64_t shft_cnt:5;
+		uint64_t reserved_37_39:3;
+		uint64_t select:5;
+		uint64_t reserved_45_60:16;
+		uint64_t update:1;
+		uint64_t shift:1;
+		uint64_t capture:1;
+#endif
 	} s;
 	struct cvmx_ciu_qlm_jtgd_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t capture:1;
 		uint64_t shift:1;
 		uint64_t update:1;
@@ -2140,18 +8331,58 @@ union cvmx_ciu_qlm_jtgd {
 		uint64_t reserved_37_39:3;
 		uint64_t shft_cnt:5;
 		uint64_t shft_reg:32;
+#else
+		uint64_t shft_reg:32;
+		uint64_t shft_cnt:5;
+		uint64_t reserved_37_39:3;
+		uint64_t select:2;
+		uint64_t reserved_42_60:19;
+		uint64_t update:1;
+		uint64_t shift:1;
+		uint64_t capture:1;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_qlm_jtgd_cn52xx cn52xxp1;
-	struct cvmx_ciu_qlm_jtgd_s cn56xx;
+	struct cvmx_ciu_qlm_jtgd_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t capture:1;
+		uint64_t shift:1;
+		uint64_t update:1;
+		uint64_t reserved_44_60:17;
+		uint64_t select:4;
+		uint64_t reserved_37_39:3;
+		uint64_t shft_cnt:5;
+		uint64_t shft_reg:32;
+#else
+		uint64_t shft_reg:32;
+		uint64_t shft_cnt:5;
+		uint64_t reserved_37_39:3;
+		uint64_t select:4;
+		uint64_t reserved_44_60:17;
+		uint64_t update:1;
+		uint64_t shift:1;
+		uint64_t capture:1;
+#endif
+	} cn56xx;
 	struct cvmx_ciu_qlm_jtgd_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t capture:1;
 		uint64_t shift:1;
 		uint64_t update:1;
 		uint64_t reserved_37_60:24;
 		uint64_t shft_cnt:5;
 		uint64_t shft_reg:32;
+#else
+		uint64_t shft_reg:32;
+		uint64_t shft_cnt:5;
+		uint64_t reserved_37_60:24;
+		uint64_t update:1;
+		uint64_t shift:1;
+		uint64_t capture:1;
+#endif
 	} cn56xxp1;
-	struct cvmx_ciu_qlm_jtgd_cn63xx {
+	struct cvmx_ciu_qlm_jtgd_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t capture:1;
 		uint64_t shift:1;
 		uint64_t update:1;
@@ -2160,15 +8391,35 @@ union cvmx_ciu_qlm_jtgd {
 		uint64_t reserved_37_39:3;
 		uint64_t shft_cnt:5;
 		uint64_t shft_reg:32;
-	} cn63xx;
-	struct cvmx_ciu_qlm_jtgd_cn63xx cn63xxp1;
+#else
+		uint64_t shft_reg:32;
+		uint64_t shft_cnt:5;
+		uint64_t reserved_37_39:3;
+		uint64_t select:3;
+		uint64_t reserved_43_60:18;
+		uint64_t update:1;
+		uint64_t shift:1;
+		uint64_t capture:1;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_qlm_jtgd_cn61xx cn63xx;
+	struct cvmx_ciu_qlm_jtgd_cn61xx cn63xxp1;
+	struct cvmx_ciu_qlm_jtgd_cn61xx cn66xx;
+	struct cvmx_ciu_qlm_jtgd_s cn68xx;
+	struct cvmx_ciu_qlm_jtgd_s cn68xxp1;
+	struct cvmx_ciu_qlm_jtgd_cn61xx cnf71xx;
 };
 
 union cvmx_ciu_soft_bist {
 	uint64_t u64;
 	struct cvmx_ciu_soft_bist_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t soft_bist:1;
+#else
+		uint64_t soft_bist:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_ciu_soft_bist_s cn30xx;
 	struct cvmx_ciu_soft_bist_s cn31xx;
@@ -2181,17 +8432,29 @@ union cvmx_ciu_soft_bist {
 	struct cvmx_ciu_soft_bist_s cn56xxp1;
 	struct cvmx_ciu_soft_bist_s cn58xx;
 	struct cvmx_ciu_soft_bist_s cn58xxp1;
+	struct cvmx_ciu_soft_bist_s cn61xx;
 	struct cvmx_ciu_soft_bist_s cn63xx;
 	struct cvmx_ciu_soft_bist_s cn63xxp1;
+	struct cvmx_ciu_soft_bist_s cn66xx;
+	struct cvmx_ciu_soft_bist_s cn68xx;
+	struct cvmx_ciu_soft_bist_s cn68xxp1;
+	struct cvmx_ciu_soft_bist_s cnf71xx;
 };
 
 union cvmx_ciu_soft_prst {
 	uint64_t u64;
 	struct cvmx_ciu_soft_prst_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t host64:1;
 		uint64_t npi:1;
 		uint64_t soft_prst:1;
+#else
+		uint64_t soft_prst:1;
+		uint64_t npi:1;
+		uint64_t host64:1;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_ciu_soft_prst_s cn30xx;
 	struct cvmx_ciu_soft_prst_s cn31xx;
@@ -2199,37 +8462,90 @@ union cvmx_ciu_soft_prst {
 	struct cvmx_ciu_soft_prst_s cn38xxp2;
 	struct cvmx_ciu_soft_prst_s cn50xx;
 	struct cvmx_ciu_soft_prst_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t soft_prst:1;
+#else
+		uint64_t soft_prst:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn52xx;
 	struct cvmx_ciu_soft_prst_cn52xx cn52xxp1;
 	struct cvmx_ciu_soft_prst_cn52xx cn56xx;
 	struct cvmx_ciu_soft_prst_cn52xx cn56xxp1;
 	struct cvmx_ciu_soft_prst_s cn58xx;
 	struct cvmx_ciu_soft_prst_s cn58xxp1;
+	struct cvmx_ciu_soft_prst_cn52xx cn61xx;
 	struct cvmx_ciu_soft_prst_cn52xx cn63xx;
 	struct cvmx_ciu_soft_prst_cn52xx cn63xxp1;
+	struct cvmx_ciu_soft_prst_cn52xx cn66xx;
+	struct cvmx_ciu_soft_prst_cn52xx cn68xx;
+	struct cvmx_ciu_soft_prst_cn52xx cn68xxp1;
+	struct cvmx_ciu_soft_prst_cn52xx cnf71xx;
 };
 
 union cvmx_ciu_soft_prst1 {
 	uint64_t u64;
 	struct cvmx_ciu_soft_prst1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t soft_prst:1;
+#else
+		uint64_t soft_prst:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_ciu_soft_prst1_s cn52xx;
 	struct cvmx_ciu_soft_prst1_s cn52xxp1;
 	struct cvmx_ciu_soft_prst1_s cn56xx;
 	struct cvmx_ciu_soft_prst1_s cn56xxp1;
+	struct cvmx_ciu_soft_prst1_s cn61xx;
 	struct cvmx_ciu_soft_prst1_s cn63xx;
 	struct cvmx_ciu_soft_prst1_s cn63xxp1;
+	struct cvmx_ciu_soft_prst1_s cn66xx;
+	struct cvmx_ciu_soft_prst1_s cn68xx;
+	struct cvmx_ciu_soft_prst1_s cn68xxp1;
+	struct cvmx_ciu_soft_prst1_s cnf71xx;
+};
+
+union cvmx_ciu_soft_prst2 {
+	uint64_t u64;
+	struct cvmx_ciu_soft_prst2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t soft_prst:1;
+#else
+		uint64_t soft_prst:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_ciu_soft_prst2_s cn66xx;
+};
+
+union cvmx_ciu_soft_prst3 {
+	uint64_t u64;
+	struct cvmx_ciu_soft_prst3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t soft_prst:1;
+#else
+		uint64_t soft_prst:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_ciu_soft_prst3_s cn66xx;
 };
 
 union cvmx_ciu_soft_rst {
 	uint64_t u64;
 	struct cvmx_ciu_soft_rst_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t soft_rst:1;
+#else
+		uint64_t soft_rst:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_ciu_soft_rst_s cn30xx;
 	struct cvmx_ciu_soft_rst_s cn31xx;
@@ -2242,16 +8558,1371 @@ union cvmx_ciu_soft_rst {
 	struct cvmx_ciu_soft_rst_s cn56xxp1;
 	struct cvmx_ciu_soft_rst_s cn58xx;
 	struct cvmx_ciu_soft_rst_s cn58xxp1;
+	struct cvmx_ciu_soft_rst_s cn61xx;
 	struct cvmx_ciu_soft_rst_s cn63xx;
 	struct cvmx_ciu_soft_rst_s cn63xxp1;
+	struct cvmx_ciu_soft_rst_s cn66xx;
+	struct cvmx_ciu_soft_rst_s cn68xx;
+	struct cvmx_ciu_soft_rst_s cn68xxp1;
+	struct cvmx_ciu_soft_rst_s cnf71xx;
+};
+
+union cvmx_ciu_sum1_iox_int {
+	uint64_t u64;
+	struct cvmx_ciu_sum1_iox_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu_sum1_iox_int_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_sum1_iox_int_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_sum1_iox_int_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
+};
+
+union cvmx_ciu_sum1_ppx_ip2 {
+	uint64_t u64;
+	struct cvmx_ciu_sum1_ppx_ip2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu_sum1_ppx_ip2_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_sum1_ppx_ip2_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_sum1_ppx_ip2_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
+};
+
+union cvmx_ciu_sum1_ppx_ip3 {
+	uint64_t u64;
+	struct cvmx_ciu_sum1_ppx_ip3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu_sum1_ppx_ip3_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_sum1_ppx_ip3_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_sum1_ppx_ip3_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
+};
+
+union cvmx_ciu_sum1_ppx_ip4 {
+	uint64_t u64;
+	struct cvmx_ciu_sum1_ppx_ip4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu_sum1_ppx_ip4_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_41_45:5;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_38_39:2;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_4_17:14;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_17:14;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_39:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_45:5;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_sum1_ppx_ip4_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_62_62:1;
+		uint64_t srio3:1;
+		uint64_t srio2:1;
+		uint64_t reserved_57_59:3;
+		uint64_t dfm:1;
+		uint64_t reserved_53_55:3;
+		uint64_t lmc0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t srio0:1;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t agl:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agx1:1;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t dfa:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t zip:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t mii1:1;
+		uint64_t reserved_10_17:8;
+		uint64_t wdog:10;
+#else
+		uint64_t wdog:10;
+		uint64_t reserved_10_17:8;
+		uint64_t mii1:1;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t zip:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t dfa:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t agx1:1;
+		uint64_t reserved_38_45:8;
+		uint64_t agl:1;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t srio0:1;
+		uint64_t reserved_51_51:1;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_55:3;
+		uint64_t dfm:1;
+		uint64_t reserved_57_59:3;
+		uint64_t srio2:1;
+		uint64_t srio3:1;
+		uint64_t reserved_62_62:1;
+		uint64_t rst:1;
+#endif
+	} cn66xx;
+	struct cvmx_ciu_sum1_ppx_ip4_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_53_62:10;
+		uint64_t lmc0:1;
+		uint64_t reserved_50_51:2;
+		uint64_t pem1:1;
+		uint64_t pem0:1;
+		uint64_t ptp:1;
+		uint64_t reserved_41_46:6;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t agx0:1;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t usb:1;
+		uint64_t reserved_32_32:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_28_28:1;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t l2c:1;
+		uint64_t pow:1;
+		uint64_t fpa:1;
+		uint64_t iob:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_4_18:15;
+		uint64_t wdog:4;
+#else
+		uint64_t wdog:4;
+		uint64_t reserved_4_18:15;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t iob:1;
+		uint64_t fpa:1;
+		uint64_t pow:1;
+		uint64_t l2c:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_28_28:1;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_32_32:1;
+		uint64_t usb:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t agx0:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_41_46:6;
+		uint64_t ptp:1;
+		uint64_t pem0:1;
+		uint64_t pem1:1;
+		uint64_t reserved_50_51:2;
+		uint64_t lmc0:1;
+		uint64_t reserved_53_62:10;
+		uint64_t rst:1;
+#endif
+	} cnf71xx;
+};
+
+union cvmx_ciu_sum2_iox_int {
+	uint64_t u64;
+	struct cvmx_ciu_sum2_iox_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_sum2_iox_int_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_sum2_iox_int_cn61xx cn66xx;
+	struct cvmx_ciu_sum2_iox_int_s cnf71xx;
+};
+
+union cvmx_ciu_sum2_ppx_ip2 {
+	uint64_t u64;
+	struct cvmx_ciu_sum2_ppx_ip2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_sum2_ppx_ip2_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_sum2_ppx_ip2_cn61xx cn66xx;
+	struct cvmx_ciu_sum2_ppx_ip2_s cnf71xx;
+};
+
+union cvmx_ciu_sum2_ppx_ip3 {
+	uint64_t u64;
+	struct cvmx_ciu_sum2_ppx_ip3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_sum2_ppx_ip3_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_sum2_ppx_ip3_cn61xx cn66xx;
+	struct cvmx_ciu_sum2_ppx_ip3_s cnf71xx;
+};
+
+union cvmx_ciu_sum2_ppx_ip4 {
+	uint64_t u64;
+	struct cvmx_ciu_sum2_ppx_ip4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t endor:2;
+		uint64_t eoi:1;
+		uint64_t reserved_10_11:2;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_11:2;
+		uint64_t eoi:1;
+		uint64_t endor:2;
+		uint64_t reserved_15_63:49;
+#endif
+	} s;
+	struct cvmx_ciu_sum2_ppx_ip4_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t timer:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t timer:6;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_ciu_sum2_ppx_ip4_cn61xx cn66xx;
+	struct cvmx_ciu_sum2_ppx_ip4_s cnf71xx;
 };
 
 union cvmx_ciu_timx {
 	uint64_t u64;
 	struct cvmx_ciu_timx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t one_shot:1;
 		uint64_t len:36;
+#else
+		uint64_t len:36;
+		uint64_t one_shot:1;
+		uint64_t reserved_37_63:27;
+#endif
 	} s;
 	struct cvmx_ciu_timx_s cn30xx;
 	struct cvmx_ciu_timx_s cn31xx;
@@ -2264,13 +9935,35 @@ union cvmx_ciu_timx {
 	struct cvmx_ciu_timx_s cn56xxp1;
 	struct cvmx_ciu_timx_s cn58xx;
 	struct cvmx_ciu_timx_s cn58xxp1;
+	struct cvmx_ciu_timx_s cn61xx;
 	struct cvmx_ciu_timx_s cn63xx;
 	struct cvmx_ciu_timx_s cn63xxp1;
+	struct cvmx_ciu_timx_s cn66xx;
+	struct cvmx_ciu_timx_s cn68xx;
+	struct cvmx_ciu_timx_s cn68xxp1;
+	struct cvmx_ciu_timx_s cnf71xx;
+};
+
+union cvmx_ciu_tim_multi_cast {
+	uint64_t u64;
+	struct cvmx_ciu_tim_multi_cast_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_ciu_tim_multi_cast_s cn61xx;
+	struct cvmx_ciu_tim_multi_cast_s cn66xx;
+	struct cvmx_ciu_tim_multi_cast_s cnf71xx;
 };
 
 union cvmx_ciu_wdogx {
 	uint64_t u64;
 	struct cvmx_ciu_wdogx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_46_63:18;
 		uint64_t gstopen:1;
 		uint64_t dstop:1;
@@ -2278,6 +9971,15 @@ union cvmx_ciu_wdogx {
 		uint64_t len:16;
 		uint64_t state:2;
 		uint64_t mode:2;
+#else
+		uint64_t mode:2;
+		uint64_t state:2;
+		uint64_t len:16;
+		uint64_t cnt:24;
+		uint64_t dstop:1;
+		uint64_t gstopen:1;
+		uint64_t reserved_46_63:18;
+#endif
 	} s;
 	struct cvmx_ciu_wdogx_s cn30xx;
 	struct cvmx_ciu_wdogx_s cn31xx;
@@ -2290,8 +9992,13 @@ union cvmx_ciu_wdogx {
 	struct cvmx_ciu_wdogx_s cn56xxp1;
 	struct cvmx_ciu_wdogx_s cn58xx;
 	struct cvmx_ciu_wdogx_s cn58xxp1;
+	struct cvmx_ciu_wdogx_s cn61xx;
 	struct cvmx_ciu_wdogx_s cn63xx;
 	struct cvmx_ciu_wdogx_s cn63xxp1;
+	struct cvmx_ciu_wdogx_s cn66xx;
+	struct cvmx_ciu_wdogx_s cn68xx;
+	struct cvmx_ciu_wdogx_s cn68xxp1;
+	struct cvmx_ciu_wdogx_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h b/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h
new file mode 100644
index 00000000000..148bc9a0085
--- /dev/null
+++ b/arch/mips/include/asm/octeon/cvmx-ciu2-defs.h
@@ -0,0 +1,7108 @@
+/***********************license start***************
+ * Author: Cavium Networks
+ *
+ * Contact: support@caviumnetworks.com
+ * This file is part of the OCTEON SDK
+ *
+ * Copyright (c) 2003-2012 Cavium Networks
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, Version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful, but
+ * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
+ * NONINFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this file; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * or visit http://www.gnu.org/licenses/.
+ *
+ * This file may also be available under a different license from Cavium.
+ * Contact Cavium Networks for more information
+ ***********************license end**************************************/
+
+#ifndef __CVMX_CIU2_DEFS_H__
+#define __CVMX_CIU2_DEFS_H__
+
+#define CVMX_CIU2_ACK_IOX_INT(block_id) (CVMX_ADD_IO_SEG(0x00010701080C0800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_ACK_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_ACK_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_ACK_PPX_IP4(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108097800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B7800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A7800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070108094800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B4800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A4800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070108098800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B8800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A8800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070108095800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B5800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A5800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108093800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B3800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A3800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070108096800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B6800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A6800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070108092800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B2800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A2800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070108091800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B1800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A1800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070108090800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701080B0800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_IOX_INT_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701080A0800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100097000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B7000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A7000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100094000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B4000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A4000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100098000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100095000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B5000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A5000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100093000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B3000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A3000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100096000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B6000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A6000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B2000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A2000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B1000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A1000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100097200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B7200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A7200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100094200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B4200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A4200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100098200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100095200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B5200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A5200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100093200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B3200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A3200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100096200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B6200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A6200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B2200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A2200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B1200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A1200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP3_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100097400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_GPIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B7400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_GPIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A7400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100094400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_IO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B4400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_IO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A4400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100098400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100095400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_MEM_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B5400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_MEM_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A5400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100093400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_MIO_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B3400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_MIO_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A3400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100096400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_PKT_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B6400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_PKT_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A6400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_RML_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B2400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_RML_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A2400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_WDOG_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B1400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_WDOG_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A1400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_EN_PPX_IP4_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_INTR_CIU_READY (CVMX_ADD_IO_SEG(0x0001070100102008ull))
+#define CVMX_CIU2_INTR_RAM_ECC_CTL (CVMX_ADD_IO_SEG(0x0001070100102010ull))
+#define CVMX_CIU2_INTR_RAM_ECC_ST (CVMX_ADD_IO_SEG(0x0001070100102018ull))
+#define CVMX_CIU2_INTR_SLOWDOWN (CVMX_ADD_IO_SEG(0x0001070100102000ull))
+#define CVMX_CIU2_MSIRED_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C1000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_MSIRED_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C1200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_MSIRED_PPX_IP4(block_id) (CVMX_ADD_IO_SEG(0x00010701000C1400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_MSI_RCVX(offset) (CVMX_ADD_IO_SEG(0x00010701000C2000ull) + ((offset) & 255) * 8)
+#define CVMX_CIU2_MSI_SELX(offset) (CVMX_ADD_IO_SEG(0x00010701000C3000ull) + ((offset) & 255) * 8)
+#define CVMX_CIU2_RAW_IOX_INT_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108047800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_RAW_IOX_INT_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070108044800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_RAW_IOX_INT_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070108045800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_RAW_IOX_INT_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108043800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_RAW_IOX_INT_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070108046800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_RAW_IOX_INT_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070108042800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_RAW_IOX_INT_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070108041800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_RAW_IOX_INT_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070108040800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP2_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100047000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP2_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100044000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP2_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100045000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP2_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100043000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP2_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100046000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100042000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100041000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP3_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100047200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP3_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100044200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP3_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100045200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP3_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100043200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP3_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100046200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP3_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100042200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP3_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100041200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP3_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP4_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100047400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP4_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100044400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP4_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100045400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP4_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100043400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP4_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100046400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP4_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100042400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP4_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100041400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_RAW_PPX_IP4_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_IOX_INT_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108087800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_SRC_IOX_INT_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070108084800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_SRC_IOX_INT_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070108088800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_SRC_IOX_INT_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070108085800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_SRC_IOX_INT_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070108083800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_SRC_IOX_INT_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070108086800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_SRC_IOX_INT_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070108082800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_SRC_IOX_INT_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070108081800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_SRC_IOX_INT_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070108080800ull) + ((block_id) & 1) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP2_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100087000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP2_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100084000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP2_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100088000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP2_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100085000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP2_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100083000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP2_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100086000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080000ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP3_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100087200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP3_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100084200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP3_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100088200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP3_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100085200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP3_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100083200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP3_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100086200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP3_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP3_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP3_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080200ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP4_GPIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100087400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP4_IO(block_id) (CVMX_ADD_IO_SEG(0x0001070100084400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP4_MBOX(block_id) (CVMX_ADD_IO_SEG(0x0001070100088400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP4_MEM(block_id) (CVMX_ADD_IO_SEG(0x0001070100085400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP4_MIO(block_id) (CVMX_ADD_IO_SEG(0x0001070100083400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP4_PKT(block_id) (CVMX_ADD_IO_SEG(0x0001070100086400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP4_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100082400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP4_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100081400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SRC_PPX_IP4_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100080400ull) + ((block_id) & 31) * 0x200000ull)
+#define CVMX_CIU2_SUM_IOX_INT(offset) (CVMX_ADD_IO_SEG(0x0001070100000800ull) + ((offset) & 1) * 8)
+#define CVMX_CIU2_SUM_PPX_IP2(offset) (CVMX_ADD_IO_SEG(0x0001070100000000ull) + ((offset) & 31) * 8)
+#define CVMX_CIU2_SUM_PPX_IP3(offset) (CVMX_ADD_IO_SEG(0x0001070100000200ull) + ((offset) & 31) * 8)
+#define CVMX_CIU2_SUM_PPX_IP4(offset) (CVMX_ADD_IO_SEG(0x0001070100000400ull) + ((offset) & 31) * 8)
+
+union cvmx_ciu2_ack_iox_int {
+	uint64_t u64;
+	struct cvmx_ciu2_ack_iox_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t ack:1;
+#else
+		uint64_t ack:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_ciu2_ack_iox_int_s cn68xx;
+	struct cvmx_ciu2_ack_iox_int_s cn68xxp1;
+};
+
+union cvmx_ciu2_ack_ppx_ip2 {
+	uint64_t u64;
+	struct cvmx_ciu2_ack_ppx_ip2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t ack:1;
+#else
+		uint64_t ack:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_ciu2_ack_ppx_ip2_s cn68xx;
+	struct cvmx_ciu2_ack_ppx_ip2_s cn68xxp1;
+};
+
+union cvmx_ciu2_ack_ppx_ip3 {
+	uint64_t u64;
+	struct cvmx_ciu2_ack_ppx_ip3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t ack:1;
+#else
+		uint64_t ack:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_ciu2_ack_ppx_ip3_s cn68xx;
+	struct cvmx_ciu2_ack_ppx_ip3_s cn68xxp1;
+};
+
+union cvmx_ciu2_ack_ppx_ip4 {
+	uint64_t u64;
+	struct cvmx_ciu2_ack_ppx_ip4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t ack:1;
+#else
+		uint64_t ack:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_ciu2_ack_ppx_ip4_s cn68xx;
+	struct cvmx_ciu2_ack_ppx_ip4_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_gpio_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_gpio_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_gpio_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_gpio_w1c_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_gpio_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_gpio_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_gpio_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_gpio_w1s_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_gpio_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_io {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_io_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_io_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_io_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_io_w1c_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_io_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_io_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_io_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_io_w1s_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_io_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_mbox {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_mbox_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_mbox_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_mbox_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_mbox_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_mbox_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_mbox_w1c_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_mbox_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_mbox_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_mbox_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_mbox_w1s_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_mbox_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_mem_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_mem_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_mem_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_mem_w1c_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_mem_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_mem_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_mem_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_mem_w1s_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_mem_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_mio_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_mio_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_mio_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_mio_w1c_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_mio_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_mio_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_mio_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_mio_w1s_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_mio_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_pkt_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_pkt_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_pkt_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_pkt_w1c_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_pkt_w1c_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_pkt_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_pkt_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_pkt_w1s_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_pkt_w1s_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_rml_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_rml_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_rml_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_rml_w1c_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_rml_w1c_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_rml_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_rml_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_rml_w1s_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_rml_w1s_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_wdog_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_wdog_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_wdog_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_wdog_w1c_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_wdog_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_wdog_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_wdog_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_wdog_w1s_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_wdog_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_wrkq_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_wrkq_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_wrkq_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_wrkq_w1c_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_wrkq_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_iox_int_wrkq_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_iox_int_wrkq_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_iox_int_wrkq_w1s_s cn68xx;
+	struct cvmx_ciu2_en_iox_int_wrkq_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_gpio_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_gpio_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_gpio_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_gpio_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_gpio_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_gpio_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_gpio_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_gpio_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_gpio_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_io {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_io_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_io_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_io_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_io_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_io_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_io_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_io_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_io_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_io_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_mbox {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_mbox_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_mbox_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_mbox_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_mbox_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_mbox_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_mbox_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_mbox_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_mbox_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_mbox_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_mbox_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_mbox_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_mem_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_mem_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_mem_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_mem_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_mem_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_mem_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_mem_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_mem_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_mem_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_mio_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_mio_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_mio_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_mio_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_mio_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_mio_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_mio_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_mio_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_mio_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_pkt_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_pkt_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_pkt_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_pkt_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_pkt_w1c_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_pkt_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_pkt_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_pkt_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_pkt_w1s_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_rml_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_rml_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_rml_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_rml_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_rml_w1c_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_rml_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_rml_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_rml_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_rml_w1s_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_wdog_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_wdog_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_wdog_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_wdog_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_wdog_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_wdog_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_wdog_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_wdog_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_wdog_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_wrkq_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_wrkq_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_wrkq_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_wrkq_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_wrkq_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip2_wrkq_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip2_wrkq_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip2_wrkq_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip2_wrkq_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_gpio_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_gpio_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_gpio_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_gpio_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_gpio_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_gpio_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_gpio_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_gpio_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_gpio_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_io {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_io_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_io_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_io_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_io_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_io_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_io_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_io_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_io_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_io_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_mbox {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_mbox_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_mbox_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_mbox_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_mbox_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_mbox_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_mbox_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_mbox_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_mbox_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_mbox_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_mbox_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_mbox_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_mem_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_mem_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_mem_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_mem_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_mem_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_mem_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_mem_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_mem_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_mem_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_mio_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_mio_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_mio_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_mio_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_mio_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_mio_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_mio_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_mio_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_mio_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_pkt_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_pkt_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_pkt_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_pkt_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_pkt_w1c_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_pkt_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_pkt_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_pkt_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_pkt_w1s_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_rml_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_rml_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_rml_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_rml_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_rml_w1c_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_rml_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_rml_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_rml_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_rml_w1s_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_wdog_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_wdog_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_wdog_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_wdog_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_wdog_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_wdog_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_wdog_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_wdog_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_wdog_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_wrkq_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_wrkq_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_wrkq_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_wrkq_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_wrkq_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip3_wrkq_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip3_wrkq_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip3_wrkq_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip3_wrkq_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_gpio_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_gpio_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_gpio_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_gpio_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_gpio_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_gpio_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_gpio_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_gpio_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_gpio_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_io {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_io_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_io_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_io_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_io_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_io_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_io_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_io_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_io_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_io_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_mbox {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_mbox_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_mbox_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_mbox_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_mbox_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_mbox_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_mbox_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_mbox_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_mbox_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_mbox_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_mbox_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_mbox_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_mem_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_mem_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_mem_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_mem_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_mem_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_mem_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_mem_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_mem_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_mem_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_mio_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_mio_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_mio_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_mio_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_mio_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_mio_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_mio_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_mio_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_mio_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_pkt_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_pkt_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_pkt_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_pkt_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_pkt_w1c_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_pkt_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_pkt_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_pkt_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_pkt_w1s_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_rml_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_rml_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_rml_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_rml_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_rml_w1c_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_rml_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_rml_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_rml_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_rml_w1s_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_wdog_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_wdog_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_wdog_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_wdog_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_wdog_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_wdog_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_wdog_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_wdog_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_wdog_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_wrkq_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_wrkq_w1c {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_wrkq_w1c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_wrkq_w1c_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_wrkq_w1c_s cn68xxp1;
+};
+
+union cvmx_ciu2_en_ppx_ip4_wrkq_w1s {
+	uint64_t u64;
+	struct cvmx_ciu2_en_ppx_ip4_wrkq_w1s_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_en_ppx_ip4_wrkq_w1s_s cn68xx;
+	struct cvmx_ciu2_en_ppx_ip4_wrkq_w1s_s cn68xxp1;
+};
+
+union cvmx_ciu2_intr_ciu_ready {
+	uint64_t u64;
+	struct cvmx_ciu2_intr_ciu_ready_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t ready:1;
+#else
+		uint64_t ready:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_ciu2_intr_ciu_ready_s cn68xx;
+	struct cvmx_ciu2_intr_ciu_ready_s cn68xxp1;
+};
+
+union cvmx_ciu2_intr_ram_ecc_ctl {
+	uint64_t u64;
+	struct cvmx_ciu2_intr_ram_ecc_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_3_63:61;
+		uint64_t flip_synd:2;
+		uint64_t ecc_ena:1;
+#else
+		uint64_t ecc_ena:1;
+		uint64_t flip_synd:2;
+		uint64_t reserved_3_63:61;
+#endif
+	} s;
+	struct cvmx_ciu2_intr_ram_ecc_ctl_s cn68xx;
+	struct cvmx_ciu2_intr_ram_ecc_ctl_s cn68xxp1;
+};
+
+union cvmx_ciu2_intr_ram_ecc_st {
+	uint64_t u64;
+	struct cvmx_ciu2_intr_ram_ecc_st_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_23_63:41;
+		uint64_t addr:7;
+		uint64_t reserved_13_15:3;
+		uint64_t syndrom:9;
+		uint64_t reserved_2_3:2;
+		uint64_t dbe:1;
+		uint64_t sbe:1;
+#else
+		uint64_t sbe:1;
+		uint64_t dbe:1;
+		uint64_t reserved_2_3:2;
+		uint64_t syndrom:9;
+		uint64_t reserved_13_15:3;
+		uint64_t addr:7;
+		uint64_t reserved_23_63:41;
+#endif
+	} s;
+	struct cvmx_ciu2_intr_ram_ecc_st_s cn68xx;
+	struct cvmx_ciu2_intr_ram_ecc_st_s cn68xxp1;
+};
+
+union cvmx_ciu2_intr_slowdown {
+	uint64_t u64;
+	struct cvmx_ciu2_intr_slowdown_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_3_63:61;
+		uint64_t ctl:3;
+#else
+		uint64_t ctl:3;
+		uint64_t reserved_3_63:61;
+#endif
+	} s;
+	struct cvmx_ciu2_intr_slowdown_s cn68xx;
+	struct cvmx_ciu2_intr_slowdown_s cn68xxp1;
+};
+
+union cvmx_ciu2_msi_rcvx {
+	uint64_t u64;
+	struct cvmx_ciu2_msi_rcvx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t msi_rcv:1;
+#else
+		uint64_t msi_rcv:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_ciu2_msi_rcvx_s cn68xx;
+	struct cvmx_ciu2_msi_rcvx_s cn68xxp1;
+};
+
+union cvmx_ciu2_msi_selx {
+	uint64_t u64;
+	struct cvmx_ciu2_msi_selx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_13_63:51;
+		uint64_t pp_num:5;
+		uint64_t reserved_6_7:2;
+		uint64_t ip_num:2;
+		uint64_t reserved_1_3:3;
+		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t reserved_1_3:3;
+		uint64_t ip_num:2;
+		uint64_t reserved_6_7:2;
+		uint64_t pp_num:5;
+		uint64_t reserved_13_63:51;
+#endif
+	} s;
+	struct cvmx_ciu2_msi_selx_s cn68xx;
+	struct cvmx_ciu2_msi_selx_s cn68xxp1;
+};
+
+union cvmx_ciu2_msired_ppx_ip2 {
+	uint64_t u64;
+	struct cvmx_ciu2_msired_ppx_ip2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_21_63:43;
+		uint64_t intr:1;
+		uint64_t reserved_17_19:3;
+		uint64_t newint:1;
+		uint64_t reserved_8_15:8;
+		uint64_t msi_num:8;
+#else
+		uint64_t msi_num:8;
+		uint64_t reserved_8_15:8;
+		uint64_t newint:1;
+		uint64_t reserved_17_19:3;
+		uint64_t intr:1;
+		uint64_t reserved_21_63:43;
+#endif
+	} s;
+	struct cvmx_ciu2_msired_ppx_ip2_s cn68xx;
+	struct cvmx_ciu2_msired_ppx_ip2_s cn68xxp1;
+};
+
+union cvmx_ciu2_msired_ppx_ip3 {
+	uint64_t u64;
+	struct cvmx_ciu2_msired_ppx_ip3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_21_63:43;
+		uint64_t intr:1;
+		uint64_t reserved_17_19:3;
+		uint64_t newint:1;
+		uint64_t reserved_8_15:8;
+		uint64_t msi_num:8;
+#else
+		uint64_t msi_num:8;
+		uint64_t reserved_8_15:8;
+		uint64_t newint:1;
+		uint64_t reserved_17_19:3;
+		uint64_t intr:1;
+		uint64_t reserved_21_63:43;
+#endif
+	} s;
+	struct cvmx_ciu2_msired_ppx_ip3_s cn68xx;
+	struct cvmx_ciu2_msired_ppx_ip3_s cn68xxp1;
+};
+
+union cvmx_ciu2_msired_ppx_ip4 {
+	uint64_t u64;
+	struct cvmx_ciu2_msired_ppx_ip4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_21_63:43;
+		uint64_t intr:1;
+		uint64_t reserved_17_19:3;
+		uint64_t newint:1;
+		uint64_t reserved_8_15:8;
+		uint64_t msi_num:8;
+#else
+		uint64_t msi_num:8;
+		uint64_t reserved_8_15:8;
+		uint64_t newint:1;
+		uint64_t reserved_17_19:3;
+		uint64_t intr:1;
+		uint64_t reserved_21_63:43;
+#endif
+	} s;
+	struct cvmx_ciu2_msired_ppx_ip4_s cn68xx;
+	struct cvmx_ciu2_msired_ppx_ip4_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_iox_int_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_iox_int_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_iox_int_gpio_s cn68xx;
+	struct cvmx_ciu2_raw_iox_int_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_iox_int_io {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_iox_int_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_iox_int_io_s cn68xx;
+	struct cvmx_ciu2_raw_iox_int_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_iox_int_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_iox_int_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_iox_int_mem_s cn68xx;
+	struct cvmx_ciu2_raw_iox_int_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_iox_int_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_iox_int_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_iox_int_mio_s cn68xx;
+	struct cvmx_ciu2_raw_iox_int_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_iox_int_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_iox_int_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_iox_int_pkt_s cn68xx;
+	struct cvmx_ciu2_raw_iox_int_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_raw_iox_int_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_iox_int_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_iox_int_rml_s cn68xx;
+	struct cvmx_ciu2_raw_iox_int_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_raw_iox_int_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_iox_int_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_iox_int_wdog_s cn68xx;
+	struct cvmx_ciu2_raw_iox_int_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_iox_int_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_iox_int_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_iox_int_wrkq_s cn68xx;
+	struct cvmx_ciu2_raw_iox_int_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip2_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip2_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip2_gpio_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip2_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip2_io {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip2_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip2_io_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip2_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip2_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip2_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip2_mem_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip2_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip2_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip2_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip2_mio_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip2_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip2_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip2_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip2_pkt_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip2_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip2_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip2_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip2_rml_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip2_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip2_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip2_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip2_wdog_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip2_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip2_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip2_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip2_wrkq_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip2_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip3_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip3_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip3_gpio_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip3_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip3_io {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip3_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip3_io_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip3_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip3_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip3_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip3_mem_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip3_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip3_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip3_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip3_mio_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip3_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip3_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip3_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip3_pkt_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip3_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip3_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip3_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip3_rml_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip3_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip3_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip3_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip3_wdog_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip3_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip3_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip3_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip3_wrkq_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip3_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip4_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip4_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip4_gpio_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip4_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip4_io {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip4_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip4_io_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip4_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip4_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip4_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip4_mem_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip4_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip4_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip4_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip4_mio_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip4_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip4_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip4_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip4_pkt_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip4_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip4_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip4_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip4_rml_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip4_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip4_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip4_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip4_wdog_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip4_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_raw_ppx_ip4_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_raw_ppx_ip4_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_raw_ppx_ip4_wrkq_s cn68xx;
+	struct cvmx_ciu2_raw_ppx_ip4_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_iox_int_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_src_iox_int_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_src_iox_int_gpio_s cn68xx;
+	struct cvmx_ciu2_src_iox_int_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_iox_int_io {
+	uint64_t u64;
+	struct cvmx_ciu2_src_iox_int_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_src_iox_int_io_s cn68xx;
+	struct cvmx_ciu2_src_iox_int_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_iox_int_mbox {
+	uint64_t u64;
+	struct cvmx_ciu2_src_iox_int_mbox_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_src_iox_int_mbox_s cn68xx;
+	struct cvmx_ciu2_src_iox_int_mbox_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_iox_int_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_src_iox_int_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_src_iox_int_mem_s cn68xx;
+	struct cvmx_ciu2_src_iox_int_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_iox_int_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_src_iox_int_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_src_iox_int_mio_s cn68xx;
+	struct cvmx_ciu2_src_iox_int_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_iox_int_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_src_iox_int_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_src_iox_int_pkt_s cn68xx;
+	struct cvmx_ciu2_src_iox_int_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_src_iox_int_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_src_iox_int_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_src_iox_int_rml_s cn68xx;
+	struct cvmx_ciu2_src_iox_int_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_src_iox_int_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_src_iox_int_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_src_iox_int_wdog_s cn68xx;
+	struct cvmx_ciu2_src_iox_int_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_iox_int_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_src_iox_int_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_src_iox_int_wrkq_s cn68xx;
+	struct cvmx_ciu2_src_iox_int_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip2_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip2_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip2_gpio_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip2_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip2_io {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip2_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip2_io_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip2_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip2_mbox {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip2_mbox_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip2_mbox_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip2_mbox_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip2_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip2_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip2_mem_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip2_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip2_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip2_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip2_mio_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip2_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip2_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip2_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip2_pkt_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip2_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip2_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip2_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip2_rml_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip2_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip2_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip2_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip2_wdog_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip2_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip2_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip2_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip2_wrkq_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip2_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip3_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip3_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip3_gpio_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip3_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip3_io {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip3_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip3_io_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip3_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip3_mbox {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip3_mbox_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip3_mbox_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip3_mbox_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip3_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip3_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip3_mem_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip3_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip3_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip3_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip3_mio_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip3_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip3_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip3_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip3_pkt_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip3_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip3_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip3_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip3_rml_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip3_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip3_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip3_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip3_wdog_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip3_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip3_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip3_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip3_wrkq_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip3_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip4_gpio {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip4_gpio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t gpio:16;
+#else
+		uint64_t gpio:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip4_gpio_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip4_gpio_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip4_io {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip4_io_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_34_63:30;
+		uint64_t pem:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pci_inta:2;
+		uint64_t reserved_13_15:3;
+		uint64_t msired:1;
+		uint64_t pci_msi:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_intr:4;
+#else
+		uint64_t pci_intr:4;
+		uint64_t reserved_4_7:4;
+		uint64_t pci_msi:4;
+		uint64_t msired:1;
+		uint64_t reserved_13_15:3;
+		uint64_t pci_inta:2;
+		uint64_t reserved_18_31:14;
+		uint64_t pem:2;
+		uint64_t reserved_34_63:30;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip4_io_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip4_io_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip4_mbox {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip4_mbox_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip4_mbox_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip4_mbox_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip4_mem {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip4_mem_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t lmc:4;
+#else
+		uint64_t lmc:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip4_mem_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip4_mem_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip4_mio {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip4_mio_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rst:1;
+		uint64_t reserved_49_62:14;
+		uint64_t ptp:1;
+		uint64_t reserved_45_47:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_38_39:2;
+		uint64_t uart:2;
+		uint64_t reserved_34_35:2;
+		uint64_t twsi:2;
+		uint64_t reserved_19_31:13;
+		uint64_t bootdma:1;
+		uint64_t mio:1;
+		uint64_t nand:1;
+		uint64_t reserved_12_15:4;
+		uint64_t timer:4;
+		uint64_t reserved_3_7:5;
+		uint64_t ipd_drp:1;
+		uint64_t ssoiq:1;
+		uint64_t ipdppthr:1;
+#else
+		uint64_t ipdppthr:1;
+		uint64_t ssoiq:1;
+		uint64_t ipd_drp:1;
+		uint64_t reserved_3_7:5;
+		uint64_t timer:4;
+		uint64_t reserved_12_15:4;
+		uint64_t nand:1;
+		uint64_t mio:1;
+		uint64_t bootdma:1;
+		uint64_t reserved_19_31:13;
+		uint64_t twsi:2;
+		uint64_t reserved_34_35:2;
+		uint64_t uart:2;
+		uint64_t reserved_38_39:2;
+		uint64_t usb_uctl:1;
+		uint64_t reserved_41_43:3;
+		uint64_t usb_hci:1;
+		uint64_t reserved_45_47:3;
+		uint64_t ptp:1;
+		uint64_t reserved_49_62:14;
+		uint64_t rst:1;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip4_mio_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip4_mio_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip4_pkt {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip4_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_51:3;
+		uint64_t ilk_drp:2;
+		uint64_t reserved_54_63:10;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip4_pkt_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip4_pkt_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_49_63:15;
+		uint64_t ilk:1;
+		uint64_t reserved_41_47:7;
+		uint64_t mii:1;
+		uint64_t reserved_33_39:7;
+		uint64_t agl:1;
+		uint64_t reserved_13_31:19;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_5_7:3;
+		uint64_t agx:5;
+#else
+		uint64_t agx:5;
+		uint64_t reserved_5_7:3;
+		uint64_t gmx_drp:5;
+		uint64_t reserved_13_31:19;
+		uint64_t agl:1;
+		uint64_t reserved_33_39:7;
+		uint64_t mii:1;
+		uint64_t reserved_41_47:7;
+		uint64_t ilk:1;
+		uint64_t reserved_49_63:15;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip4_rml {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip4_rml_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_35:2;
+		uint64_t dpi_dma:1;
+		uint64_t reserved_37_39:3;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip4_rml_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip4_rml_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t trace:4;
+		uint64_t reserved_49_51:3;
+		uint64_t l2c:1;
+		uint64_t reserved_41_47:7;
+		uint64_t dfa:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dpi:1;
+		uint64_t sli:1;
+		uint64_t reserved_31_31:1;
+		uint64_t key:1;
+		uint64_t rad:1;
+		uint64_t tim:1;
+		uint64_t reserved_25_27:3;
+		uint64_t zip:1;
+		uint64_t reserved_17_23:7;
+		uint64_t sso:1;
+		uint64_t reserved_8_15:8;
+		uint64_t pko:1;
+		uint64_t pip:1;
+		uint64_t ipd:1;
+		uint64_t fpa:1;
+		uint64_t reserved_1_3:3;
+		uint64_t iob:1;
+#else
+		uint64_t iob:1;
+		uint64_t reserved_1_3:3;
+		uint64_t fpa:1;
+		uint64_t ipd:1;
+		uint64_t pip:1;
+		uint64_t pko:1;
+		uint64_t reserved_8_15:8;
+		uint64_t sso:1;
+		uint64_t reserved_17_23:7;
+		uint64_t zip:1;
+		uint64_t reserved_25_27:3;
+		uint64_t tim:1;
+		uint64_t rad:1;
+		uint64_t key:1;
+		uint64_t reserved_31_31:1;
+		uint64_t sli:1;
+		uint64_t dpi:1;
+		uint64_t reserved_34_39:6;
+		uint64_t dfa:1;
+		uint64_t reserved_41_47:7;
+		uint64_t l2c:1;
+		uint64_t reserved_49_51:3;
+		uint64_t trace:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip4_wdog {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip4_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wdog:32;
+#else
+		uint64_t wdog:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip4_wdog_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip4_wdog_s cn68xxp1;
+};
+
+union cvmx_ciu2_src_ppx_ip4_wrkq {
+	uint64_t u64;
+	struct cvmx_ciu2_src_ppx_ip4_wrkq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t workq:64;
+#else
+		uint64_t workq:64;
+#endif
+	} s;
+	struct cvmx_ciu2_src_ppx_ip4_wrkq_s cn68xx;
+	struct cvmx_ciu2_src_ppx_ip4_wrkq_s cn68xxp1;
+};
+
+union cvmx_ciu2_sum_iox_int {
+	uint64_t u64;
+	struct cvmx_ciu2_sum_iox_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t mbox:4;
+		uint64_t reserved_8_59:52;
+		uint64_t gpio:1;
+		uint64_t pkt:1;
+		uint64_t mem:1;
+		uint64_t io:1;
+		uint64_t mio:1;
+		uint64_t rml:1;
+		uint64_t wdog:1;
+		uint64_t workq:1;
+#else
+		uint64_t workq:1;
+		uint64_t wdog:1;
+		uint64_t rml:1;
+		uint64_t mio:1;
+		uint64_t io:1;
+		uint64_t mem:1;
+		uint64_t pkt:1;
+		uint64_t gpio:1;
+		uint64_t reserved_8_59:52;
+		uint64_t mbox:4;
+#endif
+	} s;
+	struct cvmx_ciu2_sum_iox_int_s cn68xx;
+	struct cvmx_ciu2_sum_iox_int_s cn68xxp1;
+};
+
+union cvmx_ciu2_sum_ppx_ip2 {
+	uint64_t u64;
+	struct cvmx_ciu2_sum_ppx_ip2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t mbox:4;
+		uint64_t reserved_8_59:52;
+		uint64_t gpio:1;
+		uint64_t pkt:1;
+		uint64_t mem:1;
+		uint64_t io:1;
+		uint64_t mio:1;
+		uint64_t rml:1;
+		uint64_t wdog:1;
+		uint64_t workq:1;
+#else
+		uint64_t workq:1;
+		uint64_t wdog:1;
+		uint64_t rml:1;
+		uint64_t mio:1;
+		uint64_t io:1;
+		uint64_t mem:1;
+		uint64_t pkt:1;
+		uint64_t gpio:1;
+		uint64_t reserved_8_59:52;
+		uint64_t mbox:4;
+#endif
+	} s;
+	struct cvmx_ciu2_sum_ppx_ip2_s cn68xx;
+	struct cvmx_ciu2_sum_ppx_ip2_s cn68xxp1;
+};
+
+union cvmx_ciu2_sum_ppx_ip3 {
+	uint64_t u64;
+	struct cvmx_ciu2_sum_ppx_ip3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t mbox:4;
+		uint64_t reserved_8_59:52;
+		uint64_t gpio:1;
+		uint64_t pkt:1;
+		uint64_t mem:1;
+		uint64_t io:1;
+		uint64_t mio:1;
+		uint64_t rml:1;
+		uint64_t wdog:1;
+		uint64_t workq:1;
+#else
+		uint64_t workq:1;
+		uint64_t wdog:1;
+		uint64_t rml:1;
+		uint64_t mio:1;
+		uint64_t io:1;
+		uint64_t mem:1;
+		uint64_t pkt:1;
+		uint64_t gpio:1;
+		uint64_t reserved_8_59:52;
+		uint64_t mbox:4;
+#endif
+	} s;
+	struct cvmx_ciu2_sum_ppx_ip3_s cn68xx;
+	struct cvmx_ciu2_sum_ppx_ip3_s cn68xxp1;
+};
+
+union cvmx_ciu2_sum_ppx_ip4 {
+	uint64_t u64;
+	struct cvmx_ciu2_sum_ppx_ip4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t mbox:4;
+		uint64_t reserved_8_59:52;
+		uint64_t gpio:1;
+		uint64_t pkt:1;
+		uint64_t mem:1;
+		uint64_t io:1;
+		uint64_t mio:1;
+		uint64_t rml:1;
+		uint64_t wdog:1;
+		uint64_t workq:1;
+#else
+		uint64_t workq:1;
+		uint64_t wdog:1;
+		uint64_t rml:1;
+		uint64_t mio:1;
+		uint64_t io:1;
+		uint64_t mem:1;
+		uint64_t pkt:1;
+		uint64_t gpio:1;
+		uint64_t reserved_8_59:52;
+		uint64_t mbox:4;
+#endif
+	} s;
+	struct cvmx_ciu2_sum_ppx_ip4_s cn68xx;
+	struct cvmx_ciu2_sum_ppx_ip4_s cn68xxp1;
+};
+
+#endif
diff --git a/arch/mips/include/asm/octeon/cvmx-dbg-defs.h b/arch/mips/include/asm/octeon/cvmx-dbg-defs.h
index abbf42d05e5..40799cdae69 100644
--- a/arch/mips/include/asm/octeon/cvmx-dbg-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-dbg-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,27 +28,43 @@
 #ifndef __CVMX_DBG_DEFS_H__
 #define __CVMX_DBG_DEFS_H__
 
-#define CVMX_DBG_DATA \
-	 CVMX_ADD_IO_SEG(0x00011F00000001E8ull)
+#define CVMX_DBG_DATA (CVMX_ADD_IO_SEG(0x00011F00000001E8ull))
 
 union cvmx_dbg_data {
 	uint64_t u64;
 	struct cvmx_dbg_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t c_mul:5;
 		uint64_t dsel_ext:1;
 		uint64_t data:17;
+#else
+		uint64_t data:17;
+		uint64_t dsel_ext:1;
+		uint64_t c_mul:5;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_dbg_data_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t pll_mul:3;
 		uint64_t reserved_23_27:5;
 		uint64_t c_mul:5;
 		uint64_t dsel_ext:1;
 		uint64_t data:17;
+#else
+		uint64_t data:17;
+		uint64_t dsel_ext:1;
+		uint64_t c_mul:5;
+		uint64_t reserved_23_27:5;
+		uint64_t pll_mul:3;
+		uint64_t reserved_31_63:33;
+#endif
 	} cn30xx;
 	struct cvmx_dbg_data_cn30xx cn31xx;
 	struct cvmx_dbg_data_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t d_mul:4;
 		uint64_t dclk_mul2:1;
@@ -56,15 +72,32 @@ union cvmx_dbg_data {
 		uint64_t c_mul:5;
 		uint64_t dsel_ext:1;
 		uint64_t data:17;
+#else
+		uint64_t data:17;
+		uint64_t dsel_ext:1;
+		uint64_t c_mul:5;
+		uint64_t cclk_div2:1;
+		uint64_t dclk_mul2:1;
+		uint64_t d_mul:4;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn38xx;
 	struct cvmx_dbg_data_cn38xx cn38xxp2;
 	struct cvmx_dbg_data_cn30xx cn50xx;
 	struct cvmx_dbg_data_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t rem:6;
 		uint64_t c_mul:5;
 		uint64_t dsel_ext:1;
 		uint64_t data:17;
+#else
+		uint64_t data:17;
+		uint64_t dsel_ext:1;
+		uint64_t c_mul:5;
+		uint64_t rem:6;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn58xx;
 	struct cvmx_dbg_data_cn58xx cn58xxp1;
 };
diff --git a/arch/mips/include/asm/octeon/cvmx-dpi-defs.h b/arch/mips/include/asm/octeon/cvmx-dpi-defs.h
index c34ad04789c..dd5b0428de3 100644
--- a/arch/mips/include/asm/octeon/cvmx-dpi-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-dpi-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2011 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -55,52 +55,107 @@
 #define CVMX_DPI_REQ_ERR_SKIP_COMP (CVMX_ADD_IO_SEG(0x0001DF0000000838ull))
 #define CVMX_DPI_REQ_GBL_EN (CVMX_ADD_IO_SEG(0x0001DF0000000050ull))
 #define CVMX_DPI_SLI_PRTX_CFG(offset) (CVMX_ADD_IO_SEG(0x0001DF0000000900ull) + ((offset) & 3) * 8)
+static inline uint64_t CVMX_DPI_SLI_PRTX_ERR(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001DF0000000920ull) + (offset) * 8;
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+
+		if (OCTEON_IS_MODEL(OCTEON_CN68XX_PASS1))
+			return CVMX_ADD_IO_SEG(0x0001DF0000000928ull) + (offset) * 8;
+
+		if (OCTEON_IS_MODEL(OCTEON_CN68XX_PASS2))
+			return CVMX_ADD_IO_SEG(0x0001DF0000000920ull) + (offset) * 8;
+		return CVMX_ADD_IO_SEG(0x0001DF0000000920ull) + (offset) * 8;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001DF0000000928ull) + (offset) * 8;
+	}
+	return CVMX_ADD_IO_SEG(0x0001DF0000000920ull) + (offset) * 8;
+}
+
 #define CVMX_DPI_SLI_PRTX_ERR_INFO(offset) (CVMX_ADD_IO_SEG(0x0001DF0000000940ull) + ((offset) & 3) * 8)
 
 union cvmx_dpi_bist_status {
 	uint64_t u64;
 	struct cvmx_dpi_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_47_63:17;
 		uint64_t bist:47;
+#else
+		uint64_t bist:47;
+		uint64_t reserved_47_63:17;
+#endif
 	} s;
 	struct cvmx_dpi_bist_status_s cn61xx;
 	struct cvmx_dpi_bist_status_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_45_63:19;
 		uint64_t bist:45;
+#else
+		uint64_t bist:45;
+		uint64_t reserved_45_63:19;
+#endif
 	} cn63xx;
 	struct cvmx_dpi_bist_status_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t bist:37;
+#else
+		uint64_t bist:37;
+		uint64_t reserved_37_63:27;
+#endif
 	} cn63xxp1;
 	struct cvmx_dpi_bist_status_s cn66xx;
 	struct cvmx_dpi_bist_status_cn63xx cn68xx;
 	struct cvmx_dpi_bist_status_cn63xx cn68xxp1;
+	struct cvmx_dpi_bist_status_s cnf71xx;
 };
 
 union cvmx_dpi_ctl {
 	uint64_t u64;
 	struct cvmx_dpi_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t clk:1;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t clk:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_dpi_ctl_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn61xx;
 	struct cvmx_dpi_ctl_s cn63xx;
 	struct cvmx_dpi_ctl_s cn63xxp1;
 	struct cvmx_dpi_ctl_s cn66xx;
 	struct cvmx_dpi_ctl_s cn68xx;
 	struct cvmx_dpi_ctl_s cn68xxp1;
+	struct cvmx_dpi_ctl_cn61xx cnf71xx;
 };
 
 union cvmx_dpi_dmax_counts {
 	uint64_t u64;
 	struct cvmx_dpi_dmax_counts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_39_63:25;
 		uint64_t fcnt:7;
 		uint64_t dbell:32;
+#else
+		uint64_t dbell:32;
+		uint64_t fcnt:7;
+		uint64_t reserved_39_63:25;
+#endif
 	} s;
 	struct cvmx_dpi_dmax_counts_s cn61xx;
 	struct cvmx_dpi_dmax_counts_s cn63xx;
@@ -108,13 +163,19 @@ union cvmx_dpi_dmax_counts {
 	struct cvmx_dpi_dmax_counts_s cn66xx;
 	struct cvmx_dpi_dmax_counts_s cn68xx;
 	struct cvmx_dpi_dmax_counts_s cn68xxp1;
+	struct cvmx_dpi_dmax_counts_s cnf71xx;
 };
 
 union cvmx_dpi_dmax_dbell {
 	uint64_t u64;
 	struct cvmx_dpi_dmax_dbell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t dbell:16;
+#else
+		uint64_t dbell:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_dpi_dmax_dbell_s cn61xx;
 	struct cvmx_dpi_dmax_dbell_s cn63xx;
@@ -122,31 +183,48 @@ union cvmx_dpi_dmax_dbell {
 	struct cvmx_dpi_dmax_dbell_s cn66xx;
 	struct cvmx_dpi_dmax_dbell_s cn68xx;
 	struct cvmx_dpi_dmax_dbell_s cn68xxp1;
+	struct cvmx_dpi_dmax_dbell_s cnf71xx;
 };
 
 union cvmx_dpi_dmax_err_rsp_status {
 	uint64_t u64;
 	struct cvmx_dpi_dmax_err_rsp_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t status:6;
+#else
+		uint64_t status:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_dpi_dmax_err_rsp_status_s cn61xx;
 	struct cvmx_dpi_dmax_err_rsp_status_s cn66xx;
 	struct cvmx_dpi_dmax_err_rsp_status_s cn68xx;
 	struct cvmx_dpi_dmax_err_rsp_status_s cn68xxp1;
+	struct cvmx_dpi_dmax_err_rsp_status_s cnf71xx;
 };
 
 union cvmx_dpi_dmax_ibuff_saddr {
 	uint64_t u64;
 	struct cvmx_dpi_dmax_ibuff_saddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t csize:14;
 		uint64_t reserved_41_47:7;
 		uint64_t idle:1;
 		uint64_t saddr:33;
 		uint64_t reserved_0_6:7;
+#else
+		uint64_t reserved_0_6:7;
+		uint64_t saddr:33;
+		uint64_t idle:1;
+		uint64_t reserved_41_47:7;
+		uint64_t csize:14;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_dpi_dmax_ibuff_saddr_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t csize:14;
 		uint64_t reserved_41_47:7;
@@ -154,47 +232,78 @@ union cvmx_dpi_dmax_ibuff_saddr {
 		uint64_t reserved_36_39:4;
 		uint64_t saddr:29;
 		uint64_t reserved_0_6:7;
+#else
+		uint64_t reserved_0_6:7;
+		uint64_t saddr:29;
+		uint64_t reserved_36_39:4;
+		uint64_t idle:1;
+		uint64_t reserved_41_47:7;
+		uint64_t csize:14;
+		uint64_t reserved_62_63:2;
+#endif
 	} cn61xx;
 	struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn63xx;
 	struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn63xxp1;
 	struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cn66xx;
 	struct cvmx_dpi_dmax_ibuff_saddr_s cn68xx;
 	struct cvmx_dpi_dmax_ibuff_saddr_s cn68xxp1;
+	struct cvmx_dpi_dmax_ibuff_saddr_cn61xx cnf71xx;
 };
 
 union cvmx_dpi_dmax_iflight {
 	uint64_t u64;
 	struct cvmx_dpi_dmax_iflight_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t cnt:3;
+#else
+		uint64_t cnt:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_dpi_dmax_iflight_s cn61xx;
 	struct cvmx_dpi_dmax_iflight_s cn66xx;
 	struct cvmx_dpi_dmax_iflight_s cn68xx;
 	struct cvmx_dpi_dmax_iflight_s cn68xxp1;
+	struct cvmx_dpi_dmax_iflight_s cnf71xx;
 };
 
 union cvmx_dpi_dmax_naddr {
 	uint64_t u64;
 	struct cvmx_dpi_dmax_naddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t addr:40;
+#else
+		uint64_t addr:40;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_dpi_dmax_naddr_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t addr:36;
+#else
+		uint64_t addr:36;
+		uint64_t reserved_36_63:28;
+#endif
 	} cn61xx;
 	struct cvmx_dpi_dmax_naddr_cn61xx cn63xx;
 	struct cvmx_dpi_dmax_naddr_cn61xx cn63xxp1;
 	struct cvmx_dpi_dmax_naddr_cn61xx cn66xx;
 	struct cvmx_dpi_dmax_naddr_s cn68xx;
 	struct cvmx_dpi_dmax_naddr_s cn68xxp1;
+	struct cvmx_dpi_dmax_naddr_cn61xx cnf71xx;
 };
 
 union cvmx_dpi_dmax_reqbnk0 {
 	uint64_t u64;
 	struct cvmx_dpi_dmax_reqbnk0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t state:64;
+#else
+		uint64_t state:64;
+#endif
 	} s;
 	struct cvmx_dpi_dmax_reqbnk0_s cn61xx;
 	struct cvmx_dpi_dmax_reqbnk0_s cn63xx;
@@ -202,12 +311,17 @@ union cvmx_dpi_dmax_reqbnk0 {
 	struct cvmx_dpi_dmax_reqbnk0_s cn66xx;
 	struct cvmx_dpi_dmax_reqbnk0_s cn68xx;
 	struct cvmx_dpi_dmax_reqbnk0_s cn68xxp1;
+	struct cvmx_dpi_dmax_reqbnk0_s cnf71xx;
 };
 
 union cvmx_dpi_dmax_reqbnk1 {
 	uint64_t u64;
 	struct cvmx_dpi_dmax_reqbnk1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t state:64;
+#else
 		uint64_t state:64;
+#endif
 	} s;
 	struct cvmx_dpi_dmax_reqbnk1_s cn61xx;
 	struct cvmx_dpi_dmax_reqbnk1_s cn63xx;
@@ -215,11 +329,13 @@ union cvmx_dpi_dmax_reqbnk1 {
 	struct cvmx_dpi_dmax_reqbnk1_s cn66xx;
 	struct cvmx_dpi_dmax_reqbnk1_s cn68xx;
 	struct cvmx_dpi_dmax_reqbnk1_s cn68xxp1;
+	struct cvmx_dpi_dmax_reqbnk1_s cnf71xx;
 };
 
 union cvmx_dpi_dma_control {
 	uint64_t u64;
 	struct cvmx_dpi_dma_control_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t dici_mode:1;
 		uint64_t pkt_en1:1;
@@ -240,9 +356,32 @@ union cvmx_dpi_dma_control {
 		uint64_t o_es:2;
 		uint64_t o_mode:1;
 		uint64_t reserved_0_13:14;
+#else
+		uint64_t reserved_0_13:14;
+		uint64_t o_mode:1;
+		uint64_t o_es:2;
+		uint64_t o_ns:1;
+		uint64_t o_ro:1;
+		uint64_t o_add1:1;
+		uint64_t fpa_que:3;
+		uint64_t dwb_ichk:9;
+		uint64_t dwb_denb:1;
+		uint64_t b0_lend:1;
+		uint64_t reserved_34_47:14;
+		uint64_t dma_enb:6;
+		uint64_t reserved_54_55:2;
+		uint64_t pkt_en:1;
+		uint64_t pkt_hp:1;
+		uint64_t commit_mode:1;
+		uint64_t ffp_dis:1;
+		uint64_t pkt_en1:1;
+		uint64_t dici_mode:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_dpi_dma_control_s cn61xx;
 	struct cvmx_dpi_dma_control_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t pkt_en1:1;
 		uint64_t ffp_dis:1;
@@ -262,8 +401,30 @@ union cvmx_dpi_dma_control {
 		uint64_t o_es:2;
 		uint64_t o_mode:1;
 		uint64_t reserved_0_13:14;
+#else
+		uint64_t reserved_0_13:14;
+		uint64_t o_mode:1;
+		uint64_t o_es:2;
+		uint64_t o_ns:1;
+		uint64_t o_ro:1;
+		uint64_t o_add1:1;
+		uint64_t fpa_que:3;
+		uint64_t dwb_ichk:9;
+		uint64_t dwb_denb:1;
+		uint64_t b0_lend:1;
+		uint64_t reserved_34_47:14;
+		uint64_t dma_enb:6;
+		uint64_t reserved_54_55:2;
+		uint64_t pkt_en:1;
+		uint64_t pkt_hp:1;
+		uint64_t commit_mode:1;
+		uint64_t ffp_dis:1;
+		uint64_t pkt_en1:1;
+		uint64_t reserved_61_63:3;
+#endif
 	} cn63xx;
 	struct cvmx_dpi_dma_control_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t commit_mode:1;
 		uint64_t pkt_hp:1;
@@ -281,17 +442,42 @@ union cvmx_dpi_dma_control {
 		uint64_t o_es:2;
 		uint64_t o_mode:1;
 		uint64_t reserved_0_13:14;
+#else
+		uint64_t reserved_0_13:14;
+		uint64_t o_mode:1;
+		uint64_t o_es:2;
+		uint64_t o_ns:1;
+		uint64_t o_ro:1;
+		uint64_t o_add1:1;
+		uint64_t fpa_que:3;
+		uint64_t dwb_ichk:9;
+		uint64_t dwb_denb:1;
+		uint64_t b0_lend:1;
+		uint64_t reserved_34_47:14;
+		uint64_t dma_enb:6;
+		uint64_t reserved_54_55:2;
+		uint64_t pkt_en:1;
+		uint64_t pkt_hp:1;
+		uint64_t commit_mode:1;
+		uint64_t reserved_59_63:5;
+#endif
 	} cn63xxp1;
 	struct cvmx_dpi_dma_control_cn63xx cn66xx;
 	struct cvmx_dpi_dma_control_s cn68xx;
 	struct cvmx_dpi_dma_control_cn63xx cn68xxp1;
+	struct cvmx_dpi_dma_control_s cnf71xx;
 };
 
 union cvmx_dpi_dma_engx_en {
 	uint64_t u64;
 	struct cvmx_dpi_dma_engx_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t qen:8;
+#else
+		uint64_t qen:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_dpi_dma_engx_en_s cn61xx;
 	struct cvmx_dpi_dma_engx_en_s cn63xx;
@@ -299,63 +485,101 @@ union cvmx_dpi_dma_engx_en {
 	struct cvmx_dpi_dma_engx_en_s cn66xx;
 	struct cvmx_dpi_dma_engx_en_s cn68xx;
 	struct cvmx_dpi_dma_engx_en_s cn68xxp1;
+	struct cvmx_dpi_dma_engx_en_s cnf71xx;
 };
 
 union cvmx_dpi_dma_ppx_cnt {
 	uint64_t u64;
 	struct cvmx_dpi_dma_ppx_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt:16;
+#else
+		uint64_t cnt:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_dpi_dma_ppx_cnt_s cn61xx;
 	struct cvmx_dpi_dma_ppx_cnt_s cn68xx;
+	struct cvmx_dpi_dma_ppx_cnt_s cnf71xx;
 };
 
 union cvmx_dpi_engx_buf {
 	uint64_t u64;
 	struct cvmx_dpi_engx_buf_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t compblks:5;
 		uint64_t reserved_9_31:23;
 		uint64_t base:5;
 		uint64_t blks:4;
+#else
+		uint64_t blks:4;
+		uint64_t base:5;
+		uint64_t reserved_9_31:23;
+		uint64_t compblks:5;
+		uint64_t reserved_37_63:27;
+#endif
 	} s;
 	struct cvmx_dpi_engx_buf_s cn61xx;
 	struct cvmx_dpi_engx_buf_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t base:4;
 		uint64_t blks:4;
+#else
+		uint64_t blks:4;
+		uint64_t base:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} cn63xx;
 	struct cvmx_dpi_engx_buf_cn63xx cn63xxp1;
 	struct cvmx_dpi_engx_buf_s cn66xx;
 	struct cvmx_dpi_engx_buf_s cn68xx;
 	struct cvmx_dpi_engx_buf_s cn68xxp1;
+	struct cvmx_dpi_engx_buf_s cnf71xx;
 };
 
 union cvmx_dpi_info_reg {
 	uint64_t u64;
 	struct cvmx_dpi_info_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ffp:4;
 		uint64_t reserved_2_3:2;
 		uint64_t ncb:1;
 		uint64_t rsl:1;
+#else
+		uint64_t rsl:1;
+		uint64_t ncb:1;
+		uint64_t reserved_2_3:2;
+		uint64_t ffp:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_dpi_info_reg_s cn61xx;
 	struct cvmx_dpi_info_reg_s cn63xx;
 	struct cvmx_dpi_info_reg_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t ncb:1;
 		uint64_t rsl:1;
+#else
+		uint64_t rsl:1;
+		uint64_t ncb:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn63xxp1;
 	struct cvmx_dpi_info_reg_s cn66xx;
 	struct cvmx_dpi_info_reg_s cn68xx;
 	struct cvmx_dpi_info_reg_s cn68xxp1;
+	struct cvmx_dpi_info_reg_s cnf71xx;
 };
 
 union cvmx_dpi_int_en {
 	uint64_t u64;
 	struct cvmx_dpi_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t sprt3_rst:1;
 		uint64_t sprt2_rst:1;
@@ -373,9 +597,29 @@ union cvmx_dpi_int_en {
 		uint64_t reserved_2_7:6;
 		uint64_t nfovr:1;
 		uint64_t nderr:1;
+#else
+		uint64_t nderr:1;
+		uint64_t nfovr:1;
+		uint64_t reserved_2_7:6;
+		uint64_t dmadbo:8;
+		uint64_t req_badadr:1;
+		uint64_t req_badlen:1;
+		uint64_t req_ovrflw:1;
+		uint64_t req_undflw:1;
+		uint64_t req_anull:1;
+		uint64_t req_inull:1;
+		uint64_t req_badfil:1;
+		uint64_t reserved_23_23:1;
+		uint64_t sprt0_rst:1;
+		uint64_t sprt1_rst:1;
+		uint64_t sprt2_rst:1;
+		uint64_t sprt3_rst:1;
+		uint64_t reserved_28_63:36;
+#endif
 	} s;
 	struct cvmx_dpi_int_en_s cn61xx;
 	struct cvmx_dpi_int_en_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_26_63:38;
 		uint64_t sprt1_rst:1;
 		uint64_t sprt0_rst:1;
@@ -391,16 +635,35 @@ union cvmx_dpi_int_en {
 		uint64_t reserved_2_7:6;
 		uint64_t nfovr:1;
 		uint64_t nderr:1;
+#else
+		uint64_t nderr:1;
+		uint64_t nfovr:1;
+		uint64_t reserved_2_7:6;
+		uint64_t dmadbo:8;
+		uint64_t req_badadr:1;
+		uint64_t req_badlen:1;
+		uint64_t req_ovrflw:1;
+		uint64_t req_undflw:1;
+		uint64_t req_anull:1;
+		uint64_t req_inull:1;
+		uint64_t req_badfil:1;
+		uint64_t reserved_23_23:1;
+		uint64_t sprt0_rst:1;
+		uint64_t sprt1_rst:1;
+		uint64_t reserved_26_63:38;
+#endif
 	} cn63xx;
 	struct cvmx_dpi_int_en_cn63xx cn63xxp1;
 	struct cvmx_dpi_int_en_s cn66xx;
 	struct cvmx_dpi_int_en_cn63xx cn68xx;
 	struct cvmx_dpi_int_en_cn63xx cn68xxp1;
+	struct cvmx_dpi_int_en_s cnf71xx;
 };
 
 union cvmx_dpi_int_reg {
 	uint64_t u64;
 	struct cvmx_dpi_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t sprt3_rst:1;
 		uint64_t sprt2_rst:1;
@@ -418,9 +681,29 @@ union cvmx_dpi_int_reg {
 		uint64_t reserved_2_7:6;
 		uint64_t nfovr:1;
 		uint64_t nderr:1;
+#else
+		uint64_t nderr:1;
+		uint64_t nfovr:1;
+		uint64_t reserved_2_7:6;
+		uint64_t dmadbo:8;
+		uint64_t req_badadr:1;
+		uint64_t req_badlen:1;
+		uint64_t req_ovrflw:1;
+		uint64_t req_undflw:1;
+		uint64_t req_anull:1;
+		uint64_t req_inull:1;
+		uint64_t req_badfil:1;
+		uint64_t reserved_23_23:1;
+		uint64_t sprt0_rst:1;
+		uint64_t sprt1_rst:1;
+		uint64_t sprt2_rst:1;
+		uint64_t sprt3_rst:1;
+		uint64_t reserved_28_63:36;
+#endif
 	} s;
 	struct cvmx_dpi_int_reg_s cn61xx;
 	struct cvmx_dpi_int_reg_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_26_63:38;
 		uint64_t sprt1_rst:1;
 		uint64_t sprt0_rst:1;
@@ -436,31 +719,62 @@ union cvmx_dpi_int_reg {
 		uint64_t reserved_2_7:6;
 		uint64_t nfovr:1;
 		uint64_t nderr:1;
+#else
+		uint64_t nderr:1;
+		uint64_t nfovr:1;
+		uint64_t reserved_2_7:6;
+		uint64_t dmadbo:8;
+		uint64_t req_badadr:1;
+		uint64_t req_badlen:1;
+		uint64_t req_ovrflw:1;
+		uint64_t req_undflw:1;
+		uint64_t req_anull:1;
+		uint64_t req_inull:1;
+		uint64_t req_badfil:1;
+		uint64_t reserved_23_23:1;
+		uint64_t sprt0_rst:1;
+		uint64_t sprt1_rst:1;
+		uint64_t reserved_26_63:38;
+#endif
 	} cn63xx;
 	struct cvmx_dpi_int_reg_cn63xx cn63xxp1;
 	struct cvmx_dpi_int_reg_s cn66xx;
 	struct cvmx_dpi_int_reg_cn63xx cn68xx;
 	struct cvmx_dpi_int_reg_cn63xx cn68xxp1;
+	struct cvmx_dpi_int_reg_s cnf71xx;
 };
 
 union cvmx_dpi_ncbx_cfg {
 	uint64_t u64;
 	struct cvmx_dpi_ncbx_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t molr:6;
+#else
+		uint64_t molr:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_dpi_ncbx_cfg_s cn61xx;
 	struct cvmx_dpi_ncbx_cfg_s cn66xx;
 	struct cvmx_dpi_ncbx_cfg_s cn68xx;
+	struct cvmx_dpi_ncbx_cfg_s cnf71xx;
 };
 
 union cvmx_dpi_pint_info {
 	uint64_t u64;
 	struct cvmx_dpi_pint_info_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t iinfo:6;
 		uint64_t reserved_6_7:2;
 		uint64_t sinfo:6;
+#else
+		uint64_t sinfo:6;
+		uint64_t reserved_6_7:2;
+		uint64_t iinfo:6;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_dpi_pint_info_s cn61xx;
 	struct cvmx_dpi_pint_info_s cn63xx;
@@ -468,13 +782,19 @@ union cvmx_dpi_pint_info {
 	struct cvmx_dpi_pint_info_s cn66xx;
 	struct cvmx_dpi_pint_info_s cn68xx;
 	struct cvmx_dpi_pint_info_s cn68xxp1;
+	struct cvmx_dpi_pint_info_s cnf71xx;
 };
 
 union cvmx_dpi_pkt_err_rsp {
 	uint64_t u64;
 	struct cvmx_dpi_pkt_err_rsp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t pkterr:1;
+#else
+		uint64_t pkterr:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_dpi_pkt_err_rsp_s cn61xx;
 	struct cvmx_dpi_pkt_err_rsp_s cn63xx;
@@ -482,13 +802,19 @@ union cvmx_dpi_pkt_err_rsp {
 	struct cvmx_dpi_pkt_err_rsp_s cn66xx;
 	struct cvmx_dpi_pkt_err_rsp_s cn68xx;
 	struct cvmx_dpi_pkt_err_rsp_s cn68xxp1;
+	struct cvmx_dpi_pkt_err_rsp_s cnf71xx;
 };
 
 union cvmx_dpi_req_err_rsp {
 	uint64_t u64;
 	struct cvmx_dpi_req_err_rsp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t qerr:8;
+#else
+		uint64_t qerr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_dpi_req_err_rsp_s cn61xx;
 	struct cvmx_dpi_req_err_rsp_s cn63xx;
@@ -496,13 +822,19 @@ union cvmx_dpi_req_err_rsp {
 	struct cvmx_dpi_req_err_rsp_s cn66xx;
 	struct cvmx_dpi_req_err_rsp_s cn68xx;
 	struct cvmx_dpi_req_err_rsp_s cn68xxp1;
+	struct cvmx_dpi_req_err_rsp_s cnf71xx;
 };
 
 union cvmx_dpi_req_err_rsp_en {
 	uint64_t u64;
 	struct cvmx_dpi_req_err_rsp_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t en:8;
+#else
+		uint64_t en:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_dpi_req_err_rsp_en_s cn61xx;
 	struct cvmx_dpi_req_err_rsp_en_s cn63xx;
@@ -510,13 +842,19 @@ union cvmx_dpi_req_err_rsp_en {
 	struct cvmx_dpi_req_err_rsp_en_s cn66xx;
 	struct cvmx_dpi_req_err_rsp_en_s cn68xx;
 	struct cvmx_dpi_req_err_rsp_en_s cn68xxp1;
+	struct cvmx_dpi_req_err_rsp_en_s cnf71xx;
 };
 
 union cvmx_dpi_req_err_rst {
 	uint64_t u64;
 	struct cvmx_dpi_req_err_rst_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t qerr:8;
+#else
+		uint64_t qerr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_dpi_req_err_rst_s cn61xx;
 	struct cvmx_dpi_req_err_rst_s cn63xx;
@@ -524,13 +862,19 @@ union cvmx_dpi_req_err_rst {
 	struct cvmx_dpi_req_err_rst_s cn66xx;
 	struct cvmx_dpi_req_err_rst_s cn68xx;
 	struct cvmx_dpi_req_err_rst_s cn68xxp1;
+	struct cvmx_dpi_req_err_rst_s cnf71xx;
 };
 
 union cvmx_dpi_req_err_rst_en {
 	uint64_t u64;
 	struct cvmx_dpi_req_err_rst_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t en:8;
+#else
+		uint64_t en:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_dpi_req_err_rst_en_s cn61xx;
 	struct cvmx_dpi_req_err_rst_en_s cn63xx;
@@ -538,27 +882,41 @@ union cvmx_dpi_req_err_rst_en {
 	struct cvmx_dpi_req_err_rst_en_s cn66xx;
 	struct cvmx_dpi_req_err_rst_en_s cn68xx;
 	struct cvmx_dpi_req_err_rst_en_s cn68xxp1;
+	struct cvmx_dpi_req_err_rst_en_s cnf71xx;
 };
 
 union cvmx_dpi_req_err_skip_comp {
 	uint64_t u64;
 	struct cvmx_dpi_req_err_skip_comp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t en_rst:8;
 		uint64_t reserved_8_15:8;
 		uint64_t en_rsp:8;
+#else
+		uint64_t en_rsp:8;
+		uint64_t reserved_8_15:8;
+		uint64_t en_rst:8;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_dpi_req_err_skip_comp_s cn61xx;
 	struct cvmx_dpi_req_err_skip_comp_s cn66xx;
 	struct cvmx_dpi_req_err_skip_comp_s cn68xx;
 	struct cvmx_dpi_req_err_skip_comp_s cn68xxp1;
+	struct cvmx_dpi_req_err_skip_comp_s cnf71xx;
 };
 
 union cvmx_dpi_req_gbl_en {
 	uint64_t u64;
 	struct cvmx_dpi_req_gbl_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t qen:8;
+#else
+		uint64_t qen:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_dpi_req_gbl_en_s cn61xx;
 	struct cvmx_dpi_req_gbl_en_s cn63xx;
@@ -566,11 +924,13 @@ union cvmx_dpi_req_gbl_en {
 	struct cvmx_dpi_req_gbl_en_s cn66xx;
 	struct cvmx_dpi_req_gbl_en_s cn68xx;
 	struct cvmx_dpi_req_gbl_en_s cn68xxp1;
+	struct cvmx_dpi_req_gbl_en_s cnf71xx;
 };
 
 union cvmx_dpi_sli_prtx_cfg {
 	uint64_t u64;
 	struct cvmx_dpi_sli_prtx_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t halt:1;
 		uint64_t qlm_cfg:4;
@@ -584,9 +944,25 @@ union cvmx_dpi_sli_prtx_cfg {
 		uint64_t mrrs_lim:1;
 		uint64_t reserved_2_2:1;
 		uint64_t mrrs:2;
+#else
+		uint64_t mrrs:2;
+		uint64_t reserved_2_2:1;
+		uint64_t mrrs_lim:1;
+		uint64_t mps:1;
+		uint64_t reserved_5_6:2;
+		uint64_t mps_lim:1;
+		uint64_t molr:6;
+		uint64_t reserved_14_15:2;
+		uint64_t rd_mode:1;
+		uint64_t reserved_17_19:3;
+		uint64_t qlm_cfg:4;
+		uint64_t halt:1;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_dpi_sli_prtx_cfg_s cn61xx;
 	struct cvmx_dpi_sli_prtx_cfg_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t halt:1;
 		uint64_t reserved_21_23:3;
@@ -601,18 +977,40 @@ union cvmx_dpi_sli_prtx_cfg {
 		uint64_t mrrs_lim:1;
 		uint64_t reserved_2_2:1;
 		uint64_t mrrs:2;
+#else
+		uint64_t mrrs:2;
+		uint64_t reserved_2_2:1;
+		uint64_t mrrs_lim:1;
+		uint64_t mps:1;
+		uint64_t reserved_5_6:2;
+		uint64_t mps_lim:1;
+		uint64_t molr:6;
+		uint64_t reserved_14_15:2;
+		uint64_t rd_mode:1;
+		uint64_t reserved_17_19:3;
+		uint64_t qlm_cfg:1;
+		uint64_t reserved_21_23:3;
+		uint64_t halt:1;
+		uint64_t reserved_25_63:39;
+#endif
 	} cn63xx;
 	struct cvmx_dpi_sli_prtx_cfg_cn63xx cn63xxp1;
 	struct cvmx_dpi_sli_prtx_cfg_s cn66xx;
 	struct cvmx_dpi_sli_prtx_cfg_cn63xx cn68xx;
 	struct cvmx_dpi_sli_prtx_cfg_cn63xx cn68xxp1;
+	struct cvmx_dpi_sli_prtx_cfg_s cnf71xx;
 };
 
 union cvmx_dpi_sli_prtx_err {
 	uint64_t u64;
 	struct cvmx_dpi_sli_prtx_err_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:61;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t addr:61;
+#endif
 	} s;
 	struct cvmx_dpi_sli_prtx_err_s cn61xx;
 	struct cvmx_dpi_sli_prtx_err_s cn63xx;
@@ -620,17 +1018,27 @@ union cvmx_dpi_sli_prtx_err {
 	struct cvmx_dpi_sli_prtx_err_s cn66xx;
 	struct cvmx_dpi_sli_prtx_err_s cn68xx;
 	struct cvmx_dpi_sli_prtx_err_s cn68xxp1;
+	struct cvmx_dpi_sli_prtx_err_s cnf71xx;
 };
 
 union cvmx_dpi_sli_prtx_err_info {
 	uint64_t u64;
 	struct cvmx_dpi_sli_prtx_err_info_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t lock:1;
 		uint64_t reserved_5_7:3;
 		uint64_t type:1;
 		uint64_t reserved_3_3:1;
 		uint64_t reqq:3;
+#else
+		uint64_t reqq:3;
+		uint64_t reserved_3_3:1;
+		uint64_t type:1;
+		uint64_t reserved_5_7:3;
+		uint64_t lock:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_dpi_sli_prtx_err_info_s cn61xx;
 	struct cvmx_dpi_sli_prtx_err_info_s cn63xx;
@@ -638,6 +1046,7 @@ union cvmx_dpi_sli_prtx_err_info {
 	struct cvmx_dpi_sli_prtx_err_info_s cn66xx;
 	struct cvmx_dpi_sli_prtx_err_info_s cn68xx;
 	struct cvmx_dpi_sli_prtx_err_info_s cn68xxp1;
+	struct cvmx_dpi_sli_prtx_err_info_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-fpa-defs.h b/arch/mips/include/asm/octeon/cvmx-fpa-defs.h
index bf5546b9011..1d79e3c7040 100644
--- a/arch/mips/include/asm/octeon/cvmx-fpa-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-fpa-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,74 +28,83 @@
 #ifndef __CVMX_FPA_DEFS_H__
 #define __CVMX_FPA_DEFS_H__
 
-#define CVMX_FPA_BIST_STATUS \
-	 CVMX_ADD_IO_SEG(0x00011800280000E8ull)
-#define CVMX_FPA_CTL_STATUS \
-	 CVMX_ADD_IO_SEG(0x0001180028000050ull)
-#define CVMX_FPA_FPF0_MARKS \
-	 CVMX_ADD_IO_SEG(0x0001180028000000ull)
-#define CVMX_FPA_FPF0_SIZE \
-	 CVMX_ADD_IO_SEG(0x0001180028000058ull)
-#define CVMX_FPA_FPF1_MARKS \
-	 CVMX_ADD_IO_SEG(0x0001180028000008ull)
-#define CVMX_FPA_FPF2_MARKS \
-	 CVMX_ADD_IO_SEG(0x0001180028000010ull)
-#define CVMX_FPA_FPF3_MARKS \
-	 CVMX_ADD_IO_SEG(0x0001180028000018ull)
-#define CVMX_FPA_FPF4_MARKS \
-	 CVMX_ADD_IO_SEG(0x0001180028000020ull)
-#define CVMX_FPA_FPF5_MARKS \
-	 CVMX_ADD_IO_SEG(0x0001180028000028ull)
-#define CVMX_FPA_FPF6_MARKS \
-	 CVMX_ADD_IO_SEG(0x0001180028000030ull)
-#define CVMX_FPA_FPF7_MARKS \
-	 CVMX_ADD_IO_SEG(0x0001180028000038ull)
-#define CVMX_FPA_FPFX_MARKS(offset) \
-	 CVMX_ADD_IO_SEG(0x0001180028000008ull + (((offset) & 7) * 8) - 8 * 1)
-#define CVMX_FPA_FPFX_SIZE(offset) \
-	 CVMX_ADD_IO_SEG(0x0001180028000060ull + (((offset) & 7) * 8) - 8 * 1)
-#define CVMX_FPA_INT_ENB \
-	 CVMX_ADD_IO_SEG(0x0001180028000048ull)
-#define CVMX_FPA_INT_SUM \
-	 CVMX_ADD_IO_SEG(0x0001180028000040ull)
-#define CVMX_FPA_QUE0_PAGE_INDEX \
-	 CVMX_ADD_IO_SEG(0x00011800280000F0ull)
-#define CVMX_FPA_QUE1_PAGE_INDEX \
-	 CVMX_ADD_IO_SEG(0x00011800280000F8ull)
-#define CVMX_FPA_QUE2_PAGE_INDEX \
-	 CVMX_ADD_IO_SEG(0x0001180028000100ull)
-#define CVMX_FPA_QUE3_PAGE_INDEX \
-	 CVMX_ADD_IO_SEG(0x0001180028000108ull)
-#define CVMX_FPA_QUE4_PAGE_INDEX \
-	 CVMX_ADD_IO_SEG(0x0001180028000110ull)
-#define CVMX_FPA_QUE5_PAGE_INDEX \
-	 CVMX_ADD_IO_SEG(0x0001180028000118ull)
-#define CVMX_FPA_QUE6_PAGE_INDEX \
-	 CVMX_ADD_IO_SEG(0x0001180028000120ull)
-#define CVMX_FPA_QUE7_PAGE_INDEX \
-	 CVMX_ADD_IO_SEG(0x0001180028000128ull)
-#define CVMX_FPA_QUEX_AVAILABLE(offset) \
-	 CVMX_ADD_IO_SEG(0x0001180028000098ull + (((offset) & 7) * 8))
-#define CVMX_FPA_QUEX_PAGE_INDEX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800280000F0ull + (((offset) & 7) * 8))
-#define CVMX_FPA_QUE_ACT \
-	 CVMX_ADD_IO_SEG(0x0001180028000138ull)
-#define CVMX_FPA_QUE_EXP \
-	 CVMX_ADD_IO_SEG(0x0001180028000130ull)
-#define CVMX_FPA_WART_CTL \
-	 CVMX_ADD_IO_SEG(0x00011800280000D8ull)
-#define CVMX_FPA_WART_STATUS \
-	 CVMX_ADD_IO_SEG(0x00011800280000E0ull)
+#define CVMX_FPA_ADDR_RANGE_ERROR (CVMX_ADD_IO_SEG(0x0001180028000458ull))
+#define CVMX_FPA_BIST_STATUS (CVMX_ADD_IO_SEG(0x00011800280000E8ull))
+#define CVMX_FPA_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180028000050ull))
+#define CVMX_FPA_FPF0_MARKS (CVMX_ADD_IO_SEG(0x0001180028000000ull))
+#define CVMX_FPA_FPF0_SIZE (CVMX_ADD_IO_SEG(0x0001180028000058ull))
+#define CVMX_FPA_FPF1_MARKS CVMX_FPA_FPFX_MARKS(1)
+#define CVMX_FPA_FPF2_MARKS CVMX_FPA_FPFX_MARKS(2)
+#define CVMX_FPA_FPF3_MARKS CVMX_FPA_FPFX_MARKS(3)
+#define CVMX_FPA_FPF4_MARKS CVMX_FPA_FPFX_MARKS(4)
+#define CVMX_FPA_FPF5_MARKS CVMX_FPA_FPFX_MARKS(5)
+#define CVMX_FPA_FPF6_MARKS CVMX_FPA_FPFX_MARKS(6)
+#define CVMX_FPA_FPF7_MARKS CVMX_FPA_FPFX_MARKS(7)
+#define CVMX_FPA_FPF8_MARKS (CVMX_ADD_IO_SEG(0x0001180028000240ull))
+#define CVMX_FPA_FPF8_SIZE (CVMX_ADD_IO_SEG(0x0001180028000248ull))
+#define CVMX_FPA_FPFX_MARKS(offset) (CVMX_ADD_IO_SEG(0x0001180028000008ull) + ((offset) & 7) * 8 - 8*1)
+#define CVMX_FPA_FPFX_SIZE(offset) (CVMX_ADD_IO_SEG(0x0001180028000060ull) + ((offset) & 7) * 8 - 8*1)
+#define CVMX_FPA_INT_ENB (CVMX_ADD_IO_SEG(0x0001180028000048ull))
+#define CVMX_FPA_INT_SUM (CVMX_ADD_IO_SEG(0x0001180028000040ull))
+#define CVMX_FPA_PACKET_THRESHOLD (CVMX_ADD_IO_SEG(0x0001180028000460ull))
+#define CVMX_FPA_POOLX_END_ADDR(offset) (CVMX_ADD_IO_SEG(0x0001180028000358ull) + ((offset) & 15) * 8)
+#define CVMX_FPA_POOLX_START_ADDR(offset) (CVMX_ADD_IO_SEG(0x0001180028000258ull) + ((offset) & 15) * 8)
+#define CVMX_FPA_POOLX_THRESHOLD(offset) (CVMX_ADD_IO_SEG(0x0001180028000140ull) + ((offset) & 15) * 8)
+#define CVMX_FPA_QUE0_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(0)
+#define CVMX_FPA_QUE1_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(1)
+#define CVMX_FPA_QUE2_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(2)
+#define CVMX_FPA_QUE3_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(3)
+#define CVMX_FPA_QUE4_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(4)
+#define CVMX_FPA_QUE5_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(5)
+#define CVMX_FPA_QUE6_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(6)
+#define CVMX_FPA_QUE7_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(7)
+#define CVMX_FPA_QUE8_PAGE_INDEX (CVMX_ADD_IO_SEG(0x0001180028000250ull))
+#define CVMX_FPA_QUEX_AVAILABLE(offset) (CVMX_ADD_IO_SEG(0x0001180028000098ull) + ((offset) & 15) * 8)
+#define CVMX_FPA_QUEX_PAGE_INDEX(offset) (CVMX_ADD_IO_SEG(0x00011800280000F0ull) + ((offset) & 7) * 8)
+#define CVMX_FPA_QUE_ACT (CVMX_ADD_IO_SEG(0x0001180028000138ull))
+#define CVMX_FPA_QUE_EXP (CVMX_ADD_IO_SEG(0x0001180028000130ull))
+#define CVMX_FPA_WART_CTL (CVMX_ADD_IO_SEG(0x00011800280000D8ull))
+#define CVMX_FPA_WART_STATUS (CVMX_ADD_IO_SEG(0x00011800280000E0ull))
+#define CVMX_FPA_WQE_THRESHOLD (CVMX_ADD_IO_SEG(0x0001180028000468ull))
+
+union cvmx_fpa_addr_range_error {
+	uint64_t u64;
+	struct cvmx_fpa_addr_range_error_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_38_63:26;
+		uint64_t pool:5;
+		uint64_t addr:33;
+#else
+		uint64_t addr:33;
+		uint64_t pool:5;
+		uint64_t reserved_38_63:26;
+#endif
+	} s;
+	struct cvmx_fpa_addr_range_error_s cn61xx;
+	struct cvmx_fpa_addr_range_error_s cn66xx;
+	struct cvmx_fpa_addr_range_error_s cn68xx;
+	struct cvmx_fpa_addr_range_error_s cn68xxp1;
+	struct cvmx_fpa_addr_range_error_s cnf71xx;
+};
 
 union cvmx_fpa_bist_status {
 	uint64_t u64;
 	struct cvmx_fpa_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t frd:1;
 		uint64_t fpf0:1;
 		uint64_t fpf1:1;
 		uint64_t ffr:1;
 		uint64_t fdr:1;
+#else
+		uint64_t fdr:1;
+		uint64_t ffr:1;
+		uint64_t fpf1:1;
+		uint64_t fpf0:1;
+		uint64_t frd:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_fpa_bist_status_s cn30xx;
 	struct cvmx_fpa_bist_status_s cn31xx;
@@ -108,38 +117,92 @@ union cvmx_fpa_bist_status {
 	struct cvmx_fpa_bist_status_s cn56xxp1;
 	struct cvmx_fpa_bist_status_s cn58xx;
 	struct cvmx_fpa_bist_status_s cn58xxp1;
+	struct cvmx_fpa_bist_status_s cn61xx;
+	struct cvmx_fpa_bist_status_s cn63xx;
+	struct cvmx_fpa_bist_status_s cn63xxp1;
+	struct cvmx_fpa_bist_status_s cn66xx;
+	struct cvmx_fpa_bist_status_s cn68xx;
+	struct cvmx_fpa_bist_status_s cn68xxp1;
+	struct cvmx_fpa_bist_status_s cnf71xx;
 };
 
 union cvmx_fpa_ctl_status {
 	uint64_t u64;
 	struct cvmx_fpa_ctl_status_s {
-		uint64_t reserved_18_63:46;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_21_63:43;
+		uint64_t free_en:1;
+		uint64_t ret_off:1;
+		uint64_t req_off:1;
 		uint64_t reset:1;
 		uint64_t use_ldt:1;
 		uint64_t use_stt:1;
 		uint64_t enb:1;
 		uint64_t mem1_err:7;
 		uint64_t mem0_err:7;
+#else
+		uint64_t mem0_err:7;
+		uint64_t mem1_err:7;
+		uint64_t enb:1;
+		uint64_t use_stt:1;
+		uint64_t use_ldt:1;
+		uint64_t reset:1;
+		uint64_t req_off:1;
+		uint64_t ret_off:1;
+		uint64_t free_en:1;
+		uint64_t reserved_21_63:43;
+#endif
 	} s;
-	struct cvmx_fpa_ctl_status_s cn30xx;
-	struct cvmx_fpa_ctl_status_s cn31xx;
-	struct cvmx_fpa_ctl_status_s cn38xx;
-	struct cvmx_fpa_ctl_status_s cn38xxp2;
-	struct cvmx_fpa_ctl_status_s cn50xx;
-	struct cvmx_fpa_ctl_status_s cn52xx;
-	struct cvmx_fpa_ctl_status_s cn52xxp1;
-	struct cvmx_fpa_ctl_status_s cn56xx;
-	struct cvmx_fpa_ctl_status_s cn56xxp1;
-	struct cvmx_fpa_ctl_status_s cn58xx;
-	struct cvmx_fpa_ctl_status_s cn58xxp1;
+	struct cvmx_fpa_ctl_status_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_18_63:46;
+		uint64_t reset:1;
+		uint64_t use_ldt:1;
+		uint64_t use_stt:1;
+		uint64_t enb:1;
+		uint64_t mem1_err:7;
+		uint64_t mem0_err:7;
+#else
+		uint64_t mem0_err:7;
+		uint64_t mem1_err:7;
+		uint64_t enb:1;
+		uint64_t use_stt:1;
+		uint64_t use_ldt:1;
+		uint64_t reset:1;
+		uint64_t reserved_18_63:46;
+#endif
+	} cn30xx;
+	struct cvmx_fpa_ctl_status_cn30xx cn31xx;
+	struct cvmx_fpa_ctl_status_cn30xx cn38xx;
+	struct cvmx_fpa_ctl_status_cn30xx cn38xxp2;
+	struct cvmx_fpa_ctl_status_cn30xx cn50xx;
+	struct cvmx_fpa_ctl_status_cn30xx cn52xx;
+	struct cvmx_fpa_ctl_status_cn30xx cn52xxp1;
+	struct cvmx_fpa_ctl_status_cn30xx cn56xx;
+	struct cvmx_fpa_ctl_status_cn30xx cn56xxp1;
+	struct cvmx_fpa_ctl_status_cn30xx cn58xx;
+	struct cvmx_fpa_ctl_status_cn30xx cn58xxp1;
+	struct cvmx_fpa_ctl_status_s cn61xx;
+	struct cvmx_fpa_ctl_status_s cn63xx;
+	struct cvmx_fpa_ctl_status_cn30xx cn63xxp1;
+	struct cvmx_fpa_ctl_status_s cn66xx;
+	struct cvmx_fpa_ctl_status_s cn68xx;
+	struct cvmx_fpa_ctl_status_s cn68xxp1;
+	struct cvmx_fpa_ctl_status_s cnf71xx;
 };
 
 union cvmx_fpa_fpfx_marks {
 	uint64_t u64;
 	struct cvmx_fpa_fpfx_marks_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_22_63:42;
 		uint64_t fpf_wr:11;
 		uint64_t fpf_rd:11;
+#else
+		uint64_t fpf_rd:11;
+		uint64_t fpf_wr:11;
+		uint64_t reserved_22_63:42;
+#endif
 	} s;
 	struct cvmx_fpa_fpfx_marks_s cn38xx;
 	struct cvmx_fpa_fpfx_marks_s cn38xxp2;
@@ -147,13 +210,25 @@ union cvmx_fpa_fpfx_marks {
 	struct cvmx_fpa_fpfx_marks_s cn56xxp1;
 	struct cvmx_fpa_fpfx_marks_s cn58xx;
 	struct cvmx_fpa_fpfx_marks_s cn58xxp1;
+	struct cvmx_fpa_fpfx_marks_s cn61xx;
+	struct cvmx_fpa_fpfx_marks_s cn63xx;
+	struct cvmx_fpa_fpfx_marks_s cn63xxp1;
+	struct cvmx_fpa_fpfx_marks_s cn66xx;
+	struct cvmx_fpa_fpfx_marks_s cn68xx;
+	struct cvmx_fpa_fpfx_marks_s cn68xxp1;
+	struct cvmx_fpa_fpfx_marks_s cnf71xx;
 };
 
 union cvmx_fpa_fpfx_size {
 	uint64_t u64;
 	struct cvmx_fpa_fpfx_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t fpf_siz:11;
+#else
+		uint64_t fpf_siz:11;
+		uint64_t reserved_11_63:53;
+#endif
 	} s;
 	struct cvmx_fpa_fpfx_size_s cn38xx;
 	struct cvmx_fpa_fpfx_size_s cn38xxp2;
@@ -161,14 +236,27 @@ union cvmx_fpa_fpfx_size {
 	struct cvmx_fpa_fpfx_size_s cn56xxp1;
 	struct cvmx_fpa_fpfx_size_s cn58xx;
 	struct cvmx_fpa_fpfx_size_s cn58xxp1;
+	struct cvmx_fpa_fpfx_size_s cn61xx;
+	struct cvmx_fpa_fpfx_size_s cn63xx;
+	struct cvmx_fpa_fpfx_size_s cn63xxp1;
+	struct cvmx_fpa_fpfx_size_s cn66xx;
+	struct cvmx_fpa_fpfx_size_s cn68xx;
+	struct cvmx_fpa_fpfx_size_s cn68xxp1;
+	struct cvmx_fpa_fpfx_size_s cnf71xx;
 };
 
 union cvmx_fpa_fpf0_marks {
 	uint64_t u64;
 	struct cvmx_fpa_fpf0_marks_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t fpf_wr:12;
 		uint64_t fpf_rd:12;
+#else
+		uint64_t fpf_rd:12;
+		uint64_t fpf_wr:12;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_fpa_fpf0_marks_s cn38xx;
 	struct cvmx_fpa_fpf0_marks_s cn38xxp2;
@@ -176,13 +264,25 @@ union cvmx_fpa_fpf0_marks {
 	struct cvmx_fpa_fpf0_marks_s cn56xxp1;
 	struct cvmx_fpa_fpf0_marks_s cn58xx;
 	struct cvmx_fpa_fpf0_marks_s cn58xxp1;
+	struct cvmx_fpa_fpf0_marks_s cn61xx;
+	struct cvmx_fpa_fpf0_marks_s cn63xx;
+	struct cvmx_fpa_fpf0_marks_s cn63xxp1;
+	struct cvmx_fpa_fpf0_marks_s cn66xx;
+	struct cvmx_fpa_fpf0_marks_s cn68xx;
+	struct cvmx_fpa_fpf0_marks_s cn68xxp1;
+	struct cvmx_fpa_fpf0_marks_s cnf71xx;
 };
 
 union cvmx_fpa_fpf0_size {
 	uint64_t u64;
 	struct cvmx_fpa_fpf0_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t fpf_siz:12;
+#else
+		uint64_t fpf_siz:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_fpa_fpf0_size_s cn38xx;
 	struct cvmx_fpa_fpf0_size_s cn38xxp2;
@@ -190,12 +290,70 @@ union cvmx_fpa_fpf0_size {
 	struct cvmx_fpa_fpf0_size_s cn56xxp1;
 	struct cvmx_fpa_fpf0_size_s cn58xx;
 	struct cvmx_fpa_fpf0_size_s cn58xxp1;
+	struct cvmx_fpa_fpf0_size_s cn61xx;
+	struct cvmx_fpa_fpf0_size_s cn63xx;
+	struct cvmx_fpa_fpf0_size_s cn63xxp1;
+	struct cvmx_fpa_fpf0_size_s cn66xx;
+	struct cvmx_fpa_fpf0_size_s cn68xx;
+	struct cvmx_fpa_fpf0_size_s cn68xxp1;
+	struct cvmx_fpa_fpf0_size_s cnf71xx;
+};
+
+union cvmx_fpa_fpf8_marks {
+	uint64_t u64;
+	struct cvmx_fpa_fpf8_marks_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_22_63:42;
+		uint64_t fpf_wr:11;
+		uint64_t fpf_rd:11;
+#else
+		uint64_t fpf_rd:11;
+		uint64_t fpf_wr:11;
+		uint64_t reserved_22_63:42;
+#endif
+	} s;
+	struct cvmx_fpa_fpf8_marks_s cn68xx;
+	struct cvmx_fpa_fpf8_marks_s cn68xxp1;
+};
+
+union cvmx_fpa_fpf8_size {
+	uint64_t u64;
+	struct cvmx_fpa_fpf8_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t fpf_siz:12;
+#else
+		uint64_t fpf_siz:12;
+		uint64_t reserved_12_63:52;
+#endif
+	} s;
+	struct cvmx_fpa_fpf8_size_s cn68xx;
+	struct cvmx_fpa_fpf8_size_s cn68xxp1;
 };
 
 union cvmx_fpa_int_enb {
 	uint64_t u64;
 	struct cvmx_fpa_int_enb_s {
-		uint64_t reserved_28_63:36;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_50_63:14;
+		uint64_t paddr_e:1;
+		uint64_t reserved_44_48:5;
+		uint64_t free7:1;
+		uint64_t free6:1;
+		uint64_t free5:1;
+		uint64_t free4:1;
+		uint64_t free3:1;
+		uint64_t free2:1;
+		uint64_t free1:1;
+		uint64_t free0:1;
+		uint64_t pool7th:1;
+		uint64_t pool6th:1;
+		uint64_t pool5th:1;
+		uint64_t pool4th:1;
+		uint64_t pool3th:1;
+		uint64_t pool2th:1;
+		uint64_t pool1th:1;
+		uint64_t pool0th:1;
 		uint64_t q7_perr:1;
 		uint64_t q7_coff:1;
 		uint64_t q7_und:1;
@@ -224,23 +382,547 @@ union cvmx_fpa_int_enb {
 		uint64_t fed1_sbe:1;
 		uint64_t fed0_dbe:1;
 		uint64_t fed0_sbe:1;
+#else
+		uint64_t fed0_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed1_dbe:1;
+		uint64_t q0_und:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_perr:1;
+		uint64_t q1_und:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_perr:1;
+		uint64_t q2_und:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_perr:1;
+		uint64_t q3_und:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_perr:1;
+		uint64_t q4_und:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_perr:1;
+		uint64_t q5_und:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_perr:1;
+		uint64_t q6_und:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_perr:1;
+		uint64_t q7_und:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_perr:1;
+		uint64_t pool0th:1;
+		uint64_t pool1th:1;
+		uint64_t pool2th:1;
+		uint64_t pool3th:1;
+		uint64_t pool4th:1;
+		uint64_t pool5th:1;
+		uint64_t pool6th:1;
+		uint64_t pool7th:1;
+		uint64_t free0:1;
+		uint64_t free1:1;
+		uint64_t free2:1;
+		uint64_t free3:1;
+		uint64_t free4:1;
+		uint64_t free5:1;
+		uint64_t free6:1;
+		uint64_t free7:1;
+		uint64_t reserved_44_48:5;
+		uint64_t paddr_e:1;
+		uint64_t reserved_50_63:14;
+#endif
 	} s;
-	struct cvmx_fpa_int_enb_s cn30xx;
-	struct cvmx_fpa_int_enb_s cn31xx;
-	struct cvmx_fpa_int_enb_s cn38xx;
-	struct cvmx_fpa_int_enb_s cn38xxp2;
-	struct cvmx_fpa_int_enb_s cn50xx;
-	struct cvmx_fpa_int_enb_s cn52xx;
-	struct cvmx_fpa_int_enb_s cn52xxp1;
-	struct cvmx_fpa_int_enb_s cn56xx;
-	struct cvmx_fpa_int_enb_s cn56xxp1;
-	struct cvmx_fpa_int_enb_s cn58xx;
-	struct cvmx_fpa_int_enb_s cn58xxp1;
+	struct cvmx_fpa_int_enb_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_28_63:36;
+		uint64_t q7_perr:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_und:1;
+		uint64_t q6_perr:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_und:1;
+		uint64_t q5_perr:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_und:1;
+		uint64_t q4_perr:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_und:1;
+		uint64_t q3_perr:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_und:1;
+		uint64_t q2_perr:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_und:1;
+		uint64_t q1_perr:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_und:1;
+		uint64_t q0_perr:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_und:1;
+		uint64_t fed1_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed0_sbe:1;
+#else
+		uint64_t fed0_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed1_dbe:1;
+		uint64_t q0_und:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_perr:1;
+		uint64_t q1_und:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_perr:1;
+		uint64_t q2_und:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_perr:1;
+		uint64_t q3_und:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_perr:1;
+		uint64_t q4_und:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_perr:1;
+		uint64_t q5_und:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_perr:1;
+		uint64_t q6_und:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_perr:1;
+		uint64_t q7_und:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_perr:1;
+		uint64_t reserved_28_63:36;
+#endif
+	} cn30xx;
+	struct cvmx_fpa_int_enb_cn30xx cn31xx;
+	struct cvmx_fpa_int_enb_cn30xx cn38xx;
+	struct cvmx_fpa_int_enb_cn30xx cn38xxp2;
+	struct cvmx_fpa_int_enb_cn30xx cn50xx;
+	struct cvmx_fpa_int_enb_cn30xx cn52xx;
+	struct cvmx_fpa_int_enb_cn30xx cn52xxp1;
+	struct cvmx_fpa_int_enb_cn30xx cn56xx;
+	struct cvmx_fpa_int_enb_cn30xx cn56xxp1;
+	struct cvmx_fpa_int_enb_cn30xx cn58xx;
+	struct cvmx_fpa_int_enb_cn30xx cn58xxp1;
+	struct cvmx_fpa_int_enb_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_50_63:14;
+		uint64_t paddr_e:1;
+		uint64_t res_44:5;
+		uint64_t free7:1;
+		uint64_t free6:1;
+		uint64_t free5:1;
+		uint64_t free4:1;
+		uint64_t free3:1;
+		uint64_t free2:1;
+		uint64_t free1:1;
+		uint64_t free0:1;
+		uint64_t pool7th:1;
+		uint64_t pool6th:1;
+		uint64_t pool5th:1;
+		uint64_t pool4th:1;
+		uint64_t pool3th:1;
+		uint64_t pool2th:1;
+		uint64_t pool1th:1;
+		uint64_t pool0th:1;
+		uint64_t q7_perr:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_und:1;
+		uint64_t q6_perr:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_und:1;
+		uint64_t q5_perr:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_und:1;
+		uint64_t q4_perr:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_und:1;
+		uint64_t q3_perr:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_und:1;
+		uint64_t q2_perr:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_und:1;
+		uint64_t q1_perr:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_und:1;
+		uint64_t q0_perr:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_und:1;
+		uint64_t fed1_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed0_sbe:1;
+#else
+		uint64_t fed0_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed1_dbe:1;
+		uint64_t q0_und:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_perr:1;
+		uint64_t q1_und:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_perr:1;
+		uint64_t q2_und:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_perr:1;
+		uint64_t q3_und:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_perr:1;
+		uint64_t q4_und:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_perr:1;
+		uint64_t q5_und:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_perr:1;
+		uint64_t q6_und:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_perr:1;
+		uint64_t q7_und:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_perr:1;
+		uint64_t pool0th:1;
+		uint64_t pool1th:1;
+		uint64_t pool2th:1;
+		uint64_t pool3th:1;
+		uint64_t pool4th:1;
+		uint64_t pool5th:1;
+		uint64_t pool6th:1;
+		uint64_t pool7th:1;
+		uint64_t free0:1;
+		uint64_t free1:1;
+		uint64_t free2:1;
+		uint64_t free3:1;
+		uint64_t free4:1;
+		uint64_t free5:1;
+		uint64_t free6:1;
+		uint64_t free7:1;
+		uint64_t res_44:5;
+		uint64_t paddr_e:1;
+		uint64_t reserved_50_63:14;
+#endif
+	} cn61xx;
+	struct cvmx_fpa_int_enb_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_44_63:20;
+		uint64_t free7:1;
+		uint64_t free6:1;
+		uint64_t free5:1;
+		uint64_t free4:1;
+		uint64_t free3:1;
+		uint64_t free2:1;
+		uint64_t free1:1;
+		uint64_t free0:1;
+		uint64_t pool7th:1;
+		uint64_t pool6th:1;
+		uint64_t pool5th:1;
+		uint64_t pool4th:1;
+		uint64_t pool3th:1;
+		uint64_t pool2th:1;
+		uint64_t pool1th:1;
+		uint64_t pool0th:1;
+		uint64_t q7_perr:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_und:1;
+		uint64_t q6_perr:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_und:1;
+		uint64_t q5_perr:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_und:1;
+		uint64_t q4_perr:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_und:1;
+		uint64_t q3_perr:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_und:1;
+		uint64_t q2_perr:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_und:1;
+		uint64_t q1_perr:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_und:1;
+		uint64_t q0_perr:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_und:1;
+		uint64_t fed1_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed0_sbe:1;
+#else
+		uint64_t fed0_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed1_dbe:1;
+		uint64_t q0_und:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_perr:1;
+		uint64_t q1_und:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_perr:1;
+		uint64_t q2_und:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_perr:1;
+		uint64_t q3_und:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_perr:1;
+		uint64_t q4_und:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_perr:1;
+		uint64_t q5_und:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_perr:1;
+		uint64_t q6_und:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_perr:1;
+		uint64_t q7_und:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_perr:1;
+		uint64_t pool0th:1;
+		uint64_t pool1th:1;
+		uint64_t pool2th:1;
+		uint64_t pool3th:1;
+		uint64_t pool4th:1;
+		uint64_t pool5th:1;
+		uint64_t pool6th:1;
+		uint64_t pool7th:1;
+		uint64_t free0:1;
+		uint64_t free1:1;
+		uint64_t free2:1;
+		uint64_t free3:1;
+		uint64_t free4:1;
+		uint64_t free5:1;
+		uint64_t free6:1;
+		uint64_t free7:1;
+		uint64_t reserved_44_63:20;
+#endif
+	} cn63xx;
+	struct cvmx_fpa_int_enb_cn30xx cn63xxp1;
+	struct cvmx_fpa_int_enb_cn61xx cn66xx;
+	struct cvmx_fpa_int_enb_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_50_63:14;
+		uint64_t paddr_e:1;
+		uint64_t pool8th:1;
+		uint64_t q8_perr:1;
+		uint64_t q8_coff:1;
+		uint64_t q8_und:1;
+		uint64_t free8:1;
+		uint64_t free7:1;
+		uint64_t free6:1;
+		uint64_t free5:1;
+		uint64_t free4:1;
+		uint64_t free3:1;
+		uint64_t free2:1;
+		uint64_t free1:1;
+		uint64_t free0:1;
+		uint64_t pool7th:1;
+		uint64_t pool6th:1;
+		uint64_t pool5th:1;
+		uint64_t pool4th:1;
+		uint64_t pool3th:1;
+		uint64_t pool2th:1;
+		uint64_t pool1th:1;
+		uint64_t pool0th:1;
+		uint64_t q7_perr:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_und:1;
+		uint64_t q6_perr:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_und:1;
+		uint64_t q5_perr:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_und:1;
+		uint64_t q4_perr:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_und:1;
+		uint64_t q3_perr:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_und:1;
+		uint64_t q2_perr:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_und:1;
+		uint64_t q1_perr:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_und:1;
+		uint64_t q0_perr:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_und:1;
+		uint64_t fed1_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed0_sbe:1;
+#else
+		uint64_t fed0_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed1_dbe:1;
+		uint64_t q0_und:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_perr:1;
+		uint64_t q1_und:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_perr:1;
+		uint64_t q2_und:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_perr:1;
+		uint64_t q3_und:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_perr:1;
+		uint64_t q4_und:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_perr:1;
+		uint64_t q5_und:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_perr:1;
+		uint64_t q6_und:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_perr:1;
+		uint64_t q7_und:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_perr:1;
+		uint64_t pool0th:1;
+		uint64_t pool1th:1;
+		uint64_t pool2th:1;
+		uint64_t pool3th:1;
+		uint64_t pool4th:1;
+		uint64_t pool5th:1;
+		uint64_t pool6th:1;
+		uint64_t pool7th:1;
+		uint64_t free0:1;
+		uint64_t free1:1;
+		uint64_t free2:1;
+		uint64_t free3:1;
+		uint64_t free4:1;
+		uint64_t free5:1;
+		uint64_t free6:1;
+		uint64_t free7:1;
+		uint64_t free8:1;
+		uint64_t q8_und:1;
+		uint64_t q8_coff:1;
+		uint64_t q8_perr:1;
+		uint64_t pool8th:1;
+		uint64_t paddr_e:1;
+		uint64_t reserved_50_63:14;
+#endif
+	} cn68xx;
+	struct cvmx_fpa_int_enb_cn68xx cn68xxp1;
+	struct cvmx_fpa_int_enb_cn61xx cnf71xx;
 };
 
 union cvmx_fpa_int_sum {
 	uint64_t u64;
 	struct cvmx_fpa_int_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_50_63:14;
+		uint64_t paddr_e:1;
+		uint64_t pool8th:1;
+		uint64_t q8_perr:1;
+		uint64_t q8_coff:1;
+		uint64_t q8_und:1;
+		uint64_t free8:1;
+		uint64_t free7:1;
+		uint64_t free6:1;
+		uint64_t free5:1;
+		uint64_t free4:1;
+		uint64_t free3:1;
+		uint64_t free2:1;
+		uint64_t free1:1;
+		uint64_t free0:1;
+		uint64_t pool7th:1;
+		uint64_t pool6th:1;
+		uint64_t pool5th:1;
+		uint64_t pool4th:1;
+		uint64_t pool3th:1;
+		uint64_t pool2th:1;
+		uint64_t pool1th:1;
+		uint64_t pool0th:1;
+		uint64_t q7_perr:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_und:1;
+		uint64_t q6_perr:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_und:1;
+		uint64_t q5_perr:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_und:1;
+		uint64_t q4_perr:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_und:1;
+		uint64_t q3_perr:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_und:1;
+		uint64_t q2_perr:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_und:1;
+		uint64_t q1_perr:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_und:1;
+		uint64_t q0_perr:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_und:1;
+		uint64_t fed1_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed0_sbe:1;
+#else
+		uint64_t fed0_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed1_dbe:1;
+		uint64_t q0_und:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_perr:1;
+		uint64_t q1_und:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_perr:1;
+		uint64_t q2_und:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_perr:1;
+		uint64_t q3_und:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_perr:1;
+		uint64_t q4_und:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_perr:1;
+		uint64_t q5_und:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_perr:1;
+		uint64_t q6_und:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_perr:1;
+		uint64_t q7_und:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_perr:1;
+		uint64_t pool0th:1;
+		uint64_t pool1th:1;
+		uint64_t pool2th:1;
+		uint64_t pool3th:1;
+		uint64_t pool4th:1;
+		uint64_t pool5th:1;
+		uint64_t pool6th:1;
+		uint64_t pool7th:1;
+		uint64_t free0:1;
+		uint64_t free1:1;
+		uint64_t free2:1;
+		uint64_t free3:1;
+		uint64_t free4:1;
+		uint64_t free5:1;
+		uint64_t free6:1;
+		uint64_t free7:1;
+		uint64_t free8:1;
+		uint64_t q8_und:1;
+		uint64_t q8_coff:1;
+		uint64_t q8_perr:1;
+		uint64_t pool8th:1;
+		uint64_t paddr_e:1;
+		uint64_t reserved_50_63:14;
+#endif
+	} s;
+	struct cvmx_fpa_int_sum_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t q7_perr:1;
 		uint64_t q7_coff:1;
@@ -270,44 +952,380 @@ union cvmx_fpa_int_sum {
 		uint64_t fed1_sbe:1;
 		uint64_t fed0_dbe:1;
 		uint64_t fed0_sbe:1;
+#else
+		uint64_t fed0_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed1_dbe:1;
+		uint64_t q0_und:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_perr:1;
+		uint64_t q1_und:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_perr:1;
+		uint64_t q2_und:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_perr:1;
+		uint64_t q3_und:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_perr:1;
+		uint64_t q4_und:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_perr:1;
+		uint64_t q5_und:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_perr:1;
+		uint64_t q6_und:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_perr:1;
+		uint64_t q7_und:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_perr:1;
+		uint64_t reserved_28_63:36;
+#endif
+	} cn30xx;
+	struct cvmx_fpa_int_sum_cn30xx cn31xx;
+	struct cvmx_fpa_int_sum_cn30xx cn38xx;
+	struct cvmx_fpa_int_sum_cn30xx cn38xxp2;
+	struct cvmx_fpa_int_sum_cn30xx cn50xx;
+	struct cvmx_fpa_int_sum_cn30xx cn52xx;
+	struct cvmx_fpa_int_sum_cn30xx cn52xxp1;
+	struct cvmx_fpa_int_sum_cn30xx cn56xx;
+	struct cvmx_fpa_int_sum_cn30xx cn56xxp1;
+	struct cvmx_fpa_int_sum_cn30xx cn58xx;
+	struct cvmx_fpa_int_sum_cn30xx cn58xxp1;
+	struct cvmx_fpa_int_sum_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_50_63:14;
+		uint64_t paddr_e:1;
+		uint64_t reserved_44_48:5;
+		uint64_t free7:1;
+		uint64_t free6:1;
+		uint64_t free5:1;
+		uint64_t free4:1;
+		uint64_t free3:1;
+		uint64_t free2:1;
+		uint64_t free1:1;
+		uint64_t free0:1;
+		uint64_t pool7th:1;
+		uint64_t pool6th:1;
+		uint64_t pool5th:1;
+		uint64_t pool4th:1;
+		uint64_t pool3th:1;
+		uint64_t pool2th:1;
+		uint64_t pool1th:1;
+		uint64_t pool0th:1;
+		uint64_t q7_perr:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_und:1;
+		uint64_t q6_perr:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_und:1;
+		uint64_t q5_perr:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_und:1;
+		uint64_t q4_perr:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_und:1;
+		uint64_t q3_perr:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_und:1;
+		uint64_t q2_perr:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_und:1;
+		uint64_t q1_perr:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_und:1;
+		uint64_t q0_perr:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_und:1;
+		uint64_t fed1_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed0_sbe:1;
+#else
+		uint64_t fed0_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed1_dbe:1;
+		uint64_t q0_und:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_perr:1;
+		uint64_t q1_und:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_perr:1;
+		uint64_t q2_und:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_perr:1;
+		uint64_t q3_und:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_perr:1;
+		uint64_t q4_und:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_perr:1;
+		uint64_t q5_und:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_perr:1;
+		uint64_t q6_und:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_perr:1;
+		uint64_t q7_und:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_perr:1;
+		uint64_t pool0th:1;
+		uint64_t pool1th:1;
+		uint64_t pool2th:1;
+		uint64_t pool3th:1;
+		uint64_t pool4th:1;
+		uint64_t pool5th:1;
+		uint64_t pool6th:1;
+		uint64_t pool7th:1;
+		uint64_t free0:1;
+		uint64_t free1:1;
+		uint64_t free2:1;
+		uint64_t free3:1;
+		uint64_t free4:1;
+		uint64_t free5:1;
+		uint64_t free6:1;
+		uint64_t free7:1;
+		uint64_t reserved_44_48:5;
+		uint64_t paddr_e:1;
+		uint64_t reserved_50_63:14;
+#endif
+	} cn61xx;
+	struct cvmx_fpa_int_sum_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_44_63:20;
+		uint64_t free7:1;
+		uint64_t free6:1;
+		uint64_t free5:1;
+		uint64_t free4:1;
+		uint64_t free3:1;
+		uint64_t free2:1;
+		uint64_t free1:1;
+		uint64_t free0:1;
+		uint64_t pool7th:1;
+		uint64_t pool6th:1;
+		uint64_t pool5th:1;
+		uint64_t pool4th:1;
+		uint64_t pool3th:1;
+		uint64_t pool2th:1;
+		uint64_t pool1th:1;
+		uint64_t pool0th:1;
+		uint64_t q7_perr:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_und:1;
+		uint64_t q6_perr:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_und:1;
+		uint64_t q5_perr:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_und:1;
+		uint64_t q4_perr:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_und:1;
+		uint64_t q3_perr:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_und:1;
+		uint64_t q2_perr:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_und:1;
+		uint64_t q1_perr:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_und:1;
+		uint64_t q0_perr:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_und:1;
+		uint64_t fed1_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed0_sbe:1;
+#else
+		uint64_t fed0_sbe:1;
+		uint64_t fed0_dbe:1;
+		uint64_t fed1_sbe:1;
+		uint64_t fed1_dbe:1;
+		uint64_t q0_und:1;
+		uint64_t q0_coff:1;
+		uint64_t q0_perr:1;
+		uint64_t q1_und:1;
+		uint64_t q1_coff:1;
+		uint64_t q1_perr:1;
+		uint64_t q2_und:1;
+		uint64_t q2_coff:1;
+		uint64_t q2_perr:1;
+		uint64_t q3_und:1;
+		uint64_t q3_coff:1;
+		uint64_t q3_perr:1;
+		uint64_t q4_und:1;
+		uint64_t q4_coff:1;
+		uint64_t q4_perr:1;
+		uint64_t q5_und:1;
+		uint64_t q5_coff:1;
+		uint64_t q5_perr:1;
+		uint64_t q6_und:1;
+		uint64_t q6_coff:1;
+		uint64_t q6_perr:1;
+		uint64_t q7_und:1;
+		uint64_t q7_coff:1;
+		uint64_t q7_perr:1;
+		uint64_t pool0th:1;
+		uint64_t pool1th:1;
+		uint64_t pool2th:1;
+		uint64_t pool3th:1;
+		uint64_t pool4th:1;
+		uint64_t pool5th:1;
+		uint64_t pool6th:1;
+		uint64_t pool7th:1;
+		uint64_t free0:1;
+		uint64_t free1:1;
+		uint64_t free2:1;
+		uint64_t free3:1;
+		uint64_t free4:1;
+		uint64_t free5:1;
+		uint64_t free6:1;
+		uint64_t free7:1;
+		uint64_t reserved_44_63:20;
+#endif
+	} cn63xx;
+	struct cvmx_fpa_int_sum_cn30xx cn63xxp1;
+	struct cvmx_fpa_int_sum_cn61xx cn66xx;
+	struct cvmx_fpa_int_sum_s cn68xx;
+	struct cvmx_fpa_int_sum_s cn68xxp1;
+	struct cvmx_fpa_int_sum_cn61xx cnf71xx;
+};
+
+union cvmx_fpa_packet_threshold {
+	uint64_t u64;
+	struct cvmx_fpa_packet_threshold_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t thresh:32;
+#else
+		uint64_t thresh:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
-	struct cvmx_fpa_int_sum_s cn30xx;
-	struct cvmx_fpa_int_sum_s cn31xx;
-	struct cvmx_fpa_int_sum_s cn38xx;
-	struct cvmx_fpa_int_sum_s cn38xxp2;
-	struct cvmx_fpa_int_sum_s cn50xx;
-	struct cvmx_fpa_int_sum_s cn52xx;
-	struct cvmx_fpa_int_sum_s cn52xxp1;
-	struct cvmx_fpa_int_sum_s cn56xx;
-	struct cvmx_fpa_int_sum_s cn56xxp1;
-	struct cvmx_fpa_int_sum_s cn58xx;
-	struct cvmx_fpa_int_sum_s cn58xxp1;
+	struct cvmx_fpa_packet_threshold_s cn61xx;
+	struct cvmx_fpa_packet_threshold_s cn63xx;
+	struct cvmx_fpa_packet_threshold_s cn66xx;
+	struct cvmx_fpa_packet_threshold_s cn68xx;
+	struct cvmx_fpa_packet_threshold_s cn68xxp1;
+	struct cvmx_fpa_packet_threshold_s cnf71xx;
+};
+
+union cvmx_fpa_poolx_end_addr {
+	uint64_t u64;
+	struct cvmx_fpa_poolx_end_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_33_63:31;
+		uint64_t addr:33;
+#else
+		uint64_t addr:33;
+		uint64_t reserved_33_63:31;
+#endif
+	} s;
+	struct cvmx_fpa_poolx_end_addr_s cn61xx;
+	struct cvmx_fpa_poolx_end_addr_s cn66xx;
+	struct cvmx_fpa_poolx_end_addr_s cn68xx;
+	struct cvmx_fpa_poolx_end_addr_s cn68xxp1;
+	struct cvmx_fpa_poolx_end_addr_s cnf71xx;
+};
+
+union cvmx_fpa_poolx_start_addr {
+	uint64_t u64;
+	struct cvmx_fpa_poolx_start_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_33_63:31;
+		uint64_t addr:33;
+#else
+		uint64_t addr:33;
+		uint64_t reserved_33_63:31;
+#endif
+	} s;
+	struct cvmx_fpa_poolx_start_addr_s cn61xx;
+	struct cvmx_fpa_poolx_start_addr_s cn66xx;
+	struct cvmx_fpa_poolx_start_addr_s cn68xx;
+	struct cvmx_fpa_poolx_start_addr_s cn68xxp1;
+	struct cvmx_fpa_poolx_start_addr_s cnf71xx;
+};
+
+union cvmx_fpa_poolx_threshold {
+	uint64_t u64;
+	struct cvmx_fpa_poolx_threshold_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t thresh:32;
+#else
+		uint64_t thresh:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_fpa_poolx_threshold_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t thresh:29;
+#else
+		uint64_t thresh:29;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn61xx;
+	struct cvmx_fpa_poolx_threshold_cn61xx cn63xx;
+	struct cvmx_fpa_poolx_threshold_cn61xx cn66xx;
+	struct cvmx_fpa_poolx_threshold_s cn68xx;
+	struct cvmx_fpa_poolx_threshold_s cn68xxp1;
+	struct cvmx_fpa_poolx_threshold_cn61xx cnf71xx;
 };
 
 union cvmx_fpa_quex_available {
 	uint64_t u64;
 	struct cvmx_fpa_quex_available_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t que_siz:32;
+#else
+		uint64_t que_siz:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_fpa_quex_available_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t que_siz:29;
-	} s;
-	struct cvmx_fpa_quex_available_s cn30xx;
-	struct cvmx_fpa_quex_available_s cn31xx;
-	struct cvmx_fpa_quex_available_s cn38xx;
-	struct cvmx_fpa_quex_available_s cn38xxp2;
-	struct cvmx_fpa_quex_available_s cn50xx;
-	struct cvmx_fpa_quex_available_s cn52xx;
-	struct cvmx_fpa_quex_available_s cn52xxp1;
-	struct cvmx_fpa_quex_available_s cn56xx;
-	struct cvmx_fpa_quex_available_s cn56xxp1;
-	struct cvmx_fpa_quex_available_s cn58xx;
-	struct cvmx_fpa_quex_available_s cn58xxp1;
+#else
+		uint64_t que_siz:29;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn30xx;
+	struct cvmx_fpa_quex_available_cn30xx cn31xx;
+	struct cvmx_fpa_quex_available_cn30xx cn38xx;
+	struct cvmx_fpa_quex_available_cn30xx cn38xxp2;
+	struct cvmx_fpa_quex_available_cn30xx cn50xx;
+	struct cvmx_fpa_quex_available_cn30xx cn52xx;
+	struct cvmx_fpa_quex_available_cn30xx cn52xxp1;
+	struct cvmx_fpa_quex_available_cn30xx cn56xx;
+	struct cvmx_fpa_quex_available_cn30xx cn56xxp1;
+	struct cvmx_fpa_quex_available_cn30xx cn58xx;
+	struct cvmx_fpa_quex_available_cn30xx cn58xxp1;
+	struct cvmx_fpa_quex_available_cn30xx cn61xx;
+	struct cvmx_fpa_quex_available_cn30xx cn63xx;
+	struct cvmx_fpa_quex_available_cn30xx cn63xxp1;
+	struct cvmx_fpa_quex_available_cn30xx cn66xx;
+	struct cvmx_fpa_quex_available_s cn68xx;
+	struct cvmx_fpa_quex_available_s cn68xxp1;
+	struct cvmx_fpa_quex_available_cn30xx cnf71xx;
 };
 
 union cvmx_fpa_quex_page_index {
 	uint64_t u64;
 	struct cvmx_fpa_quex_page_index_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t pg_num:25;
+#else
+		uint64_t pg_num:25;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_fpa_quex_page_index_s cn30xx;
 	struct cvmx_fpa_quex_page_index_s cn31xx;
@@ -320,14 +1338,42 @@ union cvmx_fpa_quex_page_index {
 	struct cvmx_fpa_quex_page_index_s cn56xxp1;
 	struct cvmx_fpa_quex_page_index_s cn58xx;
 	struct cvmx_fpa_quex_page_index_s cn58xxp1;
+	struct cvmx_fpa_quex_page_index_s cn61xx;
+	struct cvmx_fpa_quex_page_index_s cn63xx;
+	struct cvmx_fpa_quex_page_index_s cn63xxp1;
+	struct cvmx_fpa_quex_page_index_s cn66xx;
+	struct cvmx_fpa_quex_page_index_s cn68xx;
+	struct cvmx_fpa_quex_page_index_s cn68xxp1;
+	struct cvmx_fpa_quex_page_index_s cnf71xx;
+};
+
+union cvmx_fpa_que8_page_index {
+	uint64_t u64;
+	struct cvmx_fpa_que8_page_index_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t pg_num:25;
+#else
+		uint64_t pg_num:25;
+		uint64_t reserved_25_63:39;
+#endif
+	} s;
+	struct cvmx_fpa_que8_page_index_s cn68xx;
+	struct cvmx_fpa_que8_page_index_s cn68xxp1;
 };
 
 union cvmx_fpa_que_act {
 	uint64_t u64;
 	struct cvmx_fpa_que_act_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t act_que:3;
 		uint64_t act_indx:26;
+#else
+		uint64_t act_indx:26;
+		uint64_t act_que:3;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_fpa_que_act_s cn30xx;
 	struct cvmx_fpa_que_act_s cn31xx;
@@ -340,14 +1386,27 @@ union cvmx_fpa_que_act {
 	struct cvmx_fpa_que_act_s cn56xxp1;
 	struct cvmx_fpa_que_act_s cn58xx;
 	struct cvmx_fpa_que_act_s cn58xxp1;
+	struct cvmx_fpa_que_act_s cn61xx;
+	struct cvmx_fpa_que_act_s cn63xx;
+	struct cvmx_fpa_que_act_s cn63xxp1;
+	struct cvmx_fpa_que_act_s cn66xx;
+	struct cvmx_fpa_que_act_s cn68xx;
+	struct cvmx_fpa_que_act_s cn68xxp1;
+	struct cvmx_fpa_que_act_s cnf71xx;
 };
 
 union cvmx_fpa_que_exp {
 	uint64_t u64;
 	struct cvmx_fpa_que_exp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t exp_que:3;
 		uint64_t exp_indx:26;
+#else
+		uint64_t exp_indx:26;
+		uint64_t exp_que:3;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_fpa_que_exp_s cn30xx;
 	struct cvmx_fpa_que_exp_s cn31xx;
@@ -360,13 +1419,25 @@ union cvmx_fpa_que_exp {
 	struct cvmx_fpa_que_exp_s cn56xxp1;
 	struct cvmx_fpa_que_exp_s cn58xx;
 	struct cvmx_fpa_que_exp_s cn58xxp1;
+	struct cvmx_fpa_que_exp_s cn61xx;
+	struct cvmx_fpa_que_exp_s cn63xx;
+	struct cvmx_fpa_que_exp_s cn63xxp1;
+	struct cvmx_fpa_que_exp_s cn66xx;
+	struct cvmx_fpa_que_exp_s cn68xx;
+	struct cvmx_fpa_que_exp_s cn68xxp1;
+	struct cvmx_fpa_que_exp_s cnf71xx;
 };
 
 union cvmx_fpa_wart_ctl {
 	uint64_t u64;
 	struct cvmx_fpa_wart_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t ctl:16;
+#else
+		uint64_t ctl:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_fpa_wart_ctl_s cn30xx;
 	struct cvmx_fpa_wart_ctl_s cn31xx;
@@ -384,8 +1455,13 @@ union cvmx_fpa_wart_ctl {
 union cvmx_fpa_wart_status {
 	uint64_t u64;
 	struct cvmx_fpa_wart_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t status:32;
+#else
+		uint64_t status:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_fpa_wart_status_s cn30xx;
 	struct cvmx_fpa_wart_status_s cn31xx;
@@ -400,4 +1476,23 @@ union cvmx_fpa_wart_status {
 	struct cvmx_fpa_wart_status_s cn58xxp1;
 };
 
+union cvmx_fpa_wqe_threshold {
+	uint64_t u64;
+	struct cvmx_fpa_wqe_threshold_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t thresh:32;
+#else
+		uint64_t thresh:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_fpa_wqe_threshold_s cn61xx;
+	struct cvmx_fpa_wqe_threshold_s cn63xx;
+	struct cvmx_fpa_wqe_threshold_s cn66xx;
+	struct cvmx_fpa_wqe_threshold_s cn68xx;
+	struct cvmx_fpa_wqe_threshold_s cn68xxp1;
+	struct cvmx_fpa_wqe_threshold_s cnf71xx;
+};
+
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h b/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h
index 946a43a73fd..e347496a33c 100644
--- a/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-gmxx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,208 +28,2052 @@
 #ifndef __CVMX_GMXX_DEFS_H__
 #define __CVMX_GMXX_DEFS_H__
 
-#define CVMX_GMXX_BAD_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000518ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_BIST(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000400ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_CLK_EN(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080007F0ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_HG2_CONTROL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000550ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_INF_MODE(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080007F8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_NXA_ADR(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000510ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_PRTX_CBFC_CTL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000580ull + (((offset) & 0) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_PRTX_CFG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000010ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_ADR_CAM0(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000180ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_ADR_CAM1(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000188ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_ADR_CAM2(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000190ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_ADR_CAM3(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000198ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_ADR_CAM4(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080001A0ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_ADR_CAM5(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080001A8ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_ADR_CAM_EN(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000108ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_ADR_CTL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000100ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_DECISION(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000040ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_FRM_CHK(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000020ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_FRM_CTL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000018ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_FRM_MAX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000030ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_FRM_MIN(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000028ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_IFG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000058ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_INT_EN(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000008ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_INT_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000000ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_JABBER(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000038ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_PAUSE_DROP_TIME(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000068ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_RX_INBND(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000060ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_CTL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000050ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_OCTS(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000088ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_OCTS_CTL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000098ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_OCTS_DMAC(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080000A8ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_OCTS_DRP(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080000B8ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_PKTS(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000080ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_PKTS_BAD(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080000C0ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_PKTS_CTL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000090ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_PKTS_DMAC(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080000A0ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_STATS_PKTS_DRP(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080000B0ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RXX_UDD_SKP(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000048ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_BP_DROPX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000420ull + (((offset) & 3) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_BP_OFFX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000460ull + (((offset) & 3) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_BP_ONX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000440ull + (((offset) & 3) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_HG2_STATUS(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000548ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_PASS_EN(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080005F8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_PASS_MAPX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000600ull + (((offset) & 15) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_PRTS(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000410ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_PRT_INFO(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004E8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_TX_STATUS(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080007E8ull + (((block_id) & 0) * 0x8000000ull))
-#define CVMX_GMXX_RX_XAUI_BAD_COL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000538ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_RX_XAUI_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000530ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_SMACX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000230ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_STAT_BP(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000520ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_APPEND(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000218ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_BURST(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000228ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_CBFC_XOFF(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080005A0ull + (((offset) & 0) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_CBFC_XON(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080005C0ull + (((offset) & 0) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_CLK(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000208ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_CTL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000270ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_MIN_PKT(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000240ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000248ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_PAUSE_PKT_TIME(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000238ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_PAUSE_TOGO(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000258ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_PAUSE_ZERO(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000260ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_SGMII_CTL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000300ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_SLOT(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000220ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_SOFT_PAUSE(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000250ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT0(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000280ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT1(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000288ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT2(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000290ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT3(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000298ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT4(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080002A0ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT5(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080002A8ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT6(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080002B0ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT7(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080002B8ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT8(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080002C0ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STAT9(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080002C8ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_STATS_CTL(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000268ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TXX_THRESH(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000210ull + (((offset) & 3) * 2048) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_BP(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004D0ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_CLK_MSKX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000780ull + (((offset) & 1) * 8) + (((block_id) & 0) * 0x0ull))
-#define CVMX_GMXX_TX_COL_ATTEMPT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000498ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_CORRUPT(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004D8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_HG2_REG1(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000558ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_HG2_REG2(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000560ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_IFG(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000488ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_INT_EN(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000508ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_INT_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000500ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_JAM(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000490ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_LFSR(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004F8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_OVR_BP(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004C8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_PAUSE_PKT_DMAC(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004A0ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_PAUSE_PKT_TYPE(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004A8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_PRTS(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000480ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_SPI_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004C0ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_SPI_DRAIN(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004E0ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_SPI_MAX(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004B0ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_SPI_ROUNDX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000680ull + (((offset) & 31) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_SPI_THRESH(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800080004B8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_TX_XAUI_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000528ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_GMXX_XAUI_EXT_LOOPBACK(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180008000540ull + (((block_id) & 1) * 0x8000000ull))
+static inline uint64_t CVMX_GMXX_BAD_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000518ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_BIST(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000400ull) + (block_id) * 0x8000000ull;
+}
+
+#define CVMX_GMXX_BPID_MAPX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000680ull) + (((offset) & 15) + ((block_id) & 7) * 0x200000ull) * 8)
+#define CVMX_GMXX_BPID_MSK(block_id) (CVMX_ADD_IO_SEG(0x0001180008000700ull) + ((block_id) & 7) * 0x1000000ull)
+static inline uint64_t CVMX_GMXX_CLK_EN(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080007F0ull) + (block_id) * 0x8000000ull;
+}
+
+#define CVMX_GMXX_EBP_DIS(block_id) (CVMX_ADD_IO_SEG(0x0001180008000608ull) + ((block_id) & 7) * 0x1000000ull)
+#define CVMX_GMXX_EBP_MSK(block_id) (CVMX_ADD_IO_SEG(0x0001180008000600ull) + ((block_id) & 7) * 0x1000000ull)
+static inline uint64_t CVMX_GMXX_HG2_CONTROL(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000550ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_INF_MODE(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080007F8ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_NXA_ADR(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000510ull) + (block_id) * 0x8000000ull;
+}
+
+#define CVMX_GMXX_PIPE_STATUS(block_id) (CVMX_ADD_IO_SEG(0x0001180008000760ull) + ((block_id) & 7) * 0x1000000ull)
+static inline uint64_t CVMX_GMXX_PRTX_CBFC_CTL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000580ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_PRTX_CFG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000010ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+#define CVMX_GMXX_RXAUI_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180008000740ull) + ((block_id) & 7) * 0x1000000ull)
+static inline uint64_t CVMX_GMXX_RXX_ADR_CAM0(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000180ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_ADR_CAM1(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000188ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_ADR_CAM2(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000190ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_ADR_CAM3(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000198ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_ADR_CAM4(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080001A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_ADR_CAM5(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080001A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_ADR_CAM_ALL_EN(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000110ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_ADR_CAM_EN(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000108ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_ADR_CTL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000100ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_DECISION(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000040ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_FRM_CHK(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000020ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_FRM_CTL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000018ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+#define CVMX_GMXX_RXX_FRM_MAX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000030ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048)
+#define CVMX_GMXX_RXX_FRM_MIN(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000028ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048)
+static inline uint64_t CVMX_GMXX_RXX_IFG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000058ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_INT_EN(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000008ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_INT_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000000ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_JABBER(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000038ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_PAUSE_DROP_TIME(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000068ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+#define CVMX_GMXX_RXX_RX_INBND(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000060ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048)
+static inline uint64_t CVMX_GMXX_RXX_STATS_CTL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000050ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000088ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS_CTL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000098ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS_DMAC(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080000A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_STATS_OCTS_DRP(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080000B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000080ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_BAD(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080000C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_CTL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000090ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_DMAC(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080000A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_STATS_PKTS_DRP(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080000B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RXX_UDD_SKP(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000048ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_RX_BP_DROPX(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x0ull) * 8;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x200000ull) * 8;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000420ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+}
+
+static inline uint64_t CVMX_GMXX_RX_BP_OFFX(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x0ull) * 8;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x200000ull) * 8;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000460ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+}
+
+static inline uint64_t CVMX_GMXX_RX_BP_ONX(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x0ull) * 8;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x200000ull) * 8;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000440ull) + ((offset) + (block_id) * 0x1000000ull) * 8;
+}
+
+static inline uint64_t CVMX_GMXX_RX_HG2_STATUS(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000548ull) + (block_id) * 0x8000000ull;
+}
+
+#define CVMX_GMXX_RX_PASS_EN(block_id) (CVMX_ADD_IO_SEG(0x00011800080005F8ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_GMXX_RX_PASS_MAPX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000600ull) + (((offset) & 15) + ((block_id) & 1) * 0x1000000ull) * 8)
+static inline uint64_t CVMX_GMXX_RX_PRTS(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000410ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_RX_PRT_INFO(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080004E8ull) + (block_id) * 0x8000000ull;
+}
+
+#define CVMX_GMXX_RX_TX_STATUS(block_id) (CVMX_ADD_IO_SEG(0x00011800080007E8ull))
+static inline uint64_t CVMX_GMXX_RX_XAUI_BAD_COL(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000538ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_RX_XAUI_CTL(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000530ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_SMACX(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000230ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_SOFT_BIST(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080007E8ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_STAT_BP(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000520ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TB_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080007E0ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_APPEND(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000218ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_BURST(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000228ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_CBFC_XOFF(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080005A0ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_CBFC_XON(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080005C0ull) + (block_id) * 0x8000000ull;
+}
+
+#define CVMX_GMXX_TXX_CLK(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000208ull) + (((offset) & 3) + ((block_id) & 1) * 0x10000ull) * 2048)
+static inline uint64_t CVMX_GMXX_TXX_CTL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000270ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_MIN_PKT(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000240ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_INTERVAL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000248ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_PAUSE_PKT_TIME(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000238ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_PAUSE_TOGO(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000258ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_PAUSE_ZERO(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000260ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+#define CVMX_GMXX_TXX_PIPE(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000310ull) + (((offset) & 3) + ((block_id) & 7) * 0x2000ull) * 2048)
+static inline uint64_t CVMX_GMXX_TXX_SGMII_CTL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000300ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_SLOT(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000220ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_SOFT_PAUSE(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000250ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT0(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000280ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT1(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000288ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT2(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000290ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT3(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000298ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT4(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080002A0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT5(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080002A8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT6(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080002B0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT7(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080002B8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT8(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080002C0ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STAT9(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080002C8ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_STATS_CTL(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000268ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TXX_THRESH(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x0ull) * 2048;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x2000ull) * 2048;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000210ull) + ((offset) + (block_id) * 0x10000ull) * 2048;
+}
+
+static inline uint64_t CVMX_GMXX_TX_BP(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080004D0ull) + (block_id) * 0x8000000ull;
+}
+
+#define CVMX_GMXX_TX_CLK_MSKX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000780ull) + (((offset) & 1) + ((block_id) & 0) * 0x0ull) * 8)
+static inline uint64_t CVMX_GMXX_TX_COL_ATTEMPT(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000498ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_CORRUPT(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080004D8ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_HG2_REG1(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000558ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_HG2_REG2(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000560ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_IFG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000488ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_INT_EN(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000508ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_INT_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000500ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_JAM(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000490ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_LFSR(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080004F8ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_OVR_BP(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080004C8ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_PAUSE_PKT_DMAC(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080004A0ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_PAUSE_PKT_TYPE(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800080004A8ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_TX_PRTS(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000480ull) + (block_id) * 0x8000000ull;
+}
+
+#define CVMX_GMXX_TX_SPI_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800080004C0ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_GMXX_TX_SPI_DRAIN(block_id) (CVMX_ADD_IO_SEG(0x00011800080004E0ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_GMXX_TX_SPI_MAX(block_id) (CVMX_ADD_IO_SEG(0x00011800080004B0ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_GMXX_TX_SPI_ROUNDX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180008000680ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8)
+#define CVMX_GMXX_TX_SPI_THRESH(block_id) (CVMX_ADD_IO_SEG(0x00011800080004B8ull) + ((block_id) & 1) * 0x8000000ull)
+static inline uint64_t CVMX_GMXX_TX_XAUI_CTL(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000528ull) + (block_id) * 0x8000000ull;
+}
+
+static inline uint64_t CVMX_GMXX_XAUI_EXT_LOOPBACK(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180008000540ull) + (block_id) * 0x8000000ull;
+}
 
 union cvmx_gmxx_bad_reg {
 	uint64_t u64;
 	struct cvmx_gmxx_bad_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t inb_nxa:4;
 		uint64_t statovr:1;
@@ -238,8 +2082,19 @@ union cvmx_gmxx_bad_reg {
 		uint64_t out_ovr:16;
 		uint64_t ncb_ovr:1;
 		uint64_t out_col:1;
+#else
+		uint64_t out_col:1;
+		uint64_t ncb_ovr:1;
+		uint64_t out_ovr:16;
+		uint64_t reserved_18_21:4;
+		uint64_t loststat:4;
+		uint64_t statovr:1;
+		uint64_t inb_nxa:4;
+		uint64_t reserved_31_63:33;
+#endif
 	} s;
 	struct cvmx_gmxx_bad_reg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t inb_nxa:4;
 		uint64_t statovr:1;
@@ -248,12 +2103,23 @@ union cvmx_gmxx_bad_reg {
 		uint64_t reserved_5_21:17;
 		uint64_t out_ovr:3;
 		uint64_t reserved_0_1:2;
+#else
+		uint64_t reserved_0_1:2;
+		uint64_t out_ovr:3;
+		uint64_t reserved_5_21:17;
+		uint64_t loststat:3;
+		uint64_t reserved_25_25:1;
+		uint64_t statovr:1;
+		uint64_t inb_nxa:4;
+		uint64_t reserved_31_63:33;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_bad_reg_cn30xx cn31xx;
 	struct cvmx_gmxx_bad_reg_s cn38xx;
 	struct cvmx_gmxx_bad_reg_s cn38xxp2;
 	struct cvmx_gmxx_bad_reg_cn30xx cn50xx;
 	struct cvmx_gmxx_bad_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t inb_nxa:4;
 		uint64_t statovr:1;
@@ -261,95 +2127,274 @@ union cvmx_gmxx_bad_reg {
 		uint64_t reserved_6_21:16;
 		uint64_t out_ovr:4;
 		uint64_t reserved_0_1:2;
+#else
+		uint64_t reserved_0_1:2;
+		uint64_t out_ovr:4;
+		uint64_t reserved_6_21:16;
+		uint64_t loststat:4;
+		uint64_t statovr:1;
+		uint64_t inb_nxa:4;
+		uint64_t reserved_31_63:33;
+#endif
 	} cn52xx;
 	struct cvmx_gmxx_bad_reg_cn52xx cn52xxp1;
 	struct cvmx_gmxx_bad_reg_cn52xx cn56xx;
 	struct cvmx_gmxx_bad_reg_cn52xx cn56xxp1;
 	struct cvmx_gmxx_bad_reg_s cn58xx;
 	struct cvmx_gmxx_bad_reg_s cn58xxp1;
+	struct cvmx_gmxx_bad_reg_cn52xx cn61xx;
+	struct cvmx_gmxx_bad_reg_cn52xx cn63xx;
+	struct cvmx_gmxx_bad_reg_cn52xx cn63xxp1;
+	struct cvmx_gmxx_bad_reg_cn52xx cn66xx;
+	struct cvmx_gmxx_bad_reg_cn52xx cn68xx;
+	struct cvmx_gmxx_bad_reg_cn52xx cn68xxp1;
+	struct cvmx_gmxx_bad_reg_cn52xx cnf71xx;
 };
 
 union cvmx_gmxx_bist {
 	uint64_t u64;
 	struct cvmx_gmxx_bist_s {
-		uint64_t reserved_17_63:47;
-		uint64_t status:17;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t status:25;
+#else
+		uint64_t status:25;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_gmxx_bist_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t status:10;
+#else
+		uint64_t status:10;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_bist_cn30xx cn31xx;
 	struct cvmx_gmxx_bist_cn30xx cn38xx;
 	struct cvmx_gmxx_bist_cn30xx cn38xxp2;
 	struct cvmx_gmxx_bist_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t status:12;
+#else
+		uint64_t status:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn50xx;
 	struct cvmx_gmxx_bist_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t status:16;
+#else
+		uint64_t status:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn52xx;
 	struct cvmx_gmxx_bist_cn52xx cn52xxp1;
 	struct cvmx_gmxx_bist_cn52xx cn56xx;
 	struct cvmx_gmxx_bist_cn52xx cn56xxp1;
-	struct cvmx_gmxx_bist_s cn58xx;
-	struct cvmx_gmxx_bist_s cn58xxp1;
+	struct cvmx_gmxx_bist_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_17_63:47;
+		uint64_t status:17;
+#else
+		uint64_t status:17;
+		uint64_t reserved_17_63:47;
+#endif
+	} cn58xx;
+	struct cvmx_gmxx_bist_cn58xx cn58xxp1;
+	struct cvmx_gmxx_bist_s cn61xx;
+	struct cvmx_gmxx_bist_s cn63xx;
+	struct cvmx_gmxx_bist_s cn63xxp1;
+	struct cvmx_gmxx_bist_s cn66xx;
+	struct cvmx_gmxx_bist_s cn68xx;
+	struct cvmx_gmxx_bist_s cn68xxp1;
+	struct cvmx_gmxx_bist_s cnf71xx;
+};
+
+union cvmx_gmxx_bpid_mapx {
+	uint64_t u64;
+	struct cvmx_gmxx_bpid_mapx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_17_63:47;
+		uint64_t status:1;
+		uint64_t reserved_9_15:7;
+		uint64_t val:1;
+		uint64_t reserved_6_7:2;
+		uint64_t bpid:6;
+#else
+		uint64_t bpid:6;
+		uint64_t reserved_6_7:2;
+		uint64_t val:1;
+		uint64_t reserved_9_15:7;
+		uint64_t status:1;
+		uint64_t reserved_17_63:47;
+#endif
+	} s;
+	struct cvmx_gmxx_bpid_mapx_s cn68xx;
+	struct cvmx_gmxx_bpid_mapx_s cn68xxp1;
+};
+
+union cvmx_gmxx_bpid_msk {
+	uint64_t u64;
+	struct cvmx_gmxx_bpid_msk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_48_63:16;
+		uint64_t msk_or:16;
+		uint64_t reserved_16_31:16;
+		uint64_t msk_and:16;
+#else
+		uint64_t msk_and:16;
+		uint64_t reserved_16_31:16;
+		uint64_t msk_or:16;
+		uint64_t reserved_48_63:16;
+#endif
+	} s;
+	struct cvmx_gmxx_bpid_msk_s cn68xx;
+	struct cvmx_gmxx_bpid_msk_s cn68xxp1;
 };
 
 union cvmx_gmxx_clk_en {
 	uint64_t u64;
 	struct cvmx_gmxx_clk_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t clk_en:1;
+#else
+		uint64_t clk_en:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_gmxx_clk_en_s cn52xx;
 	struct cvmx_gmxx_clk_en_s cn52xxp1;
 	struct cvmx_gmxx_clk_en_s cn56xx;
 	struct cvmx_gmxx_clk_en_s cn56xxp1;
+	struct cvmx_gmxx_clk_en_s cn61xx;
+	struct cvmx_gmxx_clk_en_s cn63xx;
+	struct cvmx_gmxx_clk_en_s cn63xxp1;
+	struct cvmx_gmxx_clk_en_s cn66xx;
+	struct cvmx_gmxx_clk_en_s cn68xx;
+	struct cvmx_gmxx_clk_en_s cn68xxp1;
+	struct cvmx_gmxx_clk_en_s cnf71xx;
+};
+
+union cvmx_gmxx_ebp_dis {
+	uint64_t u64;
+	struct cvmx_gmxx_ebp_dis_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t dis:16;
+#else
+		uint64_t dis:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_gmxx_ebp_dis_s cn68xx;
+	struct cvmx_gmxx_ebp_dis_s cn68xxp1;
+};
+
+union cvmx_gmxx_ebp_msk {
+	uint64_t u64;
+	struct cvmx_gmxx_ebp_msk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t msk:16;
+#else
+		uint64_t msk:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_gmxx_ebp_msk_s cn68xx;
+	struct cvmx_gmxx_ebp_msk_s cn68xxp1;
 };
 
 union cvmx_gmxx_hg2_control {
 	uint64_t u64;
 	struct cvmx_gmxx_hg2_control_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t hg2tx_en:1;
 		uint64_t hg2rx_en:1;
 		uint64_t phys_en:1;
 		uint64_t logl_en:16;
+#else
+		uint64_t logl_en:16;
+		uint64_t phys_en:1;
+		uint64_t hg2rx_en:1;
+		uint64_t hg2tx_en:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} s;
 	struct cvmx_gmxx_hg2_control_s cn52xx;
 	struct cvmx_gmxx_hg2_control_s cn52xxp1;
 	struct cvmx_gmxx_hg2_control_s cn56xx;
+	struct cvmx_gmxx_hg2_control_s cn61xx;
+	struct cvmx_gmxx_hg2_control_s cn63xx;
+	struct cvmx_gmxx_hg2_control_s cn63xxp1;
+	struct cvmx_gmxx_hg2_control_s cn66xx;
+	struct cvmx_gmxx_hg2_control_s cn68xx;
+	struct cvmx_gmxx_hg2_control_s cn68xxp1;
+	struct cvmx_gmxx_hg2_control_s cnf71xx;
 };
 
 union cvmx_gmxx_inf_mode {
 	uint64_t u64;
 	struct cvmx_gmxx_inf_mode_s {
-		uint64_t reserved_10_63:54;
-		uint64_t speed:2;
-		uint64_t reserved_6_7:2;
-		uint64_t mode:2;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t rate:4;
+		uint64_t reserved_12_15:4;
+		uint64_t speed:4;
+		uint64_t reserved_7_7:1;
+		uint64_t mode:3;
 		uint64_t reserved_3_3:1;
 		uint64_t p0mii:1;
 		uint64_t en:1;
 		uint64_t type:1;
+#else
+		uint64_t type:1;
+		uint64_t en:1;
+		uint64_t p0mii:1;
+		uint64_t reserved_3_3:1;
+		uint64_t mode:3;
+		uint64_t reserved_7_7:1;
+		uint64_t speed:4;
+		uint64_t reserved_12_15:4;
+		uint64_t rate:4;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_gmxx_inf_mode_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t p0mii:1;
 		uint64_t en:1;
 		uint64_t type:1;
+#else
+		uint64_t type:1;
+		uint64_t en:1;
+		uint64_t p0mii:1;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_inf_mode_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t en:1;
 		uint64_t type:1;
+#else
+		uint64_t type:1;
+		uint64_t en:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn31xx;
 	struct cvmx_gmxx_inf_mode_cn31xx cn38xx;
 	struct cvmx_gmxx_inf_mode_cn31xx cn38xxp2;
 	struct cvmx_gmxx_inf_mode_cn30xx cn50xx;
 	struct cvmx_gmxx_inf_mode_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t speed:2;
 		uint64_t reserved_6_7:2;
@@ -357,36 +2402,158 @@ union cvmx_gmxx_inf_mode {
 		uint64_t reserved_2_3:2;
 		uint64_t en:1;
 		uint64_t type:1;
+#else
+		uint64_t type:1;
+		uint64_t en:1;
+		uint64_t reserved_2_3:2;
+		uint64_t mode:2;
+		uint64_t reserved_6_7:2;
+		uint64_t speed:2;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn52xx;
 	struct cvmx_gmxx_inf_mode_cn52xx cn52xxp1;
 	struct cvmx_gmxx_inf_mode_cn52xx cn56xx;
 	struct cvmx_gmxx_inf_mode_cn52xx cn56xxp1;
 	struct cvmx_gmxx_inf_mode_cn31xx cn58xx;
 	struct cvmx_gmxx_inf_mode_cn31xx cn58xxp1;
+	struct cvmx_gmxx_inf_mode_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t speed:4;
+		uint64_t reserved_5_7:3;
+		uint64_t mode:1;
+		uint64_t reserved_2_3:2;
+		uint64_t en:1;
+		uint64_t type:1;
+#else
+		uint64_t type:1;
+		uint64_t en:1;
+		uint64_t reserved_2_3:2;
+		uint64_t mode:1;
+		uint64_t reserved_5_7:3;
+		uint64_t speed:4;
+		uint64_t reserved_12_63:52;
+#endif
+	} cn61xx;
+	struct cvmx_gmxx_inf_mode_cn61xx cn63xx;
+	struct cvmx_gmxx_inf_mode_cn61xx cn63xxp1;
+	struct cvmx_gmxx_inf_mode_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t rate:4;
+		uint64_t reserved_12_15:4;
+		uint64_t speed:4;
+		uint64_t reserved_5_7:3;
+		uint64_t mode:1;
+		uint64_t reserved_2_3:2;
+		uint64_t en:1;
+		uint64_t type:1;
+#else
+		uint64_t type:1;
+		uint64_t en:1;
+		uint64_t reserved_2_3:2;
+		uint64_t mode:1;
+		uint64_t reserved_5_7:3;
+		uint64_t speed:4;
+		uint64_t reserved_12_15:4;
+		uint64_t rate:4;
+		uint64_t reserved_20_63:44;
+#endif
+	} cn66xx;
+	struct cvmx_gmxx_inf_mode_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t speed:4;
+		uint64_t reserved_7_7:1;
+		uint64_t mode:3;
+		uint64_t reserved_2_3:2;
+		uint64_t en:1;
+		uint64_t type:1;
+#else
+		uint64_t type:1;
+		uint64_t en:1;
+		uint64_t reserved_2_3:2;
+		uint64_t mode:3;
+		uint64_t reserved_7_7:1;
+		uint64_t speed:4;
+		uint64_t reserved_12_63:52;
+#endif
+	} cn68xx;
+	struct cvmx_gmxx_inf_mode_cn68xx cn68xxp1;
+	struct cvmx_gmxx_inf_mode_cn61xx cnf71xx;
 };
 
 union cvmx_gmxx_nxa_adr {
 	uint64_t u64;
 	struct cvmx_gmxx_nxa_adr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_23_63:41;
+		uint64_t pipe:7;
+		uint64_t reserved_6_15:10;
+		uint64_t prt:6;
+#else
+		uint64_t prt:6;
+		uint64_t reserved_6_15:10;
+		uint64_t pipe:7;
+		uint64_t reserved_23_63:41;
+#endif
+	} s;
+	struct cvmx_gmxx_nxa_adr_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t prt:6;
+#else
+		uint64_t prt:6;
+		uint64_t reserved_6_63:58;
+#endif
+	} cn30xx;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn31xx;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn38xx;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn38xxp2;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn50xx;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn52xx;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn52xxp1;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn56xx;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn56xxp1;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn58xx;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn58xxp1;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn61xx;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn63xx;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn63xxp1;
+	struct cvmx_gmxx_nxa_adr_cn30xx cn66xx;
+	struct cvmx_gmxx_nxa_adr_s cn68xx;
+	struct cvmx_gmxx_nxa_adr_s cn68xxp1;
+	struct cvmx_gmxx_nxa_adr_cn30xx cnf71xx;
+};
+
+union cvmx_gmxx_pipe_status {
+	uint64_t u64;
+	struct cvmx_gmxx_pipe_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t ovr:4;
+		uint64_t reserved_12_15:4;
+		uint64_t bp:4;
+		uint64_t reserved_4_7:4;
+		uint64_t stop:4;
+#else
+		uint64_t stop:4;
+		uint64_t reserved_4_7:4;
+		uint64_t bp:4;
+		uint64_t reserved_12_15:4;
+		uint64_t ovr:4;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
-	struct cvmx_gmxx_nxa_adr_s cn30xx;
-	struct cvmx_gmxx_nxa_adr_s cn31xx;
-	struct cvmx_gmxx_nxa_adr_s cn38xx;
-	struct cvmx_gmxx_nxa_adr_s cn38xxp2;
-	struct cvmx_gmxx_nxa_adr_s cn50xx;
-	struct cvmx_gmxx_nxa_adr_s cn52xx;
-	struct cvmx_gmxx_nxa_adr_s cn52xxp1;
-	struct cvmx_gmxx_nxa_adr_s cn56xx;
-	struct cvmx_gmxx_nxa_adr_s cn56xxp1;
-	struct cvmx_gmxx_nxa_adr_s cn58xx;
-	struct cvmx_gmxx_nxa_adr_s cn58xxp1;
+	struct cvmx_gmxx_pipe_status_s cn68xx;
+	struct cvmx_gmxx_pipe_status_s cn68xxp1;
 };
 
 union cvmx_gmxx_prtx_cbfc_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_prtx_cbfc_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t phys_en:16;
 		uint64_t logl_en:16;
 		uint64_t phys_bp:16;
@@ -395,15 +2562,35 @@ union cvmx_gmxx_prtx_cbfc_ctl {
 		uint64_t drp_en:1;
 		uint64_t tx_en:1;
 		uint64_t rx_en:1;
+#else
+		uint64_t rx_en:1;
+		uint64_t tx_en:1;
+		uint64_t drp_en:1;
+		uint64_t bck_en:1;
+		uint64_t reserved_4_15:12;
+		uint64_t phys_bp:16;
+		uint64_t logl_en:16;
+		uint64_t phys_en:16;
+#endif
 	} s;
 	struct cvmx_gmxx_prtx_cbfc_ctl_s cn52xx;
 	struct cvmx_gmxx_prtx_cbfc_ctl_s cn56xx;
+	struct cvmx_gmxx_prtx_cbfc_ctl_s cn61xx;
+	struct cvmx_gmxx_prtx_cbfc_ctl_s cn63xx;
+	struct cvmx_gmxx_prtx_cbfc_ctl_s cn63xxp1;
+	struct cvmx_gmxx_prtx_cbfc_ctl_s cn66xx;
+	struct cvmx_gmxx_prtx_cbfc_ctl_s cn68xx;
+	struct cvmx_gmxx_prtx_cbfc_ctl_s cn68xxp1;
+	struct cvmx_gmxx_prtx_cbfc_ctl_s cnf71xx;
 };
 
 union cvmx_gmxx_prtx_cfg {
 	uint64_t u64;
 	struct cvmx_gmxx_prtx_cfg_s {
-		uint64_t reserved_14_63:50;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_22_63:42;
+		uint64_t pknd:6;
+		uint64_t reserved_14_15:2;
 		uint64_t tx_idle:1;
 		uint64_t rx_idle:1;
 		uint64_t reserved_9_11:3;
@@ -413,30 +2600,87 @@ union cvmx_gmxx_prtx_cfg {
 		uint64_t duplex:1;
 		uint64_t speed:1;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t speed:1;
+		uint64_t duplex:1;
+		uint64_t slottime:1;
+		uint64_t reserved_4_7:4;
+		uint64_t speed_msb:1;
+		uint64_t reserved_9_11:3;
+		uint64_t rx_idle:1;
+		uint64_t tx_idle:1;
+		uint64_t reserved_14_15:2;
+		uint64_t pknd:6;
+		uint64_t reserved_22_63:42;
+#endif
 	} s;
 	struct cvmx_gmxx_prtx_cfg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t slottime:1;
 		uint64_t duplex:1;
 		uint64_t speed:1;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t speed:1;
+		uint64_t duplex:1;
+		uint64_t slottime:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_prtx_cfg_cn30xx cn31xx;
 	struct cvmx_gmxx_prtx_cfg_cn30xx cn38xx;
 	struct cvmx_gmxx_prtx_cfg_cn30xx cn38xxp2;
 	struct cvmx_gmxx_prtx_cfg_cn30xx cn50xx;
-	struct cvmx_gmxx_prtx_cfg_s cn52xx;
-	struct cvmx_gmxx_prtx_cfg_s cn52xxp1;
-	struct cvmx_gmxx_prtx_cfg_s cn56xx;
-	struct cvmx_gmxx_prtx_cfg_s cn56xxp1;
+	struct cvmx_gmxx_prtx_cfg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_14_63:50;
+		uint64_t tx_idle:1;
+		uint64_t rx_idle:1;
+		uint64_t reserved_9_11:3;
+		uint64_t speed_msb:1;
+		uint64_t reserved_4_7:4;
+		uint64_t slottime:1;
+		uint64_t duplex:1;
+		uint64_t speed:1;
+		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t speed:1;
+		uint64_t duplex:1;
+		uint64_t slottime:1;
+		uint64_t reserved_4_7:4;
+		uint64_t speed_msb:1;
+		uint64_t reserved_9_11:3;
+		uint64_t rx_idle:1;
+		uint64_t tx_idle:1;
+		uint64_t reserved_14_63:50;
+#endif
+	} cn52xx;
+	struct cvmx_gmxx_prtx_cfg_cn52xx cn52xxp1;
+	struct cvmx_gmxx_prtx_cfg_cn52xx cn56xx;
+	struct cvmx_gmxx_prtx_cfg_cn52xx cn56xxp1;
 	struct cvmx_gmxx_prtx_cfg_cn30xx cn58xx;
 	struct cvmx_gmxx_prtx_cfg_cn30xx cn58xxp1;
+	struct cvmx_gmxx_prtx_cfg_cn52xx cn61xx;
+	struct cvmx_gmxx_prtx_cfg_cn52xx cn63xx;
+	struct cvmx_gmxx_prtx_cfg_cn52xx cn63xxp1;
+	struct cvmx_gmxx_prtx_cfg_cn52xx cn66xx;
+	struct cvmx_gmxx_prtx_cfg_s cn68xx;
+	struct cvmx_gmxx_prtx_cfg_s cn68xxp1;
+	struct cvmx_gmxx_prtx_cfg_cn52xx cnf71xx;
 };
 
 union cvmx_gmxx_rxx_adr_cam0 {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_adr_cam0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t adr:64;
+#else
 		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_adr_cam0_s cn30xx;
 	struct cvmx_gmxx_rxx_adr_cam0_s cn31xx;
@@ -449,12 +2693,23 @@ union cvmx_gmxx_rxx_adr_cam0 {
 	struct cvmx_gmxx_rxx_adr_cam0_s cn56xxp1;
 	struct cvmx_gmxx_rxx_adr_cam0_s cn58xx;
 	struct cvmx_gmxx_rxx_adr_cam0_s cn58xxp1;
+	struct cvmx_gmxx_rxx_adr_cam0_s cn61xx;
+	struct cvmx_gmxx_rxx_adr_cam0_s cn63xx;
+	struct cvmx_gmxx_rxx_adr_cam0_s cn63xxp1;
+	struct cvmx_gmxx_rxx_adr_cam0_s cn66xx;
+	struct cvmx_gmxx_rxx_adr_cam0_s cn68xx;
+	struct cvmx_gmxx_rxx_adr_cam0_s cn68xxp1;
+	struct cvmx_gmxx_rxx_adr_cam0_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_adr_cam1 {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_adr_cam1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t adr:64;
+#else
+		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_adr_cam1_s cn30xx;
 	struct cvmx_gmxx_rxx_adr_cam1_s cn31xx;
@@ -467,12 +2722,23 @@ union cvmx_gmxx_rxx_adr_cam1 {
 	struct cvmx_gmxx_rxx_adr_cam1_s cn56xxp1;
 	struct cvmx_gmxx_rxx_adr_cam1_s cn58xx;
 	struct cvmx_gmxx_rxx_adr_cam1_s cn58xxp1;
+	struct cvmx_gmxx_rxx_adr_cam1_s cn61xx;
+	struct cvmx_gmxx_rxx_adr_cam1_s cn63xx;
+	struct cvmx_gmxx_rxx_adr_cam1_s cn63xxp1;
+	struct cvmx_gmxx_rxx_adr_cam1_s cn66xx;
+	struct cvmx_gmxx_rxx_adr_cam1_s cn68xx;
+	struct cvmx_gmxx_rxx_adr_cam1_s cn68xxp1;
+	struct cvmx_gmxx_rxx_adr_cam1_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_adr_cam2 {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_adr_cam2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t adr:64;
+#else
 		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_adr_cam2_s cn30xx;
 	struct cvmx_gmxx_rxx_adr_cam2_s cn31xx;
@@ -485,12 +2751,23 @@ union cvmx_gmxx_rxx_adr_cam2 {
 	struct cvmx_gmxx_rxx_adr_cam2_s cn56xxp1;
 	struct cvmx_gmxx_rxx_adr_cam2_s cn58xx;
 	struct cvmx_gmxx_rxx_adr_cam2_s cn58xxp1;
+	struct cvmx_gmxx_rxx_adr_cam2_s cn61xx;
+	struct cvmx_gmxx_rxx_adr_cam2_s cn63xx;
+	struct cvmx_gmxx_rxx_adr_cam2_s cn63xxp1;
+	struct cvmx_gmxx_rxx_adr_cam2_s cn66xx;
+	struct cvmx_gmxx_rxx_adr_cam2_s cn68xx;
+	struct cvmx_gmxx_rxx_adr_cam2_s cn68xxp1;
+	struct cvmx_gmxx_rxx_adr_cam2_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_adr_cam3 {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_adr_cam3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t adr:64;
+#else
 		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_adr_cam3_s cn30xx;
 	struct cvmx_gmxx_rxx_adr_cam3_s cn31xx;
@@ -503,12 +2780,23 @@ union cvmx_gmxx_rxx_adr_cam3 {
 	struct cvmx_gmxx_rxx_adr_cam3_s cn56xxp1;
 	struct cvmx_gmxx_rxx_adr_cam3_s cn58xx;
 	struct cvmx_gmxx_rxx_adr_cam3_s cn58xxp1;
+	struct cvmx_gmxx_rxx_adr_cam3_s cn61xx;
+	struct cvmx_gmxx_rxx_adr_cam3_s cn63xx;
+	struct cvmx_gmxx_rxx_adr_cam3_s cn63xxp1;
+	struct cvmx_gmxx_rxx_adr_cam3_s cn66xx;
+	struct cvmx_gmxx_rxx_adr_cam3_s cn68xx;
+	struct cvmx_gmxx_rxx_adr_cam3_s cn68xxp1;
+	struct cvmx_gmxx_rxx_adr_cam3_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_adr_cam4 {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_adr_cam4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t adr:64;
+#else
+		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_adr_cam4_s cn30xx;
 	struct cvmx_gmxx_rxx_adr_cam4_s cn31xx;
@@ -521,12 +2809,23 @@ union cvmx_gmxx_rxx_adr_cam4 {
 	struct cvmx_gmxx_rxx_adr_cam4_s cn56xxp1;
 	struct cvmx_gmxx_rxx_adr_cam4_s cn58xx;
 	struct cvmx_gmxx_rxx_adr_cam4_s cn58xxp1;
+	struct cvmx_gmxx_rxx_adr_cam4_s cn61xx;
+	struct cvmx_gmxx_rxx_adr_cam4_s cn63xx;
+	struct cvmx_gmxx_rxx_adr_cam4_s cn63xxp1;
+	struct cvmx_gmxx_rxx_adr_cam4_s cn66xx;
+	struct cvmx_gmxx_rxx_adr_cam4_s cn68xx;
+	struct cvmx_gmxx_rxx_adr_cam4_s cn68xxp1;
+	struct cvmx_gmxx_rxx_adr_cam4_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_adr_cam5 {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_adr_cam5_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t adr:64;
+#else
 		uint64_t adr:64;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_adr_cam5_s cn30xx;
 	struct cvmx_gmxx_rxx_adr_cam5_s cn31xx;
@@ -539,13 +2838,42 @@ union cvmx_gmxx_rxx_adr_cam5 {
 	struct cvmx_gmxx_rxx_adr_cam5_s cn56xxp1;
 	struct cvmx_gmxx_rxx_adr_cam5_s cn58xx;
 	struct cvmx_gmxx_rxx_adr_cam5_s cn58xxp1;
+	struct cvmx_gmxx_rxx_adr_cam5_s cn61xx;
+	struct cvmx_gmxx_rxx_adr_cam5_s cn63xx;
+	struct cvmx_gmxx_rxx_adr_cam5_s cn63xxp1;
+	struct cvmx_gmxx_rxx_adr_cam5_s cn66xx;
+	struct cvmx_gmxx_rxx_adr_cam5_s cn68xx;
+	struct cvmx_gmxx_rxx_adr_cam5_s cn68xxp1;
+	struct cvmx_gmxx_rxx_adr_cam5_s cnf71xx;
+};
+
+union cvmx_gmxx_rxx_adr_cam_all_en {
+	uint64_t u64;
+	struct cvmx_gmxx_rxx_adr_cam_all_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t en:32;
+#else
+		uint64_t en:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_gmxx_rxx_adr_cam_all_en_s cn61xx;
+	struct cvmx_gmxx_rxx_adr_cam_all_en_s cn66xx;
+	struct cvmx_gmxx_rxx_adr_cam_all_en_s cn68xx;
+	struct cvmx_gmxx_rxx_adr_cam_all_en_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_adr_cam_en {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_adr_cam_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t en:8;
+#else
+		uint64_t en:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_adr_cam_en_s cn30xx;
 	struct cvmx_gmxx_rxx_adr_cam_en_s cn31xx;
@@ -558,15 +2886,29 @@ union cvmx_gmxx_rxx_adr_cam_en {
 	struct cvmx_gmxx_rxx_adr_cam_en_s cn56xxp1;
 	struct cvmx_gmxx_rxx_adr_cam_en_s cn58xx;
 	struct cvmx_gmxx_rxx_adr_cam_en_s cn58xxp1;
+	struct cvmx_gmxx_rxx_adr_cam_en_s cn61xx;
+	struct cvmx_gmxx_rxx_adr_cam_en_s cn63xx;
+	struct cvmx_gmxx_rxx_adr_cam_en_s cn63xxp1;
+	struct cvmx_gmxx_rxx_adr_cam_en_s cn66xx;
+	struct cvmx_gmxx_rxx_adr_cam_en_s cn68xx;
+	struct cvmx_gmxx_rxx_adr_cam_en_s cn68xxp1;
+	struct cvmx_gmxx_rxx_adr_cam_en_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_adr_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_adr_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t cam_mode:1;
 		uint64_t mcst:2;
 		uint64_t bcst:1;
+#else
+		uint64_t bcst:1;
+		uint64_t mcst:2;
+		uint64_t cam_mode:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_adr_ctl_s cn30xx;
 	struct cvmx_gmxx_rxx_adr_ctl_s cn31xx;
@@ -579,13 +2921,25 @@ union cvmx_gmxx_rxx_adr_ctl {
 	struct cvmx_gmxx_rxx_adr_ctl_s cn56xxp1;
 	struct cvmx_gmxx_rxx_adr_ctl_s cn58xx;
 	struct cvmx_gmxx_rxx_adr_ctl_s cn58xxp1;
+	struct cvmx_gmxx_rxx_adr_ctl_s cn61xx;
+	struct cvmx_gmxx_rxx_adr_ctl_s cn63xx;
+	struct cvmx_gmxx_rxx_adr_ctl_s cn63xxp1;
+	struct cvmx_gmxx_rxx_adr_ctl_s cn66xx;
+	struct cvmx_gmxx_rxx_adr_ctl_s cn68xx;
+	struct cvmx_gmxx_rxx_adr_ctl_s cn68xxp1;
+	struct cvmx_gmxx_rxx_adr_ctl_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_decision {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_decision_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t cnt:5;
+#else
+		uint64_t cnt:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_decision_s cn30xx;
 	struct cvmx_gmxx_rxx_decision_s cn31xx;
@@ -598,11 +2952,19 @@ union cvmx_gmxx_rxx_decision {
 	struct cvmx_gmxx_rxx_decision_s cn56xxp1;
 	struct cvmx_gmxx_rxx_decision_s cn58xx;
 	struct cvmx_gmxx_rxx_decision_s cn58xxp1;
+	struct cvmx_gmxx_rxx_decision_s cn61xx;
+	struct cvmx_gmxx_rxx_decision_s cn63xx;
+	struct cvmx_gmxx_rxx_decision_s cn63xxp1;
+	struct cvmx_gmxx_rxx_decision_s cn66xx;
+	struct cvmx_gmxx_rxx_decision_s cn68xx;
+	struct cvmx_gmxx_rxx_decision_s cn68xxp1;
+	struct cvmx_gmxx_rxx_decision_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_frm_chk {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_frm_chk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t niberr:1;
 		uint64_t skperr:1;
@@ -614,12 +2976,26 @@ union cvmx_gmxx_rxx_frm_chk {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_frm_chk_s cn30xx;
 	struct cvmx_gmxx_rxx_frm_chk_s cn31xx;
 	struct cvmx_gmxx_rxx_frm_chk_s cn38xx;
 	struct cvmx_gmxx_rxx_frm_chk_s cn38xxp2;
 	struct cvmx_gmxx_rxx_frm_chk_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t niberr:1;
 		uint64_t skperr:1;
@@ -631,8 +3007,22 @@ union cvmx_gmxx_rxx_frm_chk {
 		uint64_t reserved_2_2:1;
 		uint64_t carext:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t reserved_6_6:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn50xx;
 	struct cvmx_gmxx_rxx_frm_chk_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t skperr:1;
 		uint64_t rcverr:1;
@@ -642,18 +3032,61 @@ union cvmx_gmxx_rxx_frm_chk {
 		uint64_t reserved_2_2:1;
 		uint64_t carext:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn52xx;
 	struct cvmx_gmxx_rxx_frm_chk_cn52xx cn52xxp1;
 	struct cvmx_gmxx_rxx_frm_chk_cn52xx cn56xx;
 	struct cvmx_gmxx_rxx_frm_chk_cn52xx cn56xxp1;
 	struct cvmx_gmxx_rxx_frm_chk_s cn58xx;
 	struct cvmx_gmxx_rxx_frm_chk_s cn58xxp1;
+	struct cvmx_gmxx_rxx_frm_chk_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_9_63:55;
+		uint64_t skperr:1;
+		uint64_t rcverr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t fcserr:1;
+		uint64_t jabber:1;
+		uint64_t reserved_2_2:1;
+		uint64_t carext:1;
+		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_63:55;
+#endif
+	} cn61xx;
+	struct cvmx_gmxx_rxx_frm_chk_cn61xx cn63xx;
+	struct cvmx_gmxx_rxx_frm_chk_cn61xx cn63xxp1;
+	struct cvmx_gmxx_rxx_frm_chk_cn61xx cn66xx;
+	struct cvmx_gmxx_rxx_frm_chk_cn61xx cn68xx;
+	struct cvmx_gmxx_rxx_frm_chk_cn61xx cn68xxp1;
+	struct cvmx_gmxx_rxx_frm_chk_cn61xx cnf71xx;
 };
 
 union cvmx_gmxx_rxx_frm_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_frm_ctl_s {
-		uint64_t reserved_11_63:53;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_13_63:51;
+		uint64_t ptp_mode:1;
+		uint64_t reserved_11_11:1;
 		uint64_t null_dis:1;
 		uint64_t pre_align:1;
 		uint64_t pad_len:1;
@@ -665,8 +3098,25 @@ union cvmx_gmxx_rxx_frm_ctl {
 		uint64_t ctl_drp:1;
 		uint64_t pre_strp:1;
 		uint64_t pre_chk:1;
+#else
+		uint64_t pre_chk:1;
+		uint64_t pre_strp:1;
+		uint64_t ctl_drp:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_smac:1;
+		uint64_t pre_free:1;
+		uint64_t vlan_len:1;
+		uint64_t pad_len:1;
+		uint64_t pre_align:1;
+		uint64_t null_dis:1;
+		uint64_t reserved_11_11:1;
+		uint64_t ptp_mode:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_frm_ctl_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t pad_len:1;
 		uint64_t vlan_len:1;
@@ -677,8 +3127,21 @@ union cvmx_gmxx_rxx_frm_ctl {
 		uint64_t ctl_drp:1;
 		uint64_t pre_strp:1;
 		uint64_t pre_chk:1;
+#else
+		uint64_t pre_chk:1;
+		uint64_t pre_strp:1;
+		uint64_t ctl_drp:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_smac:1;
+		uint64_t pre_free:1;
+		uint64_t vlan_len:1;
+		uint64_t pad_len:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_rxx_frm_ctl_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t vlan_len:1;
 		uint64_t pre_free:1;
@@ -688,10 +3151,22 @@ union cvmx_gmxx_rxx_frm_ctl {
 		uint64_t ctl_drp:1;
 		uint64_t pre_strp:1;
 		uint64_t pre_chk:1;
+#else
+		uint64_t pre_chk:1;
+		uint64_t pre_strp:1;
+		uint64_t ctl_drp:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_smac:1;
+		uint64_t pre_free:1;
+		uint64_t vlan_len:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} cn31xx;
 	struct cvmx_gmxx_rxx_frm_ctl_cn30xx cn38xx;
 	struct cvmx_gmxx_rxx_frm_ctl_cn31xx cn38xxp2;
 	struct cvmx_gmxx_rxx_frm_ctl_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t null_dis:1;
 		uint64_t pre_align:1;
@@ -703,11 +3178,25 @@ union cvmx_gmxx_rxx_frm_ctl {
 		uint64_t ctl_drp:1;
 		uint64_t pre_strp:1;
 		uint64_t pre_chk:1;
+#else
+		uint64_t pre_chk:1;
+		uint64_t pre_strp:1;
+		uint64_t ctl_drp:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_smac:1;
+		uint64_t pre_free:1;
+		uint64_t reserved_7_8:2;
+		uint64_t pre_align:1;
+		uint64_t null_dis:1;
+		uint64_t reserved_11_63:53;
+#endif
 	} cn50xx;
 	struct cvmx_gmxx_rxx_frm_ctl_cn50xx cn52xx;
 	struct cvmx_gmxx_rxx_frm_ctl_cn50xx cn52xxp1;
 	struct cvmx_gmxx_rxx_frm_ctl_cn50xx cn56xx;
 	struct cvmx_gmxx_rxx_frm_ctl_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t pre_align:1;
 		uint64_t reserved_7_8:2;
@@ -718,16 +3207,98 @@ union cvmx_gmxx_rxx_frm_ctl {
 		uint64_t ctl_drp:1;
 		uint64_t pre_strp:1;
 		uint64_t pre_chk:1;
+#else
+		uint64_t pre_chk:1;
+		uint64_t pre_strp:1;
+		uint64_t ctl_drp:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_smac:1;
+		uint64_t pre_free:1;
+		uint64_t reserved_7_8:2;
+		uint64_t pre_align:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn56xxp1;
-	struct cvmx_gmxx_rxx_frm_ctl_s cn58xx;
+	struct cvmx_gmxx_rxx_frm_ctl_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_11_63:53;
+		uint64_t null_dis:1;
+		uint64_t pre_align:1;
+		uint64_t pad_len:1;
+		uint64_t vlan_len:1;
+		uint64_t pre_free:1;
+		uint64_t ctl_smac:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_drp:1;
+		uint64_t pre_strp:1;
+		uint64_t pre_chk:1;
+#else
+		uint64_t pre_chk:1;
+		uint64_t pre_strp:1;
+		uint64_t ctl_drp:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_smac:1;
+		uint64_t pre_free:1;
+		uint64_t vlan_len:1;
+		uint64_t pad_len:1;
+		uint64_t pre_align:1;
+		uint64_t null_dis:1;
+		uint64_t reserved_11_63:53;
+#endif
+	} cn58xx;
 	struct cvmx_gmxx_rxx_frm_ctl_cn30xx cn58xxp1;
+	struct cvmx_gmxx_rxx_frm_ctl_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_13_63:51;
+		uint64_t ptp_mode:1;
+		uint64_t reserved_11_11:1;
+		uint64_t null_dis:1;
+		uint64_t pre_align:1;
+		uint64_t reserved_7_8:2;
+		uint64_t pre_free:1;
+		uint64_t ctl_smac:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_drp:1;
+		uint64_t pre_strp:1;
+		uint64_t pre_chk:1;
+#else
+		uint64_t pre_chk:1;
+		uint64_t pre_strp:1;
+		uint64_t ctl_drp:1;
+		uint64_t ctl_bck:1;
+		uint64_t ctl_mcst:1;
+		uint64_t ctl_smac:1;
+		uint64_t pre_free:1;
+		uint64_t reserved_7_8:2;
+		uint64_t pre_align:1;
+		uint64_t null_dis:1;
+		uint64_t reserved_11_11:1;
+		uint64_t ptp_mode:1;
+		uint64_t reserved_13_63:51;
+#endif
+	} cn61xx;
+	struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn63xx;
+	struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn63xxp1;
+	struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn66xx;
+	struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn68xx;
+	struct cvmx_gmxx_rxx_frm_ctl_cn61xx cn68xxp1;
+	struct cvmx_gmxx_rxx_frm_ctl_cn61xx cnf71xx;
 };
 
 union cvmx_gmxx_rxx_frm_max {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_frm_max_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t len:16;
+#else
+		uint64_t len:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_frm_max_s cn30xx;
 	struct cvmx_gmxx_rxx_frm_max_s cn31xx;
@@ -740,8 +3311,13 @@ union cvmx_gmxx_rxx_frm_max {
 union cvmx_gmxx_rxx_frm_min {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_frm_min_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t len:16;
+#else
+		uint64_t len:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_frm_min_s cn30xx;
 	struct cvmx_gmxx_rxx_frm_min_s cn31xx;
@@ -754,8 +3330,13 @@ union cvmx_gmxx_rxx_frm_min {
 union cvmx_gmxx_rxx_ifg {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_ifg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t ifg:4;
+#else
+		uint64_t ifg:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_ifg_s cn30xx;
 	struct cvmx_gmxx_rxx_ifg_s cn31xx;
@@ -768,11 +3349,19 @@ union cvmx_gmxx_rxx_ifg {
 	struct cvmx_gmxx_rxx_ifg_s cn56xxp1;
 	struct cvmx_gmxx_rxx_ifg_s cn58xx;
 	struct cvmx_gmxx_rxx_ifg_s cn58xxp1;
+	struct cvmx_gmxx_rxx_ifg_s cn61xx;
+	struct cvmx_gmxx_rxx_ifg_s cn63xx;
+	struct cvmx_gmxx_rxx_ifg_s cn63xxp1;
+	struct cvmx_gmxx_rxx_ifg_s cn66xx;
+	struct cvmx_gmxx_rxx_ifg_s cn68xx;
+	struct cvmx_gmxx_rxx_ifg_s cn68xxp1;
+	struct cvmx_gmxx_rxx_ifg_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_int_en {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t hg2cc:1;
 		uint64_t hg2fld:1;
@@ -803,8 +3392,41 @@ union cvmx_gmxx_rxx_int_en {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t pause_drp:1;
+		uint64_t loc_fault:1;
+		uint64_t rem_fault:1;
+		uint64_t bad_seq:1;
+		uint64_t bad_term:1;
+		uint64_t unsop:1;
+		uint64_t uneop:1;
+		uint64_t undat:1;
+		uint64_t hg2fld:1;
+		uint64_t hg2cc:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_int_en_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t phy_dupx:1;
 		uint64_t phy_spd:1;
@@ -825,11 +3447,34 @@ union cvmx_gmxx_rxx_int_en {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_rxx_int_en_cn30xx cn31xx;
 	struct cvmx_gmxx_rxx_int_en_cn30xx cn38xx;
 	struct cvmx_gmxx_rxx_int_en_cn30xx cn38xxp2;
 	struct cvmx_gmxx_rxx_int_en_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t pause_drp:1;
 		uint64_t phy_dupx:1;
@@ -851,8 +3496,32 @@ union cvmx_gmxx_rxx_int_en {
 		uint64_t reserved_2_2:1;
 		uint64_t carext:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t reserved_6_6:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t pause_drp:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn50xx;
 	struct cvmx_gmxx_rxx_int_en_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t hg2cc:1;
 		uint64_t hg2fld:1;
@@ -880,10 +3549,40 @@ union cvmx_gmxx_rxx_int_en {
 		uint64_t reserved_2_2:1;
 		uint64_t carext:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t reserved_16_18:3;
+		uint64_t pause_drp:1;
+		uint64_t loc_fault:1;
+		uint64_t rem_fault:1;
+		uint64_t bad_seq:1;
+		uint64_t bad_term:1;
+		uint64_t unsop:1;
+		uint64_t uneop:1;
+		uint64_t undat:1;
+		uint64_t hg2fld:1;
+		uint64_t hg2cc:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn52xx;
 	struct cvmx_gmxx_rxx_int_en_cn52xx cn52xxp1;
 	struct cvmx_gmxx_rxx_int_en_cn52xx cn56xx;
 	struct cvmx_gmxx_rxx_int_en_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_27_63:37;
 		uint64_t undat:1;
 		uint64_t uneop:1;
@@ -909,8 +3608,36 @@ union cvmx_gmxx_rxx_int_en {
 		uint64_t reserved_2_2:1;
 		uint64_t carext:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t reserved_16_18:3;
+		uint64_t pause_drp:1;
+		uint64_t loc_fault:1;
+		uint64_t rem_fault:1;
+		uint64_t bad_seq:1;
+		uint64_t bad_term:1;
+		uint64_t unsop:1;
+		uint64_t uneop:1;
+		uint64_t undat:1;
+		uint64_t reserved_27_63:37;
+#endif
 	} cn56xxp1;
 	struct cvmx_gmxx_rxx_int_en_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t pause_drp:1;
 		uint64_t phy_dupx:1;
@@ -932,13 +3659,102 @@ union cvmx_gmxx_rxx_int_en {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t pause_drp:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn58xx;
 	struct cvmx_gmxx_rxx_int_en_cn58xx cn58xxp1;
+	struct cvmx_gmxx_rxx_int_en_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t hg2cc:1;
+		uint64_t hg2fld:1;
+		uint64_t undat:1;
+		uint64_t uneop:1;
+		uint64_t unsop:1;
+		uint64_t bad_term:1;
+		uint64_t bad_seq:1;
+		uint64_t rem_fault:1;
+		uint64_t loc_fault:1;
+		uint64_t pause_drp:1;
+		uint64_t reserved_16_18:3;
+		uint64_t ifgerr:1;
+		uint64_t coldet:1;
+		uint64_t falerr:1;
+		uint64_t rsverr:1;
+		uint64_t pcterr:1;
+		uint64_t ovrerr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t skperr:1;
+		uint64_t rcverr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t fcserr:1;
+		uint64_t jabber:1;
+		uint64_t reserved_2_2:1;
+		uint64_t carext:1;
+		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t reserved_16_18:3;
+		uint64_t pause_drp:1;
+		uint64_t loc_fault:1;
+		uint64_t rem_fault:1;
+		uint64_t bad_seq:1;
+		uint64_t bad_term:1;
+		uint64_t unsop:1;
+		uint64_t uneop:1;
+		uint64_t undat:1;
+		uint64_t hg2fld:1;
+		uint64_t hg2cc:1;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn61xx;
+	struct cvmx_gmxx_rxx_int_en_cn61xx cn63xx;
+	struct cvmx_gmxx_rxx_int_en_cn61xx cn63xxp1;
+	struct cvmx_gmxx_rxx_int_en_cn61xx cn66xx;
+	struct cvmx_gmxx_rxx_int_en_cn61xx cn68xx;
+	struct cvmx_gmxx_rxx_int_en_cn61xx cn68xxp1;
+	struct cvmx_gmxx_rxx_int_en_cn61xx cnf71xx;
 };
 
 union cvmx_gmxx_rxx_int_reg {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t hg2cc:1;
 		uint64_t hg2fld:1;
@@ -969,8 +3785,41 @@ union cvmx_gmxx_rxx_int_reg {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t pause_drp:1;
+		uint64_t loc_fault:1;
+		uint64_t rem_fault:1;
+		uint64_t bad_seq:1;
+		uint64_t bad_term:1;
+		uint64_t unsop:1;
+		uint64_t uneop:1;
+		uint64_t undat:1;
+		uint64_t hg2fld:1;
+		uint64_t hg2cc:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_int_reg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t phy_dupx:1;
 		uint64_t phy_spd:1;
@@ -991,11 +3840,34 @@ union cvmx_gmxx_rxx_int_reg {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_rxx_int_reg_cn30xx cn31xx;
 	struct cvmx_gmxx_rxx_int_reg_cn30xx cn38xx;
 	struct cvmx_gmxx_rxx_int_reg_cn30xx cn38xxp2;
 	struct cvmx_gmxx_rxx_int_reg_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t pause_drp:1;
 		uint64_t phy_dupx:1;
@@ -1017,8 +3889,32 @@ union cvmx_gmxx_rxx_int_reg {
 		uint64_t reserved_2_2:1;
 		uint64_t carext:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t reserved_6_6:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t pause_drp:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn50xx;
 	struct cvmx_gmxx_rxx_int_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t hg2cc:1;
 		uint64_t hg2fld:1;
@@ -1046,10 +3942,40 @@ union cvmx_gmxx_rxx_int_reg {
 		uint64_t reserved_2_2:1;
 		uint64_t carext:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t reserved_16_18:3;
+		uint64_t pause_drp:1;
+		uint64_t loc_fault:1;
+		uint64_t rem_fault:1;
+		uint64_t bad_seq:1;
+		uint64_t bad_term:1;
+		uint64_t unsop:1;
+		uint64_t uneop:1;
+		uint64_t undat:1;
+		uint64_t hg2fld:1;
+		uint64_t hg2cc:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn52xx;
 	struct cvmx_gmxx_rxx_int_reg_cn52xx cn52xxp1;
 	struct cvmx_gmxx_rxx_int_reg_cn52xx cn56xx;
 	struct cvmx_gmxx_rxx_int_reg_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_27_63:37;
 		uint64_t undat:1;
 		uint64_t uneop:1;
@@ -1075,8 +4001,36 @@ union cvmx_gmxx_rxx_int_reg {
 		uint64_t reserved_2_2:1;
 		uint64_t carext:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t reserved_16_18:3;
+		uint64_t pause_drp:1;
+		uint64_t loc_fault:1;
+		uint64_t rem_fault:1;
+		uint64_t bad_seq:1;
+		uint64_t bad_term:1;
+		uint64_t unsop:1;
+		uint64_t uneop:1;
+		uint64_t undat:1;
+		uint64_t reserved_27_63:37;
+#endif
 	} cn56xxp1;
 	struct cvmx_gmxx_rxx_int_reg_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t pause_drp:1;
 		uint64_t phy_dupx:1;
@@ -1098,15 +4052,108 @@ union cvmx_gmxx_rxx_int_reg {
 		uint64_t maxerr:1;
 		uint64_t carext:1;
 		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t maxerr:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t alnerr:1;
+		uint64_t lenerr:1;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t niberr:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t phy_link:1;
+		uint64_t phy_spd:1;
+		uint64_t phy_dupx:1;
+		uint64_t pause_drp:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn58xx;
 	struct cvmx_gmxx_rxx_int_reg_cn58xx cn58xxp1;
+	struct cvmx_gmxx_rxx_int_reg_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t hg2cc:1;
+		uint64_t hg2fld:1;
+		uint64_t undat:1;
+		uint64_t uneop:1;
+		uint64_t unsop:1;
+		uint64_t bad_term:1;
+		uint64_t bad_seq:1;
+		uint64_t rem_fault:1;
+		uint64_t loc_fault:1;
+		uint64_t pause_drp:1;
+		uint64_t reserved_16_18:3;
+		uint64_t ifgerr:1;
+		uint64_t coldet:1;
+		uint64_t falerr:1;
+		uint64_t rsverr:1;
+		uint64_t pcterr:1;
+		uint64_t ovrerr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t skperr:1;
+		uint64_t rcverr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t fcserr:1;
+		uint64_t jabber:1;
+		uint64_t reserved_2_2:1;
+		uint64_t carext:1;
+		uint64_t minerr:1;
+#else
+		uint64_t minerr:1;
+		uint64_t carext:1;
+		uint64_t reserved_2_2:1;
+		uint64_t jabber:1;
+		uint64_t fcserr:1;
+		uint64_t reserved_5_6:2;
+		uint64_t rcverr:1;
+		uint64_t skperr:1;
+		uint64_t reserved_9_9:1;
+		uint64_t ovrerr:1;
+		uint64_t pcterr:1;
+		uint64_t rsverr:1;
+		uint64_t falerr:1;
+		uint64_t coldet:1;
+		uint64_t ifgerr:1;
+		uint64_t reserved_16_18:3;
+		uint64_t pause_drp:1;
+		uint64_t loc_fault:1;
+		uint64_t rem_fault:1;
+		uint64_t bad_seq:1;
+		uint64_t bad_term:1;
+		uint64_t unsop:1;
+		uint64_t uneop:1;
+		uint64_t undat:1;
+		uint64_t hg2fld:1;
+		uint64_t hg2cc:1;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn61xx;
+	struct cvmx_gmxx_rxx_int_reg_cn61xx cn63xx;
+	struct cvmx_gmxx_rxx_int_reg_cn61xx cn63xxp1;
+	struct cvmx_gmxx_rxx_int_reg_cn61xx cn66xx;
+	struct cvmx_gmxx_rxx_int_reg_cn61xx cn68xx;
+	struct cvmx_gmxx_rxx_int_reg_cn61xx cn68xxp1;
+	struct cvmx_gmxx_rxx_int_reg_cn61xx cnf71xx;
 };
 
 union cvmx_gmxx_rxx_jabber {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_jabber_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt:16;
+#else
+		uint64_t cnt:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_jabber_s cn30xx;
 	struct cvmx_gmxx_rxx_jabber_s cn31xx;
@@ -1119,13 +4166,25 @@ union cvmx_gmxx_rxx_jabber {
 	struct cvmx_gmxx_rxx_jabber_s cn56xxp1;
 	struct cvmx_gmxx_rxx_jabber_s cn58xx;
 	struct cvmx_gmxx_rxx_jabber_s cn58xxp1;
+	struct cvmx_gmxx_rxx_jabber_s cn61xx;
+	struct cvmx_gmxx_rxx_jabber_s cn63xx;
+	struct cvmx_gmxx_rxx_jabber_s cn63xxp1;
+	struct cvmx_gmxx_rxx_jabber_s cn66xx;
+	struct cvmx_gmxx_rxx_jabber_s cn68xx;
+	struct cvmx_gmxx_rxx_jabber_s cn68xxp1;
+	struct cvmx_gmxx_rxx_jabber_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_pause_drop_time {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_pause_drop_time_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t status:16;
+#else
+		uint64_t status:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_pause_drop_time_s cn50xx;
 	struct cvmx_gmxx_rxx_pause_drop_time_s cn52xx;
@@ -1134,15 +4193,29 @@ union cvmx_gmxx_rxx_pause_drop_time {
 	struct cvmx_gmxx_rxx_pause_drop_time_s cn56xxp1;
 	struct cvmx_gmxx_rxx_pause_drop_time_s cn58xx;
 	struct cvmx_gmxx_rxx_pause_drop_time_s cn58xxp1;
+	struct cvmx_gmxx_rxx_pause_drop_time_s cn61xx;
+	struct cvmx_gmxx_rxx_pause_drop_time_s cn63xx;
+	struct cvmx_gmxx_rxx_pause_drop_time_s cn63xxp1;
+	struct cvmx_gmxx_rxx_pause_drop_time_s cn66xx;
+	struct cvmx_gmxx_rxx_pause_drop_time_s cn68xx;
+	struct cvmx_gmxx_rxx_pause_drop_time_s cn68xxp1;
+	struct cvmx_gmxx_rxx_pause_drop_time_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_rx_inbnd {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_rx_inbnd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t duplex:1;
 		uint64_t speed:2;
 		uint64_t status:1;
+#else
+		uint64_t status:1;
+		uint64_t speed:2;
+		uint64_t duplex:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_rx_inbnd_s cn30xx;
 	struct cvmx_gmxx_rxx_rx_inbnd_s cn31xx;
@@ -1156,8 +4229,13 @@ union cvmx_gmxx_rxx_rx_inbnd {
 union cvmx_gmxx_rxx_stats_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t rd_clr:1;
+#else
+		uint64_t rd_clr:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_ctl_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_ctl_s cn31xx;
@@ -1170,13 +4248,25 @@ union cvmx_gmxx_rxx_stats_ctl {
 	struct cvmx_gmxx_rxx_stats_ctl_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_ctl_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_ctl_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_ctl_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_ctl_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_ctl_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_ctl_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_ctl_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_ctl_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_ctl_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_stats_octs {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_octs_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t cnt:48;
+#else
+		uint64_t cnt:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_octs_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_octs_s cn31xx;
@@ -1189,13 +4279,25 @@ union cvmx_gmxx_rxx_stats_octs {
 	struct cvmx_gmxx_rxx_stats_octs_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_octs_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_octs_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_octs_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_octs_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_octs_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_octs_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_stats_octs_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_octs_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t cnt:48;
+#else
+		uint64_t cnt:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn31xx;
@@ -1208,13 +4310,25 @@ union cvmx_gmxx_rxx_stats_octs_ctl {
 	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_octs_ctl_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_ctl_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_stats_octs_dmac {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_octs_dmac_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t cnt:48;
+#else
+		uint64_t cnt:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn31xx;
@@ -1227,13 +4341,25 @@ union cvmx_gmxx_rxx_stats_octs_dmac {
 	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_octs_dmac_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_dmac_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_stats_octs_drp {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_octs_drp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t cnt:48;
+#else
+		uint64_t cnt:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_octs_drp_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_octs_drp_s cn31xx;
@@ -1246,13 +4372,25 @@ union cvmx_gmxx_rxx_stats_octs_drp {
 	struct cvmx_gmxx_rxx_stats_octs_drp_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_octs_drp_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_octs_drp_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_drp_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_octs_drp_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_octs_drp_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_drp_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_octs_drp_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_octs_drp_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_octs_drp_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_stats_pkts {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_pkts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_pkts_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_pkts_s cn31xx;
@@ -1265,13 +4403,25 @@ union cvmx_gmxx_rxx_stats_pkts {
 	struct cvmx_gmxx_rxx_stats_pkts_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_pkts_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_pkts_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_pkts_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_pkts_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_pkts_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_pkts_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_stats_pkts_bad {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_pkts_bad_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn31xx;
@@ -1284,13 +4434,25 @@ union cvmx_gmxx_rxx_stats_pkts_bad {
 	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_pkts_bad_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_bad_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_stats_pkts_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_pkts_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn31xx;
@@ -1303,13 +4465,25 @@ union cvmx_gmxx_rxx_stats_pkts_ctl {
 	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_ctl_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_stats_pkts_dmac {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_pkts_dmac_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn31xx;
@@ -1322,13 +4496,25 @@ union cvmx_gmxx_rxx_stats_pkts_dmac {
 	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_dmac_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_stats_pkts_drp {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_stats_pkts_drp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn30xx;
 	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn31xx;
@@ -1341,15 +4527,29 @@ union cvmx_gmxx_rxx_stats_pkts_drp {
 	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn56xxp1;
 	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn58xx;
 	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn58xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn61xx;
+	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn63xx;
+	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn63xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn66xx;
+	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn68xx;
+	struct cvmx_gmxx_rxx_stats_pkts_drp_s cn68xxp1;
+	struct cvmx_gmxx_rxx_stats_pkts_drp_s cnf71xx;
 };
 
 union cvmx_gmxx_rxx_udd_skp {
 	uint64_t u64;
 	struct cvmx_gmxx_rxx_udd_skp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t fcssel:1;
 		uint64_t reserved_7_7:1;
 		uint64_t len:7;
+#else
+		uint64_t len:7;
+		uint64_t reserved_7_7:1;
+		uint64_t fcssel:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_gmxx_rxx_udd_skp_s cn30xx;
 	struct cvmx_gmxx_rxx_udd_skp_s cn31xx;
@@ -1362,13 +4562,25 @@ union cvmx_gmxx_rxx_udd_skp {
 	struct cvmx_gmxx_rxx_udd_skp_s cn56xxp1;
 	struct cvmx_gmxx_rxx_udd_skp_s cn58xx;
 	struct cvmx_gmxx_rxx_udd_skp_s cn58xxp1;
+	struct cvmx_gmxx_rxx_udd_skp_s cn61xx;
+	struct cvmx_gmxx_rxx_udd_skp_s cn63xx;
+	struct cvmx_gmxx_rxx_udd_skp_s cn63xxp1;
+	struct cvmx_gmxx_rxx_udd_skp_s cn66xx;
+	struct cvmx_gmxx_rxx_udd_skp_s cn68xx;
+	struct cvmx_gmxx_rxx_udd_skp_s cn68xxp1;
+	struct cvmx_gmxx_rxx_udd_skp_s cnf71xx;
 };
 
 union cvmx_gmxx_rx_bp_dropx {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_bp_dropx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t mark:6;
+#else
+		uint64_t mark:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_bp_dropx_s cn30xx;
 	struct cvmx_gmxx_rx_bp_dropx_s cn31xx;
@@ -1381,13 +4593,25 @@ union cvmx_gmxx_rx_bp_dropx {
 	struct cvmx_gmxx_rx_bp_dropx_s cn56xxp1;
 	struct cvmx_gmxx_rx_bp_dropx_s cn58xx;
 	struct cvmx_gmxx_rx_bp_dropx_s cn58xxp1;
+	struct cvmx_gmxx_rx_bp_dropx_s cn61xx;
+	struct cvmx_gmxx_rx_bp_dropx_s cn63xx;
+	struct cvmx_gmxx_rx_bp_dropx_s cn63xxp1;
+	struct cvmx_gmxx_rx_bp_dropx_s cn66xx;
+	struct cvmx_gmxx_rx_bp_dropx_s cn68xx;
+	struct cvmx_gmxx_rx_bp_dropx_s cn68xxp1;
+	struct cvmx_gmxx_rx_bp_dropx_s cnf71xx;
 };
 
 union cvmx_gmxx_rx_bp_offx {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_bp_offx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t mark:6;
+#else
+		uint64_t mark:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_bp_offx_s cn30xx;
 	struct cvmx_gmxx_rx_bp_offx_s cn31xx;
@@ -1400,45 +4624,91 @@ union cvmx_gmxx_rx_bp_offx {
 	struct cvmx_gmxx_rx_bp_offx_s cn56xxp1;
 	struct cvmx_gmxx_rx_bp_offx_s cn58xx;
 	struct cvmx_gmxx_rx_bp_offx_s cn58xxp1;
+	struct cvmx_gmxx_rx_bp_offx_s cn61xx;
+	struct cvmx_gmxx_rx_bp_offx_s cn63xx;
+	struct cvmx_gmxx_rx_bp_offx_s cn63xxp1;
+	struct cvmx_gmxx_rx_bp_offx_s cn66xx;
+	struct cvmx_gmxx_rx_bp_offx_s cn68xx;
+	struct cvmx_gmxx_rx_bp_offx_s cn68xxp1;
+	struct cvmx_gmxx_rx_bp_offx_s cnf71xx;
 };
 
 union cvmx_gmxx_rx_bp_onx {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_bp_onx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_11_63:53;
+		uint64_t mark:11;
+#else
+		uint64_t mark:11;
+		uint64_t reserved_11_63:53;
+#endif
+	} s;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t mark:9;
-	} s;
-	struct cvmx_gmxx_rx_bp_onx_s cn30xx;
-	struct cvmx_gmxx_rx_bp_onx_s cn31xx;
-	struct cvmx_gmxx_rx_bp_onx_s cn38xx;
-	struct cvmx_gmxx_rx_bp_onx_s cn38xxp2;
-	struct cvmx_gmxx_rx_bp_onx_s cn50xx;
-	struct cvmx_gmxx_rx_bp_onx_s cn52xx;
-	struct cvmx_gmxx_rx_bp_onx_s cn52xxp1;
-	struct cvmx_gmxx_rx_bp_onx_s cn56xx;
-	struct cvmx_gmxx_rx_bp_onx_s cn56xxp1;
-	struct cvmx_gmxx_rx_bp_onx_s cn58xx;
-	struct cvmx_gmxx_rx_bp_onx_s cn58xxp1;
+#else
+		uint64_t mark:9;
+		uint64_t reserved_9_63:55;
+#endif
+	} cn30xx;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn31xx;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn38xx;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn38xxp2;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn50xx;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn52xx;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn52xxp1;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn56xx;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn56xxp1;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn58xx;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn58xxp1;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn61xx;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn63xx;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn63xxp1;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cn66xx;
+	struct cvmx_gmxx_rx_bp_onx_s cn68xx;
+	struct cvmx_gmxx_rx_bp_onx_s cn68xxp1;
+	struct cvmx_gmxx_rx_bp_onx_cn30xx cnf71xx;
 };
 
 union cvmx_gmxx_rx_hg2_status {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_hg2_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t phtim2go:16;
 		uint64_t xof:16;
 		uint64_t lgtim2go:16;
+#else
+		uint64_t lgtim2go:16;
+		uint64_t xof:16;
+		uint64_t phtim2go:16;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_hg2_status_s cn52xx;
 	struct cvmx_gmxx_rx_hg2_status_s cn52xxp1;
 	struct cvmx_gmxx_rx_hg2_status_s cn56xx;
+	struct cvmx_gmxx_rx_hg2_status_s cn61xx;
+	struct cvmx_gmxx_rx_hg2_status_s cn63xx;
+	struct cvmx_gmxx_rx_hg2_status_s cn63xxp1;
+	struct cvmx_gmxx_rx_hg2_status_s cn66xx;
+	struct cvmx_gmxx_rx_hg2_status_s cn68xx;
+	struct cvmx_gmxx_rx_hg2_status_s cn68xxp1;
+	struct cvmx_gmxx_rx_hg2_status_s cnf71xx;
 };
 
 union cvmx_gmxx_rx_pass_en {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_pass_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t en:16;
+#else
+		uint64_t en:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_pass_en_s cn38xx;
 	struct cvmx_gmxx_rx_pass_en_s cn38xxp2;
@@ -1449,8 +4719,13 @@ union cvmx_gmxx_rx_pass_en {
 union cvmx_gmxx_rx_pass_mapx {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_pass_mapx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t dprt:4;
+#else
+		uint64_t dprt:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_pass_mapx_s cn38xx;
 	struct cvmx_gmxx_rx_pass_mapx_s cn38xxp2;
@@ -1461,37 +4736,81 @@ union cvmx_gmxx_rx_pass_mapx {
 union cvmx_gmxx_rx_prt_info {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_prt_info_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t drop:16;
 		uint64_t commit:16;
+#else
+		uint64_t commit:16;
+		uint64_t drop:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_prt_info_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t drop:3;
 		uint64_t reserved_3_15:13;
 		uint64_t commit:3;
+#else
+		uint64_t commit:3;
+		uint64_t reserved_3_15:13;
+		uint64_t drop:3;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_rx_prt_info_cn30xx cn31xx;
 	struct cvmx_gmxx_rx_prt_info_s cn38xx;
 	struct cvmx_gmxx_rx_prt_info_cn30xx cn50xx;
 	struct cvmx_gmxx_rx_prt_info_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t drop:4;
 		uint64_t reserved_4_15:12;
 		uint64_t commit:4;
+#else
+		uint64_t commit:4;
+		uint64_t reserved_4_15:12;
+		uint64_t drop:4;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_gmxx_rx_prt_info_cn52xx cn52xxp1;
 	struct cvmx_gmxx_rx_prt_info_cn52xx cn56xx;
 	struct cvmx_gmxx_rx_prt_info_cn52xx cn56xxp1;
 	struct cvmx_gmxx_rx_prt_info_s cn58xx;
 	struct cvmx_gmxx_rx_prt_info_s cn58xxp1;
+	struct cvmx_gmxx_rx_prt_info_cn52xx cn61xx;
+	struct cvmx_gmxx_rx_prt_info_cn52xx cn63xx;
+	struct cvmx_gmxx_rx_prt_info_cn52xx cn63xxp1;
+	struct cvmx_gmxx_rx_prt_info_cn52xx cn66xx;
+	struct cvmx_gmxx_rx_prt_info_cn52xx cn68xx;
+	struct cvmx_gmxx_rx_prt_info_cn52xx cn68xxp1;
+	struct cvmx_gmxx_rx_prt_info_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_18_63:46;
+		uint64_t drop:2;
+		uint64_t reserved_2_15:14;
+		uint64_t commit:2;
+#else
+		uint64_t commit:2;
+		uint64_t reserved_2_15:14;
+		uint64_t drop:2;
+		uint64_t reserved_18_63:46;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_gmxx_rx_prts {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_prts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t prts:3;
+#else
+		uint64_t prts:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_prts_s cn30xx;
 	struct cvmx_gmxx_rx_prts_s cn31xx;
@@ -1504,15 +4823,29 @@ union cvmx_gmxx_rx_prts {
 	struct cvmx_gmxx_rx_prts_s cn56xxp1;
 	struct cvmx_gmxx_rx_prts_s cn58xx;
 	struct cvmx_gmxx_rx_prts_s cn58xxp1;
+	struct cvmx_gmxx_rx_prts_s cn61xx;
+	struct cvmx_gmxx_rx_prts_s cn63xx;
+	struct cvmx_gmxx_rx_prts_s cn63xxp1;
+	struct cvmx_gmxx_rx_prts_s cn66xx;
+	struct cvmx_gmxx_rx_prts_s cn68xx;
+	struct cvmx_gmxx_rx_prts_s cn68xxp1;
+	struct cvmx_gmxx_rx_prts_s cnf71xx;
 };
 
 union cvmx_gmxx_rx_tx_status {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_tx_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t tx:3;
 		uint64_t reserved_3_3:1;
 		uint64_t rx:3;
+#else
+		uint64_t rx:3;
+		uint64_t reserved_3_3:1;
+		uint64_t tx:3;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_tx_status_s cn30xx;
 	struct cvmx_gmxx_rx_tx_status_s cn31xx;
@@ -1522,35 +4855,82 @@ union cvmx_gmxx_rx_tx_status {
 union cvmx_gmxx_rx_xaui_bad_col {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_xaui_bad_col_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t val:1;
 		uint64_t state:3;
 		uint64_t lane_rxc:4;
 		uint64_t lane_rxd:32;
+#else
+		uint64_t lane_rxd:32;
+		uint64_t lane_rxc:4;
+		uint64_t state:3;
+		uint64_t val:1;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_xaui_bad_col_s cn52xx;
 	struct cvmx_gmxx_rx_xaui_bad_col_s cn52xxp1;
 	struct cvmx_gmxx_rx_xaui_bad_col_s cn56xx;
 	struct cvmx_gmxx_rx_xaui_bad_col_s cn56xxp1;
+	struct cvmx_gmxx_rx_xaui_bad_col_s cn61xx;
+	struct cvmx_gmxx_rx_xaui_bad_col_s cn63xx;
+	struct cvmx_gmxx_rx_xaui_bad_col_s cn63xxp1;
+	struct cvmx_gmxx_rx_xaui_bad_col_s cn66xx;
+	struct cvmx_gmxx_rx_xaui_bad_col_s cn68xx;
+	struct cvmx_gmxx_rx_xaui_bad_col_s cn68xxp1;
+	struct cvmx_gmxx_rx_xaui_bad_col_s cnf71xx;
 };
 
 union cvmx_gmxx_rx_xaui_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_rx_xaui_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t status:2;
+#else
+		uint64_t status:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_gmxx_rx_xaui_ctl_s cn52xx;
 	struct cvmx_gmxx_rx_xaui_ctl_s cn52xxp1;
 	struct cvmx_gmxx_rx_xaui_ctl_s cn56xx;
 	struct cvmx_gmxx_rx_xaui_ctl_s cn56xxp1;
+	struct cvmx_gmxx_rx_xaui_ctl_s cn61xx;
+	struct cvmx_gmxx_rx_xaui_ctl_s cn63xx;
+	struct cvmx_gmxx_rx_xaui_ctl_s cn63xxp1;
+	struct cvmx_gmxx_rx_xaui_ctl_s cn66xx;
+	struct cvmx_gmxx_rx_xaui_ctl_s cn68xx;
+	struct cvmx_gmxx_rx_xaui_ctl_s cn68xxp1;
+	struct cvmx_gmxx_rx_xaui_ctl_s cnf71xx;
+};
+
+union cvmx_gmxx_rxaui_ctl {
+	uint64_t u64;
+	struct cvmx_gmxx_rxaui_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t disparity:1;
+#else
+		uint64_t disparity:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_gmxx_rxaui_ctl_s cn68xx;
+	struct cvmx_gmxx_rxaui_ctl_s cn68xxp1;
 };
 
 union cvmx_gmxx_smacx {
 	uint64_t u64;
 	struct cvmx_gmxx_smacx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t smac:48;
+#else
+		uint64_t smac:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_gmxx_smacx_s cn30xx;
 	struct cvmx_gmxx_smacx_s cn31xx;
@@ -1563,14 +4943,47 @@ union cvmx_gmxx_smacx {
 	struct cvmx_gmxx_smacx_s cn56xxp1;
 	struct cvmx_gmxx_smacx_s cn58xx;
 	struct cvmx_gmxx_smacx_s cn58xxp1;
+	struct cvmx_gmxx_smacx_s cn61xx;
+	struct cvmx_gmxx_smacx_s cn63xx;
+	struct cvmx_gmxx_smacx_s cn63xxp1;
+	struct cvmx_gmxx_smacx_s cn66xx;
+	struct cvmx_gmxx_smacx_s cn68xx;
+	struct cvmx_gmxx_smacx_s cn68xxp1;
+	struct cvmx_gmxx_smacx_s cnf71xx;
+};
+
+union cvmx_gmxx_soft_bist {
+	uint64_t u64;
+	struct cvmx_gmxx_soft_bist_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_2_63:62;
+		uint64_t start_bist:1;
+		uint64_t clear_bist:1;
+#else
+		uint64_t clear_bist:1;
+		uint64_t start_bist:1;
+		uint64_t reserved_2_63:62;
+#endif
+	} s;
+	struct cvmx_gmxx_soft_bist_s cn63xx;
+	struct cvmx_gmxx_soft_bist_s cn63xxp1;
+	struct cvmx_gmxx_soft_bist_s cn66xx;
+	struct cvmx_gmxx_soft_bist_s cn68xx;
+	struct cvmx_gmxx_soft_bist_s cn68xxp1;
 };
 
 union cvmx_gmxx_stat_bp {
 	uint64_t u64;
 	struct cvmx_gmxx_stat_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t bp:1;
 		uint64_t cnt:16;
+#else
+		uint64_t cnt:16;
+		uint64_t bp:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_gmxx_stat_bp_s cn30xx;
 	struct cvmx_gmxx_stat_bp_s cn31xx;
@@ -1583,16 +4996,48 @@ union cvmx_gmxx_stat_bp {
 	struct cvmx_gmxx_stat_bp_s cn56xxp1;
 	struct cvmx_gmxx_stat_bp_s cn58xx;
 	struct cvmx_gmxx_stat_bp_s cn58xxp1;
+	struct cvmx_gmxx_stat_bp_s cn61xx;
+	struct cvmx_gmxx_stat_bp_s cn63xx;
+	struct cvmx_gmxx_stat_bp_s cn63xxp1;
+	struct cvmx_gmxx_stat_bp_s cn66xx;
+	struct cvmx_gmxx_stat_bp_s cn68xx;
+	struct cvmx_gmxx_stat_bp_s cn68xxp1;
+	struct cvmx_gmxx_stat_bp_s cnf71xx;
+};
+
+union cvmx_gmxx_tb_reg {
+	uint64_t u64;
+	struct cvmx_gmxx_tb_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t wr_magic:1;
+#else
+		uint64_t wr_magic:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_gmxx_tb_reg_s cn61xx;
+	struct cvmx_gmxx_tb_reg_s cn66xx;
+	struct cvmx_gmxx_tb_reg_s cn68xx;
+	struct cvmx_gmxx_tb_reg_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_append {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_append_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t force_fcs:1;
 		uint64_t fcs:1;
 		uint64_t pad:1;
 		uint64_t preamble:1;
+#else
+		uint64_t preamble:1;
+		uint64_t pad:1;
+		uint64_t fcs:1;
+		uint64_t force_fcs:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_append_s cn30xx;
 	struct cvmx_gmxx_txx_append_s cn31xx;
@@ -1605,13 +5050,25 @@ union cvmx_gmxx_txx_append {
 	struct cvmx_gmxx_txx_append_s cn56xxp1;
 	struct cvmx_gmxx_txx_append_s cn58xx;
 	struct cvmx_gmxx_txx_append_s cn58xxp1;
+	struct cvmx_gmxx_txx_append_s cn61xx;
+	struct cvmx_gmxx_txx_append_s cn63xx;
+	struct cvmx_gmxx_txx_append_s cn63xxp1;
+	struct cvmx_gmxx_txx_append_s cn66xx;
+	struct cvmx_gmxx_txx_append_s cn68xx;
+	struct cvmx_gmxx_txx_append_s cn68xxp1;
+	struct cvmx_gmxx_txx_append_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_burst {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_burst_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t burst:16;
+#else
+		uint64_t burst:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_burst_s cn30xx;
 	struct cvmx_gmxx_txx_burst_s cn31xx;
@@ -1624,33 +5081,69 @@ union cvmx_gmxx_txx_burst {
 	struct cvmx_gmxx_txx_burst_s cn56xxp1;
 	struct cvmx_gmxx_txx_burst_s cn58xx;
 	struct cvmx_gmxx_txx_burst_s cn58xxp1;
+	struct cvmx_gmxx_txx_burst_s cn61xx;
+	struct cvmx_gmxx_txx_burst_s cn63xx;
+	struct cvmx_gmxx_txx_burst_s cn63xxp1;
+	struct cvmx_gmxx_txx_burst_s cn66xx;
+	struct cvmx_gmxx_txx_burst_s cn68xx;
+	struct cvmx_gmxx_txx_burst_s cn68xxp1;
+	struct cvmx_gmxx_txx_burst_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_cbfc_xoff {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_cbfc_xoff_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t xoff:16;
+#else
+		uint64_t xoff:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_cbfc_xoff_s cn52xx;
 	struct cvmx_gmxx_txx_cbfc_xoff_s cn56xx;
+	struct cvmx_gmxx_txx_cbfc_xoff_s cn61xx;
+	struct cvmx_gmxx_txx_cbfc_xoff_s cn63xx;
+	struct cvmx_gmxx_txx_cbfc_xoff_s cn63xxp1;
+	struct cvmx_gmxx_txx_cbfc_xoff_s cn66xx;
+	struct cvmx_gmxx_txx_cbfc_xoff_s cn68xx;
+	struct cvmx_gmxx_txx_cbfc_xoff_s cn68xxp1;
+	struct cvmx_gmxx_txx_cbfc_xoff_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_cbfc_xon {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_cbfc_xon_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t xon:16;
+#else
+		uint64_t xon:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_cbfc_xon_s cn52xx;
 	struct cvmx_gmxx_txx_cbfc_xon_s cn56xx;
+	struct cvmx_gmxx_txx_cbfc_xon_s cn61xx;
+	struct cvmx_gmxx_txx_cbfc_xon_s cn63xx;
+	struct cvmx_gmxx_txx_cbfc_xon_s cn63xxp1;
+	struct cvmx_gmxx_txx_cbfc_xon_s cn66xx;
+	struct cvmx_gmxx_txx_cbfc_xon_s cn68xx;
+	struct cvmx_gmxx_txx_cbfc_xon_s cn68xxp1;
+	struct cvmx_gmxx_txx_cbfc_xon_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_clk {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_clk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t clk_cnt:6;
+#else
+		uint64_t clk_cnt:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_clk_s cn30xx;
 	struct cvmx_gmxx_txx_clk_s cn31xx;
@@ -1664,9 +5157,15 @@ union cvmx_gmxx_txx_clk {
 union cvmx_gmxx_txx_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t xsdef_en:1;
 		uint64_t xscol_en:1;
+#else
+		uint64_t xscol_en:1;
+		uint64_t xsdef_en:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_ctl_s cn30xx;
 	struct cvmx_gmxx_txx_ctl_s cn31xx;
@@ -1679,13 +5178,25 @@ union cvmx_gmxx_txx_ctl {
 	struct cvmx_gmxx_txx_ctl_s cn56xxp1;
 	struct cvmx_gmxx_txx_ctl_s cn58xx;
 	struct cvmx_gmxx_txx_ctl_s cn58xxp1;
+	struct cvmx_gmxx_txx_ctl_s cn61xx;
+	struct cvmx_gmxx_txx_ctl_s cn63xx;
+	struct cvmx_gmxx_txx_ctl_s cn63xxp1;
+	struct cvmx_gmxx_txx_ctl_s cn66xx;
+	struct cvmx_gmxx_txx_ctl_s cn68xx;
+	struct cvmx_gmxx_txx_ctl_s cn68xxp1;
+	struct cvmx_gmxx_txx_ctl_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_min_pkt {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_min_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t min_size:8;
+#else
+		uint64_t min_size:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_min_pkt_s cn30xx;
 	struct cvmx_gmxx_txx_min_pkt_s cn31xx;
@@ -1698,13 +5209,25 @@ union cvmx_gmxx_txx_min_pkt {
 	struct cvmx_gmxx_txx_min_pkt_s cn56xxp1;
 	struct cvmx_gmxx_txx_min_pkt_s cn58xx;
 	struct cvmx_gmxx_txx_min_pkt_s cn58xxp1;
+	struct cvmx_gmxx_txx_min_pkt_s cn61xx;
+	struct cvmx_gmxx_txx_min_pkt_s cn63xx;
+	struct cvmx_gmxx_txx_min_pkt_s cn63xxp1;
+	struct cvmx_gmxx_txx_min_pkt_s cn66xx;
+	struct cvmx_gmxx_txx_min_pkt_s cn68xx;
+	struct cvmx_gmxx_txx_min_pkt_s cn68xxp1;
+	struct cvmx_gmxx_txx_min_pkt_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_pause_pkt_interval {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_pause_pkt_interval_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t interval:16;
+#else
+		uint64_t interval:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_pause_pkt_interval_s cn30xx;
 	struct cvmx_gmxx_txx_pause_pkt_interval_s cn31xx;
@@ -1717,13 +5240,25 @@ union cvmx_gmxx_txx_pause_pkt_interval {
 	struct cvmx_gmxx_txx_pause_pkt_interval_s cn56xxp1;
 	struct cvmx_gmxx_txx_pause_pkt_interval_s cn58xx;
 	struct cvmx_gmxx_txx_pause_pkt_interval_s cn58xxp1;
+	struct cvmx_gmxx_txx_pause_pkt_interval_s cn61xx;
+	struct cvmx_gmxx_txx_pause_pkt_interval_s cn63xx;
+	struct cvmx_gmxx_txx_pause_pkt_interval_s cn63xxp1;
+	struct cvmx_gmxx_txx_pause_pkt_interval_s cn66xx;
+	struct cvmx_gmxx_txx_pause_pkt_interval_s cn68xx;
+	struct cvmx_gmxx_txx_pause_pkt_interval_s cn68xxp1;
+	struct cvmx_gmxx_txx_pause_pkt_interval_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_pause_pkt_time {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_pause_pkt_time_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t time:16;
+#else
+		uint64_t time:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_pause_pkt_time_s cn30xx;
 	struct cvmx_gmxx_txx_pause_pkt_time_s cn31xx;
@@ -1736,18 +5271,36 @@ union cvmx_gmxx_txx_pause_pkt_time {
 	struct cvmx_gmxx_txx_pause_pkt_time_s cn56xxp1;
 	struct cvmx_gmxx_txx_pause_pkt_time_s cn58xx;
 	struct cvmx_gmxx_txx_pause_pkt_time_s cn58xxp1;
+	struct cvmx_gmxx_txx_pause_pkt_time_s cn61xx;
+	struct cvmx_gmxx_txx_pause_pkt_time_s cn63xx;
+	struct cvmx_gmxx_txx_pause_pkt_time_s cn63xxp1;
+	struct cvmx_gmxx_txx_pause_pkt_time_s cn66xx;
+	struct cvmx_gmxx_txx_pause_pkt_time_s cn68xx;
+	struct cvmx_gmxx_txx_pause_pkt_time_s cn68xxp1;
+	struct cvmx_gmxx_txx_pause_pkt_time_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_pause_togo {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_pause_togo_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t msg_time:16;
 		uint64_t time:16;
+#else
+		uint64_t time:16;
+		uint64_t msg_time:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_pause_togo_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t time:16;
+#else
+		uint64_t time:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_txx_pause_togo_cn30xx cn31xx;
 	struct cvmx_gmxx_txx_pause_togo_cn30xx cn38xx;
@@ -1759,13 +5312,25 @@ union cvmx_gmxx_txx_pause_togo {
 	struct cvmx_gmxx_txx_pause_togo_cn30xx cn56xxp1;
 	struct cvmx_gmxx_txx_pause_togo_cn30xx cn58xx;
 	struct cvmx_gmxx_txx_pause_togo_cn30xx cn58xxp1;
+	struct cvmx_gmxx_txx_pause_togo_s cn61xx;
+	struct cvmx_gmxx_txx_pause_togo_s cn63xx;
+	struct cvmx_gmxx_txx_pause_togo_s cn63xxp1;
+	struct cvmx_gmxx_txx_pause_togo_s cn66xx;
+	struct cvmx_gmxx_txx_pause_togo_s cn68xx;
+	struct cvmx_gmxx_txx_pause_togo_s cn68xxp1;
+	struct cvmx_gmxx_txx_pause_togo_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_pause_zero {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_pause_zero_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t send:1;
+#else
+		uint64_t send:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_pause_zero_s cn30xx;
 	struct cvmx_gmxx_txx_pause_zero_s cn31xx;
@@ -1778,25 +5343,72 @@ union cvmx_gmxx_txx_pause_zero {
 	struct cvmx_gmxx_txx_pause_zero_s cn56xxp1;
 	struct cvmx_gmxx_txx_pause_zero_s cn58xx;
 	struct cvmx_gmxx_txx_pause_zero_s cn58xxp1;
+	struct cvmx_gmxx_txx_pause_zero_s cn61xx;
+	struct cvmx_gmxx_txx_pause_zero_s cn63xx;
+	struct cvmx_gmxx_txx_pause_zero_s cn63xxp1;
+	struct cvmx_gmxx_txx_pause_zero_s cn66xx;
+	struct cvmx_gmxx_txx_pause_zero_s cn68xx;
+	struct cvmx_gmxx_txx_pause_zero_s cn68xxp1;
+	struct cvmx_gmxx_txx_pause_zero_s cnf71xx;
+};
+
+union cvmx_gmxx_txx_pipe {
+	uint64_t u64;
+	struct cvmx_gmxx_txx_pipe_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_33_63:31;
+		uint64_t ign_bp:1;
+		uint64_t reserved_21_31:11;
+		uint64_t nump:5;
+		uint64_t reserved_7_15:9;
+		uint64_t base:7;
+#else
+		uint64_t base:7;
+		uint64_t reserved_7_15:9;
+		uint64_t nump:5;
+		uint64_t reserved_21_31:11;
+		uint64_t ign_bp:1;
+		uint64_t reserved_33_63:31;
+#endif
+	} s;
+	struct cvmx_gmxx_txx_pipe_s cn68xx;
+	struct cvmx_gmxx_txx_pipe_s cn68xxp1;
 };
 
 union cvmx_gmxx_txx_sgmii_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_sgmii_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t align:1;
+#else
+		uint64_t align:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_sgmii_ctl_s cn52xx;
 	struct cvmx_gmxx_txx_sgmii_ctl_s cn52xxp1;
 	struct cvmx_gmxx_txx_sgmii_ctl_s cn56xx;
 	struct cvmx_gmxx_txx_sgmii_ctl_s cn56xxp1;
+	struct cvmx_gmxx_txx_sgmii_ctl_s cn61xx;
+	struct cvmx_gmxx_txx_sgmii_ctl_s cn63xx;
+	struct cvmx_gmxx_txx_sgmii_ctl_s cn63xxp1;
+	struct cvmx_gmxx_txx_sgmii_ctl_s cn66xx;
+	struct cvmx_gmxx_txx_sgmii_ctl_s cn68xx;
+	struct cvmx_gmxx_txx_sgmii_ctl_s cn68xxp1;
+	struct cvmx_gmxx_txx_sgmii_ctl_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_slot {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_slot_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t slot:10;
+#else
+		uint64_t slot:10;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_slot_s cn30xx;
 	struct cvmx_gmxx_txx_slot_s cn31xx;
@@ -1809,13 +5421,25 @@ union cvmx_gmxx_txx_slot {
 	struct cvmx_gmxx_txx_slot_s cn56xxp1;
 	struct cvmx_gmxx_txx_slot_s cn58xx;
 	struct cvmx_gmxx_txx_slot_s cn58xxp1;
+	struct cvmx_gmxx_txx_slot_s cn61xx;
+	struct cvmx_gmxx_txx_slot_s cn63xx;
+	struct cvmx_gmxx_txx_slot_s cn63xxp1;
+	struct cvmx_gmxx_txx_slot_s cn66xx;
+	struct cvmx_gmxx_txx_slot_s cn68xx;
+	struct cvmx_gmxx_txx_slot_s cn68xxp1;
+	struct cvmx_gmxx_txx_slot_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_soft_pause {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_soft_pause_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t time:16;
+#else
+		uint64_t time:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_soft_pause_s cn30xx;
 	struct cvmx_gmxx_txx_soft_pause_s cn31xx;
@@ -1828,13 +5452,25 @@ union cvmx_gmxx_txx_soft_pause {
 	struct cvmx_gmxx_txx_soft_pause_s cn56xxp1;
 	struct cvmx_gmxx_txx_soft_pause_s cn58xx;
 	struct cvmx_gmxx_txx_soft_pause_s cn58xxp1;
+	struct cvmx_gmxx_txx_soft_pause_s cn61xx;
+	struct cvmx_gmxx_txx_soft_pause_s cn63xx;
+	struct cvmx_gmxx_txx_soft_pause_s cn63xxp1;
+	struct cvmx_gmxx_txx_soft_pause_s cn66xx;
+	struct cvmx_gmxx_txx_soft_pause_s cn68xx;
+	struct cvmx_gmxx_txx_soft_pause_s cn68xxp1;
+	struct cvmx_gmxx_txx_soft_pause_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat0 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t xsdef:32;
 		uint64_t xscol:32;
+#else
+		uint64_t xscol:32;
+		uint64_t xsdef:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat0_s cn30xx;
 	struct cvmx_gmxx_txx_stat0_s cn31xx;
@@ -1847,13 +5483,25 @@ union cvmx_gmxx_txx_stat0 {
 	struct cvmx_gmxx_txx_stat0_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat0_s cn58xx;
 	struct cvmx_gmxx_txx_stat0_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat0_s cn61xx;
+	struct cvmx_gmxx_txx_stat0_s cn63xx;
+	struct cvmx_gmxx_txx_stat0_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat0_s cn66xx;
+	struct cvmx_gmxx_txx_stat0_s cn68xx;
+	struct cvmx_gmxx_txx_stat0_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat0_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat1 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t scol:32;
 		uint64_t mcol:32;
+#else
+		uint64_t mcol:32;
+		uint64_t scol:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat1_s cn30xx;
 	struct cvmx_gmxx_txx_stat1_s cn31xx;
@@ -1866,13 +5514,25 @@ union cvmx_gmxx_txx_stat1 {
 	struct cvmx_gmxx_txx_stat1_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat1_s cn58xx;
 	struct cvmx_gmxx_txx_stat1_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat1_s cn61xx;
+	struct cvmx_gmxx_txx_stat1_s cn63xx;
+	struct cvmx_gmxx_txx_stat1_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat1_s cn66xx;
+	struct cvmx_gmxx_txx_stat1_s cn68xx;
+	struct cvmx_gmxx_txx_stat1_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat1_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat2 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t octs:48;
+#else
+		uint64_t octs:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat2_s cn30xx;
 	struct cvmx_gmxx_txx_stat2_s cn31xx;
@@ -1885,13 +5545,25 @@ union cvmx_gmxx_txx_stat2 {
 	struct cvmx_gmxx_txx_stat2_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat2_s cn58xx;
 	struct cvmx_gmxx_txx_stat2_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat2_s cn61xx;
+	struct cvmx_gmxx_txx_stat2_s cn63xx;
+	struct cvmx_gmxx_txx_stat2_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat2_s cn66xx;
+	struct cvmx_gmxx_txx_stat2_s cn68xx;
+	struct cvmx_gmxx_txx_stat2_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat2_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat3 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t pkts:32;
+#else
+		uint64_t pkts:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat3_s cn30xx;
 	struct cvmx_gmxx_txx_stat3_s cn31xx;
@@ -1904,13 +5576,25 @@ union cvmx_gmxx_txx_stat3 {
 	struct cvmx_gmxx_txx_stat3_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat3_s cn58xx;
 	struct cvmx_gmxx_txx_stat3_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat3_s cn61xx;
+	struct cvmx_gmxx_txx_stat3_s cn63xx;
+	struct cvmx_gmxx_txx_stat3_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat3_s cn66xx;
+	struct cvmx_gmxx_txx_stat3_s cn68xx;
+	struct cvmx_gmxx_txx_stat3_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat3_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat4 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t hist1:32;
 		uint64_t hist0:32;
+#else
+		uint64_t hist0:32;
+		uint64_t hist1:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat4_s cn30xx;
 	struct cvmx_gmxx_txx_stat4_s cn31xx;
@@ -1923,13 +5607,25 @@ union cvmx_gmxx_txx_stat4 {
 	struct cvmx_gmxx_txx_stat4_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat4_s cn58xx;
 	struct cvmx_gmxx_txx_stat4_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat4_s cn61xx;
+	struct cvmx_gmxx_txx_stat4_s cn63xx;
+	struct cvmx_gmxx_txx_stat4_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat4_s cn66xx;
+	struct cvmx_gmxx_txx_stat4_s cn68xx;
+	struct cvmx_gmxx_txx_stat4_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat4_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat5 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat5_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t hist3:32;
 		uint64_t hist2:32;
+#else
+		uint64_t hist2:32;
+		uint64_t hist3:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat5_s cn30xx;
 	struct cvmx_gmxx_txx_stat5_s cn31xx;
@@ -1942,13 +5638,25 @@ union cvmx_gmxx_txx_stat5 {
 	struct cvmx_gmxx_txx_stat5_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat5_s cn58xx;
 	struct cvmx_gmxx_txx_stat5_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat5_s cn61xx;
+	struct cvmx_gmxx_txx_stat5_s cn63xx;
+	struct cvmx_gmxx_txx_stat5_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat5_s cn66xx;
+	struct cvmx_gmxx_txx_stat5_s cn68xx;
+	struct cvmx_gmxx_txx_stat5_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat5_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat6 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat6_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t hist5:32;
 		uint64_t hist4:32;
+#else
+		uint64_t hist4:32;
+		uint64_t hist5:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat6_s cn30xx;
 	struct cvmx_gmxx_txx_stat6_s cn31xx;
@@ -1961,13 +5669,25 @@ union cvmx_gmxx_txx_stat6 {
 	struct cvmx_gmxx_txx_stat6_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat6_s cn58xx;
 	struct cvmx_gmxx_txx_stat6_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat6_s cn61xx;
+	struct cvmx_gmxx_txx_stat6_s cn63xx;
+	struct cvmx_gmxx_txx_stat6_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat6_s cn66xx;
+	struct cvmx_gmxx_txx_stat6_s cn68xx;
+	struct cvmx_gmxx_txx_stat6_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat6_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat7 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat7_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t hist7:32;
 		uint64_t hist6:32;
+#else
+		uint64_t hist6:32;
+		uint64_t hist7:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat7_s cn30xx;
 	struct cvmx_gmxx_txx_stat7_s cn31xx;
@@ -1980,13 +5700,25 @@ union cvmx_gmxx_txx_stat7 {
 	struct cvmx_gmxx_txx_stat7_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat7_s cn58xx;
 	struct cvmx_gmxx_txx_stat7_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat7_s cn61xx;
+	struct cvmx_gmxx_txx_stat7_s cn63xx;
+	struct cvmx_gmxx_txx_stat7_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat7_s cn66xx;
+	struct cvmx_gmxx_txx_stat7_s cn68xx;
+	struct cvmx_gmxx_txx_stat7_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat7_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat8 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat8_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mcst:32;
 		uint64_t bcst:32;
+#else
+		uint64_t bcst:32;
+		uint64_t mcst:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat8_s cn30xx;
 	struct cvmx_gmxx_txx_stat8_s cn31xx;
@@ -1999,13 +5731,25 @@ union cvmx_gmxx_txx_stat8 {
 	struct cvmx_gmxx_txx_stat8_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat8_s cn58xx;
 	struct cvmx_gmxx_txx_stat8_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat8_s cn61xx;
+	struct cvmx_gmxx_txx_stat8_s cn63xx;
+	struct cvmx_gmxx_txx_stat8_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat8_s cn66xx;
+	struct cvmx_gmxx_txx_stat8_s cn68xx;
+	struct cvmx_gmxx_txx_stat8_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat8_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stat9 {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stat9_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t undflw:32;
 		uint64_t ctl:32;
+#else
+		uint64_t ctl:32;
+		uint64_t undflw:32;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stat9_s cn30xx;
 	struct cvmx_gmxx_txx_stat9_s cn31xx;
@@ -2018,13 +5762,25 @@ union cvmx_gmxx_txx_stat9 {
 	struct cvmx_gmxx_txx_stat9_s cn56xxp1;
 	struct cvmx_gmxx_txx_stat9_s cn58xx;
 	struct cvmx_gmxx_txx_stat9_s cn58xxp1;
+	struct cvmx_gmxx_txx_stat9_s cn61xx;
+	struct cvmx_gmxx_txx_stat9_s cn63xx;
+	struct cvmx_gmxx_txx_stat9_s cn63xxp1;
+	struct cvmx_gmxx_txx_stat9_s cn66xx;
+	struct cvmx_gmxx_txx_stat9_s cn68xx;
+	struct cvmx_gmxx_txx_stat9_s cn68xxp1;
+	struct cvmx_gmxx_txx_stat9_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_stats_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_stats_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t rd_clr:1;
+#else
+		uint64_t rd_clr:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_stats_ctl_s cn30xx;
 	struct cvmx_gmxx_txx_stats_ctl_s cn31xx;
@@ -2037,39 +5793,81 @@ union cvmx_gmxx_txx_stats_ctl {
 	struct cvmx_gmxx_txx_stats_ctl_s cn56xxp1;
 	struct cvmx_gmxx_txx_stats_ctl_s cn58xx;
 	struct cvmx_gmxx_txx_stats_ctl_s cn58xxp1;
+	struct cvmx_gmxx_txx_stats_ctl_s cn61xx;
+	struct cvmx_gmxx_txx_stats_ctl_s cn63xx;
+	struct cvmx_gmxx_txx_stats_ctl_s cn63xxp1;
+	struct cvmx_gmxx_txx_stats_ctl_s cn66xx;
+	struct cvmx_gmxx_txx_stats_ctl_s cn68xx;
+	struct cvmx_gmxx_txx_stats_ctl_s cn68xxp1;
+	struct cvmx_gmxx_txx_stats_ctl_s cnf71xx;
 };
 
 union cvmx_gmxx_txx_thresh {
 	uint64_t u64;
 	struct cvmx_gmxx_txx_thresh_s {
-		uint64_t reserved_9_63:55;
-		uint64_t cnt:9;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t cnt:10;
+#else
+		uint64_t cnt:10;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_gmxx_txx_thresh_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t cnt:7;
+#else
+		uint64_t cnt:7;
+		uint64_t reserved_7_63:57;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_txx_thresh_cn30xx cn31xx;
-	struct cvmx_gmxx_txx_thresh_s cn38xx;
-	struct cvmx_gmxx_txx_thresh_s cn38xxp2;
+	struct cvmx_gmxx_txx_thresh_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_9_63:55;
+		uint64_t cnt:9;
+#else
+		uint64_t cnt:9;
+		uint64_t reserved_9_63:55;
+#endif
+	} cn38xx;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn38xxp2;
 	struct cvmx_gmxx_txx_thresh_cn30xx cn50xx;
-	struct cvmx_gmxx_txx_thresh_s cn52xx;
-	struct cvmx_gmxx_txx_thresh_s cn52xxp1;
-	struct cvmx_gmxx_txx_thresh_s cn56xx;
-	struct cvmx_gmxx_txx_thresh_s cn56xxp1;
-	struct cvmx_gmxx_txx_thresh_s cn58xx;
-	struct cvmx_gmxx_txx_thresh_s cn58xxp1;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn52xx;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn52xxp1;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn56xx;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn56xxp1;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn58xx;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn58xxp1;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn61xx;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn63xx;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn63xxp1;
+	struct cvmx_gmxx_txx_thresh_cn38xx cn66xx;
+	struct cvmx_gmxx_txx_thresh_s cn68xx;
+	struct cvmx_gmxx_txx_thresh_s cn68xxp1;
+	struct cvmx_gmxx_txx_thresh_cn38xx cnf71xx;
 };
 
 union cvmx_gmxx_tx_bp {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t bp:4;
+#else
+		uint64_t bp:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_bp_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t bp:3;
+#else
+		uint64_t bp:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_tx_bp_cn30xx cn31xx;
 	struct cvmx_gmxx_tx_bp_s cn38xx;
@@ -2081,13 +5879,33 @@ union cvmx_gmxx_tx_bp {
 	struct cvmx_gmxx_tx_bp_s cn56xxp1;
 	struct cvmx_gmxx_tx_bp_s cn58xx;
 	struct cvmx_gmxx_tx_bp_s cn58xxp1;
+	struct cvmx_gmxx_tx_bp_s cn61xx;
+	struct cvmx_gmxx_tx_bp_s cn63xx;
+	struct cvmx_gmxx_tx_bp_s cn63xxp1;
+	struct cvmx_gmxx_tx_bp_s cn66xx;
+	struct cvmx_gmxx_tx_bp_s cn68xx;
+	struct cvmx_gmxx_tx_bp_s cn68xxp1;
+	struct cvmx_gmxx_tx_bp_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_2_63:62;
+		uint64_t bp:2;
+#else
+		uint64_t bp:2;
+		uint64_t reserved_2_63:62;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_gmxx_tx_clk_mskx {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_clk_mskx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t msk:1;
+#else
+		uint64_t msk:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_clk_mskx_s cn30xx;
 	struct cvmx_gmxx_tx_clk_mskx_s cn50xx;
@@ -2096,8 +5914,13 @@ union cvmx_gmxx_tx_clk_mskx {
 union cvmx_gmxx_tx_col_attempt {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_col_attempt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t limit:5;
+#else
+		uint64_t limit:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_col_attempt_s cn30xx;
 	struct cvmx_gmxx_tx_col_attempt_s cn31xx;
@@ -2110,17 +5933,34 @@ union cvmx_gmxx_tx_col_attempt {
 	struct cvmx_gmxx_tx_col_attempt_s cn56xxp1;
 	struct cvmx_gmxx_tx_col_attempt_s cn58xx;
 	struct cvmx_gmxx_tx_col_attempt_s cn58xxp1;
+	struct cvmx_gmxx_tx_col_attempt_s cn61xx;
+	struct cvmx_gmxx_tx_col_attempt_s cn63xx;
+	struct cvmx_gmxx_tx_col_attempt_s cn63xxp1;
+	struct cvmx_gmxx_tx_col_attempt_s cn66xx;
+	struct cvmx_gmxx_tx_col_attempt_s cn68xx;
+	struct cvmx_gmxx_tx_col_attempt_s cn68xxp1;
+	struct cvmx_gmxx_tx_col_attempt_s cnf71xx;
 };
 
 union cvmx_gmxx_tx_corrupt {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_corrupt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t corrupt:4;
+#else
+		uint64_t corrupt:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_corrupt_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t corrupt:3;
+#else
+		uint64_t corrupt:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_tx_corrupt_cn30xx cn31xx;
 	struct cvmx_gmxx_tx_corrupt_s cn38xx;
@@ -2132,36 +5972,81 @@ union cvmx_gmxx_tx_corrupt {
 	struct cvmx_gmxx_tx_corrupt_s cn56xxp1;
 	struct cvmx_gmxx_tx_corrupt_s cn58xx;
 	struct cvmx_gmxx_tx_corrupt_s cn58xxp1;
+	struct cvmx_gmxx_tx_corrupt_s cn61xx;
+	struct cvmx_gmxx_tx_corrupt_s cn63xx;
+	struct cvmx_gmxx_tx_corrupt_s cn63xxp1;
+	struct cvmx_gmxx_tx_corrupt_s cn66xx;
+	struct cvmx_gmxx_tx_corrupt_s cn68xx;
+	struct cvmx_gmxx_tx_corrupt_s cn68xxp1;
+	struct cvmx_gmxx_tx_corrupt_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_2_63:62;
+		uint64_t corrupt:2;
+#else
+		uint64_t corrupt:2;
+		uint64_t reserved_2_63:62;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_gmxx_tx_hg2_reg1 {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_hg2_reg1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t tx_xof:16;
+#else
+		uint64_t tx_xof:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_hg2_reg1_s cn52xx;
 	struct cvmx_gmxx_tx_hg2_reg1_s cn52xxp1;
 	struct cvmx_gmxx_tx_hg2_reg1_s cn56xx;
+	struct cvmx_gmxx_tx_hg2_reg1_s cn61xx;
+	struct cvmx_gmxx_tx_hg2_reg1_s cn63xx;
+	struct cvmx_gmxx_tx_hg2_reg1_s cn63xxp1;
+	struct cvmx_gmxx_tx_hg2_reg1_s cn66xx;
+	struct cvmx_gmxx_tx_hg2_reg1_s cn68xx;
+	struct cvmx_gmxx_tx_hg2_reg1_s cn68xxp1;
+	struct cvmx_gmxx_tx_hg2_reg1_s cnf71xx;
 };
 
 union cvmx_gmxx_tx_hg2_reg2 {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_hg2_reg2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t tx_xon:16;
+#else
+		uint64_t tx_xon:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_hg2_reg2_s cn52xx;
 	struct cvmx_gmxx_tx_hg2_reg2_s cn52xxp1;
 	struct cvmx_gmxx_tx_hg2_reg2_s cn56xx;
+	struct cvmx_gmxx_tx_hg2_reg2_s cn61xx;
+	struct cvmx_gmxx_tx_hg2_reg2_s cn63xx;
+	struct cvmx_gmxx_tx_hg2_reg2_s cn63xxp1;
+	struct cvmx_gmxx_tx_hg2_reg2_s cn66xx;
+	struct cvmx_gmxx_tx_hg2_reg2_s cn68xx;
+	struct cvmx_gmxx_tx_hg2_reg2_s cn68xxp1;
+	struct cvmx_gmxx_tx_hg2_reg2_s cnf71xx;
 };
 
 union cvmx_gmxx_tx_ifg {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_ifg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ifg2:4;
 		uint64_t ifg1:4;
+#else
+		uint64_t ifg1:4;
+		uint64_t ifg2:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_ifg_s cn30xx;
 	struct cvmx_gmxx_tx_ifg_s cn31xx;
@@ -2174,21 +6059,44 @@ union cvmx_gmxx_tx_ifg {
 	struct cvmx_gmxx_tx_ifg_s cn56xxp1;
 	struct cvmx_gmxx_tx_ifg_s cn58xx;
 	struct cvmx_gmxx_tx_ifg_s cn58xxp1;
+	struct cvmx_gmxx_tx_ifg_s cn61xx;
+	struct cvmx_gmxx_tx_ifg_s cn63xx;
+	struct cvmx_gmxx_tx_ifg_s cn63xxp1;
+	struct cvmx_gmxx_tx_ifg_s cn66xx;
+	struct cvmx_gmxx_tx_ifg_s cn68xx;
+	struct cvmx_gmxx_tx_ifg_s cn68xxp1;
+	struct cvmx_gmxx_tx_ifg_s cnf71xx;
 };
 
 union cvmx_gmxx_tx_int_en {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_int_en_s {
-		uint64_t reserved_20_63:44;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t xchange:1;
+		uint64_t ptp_lost:4;
 		uint64_t late_col:4;
 		uint64_t xsdef:4;
 		uint64_t xscol:4;
 		uint64_t reserved_6_7:2;
 		uint64_t undflw:4;
-		uint64_t ncb_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t pko_nxa:1;
+#else
 		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t ptp_lost:4;
+		uint64_t xchange:1;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_int_en_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t late_col:3;
 		uint64_t reserved_15_15:1;
@@ -2199,8 +6107,21 @@ union cvmx_gmxx_tx_int_en {
 		uint64_t undflw:3;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:3;
+		uint64_t reserved_5_7:3;
+		uint64_t xscol:3;
+		uint64_t reserved_11_11:1;
+		uint64_t xsdef:3;
+		uint64_t reserved_15_15:1;
+		uint64_t late_col:3;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_tx_int_en_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_15_63:49;
 		uint64_t xsdef:3;
 		uint64_t reserved_11_11:1;
@@ -2209,9 +6130,40 @@ union cvmx_gmxx_tx_int_en {
 		uint64_t undflw:3;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:3;
+		uint64_t reserved_5_7:3;
+		uint64_t xscol:3;
+		uint64_t reserved_11_11:1;
+		uint64_t xsdef:3;
+		uint64_t reserved_15_63:49;
+#endif
 	} cn31xx;
-	struct cvmx_gmxx_tx_int_en_s cn38xx;
+	struct cvmx_gmxx_tx_int_en_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t late_col:4;
+		uint64_t xsdef:4;
+		uint64_t xscol:4;
+		uint64_t reserved_6_7:2;
+		uint64_t undflw:4;
+		uint64_t ncb_nxa:1;
+		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t ncb_nxa:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t reserved_20_63:44;
+#endif
+	} cn38xx;
 	struct cvmx_gmxx_tx_int_en_cn38xxp2 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t xsdef:4;
 		uint64_t xscol:4;
@@ -2219,9 +6171,19 @@ union cvmx_gmxx_tx_int_en {
 		uint64_t undflw:4;
 		uint64_t ncb_nxa:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t ncb_nxa:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xxp2;
 	struct cvmx_gmxx_tx_int_en_cn30xx cn50xx;
 	struct cvmx_gmxx_tx_int_en_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t late_col:4;
 		uint64_t xsdef:4;
@@ -2230,27 +6192,138 @@ union cvmx_gmxx_tx_int_en {
 		uint64_t undflw:4;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_gmxx_tx_int_en_cn52xx cn52xxp1;
 	struct cvmx_gmxx_tx_int_en_cn52xx cn56xx;
 	struct cvmx_gmxx_tx_int_en_cn52xx cn56xxp1;
-	struct cvmx_gmxx_tx_int_en_s cn58xx;
-	struct cvmx_gmxx_tx_int_en_s cn58xxp1;
+	struct cvmx_gmxx_tx_int_en_cn38xx cn58xx;
+	struct cvmx_gmxx_tx_int_en_cn38xx cn58xxp1;
+	struct cvmx_gmxx_tx_int_en_s cn61xx;
+	struct cvmx_gmxx_tx_int_en_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_24_63:40;
+		uint64_t ptp_lost:4;
+		uint64_t late_col:4;
+		uint64_t xsdef:4;
+		uint64_t xscol:4;
+		uint64_t reserved_6_7:2;
+		uint64_t undflw:4;
+		uint64_t reserved_1_1:1;
+		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t ptp_lost:4;
+		uint64_t reserved_24_63:40;
+#endif
+	} cn63xx;
+	struct cvmx_gmxx_tx_int_en_cn63xx cn63xxp1;
+	struct cvmx_gmxx_tx_int_en_s cn66xx;
+	struct cvmx_gmxx_tx_int_en_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t xchange:1;
+		uint64_t ptp_lost:4;
+		uint64_t late_col:4;
+		uint64_t xsdef:4;
+		uint64_t xscol:4;
+		uint64_t reserved_6_7:2;
+		uint64_t undflw:4;
+		uint64_t pko_nxp:1;
+		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t pko_nxp:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t ptp_lost:4;
+		uint64_t xchange:1;
+		uint64_t reserved_25_63:39;
+#endif
+	} cn68xx;
+	struct cvmx_gmxx_tx_int_en_cn68xx cn68xxp1;
+	struct cvmx_gmxx_tx_int_en_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t xchange:1;
+		uint64_t reserved_22_23:2;
+		uint64_t ptp_lost:2;
+		uint64_t reserved_18_19:2;
+		uint64_t late_col:2;
+		uint64_t reserved_14_15:2;
+		uint64_t xsdef:2;
+		uint64_t reserved_10_11:2;
+		uint64_t xscol:2;
+		uint64_t reserved_4_7:4;
+		uint64_t undflw:2;
+		uint64_t reserved_1_1:1;
+		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:2;
+		uint64_t reserved_4_7:4;
+		uint64_t xscol:2;
+		uint64_t reserved_10_11:2;
+		uint64_t xsdef:2;
+		uint64_t reserved_14_15:2;
+		uint64_t late_col:2;
+		uint64_t reserved_18_19:2;
+		uint64_t ptp_lost:2;
+		uint64_t reserved_22_23:2;
+		uint64_t xchange:1;
+		uint64_t reserved_25_63:39;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_gmxx_tx_int_reg {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_int_reg_s {
-		uint64_t reserved_20_63:44;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t xchange:1;
+		uint64_t ptp_lost:4;
 		uint64_t late_col:4;
 		uint64_t xsdef:4;
 		uint64_t xscol:4;
 		uint64_t reserved_6_7:2;
 		uint64_t undflw:4;
-		uint64_t ncb_nxa:1;
+		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t ptp_lost:4;
+		uint64_t xchange:1;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_int_reg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t late_col:3;
 		uint64_t reserved_15_15:1;
@@ -2261,8 +6334,21 @@ union cvmx_gmxx_tx_int_reg {
 		uint64_t undflw:3;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:3;
+		uint64_t reserved_5_7:3;
+		uint64_t xscol:3;
+		uint64_t reserved_11_11:1;
+		uint64_t xsdef:3;
+		uint64_t reserved_15_15:1;
+		uint64_t late_col:3;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_tx_int_reg_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_15_63:49;
 		uint64_t xsdef:3;
 		uint64_t reserved_11_11:1;
@@ -2271,9 +6357,40 @@ union cvmx_gmxx_tx_int_reg {
 		uint64_t undflw:3;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:3;
+		uint64_t reserved_5_7:3;
+		uint64_t xscol:3;
+		uint64_t reserved_11_11:1;
+		uint64_t xsdef:3;
+		uint64_t reserved_15_63:49;
+#endif
 	} cn31xx;
-	struct cvmx_gmxx_tx_int_reg_s cn38xx;
+	struct cvmx_gmxx_tx_int_reg_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t late_col:4;
+		uint64_t xsdef:4;
+		uint64_t xscol:4;
+		uint64_t reserved_6_7:2;
+		uint64_t undflw:4;
+		uint64_t ncb_nxa:1;
+		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t ncb_nxa:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t reserved_20_63:44;
+#endif
+	} cn38xx;
 	struct cvmx_gmxx_tx_int_reg_cn38xxp2 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t xsdef:4;
 		uint64_t xscol:4;
@@ -2281,9 +6398,19 @@ union cvmx_gmxx_tx_int_reg {
 		uint64_t undflw:4;
 		uint64_t ncb_nxa:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t ncb_nxa:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xxp2;
 	struct cvmx_gmxx_tx_int_reg_cn30xx cn50xx;
 	struct cvmx_gmxx_tx_int_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t late_col:4;
 		uint64_t xsdef:4;
@@ -2292,19 +6419,119 @@ union cvmx_gmxx_tx_int_reg {
 		uint64_t undflw:4;
 		uint64_t reserved_1_1:1;
 		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_gmxx_tx_int_reg_cn52xx cn52xxp1;
 	struct cvmx_gmxx_tx_int_reg_cn52xx cn56xx;
 	struct cvmx_gmxx_tx_int_reg_cn52xx cn56xxp1;
-	struct cvmx_gmxx_tx_int_reg_s cn58xx;
-	struct cvmx_gmxx_tx_int_reg_s cn58xxp1;
+	struct cvmx_gmxx_tx_int_reg_cn38xx cn58xx;
+	struct cvmx_gmxx_tx_int_reg_cn38xx cn58xxp1;
+	struct cvmx_gmxx_tx_int_reg_s cn61xx;
+	struct cvmx_gmxx_tx_int_reg_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_24_63:40;
+		uint64_t ptp_lost:4;
+		uint64_t late_col:4;
+		uint64_t xsdef:4;
+		uint64_t xscol:4;
+		uint64_t reserved_6_7:2;
+		uint64_t undflw:4;
+		uint64_t reserved_1_1:1;
+		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t ptp_lost:4;
+		uint64_t reserved_24_63:40;
+#endif
+	} cn63xx;
+	struct cvmx_gmxx_tx_int_reg_cn63xx cn63xxp1;
+	struct cvmx_gmxx_tx_int_reg_s cn66xx;
+	struct cvmx_gmxx_tx_int_reg_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t xchange:1;
+		uint64_t ptp_lost:4;
+		uint64_t late_col:4;
+		uint64_t xsdef:4;
+		uint64_t xscol:4;
+		uint64_t reserved_6_7:2;
+		uint64_t undflw:4;
+		uint64_t pko_nxp:1;
+		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t pko_nxp:1;
+		uint64_t undflw:4;
+		uint64_t reserved_6_7:2;
+		uint64_t xscol:4;
+		uint64_t xsdef:4;
+		uint64_t late_col:4;
+		uint64_t ptp_lost:4;
+		uint64_t xchange:1;
+		uint64_t reserved_25_63:39;
+#endif
+	} cn68xx;
+	struct cvmx_gmxx_tx_int_reg_cn68xx cn68xxp1;
+	struct cvmx_gmxx_tx_int_reg_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t xchange:1;
+		uint64_t reserved_22_23:2;
+		uint64_t ptp_lost:2;
+		uint64_t reserved_18_19:2;
+		uint64_t late_col:2;
+		uint64_t reserved_14_15:2;
+		uint64_t xsdef:2;
+		uint64_t reserved_10_11:2;
+		uint64_t xscol:2;
+		uint64_t reserved_4_7:4;
+		uint64_t undflw:2;
+		uint64_t reserved_1_1:1;
+		uint64_t pko_nxa:1;
+#else
+		uint64_t pko_nxa:1;
+		uint64_t reserved_1_1:1;
+		uint64_t undflw:2;
+		uint64_t reserved_4_7:4;
+		uint64_t xscol:2;
+		uint64_t reserved_10_11:2;
+		uint64_t xsdef:2;
+		uint64_t reserved_14_15:2;
+		uint64_t late_col:2;
+		uint64_t reserved_18_19:2;
+		uint64_t ptp_lost:2;
+		uint64_t reserved_22_23:2;
+		uint64_t xchange:1;
+		uint64_t reserved_25_63:39;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_gmxx_tx_jam {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_jam_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t jam:8;
+#else
+		uint64_t jam:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_jam_s cn30xx;
 	struct cvmx_gmxx_tx_jam_s cn31xx;
@@ -2317,13 +6544,25 @@ union cvmx_gmxx_tx_jam {
 	struct cvmx_gmxx_tx_jam_s cn56xxp1;
 	struct cvmx_gmxx_tx_jam_s cn58xx;
 	struct cvmx_gmxx_tx_jam_s cn58xxp1;
+	struct cvmx_gmxx_tx_jam_s cn61xx;
+	struct cvmx_gmxx_tx_jam_s cn63xx;
+	struct cvmx_gmxx_tx_jam_s cn63xxp1;
+	struct cvmx_gmxx_tx_jam_s cn66xx;
+	struct cvmx_gmxx_tx_jam_s cn68xx;
+	struct cvmx_gmxx_tx_jam_s cn68xxp1;
+	struct cvmx_gmxx_tx_jam_s cnf71xx;
 };
 
 union cvmx_gmxx_tx_lfsr {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_lfsr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t lfsr:16;
+#else
+		uint64_t lfsr:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_lfsr_s cn30xx;
 	struct cvmx_gmxx_tx_lfsr_s cn31xx;
@@ -2336,32 +6575,64 @@ union cvmx_gmxx_tx_lfsr {
 	struct cvmx_gmxx_tx_lfsr_s cn56xxp1;
 	struct cvmx_gmxx_tx_lfsr_s cn58xx;
 	struct cvmx_gmxx_tx_lfsr_s cn58xxp1;
+	struct cvmx_gmxx_tx_lfsr_s cn61xx;
+	struct cvmx_gmxx_tx_lfsr_s cn63xx;
+	struct cvmx_gmxx_tx_lfsr_s cn63xxp1;
+	struct cvmx_gmxx_tx_lfsr_s cn66xx;
+	struct cvmx_gmxx_tx_lfsr_s cn68xx;
+	struct cvmx_gmxx_tx_lfsr_s cn68xxp1;
+	struct cvmx_gmxx_tx_lfsr_s cnf71xx;
 };
 
 union cvmx_gmxx_tx_ovr_bp {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_ovr_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t tx_prt_bp:16;
 		uint64_t reserved_12_31:20;
 		uint64_t en:4;
 		uint64_t bp:4;
 		uint64_t ign_full:4;
+#else
+		uint64_t ign_full:4;
+		uint64_t bp:4;
+		uint64_t en:4;
+		uint64_t reserved_12_31:20;
+		uint64_t tx_prt_bp:16;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_ovr_bp_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t en:3;
 		uint64_t reserved_7_7:1;
 		uint64_t bp:3;
 		uint64_t reserved_3_3:1;
 		uint64_t ign_full:3;
+#else
+		uint64_t ign_full:3;
+		uint64_t reserved_3_3:1;
+		uint64_t bp:3;
+		uint64_t reserved_7_7:1;
+		uint64_t en:3;
+		uint64_t reserved_11_63:53;
+#endif
 	} cn30xx;
 	struct cvmx_gmxx_tx_ovr_bp_cn30xx cn31xx;
 	struct cvmx_gmxx_tx_ovr_bp_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t en:4;
 		uint64_t bp:4;
 		uint64_t ign_full:4;
+#else
+		uint64_t ign_full:4;
+		uint64_t bp:4;
+		uint64_t en:4;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn38xx;
 	struct cvmx_gmxx_tx_ovr_bp_cn38xx cn38xxp2;
 	struct cvmx_gmxx_tx_ovr_bp_cn30xx cn50xx;
@@ -2371,13 +6642,45 @@ union cvmx_gmxx_tx_ovr_bp {
 	struct cvmx_gmxx_tx_ovr_bp_s cn56xxp1;
 	struct cvmx_gmxx_tx_ovr_bp_cn38xx cn58xx;
 	struct cvmx_gmxx_tx_ovr_bp_cn38xx cn58xxp1;
+	struct cvmx_gmxx_tx_ovr_bp_s cn61xx;
+	struct cvmx_gmxx_tx_ovr_bp_s cn63xx;
+	struct cvmx_gmxx_tx_ovr_bp_s cn63xxp1;
+	struct cvmx_gmxx_tx_ovr_bp_s cn66xx;
+	struct cvmx_gmxx_tx_ovr_bp_s cn68xx;
+	struct cvmx_gmxx_tx_ovr_bp_s cn68xxp1;
+	struct cvmx_gmxx_tx_ovr_bp_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_48_63:16;
+		uint64_t tx_prt_bp:16;
+		uint64_t reserved_10_31:22;
+		uint64_t en:2;
+		uint64_t reserved_6_7:2;
+		uint64_t bp:2;
+		uint64_t reserved_2_3:2;
+		uint64_t ign_full:2;
+#else
+		uint64_t ign_full:2;
+		uint64_t reserved_2_3:2;
+		uint64_t bp:2;
+		uint64_t reserved_6_7:2;
+		uint64_t en:2;
+		uint64_t reserved_10_31:22;
+		uint64_t tx_prt_bp:16;
+		uint64_t reserved_48_63:16;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_gmxx_tx_pause_pkt_dmac {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_pause_pkt_dmac_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t dmac:48;
+#else
+		uint64_t dmac:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn30xx;
 	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn31xx;
@@ -2390,13 +6693,25 @@ union cvmx_gmxx_tx_pause_pkt_dmac {
 	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn56xxp1;
 	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn58xx;
 	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn58xxp1;
+	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn61xx;
+	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn63xx;
+	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn63xxp1;
+	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn66xx;
+	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn68xx;
+	struct cvmx_gmxx_tx_pause_pkt_dmac_s cn68xxp1;
+	struct cvmx_gmxx_tx_pause_pkt_dmac_s cnf71xx;
 };
 
 union cvmx_gmxx_tx_pause_pkt_type {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_pause_pkt_type_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t type:16;
+#else
+		uint64_t type:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_pause_pkt_type_s cn30xx;
 	struct cvmx_gmxx_tx_pause_pkt_type_s cn31xx;
@@ -2409,13 +6724,25 @@ union cvmx_gmxx_tx_pause_pkt_type {
 	struct cvmx_gmxx_tx_pause_pkt_type_s cn56xxp1;
 	struct cvmx_gmxx_tx_pause_pkt_type_s cn58xx;
 	struct cvmx_gmxx_tx_pause_pkt_type_s cn58xxp1;
+	struct cvmx_gmxx_tx_pause_pkt_type_s cn61xx;
+	struct cvmx_gmxx_tx_pause_pkt_type_s cn63xx;
+	struct cvmx_gmxx_tx_pause_pkt_type_s cn63xxp1;
+	struct cvmx_gmxx_tx_pause_pkt_type_s cn66xx;
+	struct cvmx_gmxx_tx_pause_pkt_type_s cn68xx;
+	struct cvmx_gmxx_tx_pause_pkt_type_s cn68xxp1;
+	struct cvmx_gmxx_tx_pause_pkt_type_s cnf71xx;
 };
 
 union cvmx_gmxx_tx_prts {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_prts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t prts:5;
+#else
+		uint64_t prts:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_prts_s cn30xx;
 	struct cvmx_gmxx_tx_prts_s cn31xx;
@@ -2428,14 +6755,27 @@ union cvmx_gmxx_tx_prts {
 	struct cvmx_gmxx_tx_prts_s cn56xxp1;
 	struct cvmx_gmxx_tx_prts_s cn58xx;
 	struct cvmx_gmxx_tx_prts_s cn58xxp1;
+	struct cvmx_gmxx_tx_prts_s cn61xx;
+	struct cvmx_gmxx_tx_prts_s cn63xx;
+	struct cvmx_gmxx_tx_prts_s cn63xxp1;
+	struct cvmx_gmxx_tx_prts_s cn66xx;
+	struct cvmx_gmxx_tx_prts_s cn68xx;
+	struct cvmx_gmxx_tx_prts_s cn68xxp1;
+	struct cvmx_gmxx_tx_prts_s cnf71xx;
 };
 
 union cvmx_gmxx_tx_spi_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_spi_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t tpa_clr:1;
 		uint64_t cont_pkt:1;
+#else
+		uint64_t cont_pkt:1;
+		uint64_t tpa_clr:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_spi_ctl_s cn38xx;
 	struct cvmx_gmxx_tx_spi_ctl_s cn38xxp2;
@@ -2446,8 +6786,13 @@ union cvmx_gmxx_tx_spi_ctl {
 union cvmx_gmxx_tx_spi_drain {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_spi_drain_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t drain:16;
+#else
+		uint64_t drain:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_spi_drain_s cn38xx;
 	struct cvmx_gmxx_tx_spi_drain_s cn58xx;
@@ -2457,15 +6802,28 @@ union cvmx_gmxx_tx_spi_drain {
 union cvmx_gmxx_tx_spi_max {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_spi_max_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t slice:7;
 		uint64_t max2:8;
 		uint64_t max1:8;
+#else
+		uint64_t max1:8;
+		uint64_t max2:8;
+		uint64_t slice:7;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_spi_max_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t max2:8;
 		uint64_t max1:8;
+#else
+		uint64_t max1:8;
+		uint64_t max2:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xx;
 	struct cvmx_gmxx_tx_spi_max_cn38xx cn38xxp2;
 	struct cvmx_gmxx_tx_spi_max_s cn58xx;
@@ -2475,8 +6833,13 @@ union cvmx_gmxx_tx_spi_max {
 union cvmx_gmxx_tx_spi_roundx {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_spi_roundx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t round:16;
+#else
+		uint64_t round:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_spi_roundx_s cn58xx;
 	struct cvmx_gmxx_tx_spi_roundx_s cn58xxp1;
@@ -2485,8 +6848,13 @@ union cvmx_gmxx_tx_spi_roundx {
 union cvmx_gmxx_tx_spi_thresh {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_spi_thresh_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t thresh:6;
+#else
+		uint64_t thresh:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_spi_thresh_s cn38xx;
 	struct cvmx_gmxx_tx_spi_thresh_s cn38xxp2;
@@ -2497,6 +6865,7 @@ union cvmx_gmxx_tx_spi_thresh {
 union cvmx_gmxx_tx_xaui_ctl {
 	uint64_t u64;
 	struct cvmx_gmxx_tx_xaui_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t hg_pause_hgi:2;
 		uint64_t hg_en:1;
@@ -2506,24 +6875,55 @@ union cvmx_gmxx_tx_xaui_ctl {
 		uint64_t reserved_2_3:2;
 		uint64_t uni_en:1;
 		uint64_t dic_en:1;
+#else
+		uint64_t dic_en:1;
+		uint64_t uni_en:1;
+		uint64_t reserved_2_3:2;
+		uint64_t ls:2;
+		uint64_t ls_byp:1;
+		uint64_t reserved_7_7:1;
+		uint64_t hg_en:1;
+		uint64_t hg_pause_hgi:2;
+		uint64_t reserved_11_63:53;
+#endif
 	} s;
 	struct cvmx_gmxx_tx_xaui_ctl_s cn52xx;
 	struct cvmx_gmxx_tx_xaui_ctl_s cn52xxp1;
 	struct cvmx_gmxx_tx_xaui_ctl_s cn56xx;
 	struct cvmx_gmxx_tx_xaui_ctl_s cn56xxp1;
+	struct cvmx_gmxx_tx_xaui_ctl_s cn61xx;
+	struct cvmx_gmxx_tx_xaui_ctl_s cn63xx;
+	struct cvmx_gmxx_tx_xaui_ctl_s cn63xxp1;
+	struct cvmx_gmxx_tx_xaui_ctl_s cn66xx;
+	struct cvmx_gmxx_tx_xaui_ctl_s cn68xx;
+	struct cvmx_gmxx_tx_xaui_ctl_s cn68xxp1;
+	struct cvmx_gmxx_tx_xaui_ctl_s cnf71xx;
 };
 
 union cvmx_gmxx_xaui_ext_loopback {
 	uint64_t u64;
 	struct cvmx_gmxx_xaui_ext_loopback_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t en:1;
 		uint64_t thresh:4;
+#else
+		uint64_t thresh:4;
+		uint64_t en:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_gmxx_xaui_ext_loopback_s cn52xx;
 	struct cvmx_gmxx_xaui_ext_loopback_s cn52xxp1;
 	struct cvmx_gmxx_xaui_ext_loopback_s cn56xx;
 	struct cvmx_gmxx_xaui_ext_loopback_s cn56xxp1;
+	struct cvmx_gmxx_xaui_ext_loopback_s cn61xx;
+	struct cvmx_gmxx_xaui_ext_loopback_s cn63xx;
+	struct cvmx_gmxx_xaui_ext_loopback_s cn63xxp1;
+	struct cvmx_gmxx_xaui_ext_loopback_s cn66xx;
+	struct cvmx_gmxx_xaui_ext_loopback_s cn68xx;
+	struct cvmx_gmxx_xaui_ext_loopback_s cn68xxp1;
+	struct cvmx_gmxx_xaui_ext_loopback_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-gpio-defs.h b/arch/mips/include/asm/octeon/cvmx-gpio-defs.h
index 395564e8d1f..4719fcfa886 100644
--- a/arch/mips/include/asm/octeon/cvmx-gpio-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-gpio-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -34,7 +34,10 @@
 #define CVMX_GPIO_CLK_QLMX(offset) (CVMX_ADD_IO_SEG(0x00010700000008E0ull) + ((offset) & 1) * 8)
 #define CVMX_GPIO_DBG_ENA (CVMX_ADD_IO_SEG(0x00010700000008A0ull))
 #define CVMX_GPIO_INT_CLR (CVMX_ADD_IO_SEG(0x0001070000000898ull))
+#define CVMX_GPIO_MULTI_CAST (CVMX_ADD_IO_SEG(0x00010700000008B0ull))
+#define CVMX_GPIO_PIN_ENA (CVMX_ADD_IO_SEG(0x00010700000008B8ull))
 #define CVMX_GPIO_RX_DAT (CVMX_ADD_IO_SEG(0x0001070000000880ull))
+#define CVMX_GPIO_TIM_CTL (CVMX_ADD_IO_SEG(0x00010700000008A0ull))
 #define CVMX_GPIO_TX_CLR (CVMX_ADD_IO_SEG(0x0001070000000890ull))
 #define CVMX_GPIO_TX_SET (CVMX_ADD_IO_SEG(0x0001070000000888ull))
 #define CVMX_GPIO_XBIT_CFGX(offset) (CVMX_ADD_IO_SEG(0x0001070000000900ull) + ((offset) & 31) * 8 - 8*16)
@@ -42,6 +45,7 @@
 union cvmx_gpio_bit_cfgx {
 	uint64_t u64;
 	struct cvmx_gpio_bit_cfgx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t synce_sel:2;
 		uint64_t clk_gen:1;
@@ -52,8 +56,21 @@ union cvmx_gpio_bit_cfgx {
 		uint64_t int_en:1;
 		uint64_t rx_xor:1;
 		uint64_t tx_oe:1;
+#else
+		uint64_t tx_oe:1;
+		uint64_t rx_xor:1;
+		uint64_t int_en:1;
+		uint64_t int_type:1;
+		uint64_t fil_cnt:4;
+		uint64_t fil_sel:4;
+		uint64_t clk_sel:2;
+		uint64_t clk_gen:1;
+		uint64_t synce_sel:2;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_gpio_bit_cfgx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t fil_sel:4;
 		uint64_t fil_cnt:4;
@@ -61,12 +78,22 @@ union cvmx_gpio_bit_cfgx {
 		uint64_t int_en:1;
 		uint64_t rx_xor:1;
 		uint64_t tx_oe:1;
+#else
+		uint64_t tx_oe:1;
+		uint64_t rx_xor:1;
+		uint64_t int_en:1;
+		uint64_t int_type:1;
+		uint64_t fil_cnt:4;
+		uint64_t fil_sel:4;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn30xx;
 	struct cvmx_gpio_bit_cfgx_cn30xx cn31xx;
 	struct cvmx_gpio_bit_cfgx_cn30xx cn38xx;
 	struct cvmx_gpio_bit_cfgx_cn30xx cn38xxp2;
 	struct cvmx_gpio_bit_cfgx_cn30xx cn50xx;
 	struct cvmx_gpio_bit_cfgx_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_15_63:49;
 		uint64_t clk_gen:1;
 		uint64_t clk_sel:2;
@@ -76,22 +103,44 @@ union cvmx_gpio_bit_cfgx {
 		uint64_t int_en:1;
 		uint64_t rx_xor:1;
 		uint64_t tx_oe:1;
+#else
+		uint64_t tx_oe:1;
+		uint64_t rx_xor:1;
+		uint64_t int_en:1;
+		uint64_t int_type:1;
+		uint64_t fil_cnt:4;
+		uint64_t fil_sel:4;
+		uint64_t clk_sel:2;
+		uint64_t clk_gen:1;
+		uint64_t reserved_15_63:49;
+#endif
 	} cn52xx;
 	struct cvmx_gpio_bit_cfgx_cn52xx cn52xxp1;
 	struct cvmx_gpio_bit_cfgx_cn52xx cn56xx;
 	struct cvmx_gpio_bit_cfgx_cn52xx cn56xxp1;
 	struct cvmx_gpio_bit_cfgx_cn30xx cn58xx;
 	struct cvmx_gpio_bit_cfgx_cn30xx cn58xxp1;
+	struct cvmx_gpio_bit_cfgx_s cn61xx;
 	struct cvmx_gpio_bit_cfgx_s cn63xx;
 	struct cvmx_gpio_bit_cfgx_s cn63xxp1;
+	struct cvmx_gpio_bit_cfgx_s cn66xx;
+	struct cvmx_gpio_bit_cfgx_s cn68xx;
+	struct cvmx_gpio_bit_cfgx_s cn68xxp1;
+	struct cvmx_gpio_bit_cfgx_s cnf71xx;
 };
 
 union cvmx_gpio_boot_ena {
 	uint64_t u64;
 	struct cvmx_gpio_boot_ena_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t boot_ena:4;
 		uint64_t reserved_0_7:8;
+#else
+		uint64_t reserved_0_7:8;
+		uint64_t boot_ena:4;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_gpio_boot_ena_s cn30xx;
 	struct cvmx_gpio_boot_ena_s cn31xx;
@@ -101,33 +150,87 @@ union cvmx_gpio_boot_ena {
 union cvmx_gpio_clk_genx {
 	uint64_t u64;
 	struct cvmx_gpio_clk_genx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t n:32;
+#else
+		uint64_t n:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_gpio_clk_genx_s cn52xx;
 	struct cvmx_gpio_clk_genx_s cn52xxp1;
 	struct cvmx_gpio_clk_genx_s cn56xx;
 	struct cvmx_gpio_clk_genx_s cn56xxp1;
+	struct cvmx_gpio_clk_genx_s cn61xx;
 	struct cvmx_gpio_clk_genx_s cn63xx;
 	struct cvmx_gpio_clk_genx_s cn63xxp1;
+	struct cvmx_gpio_clk_genx_s cn66xx;
+	struct cvmx_gpio_clk_genx_s cn68xx;
+	struct cvmx_gpio_clk_genx_s cn68xxp1;
+	struct cvmx_gpio_clk_genx_s cnf71xx;
 };
 
 union cvmx_gpio_clk_qlmx {
 	uint64_t u64;
 	struct cvmx_gpio_clk_qlmx_s {
-		uint64_t reserved_3_63:61;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_11_63:53;
+		uint64_t qlm_sel:3;
+		uint64_t reserved_3_7:5;
 		uint64_t div:1;
 		uint64_t lane_sel:2;
+#else
+		uint64_t lane_sel:2;
+		uint64_t div:1;
+		uint64_t reserved_3_7:5;
+		uint64_t qlm_sel:3;
+		uint64_t reserved_11_63:53;
+#endif
 	} s;
-	struct cvmx_gpio_clk_qlmx_s cn63xx;
-	struct cvmx_gpio_clk_qlmx_s cn63xxp1;
+	struct cvmx_gpio_clk_qlmx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t qlm_sel:2;
+		uint64_t reserved_3_7:5;
+		uint64_t div:1;
+		uint64_t lane_sel:2;
+#else
+		uint64_t lane_sel:2;
+		uint64_t div:1;
+		uint64_t reserved_3_7:5;
+		uint64_t qlm_sel:2;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn61xx;
+	struct cvmx_gpio_clk_qlmx_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_3_63:61;
+		uint64_t div:1;
+		uint64_t lane_sel:2;
+#else
+		uint64_t lane_sel:2;
+		uint64_t div:1;
+		uint64_t reserved_3_63:61;
+#endif
+	} cn63xx;
+	struct cvmx_gpio_clk_qlmx_cn63xx cn63xxp1;
+	struct cvmx_gpio_clk_qlmx_cn61xx cn66xx;
+	struct cvmx_gpio_clk_qlmx_s cn68xx;
+	struct cvmx_gpio_clk_qlmx_s cn68xxp1;
+	struct cvmx_gpio_clk_qlmx_cn61xx cnf71xx;
 };
 
 union cvmx_gpio_dbg_ena {
 	uint64_t u64;
 	struct cvmx_gpio_dbg_ena_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_21_63:43;
 		uint64_t dbg_ena:21;
+#else
+		uint64_t dbg_ena:21;
+		uint64_t reserved_21_63:43;
+#endif
 	} s;
 	struct cvmx_gpio_dbg_ena_s cn30xx;
 	struct cvmx_gpio_dbg_ena_s cn31xx;
@@ -137,8 +240,13 @@ union cvmx_gpio_dbg_ena {
 union cvmx_gpio_int_clr {
 	uint64_t u64;
 	struct cvmx_gpio_int_clr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t type:16;
+#else
+		uint64_t type:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_gpio_int_clr_s cn30xx;
 	struct cvmx_gpio_int_clr_s cn31xx;
@@ -151,21 +259,69 @@ union cvmx_gpio_int_clr {
 	struct cvmx_gpio_int_clr_s cn56xxp1;
 	struct cvmx_gpio_int_clr_s cn58xx;
 	struct cvmx_gpio_int_clr_s cn58xxp1;
+	struct cvmx_gpio_int_clr_s cn61xx;
 	struct cvmx_gpio_int_clr_s cn63xx;
 	struct cvmx_gpio_int_clr_s cn63xxp1;
+	struct cvmx_gpio_int_clr_s cn66xx;
+	struct cvmx_gpio_int_clr_s cn68xx;
+	struct cvmx_gpio_int_clr_s cn68xxp1;
+	struct cvmx_gpio_int_clr_s cnf71xx;
+};
+
+union cvmx_gpio_multi_cast {
+	uint64_t u64;
+	struct cvmx_gpio_multi_cast_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_gpio_multi_cast_s cn61xx;
+	struct cvmx_gpio_multi_cast_s cnf71xx;
+};
+
+union cvmx_gpio_pin_ena {
+	uint64_t u64;
+	struct cvmx_gpio_pin_ena_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t ena19:1;
+		uint64_t ena18:1;
+		uint64_t reserved_0_17:18;
+#else
+		uint64_t reserved_0_17:18;
+		uint64_t ena18:1;
+		uint64_t ena19:1;
+		uint64_t reserved_20_63:44;
+#endif
+	} s;
+	struct cvmx_gpio_pin_ena_s cn66xx;
 };
 
 union cvmx_gpio_rx_dat {
 	uint64_t u64;
 	struct cvmx_gpio_rx_dat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t dat:24;
+#else
+		uint64_t dat:24;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_gpio_rx_dat_s cn30xx;
 	struct cvmx_gpio_rx_dat_s cn31xx;
 	struct cvmx_gpio_rx_dat_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t dat:16;
+#else
+		uint64_t dat:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xx;
 	struct cvmx_gpio_rx_dat_cn38xx cn38xxp2;
 	struct cvmx_gpio_rx_dat_s cn50xx;
@@ -175,21 +331,59 @@ union cvmx_gpio_rx_dat {
 	struct cvmx_gpio_rx_dat_cn38xx cn56xxp1;
 	struct cvmx_gpio_rx_dat_cn38xx cn58xx;
 	struct cvmx_gpio_rx_dat_cn38xx cn58xxp1;
+	struct cvmx_gpio_rx_dat_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t dat:20;
+#else
+		uint64_t dat:20;
+		uint64_t reserved_20_63:44;
+#endif
+	} cn61xx;
 	struct cvmx_gpio_rx_dat_cn38xx cn63xx;
 	struct cvmx_gpio_rx_dat_cn38xx cn63xxp1;
+	struct cvmx_gpio_rx_dat_cn61xx cn66xx;
+	struct cvmx_gpio_rx_dat_cn38xx cn68xx;
+	struct cvmx_gpio_rx_dat_cn38xx cn68xxp1;
+	struct cvmx_gpio_rx_dat_cn61xx cnf71xx;
+};
+
+union cvmx_gpio_tim_ctl {
+	uint64_t u64;
+	struct cvmx_gpio_tim_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t sel:4;
+#else
+		uint64_t sel:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_gpio_tim_ctl_s cn68xx;
+	struct cvmx_gpio_tim_ctl_s cn68xxp1;
 };
 
 union cvmx_gpio_tx_clr {
 	uint64_t u64;
 	struct cvmx_gpio_tx_clr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t clr:24;
+#else
+		uint64_t clr:24;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_gpio_tx_clr_s cn30xx;
 	struct cvmx_gpio_tx_clr_s cn31xx;
 	struct cvmx_gpio_tx_clr_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t clr:16;
+#else
+		uint64_t clr:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xx;
 	struct cvmx_gpio_tx_clr_cn38xx cn38xxp2;
 	struct cvmx_gpio_tx_clr_s cn50xx;
@@ -199,21 +393,44 @@ union cvmx_gpio_tx_clr {
 	struct cvmx_gpio_tx_clr_cn38xx cn56xxp1;
 	struct cvmx_gpio_tx_clr_cn38xx cn58xx;
 	struct cvmx_gpio_tx_clr_cn38xx cn58xxp1;
+	struct cvmx_gpio_tx_clr_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t clr:20;
+#else
+		uint64_t clr:20;
+		uint64_t reserved_20_63:44;
+#endif
+	} cn61xx;
 	struct cvmx_gpio_tx_clr_cn38xx cn63xx;
 	struct cvmx_gpio_tx_clr_cn38xx cn63xxp1;
+	struct cvmx_gpio_tx_clr_cn61xx cn66xx;
+	struct cvmx_gpio_tx_clr_cn38xx cn68xx;
+	struct cvmx_gpio_tx_clr_cn38xx cn68xxp1;
+	struct cvmx_gpio_tx_clr_cn61xx cnf71xx;
 };
 
 union cvmx_gpio_tx_set {
 	uint64_t u64;
 	struct cvmx_gpio_tx_set_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t set:24;
+#else
+		uint64_t set:24;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_gpio_tx_set_s cn30xx;
 	struct cvmx_gpio_tx_set_s cn31xx;
 	struct cvmx_gpio_tx_set_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t set:16;
+#else
+		uint64_t set:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xx;
 	struct cvmx_gpio_tx_set_cn38xx cn38xxp2;
 	struct cvmx_gpio_tx_set_s cn50xx;
@@ -223,23 +440,72 @@ union cvmx_gpio_tx_set {
 	struct cvmx_gpio_tx_set_cn38xx cn56xxp1;
 	struct cvmx_gpio_tx_set_cn38xx cn58xx;
 	struct cvmx_gpio_tx_set_cn38xx cn58xxp1;
+	struct cvmx_gpio_tx_set_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t set:20;
+#else
+		uint64_t set:20;
+		uint64_t reserved_20_63:44;
+#endif
+	} cn61xx;
 	struct cvmx_gpio_tx_set_cn38xx cn63xx;
 	struct cvmx_gpio_tx_set_cn38xx cn63xxp1;
+	struct cvmx_gpio_tx_set_cn61xx cn66xx;
+	struct cvmx_gpio_tx_set_cn38xx cn68xx;
+	struct cvmx_gpio_tx_set_cn38xx cn68xxp1;
+	struct cvmx_gpio_tx_set_cn61xx cnf71xx;
 };
 
 union cvmx_gpio_xbit_cfgx {
 	uint64_t u64;
 	struct cvmx_gpio_xbit_cfgx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_17_63:47;
+		uint64_t synce_sel:2;
+		uint64_t clk_gen:1;
+		uint64_t clk_sel:2;
+		uint64_t fil_sel:4;
+		uint64_t fil_cnt:4;
+		uint64_t int_type:1;
+		uint64_t int_en:1;
+		uint64_t rx_xor:1;
+		uint64_t tx_oe:1;
+#else
+		uint64_t tx_oe:1;
+		uint64_t rx_xor:1;
+		uint64_t int_en:1;
+		uint64_t int_type:1;
+		uint64_t fil_cnt:4;
+		uint64_t fil_sel:4;
+		uint64_t clk_sel:2;
+		uint64_t clk_gen:1;
+		uint64_t synce_sel:2;
+		uint64_t reserved_17_63:47;
+#endif
+	} s;
+	struct cvmx_gpio_xbit_cfgx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t fil_sel:4;
 		uint64_t fil_cnt:4;
 		uint64_t reserved_2_3:2;
 		uint64_t rx_xor:1;
 		uint64_t tx_oe:1;
-	} s;
-	struct cvmx_gpio_xbit_cfgx_s cn30xx;
-	struct cvmx_gpio_xbit_cfgx_s cn31xx;
-	struct cvmx_gpio_xbit_cfgx_s cn50xx;
+#else
+		uint64_t tx_oe:1;
+		uint64_t rx_xor:1;
+		uint64_t reserved_2_3:2;
+		uint64_t fil_cnt:4;
+		uint64_t fil_sel:4;
+		uint64_t reserved_12_63:52;
+#endif
+	} cn30xx;
+	struct cvmx_gpio_xbit_cfgx_cn30xx cn31xx;
+	struct cvmx_gpio_xbit_cfgx_cn30xx cn50xx;
+	struct cvmx_gpio_xbit_cfgx_s cn61xx;
+	struct cvmx_gpio_xbit_cfgx_s cn66xx;
+	struct cvmx_gpio_xbit_cfgx_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-iob-defs.h b/arch/mips/include/asm/octeon/cvmx-iob-defs.h
index d7d856c2483..7936f816e93 100644
--- a/arch/mips/include/asm/octeon/cvmx-iob-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-iob-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -51,10 +51,86 @@
 #define CVMX_IOB_P2C_REQ_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000018ull))
 #define CVMX_IOB_PKT_ERR (CVMX_ADD_IO_SEG(0x00011800F0000068ull))
 #define CVMX_IOB_TO_CMB_CREDITS (CVMX_ADD_IO_SEG(0x00011800F00000B0ull))
+#define CVMX_IOB_TO_NCB_DID_00_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000800ull))
+#define CVMX_IOB_TO_NCB_DID_111_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000B78ull))
+#define CVMX_IOB_TO_NCB_DID_223_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000EF8ull))
+#define CVMX_IOB_TO_NCB_DID_24_CREDITS (CVMX_ADD_IO_SEG(0x00011800F00008C0ull))
+#define CVMX_IOB_TO_NCB_DID_32_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000900ull))
+#define CVMX_IOB_TO_NCB_DID_40_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000940ull))
+#define CVMX_IOB_TO_NCB_DID_55_CREDITS (CVMX_ADD_IO_SEG(0x00011800F00009B8ull))
+#define CVMX_IOB_TO_NCB_DID_64_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000A00ull))
+#define CVMX_IOB_TO_NCB_DID_79_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000A78ull))
+#define CVMX_IOB_TO_NCB_DID_96_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000B00ull))
+#define CVMX_IOB_TO_NCB_DID_98_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000B10ull))
 
 union cvmx_iob_bist_status {
 	uint64_t u64;
 	struct cvmx_iob_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_2_63:62;
+		uint64_t ibd:1;
+		uint64_t icd:1;
+#else
+		uint64_t icd:1;
+		uint64_t ibd:1;
+		uint64_t reserved_2_63:62;
+#endif
+	} s;
+	struct cvmx_iob_bist_status_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_18_63:46;
+		uint64_t icnrcb:1;
+		uint64_t icr0:1;
+		uint64_t icr1:1;
+		uint64_t icnr1:1;
+		uint64_t icnr0:1;
+		uint64_t ibdr0:1;
+		uint64_t ibdr1:1;
+		uint64_t ibr0:1;
+		uint64_t ibr1:1;
+		uint64_t icnrt:1;
+		uint64_t ibrq0:1;
+		uint64_t ibrq1:1;
+		uint64_t icrn0:1;
+		uint64_t icrn1:1;
+		uint64_t icrp0:1;
+		uint64_t icrp1:1;
+		uint64_t ibd:1;
+		uint64_t icd:1;
+#else
+		uint64_t icd:1;
+		uint64_t ibd:1;
+		uint64_t icrp1:1;
+		uint64_t icrp0:1;
+		uint64_t icrn1:1;
+		uint64_t icrn0:1;
+		uint64_t ibrq1:1;
+		uint64_t ibrq0:1;
+		uint64_t icnrt:1;
+		uint64_t ibr1:1;
+		uint64_t ibr0:1;
+		uint64_t ibdr1:1;
+		uint64_t ibdr0:1;
+		uint64_t icnr0:1;
+		uint64_t icnr1:1;
+		uint64_t icr1:1;
+		uint64_t icr0:1;
+		uint64_t icnrcb:1;
+		uint64_t reserved_18_63:46;
+#endif
+	} cn30xx;
+	struct cvmx_iob_bist_status_cn30xx cn31xx;
+	struct cvmx_iob_bist_status_cn30xx cn38xx;
+	struct cvmx_iob_bist_status_cn30xx cn38xxp2;
+	struct cvmx_iob_bist_status_cn30xx cn50xx;
+	struct cvmx_iob_bist_status_cn30xx cn52xx;
+	struct cvmx_iob_bist_status_cn30xx cn52xxp1;
+	struct cvmx_iob_bist_status_cn30xx cn56xx;
+	struct cvmx_iob_bist_status_cn30xx cn56xxp1;
+	struct cvmx_iob_bist_status_cn30xx cn58xx;
+	struct cvmx_iob_bist_status_cn30xx cn58xxp1;
+	struct cvmx_iob_bist_status_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t xmdfif:1;
 		uint64_t xmcfif:1;
@@ -79,16 +155,48 @@ union cvmx_iob_bist_status {
 		uint64_t icrp1:1;
 		uint64_t ibd:1;
 		uint64_t icd:1;
-	} s;
-	struct cvmx_iob_bist_status_cn30xx {
+#else
+		uint64_t icd:1;
+		uint64_t ibd:1;
+		uint64_t icrp1:1;
+		uint64_t icrp0:1;
+		uint64_t icrn1:1;
+		uint64_t icrn0:1;
+		uint64_t ibrq1:1;
+		uint64_t ibrq0:1;
+		uint64_t icnrt:1;
+		uint64_t ibr1:1;
+		uint64_t ibr0:1;
+		uint64_t ibdr1:1;
+		uint64_t ibdr0:1;
+		uint64_t icnr0:1;
+		uint64_t icnr1:1;
+		uint64_t icr1:1;
+		uint64_t icr0:1;
+		uint64_t icnrcb:1;
+		uint64_t iocfif:1;
+		uint64_t rsdfif:1;
+		uint64_t iorfif:1;
+		uint64_t xmcfif:1;
+		uint64_t xmdfif:1;
+		uint64_t reserved_23_63:41;
+#endif
+	} cn61xx;
+	struct cvmx_iob_bist_status_cn61xx cn63xx;
+	struct cvmx_iob_bist_status_cn61xx cn63xxp1;
+	struct cvmx_iob_bist_status_cn61xx cn66xx;
+	struct cvmx_iob_bist_status_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
+		uint64_t xmdfif:1;
+		uint64_t xmcfif:1;
+		uint64_t iorfif:1;
+		uint64_t rsdfif:1;
+		uint64_t iocfif:1;
 		uint64_t icnrcb:1;
 		uint64_t icr0:1;
 		uint64_t icr1:1;
-		uint64_t icnr1:1;
 		uint64_t icnr0:1;
-		uint64_t ibdr0:1;
-		uint64_t ibdr1:1;
 		uint64_t ibr0:1;
 		uint64_t ibr1:1;
 		uint64_t icnrt:1;
@@ -96,50 +204,82 @@ union cvmx_iob_bist_status {
 		uint64_t ibrq1:1;
 		uint64_t icrn0:1;
 		uint64_t icrn1:1;
-		uint64_t icrp0:1;
-		uint64_t icrp1:1;
 		uint64_t ibd:1;
 		uint64_t icd:1;
-	} cn30xx;
-	struct cvmx_iob_bist_status_cn30xx cn31xx;
-	struct cvmx_iob_bist_status_cn30xx cn38xx;
-	struct cvmx_iob_bist_status_cn30xx cn38xxp2;
-	struct cvmx_iob_bist_status_cn30xx cn50xx;
-	struct cvmx_iob_bist_status_cn30xx cn52xx;
-	struct cvmx_iob_bist_status_cn30xx cn52xxp1;
-	struct cvmx_iob_bist_status_cn30xx cn56xx;
-	struct cvmx_iob_bist_status_cn30xx cn56xxp1;
-	struct cvmx_iob_bist_status_cn30xx cn58xx;
-	struct cvmx_iob_bist_status_cn30xx cn58xxp1;
-	struct cvmx_iob_bist_status_s cn63xx;
-	struct cvmx_iob_bist_status_s cn63xxp1;
+#else
+		uint64_t icd:1;
+		uint64_t ibd:1;
+		uint64_t icrn1:1;
+		uint64_t icrn0:1;
+		uint64_t ibrq1:1;
+		uint64_t ibrq0:1;
+		uint64_t icnrt:1;
+		uint64_t ibr1:1;
+		uint64_t ibr0:1;
+		uint64_t icnr0:1;
+		uint64_t icr1:1;
+		uint64_t icr0:1;
+		uint64_t icnrcb:1;
+		uint64_t iocfif:1;
+		uint64_t rsdfif:1;
+		uint64_t iorfif:1;
+		uint64_t xmcfif:1;
+		uint64_t xmdfif:1;
+		uint64_t reserved_18_63:46;
+#endif
+	} cn68xx;
+	struct cvmx_iob_bist_status_cn68xx cn68xxp1;
+	struct cvmx_iob_bist_status_cn61xx cnf71xx;
 };
 
 union cvmx_iob_ctl_status {
 	uint64_t u64;
 	struct cvmx_iob_ctl_status_s {
-		uint64_t reserved_10_63:54;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_11_63:53;
+		uint64_t fif_dly:1;
 		uint64_t xmc_per:4;
-		uint64_t rr_mode:1;
+		uint64_t reserved_5_5:1;
 		uint64_t outb_mat:1;
 		uint64_t inb_mat:1;
 		uint64_t pko_enb:1;
 		uint64_t dwb_enb:1;
 		uint64_t fau_end:1;
+#else
+		uint64_t fau_end:1;
+		uint64_t dwb_enb:1;
+		uint64_t pko_enb:1;
+		uint64_t inb_mat:1;
+		uint64_t outb_mat:1;
+		uint64_t reserved_5_5:1;
+		uint64_t xmc_per:4;
+		uint64_t fif_dly:1;
+		uint64_t reserved_11_63:53;
+#endif
 	} s;
 	struct cvmx_iob_ctl_status_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t outb_mat:1;
 		uint64_t inb_mat:1;
 		uint64_t pko_enb:1;
 		uint64_t dwb_enb:1;
 		uint64_t fau_end:1;
+#else
+		uint64_t fau_end:1;
+		uint64_t dwb_enb:1;
+		uint64_t pko_enb:1;
+		uint64_t inb_mat:1;
+		uint64_t outb_mat:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} cn30xx;
 	struct cvmx_iob_ctl_status_cn30xx cn31xx;
 	struct cvmx_iob_ctl_status_cn30xx cn38xx;
 	struct cvmx_iob_ctl_status_cn30xx cn38xxp2;
 	struct cvmx_iob_ctl_status_cn30xx cn50xx;
 	struct cvmx_iob_ctl_status_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t rr_mode:1;
 		uint64_t outb_mat:1;
@@ -147,22 +287,106 @@ union cvmx_iob_ctl_status {
 		uint64_t pko_enb:1;
 		uint64_t dwb_enb:1;
 		uint64_t fau_end:1;
+#else
+		uint64_t fau_end:1;
+		uint64_t dwb_enb:1;
+		uint64_t pko_enb:1;
+		uint64_t inb_mat:1;
+		uint64_t outb_mat:1;
+		uint64_t rr_mode:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn52xx;
 	struct cvmx_iob_ctl_status_cn30xx cn52xxp1;
 	struct cvmx_iob_ctl_status_cn30xx cn56xx;
 	struct cvmx_iob_ctl_status_cn30xx cn56xxp1;
 	struct cvmx_iob_ctl_status_cn30xx cn58xx;
 	struct cvmx_iob_ctl_status_cn30xx cn58xxp1;
-	struct cvmx_iob_ctl_status_s cn63xx;
-	struct cvmx_iob_ctl_status_s cn63xxp1;
+	struct cvmx_iob_ctl_status_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_11_63:53;
+		uint64_t fif_dly:1;
+		uint64_t xmc_per:4;
+		uint64_t rr_mode:1;
+		uint64_t outb_mat:1;
+		uint64_t inb_mat:1;
+		uint64_t pko_enb:1;
+		uint64_t dwb_enb:1;
+		uint64_t fau_end:1;
+#else
+		uint64_t fau_end:1;
+		uint64_t dwb_enb:1;
+		uint64_t pko_enb:1;
+		uint64_t inb_mat:1;
+		uint64_t outb_mat:1;
+		uint64_t rr_mode:1;
+		uint64_t xmc_per:4;
+		uint64_t fif_dly:1;
+		uint64_t reserved_11_63:53;
+#endif
+	} cn61xx;
+	struct cvmx_iob_ctl_status_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t xmc_per:4;
+		uint64_t rr_mode:1;
+		uint64_t outb_mat:1;
+		uint64_t inb_mat:1;
+		uint64_t pko_enb:1;
+		uint64_t dwb_enb:1;
+		uint64_t fau_end:1;
+#else
+		uint64_t fau_end:1;
+		uint64_t dwb_enb:1;
+		uint64_t pko_enb:1;
+		uint64_t inb_mat:1;
+		uint64_t outb_mat:1;
+		uint64_t rr_mode:1;
+		uint64_t xmc_per:4;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn63xx;
+	struct cvmx_iob_ctl_status_cn63xx cn63xxp1;
+	struct cvmx_iob_ctl_status_cn61xx cn66xx;
+	struct cvmx_iob_ctl_status_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_11_63:53;
+		uint64_t fif_dly:1;
+		uint64_t xmc_per:4;
+		uint64_t rsvr5:1;
+		uint64_t outb_mat:1;
+		uint64_t inb_mat:1;
+		uint64_t pko_enb:1;
+		uint64_t dwb_enb:1;
+		uint64_t fau_end:1;
+#else
+		uint64_t fau_end:1;
+		uint64_t dwb_enb:1;
+		uint64_t pko_enb:1;
+		uint64_t inb_mat:1;
+		uint64_t outb_mat:1;
+		uint64_t rsvr5:1;
+		uint64_t xmc_per:4;
+		uint64_t fif_dly:1;
+		uint64_t reserved_11_63:53;
+#endif
+	} cn68xx;
+	struct cvmx_iob_ctl_status_cn68xx cn68xxp1;
+	struct cvmx_iob_ctl_status_cn61xx cnf71xx;
 };
 
 union cvmx_iob_dwb_pri_cnt {
 	uint64_t u64;
 	struct cvmx_iob_dwb_pri_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt_enb:1;
 		uint64_t cnt_val:15;
+#else
+		uint64_t cnt_val:15;
+		uint64_t cnt_enb:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_iob_dwb_pri_cnt_s cn38xx;
 	struct cvmx_iob_dwb_pri_cnt_s cn38xxp2;
@@ -172,16 +396,25 @@ union cvmx_iob_dwb_pri_cnt {
 	struct cvmx_iob_dwb_pri_cnt_s cn56xxp1;
 	struct cvmx_iob_dwb_pri_cnt_s cn58xx;
 	struct cvmx_iob_dwb_pri_cnt_s cn58xxp1;
+	struct cvmx_iob_dwb_pri_cnt_s cn61xx;
 	struct cvmx_iob_dwb_pri_cnt_s cn63xx;
 	struct cvmx_iob_dwb_pri_cnt_s cn63xxp1;
+	struct cvmx_iob_dwb_pri_cnt_s cn66xx;
+	struct cvmx_iob_dwb_pri_cnt_s cnf71xx;
 };
 
 union cvmx_iob_fau_timeout {
 	uint64_t u64;
 	struct cvmx_iob_fau_timeout_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t tout_enb:1;
 		uint64_t tout_val:12;
+#else
+		uint64_t tout_val:12;
+		uint64_t tout_enb:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_iob_fau_timeout_s cn30xx;
 	struct cvmx_iob_fau_timeout_s cn31xx;
@@ -194,16 +427,27 @@ union cvmx_iob_fau_timeout {
 	struct cvmx_iob_fau_timeout_s cn56xxp1;
 	struct cvmx_iob_fau_timeout_s cn58xx;
 	struct cvmx_iob_fau_timeout_s cn58xxp1;
+	struct cvmx_iob_fau_timeout_s cn61xx;
 	struct cvmx_iob_fau_timeout_s cn63xx;
 	struct cvmx_iob_fau_timeout_s cn63xxp1;
+	struct cvmx_iob_fau_timeout_s cn66xx;
+	struct cvmx_iob_fau_timeout_s cn68xx;
+	struct cvmx_iob_fau_timeout_s cn68xxp1;
+	struct cvmx_iob_fau_timeout_s cnf71xx;
 };
 
 union cvmx_iob_i2c_pri_cnt {
 	uint64_t u64;
 	struct cvmx_iob_i2c_pri_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt_enb:1;
 		uint64_t cnt_val:15;
+#else
+		uint64_t cnt_val:15;
+		uint64_t cnt_enb:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_iob_i2c_pri_cnt_s cn38xx;
 	struct cvmx_iob_i2c_pri_cnt_s cn38xxp2;
@@ -213,18 +457,29 @@ union cvmx_iob_i2c_pri_cnt {
 	struct cvmx_iob_i2c_pri_cnt_s cn56xxp1;
 	struct cvmx_iob_i2c_pri_cnt_s cn58xx;
 	struct cvmx_iob_i2c_pri_cnt_s cn58xxp1;
+	struct cvmx_iob_i2c_pri_cnt_s cn61xx;
 	struct cvmx_iob_i2c_pri_cnt_s cn63xx;
 	struct cvmx_iob_i2c_pri_cnt_s cn63xxp1;
+	struct cvmx_iob_i2c_pri_cnt_s cn66xx;
+	struct cvmx_iob_i2c_pri_cnt_s cnf71xx;
 };
 
 union cvmx_iob_inb_control_match {
 	uint64_t u64;
 	struct cvmx_iob_inb_control_match_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t mask:8;
 		uint64_t opc:4;
 		uint64_t dst:9;
 		uint64_t src:8;
+#else
+		uint64_t src:8;
+		uint64_t dst:9;
+		uint64_t opc:4;
+		uint64_t mask:8;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_iob_inb_control_match_s cn30xx;
 	struct cvmx_iob_inb_control_match_s cn31xx;
@@ -237,18 +492,31 @@ union cvmx_iob_inb_control_match {
 	struct cvmx_iob_inb_control_match_s cn56xxp1;
 	struct cvmx_iob_inb_control_match_s cn58xx;
 	struct cvmx_iob_inb_control_match_s cn58xxp1;
+	struct cvmx_iob_inb_control_match_s cn61xx;
 	struct cvmx_iob_inb_control_match_s cn63xx;
 	struct cvmx_iob_inb_control_match_s cn63xxp1;
+	struct cvmx_iob_inb_control_match_s cn66xx;
+	struct cvmx_iob_inb_control_match_s cn68xx;
+	struct cvmx_iob_inb_control_match_s cn68xxp1;
+	struct cvmx_iob_inb_control_match_s cnf71xx;
 };
 
 union cvmx_iob_inb_control_match_enb {
 	uint64_t u64;
 	struct cvmx_iob_inb_control_match_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t mask:8;
 		uint64_t opc:4;
 		uint64_t dst:9;
 		uint64_t src:8;
+#else
+		uint64_t src:8;
+		uint64_t dst:9;
+		uint64_t opc:4;
+		uint64_t mask:8;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_iob_inb_control_match_enb_s cn30xx;
 	struct cvmx_iob_inb_control_match_enb_s cn31xx;
@@ -261,14 +529,23 @@ union cvmx_iob_inb_control_match_enb {
 	struct cvmx_iob_inb_control_match_enb_s cn56xxp1;
 	struct cvmx_iob_inb_control_match_enb_s cn58xx;
 	struct cvmx_iob_inb_control_match_enb_s cn58xxp1;
+	struct cvmx_iob_inb_control_match_enb_s cn61xx;
 	struct cvmx_iob_inb_control_match_enb_s cn63xx;
 	struct cvmx_iob_inb_control_match_enb_s cn63xxp1;
+	struct cvmx_iob_inb_control_match_enb_s cn66xx;
+	struct cvmx_iob_inb_control_match_enb_s cn68xx;
+	struct cvmx_iob_inb_control_match_enb_s cn68xxp1;
+	struct cvmx_iob_inb_control_match_enb_s cnf71xx;
 };
 
 union cvmx_iob_inb_data_match {
 	uint64_t u64;
 	struct cvmx_iob_inb_data_match_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_iob_inb_data_match_s cn30xx;
 	struct cvmx_iob_inb_data_match_s cn31xx;
@@ -281,14 +558,23 @@ union cvmx_iob_inb_data_match {
 	struct cvmx_iob_inb_data_match_s cn56xxp1;
 	struct cvmx_iob_inb_data_match_s cn58xx;
 	struct cvmx_iob_inb_data_match_s cn58xxp1;
+	struct cvmx_iob_inb_data_match_s cn61xx;
 	struct cvmx_iob_inb_data_match_s cn63xx;
 	struct cvmx_iob_inb_data_match_s cn63xxp1;
+	struct cvmx_iob_inb_data_match_s cn66xx;
+	struct cvmx_iob_inb_data_match_s cn68xx;
+	struct cvmx_iob_inb_data_match_s cn68xxp1;
+	struct cvmx_iob_inb_data_match_s cnf71xx;
 };
 
 union cvmx_iob_inb_data_match_enb {
 	uint64_t u64;
 	struct cvmx_iob_inb_data_match_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:64;
+#else
+		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_iob_inb_data_match_enb_s cn30xx;
 	struct cvmx_iob_inb_data_match_enb_s cn31xx;
@@ -301,13 +587,19 @@ union cvmx_iob_inb_data_match_enb {
 	struct cvmx_iob_inb_data_match_enb_s cn56xxp1;
 	struct cvmx_iob_inb_data_match_enb_s cn58xx;
 	struct cvmx_iob_inb_data_match_enb_s cn58xxp1;
+	struct cvmx_iob_inb_data_match_enb_s cn61xx;
 	struct cvmx_iob_inb_data_match_enb_s cn63xx;
 	struct cvmx_iob_inb_data_match_enb_s cn63xxp1;
+	struct cvmx_iob_inb_data_match_enb_s cn66xx;
+	struct cvmx_iob_inb_data_match_enb_s cn68xx;
+	struct cvmx_iob_inb_data_match_enb_s cn68xxp1;
+	struct cvmx_iob_inb_data_match_enb_s cnf71xx;
 };
 
 union cvmx_iob_int_enb {
 	uint64_t u64;
 	struct cvmx_iob_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t p_dat:1;
 		uint64_t np_dat:1;
@@ -315,13 +607,30 @@ union cvmx_iob_int_enb {
 		uint64_t p_sop:1;
 		uint64_t np_eop:1;
 		uint64_t np_sop:1;
+#else
+		uint64_t np_sop:1;
+		uint64_t np_eop:1;
+		uint64_t p_sop:1;
+		uint64_t p_eop:1;
+		uint64_t np_dat:1;
+		uint64_t p_dat:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_iob_int_enb_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t p_eop:1;
 		uint64_t p_sop:1;
 		uint64_t np_eop:1;
 		uint64_t np_sop:1;
+#else
+		uint64_t np_sop:1;
+		uint64_t np_eop:1;
+		uint64_t p_sop:1;
+		uint64_t p_eop:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn30xx;
 	struct cvmx_iob_int_enb_cn30xx cn31xx;
 	struct cvmx_iob_int_enb_cn30xx cn38xx;
@@ -333,13 +642,25 @@ union cvmx_iob_int_enb {
 	struct cvmx_iob_int_enb_s cn56xxp1;
 	struct cvmx_iob_int_enb_s cn58xx;
 	struct cvmx_iob_int_enb_s cn58xxp1;
+	struct cvmx_iob_int_enb_s cn61xx;
 	struct cvmx_iob_int_enb_s cn63xx;
 	struct cvmx_iob_int_enb_s cn63xxp1;
+	struct cvmx_iob_int_enb_s cn66xx;
+	struct cvmx_iob_int_enb_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
+	} cn68xx;
+	struct cvmx_iob_int_enb_cn68xx cn68xxp1;
+	struct cvmx_iob_int_enb_s cnf71xx;
 };
 
 union cvmx_iob_int_sum {
 	uint64_t u64;
 	struct cvmx_iob_int_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t p_dat:1;
 		uint64_t np_dat:1;
@@ -347,13 +668,30 @@ union cvmx_iob_int_sum {
 		uint64_t p_sop:1;
 		uint64_t np_eop:1;
 		uint64_t np_sop:1;
+#else
+		uint64_t np_sop:1;
+		uint64_t np_eop:1;
+		uint64_t p_sop:1;
+		uint64_t p_eop:1;
+		uint64_t np_dat:1;
+		uint64_t p_dat:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_iob_int_sum_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t p_eop:1;
 		uint64_t p_sop:1;
 		uint64_t np_eop:1;
 		uint64_t np_sop:1;
+#else
+		uint64_t np_sop:1;
+		uint64_t np_eop:1;
+		uint64_t p_sop:1;
+		uint64_t p_eop:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn30xx;
 	struct cvmx_iob_int_sum_cn30xx cn31xx;
 	struct cvmx_iob_int_sum_cn30xx cn38xx;
@@ -365,16 +703,33 @@ union cvmx_iob_int_sum {
 	struct cvmx_iob_int_sum_s cn56xxp1;
 	struct cvmx_iob_int_sum_s cn58xx;
 	struct cvmx_iob_int_sum_s cn58xxp1;
+	struct cvmx_iob_int_sum_s cn61xx;
 	struct cvmx_iob_int_sum_s cn63xx;
 	struct cvmx_iob_int_sum_s cn63xxp1;
+	struct cvmx_iob_int_sum_s cn66xx;
+	struct cvmx_iob_int_sum_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
+	} cn68xx;
+	struct cvmx_iob_int_sum_cn68xx cn68xxp1;
+	struct cvmx_iob_int_sum_s cnf71xx;
 };
 
 union cvmx_iob_n2c_l2c_pri_cnt {
 	uint64_t u64;
 	struct cvmx_iob_n2c_l2c_pri_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt_enb:1;
 		uint64_t cnt_val:15;
+#else
+		uint64_t cnt_val:15;
+		uint64_t cnt_enb:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xx;
 	struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xxp2;
@@ -384,16 +739,25 @@ union cvmx_iob_n2c_l2c_pri_cnt {
 	struct cvmx_iob_n2c_l2c_pri_cnt_s cn56xxp1;
 	struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xx;
 	struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xxp1;
+	struct cvmx_iob_n2c_l2c_pri_cnt_s cn61xx;
 	struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xx;
 	struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xxp1;
+	struct cvmx_iob_n2c_l2c_pri_cnt_s cn66xx;
+	struct cvmx_iob_n2c_l2c_pri_cnt_s cnf71xx;
 };
 
 union cvmx_iob_n2c_rsp_pri_cnt {
 	uint64_t u64;
 	struct cvmx_iob_n2c_rsp_pri_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt_enb:1;
 		uint64_t cnt_val:15;
+#else
+		uint64_t cnt_val:15;
+		uint64_t cnt_enb:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xx;
 	struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xxp2;
@@ -403,16 +767,25 @@ union cvmx_iob_n2c_rsp_pri_cnt {
 	struct cvmx_iob_n2c_rsp_pri_cnt_s cn56xxp1;
 	struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xx;
 	struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xxp1;
+	struct cvmx_iob_n2c_rsp_pri_cnt_s cn61xx;
 	struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xx;
 	struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xxp1;
+	struct cvmx_iob_n2c_rsp_pri_cnt_s cn66xx;
+	struct cvmx_iob_n2c_rsp_pri_cnt_s cnf71xx;
 };
 
 union cvmx_iob_outb_com_pri_cnt {
 	uint64_t u64;
 	struct cvmx_iob_outb_com_pri_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt_enb:1;
 		uint64_t cnt_val:15;
+#else
+		uint64_t cnt_val:15;
+		uint64_t cnt_enb:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_iob_outb_com_pri_cnt_s cn38xx;
 	struct cvmx_iob_outb_com_pri_cnt_s cn38xxp2;
@@ -422,18 +795,31 @@ union cvmx_iob_outb_com_pri_cnt {
 	struct cvmx_iob_outb_com_pri_cnt_s cn56xxp1;
 	struct cvmx_iob_outb_com_pri_cnt_s cn58xx;
 	struct cvmx_iob_outb_com_pri_cnt_s cn58xxp1;
+	struct cvmx_iob_outb_com_pri_cnt_s cn61xx;
 	struct cvmx_iob_outb_com_pri_cnt_s cn63xx;
 	struct cvmx_iob_outb_com_pri_cnt_s cn63xxp1;
+	struct cvmx_iob_outb_com_pri_cnt_s cn66xx;
+	struct cvmx_iob_outb_com_pri_cnt_s cn68xx;
+	struct cvmx_iob_outb_com_pri_cnt_s cn68xxp1;
+	struct cvmx_iob_outb_com_pri_cnt_s cnf71xx;
 };
 
 union cvmx_iob_outb_control_match {
 	uint64_t u64;
 	struct cvmx_iob_outb_control_match_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_26_63:38;
 		uint64_t mask:8;
 		uint64_t eot:1;
 		uint64_t dst:8;
 		uint64_t src:9;
+#else
+		uint64_t src:9;
+		uint64_t dst:8;
+		uint64_t eot:1;
+		uint64_t mask:8;
+		uint64_t reserved_26_63:38;
+#endif
 	} s;
 	struct cvmx_iob_outb_control_match_s cn30xx;
 	struct cvmx_iob_outb_control_match_s cn31xx;
@@ -446,18 +832,31 @@ union cvmx_iob_outb_control_match {
 	struct cvmx_iob_outb_control_match_s cn56xxp1;
 	struct cvmx_iob_outb_control_match_s cn58xx;
 	struct cvmx_iob_outb_control_match_s cn58xxp1;
+	struct cvmx_iob_outb_control_match_s cn61xx;
 	struct cvmx_iob_outb_control_match_s cn63xx;
 	struct cvmx_iob_outb_control_match_s cn63xxp1;
+	struct cvmx_iob_outb_control_match_s cn66xx;
+	struct cvmx_iob_outb_control_match_s cn68xx;
+	struct cvmx_iob_outb_control_match_s cn68xxp1;
+	struct cvmx_iob_outb_control_match_s cnf71xx;
 };
 
 union cvmx_iob_outb_control_match_enb {
 	uint64_t u64;
 	struct cvmx_iob_outb_control_match_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_26_63:38;
 		uint64_t mask:8;
 		uint64_t eot:1;
 		uint64_t dst:8;
 		uint64_t src:9;
+#else
+		uint64_t src:9;
+		uint64_t dst:8;
+		uint64_t eot:1;
+		uint64_t mask:8;
+		uint64_t reserved_26_63:38;
+#endif
 	} s;
 	struct cvmx_iob_outb_control_match_enb_s cn30xx;
 	struct cvmx_iob_outb_control_match_enb_s cn31xx;
@@ -470,14 +869,23 @@ union cvmx_iob_outb_control_match_enb {
 	struct cvmx_iob_outb_control_match_enb_s cn56xxp1;
 	struct cvmx_iob_outb_control_match_enb_s cn58xx;
 	struct cvmx_iob_outb_control_match_enb_s cn58xxp1;
+	struct cvmx_iob_outb_control_match_enb_s cn61xx;
 	struct cvmx_iob_outb_control_match_enb_s cn63xx;
 	struct cvmx_iob_outb_control_match_enb_s cn63xxp1;
+	struct cvmx_iob_outb_control_match_enb_s cn66xx;
+	struct cvmx_iob_outb_control_match_enb_s cn68xx;
+	struct cvmx_iob_outb_control_match_enb_s cn68xxp1;
+	struct cvmx_iob_outb_control_match_enb_s cnf71xx;
 };
 
 union cvmx_iob_outb_data_match {
 	uint64_t u64;
 	struct cvmx_iob_outb_data_match_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:64;
+#else
+		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_iob_outb_data_match_s cn30xx;
 	struct cvmx_iob_outb_data_match_s cn31xx;
@@ -490,14 +898,23 @@ union cvmx_iob_outb_data_match {
 	struct cvmx_iob_outb_data_match_s cn56xxp1;
 	struct cvmx_iob_outb_data_match_s cn58xx;
 	struct cvmx_iob_outb_data_match_s cn58xxp1;
+	struct cvmx_iob_outb_data_match_s cn61xx;
 	struct cvmx_iob_outb_data_match_s cn63xx;
 	struct cvmx_iob_outb_data_match_s cn63xxp1;
+	struct cvmx_iob_outb_data_match_s cn66xx;
+	struct cvmx_iob_outb_data_match_s cn68xx;
+	struct cvmx_iob_outb_data_match_s cn68xxp1;
+	struct cvmx_iob_outb_data_match_s cnf71xx;
 };
 
 union cvmx_iob_outb_data_match_enb {
 	uint64_t u64;
 	struct cvmx_iob_outb_data_match_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_iob_outb_data_match_enb_s cn30xx;
 	struct cvmx_iob_outb_data_match_enb_s cn31xx;
@@ -510,16 +927,27 @@ union cvmx_iob_outb_data_match_enb {
 	struct cvmx_iob_outb_data_match_enb_s cn56xxp1;
 	struct cvmx_iob_outb_data_match_enb_s cn58xx;
 	struct cvmx_iob_outb_data_match_enb_s cn58xxp1;
+	struct cvmx_iob_outb_data_match_enb_s cn61xx;
 	struct cvmx_iob_outb_data_match_enb_s cn63xx;
 	struct cvmx_iob_outb_data_match_enb_s cn63xxp1;
+	struct cvmx_iob_outb_data_match_enb_s cn66xx;
+	struct cvmx_iob_outb_data_match_enb_s cn68xx;
+	struct cvmx_iob_outb_data_match_enb_s cn68xxp1;
+	struct cvmx_iob_outb_data_match_enb_s cnf71xx;
 };
 
 union cvmx_iob_outb_fpa_pri_cnt {
 	uint64_t u64;
 	struct cvmx_iob_outb_fpa_pri_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt_enb:1;
 		uint64_t cnt_val:15;
+#else
+		uint64_t cnt_val:15;
+		uint64_t cnt_enb:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_iob_outb_fpa_pri_cnt_s cn38xx;
 	struct cvmx_iob_outb_fpa_pri_cnt_s cn38xxp2;
@@ -529,16 +957,27 @@ union cvmx_iob_outb_fpa_pri_cnt {
 	struct cvmx_iob_outb_fpa_pri_cnt_s cn56xxp1;
 	struct cvmx_iob_outb_fpa_pri_cnt_s cn58xx;
 	struct cvmx_iob_outb_fpa_pri_cnt_s cn58xxp1;
+	struct cvmx_iob_outb_fpa_pri_cnt_s cn61xx;
 	struct cvmx_iob_outb_fpa_pri_cnt_s cn63xx;
 	struct cvmx_iob_outb_fpa_pri_cnt_s cn63xxp1;
+	struct cvmx_iob_outb_fpa_pri_cnt_s cn66xx;
+	struct cvmx_iob_outb_fpa_pri_cnt_s cn68xx;
+	struct cvmx_iob_outb_fpa_pri_cnt_s cn68xxp1;
+	struct cvmx_iob_outb_fpa_pri_cnt_s cnf71xx;
 };
 
 union cvmx_iob_outb_req_pri_cnt {
 	uint64_t u64;
 	struct cvmx_iob_outb_req_pri_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt_enb:1;
 		uint64_t cnt_val:15;
+#else
+		uint64_t cnt_val:15;
+		uint64_t cnt_enb:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_iob_outb_req_pri_cnt_s cn38xx;
 	struct cvmx_iob_outb_req_pri_cnt_s cn38xxp2;
@@ -548,16 +987,27 @@ union cvmx_iob_outb_req_pri_cnt {
 	struct cvmx_iob_outb_req_pri_cnt_s cn56xxp1;
 	struct cvmx_iob_outb_req_pri_cnt_s cn58xx;
 	struct cvmx_iob_outb_req_pri_cnt_s cn58xxp1;
+	struct cvmx_iob_outb_req_pri_cnt_s cn61xx;
 	struct cvmx_iob_outb_req_pri_cnt_s cn63xx;
 	struct cvmx_iob_outb_req_pri_cnt_s cn63xxp1;
+	struct cvmx_iob_outb_req_pri_cnt_s cn66xx;
+	struct cvmx_iob_outb_req_pri_cnt_s cn68xx;
+	struct cvmx_iob_outb_req_pri_cnt_s cn68xxp1;
+	struct cvmx_iob_outb_req_pri_cnt_s cnf71xx;
 };
 
 union cvmx_iob_p2c_req_pri_cnt {
 	uint64_t u64;
 	struct cvmx_iob_p2c_req_pri_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t cnt_enb:1;
 		uint64_t cnt_val:15;
+#else
+		uint64_t cnt_val:15;
+		uint64_t cnt_enb:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_iob_p2c_req_pri_cnt_s cn38xx;
 	struct cvmx_iob_p2c_req_pri_cnt_s cn38xxp2;
@@ -567,20 +1017,34 @@ union cvmx_iob_p2c_req_pri_cnt {
 	struct cvmx_iob_p2c_req_pri_cnt_s cn56xxp1;
 	struct cvmx_iob_p2c_req_pri_cnt_s cn58xx;
 	struct cvmx_iob_p2c_req_pri_cnt_s cn58xxp1;
+	struct cvmx_iob_p2c_req_pri_cnt_s cn61xx;
 	struct cvmx_iob_p2c_req_pri_cnt_s cn63xx;
 	struct cvmx_iob_p2c_req_pri_cnt_s cn63xxp1;
+	struct cvmx_iob_p2c_req_pri_cnt_s cn66xx;
+	struct cvmx_iob_p2c_req_pri_cnt_s cnf71xx;
 };
 
 union cvmx_iob_pkt_err {
 	uint64_t u64;
 	struct cvmx_iob_pkt_err_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t vport:6;
 		uint64_t port:6;
+#else
+		uint64_t port:6;
+		uint64_t vport:6;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_iob_pkt_err_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t port:6;
+#else
+		uint64_t port:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn30xx;
 	struct cvmx_iob_pkt_err_cn30xx cn31xx;
 	struct cvmx_iob_pkt_err_cn30xx cn38xx;
@@ -592,21 +1056,223 @@ union cvmx_iob_pkt_err {
 	struct cvmx_iob_pkt_err_cn30xx cn56xxp1;
 	struct cvmx_iob_pkt_err_cn30xx cn58xx;
 	struct cvmx_iob_pkt_err_cn30xx cn58xxp1;
+	struct cvmx_iob_pkt_err_s cn61xx;
 	struct cvmx_iob_pkt_err_s cn63xx;
 	struct cvmx_iob_pkt_err_s cn63xxp1;
+	struct cvmx_iob_pkt_err_s cn66xx;
+	struct cvmx_iob_pkt_err_s cnf71xx;
 };
 
 union cvmx_iob_to_cmb_credits {
 	uint64_t u64;
 	struct cvmx_iob_to_cmb_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_6_63:58;
+		uint64_t ncb_rd:3;
+		uint64_t ncb_wr:3;
+#else
+		uint64_t ncb_wr:3;
+		uint64_t ncb_rd:3;
+		uint64_t reserved_6_63:58;
+#endif
+	} s;
+	struct cvmx_iob_to_cmb_credits_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t pko_rd:3;
 		uint64_t ncb_rd:3;
 		uint64_t ncb_wr:3;
+#else
+		uint64_t ncb_wr:3;
+		uint64_t ncb_rd:3;
+		uint64_t pko_rd:3;
+		uint64_t reserved_9_63:55;
+#endif
+	} cn52xx;
+	struct cvmx_iob_to_cmb_credits_cn52xx cn61xx;
+	struct cvmx_iob_to_cmb_credits_cn52xx cn63xx;
+	struct cvmx_iob_to_cmb_credits_cn52xx cn63xxp1;
+	struct cvmx_iob_to_cmb_credits_cn52xx cn66xx;
+	struct cvmx_iob_to_cmb_credits_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_9_63:55;
+		uint64_t dwb:3;
+		uint64_t ncb_rd:3;
+		uint64_t ncb_wr:3;
+#else
+		uint64_t ncb_wr:3;
+		uint64_t ncb_rd:3;
+		uint64_t dwb:3;
+		uint64_t reserved_9_63:55;
+#endif
+	} cn68xx;
+	struct cvmx_iob_to_cmb_credits_cn68xx cn68xxp1;
+	struct cvmx_iob_to_cmb_credits_cn52xx cnf71xx;
+};
+
+union cvmx_iob_to_ncb_did_00_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_00_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_00_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_00_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_111_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_111_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_111_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_111_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_223_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_223_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_223_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_223_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_24_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_24_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_24_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_24_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_32_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_32_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_32_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_32_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_40_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_40_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_40_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_40_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_55_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_55_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_55_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_55_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_64_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_64_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_64_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_64_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_79_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_79_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_79_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_79_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_96_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_96_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_iob_to_ncb_did_96_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_96_credits_s cn68xxp1;
+};
+
+union cvmx_iob_to_ncb_did_98_credits {
+	uint64_t u64;
+	struct cvmx_iob_to_ncb_did_98_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t crd:7;
+#else
+		uint64_t crd:7;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
-	struct cvmx_iob_to_cmb_credits_s cn52xx;
-	struct cvmx_iob_to_cmb_credits_s cn63xx;
-	struct cvmx_iob_to_cmb_credits_s cn63xxp1;
+	struct cvmx_iob_to_ncb_did_98_credits_s cn68xx;
+	struct cvmx_iob_to_ncb_did_98_credits_s cn68xxp1;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-ipd-defs.h b/arch/mips/include/asm/octeon/cvmx-ipd-defs.h
index e0a5bfe88d0..1193f73bb74 100644
--- a/arch/mips/include/asm/octeon/cvmx-ipd-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-ipd-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -32,23 +32,37 @@
 #define CVMX_IPD_1st_NEXT_PTR_BACK (CVMX_ADD_IO_SEG(0x00014F0000000150ull))
 #define CVMX_IPD_2nd_NEXT_PTR_BACK (CVMX_ADD_IO_SEG(0x00014F0000000158ull))
 #define CVMX_IPD_BIST_STATUS (CVMX_ADD_IO_SEG(0x00014F00000007F8ull))
+#define CVMX_IPD_BPIDX_MBUF_TH(offset) (CVMX_ADD_IO_SEG(0x00014F0000002000ull) + ((offset) & 63) * 8)
+#define CVMX_IPD_BPID_BP_COUNTERX(offset) (CVMX_ADD_IO_SEG(0x00014F0000003000ull) + ((offset) & 63) * 8)
 #define CVMX_IPD_BP_PRT_RED_END (CVMX_ADD_IO_SEG(0x00014F0000000328ull))
 #define CVMX_IPD_CLK_COUNT (CVMX_ADD_IO_SEG(0x00014F0000000338ull))
+#define CVMX_IPD_CREDITS (CVMX_ADD_IO_SEG(0x00014F0000004410ull))
 #define CVMX_IPD_CTL_STATUS (CVMX_ADD_IO_SEG(0x00014F0000000018ull))
+#define CVMX_IPD_ECC_CTL (CVMX_ADD_IO_SEG(0x00014F0000004408ull))
+#define CVMX_IPD_FREE_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000780ull))
+#define CVMX_IPD_FREE_PTR_VALUE (CVMX_ADD_IO_SEG(0x00014F0000000788ull))
+#define CVMX_IPD_HOLD_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000790ull))
 #define CVMX_IPD_INT_ENB (CVMX_ADD_IO_SEG(0x00014F0000000160ull))
 #define CVMX_IPD_INT_SUM (CVMX_ADD_IO_SEG(0x00014F0000000168ull))
+#define CVMX_IPD_NEXT_PKT_PTR (CVMX_ADD_IO_SEG(0x00014F00000007A0ull))
+#define CVMX_IPD_NEXT_WQE_PTR (CVMX_ADD_IO_SEG(0x00014F00000007A8ull))
 #define CVMX_IPD_NOT_1ST_MBUFF_SKIP (CVMX_ADD_IO_SEG(0x00014F0000000008ull))
+#define CVMX_IPD_ON_BP_DROP_PKTX(block_id) (CVMX_ADD_IO_SEG(0x00014F0000004100ull))
 #define CVMX_IPD_PACKET_MBUFF_SIZE (CVMX_ADD_IO_SEG(0x00014F0000000010ull))
+#define CVMX_IPD_PKT_ERR (CVMX_ADD_IO_SEG(0x00014F00000003F0ull))
 #define CVMX_IPD_PKT_PTR_VALID (CVMX_ADD_IO_SEG(0x00014F0000000358ull))
 #define CVMX_IPD_PORTX_BP_PAGE_CNT(offset) (CVMX_ADD_IO_SEG(0x00014F0000000028ull) + ((offset) & 63) * 8)
 #define CVMX_IPD_PORTX_BP_PAGE_CNT2(offset) (CVMX_ADD_IO_SEG(0x00014F0000000368ull) + ((offset) & 63) * 8 - 8*36)
 #define CVMX_IPD_PORTX_BP_PAGE_CNT3(offset) (CVMX_ADD_IO_SEG(0x00014F00000003D0ull) + ((offset) & 63) * 8 - 8*40)
 #define CVMX_IPD_PORT_BP_COUNTERS2_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000388ull) + ((offset) & 63) * 8 - 8*36)
 #define CVMX_IPD_PORT_BP_COUNTERS3_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F00000003B0ull) + ((offset) & 63) * 8 - 8*40)
+#define CVMX_IPD_PORT_BP_COUNTERS4_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000410ull) + ((offset) & 63) * 8 - 8*44)
 #define CVMX_IPD_PORT_BP_COUNTERS_PAIRX(offset) (CVMX_ADD_IO_SEG(0x00014F00000001B8ull) + ((offset) & 63) * 8)
+#define CVMX_IPD_PORT_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000798ull))
 #define CVMX_IPD_PORT_QOS_INTX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000808ull) + ((offset) & 7) * 8)
 #define CVMX_IPD_PORT_QOS_INT_ENBX(offset) (CVMX_ADD_IO_SEG(0x00014F0000000848ull) + ((offset) & 7) * 8)
 #define CVMX_IPD_PORT_QOS_X_CNT(offset) (CVMX_ADD_IO_SEG(0x00014F0000000888ull) + ((offset) & 511) * 8)
+#define CVMX_IPD_PORT_SOPX(block_id) (CVMX_ADD_IO_SEG(0x00014F0000004400ull))
 #define CVMX_IPD_PRC_HOLD_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000348ull))
 #define CVMX_IPD_PRC_PORT_PTR_FIFO_CTL (CVMX_ADD_IO_SEG(0x00014F0000000350ull))
 #define CVMX_IPD_PTR_COUNT (CVMX_ADD_IO_SEG(0x00014F0000000320ull))
@@ -63,6 +77,8 @@
 #define CVMX_IPD_QOS7_RED_MARKS CVMX_IPD_QOSX_RED_MARKS(7)
 #define CVMX_IPD_QOSX_RED_MARKS(offset) (CVMX_ADD_IO_SEG(0x00014F0000000178ull) + ((offset) & 7) * 8)
 #define CVMX_IPD_QUE0_FREE_PAGE_CNT (CVMX_ADD_IO_SEG(0x00014F0000000330ull))
+#define CVMX_IPD_RED_BPID_ENABLEX(block_id) (CVMX_ADD_IO_SEG(0x00014F0000004200ull))
+#define CVMX_IPD_RED_DELAY (CVMX_ADD_IO_SEG(0x00014F0000004300ull))
 #define CVMX_IPD_RED_PORT_ENABLE (CVMX_ADD_IO_SEG(0x00014F00000002D8ull))
 #define CVMX_IPD_RED_PORT_ENABLE2 (CVMX_ADD_IO_SEG(0x00014F00000003A8ull))
 #define CVMX_IPD_RED_QUE0_PARAM CVMX_IPD_RED_QUEX_PARAM(0)
@@ -74,6 +90,7 @@
 #define CVMX_IPD_RED_QUE6_PARAM CVMX_IPD_RED_QUEX_PARAM(6)
 #define CVMX_IPD_RED_QUE7_PARAM CVMX_IPD_RED_QUEX_PARAM(7)
 #define CVMX_IPD_RED_QUEX_PARAM(offset) (CVMX_ADD_IO_SEG(0x00014F00000002E0ull) + ((offset) & 7) * 8)
+#define CVMX_IPD_REQ_WGT (CVMX_ADD_IO_SEG(0x00014F0000004418ull))
 #define CVMX_IPD_SUB_PORT_BP_PAGE_CNT (CVMX_ADD_IO_SEG(0x00014F0000000148ull))
 #define CVMX_IPD_SUB_PORT_FCS (CVMX_ADD_IO_SEG(0x00014F0000000170ull))
 #define CVMX_IPD_SUB_PORT_QOS_CNT (CVMX_ADD_IO_SEG(0x00014F0000000800ull))
@@ -83,8 +100,13 @@
 union cvmx_ipd_1st_mbuff_skip {
 	uint64_t u64;
 	struct cvmx_ipd_1st_mbuff_skip_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t skip_sz:6;
+#else
+		uint64_t skip_sz:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_ipd_1st_mbuff_skip_s cn30xx;
 	struct cvmx_ipd_1st_mbuff_skip_s cn31xx;
@@ -97,15 +119,25 @@ union cvmx_ipd_1st_mbuff_skip {
 	struct cvmx_ipd_1st_mbuff_skip_s cn56xxp1;
 	struct cvmx_ipd_1st_mbuff_skip_s cn58xx;
 	struct cvmx_ipd_1st_mbuff_skip_s cn58xxp1;
+	struct cvmx_ipd_1st_mbuff_skip_s cn61xx;
 	struct cvmx_ipd_1st_mbuff_skip_s cn63xx;
 	struct cvmx_ipd_1st_mbuff_skip_s cn63xxp1;
+	struct cvmx_ipd_1st_mbuff_skip_s cn66xx;
+	struct cvmx_ipd_1st_mbuff_skip_s cn68xx;
+	struct cvmx_ipd_1st_mbuff_skip_s cn68xxp1;
+	struct cvmx_ipd_1st_mbuff_skip_s cnf71xx;
 };
 
 union cvmx_ipd_1st_next_ptr_back {
 	uint64_t u64;
 	struct cvmx_ipd_1st_next_ptr_back_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t back:4;
+#else
+		uint64_t back:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_ipd_1st_next_ptr_back_s cn30xx;
 	struct cvmx_ipd_1st_next_ptr_back_s cn31xx;
@@ -118,15 +150,25 @@ union cvmx_ipd_1st_next_ptr_back {
 	struct cvmx_ipd_1st_next_ptr_back_s cn56xxp1;
 	struct cvmx_ipd_1st_next_ptr_back_s cn58xx;
 	struct cvmx_ipd_1st_next_ptr_back_s cn58xxp1;
+	struct cvmx_ipd_1st_next_ptr_back_s cn61xx;
 	struct cvmx_ipd_1st_next_ptr_back_s cn63xx;
 	struct cvmx_ipd_1st_next_ptr_back_s cn63xxp1;
+	struct cvmx_ipd_1st_next_ptr_back_s cn66xx;
+	struct cvmx_ipd_1st_next_ptr_back_s cn68xx;
+	struct cvmx_ipd_1st_next_ptr_back_s cn68xxp1;
+	struct cvmx_ipd_1st_next_ptr_back_s cnf71xx;
 };
 
 union cvmx_ipd_2nd_next_ptr_back {
 	uint64_t u64;
 	struct cvmx_ipd_2nd_next_ptr_back_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t back:4;
+#else
+		uint64_t back:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_ipd_2nd_next_ptr_back_s cn30xx;
 	struct cvmx_ipd_2nd_next_ptr_back_s cn31xx;
@@ -139,14 +181,25 @@ union cvmx_ipd_2nd_next_ptr_back {
 	struct cvmx_ipd_2nd_next_ptr_back_s cn56xxp1;
 	struct cvmx_ipd_2nd_next_ptr_back_s cn58xx;
 	struct cvmx_ipd_2nd_next_ptr_back_s cn58xxp1;
+	struct cvmx_ipd_2nd_next_ptr_back_s cn61xx;
 	struct cvmx_ipd_2nd_next_ptr_back_s cn63xx;
 	struct cvmx_ipd_2nd_next_ptr_back_s cn63xxp1;
+	struct cvmx_ipd_2nd_next_ptr_back_s cn66xx;
+	struct cvmx_ipd_2nd_next_ptr_back_s cn68xx;
+	struct cvmx_ipd_2nd_next_ptr_back_s cn68xxp1;
+	struct cvmx_ipd_2nd_next_ptr_back_s cnf71xx;
 };
 
 union cvmx_ipd_bist_status {
 	uint64_t u64;
 	struct cvmx_ipd_bist_status_s {
-		uint64_t reserved_18_63:46;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_23_63:41;
+		uint64_t iiwo1:1;
+		uint64_t iiwo0:1;
+		uint64_t iio1:1;
+		uint64_t iio0:1;
+		uint64_t pbm4:1;
 		uint64_t csr_mem:1;
 		uint64_t csr_ncmd:1;
 		uint64_t pwq_wqed:1;
@@ -165,8 +218,35 @@ union cvmx_ipd_bist_status {
 		uint64_t ipd_old:1;
 		uint64_t ipd_new:1;
 		uint64_t pwp:1;
+#else
+		uint64_t pwp:1;
+		uint64_t ipd_new:1;
+		uint64_t ipd_old:1;
+		uint64_t prc_off:1;
+		uint64_t pwq0:1;
+		uint64_t pwq1:1;
+		uint64_t pbm_word:1;
+		uint64_t pbm0:1;
+		uint64_t pbm1:1;
+		uint64_t pbm2:1;
+		uint64_t pbm3:1;
+		uint64_t ipq_pbe0:1;
+		uint64_t ipq_pbe1:1;
+		uint64_t pwq_pow:1;
+		uint64_t pwq_wp1:1;
+		uint64_t pwq_wqed:1;
+		uint64_t csr_ncmd:1;
+		uint64_t csr_mem:1;
+		uint64_t pbm4:1;
+		uint64_t iio0:1;
+		uint64_t iio1:1;
+		uint64_t iiwo0:1;
+		uint64_t iiwo1:1;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_ipd_bist_status_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t pwq_wqed:1;
 		uint64_t pwq_wp1:1;
@@ -184,52 +264,180 @@ union cvmx_ipd_bist_status {
 		uint64_t ipd_old:1;
 		uint64_t ipd_new:1;
 		uint64_t pwp:1;
+#else
+		uint64_t pwp:1;
+		uint64_t ipd_new:1;
+		uint64_t ipd_old:1;
+		uint64_t prc_off:1;
+		uint64_t pwq0:1;
+		uint64_t pwq1:1;
+		uint64_t pbm_word:1;
+		uint64_t pbm0:1;
+		uint64_t pbm1:1;
+		uint64_t pbm2:1;
+		uint64_t pbm3:1;
+		uint64_t ipq_pbe0:1;
+		uint64_t ipq_pbe1:1;
+		uint64_t pwq_pow:1;
+		uint64_t pwq_wp1:1;
+		uint64_t pwq_wqed:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn30xx;
 	struct cvmx_ipd_bist_status_cn30xx cn31xx;
 	struct cvmx_ipd_bist_status_cn30xx cn38xx;
 	struct cvmx_ipd_bist_status_cn30xx cn38xxp2;
 	struct cvmx_ipd_bist_status_cn30xx cn50xx;
-	struct cvmx_ipd_bist_status_s cn52xx;
-	struct cvmx_ipd_bist_status_s cn52xxp1;
-	struct cvmx_ipd_bist_status_s cn56xx;
-	struct cvmx_ipd_bist_status_s cn56xxp1;
+	struct cvmx_ipd_bist_status_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_18_63:46;
+		uint64_t csr_mem:1;
+		uint64_t csr_ncmd:1;
+		uint64_t pwq_wqed:1;
+		uint64_t pwq_wp1:1;
+		uint64_t pwq_pow:1;
+		uint64_t ipq_pbe1:1;
+		uint64_t ipq_pbe0:1;
+		uint64_t pbm3:1;
+		uint64_t pbm2:1;
+		uint64_t pbm1:1;
+		uint64_t pbm0:1;
+		uint64_t pbm_word:1;
+		uint64_t pwq1:1;
+		uint64_t pwq0:1;
+		uint64_t prc_off:1;
+		uint64_t ipd_old:1;
+		uint64_t ipd_new:1;
+		uint64_t pwp:1;
+#else
+		uint64_t pwp:1;
+		uint64_t ipd_new:1;
+		uint64_t ipd_old:1;
+		uint64_t prc_off:1;
+		uint64_t pwq0:1;
+		uint64_t pwq1:1;
+		uint64_t pbm_word:1;
+		uint64_t pbm0:1;
+		uint64_t pbm1:1;
+		uint64_t pbm2:1;
+		uint64_t pbm3:1;
+		uint64_t ipq_pbe0:1;
+		uint64_t ipq_pbe1:1;
+		uint64_t pwq_pow:1;
+		uint64_t pwq_wp1:1;
+		uint64_t pwq_wqed:1;
+		uint64_t csr_ncmd:1;
+		uint64_t csr_mem:1;
+		uint64_t reserved_18_63:46;
+#endif
+	} cn52xx;
+	struct cvmx_ipd_bist_status_cn52xx cn52xxp1;
+	struct cvmx_ipd_bist_status_cn52xx cn56xx;
+	struct cvmx_ipd_bist_status_cn52xx cn56xxp1;
 	struct cvmx_ipd_bist_status_cn30xx cn58xx;
 	struct cvmx_ipd_bist_status_cn30xx cn58xxp1;
-	struct cvmx_ipd_bist_status_s cn63xx;
-	struct cvmx_ipd_bist_status_s cn63xxp1;
+	struct cvmx_ipd_bist_status_cn52xx cn61xx;
+	struct cvmx_ipd_bist_status_cn52xx cn63xx;
+	struct cvmx_ipd_bist_status_cn52xx cn63xxp1;
+	struct cvmx_ipd_bist_status_cn52xx cn66xx;
+	struct cvmx_ipd_bist_status_s cn68xx;
+	struct cvmx_ipd_bist_status_s cn68xxp1;
+	struct cvmx_ipd_bist_status_cn52xx cnf71xx;
 };
 
 union cvmx_ipd_bp_prt_red_end {
 	uint64_t u64;
 	struct cvmx_ipd_bp_prt_red_end_s {
-		uint64_t reserved_44_63:20;
-		uint64_t prt_enb:44;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_48_63:16;
+		uint64_t prt_enb:48;
+#else
+		uint64_t prt_enb:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_ipd_bp_prt_red_end_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t prt_enb:36;
+#else
+		uint64_t prt_enb:36;
+		uint64_t reserved_36_63:28;
+#endif
 	} cn30xx;
 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn31xx;
 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xx;
 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn38xxp2;
 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn50xx;
 	struct cvmx_ipd_bp_prt_red_end_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t prt_enb:40;
+#else
+		uint64_t prt_enb:40;
+		uint64_t reserved_40_63:24;
+#endif
 	} cn52xx;
 	struct cvmx_ipd_bp_prt_red_end_cn52xx cn52xxp1;
 	struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xx;
 	struct cvmx_ipd_bp_prt_red_end_cn52xx cn56xxp1;
 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xx;
 	struct cvmx_ipd_bp_prt_red_end_cn30xx cn58xxp1;
-	struct cvmx_ipd_bp_prt_red_end_s cn63xx;
-	struct cvmx_ipd_bp_prt_red_end_s cn63xxp1;
+	struct cvmx_ipd_bp_prt_red_end_s cn61xx;
+	struct cvmx_ipd_bp_prt_red_end_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_44_63:20;
+		uint64_t prt_enb:44;
+#else
+		uint64_t prt_enb:44;
+		uint64_t reserved_44_63:20;
+#endif
+	} cn63xx;
+	struct cvmx_ipd_bp_prt_red_end_cn63xx cn63xxp1;
+	struct cvmx_ipd_bp_prt_red_end_s cn66xx;
+	struct cvmx_ipd_bp_prt_red_end_s cnf71xx;
+};
+
+union cvmx_ipd_bpidx_mbuf_th {
+	uint64_t u64;
+	struct cvmx_ipd_bpidx_mbuf_th_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_18_63:46;
+		uint64_t bp_enb:1;
+		uint64_t page_cnt:17;
+#else
+		uint64_t page_cnt:17;
+		uint64_t bp_enb:1;
+		uint64_t reserved_18_63:46;
+#endif
+	} s;
+	struct cvmx_ipd_bpidx_mbuf_th_s cn68xx;
+	struct cvmx_ipd_bpidx_mbuf_th_s cn68xxp1;
+};
+
+union cvmx_ipd_bpid_bp_counterx {
+	uint64_t u64;
+	struct cvmx_ipd_bpid_bp_counterx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t cnt_val:25;
+#else
+		uint64_t cnt_val:25;
+		uint64_t reserved_25_63:39;
+#endif
+	} s;
+	struct cvmx_ipd_bpid_bp_counterx_s cn68xx;
+	struct cvmx_ipd_bpid_bp_counterx_s cn68xxp1;
 };
 
 union cvmx_ipd_clk_count {
 	uint64_t u64;
 	struct cvmx_ipd_clk_count_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t clk_cnt:64;
+#else
+		uint64_t clk_cnt:64;
+#endif
 	} s;
 	struct cvmx_ipd_clk_count_s cn30xx;
 	struct cvmx_ipd_clk_count_s cn31xx;
@@ -242,13 +450,36 @@ union cvmx_ipd_clk_count {
 	struct cvmx_ipd_clk_count_s cn56xxp1;
 	struct cvmx_ipd_clk_count_s cn58xx;
 	struct cvmx_ipd_clk_count_s cn58xxp1;
+	struct cvmx_ipd_clk_count_s cn61xx;
 	struct cvmx_ipd_clk_count_s cn63xx;
 	struct cvmx_ipd_clk_count_s cn63xxp1;
+	struct cvmx_ipd_clk_count_s cn66xx;
+	struct cvmx_ipd_clk_count_s cn68xx;
+	struct cvmx_ipd_clk_count_s cn68xxp1;
+	struct cvmx_ipd_clk_count_s cnf71xx;
+};
+
+union cvmx_ipd_credits {
+	uint64_t u64;
+	struct cvmx_ipd_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t iob_wrc:8;
+		uint64_t iob_wr:8;
+#else
+		uint64_t iob_wr:8;
+		uint64_t iob_wrc:8;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_ipd_credits_s cn68xx;
+	struct cvmx_ipd_credits_s cn68xxp1;
 };
 
 union cvmx_ipd_ctl_status {
 	uint64_t u64;
 	struct cvmx_ipd_ctl_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t use_sop:1;
 		uint64_t rst_done:1;
@@ -267,8 +498,29 @@ union cvmx_ipd_ctl_status {
 		uint64_t pbp_en:1;
 		uint64_t opc_mode:2;
 		uint64_t ipd_en:1;
+#else
+		uint64_t ipd_en:1;
+		uint64_t opc_mode:2;
+		uint64_t pbp_en:1;
+		uint64_t wqe_lend:1;
+		uint64_t pkt_lend:1;
+		uint64_t naddbuf:1;
+		uint64_t addpkt:1;
+		uint64_t reset:1;
+		uint64_t len_m8:1;
+		uint64_t pkt_off:1;
+		uint64_t ipd_full:1;
+		uint64_t pq_nabuf:1;
+		uint64_t pq_apkt:1;
+		uint64_t no_wptr:1;
+		uint64_t clken:1;
+		uint64_t rst_done:1;
+		uint64_t use_sop:1;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_ipd_ctl_status_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t len_m8:1;
 		uint64_t reset:1;
@@ -279,10 +531,23 @@ union cvmx_ipd_ctl_status {
 		uint64_t pbp_en:1;
 		uint64_t opc_mode:2;
 		uint64_t ipd_en:1;
+#else
+		uint64_t ipd_en:1;
+		uint64_t opc_mode:2;
+		uint64_t pbp_en:1;
+		uint64_t wqe_lend:1;
+		uint64_t pkt_lend:1;
+		uint64_t naddbuf:1;
+		uint64_t addpkt:1;
+		uint64_t reset:1;
+		uint64_t len_m8:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn30xx;
 	struct cvmx_ipd_ctl_status_cn30xx cn31xx;
 	struct cvmx_ipd_ctl_status_cn30xx cn38xx;
 	struct cvmx_ipd_ctl_status_cn38xxp2 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t reset:1;
 		uint64_t addpkt:1;
@@ -292,8 +557,20 @@ union cvmx_ipd_ctl_status {
 		uint64_t pbp_en:1;
 		uint64_t opc_mode:2;
 		uint64_t ipd_en:1;
+#else
+		uint64_t ipd_en:1;
+		uint64_t opc_mode:2;
+		uint64_t pbp_en:1;
+		uint64_t wqe_lend:1;
+		uint64_t pkt_lend:1;
+		uint64_t naddbuf:1;
+		uint64_t addpkt:1;
+		uint64_t reset:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn38xxp2;
 	struct cvmx_ipd_ctl_status_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_15_63:49;
 		uint64_t no_wptr:1;
 		uint64_t pq_apkt:1;
@@ -309,12 +586,30 @@ union cvmx_ipd_ctl_status {
 		uint64_t pbp_en:1;
 		uint64_t opc_mode:2;
 		uint64_t ipd_en:1;
+#else
+		uint64_t ipd_en:1;
+		uint64_t opc_mode:2;
+		uint64_t pbp_en:1;
+		uint64_t wqe_lend:1;
+		uint64_t pkt_lend:1;
+		uint64_t naddbuf:1;
+		uint64_t addpkt:1;
+		uint64_t reset:1;
+		uint64_t len_m8:1;
+		uint64_t pkt_off:1;
+		uint64_t ipd_full:1;
+		uint64_t pq_nabuf:1;
+		uint64_t pq_apkt:1;
+		uint64_t no_wptr:1;
+		uint64_t reserved_15_63:49;
+#endif
 	} cn50xx;
 	struct cvmx_ipd_ctl_status_cn50xx cn52xx;
 	struct cvmx_ipd_ctl_status_cn50xx cn52xxp1;
 	struct cvmx_ipd_ctl_status_cn50xx cn56xx;
 	struct cvmx_ipd_ctl_status_cn50xx cn56xxp1;
 	struct cvmx_ipd_ctl_status_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t ipd_full:1;
 		uint64_t pkt_off:1;
@@ -327,10 +622,26 @@ union cvmx_ipd_ctl_status {
 		uint64_t pbp_en:1;
 		uint64_t opc_mode:2;
 		uint64_t ipd_en:1;
+#else
+		uint64_t ipd_en:1;
+		uint64_t opc_mode:2;
+		uint64_t pbp_en:1;
+		uint64_t wqe_lend:1;
+		uint64_t pkt_lend:1;
+		uint64_t naddbuf:1;
+		uint64_t addpkt:1;
+		uint64_t reset:1;
+		uint64_t len_m8:1;
+		uint64_t pkt_off:1;
+		uint64_t ipd_full:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn58xx;
 	struct cvmx_ipd_ctl_status_cn58xx cn58xxp1;
+	struct cvmx_ipd_ctl_status_s cn61xx;
 	struct cvmx_ipd_ctl_status_s cn63xx;
 	struct cvmx_ipd_ctl_status_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t clken:1;
 		uint64_t no_wptr:1;
@@ -347,13 +658,129 @@ union cvmx_ipd_ctl_status {
 		uint64_t pbp_en:1;
 		uint64_t opc_mode:2;
 		uint64_t ipd_en:1;
+#else
+		uint64_t ipd_en:1;
+		uint64_t opc_mode:2;
+		uint64_t pbp_en:1;
+		uint64_t wqe_lend:1;
+		uint64_t pkt_lend:1;
+		uint64_t naddbuf:1;
+		uint64_t addpkt:1;
+		uint64_t reset:1;
+		uint64_t len_m8:1;
+		uint64_t pkt_off:1;
+		uint64_t ipd_full:1;
+		uint64_t pq_nabuf:1;
+		uint64_t pq_apkt:1;
+		uint64_t no_wptr:1;
+		uint64_t clken:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn63xxp1;
+	struct cvmx_ipd_ctl_status_s cn66xx;
+	struct cvmx_ipd_ctl_status_s cn68xx;
+	struct cvmx_ipd_ctl_status_s cn68xxp1;
+	struct cvmx_ipd_ctl_status_s cnf71xx;
+};
+
+union cvmx_ipd_ecc_ctl {
+	uint64_t u64;
+	struct cvmx_ipd_ecc_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_8_63:56;
+		uint64_t pm3_syn:2;
+		uint64_t pm2_syn:2;
+		uint64_t pm1_syn:2;
+		uint64_t pm0_syn:2;
+#else
+		uint64_t pm0_syn:2;
+		uint64_t pm1_syn:2;
+		uint64_t pm2_syn:2;
+		uint64_t pm3_syn:2;
+		uint64_t reserved_8_63:56;
+#endif
+	} s;
+	struct cvmx_ipd_ecc_ctl_s cn68xx;
+	struct cvmx_ipd_ecc_ctl_s cn68xxp1;
+};
+
+union cvmx_ipd_free_ptr_fifo_ctl {
+	uint64_t u64;
+	struct cvmx_ipd_free_ptr_fifo_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t max_cnts:7;
+		uint64_t wraddr:8;
+		uint64_t praddr:8;
+		uint64_t cena:1;
+		uint64_t raddr:8;
+#else
+		uint64_t raddr:8;
+		uint64_t cena:1;
+		uint64_t praddr:8;
+		uint64_t wraddr:8;
+		uint64_t max_cnts:7;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xx;
+	struct cvmx_ipd_free_ptr_fifo_ctl_s cn68xxp1;
+};
+
+union cvmx_ipd_free_ptr_value {
+	uint64_t u64;
+	struct cvmx_ipd_free_ptr_value_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_33_63:31;
+		uint64_t ptr:33;
+#else
+		uint64_t ptr:33;
+		uint64_t reserved_33_63:31;
+#endif
+	} s;
+	struct cvmx_ipd_free_ptr_value_s cn68xx;
+	struct cvmx_ipd_free_ptr_value_s cn68xxp1;
+};
+
+union cvmx_ipd_hold_ptr_fifo_ctl {
+	uint64_t u64;
+	struct cvmx_ipd_hold_ptr_fifo_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_43_63:21;
+		uint64_t ptr:33;
+		uint64_t max_pkt:3;
+		uint64_t praddr:3;
+		uint64_t cena:1;
+		uint64_t raddr:3;
+#else
+		uint64_t raddr:3;
+		uint64_t cena:1;
+		uint64_t praddr:3;
+		uint64_t max_pkt:3;
+		uint64_t ptr:33;
+		uint64_t reserved_43_63:21;
+#endif
+	} s;
+	struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xx;
+	struct cvmx_ipd_hold_ptr_fifo_ctl_s cn68xxp1;
 };
 
 union cvmx_ipd_int_enb {
 	uint64_t u64;
 	struct cvmx_ipd_int_enb_s {
-		uint64_t reserved_12_63:52;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_23_63:41;
+		uint64_t pw3_dbe:1;
+		uint64_t pw3_sbe:1;
+		uint64_t pw2_dbe:1;
+		uint64_t pw2_sbe:1;
+		uint64_t pw1_dbe:1;
+		uint64_t pw1_sbe:1;
+		uint64_t pw0_dbe:1;
+		uint64_t pw0_sbe:1;
+		uint64_t dat:1;
+		uint64_t eop:1;
+		uint64_t sop:1;
 		uint64_t pq_sub:1;
 		uint64_t pq_add:1;
 		uint64_t bc_ovr:1;
@@ -366,17 +793,53 @@ union cvmx_ipd_int_enb {
 		uint64_t prc_par2:1;
 		uint64_t prc_par1:1;
 		uint64_t prc_par0:1;
+#else
+		uint64_t prc_par0:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par3:1;
+		uint64_t bp_sub:1;
+		uint64_t dc_ovr:1;
+		uint64_t cc_ovr:1;
+		uint64_t c_coll:1;
+		uint64_t d_coll:1;
+		uint64_t bc_ovr:1;
+		uint64_t pq_add:1;
+		uint64_t pq_sub:1;
+		uint64_t sop:1;
+		uint64_t eop:1;
+		uint64_t dat:1;
+		uint64_t pw0_sbe:1;
+		uint64_t pw0_dbe:1;
+		uint64_t pw1_sbe:1;
+		uint64_t pw1_dbe:1;
+		uint64_t pw2_sbe:1;
+		uint64_t pw2_dbe:1;
+		uint64_t pw3_sbe:1;
+		uint64_t pw3_dbe:1;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_ipd_int_enb_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t bp_sub:1;
 		uint64_t prc_par3:1;
 		uint64_t prc_par2:1;
 		uint64_t prc_par1:1;
 		uint64_t prc_par0:1;
+#else
+		uint64_t prc_par0:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par3:1;
+		uint64_t bp_sub:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} cn30xx;
 	struct cvmx_ipd_int_enb_cn30xx cn31xx;
 	struct cvmx_ipd_int_enb_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t bc_ovr:1;
 		uint64_t d_coll:1;
@@ -388,23 +851,83 @@ union cvmx_ipd_int_enb {
 		uint64_t prc_par2:1;
 		uint64_t prc_par1:1;
 		uint64_t prc_par0:1;
+#else
+		uint64_t prc_par0:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par3:1;
+		uint64_t bp_sub:1;
+		uint64_t dc_ovr:1;
+		uint64_t cc_ovr:1;
+		uint64_t c_coll:1;
+		uint64_t d_coll:1;
+		uint64_t bc_ovr:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn38xx;
 	struct cvmx_ipd_int_enb_cn30xx cn38xxp2;
 	struct cvmx_ipd_int_enb_cn38xx cn50xx;
-	struct cvmx_ipd_int_enb_s cn52xx;
-	struct cvmx_ipd_int_enb_s cn52xxp1;
-	struct cvmx_ipd_int_enb_s cn56xx;
-	struct cvmx_ipd_int_enb_s cn56xxp1;
+	struct cvmx_ipd_int_enb_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t pq_sub:1;
+		uint64_t pq_add:1;
+		uint64_t bc_ovr:1;
+		uint64_t d_coll:1;
+		uint64_t c_coll:1;
+		uint64_t cc_ovr:1;
+		uint64_t dc_ovr:1;
+		uint64_t bp_sub:1;
+		uint64_t prc_par3:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par0:1;
+#else
+		uint64_t prc_par0:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par3:1;
+		uint64_t bp_sub:1;
+		uint64_t dc_ovr:1;
+		uint64_t cc_ovr:1;
+		uint64_t c_coll:1;
+		uint64_t d_coll:1;
+		uint64_t bc_ovr:1;
+		uint64_t pq_add:1;
+		uint64_t pq_sub:1;
+		uint64_t reserved_12_63:52;
+#endif
+	} cn52xx;
+	struct cvmx_ipd_int_enb_cn52xx cn52xxp1;
+	struct cvmx_ipd_int_enb_cn52xx cn56xx;
+	struct cvmx_ipd_int_enb_cn52xx cn56xxp1;
 	struct cvmx_ipd_int_enb_cn38xx cn58xx;
 	struct cvmx_ipd_int_enb_cn38xx cn58xxp1;
-	struct cvmx_ipd_int_enb_s cn63xx;
-	struct cvmx_ipd_int_enb_s cn63xxp1;
+	struct cvmx_ipd_int_enb_cn52xx cn61xx;
+	struct cvmx_ipd_int_enb_cn52xx cn63xx;
+	struct cvmx_ipd_int_enb_cn52xx cn63xxp1;
+	struct cvmx_ipd_int_enb_cn52xx cn66xx;
+	struct cvmx_ipd_int_enb_s cn68xx;
+	struct cvmx_ipd_int_enb_s cn68xxp1;
+	struct cvmx_ipd_int_enb_cn52xx cnf71xx;
 };
 
 union cvmx_ipd_int_sum {
 	uint64_t u64;
 	struct cvmx_ipd_int_sum_s {
-		uint64_t reserved_12_63:52;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_23_63:41;
+		uint64_t pw3_dbe:1;
+		uint64_t pw3_sbe:1;
+		uint64_t pw2_dbe:1;
+		uint64_t pw2_sbe:1;
+		uint64_t pw1_dbe:1;
+		uint64_t pw1_sbe:1;
+		uint64_t pw0_dbe:1;
+		uint64_t pw0_sbe:1;
+		uint64_t dat:1;
+		uint64_t eop:1;
+		uint64_t sop:1;
 		uint64_t pq_sub:1;
 		uint64_t pq_add:1;
 		uint64_t bc_ovr:1;
@@ -417,17 +940,53 @@ union cvmx_ipd_int_sum {
 		uint64_t prc_par2:1;
 		uint64_t prc_par1:1;
 		uint64_t prc_par0:1;
+#else
+		uint64_t prc_par0:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par3:1;
+		uint64_t bp_sub:1;
+		uint64_t dc_ovr:1;
+		uint64_t cc_ovr:1;
+		uint64_t c_coll:1;
+		uint64_t d_coll:1;
+		uint64_t bc_ovr:1;
+		uint64_t pq_add:1;
+		uint64_t pq_sub:1;
+		uint64_t sop:1;
+		uint64_t eop:1;
+		uint64_t dat:1;
+		uint64_t pw0_sbe:1;
+		uint64_t pw0_dbe:1;
+		uint64_t pw1_sbe:1;
+		uint64_t pw1_dbe:1;
+		uint64_t pw2_sbe:1;
+		uint64_t pw2_dbe:1;
+		uint64_t pw3_sbe:1;
+		uint64_t pw3_dbe:1;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_ipd_int_sum_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t bp_sub:1;
 		uint64_t prc_par3:1;
 		uint64_t prc_par2:1;
 		uint64_t prc_par1:1;
 		uint64_t prc_par0:1;
+#else
+		uint64_t prc_par0:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par3:1;
+		uint64_t bp_sub:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} cn30xx;
 	struct cvmx_ipd_int_sum_cn30xx cn31xx;
 	struct cvmx_ipd_int_sum_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t bc_ovr:1;
 		uint64_t d_coll:1;
@@ -439,24 +998,107 @@ union cvmx_ipd_int_sum {
 		uint64_t prc_par2:1;
 		uint64_t prc_par1:1;
 		uint64_t prc_par0:1;
+#else
+		uint64_t prc_par0:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par3:1;
+		uint64_t bp_sub:1;
+		uint64_t dc_ovr:1;
+		uint64_t cc_ovr:1;
+		uint64_t c_coll:1;
+		uint64_t d_coll:1;
+		uint64_t bc_ovr:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn38xx;
 	struct cvmx_ipd_int_sum_cn30xx cn38xxp2;
 	struct cvmx_ipd_int_sum_cn38xx cn50xx;
-	struct cvmx_ipd_int_sum_s cn52xx;
-	struct cvmx_ipd_int_sum_s cn52xxp1;
-	struct cvmx_ipd_int_sum_s cn56xx;
-	struct cvmx_ipd_int_sum_s cn56xxp1;
+	struct cvmx_ipd_int_sum_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t pq_sub:1;
+		uint64_t pq_add:1;
+		uint64_t bc_ovr:1;
+		uint64_t d_coll:1;
+		uint64_t c_coll:1;
+		uint64_t cc_ovr:1;
+		uint64_t dc_ovr:1;
+		uint64_t bp_sub:1;
+		uint64_t prc_par3:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par0:1;
+#else
+		uint64_t prc_par0:1;
+		uint64_t prc_par1:1;
+		uint64_t prc_par2:1;
+		uint64_t prc_par3:1;
+		uint64_t bp_sub:1;
+		uint64_t dc_ovr:1;
+		uint64_t cc_ovr:1;
+		uint64_t c_coll:1;
+		uint64_t d_coll:1;
+		uint64_t bc_ovr:1;
+		uint64_t pq_add:1;
+		uint64_t pq_sub:1;
+		uint64_t reserved_12_63:52;
+#endif
+	} cn52xx;
+	struct cvmx_ipd_int_sum_cn52xx cn52xxp1;
+	struct cvmx_ipd_int_sum_cn52xx cn56xx;
+	struct cvmx_ipd_int_sum_cn52xx cn56xxp1;
 	struct cvmx_ipd_int_sum_cn38xx cn58xx;
 	struct cvmx_ipd_int_sum_cn38xx cn58xxp1;
-	struct cvmx_ipd_int_sum_s cn63xx;
-	struct cvmx_ipd_int_sum_s cn63xxp1;
+	struct cvmx_ipd_int_sum_cn52xx cn61xx;
+	struct cvmx_ipd_int_sum_cn52xx cn63xx;
+	struct cvmx_ipd_int_sum_cn52xx cn63xxp1;
+	struct cvmx_ipd_int_sum_cn52xx cn66xx;
+	struct cvmx_ipd_int_sum_s cn68xx;
+	struct cvmx_ipd_int_sum_s cn68xxp1;
+	struct cvmx_ipd_int_sum_cn52xx cnf71xx;
+};
+
+union cvmx_ipd_next_pkt_ptr {
+	uint64_t u64;
+	struct cvmx_ipd_next_pkt_ptr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_33_63:31;
+		uint64_t ptr:33;
+#else
+		uint64_t ptr:33;
+		uint64_t reserved_33_63:31;
+#endif
+	} s;
+	struct cvmx_ipd_next_pkt_ptr_s cn68xx;
+	struct cvmx_ipd_next_pkt_ptr_s cn68xxp1;
+};
+
+union cvmx_ipd_next_wqe_ptr {
+	uint64_t u64;
+	struct cvmx_ipd_next_wqe_ptr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_33_63:31;
+		uint64_t ptr:33;
+#else
+		uint64_t ptr:33;
+		uint64_t reserved_33_63:31;
+#endif
+	} s;
+	struct cvmx_ipd_next_wqe_ptr_s cn68xx;
+	struct cvmx_ipd_next_wqe_ptr_s cn68xxp1;
 };
 
 union cvmx_ipd_not_1st_mbuff_skip {
 	uint64_t u64;
 	struct cvmx_ipd_not_1st_mbuff_skip_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t skip_sz:6;
+#else
+		uint64_t skip_sz:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_ipd_not_1st_mbuff_skip_s cn30xx;
 	struct cvmx_ipd_not_1st_mbuff_skip_s cn31xx;
@@ -469,15 +1111,38 @@ union cvmx_ipd_not_1st_mbuff_skip {
 	struct cvmx_ipd_not_1st_mbuff_skip_s cn56xxp1;
 	struct cvmx_ipd_not_1st_mbuff_skip_s cn58xx;
 	struct cvmx_ipd_not_1st_mbuff_skip_s cn58xxp1;
+	struct cvmx_ipd_not_1st_mbuff_skip_s cn61xx;
 	struct cvmx_ipd_not_1st_mbuff_skip_s cn63xx;
 	struct cvmx_ipd_not_1st_mbuff_skip_s cn63xxp1;
+	struct cvmx_ipd_not_1st_mbuff_skip_s cn66xx;
+	struct cvmx_ipd_not_1st_mbuff_skip_s cn68xx;
+	struct cvmx_ipd_not_1st_mbuff_skip_s cn68xxp1;
+	struct cvmx_ipd_not_1st_mbuff_skip_s cnf71xx;
+};
+
+union cvmx_ipd_on_bp_drop_pktx {
+	uint64_t u64;
+	struct cvmx_ipd_on_bp_drop_pktx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t prt_enb:64;
+#else
+		uint64_t prt_enb:64;
+#endif
+	} s;
+	struct cvmx_ipd_on_bp_drop_pktx_s cn68xx;
+	struct cvmx_ipd_on_bp_drop_pktx_s cn68xxp1;
 };
 
 union cvmx_ipd_packet_mbuff_size {
 	uint64_t u64;
 	struct cvmx_ipd_packet_mbuff_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t mb_size:12;
+#else
+		uint64_t mb_size:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_ipd_packet_mbuff_size_s cn30xx;
 	struct cvmx_ipd_packet_mbuff_size_s cn31xx;
@@ -490,15 +1155,40 @@ union cvmx_ipd_packet_mbuff_size {
 	struct cvmx_ipd_packet_mbuff_size_s cn56xxp1;
 	struct cvmx_ipd_packet_mbuff_size_s cn58xx;
 	struct cvmx_ipd_packet_mbuff_size_s cn58xxp1;
+	struct cvmx_ipd_packet_mbuff_size_s cn61xx;
 	struct cvmx_ipd_packet_mbuff_size_s cn63xx;
 	struct cvmx_ipd_packet_mbuff_size_s cn63xxp1;
+	struct cvmx_ipd_packet_mbuff_size_s cn66xx;
+	struct cvmx_ipd_packet_mbuff_size_s cn68xx;
+	struct cvmx_ipd_packet_mbuff_size_s cn68xxp1;
+	struct cvmx_ipd_packet_mbuff_size_s cnf71xx;
+};
+
+union cvmx_ipd_pkt_err {
+	uint64_t u64;
+	struct cvmx_ipd_pkt_err_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_6_63:58;
+		uint64_t reasm:6;
+#else
+		uint64_t reasm:6;
+		uint64_t reserved_6_63:58;
+#endif
+	} s;
+	struct cvmx_ipd_pkt_err_s cn68xx;
+	struct cvmx_ipd_pkt_err_s cn68xxp1;
 };
 
 union cvmx_ipd_pkt_ptr_valid {
 	uint64_t u64;
 	struct cvmx_ipd_pkt_ptr_valid_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t ptr:29;
+#else
+		uint64_t ptr:29;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_ipd_pkt_ptr_valid_s cn30xx;
 	struct cvmx_ipd_pkt_ptr_valid_s cn31xx;
@@ -510,16 +1200,25 @@ union cvmx_ipd_pkt_ptr_valid {
 	struct cvmx_ipd_pkt_ptr_valid_s cn56xxp1;
 	struct cvmx_ipd_pkt_ptr_valid_s cn58xx;
 	struct cvmx_ipd_pkt_ptr_valid_s cn58xxp1;
+	struct cvmx_ipd_pkt_ptr_valid_s cn61xx;
 	struct cvmx_ipd_pkt_ptr_valid_s cn63xx;
 	struct cvmx_ipd_pkt_ptr_valid_s cn63xxp1;
+	struct cvmx_ipd_pkt_ptr_valid_s cn66xx;
+	struct cvmx_ipd_pkt_ptr_valid_s cnf71xx;
 };
 
 union cvmx_ipd_portx_bp_page_cnt {
 	uint64_t u64;
 	struct cvmx_ipd_portx_bp_page_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t bp_enb:1;
 		uint64_t page_cnt:17;
+#else
+		uint64_t page_cnt:17;
+		uint64_t bp_enb:1;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_ipd_portx_bp_page_cnt_s cn30xx;
 	struct cvmx_ipd_portx_bp_page_cnt_s cn31xx;
@@ -532,65 +1231,123 @@ union cvmx_ipd_portx_bp_page_cnt {
 	struct cvmx_ipd_portx_bp_page_cnt_s cn56xxp1;
 	struct cvmx_ipd_portx_bp_page_cnt_s cn58xx;
 	struct cvmx_ipd_portx_bp_page_cnt_s cn58xxp1;
+	struct cvmx_ipd_portx_bp_page_cnt_s cn61xx;
 	struct cvmx_ipd_portx_bp_page_cnt_s cn63xx;
 	struct cvmx_ipd_portx_bp_page_cnt_s cn63xxp1;
+	struct cvmx_ipd_portx_bp_page_cnt_s cn66xx;
+	struct cvmx_ipd_portx_bp_page_cnt_s cnf71xx;
 };
 
 union cvmx_ipd_portx_bp_page_cnt2 {
 	uint64_t u64;
 	struct cvmx_ipd_portx_bp_page_cnt2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t bp_enb:1;
 		uint64_t page_cnt:17;
+#else
+		uint64_t page_cnt:17;
+		uint64_t bp_enb:1;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_ipd_portx_bp_page_cnt2_s cn52xx;
 	struct cvmx_ipd_portx_bp_page_cnt2_s cn52xxp1;
 	struct cvmx_ipd_portx_bp_page_cnt2_s cn56xx;
 	struct cvmx_ipd_portx_bp_page_cnt2_s cn56xxp1;
+	struct cvmx_ipd_portx_bp_page_cnt2_s cn61xx;
 	struct cvmx_ipd_portx_bp_page_cnt2_s cn63xx;
 	struct cvmx_ipd_portx_bp_page_cnt2_s cn63xxp1;
+	struct cvmx_ipd_portx_bp_page_cnt2_s cn66xx;
+	struct cvmx_ipd_portx_bp_page_cnt2_s cnf71xx;
 };
 
 union cvmx_ipd_portx_bp_page_cnt3 {
 	uint64_t u64;
 	struct cvmx_ipd_portx_bp_page_cnt3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t bp_enb:1;
 		uint64_t page_cnt:17;
+#else
+		uint64_t page_cnt:17;
+		uint64_t bp_enb:1;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
+	struct cvmx_ipd_portx_bp_page_cnt3_s cn61xx;
 	struct cvmx_ipd_portx_bp_page_cnt3_s cn63xx;
 	struct cvmx_ipd_portx_bp_page_cnt3_s cn63xxp1;
+	struct cvmx_ipd_portx_bp_page_cnt3_s cn66xx;
+	struct cvmx_ipd_portx_bp_page_cnt3_s cnf71xx;
 };
 
 union cvmx_ipd_port_bp_counters2_pairx {
 	uint64_t u64;
 	struct cvmx_ipd_port_bp_counters2_pairx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t cnt_val:25;
+#else
+		uint64_t cnt_val:25;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_ipd_port_bp_counters2_pairx_s cn52xx;
 	struct cvmx_ipd_port_bp_counters2_pairx_s cn52xxp1;
 	struct cvmx_ipd_port_bp_counters2_pairx_s cn56xx;
 	struct cvmx_ipd_port_bp_counters2_pairx_s cn56xxp1;
+	struct cvmx_ipd_port_bp_counters2_pairx_s cn61xx;
 	struct cvmx_ipd_port_bp_counters2_pairx_s cn63xx;
 	struct cvmx_ipd_port_bp_counters2_pairx_s cn63xxp1;
+	struct cvmx_ipd_port_bp_counters2_pairx_s cn66xx;
+	struct cvmx_ipd_port_bp_counters2_pairx_s cnf71xx;
 };
 
 union cvmx_ipd_port_bp_counters3_pairx {
 	uint64_t u64;
 	struct cvmx_ipd_port_bp_counters3_pairx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t cnt_val:25;
+#else
+		uint64_t cnt_val:25;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
+	struct cvmx_ipd_port_bp_counters3_pairx_s cn61xx;
 	struct cvmx_ipd_port_bp_counters3_pairx_s cn63xx;
 	struct cvmx_ipd_port_bp_counters3_pairx_s cn63xxp1;
+	struct cvmx_ipd_port_bp_counters3_pairx_s cn66xx;
+	struct cvmx_ipd_port_bp_counters3_pairx_s cnf71xx;
+};
+
+union cvmx_ipd_port_bp_counters4_pairx {
+	uint64_t u64;
+	struct cvmx_ipd_port_bp_counters4_pairx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_25_63:39;
+		uint64_t cnt_val:25;
+#else
+		uint64_t cnt_val:25;
+		uint64_t reserved_25_63:39;
+#endif
+	} s;
+	struct cvmx_ipd_port_bp_counters4_pairx_s cn61xx;
+	struct cvmx_ipd_port_bp_counters4_pairx_s cn66xx;
+	struct cvmx_ipd_port_bp_counters4_pairx_s cnf71xx;
 };
 
 union cvmx_ipd_port_bp_counters_pairx {
 	uint64_t u64;
 	struct cvmx_ipd_port_bp_counters_pairx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t cnt_val:25;
+#else
+		uint64_t cnt_val:25;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_ipd_port_bp_counters_pairx_s cn30xx;
 	struct cvmx_ipd_port_bp_counters_pairx_s cn31xx;
@@ -603,59 +1360,133 @@ union cvmx_ipd_port_bp_counters_pairx {
 	struct cvmx_ipd_port_bp_counters_pairx_s cn56xxp1;
 	struct cvmx_ipd_port_bp_counters_pairx_s cn58xx;
 	struct cvmx_ipd_port_bp_counters_pairx_s cn58xxp1;
+	struct cvmx_ipd_port_bp_counters_pairx_s cn61xx;
 	struct cvmx_ipd_port_bp_counters_pairx_s cn63xx;
 	struct cvmx_ipd_port_bp_counters_pairx_s cn63xxp1;
+	struct cvmx_ipd_port_bp_counters_pairx_s cn66xx;
+	struct cvmx_ipd_port_bp_counters_pairx_s cnf71xx;
+};
+
+union cvmx_ipd_port_ptr_fifo_ctl {
+	uint64_t u64;
+	struct cvmx_ipd_port_ptr_fifo_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_48_63:16;
+		uint64_t ptr:33;
+		uint64_t max_pkt:7;
+		uint64_t cena:1;
+		uint64_t raddr:7;
+#else
+		uint64_t raddr:7;
+		uint64_t cena:1;
+		uint64_t max_pkt:7;
+		uint64_t ptr:33;
+		uint64_t reserved_48_63:16;
+#endif
+	} s;
+	struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xx;
+	struct cvmx_ipd_port_ptr_fifo_ctl_s cn68xxp1;
 };
 
 union cvmx_ipd_port_qos_x_cnt {
 	uint64_t u64;
 	struct cvmx_ipd_port_qos_x_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t wmark:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t wmark:32;
+#endif
 	} s;
 	struct cvmx_ipd_port_qos_x_cnt_s cn52xx;
 	struct cvmx_ipd_port_qos_x_cnt_s cn52xxp1;
 	struct cvmx_ipd_port_qos_x_cnt_s cn56xx;
 	struct cvmx_ipd_port_qos_x_cnt_s cn56xxp1;
+	struct cvmx_ipd_port_qos_x_cnt_s cn61xx;
 	struct cvmx_ipd_port_qos_x_cnt_s cn63xx;
 	struct cvmx_ipd_port_qos_x_cnt_s cn63xxp1;
+	struct cvmx_ipd_port_qos_x_cnt_s cn66xx;
+	struct cvmx_ipd_port_qos_x_cnt_s cn68xx;
+	struct cvmx_ipd_port_qos_x_cnt_s cn68xxp1;
+	struct cvmx_ipd_port_qos_x_cnt_s cnf71xx;
 };
 
 union cvmx_ipd_port_qos_intx {
 	uint64_t u64;
 	struct cvmx_ipd_port_qos_intx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t intr:64;
+#else
 		uint64_t intr:64;
+#endif
 	} s;
 	struct cvmx_ipd_port_qos_intx_s cn52xx;
 	struct cvmx_ipd_port_qos_intx_s cn52xxp1;
 	struct cvmx_ipd_port_qos_intx_s cn56xx;
 	struct cvmx_ipd_port_qos_intx_s cn56xxp1;
+	struct cvmx_ipd_port_qos_intx_s cn61xx;
 	struct cvmx_ipd_port_qos_intx_s cn63xx;
 	struct cvmx_ipd_port_qos_intx_s cn63xxp1;
+	struct cvmx_ipd_port_qos_intx_s cn66xx;
+	struct cvmx_ipd_port_qos_intx_s cn68xx;
+	struct cvmx_ipd_port_qos_intx_s cn68xxp1;
+	struct cvmx_ipd_port_qos_intx_s cnf71xx;
 };
 
 union cvmx_ipd_port_qos_int_enbx {
 	uint64_t u64;
 	struct cvmx_ipd_port_qos_int_enbx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t enb:64;
+#else
 		uint64_t enb:64;
+#endif
 	} s;
 	struct cvmx_ipd_port_qos_int_enbx_s cn52xx;
 	struct cvmx_ipd_port_qos_int_enbx_s cn52xxp1;
 	struct cvmx_ipd_port_qos_int_enbx_s cn56xx;
 	struct cvmx_ipd_port_qos_int_enbx_s cn56xxp1;
+	struct cvmx_ipd_port_qos_int_enbx_s cn61xx;
 	struct cvmx_ipd_port_qos_int_enbx_s cn63xx;
 	struct cvmx_ipd_port_qos_int_enbx_s cn63xxp1;
+	struct cvmx_ipd_port_qos_int_enbx_s cn66xx;
+	struct cvmx_ipd_port_qos_int_enbx_s cn68xx;
+	struct cvmx_ipd_port_qos_int_enbx_s cn68xxp1;
+	struct cvmx_ipd_port_qos_int_enbx_s cnf71xx;
+};
+
+union cvmx_ipd_port_sopx {
+	uint64_t u64;
+	struct cvmx_ipd_port_sopx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t sop:64;
+#else
+		uint64_t sop:64;
+#endif
+	} s;
+	struct cvmx_ipd_port_sopx_s cn68xx;
+	struct cvmx_ipd_port_sopx_s cn68xxp1;
 };
 
 union cvmx_ipd_prc_hold_ptr_fifo_ctl {
 	uint64_t u64;
 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_39_63:25;
 		uint64_t max_pkt:3;
 		uint64_t praddr:3;
 		uint64_t ptr:29;
 		uint64_t cena:1;
 		uint64_t raddr:3;
+#else
+		uint64_t raddr:3;
+		uint64_t cena:1;
+		uint64_t ptr:29;
+		uint64_t praddr:3;
+		uint64_t max_pkt:3;
+		uint64_t reserved_39_63:25;
+#endif
 	} s;
 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn30xx;
 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn31xx;
@@ -667,18 +1498,29 @@ union cvmx_ipd_prc_hold_ptr_fifo_ctl {
 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn56xxp1;
 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xx;
 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn58xxp1;
+	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn61xx;
 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xx;
 	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn63xxp1;
+	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cn66xx;
+	struct cvmx_ipd_prc_hold_ptr_fifo_ctl_s cnf71xx;
 };
 
 union cvmx_ipd_prc_port_ptr_fifo_ctl {
 	uint64_t u64;
 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t max_pkt:7;
 		uint64_t ptr:29;
 		uint64_t cena:1;
 		uint64_t raddr:7;
+#else
+		uint64_t raddr:7;
+		uint64_t cena:1;
+		uint64_t ptr:29;
+		uint64_t max_pkt:7;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn30xx;
 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn31xx;
@@ -690,19 +1532,31 @@ union cvmx_ipd_prc_port_ptr_fifo_ctl {
 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn56xxp1;
 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xx;
 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn58xxp1;
+	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn61xx;
 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xx;
 	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn63xxp1;
+	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cn66xx;
+	struct cvmx_ipd_prc_port_ptr_fifo_ctl_s cnf71xx;
 };
 
 union cvmx_ipd_ptr_count {
 	uint64_t u64;
 	struct cvmx_ipd_ptr_count_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t pktv_cnt:1;
 		uint64_t wqev_cnt:1;
 		uint64_t pfif_cnt:3;
 		uint64_t pkt_pcnt:7;
 		uint64_t wqe_pcnt:7;
+#else
+		uint64_t wqe_pcnt:7;
+		uint64_t pkt_pcnt:7;
+		uint64_t pfif_cnt:3;
+		uint64_t wqev_cnt:1;
+		uint64_t pktv_cnt:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} s;
 	struct cvmx_ipd_ptr_count_s cn30xx;
 	struct cvmx_ipd_ptr_count_s cn31xx;
@@ -715,13 +1569,19 @@ union cvmx_ipd_ptr_count {
 	struct cvmx_ipd_ptr_count_s cn56xxp1;
 	struct cvmx_ipd_ptr_count_s cn58xx;
 	struct cvmx_ipd_ptr_count_s cn58xxp1;
+	struct cvmx_ipd_ptr_count_s cn61xx;
 	struct cvmx_ipd_ptr_count_s cn63xx;
 	struct cvmx_ipd_ptr_count_s cn63xxp1;
+	struct cvmx_ipd_ptr_count_s cn66xx;
+	struct cvmx_ipd_ptr_count_s cn68xx;
+	struct cvmx_ipd_ptr_count_s cn68xxp1;
+	struct cvmx_ipd_ptr_count_s cnf71xx;
 };
 
 union cvmx_ipd_pwp_ptr_fifo_ctl {
 	uint64_t u64;
 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t max_cnts:7;
 		uint64_t wraddr:8;
@@ -729,6 +1589,15 @@ union cvmx_ipd_pwp_ptr_fifo_ctl {
 		uint64_t ptr:29;
 		uint64_t cena:1;
 		uint64_t raddr:8;
+#else
+		uint64_t raddr:8;
+		uint64_t cena:1;
+		uint64_t ptr:29;
+		uint64_t praddr:8;
+		uint64_t wraddr:8;
+		uint64_t max_cnts:7;
+		uint64_t reserved_61_63:3;
+#endif
 	} s;
 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn30xx;
 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn31xx;
@@ -740,15 +1609,23 @@ union cvmx_ipd_pwp_ptr_fifo_ctl {
 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn56xxp1;
 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xx;
 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn58xxp1;
+	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn61xx;
 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xx;
 	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn63xxp1;
+	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cn66xx;
+	struct cvmx_ipd_pwp_ptr_fifo_ctl_s cnf71xx;
 };
 
 union cvmx_ipd_qosx_red_marks {
 	uint64_t u64;
 	struct cvmx_ipd_qosx_red_marks_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t drop:32;
 		uint64_t pass:32;
+#else
+		uint64_t pass:32;
+		uint64_t drop:32;
+#endif
 	} s;
 	struct cvmx_ipd_qosx_red_marks_s cn30xx;
 	struct cvmx_ipd_qosx_red_marks_s cn31xx;
@@ -761,15 +1638,25 @@ union cvmx_ipd_qosx_red_marks {
 	struct cvmx_ipd_qosx_red_marks_s cn56xxp1;
 	struct cvmx_ipd_qosx_red_marks_s cn58xx;
 	struct cvmx_ipd_qosx_red_marks_s cn58xxp1;
+	struct cvmx_ipd_qosx_red_marks_s cn61xx;
 	struct cvmx_ipd_qosx_red_marks_s cn63xx;
 	struct cvmx_ipd_qosx_red_marks_s cn63xxp1;
+	struct cvmx_ipd_qosx_red_marks_s cn66xx;
+	struct cvmx_ipd_qosx_red_marks_s cn68xx;
+	struct cvmx_ipd_qosx_red_marks_s cn68xxp1;
+	struct cvmx_ipd_qosx_red_marks_s cnf71xx;
 };
 
 union cvmx_ipd_que0_free_page_cnt {
 	uint64_t u64;
 	struct cvmx_ipd_que0_free_page_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t q0_pcnt:32;
+#else
+		uint64_t q0_pcnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_ipd_que0_free_page_cnt_s cn30xx;
 	struct cvmx_ipd_que0_free_page_cnt_s cn31xx;
@@ -782,16 +1669,57 @@ union cvmx_ipd_que0_free_page_cnt {
 	struct cvmx_ipd_que0_free_page_cnt_s cn56xxp1;
 	struct cvmx_ipd_que0_free_page_cnt_s cn58xx;
 	struct cvmx_ipd_que0_free_page_cnt_s cn58xxp1;
+	struct cvmx_ipd_que0_free_page_cnt_s cn61xx;
 	struct cvmx_ipd_que0_free_page_cnt_s cn63xx;
 	struct cvmx_ipd_que0_free_page_cnt_s cn63xxp1;
+	struct cvmx_ipd_que0_free_page_cnt_s cn66xx;
+	struct cvmx_ipd_que0_free_page_cnt_s cn68xx;
+	struct cvmx_ipd_que0_free_page_cnt_s cn68xxp1;
+	struct cvmx_ipd_que0_free_page_cnt_s cnf71xx;
+};
+
+union cvmx_ipd_red_bpid_enablex {
+	uint64_t u64;
+	struct cvmx_ipd_red_bpid_enablex_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t prt_enb:64;
+#else
+		uint64_t prt_enb:64;
+#endif
+	} s;
+	struct cvmx_ipd_red_bpid_enablex_s cn68xx;
+	struct cvmx_ipd_red_bpid_enablex_s cn68xxp1;
+};
+
+union cvmx_ipd_red_delay {
+	uint64_t u64;
+	struct cvmx_ipd_red_delay_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_28_63:36;
+		uint64_t prb_dly:14;
+		uint64_t avg_dly:14;
+#else
+		uint64_t avg_dly:14;
+		uint64_t prb_dly:14;
+		uint64_t reserved_28_63:36;
+#endif
+	} s;
+	struct cvmx_ipd_red_delay_s cn68xx;
+	struct cvmx_ipd_red_delay_s cn68xxp1;
 };
 
 union cvmx_ipd_red_port_enable {
 	uint64_t u64;
 	struct cvmx_ipd_red_port_enable_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t prb_dly:14;
 		uint64_t avg_dly:14;
 		uint64_t prt_enb:36;
+#else
+		uint64_t prt_enb:36;
+		uint64_t avg_dly:14;
+		uint64_t prb_dly:14;
+#endif
 	} s;
 	struct cvmx_ipd_red_port_enable_s cn30xx;
 	struct cvmx_ipd_red_port_enable_s cn31xx;
@@ -804,35 +1732,67 @@ union cvmx_ipd_red_port_enable {
 	struct cvmx_ipd_red_port_enable_s cn56xxp1;
 	struct cvmx_ipd_red_port_enable_s cn58xx;
 	struct cvmx_ipd_red_port_enable_s cn58xxp1;
+	struct cvmx_ipd_red_port_enable_s cn61xx;
 	struct cvmx_ipd_red_port_enable_s cn63xx;
 	struct cvmx_ipd_red_port_enable_s cn63xxp1;
+	struct cvmx_ipd_red_port_enable_s cn66xx;
+	struct cvmx_ipd_red_port_enable_s cnf71xx;
 };
 
 union cvmx_ipd_red_port_enable2 {
 	uint64_t u64;
 	struct cvmx_ipd_red_port_enable2_s {
-		uint64_t reserved_8_63:56;
-		uint64_t prt_enb:8;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t prt_enb:12;
+#else
+		uint64_t prt_enb:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_ipd_red_port_enable2_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t prt_enb:4;
+#else
+		uint64_t prt_enb:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn52xx;
 	struct cvmx_ipd_red_port_enable2_cn52xx cn52xxp1;
 	struct cvmx_ipd_red_port_enable2_cn52xx cn56xx;
 	struct cvmx_ipd_red_port_enable2_cn52xx cn56xxp1;
-	struct cvmx_ipd_red_port_enable2_s cn63xx;
-	struct cvmx_ipd_red_port_enable2_s cn63xxp1;
+	struct cvmx_ipd_red_port_enable2_s cn61xx;
+	struct cvmx_ipd_red_port_enable2_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_8_63:56;
+		uint64_t prt_enb:8;
+#else
+		uint64_t prt_enb:8;
+		uint64_t reserved_8_63:56;
+#endif
+	} cn63xx;
+	struct cvmx_ipd_red_port_enable2_cn63xx cn63xxp1;
+	struct cvmx_ipd_red_port_enable2_s cn66xx;
+	struct cvmx_ipd_red_port_enable2_s cnf71xx;
 };
 
 union cvmx_ipd_red_quex_param {
 	uint64_t u64;
 	struct cvmx_ipd_red_quex_param_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t use_pcnt:1;
 		uint64_t new_con:8;
 		uint64_t avg_con:8;
 		uint64_t prb_con:32;
+#else
+		uint64_t prb_con:32;
+		uint64_t avg_con:8;
+		uint64_t new_con:8;
+		uint64_t use_pcnt:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} s;
 	struct cvmx_ipd_red_quex_param_s cn30xx;
 	struct cvmx_ipd_red_quex_param_s cn31xx;
@@ -845,16 +1805,53 @@ union cvmx_ipd_red_quex_param {
 	struct cvmx_ipd_red_quex_param_s cn56xxp1;
 	struct cvmx_ipd_red_quex_param_s cn58xx;
 	struct cvmx_ipd_red_quex_param_s cn58xxp1;
+	struct cvmx_ipd_red_quex_param_s cn61xx;
 	struct cvmx_ipd_red_quex_param_s cn63xx;
 	struct cvmx_ipd_red_quex_param_s cn63xxp1;
+	struct cvmx_ipd_red_quex_param_s cn66xx;
+	struct cvmx_ipd_red_quex_param_s cn68xx;
+	struct cvmx_ipd_red_quex_param_s cn68xxp1;
+	struct cvmx_ipd_red_quex_param_s cnf71xx;
+};
+
+union cvmx_ipd_req_wgt {
+	uint64_t u64;
+	struct cvmx_ipd_req_wgt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t wgt7:8;
+		uint64_t wgt6:8;
+		uint64_t wgt5:8;
+		uint64_t wgt4:8;
+		uint64_t wgt3:8;
+		uint64_t wgt2:8;
+		uint64_t wgt1:8;
+		uint64_t wgt0:8;
+#else
+		uint64_t wgt0:8;
+		uint64_t wgt1:8;
+		uint64_t wgt2:8;
+		uint64_t wgt3:8;
+		uint64_t wgt4:8;
+		uint64_t wgt5:8;
+		uint64_t wgt6:8;
+		uint64_t wgt7:8;
+#endif
+	} s;
+	struct cvmx_ipd_req_wgt_s cn68xx;
 };
 
 union cvmx_ipd_sub_port_bp_page_cnt {
 	uint64_t u64;
 	struct cvmx_ipd_sub_port_bp_page_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t port:6;
 		uint64_t page_cnt:25;
+#else
+		uint64_t page_cnt:25;
+		uint64_t port:6;
+		uint64_t reserved_31_63:33;
+#endif
 	} s;
 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn30xx;
 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn31xx;
@@ -867,26 +1864,48 @@ union cvmx_ipd_sub_port_bp_page_cnt {
 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn56xxp1;
 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xx;
 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn58xxp1;
+	struct cvmx_ipd_sub_port_bp_page_cnt_s cn61xx;
 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xx;
 	struct cvmx_ipd_sub_port_bp_page_cnt_s cn63xxp1;
+	struct cvmx_ipd_sub_port_bp_page_cnt_s cn66xx;
+	struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xx;
+	struct cvmx_ipd_sub_port_bp_page_cnt_s cn68xxp1;
+	struct cvmx_ipd_sub_port_bp_page_cnt_s cnf71xx;
 };
 
 union cvmx_ipd_sub_port_fcs {
 	uint64_t u64;
 	struct cvmx_ipd_sub_port_fcs_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t port_bit2:4;
 		uint64_t reserved_32_35:4;
 		uint64_t port_bit:32;
+#else
+		uint64_t port_bit:32;
+		uint64_t reserved_32_35:4;
+		uint64_t port_bit2:4;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_ipd_sub_port_fcs_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t port_bit:3;
+#else
+		uint64_t port_bit:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn30xx;
 	struct cvmx_ipd_sub_port_fcs_cn30xx cn31xx;
 	struct cvmx_ipd_sub_port_fcs_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t port_bit:32;
+#else
+		uint64_t port_bit:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn38xx;
 	struct cvmx_ipd_sub_port_fcs_cn38xx cn38xxp2;
 	struct cvmx_ipd_sub_port_fcs_cn30xx cn50xx;
@@ -896,30 +1915,49 @@ union cvmx_ipd_sub_port_fcs {
 	struct cvmx_ipd_sub_port_fcs_s cn56xxp1;
 	struct cvmx_ipd_sub_port_fcs_cn38xx cn58xx;
 	struct cvmx_ipd_sub_port_fcs_cn38xx cn58xxp1;
+	struct cvmx_ipd_sub_port_fcs_s cn61xx;
 	struct cvmx_ipd_sub_port_fcs_s cn63xx;
 	struct cvmx_ipd_sub_port_fcs_s cn63xxp1;
+	struct cvmx_ipd_sub_port_fcs_s cn66xx;
+	struct cvmx_ipd_sub_port_fcs_s cnf71xx;
 };
 
 union cvmx_ipd_sub_port_qos_cnt {
 	uint64_t u64;
 	struct cvmx_ipd_sub_port_qos_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_41_63:23;
 		uint64_t port_qos:9;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t port_qos:9;
+		uint64_t reserved_41_63:23;
+#endif
 	} s;
 	struct cvmx_ipd_sub_port_qos_cnt_s cn52xx;
 	struct cvmx_ipd_sub_port_qos_cnt_s cn52xxp1;
 	struct cvmx_ipd_sub_port_qos_cnt_s cn56xx;
 	struct cvmx_ipd_sub_port_qos_cnt_s cn56xxp1;
+	struct cvmx_ipd_sub_port_qos_cnt_s cn61xx;
 	struct cvmx_ipd_sub_port_qos_cnt_s cn63xx;
 	struct cvmx_ipd_sub_port_qos_cnt_s cn63xxp1;
+	struct cvmx_ipd_sub_port_qos_cnt_s cn66xx;
+	struct cvmx_ipd_sub_port_qos_cnt_s cn68xx;
+	struct cvmx_ipd_sub_port_qos_cnt_s cn68xxp1;
+	struct cvmx_ipd_sub_port_qos_cnt_s cnf71xx;
 };
 
 union cvmx_ipd_wqe_fpa_queue {
 	uint64_t u64;
 	struct cvmx_ipd_wqe_fpa_queue_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t wqe_pool:3;
+#else
+		uint64_t wqe_pool:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_ipd_wqe_fpa_queue_s cn30xx;
 	struct cvmx_ipd_wqe_fpa_queue_s cn31xx;
@@ -932,15 +1970,25 @@ union cvmx_ipd_wqe_fpa_queue {
 	struct cvmx_ipd_wqe_fpa_queue_s cn56xxp1;
 	struct cvmx_ipd_wqe_fpa_queue_s cn58xx;
 	struct cvmx_ipd_wqe_fpa_queue_s cn58xxp1;
+	struct cvmx_ipd_wqe_fpa_queue_s cn61xx;
 	struct cvmx_ipd_wqe_fpa_queue_s cn63xx;
 	struct cvmx_ipd_wqe_fpa_queue_s cn63xxp1;
+	struct cvmx_ipd_wqe_fpa_queue_s cn66xx;
+	struct cvmx_ipd_wqe_fpa_queue_s cn68xx;
+	struct cvmx_ipd_wqe_fpa_queue_s cn68xxp1;
+	struct cvmx_ipd_wqe_fpa_queue_s cnf71xx;
 };
 
 union cvmx_ipd_wqe_ptr_valid {
 	uint64_t u64;
 	struct cvmx_ipd_wqe_ptr_valid_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t ptr:29;
+#else
+		uint64_t ptr:29;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_ipd_wqe_ptr_valid_s cn30xx;
 	struct cvmx_ipd_wqe_ptr_valid_s cn31xx;
@@ -952,8 +2000,11 @@ union cvmx_ipd_wqe_ptr_valid {
 	struct cvmx_ipd_wqe_ptr_valid_s cn56xxp1;
 	struct cvmx_ipd_wqe_ptr_valid_s cn58xx;
 	struct cvmx_ipd_wqe_ptr_valid_s cn58xxp1;
+	struct cvmx_ipd_wqe_ptr_valid_s cn61xx;
 	struct cvmx_ipd_wqe_ptr_valid_s cn63xx;
 	struct cvmx_ipd_wqe_ptr_valid_s cn63xxp1;
+	struct cvmx_ipd_wqe_ptr_valid_s cn66xx;
+	struct cvmx_ipd_wqe_ptr_valid_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
index 7a50a0beb47..10262cb6ff5 100644
--- a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -33,18 +33,18 @@
 #define CVMX_L2C_BST0 (CVMX_ADD_IO_SEG(0x00011800800007F8ull))
 #define CVMX_L2C_BST1 (CVMX_ADD_IO_SEG(0x00011800800007F0ull))
 #define CVMX_L2C_BST2 (CVMX_ADD_IO_SEG(0x00011800800007E8ull))
-#define CVMX_L2C_BST_MEMX(block_id) (CVMX_ADD_IO_SEG(0x0001180080C007F8ull))
-#define CVMX_L2C_BST_TDTX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007F0ull))
-#define CVMX_L2C_BST_TTGX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007F8ull))
+#define CVMX_L2C_BST_MEMX(block_id) (CVMX_ADD_IO_SEG(0x0001180080C007F8ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_BST_TDTX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007F0ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_BST_TTGX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007F8ull) + ((block_id) & 3) * 0x40000ull)
 #define CVMX_L2C_CFG (CVMX_ADD_IO_SEG(0x0001180080000000ull))
 #define CVMX_L2C_COP0_MAPX(offset) (CVMX_ADD_IO_SEG(0x0001180080940000ull) + ((offset) & 16383) * 8)
 #define CVMX_L2C_CTL (CVMX_ADD_IO_SEG(0x0001180080800000ull))
 #define CVMX_L2C_DBG (CVMX_ADD_IO_SEG(0x0001180080000030ull))
 #define CVMX_L2C_DUT (CVMX_ADD_IO_SEG(0x0001180080000050ull))
-#define CVMX_L2C_DUT_MAPX(offset) (CVMX_ADD_IO_SEG(0x0001180080E00000ull) + ((offset) & 2047) * 8)
-#define CVMX_L2C_ERR_TDTX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007E0ull))
-#define CVMX_L2C_ERR_TTGX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007E8ull))
-#define CVMX_L2C_ERR_VBFX(block_id) (CVMX_ADD_IO_SEG(0x0001180080C007F0ull))
+#define CVMX_L2C_DUT_MAPX(offset) (CVMX_ADD_IO_SEG(0x0001180080E00000ull) + ((offset) & 8191) * 8)
+#define CVMX_L2C_ERR_TDTX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007E0ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_ERR_TTGX(block_id) (CVMX_ADD_IO_SEG(0x0001180080A007E8ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_ERR_VBFX(block_id) (CVMX_ADD_IO_SEG(0x0001180080C007F0ull) + ((block_id) & 3) * 0x40000ull)
 #define CVMX_L2C_ERR_XMC (CVMX_ADD_IO_SEG(0x00011800808007D8ull))
 #define CVMX_L2C_GRPWRR0 (CVMX_ADD_IO_SEG(0x00011800800000C8ull))
 #define CVMX_L2C_GRPWRR1 (CVMX_ADD_IO_SEG(0x00011800800000D0ull))
@@ -71,54 +71,119 @@
 #define CVMX_L2C_PFCTL (CVMX_ADD_IO_SEG(0x0001180080000090ull))
 #define CVMX_L2C_PFCX(offset) (CVMX_ADD_IO_SEG(0x0001180080000098ull) + ((offset) & 3) * 8)
 #define CVMX_L2C_PPGRP (CVMX_ADD_IO_SEG(0x00011800800000C0ull))
-#define CVMX_L2C_QOS_IOBX(block_id) (CVMX_ADD_IO_SEG(0x0001180080880200ull))
-#define CVMX_L2C_QOS_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080880000ull) + ((offset) & 7) * 8)
+#define CVMX_L2C_QOS_IOBX(offset) (CVMX_ADD_IO_SEG(0x0001180080880200ull) + ((offset) & 1) * 8)
+#define CVMX_L2C_QOS_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080880000ull) + ((offset) & 31) * 8)
 #define CVMX_L2C_QOS_WGT (CVMX_ADD_IO_SEG(0x0001180080800008ull))
-#define CVMX_L2C_RSCX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800410ull))
-#define CVMX_L2C_RSDX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800418ull))
+#define CVMX_L2C_RSCX_PFC(offset) (CVMX_ADD_IO_SEG(0x0001180080800410ull) + ((offset) & 3) * 64)
+#define CVMX_L2C_RSDX_PFC(offset) (CVMX_ADD_IO_SEG(0x0001180080800418ull) + ((offset) & 3) * 64)
 #define CVMX_L2C_SPAR0 (CVMX_ADD_IO_SEG(0x0001180080000068ull))
 #define CVMX_L2C_SPAR1 (CVMX_ADD_IO_SEG(0x0001180080000070ull))
 #define CVMX_L2C_SPAR2 (CVMX_ADD_IO_SEG(0x0001180080000078ull))
 #define CVMX_L2C_SPAR3 (CVMX_ADD_IO_SEG(0x0001180080000080ull))
 #define CVMX_L2C_SPAR4 (CVMX_ADD_IO_SEG(0x0001180080000088ull))
-#define CVMX_L2C_TADX_ECC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00018ull))
-#define CVMX_L2C_TADX_ECC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00020ull))
-#define CVMX_L2C_TADX_IEN(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00000ull))
-#define CVMX_L2C_TADX_INT(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00028ull))
-#define CVMX_L2C_TADX_PFC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00400ull))
-#define CVMX_L2C_TADX_PFC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00408ull))
-#define CVMX_L2C_TADX_PFC2(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00410ull))
-#define CVMX_L2C_TADX_PFC3(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00418ull))
-#define CVMX_L2C_TADX_PRF(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00008ull))
-#define CVMX_L2C_TADX_TAG(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00010ull))
+#define CVMX_L2C_TADX_ECC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00018ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_TADX_ECC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00020ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_TADX_IEN(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00000ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_TADX_INT(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00028ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_TADX_PFC0(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00400ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_TADX_PFC1(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00408ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_TADX_PFC2(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00410ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_TADX_PFC3(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00418ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_TADX_PRF(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00008ull) + ((block_id) & 3) * 0x40000ull)
+#define CVMX_L2C_TADX_TAG(block_id) (CVMX_ADD_IO_SEG(0x0001180080A00010ull) + ((block_id) & 3) * 0x40000ull)
 #define CVMX_L2C_VER_ID (CVMX_ADD_IO_SEG(0x00011800808007E0ull))
 #define CVMX_L2C_VER_IOB (CVMX_ADD_IO_SEG(0x00011800808007F0ull))
 #define CVMX_L2C_VER_MSC (CVMX_ADD_IO_SEG(0x00011800808007D0ull))
 #define CVMX_L2C_VER_PP (CVMX_ADD_IO_SEG(0x00011800808007E8ull))
-#define CVMX_L2C_VIRTID_IOBX(block_id) (CVMX_ADD_IO_SEG(0x00011800808C0200ull))
-#define CVMX_L2C_VIRTID_PPX(offset) (CVMX_ADD_IO_SEG(0x00011800808C0000ull) + ((offset) & 7) * 8)
+#define CVMX_L2C_VIRTID_IOBX(offset) (CVMX_ADD_IO_SEG(0x00011800808C0200ull) + ((offset) & 1) * 8)
+#define CVMX_L2C_VIRTID_PPX(offset) (CVMX_ADD_IO_SEG(0x00011800808C0000ull) + ((offset) & 31) * 8)
 #define CVMX_L2C_VRT_CTL (CVMX_ADD_IO_SEG(0x0001180080800010ull))
 #define CVMX_L2C_VRT_MEMX(offset) (CVMX_ADD_IO_SEG(0x0001180080900000ull) + ((offset) & 1023) * 8)
-#define CVMX_L2C_WPAR_IOBX(block_id) (CVMX_ADD_IO_SEG(0x0001180080840200ull))
-#define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080840000ull) + ((offset) & 7) * 8)
-#define CVMX_L2C_XMCX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800400ull))
+#define CVMX_L2C_WPAR_IOBX(offset) (CVMX_ADD_IO_SEG(0x0001180080840200ull) + ((offset) & 1) * 8)
+#define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x0001180080840000ull) + ((offset) & 31) * 8)
+#define CVMX_L2C_XMCX_PFC(offset) (CVMX_ADD_IO_SEG(0x0001180080800400ull) + ((offset) & 3) * 64)
 #define CVMX_L2C_XMC_CMD (CVMX_ADD_IO_SEG(0x0001180080800028ull))
-#define CVMX_L2C_XMDX_PFC(block_id) (CVMX_ADD_IO_SEG(0x0001180080800408ull))
+#define CVMX_L2C_XMDX_PFC(offset) (CVMX_ADD_IO_SEG(0x0001180080800408ull) + ((offset) & 3) * 64)
 
 union cvmx_l2c_big_ctl {
 	uint64_t u64;
 	struct cvmx_l2c_big_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t maxdram:4;
 		uint64_t reserved_1_3:3;
 		uint64_t disable:1;
+#else
+		uint64_t disable:1;
+		uint64_t reserved_1_3:3;
+		uint64_t maxdram:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
+	struct cvmx_l2c_big_ctl_s cn61xx;
 	struct cvmx_l2c_big_ctl_s cn63xx;
+	struct cvmx_l2c_big_ctl_s cn66xx;
+	struct cvmx_l2c_big_ctl_s cn68xx;
+	struct cvmx_l2c_big_ctl_s cn68xxp1;
+	struct cvmx_l2c_big_ctl_s cnf71xx;
 };
 
 union cvmx_l2c_bst {
 	uint64_t u64;
 	struct cvmx_l2c_bst_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t dutfl:32;
+		uint64_t rbffl:4;
+		uint64_t xbffl:4;
+		uint64_t tdpfl:4;
+		uint64_t ioccmdfl:4;
+		uint64_t iocdatfl:4;
+		uint64_t dutresfl:4;
+		uint64_t vrtfl:4;
+		uint64_t tdffl:4;
+#else
+		uint64_t tdffl:4;
+		uint64_t vrtfl:4;
+		uint64_t dutresfl:4;
+		uint64_t iocdatfl:4;
+		uint64_t ioccmdfl:4;
+		uint64_t tdpfl:4;
+		uint64_t xbffl:4;
+		uint64_t rbffl:4;
+		uint64_t dutfl:32;
+#endif
+	} s;
+	struct cvmx_l2c_bst_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_36_63:28;
+		uint64_t dutfl:4;
+		uint64_t reserved_17_31:15;
+		uint64_t ioccmdfl:1;
+		uint64_t reserved_13_15:3;
+		uint64_t iocdatfl:1;
+		uint64_t reserved_9_11:3;
+		uint64_t dutresfl:1;
+		uint64_t reserved_5_7:3;
+		uint64_t vrtfl:1;
+		uint64_t reserved_1_3:3;
+		uint64_t tdffl:1;
+#else
+		uint64_t tdffl:1;
+		uint64_t reserved_1_3:3;
+		uint64_t vrtfl:1;
+		uint64_t reserved_5_7:3;
+		uint64_t dutresfl:1;
+		uint64_t reserved_9_11:3;
+		uint64_t iocdatfl:1;
+		uint64_t reserved_13_15:3;
+		uint64_t ioccmdfl:1;
+		uint64_t reserved_17_31:15;
+		uint64_t dutfl:4;
+		uint64_t reserved_36_63:28;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_bst_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t dutfl:6;
 		uint64_t reserved_17_31:15;
@@ -131,14 +196,60 @@ union cvmx_l2c_bst {
 		uint64_t vrtfl:1;
 		uint64_t reserved_1_3:3;
 		uint64_t tdffl:1;
-	} s;
-	struct cvmx_l2c_bst_s cn63xx;
-	struct cvmx_l2c_bst_s cn63xxp1;
+#else
+		uint64_t tdffl:1;
+		uint64_t reserved_1_3:3;
+		uint64_t vrtfl:1;
+		uint64_t reserved_5_7:3;
+		uint64_t dutresfl:1;
+		uint64_t reserved_9_11:3;
+		uint64_t iocdatfl:1;
+		uint64_t reserved_13_15:3;
+		uint64_t ioccmdfl:1;
+		uint64_t reserved_17_31:15;
+		uint64_t dutfl:6;
+		uint64_t reserved_38_63:26;
+#endif
+	} cn63xx;
+	struct cvmx_l2c_bst_cn63xx cn63xxp1;
+	struct cvmx_l2c_bst_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_42_63:22;
+		uint64_t dutfl:10;
+		uint64_t reserved_17_31:15;
+		uint64_t ioccmdfl:1;
+		uint64_t reserved_13_15:3;
+		uint64_t iocdatfl:1;
+		uint64_t reserved_9_11:3;
+		uint64_t dutresfl:1;
+		uint64_t reserved_5_7:3;
+		uint64_t vrtfl:1;
+		uint64_t reserved_1_3:3;
+		uint64_t tdffl:1;
+#else
+		uint64_t tdffl:1;
+		uint64_t reserved_1_3:3;
+		uint64_t vrtfl:1;
+		uint64_t reserved_5_7:3;
+		uint64_t dutresfl:1;
+		uint64_t reserved_9_11:3;
+		uint64_t iocdatfl:1;
+		uint64_t reserved_13_15:3;
+		uint64_t ioccmdfl:1;
+		uint64_t reserved_17_31:15;
+		uint64_t dutfl:10;
+		uint64_t reserved_42_63:22;
+#endif
+	} cn66xx;
+	struct cvmx_l2c_bst_s cn68xx;
+	struct cvmx_l2c_bst_s cn68xxp1;
+	struct cvmx_l2c_bst_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_bst0 {
 	uint64_t u64;
 	struct cvmx_l2c_bst0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t dtbnk:1;
 		uint64_t wlb_msk:4;
@@ -146,8 +257,18 @@ union cvmx_l2c_bst0 {
 		uint64_t dt:1;
 		uint64_t stin_msk:1;
 		uint64_t wlb_dat:4;
+#else
+		uint64_t wlb_dat:4;
+		uint64_t stin_msk:1;
+		uint64_t dt:1;
+		uint64_t dtcnt:13;
+		uint64_t wlb_msk:4;
+		uint64_t dtbnk:1;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_l2c_bst0_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t wlb_msk:4;
 		uint64_t reserved_15_18:4;
@@ -155,8 +276,18 @@ union cvmx_l2c_bst0 {
 		uint64_t dt:1;
 		uint64_t reserved_4_4:1;
 		uint64_t wlb_dat:4;
+#else
+		uint64_t wlb_dat:4;
+		uint64_t reserved_4_4:1;
+		uint64_t dt:1;
+		uint64_t dtcnt:9;
+		uint64_t reserved_15_18:4;
+		uint64_t wlb_msk:4;
+		uint64_t reserved_23_63:41;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_bst0_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t wlb_msk:4;
 		uint64_t reserved_16_18:3;
@@ -164,16 +295,34 @@ union cvmx_l2c_bst0 {
 		uint64_t dt:1;
 		uint64_t stin_msk:1;
 		uint64_t wlb_dat:4;
+#else
+		uint64_t wlb_dat:4;
+		uint64_t stin_msk:1;
+		uint64_t dt:1;
+		uint64_t dtcnt:10;
+		uint64_t reserved_16_18:3;
+		uint64_t wlb_msk:4;
+		uint64_t reserved_23_63:41;
+#endif
 	} cn31xx;
 	struct cvmx_l2c_bst0_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t dtcnt:13;
 		uint64_t dt:1;
 		uint64_t stin_msk:1;
 		uint64_t wlb_dat:4;
+#else
+		uint64_t wlb_dat:4;
+		uint64_t stin_msk:1;
+		uint64_t dt:1;
+		uint64_t dtcnt:13;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn38xx;
 	struct cvmx_l2c_bst0_cn38xx cn38xxp2;
 	struct cvmx_l2c_bst0_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t dtbnk:1;
 		uint64_t wlb_msk:4;
@@ -182,6 +331,16 @@ union cvmx_l2c_bst0 {
 		uint64_t dt:1;
 		uint64_t stin_msk:1;
 		uint64_t wlb_dat:4;
+#else
+		uint64_t wlb_dat:4;
+		uint64_t stin_msk:1;
+		uint64_t dt:1;
+		uint64_t dtcnt:10;
+		uint64_t reserved_16_18:3;
+		uint64_t wlb_msk:4;
+		uint64_t dtbnk:1;
+		uint64_t reserved_24_63:40;
+#endif
 	} cn50xx;
 	struct cvmx_l2c_bst0_cn50xx cn52xx;
 	struct cvmx_l2c_bst0_cn50xx cn52xxp1;
@@ -194,28 +353,51 @@ union cvmx_l2c_bst0 {
 union cvmx_l2c_bst1 {
 	uint64_t u64;
 	struct cvmx_l2c_bst1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t l2t:9;
+#else
+		uint64_t l2t:9;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_l2c_bst1_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t vwdf:4;
 		uint64_t lrf:2;
 		uint64_t vab_vwcf:1;
 		uint64_t reserved_5_8:4;
 		uint64_t l2t:5;
+#else
+		uint64_t l2t:5;
+		uint64_t reserved_5_8:4;
+		uint64_t vab_vwcf:1;
+		uint64_t lrf:2;
+		uint64_t vwdf:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_bst1_cn30xx cn31xx;
 	struct cvmx_l2c_bst1_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t vwdf:4;
 		uint64_t lrf:2;
 		uint64_t vab_vwcf:1;
 		uint64_t l2t:9;
+#else
+		uint64_t l2t:9;
+		uint64_t vab_vwcf:1;
+		uint64_t lrf:2;
+		uint64_t vwdf:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xx;
 	struct cvmx_l2c_bst1_cn38xx cn38xxp2;
 	struct cvmx_l2c_bst1_cn38xx cn50xx;
 	struct cvmx_l2c_bst1_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t plc2:1;
 		uint64_t plc1:1;
@@ -225,9 +407,21 @@ union cvmx_l2c_bst1 {
 		uint64_t ilc:1;
 		uint64_t vab_vwcf:1;
 		uint64_t l2t:9;
+#else
+		uint64_t l2t:9;
+		uint64_t vab_vwcf:1;
+		uint64_t ilc:1;
+		uint64_t reserved_11_11:1;
+		uint64_t vwdf:4;
+		uint64_t plc0:1;
+		uint64_t plc1:1;
+		uint64_t plc2:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} cn52xx;
 	struct cvmx_l2c_bst1_cn52xx cn52xxp1;
 	struct cvmx_l2c_bst1_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t plc2:1;
 		uint64_t plc1:1;
@@ -239,6 +433,19 @@ union cvmx_l2c_bst1 {
 		uint64_t reserved_10_10:1;
 		uint64_t vab_vwcf0:1;
 		uint64_t l2t:9;
+#else
+		uint64_t l2t:9;
+		uint64_t vab_vwcf0:1;
+		uint64_t reserved_10_10:1;
+		uint64_t vab_vwcf1:1;
+		uint64_t vwdf0:4;
+		uint64_t vwdf1:4;
+		uint64_t ilc:1;
+		uint64_t plc0:1;
+		uint64_t plc1:1;
+		uint64_t plc2:1;
+		uint64_t reserved_24_63:40;
+#endif
 	} cn56xx;
 	struct cvmx_l2c_bst1_cn56xx cn56xxp1;
 	struct cvmx_l2c_bst1_cn38xx cn58xx;
@@ -248,6 +455,7 @@ union cvmx_l2c_bst1 {
 union cvmx_l2c_bst2 {
 	uint64_t u64;
 	struct cvmx_l2c_bst2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t mrb:4;
 		uint64_t reserved_4_11:8;
@@ -255,8 +463,18 @@ union cvmx_l2c_bst2 {
 		uint64_t picbst:1;
 		uint64_t xrdmsk:1;
 		uint64_t xrddat:1;
+#else
+		uint64_t xrddat:1;
+		uint64_t xrdmsk:1;
+		uint64_t picbst:1;
+		uint64_t ipcbst:1;
+		uint64_t reserved_4_11:8;
+		uint64_t mrb:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_l2c_bst2_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t mrb:4;
 		uint64_t rmdf:4;
@@ -265,9 +483,20 @@ union cvmx_l2c_bst2 {
 		uint64_t reserved_2_2:1;
 		uint64_t xrdmsk:1;
 		uint64_t xrddat:1;
+#else
+		uint64_t xrddat:1;
+		uint64_t xrdmsk:1;
+		uint64_t reserved_2_2:1;
+		uint64_t ipcbst:1;
+		uint64_t reserved_4_7:4;
+		uint64_t rmdf:4;
+		uint64_t mrb:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_bst2_cn30xx cn31xx;
 	struct cvmx_l2c_bst2_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t mrb:4;
 		uint64_t rmdf:4;
@@ -276,12 +505,23 @@ union cvmx_l2c_bst2 {
 		uint64_t picbst:1;
 		uint64_t xrdmsk:1;
 		uint64_t xrddat:1;
+#else
+		uint64_t xrddat:1;
+		uint64_t xrdmsk:1;
+		uint64_t picbst:1;
+		uint64_t ipcbst:1;
+		uint64_t rhdf:4;
+		uint64_t rmdf:4;
+		uint64_t mrb:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xx;
 	struct cvmx_l2c_bst2_cn38xx cn38xxp2;
 	struct cvmx_l2c_bst2_cn30xx cn50xx;
 	struct cvmx_l2c_bst2_cn30xx cn52xx;
 	struct cvmx_l2c_bst2_cn30xx cn52xxp1;
 	struct cvmx_l2c_bst2_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t mrb:4;
 		uint64_t rmdb:4;
@@ -290,6 +530,16 @@ union cvmx_l2c_bst2 {
 		uint64_t picbst:1;
 		uint64_t xrdmsk:1;
 		uint64_t xrddat:1;
+#else
+		uint64_t xrddat:1;
+		uint64_t xrdmsk:1;
+		uint64_t picbst:1;
+		uint64_t ipcbst:1;
+		uint64_t rhdb:4;
+		uint64_t rmdb:4;
+		uint64_t mrb:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn56xx;
 	struct cvmx_l2c_bst2_cn56xx cn56xxp1;
 	struct cvmx_l2c_bst2_cn56xx cn58xx;
@@ -299,48 +549,93 @@ union cvmx_l2c_bst2 {
 union cvmx_l2c_bst_memx {
 	uint64_t u64;
 	struct cvmx_l2c_bst_memx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t start_bist:1;
 		uint64_t clear_bist:1;
 		uint64_t reserved_5_61:57;
 		uint64_t rdffl:1;
 		uint64_t vbffl:4;
+#else
+		uint64_t vbffl:4;
+		uint64_t rdffl:1;
+		uint64_t reserved_5_61:57;
+		uint64_t clear_bist:1;
+		uint64_t start_bist:1;
+#endif
 	} s;
+	struct cvmx_l2c_bst_memx_s cn61xx;
 	struct cvmx_l2c_bst_memx_s cn63xx;
 	struct cvmx_l2c_bst_memx_s cn63xxp1;
+	struct cvmx_l2c_bst_memx_s cn66xx;
+	struct cvmx_l2c_bst_memx_s cn68xx;
+	struct cvmx_l2c_bst_memx_s cn68xxp1;
+	struct cvmx_l2c_bst_memx_s cnf71xx;
 };
 
 union cvmx_l2c_bst_tdtx {
 	uint64_t u64;
 	struct cvmx_l2c_bst_tdtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t fbfrspfl:8;
 		uint64_t sbffl:8;
 		uint64_t fbffl:8;
 		uint64_t l2dfl:8;
+#else
+		uint64_t l2dfl:8;
+		uint64_t fbffl:8;
+		uint64_t sbffl:8;
+		uint64_t fbfrspfl:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
+	struct cvmx_l2c_bst_tdtx_s cn61xx;
 	struct cvmx_l2c_bst_tdtx_s cn63xx;
 	struct cvmx_l2c_bst_tdtx_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t sbffl:8;
 		uint64_t fbffl:8;
 		uint64_t l2dfl:8;
+#else
+		uint64_t l2dfl:8;
+		uint64_t fbffl:8;
+		uint64_t sbffl:8;
+		uint64_t reserved_24_63:40;
+#endif
 	} cn63xxp1;
+	struct cvmx_l2c_bst_tdtx_s cn66xx;
+	struct cvmx_l2c_bst_tdtx_s cn68xx;
+	struct cvmx_l2c_bst_tdtx_s cn68xxp1;
+	struct cvmx_l2c_bst_tdtx_s cnf71xx;
 };
 
 union cvmx_l2c_bst_ttgx {
 	uint64_t u64;
 	struct cvmx_l2c_bst_ttgx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t lrufl:1;
 		uint64_t tagfl:16;
+#else
+		uint64_t tagfl:16;
+		uint64_t lrufl:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
+	struct cvmx_l2c_bst_ttgx_s cn61xx;
 	struct cvmx_l2c_bst_ttgx_s cn63xx;
 	struct cvmx_l2c_bst_ttgx_s cn63xxp1;
+	struct cvmx_l2c_bst_ttgx_s cn66xx;
+	struct cvmx_l2c_bst_ttgx_s cn68xx;
+	struct cvmx_l2c_bst_ttgx_s cn68xxp1;
+	struct cvmx_l2c_bst_ttgx_s cnf71xx;
 };
 
 union cvmx_l2c_cfg {
 	uint64_t u64;
 	struct cvmx_l2c_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t bstrun:1;
 		uint64_t lbist:1;
@@ -356,8 +651,26 @@ union cvmx_l2c_cfg {
 		uint64_t rsp_arb_mode:1;
 		uint64_t rfb_arb_mode:1;
 		uint64_t lrf_arb_mode:1;
+#else
+		uint64_t lrf_arb_mode:1;
+		uint64_t rfb_arb_mode:1;
+		uint64_t rsp_arb_mode:1;
+		uint64_t mwf_crd:4;
+		uint64_t idxalias:1;
+		uint64_t fpen:1;
+		uint64_t fpempty:1;
+		uint64_t fpexp:4;
+		uint64_t dfill_dis:1;
+		uint64_t dpres0:1;
+		uint64_t dpres1:1;
+		uint64_t xor_bank:1;
+		uint64_t lbist:1;
+		uint64_t bstrun:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_l2c_cfg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t fpexp:4;
 		uint64_t fpempty:1;
@@ -367,11 +680,23 @@ union cvmx_l2c_cfg {
 		uint64_t rsp_arb_mode:1;
 		uint64_t rfb_arb_mode:1;
 		uint64_t lrf_arb_mode:1;
+#else
+		uint64_t lrf_arb_mode:1;
+		uint64_t rfb_arb_mode:1;
+		uint64_t rsp_arb_mode:1;
+		uint64_t mwf_crd:4;
+		uint64_t idxalias:1;
+		uint64_t fpen:1;
+		uint64_t fpempty:1;
+		uint64_t fpexp:4;
+		uint64_t reserved_14_63:50;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_cfg_cn30xx cn31xx;
 	struct cvmx_l2c_cfg_cn30xx cn38xx;
 	struct cvmx_l2c_cfg_cn30xx cn38xxp2;
 	struct cvmx_l2c_cfg_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t bstrun:1;
 		uint64_t lbist:1;
@@ -384,12 +709,27 @@ union cvmx_l2c_cfg {
 		uint64_t rsp_arb_mode:1;
 		uint64_t rfb_arb_mode:1;
 		uint64_t lrf_arb_mode:1;
+#else
+		uint64_t lrf_arb_mode:1;
+		uint64_t rfb_arb_mode:1;
+		uint64_t rsp_arb_mode:1;
+		uint64_t mwf_crd:4;
+		uint64_t idxalias:1;
+		uint64_t fpen:1;
+		uint64_t fpempty:1;
+		uint64_t fpexp:4;
+		uint64_t reserved_14_17:4;
+		uint64_t lbist:1;
+		uint64_t bstrun:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn50xx;
 	struct cvmx_l2c_cfg_cn50xx cn52xx;
 	struct cvmx_l2c_cfg_cn50xx cn52xxp1;
 	struct cvmx_l2c_cfg_s cn56xx;
 	struct cvmx_l2c_cfg_s cn56xxp1;
 	struct cvmx_l2c_cfg_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t bstrun:1;
 		uint64_t lbist:1;
@@ -403,8 +743,24 @@ union cvmx_l2c_cfg {
 		uint64_t rsp_arb_mode:1;
 		uint64_t rfb_arb_mode:1;
 		uint64_t lrf_arb_mode:1;
+#else
+		uint64_t lrf_arb_mode:1;
+		uint64_t rfb_arb_mode:1;
+		uint64_t rsp_arb_mode:1;
+		uint64_t mwf_crd:4;
+		uint64_t idxalias:1;
+		uint64_t fpen:1;
+		uint64_t fpempty:1;
+		uint64_t fpexp:4;
+		uint64_t dfill_dis:1;
+		uint64_t reserved_15_17:3;
+		uint64_t lbist:1;
+		uint64_t bstrun:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn58xx;
 	struct cvmx_l2c_cfg_cn58xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_15_63:49;
 		uint64_t dfill_dis:1;
 		uint64_t fpexp:4;
@@ -415,22 +771,46 @@ union cvmx_l2c_cfg {
 		uint64_t rsp_arb_mode:1;
 		uint64_t rfb_arb_mode:1;
 		uint64_t lrf_arb_mode:1;
+#else
+		uint64_t lrf_arb_mode:1;
+		uint64_t rfb_arb_mode:1;
+		uint64_t rsp_arb_mode:1;
+		uint64_t mwf_crd:4;
+		uint64_t idxalias:1;
+		uint64_t fpen:1;
+		uint64_t fpempty:1;
+		uint64_t fpexp:4;
+		uint64_t dfill_dis:1;
+		uint64_t reserved_15_63:49;
+#endif
 	} cn58xxp1;
 };
 
 union cvmx_l2c_cop0_mapx {
 	uint64_t u64;
 	struct cvmx_l2c_cop0_mapx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:64;
+#else
+		uint64_t data:64;
+#endif
 	} s;
+	struct cvmx_l2c_cop0_mapx_s cn61xx;
 	struct cvmx_l2c_cop0_mapx_s cn63xx;
 	struct cvmx_l2c_cop0_mapx_s cn63xxp1;
+	struct cvmx_l2c_cop0_mapx_s cn66xx;
+	struct cvmx_l2c_cop0_mapx_s cn68xx;
+	struct cvmx_l2c_cop0_mapx_s cn68xxp1;
+	struct cvmx_l2c_cop0_mapx_s cnf71xx;
 };
 
 union cvmx_l2c_ctl {
 	uint64_t u64;
 	struct cvmx_l2c_ctl_s {
-		uint64_t reserved_28_63:36;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_30_63:34;
+		uint64_t sepcmt:1;
+		uint64_t rdf_fast:1;
 		uint64_t disstgl2i:1;
 		uint64_t l2dfsbe:1;
 		uint64_t l2dfdbe:1;
@@ -444,9 +824,95 @@ union cvmx_l2c_ctl {
 		uint64_t vab_thresh:4;
 		uint64_t disecc:1;
 		uint64_t disidxalias:1;
+#else
+		uint64_t disidxalias:1;
+		uint64_t disecc:1;
+		uint64_t vab_thresh:4;
+		uint64_t ef_cnt:7;
+		uint64_t ef_ena:1;
+		uint64_t xmc_arb_mode:1;
+		uint64_t rsp_arb_mode:1;
+		uint64_t maxlfb:4;
+		uint64_t maxvab:4;
+		uint64_t discclk:1;
+		uint64_t l2dfdbe:1;
+		uint64_t l2dfsbe:1;
+		uint64_t disstgl2i:1;
+		uint64_t rdf_fast:1;
+		uint64_t sepcmt:1;
+		uint64_t reserved_30_63:34;
+#endif
 	} s;
-	struct cvmx_l2c_ctl_s cn63xx;
+	struct cvmx_l2c_ctl_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t rdf_fast:1;
+		uint64_t disstgl2i:1;
+		uint64_t l2dfsbe:1;
+		uint64_t l2dfdbe:1;
+		uint64_t discclk:1;
+		uint64_t maxvab:4;
+		uint64_t maxlfb:4;
+		uint64_t rsp_arb_mode:1;
+		uint64_t xmc_arb_mode:1;
+		uint64_t ef_ena:1;
+		uint64_t ef_cnt:7;
+		uint64_t vab_thresh:4;
+		uint64_t disecc:1;
+		uint64_t disidxalias:1;
+#else
+		uint64_t disidxalias:1;
+		uint64_t disecc:1;
+		uint64_t vab_thresh:4;
+		uint64_t ef_cnt:7;
+		uint64_t ef_ena:1;
+		uint64_t xmc_arb_mode:1;
+		uint64_t rsp_arb_mode:1;
+		uint64_t maxlfb:4;
+		uint64_t maxvab:4;
+		uint64_t discclk:1;
+		uint64_t l2dfdbe:1;
+		uint64_t l2dfsbe:1;
+		uint64_t disstgl2i:1;
+		uint64_t rdf_fast:1;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_ctl_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_28_63:36;
+		uint64_t disstgl2i:1;
+		uint64_t l2dfsbe:1;
+		uint64_t l2dfdbe:1;
+		uint64_t discclk:1;
+		uint64_t maxvab:4;
+		uint64_t maxlfb:4;
+		uint64_t rsp_arb_mode:1;
+		uint64_t xmc_arb_mode:1;
+		uint64_t ef_ena:1;
+		uint64_t ef_cnt:7;
+		uint64_t vab_thresh:4;
+		uint64_t disecc:1;
+		uint64_t disidxalias:1;
+#else
+		uint64_t disidxalias:1;
+		uint64_t disecc:1;
+		uint64_t vab_thresh:4;
+		uint64_t ef_cnt:7;
+		uint64_t ef_ena:1;
+		uint64_t xmc_arb_mode:1;
+		uint64_t rsp_arb_mode:1;
+		uint64_t maxlfb:4;
+		uint64_t maxvab:4;
+		uint64_t discclk:1;
+		uint64_t l2dfdbe:1;
+		uint64_t l2dfsbe:1;
+		uint64_t disstgl2i:1;
+		uint64_t reserved_28_63:36;
+#endif
+	} cn63xx;
 	struct cvmx_l2c_ctl_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t discclk:1;
 		uint64_t maxvab:4;
@@ -458,12 +924,30 @@ union cvmx_l2c_ctl {
 		uint64_t vab_thresh:4;
 		uint64_t disecc:1;
 		uint64_t disidxalias:1;
+#else
+		uint64_t disidxalias:1;
+		uint64_t disecc:1;
+		uint64_t vab_thresh:4;
+		uint64_t ef_cnt:7;
+		uint64_t ef_ena:1;
+		uint64_t xmc_arb_mode:1;
+		uint64_t rsp_arb_mode:1;
+		uint64_t maxlfb:4;
+		uint64_t maxvab:4;
+		uint64_t discclk:1;
+		uint64_t reserved_25_63:39;
+#endif
 	} cn63xxp1;
+	struct cvmx_l2c_ctl_cn61xx cn66xx;
+	struct cvmx_l2c_ctl_s cn68xx;
+	struct cvmx_l2c_ctl_cn63xx cn68xxp1;
+	struct cvmx_l2c_ctl_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_dbg {
 	uint64_t u64;
 	struct cvmx_l2c_dbg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_15_63:49;
 		uint64_t lfb_enum:4;
 		uint64_t lfb_dmp:1;
@@ -472,8 +956,19 @@ union cvmx_l2c_dbg {
 		uint64_t finv:1;
 		uint64_t l2d:1;
 		uint64_t l2t:1;
+#else
+		uint64_t l2t:1;
+		uint64_t l2d:1;
+		uint64_t finv:1;
+		uint64_t set:3;
+		uint64_t ppnum:4;
+		uint64_t lfb_dmp:1;
+		uint64_t lfb_enum:4;
+		uint64_t reserved_15_63:49;
+#endif
 	} s;
 	struct cvmx_l2c_dbg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t lfb_enum:2;
 		uint64_t lfb_dmp:1;
@@ -484,8 +979,21 @@ union cvmx_l2c_dbg {
 		uint64_t finv:1;
 		uint64_t l2d:1;
 		uint64_t l2t:1;
+#else
+		uint64_t l2t:1;
+		uint64_t l2d:1;
+		uint64_t finv:1;
+		uint64_t set:2;
+		uint64_t reserved_5_5:1;
+		uint64_t ppnum:1;
+		uint64_t reserved_7_9:3;
+		uint64_t lfb_dmp:1;
+		uint64_t lfb_enum:2;
+		uint64_t reserved_13_63:51;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_dbg_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t lfb_enum:3;
 		uint64_t lfb_dmp:1;
@@ -496,10 +1004,23 @@ union cvmx_l2c_dbg {
 		uint64_t finv:1;
 		uint64_t l2d:1;
 		uint64_t l2t:1;
+#else
+		uint64_t l2t:1;
+		uint64_t l2d:1;
+		uint64_t finv:1;
+		uint64_t set:2;
+		uint64_t reserved_5_5:1;
+		uint64_t ppnum:1;
+		uint64_t reserved_7_9:3;
+		uint64_t lfb_dmp:1;
+		uint64_t lfb_enum:3;
+		uint64_t reserved_14_63:50;
+#endif
 	} cn31xx;
 	struct cvmx_l2c_dbg_s cn38xx;
 	struct cvmx_l2c_dbg_s cn38xxp2;
 	struct cvmx_l2c_dbg_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t lfb_enum:3;
 		uint64_t lfb_dmp:1;
@@ -509,8 +1030,20 @@ union cvmx_l2c_dbg {
 		uint64_t finv:1;
 		uint64_t l2d:1;
 		uint64_t l2t:1;
+#else
+		uint64_t l2t:1;
+		uint64_t l2d:1;
+		uint64_t finv:1;
+		uint64_t set:3;
+		uint64_t ppnum:1;
+		uint64_t reserved_7_9:3;
+		uint64_t lfb_dmp:1;
+		uint64_t lfb_enum:3;
+		uint64_t reserved_14_63:50;
+#endif
 	} cn50xx;
 	struct cvmx_l2c_dbg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t lfb_enum:3;
 		uint64_t lfb_dmp:1;
@@ -520,6 +1053,17 @@ union cvmx_l2c_dbg {
 		uint64_t finv:1;
 		uint64_t l2d:1;
 		uint64_t l2t:1;
+#else
+		uint64_t l2t:1;
+		uint64_t l2d:1;
+		uint64_t finv:1;
+		uint64_t set:3;
+		uint64_t ppnum:2;
+		uint64_t reserved_8_9:2;
+		uint64_t lfb_dmp:1;
+		uint64_t lfb_enum:3;
+		uint64_t reserved_14_63:50;
+#endif
 	} cn52xx;
 	struct cvmx_l2c_dbg_cn52xx cn52xxp1;
 	struct cvmx_l2c_dbg_s cn56xx;
@@ -531,11 +1075,19 @@ union cvmx_l2c_dbg {
 union cvmx_l2c_dut {
 	uint64_t u64;
 	struct cvmx_l2c_dut_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t dtena:1;
 		uint64_t reserved_30_30:1;
 		uint64_t dt_vld:1;
 		uint64_t dt_tag:29;
+#else
+		uint64_t dt_tag:29;
+		uint64_t dt_vld:1;
+		uint64_t reserved_30_30:1;
+		uint64_t dtena:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_l2c_dut_s cn30xx;
 	struct cvmx_l2c_dut_s cn31xx;
@@ -553,18 +1105,77 @@ union cvmx_l2c_dut {
 union cvmx_l2c_dut_mapx {
 	uint64_t u64;
 	struct cvmx_l2c_dut_mapx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t tag:28;
 		uint64_t reserved_1_9:9;
 		uint64_t valid:1;
+#else
+		uint64_t valid:1;
+		uint64_t reserved_1_9:9;
+		uint64_t tag:28;
+		uint64_t reserved_38_63:26;
+#endif
 	} s;
+	struct cvmx_l2c_dut_mapx_s cn61xx;
 	struct cvmx_l2c_dut_mapx_s cn63xx;
 	struct cvmx_l2c_dut_mapx_s cn63xxp1;
+	struct cvmx_l2c_dut_mapx_s cn66xx;
+	struct cvmx_l2c_dut_mapx_s cn68xx;
+	struct cvmx_l2c_dut_mapx_s cn68xxp1;
+	struct cvmx_l2c_dut_mapx_s cnf71xx;
 };
 
 union cvmx_l2c_err_tdtx {
 	uint64_t u64;
 	struct cvmx_l2c_err_tdtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t dbe:1;
+		uint64_t sbe:1;
+		uint64_t vdbe:1;
+		uint64_t vsbe:1;
+		uint64_t syn:10;
+		uint64_t reserved_22_49:28;
+		uint64_t wayidx:18;
+		uint64_t reserved_2_3:2;
+		uint64_t type:2;
+#else
+		uint64_t type:2;
+		uint64_t reserved_2_3:2;
+		uint64_t wayidx:18;
+		uint64_t reserved_22_49:28;
+		uint64_t syn:10;
+		uint64_t vsbe:1;
+		uint64_t vdbe:1;
+		uint64_t sbe:1;
+		uint64_t dbe:1;
+#endif
+	} s;
+	struct cvmx_l2c_err_tdtx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t dbe:1;
+		uint64_t sbe:1;
+		uint64_t vdbe:1;
+		uint64_t vsbe:1;
+		uint64_t syn:10;
+		uint64_t reserved_20_49:30;
+		uint64_t wayidx:16;
+		uint64_t reserved_2_3:2;
+		uint64_t type:2;
+#else
+		uint64_t type:2;
+		uint64_t reserved_2_3:2;
+		uint64_t wayidx:16;
+		uint64_t reserved_20_49:30;
+		uint64_t syn:10;
+		uint64_t vsbe:1;
+		uint64_t vdbe:1;
+		uint64_t sbe:1;
+		uint64_t dbe:1;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_err_tdtx_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t dbe:1;
 		uint64_t sbe:1;
 		uint64_t vdbe:1;
@@ -574,14 +1185,75 @@ union cvmx_l2c_err_tdtx {
 		uint64_t wayidx:17;
 		uint64_t reserved_2_3:2;
 		uint64_t type:2;
-	} s;
-	struct cvmx_l2c_err_tdtx_s cn63xx;
-	struct cvmx_l2c_err_tdtx_s cn63xxp1;
+#else
+		uint64_t type:2;
+		uint64_t reserved_2_3:2;
+		uint64_t wayidx:17;
+		uint64_t reserved_21_49:29;
+		uint64_t syn:10;
+		uint64_t vsbe:1;
+		uint64_t vdbe:1;
+		uint64_t sbe:1;
+		uint64_t dbe:1;
+#endif
+	} cn63xx;
+	struct cvmx_l2c_err_tdtx_cn63xx cn63xxp1;
+	struct cvmx_l2c_err_tdtx_cn63xx cn66xx;
+	struct cvmx_l2c_err_tdtx_s cn68xx;
+	struct cvmx_l2c_err_tdtx_s cn68xxp1;
+	struct cvmx_l2c_err_tdtx_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_err_ttgx {
 	uint64_t u64;
 	struct cvmx_l2c_err_ttgx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t dbe:1;
+		uint64_t sbe:1;
+		uint64_t noway:1;
+		uint64_t reserved_56_60:5;
+		uint64_t syn:6;
+		uint64_t reserved_22_49:28;
+		uint64_t wayidx:15;
+		uint64_t reserved_2_6:5;
+		uint64_t type:2;
+#else
+		uint64_t type:2;
+		uint64_t reserved_2_6:5;
+		uint64_t wayidx:15;
+		uint64_t reserved_22_49:28;
+		uint64_t syn:6;
+		uint64_t reserved_56_60:5;
+		uint64_t noway:1;
+		uint64_t sbe:1;
+		uint64_t dbe:1;
+#endif
+	} s;
+	struct cvmx_l2c_err_ttgx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t dbe:1;
+		uint64_t sbe:1;
+		uint64_t noway:1;
+		uint64_t reserved_56_60:5;
+		uint64_t syn:6;
+		uint64_t reserved_20_49:30;
+		uint64_t wayidx:13;
+		uint64_t reserved_2_6:5;
+		uint64_t type:2;
+#else
+		uint64_t type:2;
+		uint64_t reserved_2_6:5;
+		uint64_t wayidx:13;
+		uint64_t reserved_20_49:30;
+		uint64_t syn:6;
+		uint64_t reserved_56_60:5;
+		uint64_t noway:1;
+		uint64_t sbe:1;
+		uint64_t dbe:1;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_err_ttgx_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t dbe:1;
 		uint64_t sbe:1;
 		uint64_t noway:1;
@@ -591,43 +1263,117 @@ union cvmx_l2c_err_ttgx {
 		uint64_t wayidx:14;
 		uint64_t reserved_2_6:5;
 		uint64_t type:2;
-	} s;
-	struct cvmx_l2c_err_ttgx_s cn63xx;
-	struct cvmx_l2c_err_ttgx_s cn63xxp1;
+#else
+		uint64_t type:2;
+		uint64_t reserved_2_6:5;
+		uint64_t wayidx:14;
+		uint64_t reserved_21_49:29;
+		uint64_t syn:6;
+		uint64_t reserved_56_60:5;
+		uint64_t noway:1;
+		uint64_t sbe:1;
+		uint64_t dbe:1;
+#endif
+	} cn63xx;
+	struct cvmx_l2c_err_ttgx_cn63xx cn63xxp1;
+	struct cvmx_l2c_err_ttgx_cn63xx cn66xx;
+	struct cvmx_l2c_err_ttgx_s cn68xx;
+	struct cvmx_l2c_err_ttgx_s cn68xxp1;
+	struct cvmx_l2c_err_ttgx_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_err_vbfx {
 	uint64_t u64;
 	struct cvmx_l2c_err_vbfx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t vdbe:1;
 		uint64_t vsbe:1;
 		uint64_t vsyn:10;
 		uint64_t reserved_2_49:48;
 		uint64_t type:2;
+#else
+		uint64_t type:2;
+		uint64_t reserved_2_49:48;
+		uint64_t vsyn:10;
+		uint64_t vsbe:1;
+		uint64_t vdbe:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
+	struct cvmx_l2c_err_vbfx_s cn61xx;
 	struct cvmx_l2c_err_vbfx_s cn63xx;
 	struct cvmx_l2c_err_vbfx_s cn63xxp1;
+	struct cvmx_l2c_err_vbfx_s cn66xx;
+	struct cvmx_l2c_err_vbfx_s cn68xx;
+	struct cvmx_l2c_err_vbfx_s cn68xxp1;
+	struct cvmx_l2c_err_vbfx_s cnf71xx;
 };
 
 union cvmx_l2c_err_xmc {
 	uint64_t u64;
 	struct cvmx_l2c_err_xmc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t cmd:6;
+		uint64_t reserved_54_57:4;
+		uint64_t sid:6;
+		uint64_t reserved_38_47:10;
+		uint64_t addr:38;
+#else
+		uint64_t addr:38;
+		uint64_t reserved_38_47:10;
+		uint64_t sid:6;
+		uint64_t reserved_54_57:4;
+		uint64_t cmd:6;
+#endif
+	} s;
+	struct cvmx_l2c_err_xmc_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t cmd:6;
 		uint64_t reserved_52_57:6;
 		uint64_t sid:4;
 		uint64_t reserved_38_47:10;
 		uint64_t addr:38;
-	} s;
-	struct cvmx_l2c_err_xmc_s cn63xx;
-	struct cvmx_l2c_err_xmc_s cn63xxp1;
+#else
+		uint64_t addr:38;
+		uint64_t reserved_38_47:10;
+		uint64_t sid:4;
+		uint64_t reserved_52_57:6;
+		uint64_t cmd:6;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_err_xmc_cn61xx cn63xx;
+	struct cvmx_l2c_err_xmc_cn61xx cn63xxp1;
+	struct cvmx_l2c_err_xmc_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t cmd:6;
+		uint64_t reserved_53_57:5;
+		uint64_t sid:5;
+		uint64_t reserved_38_47:10;
+		uint64_t addr:38;
+#else
+		uint64_t addr:38;
+		uint64_t reserved_38_47:10;
+		uint64_t sid:5;
+		uint64_t reserved_53_57:5;
+		uint64_t cmd:6;
+#endif
+	} cn66xx;
+	struct cvmx_l2c_err_xmc_s cn68xx;
+	struct cvmx_l2c_err_xmc_s cn68xxp1;
+	struct cvmx_l2c_err_xmc_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_grpwrr0 {
 	uint64_t u64;
 	struct cvmx_l2c_grpwrr0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t plc1rmsk:32;
 		uint64_t plc0rmsk:32;
+#else
+		uint64_t plc0rmsk:32;
+		uint64_t plc1rmsk:32;
+#endif
 	} s;
 	struct cvmx_l2c_grpwrr0_s cn52xx;
 	struct cvmx_l2c_grpwrr0_s cn52xxp1;
@@ -638,8 +1384,13 @@ union cvmx_l2c_grpwrr0 {
 union cvmx_l2c_grpwrr1 {
 	uint64_t u64;
 	struct cvmx_l2c_grpwrr1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t ilcrmsk:32;
 		uint64_t plc2rmsk:32;
+#else
+		uint64_t plc2rmsk:32;
+		uint64_t ilcrmsk:32;
+#endif
 	} s;
 	struct cvmx_l2c_grpwrr1_s cn52xx;
 	struct cvmx_l2c_grpwrr1_s cn52xxp1;
@@ -650,6 +1401,7 @@ union cvmx_l2c_grpwrr1 {
 union cvmx_l2c_int_en {
 	uint64_t u64;
 	struct cvmx_l2c_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t lck2ena:1;
 		uint64_t lckena:1;
@@ -660,6 +1412,18 @@ union cvmx_l2c_int_en {
 		uint64_t oob3en:1;
 		uint64_t oob2en:1;
 		uint64_t oob1en:1;
+#else
+		uint64_t oob1en:1;
+		uint64_t oob2en:1;
+		uint64_t oob3en:1;
+		uint64_t l2tsecen:1;
+		uint64_t l2tdeden:1;
+		uint64_t l2dsecen:1;
+		uint64_t l2ddeden:1;
+		uint64_t lckena:1;
+		uint64_t lck2ena:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_l2c_int_en_s cn52xx;
 	struct cvmx_l2c_int_en_s cn52xxp1;
@@ -670,6 +1434,7 @@ union cvmx_l2c_int_en {
 union cvmx_l2c_int_ena {
 	uint64_t u64;
 	struct cvmx_l2c_int_ena_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t bigrd:1;
 		uint64_t bigwr:1;
@@ -679,9 +1444,22 @@ union cvmx_l2c_int_ena {
 		uint64_t vrtwr:1;
 		uint64_t holewr:1;
 		uint64_t holerd:1;
+#else
+		uint64_t holerd:1;
+		uint64_t holewr:1;
+		uint64_t vrtwr:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtpe:1;
+		uint64_t bigwr:1;
+		uint64_t bigrd:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
+	struct cvmx_l2c_int_ena_s cn61xx;
 	struct cvmx_l2c_int_ena_s cn63xx;
 	struct cvmx_l2c_int_ena_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t vrtpe:1;
 		uint64_t vrtadrng:1;
@@ -689,13 +1467,30 @@ union cvmx_l2c_int_ena {
 		uint64_t vrtwr:1;
 		uint64_t holewr:1;
 		uint64_t holerd:1;
+#else
+		uint64_t holerd:1;
+		uint64_t holewr:1;
+		uint64_t vrtwr:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtpe:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn63xxp1;
+	struct cvmx_l2c_int_ena_s cn66xx;
+	struct cvmx_l2c_int_ena_s cn68xx;
+	struct cvmx_l2c_int_ena_s cn68xxp1;
+	struct cvmx_l2c_int_ena_s cnf71xx;
 };
 
 union cvmx_l2c_int_reg {
 	uint64_t u64;
 	struct cvmx_l2c_int_reg_s {
-		uint64_t reserved_17_63:47;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t tad3:1;
+		uint64_t tad2:1;
+		uint64_t tad1:1;
 		uint64_t tad0:1;
 		uint64_t reserved_8_15:8;
 		uint64_t bigrd:1;
@@ -706,9 +1501,53 @@ union cvmx_l2c_int_reg {
 		uint64_t vrtwr:1;
 		uint64_t holewr:1;
 		uint64_t holerd:1;
+#else
+		uint64_t holerd:1;
+		uint64_t holewr:1;
+		uint64_t vrtwr:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtpe:1;
+		uint64_t bigwr:1;
+		uint64_t bigrd:1;
+		uint64_t reserved_8_15:8;
+		uint64_t tad0:1;
+		uint64_t tad1:1;
+		uint64_t tad2:1;
+		uint64_t tad3:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
-	struct cvmx_l2c_int_reg_s cn63xx;
+	struct cvmx_l2c_int_reg_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_17_63:47;
+		uint64_t tad0:1;
+		uint64_t reserved_8_15:8;
+		uint64_t bigrd:1;
+		uint64_t bigwr:1;
+		uint64_t vrtpe:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtwr:1;
+		uint64_t holewr:1;
+		uint64_t holerd:1;
+#else
+		uint64_t holerd:1;
+		uint64_t holewr:1;
+		uint64_t vrtwr:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtpe:1;
+		uint64_t bigwr:1;
+		uint64_t bigrd:1;
+		uint64_t reserved_8_15:8;
+		uint64_t tad0:1;
+		uint64_t reserved_17_63:47;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_int_reg_cn61xx cn63xx;
 	struct cvmx_l2c_int_reg_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t tad0:1;
 		uint64_t reserved_6_15:10;
@@ -718,12 +1557,28 @@ union cvmx_l2c_int_reg {
 		uint64_t vrtwr:1;
 		uint64_t holewr:1;
 		uint64_t holerd:1;
+#else
+		uint64_t holerd:1;
+		uint64_t holewr:1;
+		uint64_t vrtwr:1;
+		uint64_t vrtidrng:1;
+		uint64_t vrtadrng:1;
+		uint64_t vrtpe:1;
+		uint64_t reserved_6_15:10;
+		uint64_t tad0:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn63xxp1;
+	struct cvmx_l2c_int_reg_cn61xx cn66xx;
+	struct cvmx_l2c_int_reg_s cn68xx;
+	struct cvmx_l2c_int_reg_s cn68xxp1;
+	struct cvmx_l2c_int_reg_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_int_stat {
 	uint64_t u64;
 	struct cvmx_l2c_int_stat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t lck2:1;
 		uint64_t lck:1;
@@ -734,6 +1589,18 @@ union cvmx_l2c_int_stat {
 		uint64_t oob3:1;
 		uint64_t oob2:1;
 		uint64_t oob1:1;
+#else
+		uint64_t oob1:1;
+		uint64_t oob2:1;
+		uint64_t oob3:1;
+		uint64_t l2tsec:1;
+		uint64_t l2tded:1;
+		uint64_t l2dsec:1;
+		uint64_t l2dded:1;
+		uint64_t lck:1;
+		uint64_t lck2:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_l2c_int_stat_s cn52xx;
 	struct cvmx_l2c_int_stat_s cn52xxp1;
@@ -744,28 +1611,53 @@ union cvmx_l2c_int_stat {
 union cvmx_l2c_iocx_pfc {
 	uint64_t u64;
 	struct cvmx_l2c_iocx_pfc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t count:64;
+#else
 		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_iocx_pfc_s cn61xx;
 	struct cvmx_l2c_iocx_pfc_s cn63xx;
 	struct cvmx_l2c_iocx_pfc_s cn63xxp1;
+	struct cvmx_l2c_iocx_pfc_s cn66xx;
+	struct cvmx_l2c_iocx_pfc_s cn68xx;
+	struct cvmx_l2c_iocx_pfc_s cn68xxp1;
+	struct cvmx_l2c_iocx_pfc_s cnf71xx;
 };
 
 union cvmx_l2c_iorx_pfc {
 	uint64_t u64;
 	struct cvmx_l2c_iorx_pfc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t count:64;
+#else
 		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_iorx_pfc_s cn61xx;
 	struct cvmx_l2c_iorx_pfc_s cn63xx;
 	struct cvmx_l2c_iorx_pfc_s cn63xxp1;
+	struct cvmx_l2c_iorx_pfc_s cn66xx;
+	struct cvmx_l2c_iorx_pfc_s cn68xx;
+	struct cvmx_l2c_iorx_pfc_s cn68xxp1;
+	struct cvmx_l2c_iorx_pfc_s cnf71xx;
 };
 
 union cvmx_l2c_lckbase {
 	uint64_t u64;
 	struct cvmx_l2c_lckbase_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t lck_base:27;
 		uint64_t reserved_1_3:3;
 		uint64_t lck_ena:1;
+#else
+		uint64_t lck_ena:1;
+		uint64_t reserved_1_3:3;
+		uint64_t lck_base:27;
+		uint64_t reserved_31_63:33;
+#endif
 	} s;
 	struct cvmx_l2c_lckbase_s cn30xx;
 	struct cvmx_l2c_lckbase_s cn31xx;
@@ -783,8 +1675,13 @@ union cvmx_l2c_lckbase {
 union cvmx_l2c_lckoff {
 	uint64_t u64;
 	struct cvmx_l2c_lckoff_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t lck_offset:10;
+#else
+		uint64_t lck_offset:10;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_l2c_lckoff_s cn30xx;
 	struct cvmx_l2c_lckoff_s cn31xx;
@@ -802,6 +1699,7 @@ union cvmx_l2c_lckoff {
 union cvmx_l2c_lfb0 {
 	uint64_t u64;
 	struct cvmx_l2c_lfb0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t stcpnd:1;
 		uint64_t stpnd:1;
@@ -816,8 +1714,25 @@ union cvmx_l2c_lfb0 {
 		uint64_t sid:9;
 		uint64_t cmd:4;
 		uint64_t vld:1;
+#else
+		uint64_t vld:1;
+		uint64_t cmd:4;
+		uint64_t sid:9;
+		uint64_t vabnum:4;
+		uint64_t set:3;
+		uint64_t ihd:1;
+		uint64_t itl:1;
+		uint64_t inxt:4;
+		uint64_t vam:1;
+		uint64_t stcfl:1;
+		uint64_t stinv:1;
+		uint64_t stpnd:1;
+		uint64_t stcpnd:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_l2c_lfb0_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t stcpnd:1;
 		uint64_t stpnd:1;
@@ -835,8 +1750,28 @@ union cvmx_l2c_lfb0 {
 		uint64_t sid:9;
 		uint64_t cmd:4;
 		uint64_t vld:1;
+#else
+		uint64_t vld:1;
+		uint64_t cmd:4;
+		uint64_t sid:9;
+		uint64_t vabnum:2;
+		uint64_t reserved_16_17:2;
+		uint64_t set:2;
+		uint64_t reserved_20_20:1;
+		uint64_t ihd:1;
+		uint64_t itl:1;
+		uint64_t inxt:2;
+		uint64_t reserved_25_26:2;
+		uint64_t vam:1;
+		uint64_t stcfl:1;
+		uint64_t stinv:1;
+		uint64_t stpnd:1;
+		uint64_t stcpnd:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_lfb0_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t stcpnd:1;
 		uint64_t stpnd:1;
@@ -854,10 +1789,30 @@ union cvmx_l2c_lfb0 {
 		uint64_t sid:9;
 		uint64_t cmd:4;
 		uint64_t vld:1;
+#else
+		uint64_t vld:1;
+		uint64_t cmd:4;
+		uint64_t sid:9;
+		uint64_t vabnum:3;
+		uint64_t reserved_17_17:1;
+		uint64_t set:2;
+		uint64_t reserved_20_20:1;
+		uint64_t ihd:1;
+		uint64_t itl:1;
+		uint64_t inxt:3;
+		uint64_t reserved_26_26:1;
+		uint64_t vam:1;
+		uint64_t stcfl:1;
+		uint64_t stinv:1;
+		uint64_t stpnd:1;
+		uint64_t stcpnd:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn31xx;
 	struct cvmx_l2c_lfb0_s cn38xx;
 	struct cvmx_l2c_lfb0_s cn38xxp2;
 	struct cvmx_l2c_lfb0_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t stcpnd:1;
 		uint64_t stpnd:1;
@@ -874,6 +1829,24 @@ union cvmx_l2c_lfb0 {
 		uint64_t sid:9;
 		uint64_t cmd:4;
 		uint64_t vld:1;
+#else
+		uint64_t vld:1;
+		uint64_t cmd:4;
+		uint64_t sid:9;
+		uint64_t vabnum:3;
+		uint64_t reserved_17_17:1;
+		uint64_t set:3;
+		uint64_t ihd:1;
+		uint64_t itl:1;
+		uint64_t inxt:3;
+		uint64_t reserved_26_26:1;
+		uint64_t vam:1;
+		uint64_t stcfl:1;
+		uint64_t stinv:1;
+		uint64_t stpnd:1;
+		uint64_t stcpnd:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn50xx;
 	struct cvmx_l2c_lfb0_cn50xx cn52xx;
 	struct cvmx_l2c_lfb0_cn50xx cn52xxp1;
@@ -886,6 +1859,7 @@ union cvmx_l2c_lfb0 {
 union cvmx_l2c_lfb1 {
 	uint64_t u64;
 	struct cvmx_l2c_lfb1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t dsgoing:1;
 		uint64_t bid:2;
@@ -905,6 +1879,27 @@ union cvmx_l2c_lfb1 {
 		uint64_t prbrty:1;
 		uint64_t wtprb:1;
 		uint64_t vld:1;
+#else
+		uint64_t vld:1;
+		uint64_t wtprb:1;
+		uint64_t prbrty:1;
+		uint64_t wtmfl:1;
+		uint64_t wtvtm:1;
+		uint64_t wtstrsc:1;
+		uint64_t wtstrsp:1;
+		uint64_t wtstdt:1;
+		uint64_t wtrda:1;
+		uint64_t wtstm:1;
+		uint64_t wtwrm:1;
+		uint64_t wtwhf:1;
+		uint64_t wtwhp:1;
+		uint64_t wtdq:1;
+		uint64_t wtdw:1;
+		uint64_t wtrsp:1;
+		uint64_t bid:2;
+		uint64_t dsgoing:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} s;
 	struct cvmx_l2c_lfb1_s cn30xx;
 	struct cvmx_l2c_lfb1_s cn31xx;
@@ -922,35 +1917,69 @@ union cvmx_l2c_lfb1 {
 union cvmx_l2c_lfb2 {
 	uint64_t u64;
 	struct cvmx_l2c_lfb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_l2c_lfb2_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_27_63:37;
 		uint64_t lfb_tag:19;
 		uint64_t lfb_idx:8;
+#else
+		uint64_t lfb_idx:8;
+		uint64_t lfb_tag:19;
+		uint64_t reserved_27_63:37;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_lfb2_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_27_63:37;
 		uint64_t lfb_tag:17;
 		uint64_t lfb_idx:10;
+#else
+		uint64_t lfb_idx:10;
+		uint64_t lfb_tag:17;
+		uint64_t reserved_27_63:37;
+#endif
 	} cn31xx;
 	struct cvmx_l2c_lfb2_cn31xx cn38xx;
 	struct cvmx_l2c_lfb2_cn31xx cn38xxp2;
 	struct cvmx_l2c_lfb2_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_27_63:37;
 		uint64_t lfb_tag:20;
 		uint64_t lfb_idx:7;
+#else
+		uint64_t lfb_idx:7;
+		uint64_t lfb_tag:20;
+		uint64_t reserved_27_63:37;
+#endif
 	} cn50xx;
 	struct cvmx_l2c_lfb2_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_27_63:37;
 		uint64_t lfb_tag:18;
 		uint64_t lfb_idx:9;
+#else
+		uint64_t lfb_idx:9;
+		uint64_t lfb_tag:18;
+		uint64_t reserved_27_63:37;
+#endif
 	} cn52xx;
 	struct cvmx_l2c_lfb2_cn52xx cn52xxp1;
 	struct cvmx_l2c_lfb2_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_27_63:37;
 		uint64_t lfb_tag:16;
 		uint64_t lfb_idx:11;
+#else
+		uint64_t lfb_idx:11;
+		uint64_t lfb_tag:16;
+		uint64_t reserved_27_63:37;
+#endif
 	} cn56xx;
 	struct cvmx_l2c_lfb2_cn56xx cn56xxp1;
 	struct cvmx_l2c_lfb2_cn56xx cn58xx;
@@ -960,21 +1989,41 @@ union cvmx_l2c_lfb2 {
 union cvmx_l2c_lfb3 {
 	uint64_t u64;
 	struct cvmx_l2c_lfb3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t stpartdis:1;
 		uint64_t lfb_hwm:4;
+#else
+		uint64_t lfb_hwm:4;
+		uint64_t stpartdis:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_l2c_lfb3_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t stpartdis:1;
 		uint64_t reserved_2_3:2;
 		uint64_t lfb_hwm:2;
+#else
+		uint64_t lfb_hwm:2;
+		uint64_t reserved_2_3:2;
+		uint64_t stpartdis:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_lfb3_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t stpartdis:1;
 		uint64_t reserved_3_3:1;
 		uint64_t lfb_hwm:3;
+#else
+		uint64_t lfb_hwm:3;
+		uint64_t reserved_3_3:1;
+		uint64_t stpartdis:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} cn31xx;
 	struct cvmx_l2c_lfb3_s cn38xx;
 	struct cvmx_l2c_lfb3_s cn38xxp2;
@@ -990,9 +2039,15 @@ union cvmx_l2c_lfb3 {
 union cvmx_l2c_oob {
 	uint64_t u64;
 	struct cvmx_l2c_oob_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t dwbena:1;
 		uint64_t stena:1;
+#else
+		uint64_t stena:1;
+		uint64_t dwbena:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_l2c_oob_s cn52xx;
 	struct cvmx_l2c_oob_s cn52xxp1;
@@ -1003,12 +2058,21 @@ union cvmx_l2c_oob {
 union cvmx_l2c_oob1 {
 	uint64_t u64;
 	struct cvmx_l2c_oob1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t fadr:27;
 		uint64_t fsrc:1;
 		uint64_t reserved_34_35:2;
 		uint64_t sadr:14;
 		uint64_t reserved_14_19:6;
 		uint64_t size:14;
+#else
+		uint64_t size:14;
+		uint64_t reserved_14_19:6;
+		uint64_t sadr:14;
+		uint64_t reserved_34_35:2;
+		uint64_t fsrc:1;
+		uint64_t fadr:27;
+#endif
 	} s;
 	struct cvmx_l2c_oob1_s cn52xx;
 	struct cvmx_l2c_oob1_s cn52xxp1;
@@ -1019,12 +2083,21 @@ union cvmx_l2c_oob1 {
 union cvmx_l2c_oob2 {
 	uint64_t u64;
 	struct cvmx_l2c_oob2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t fadr:27;
 		uint64_t fsrc:1;
 		uint64_t reserved_34_35:2;
 		uint64_t sadr:14;
 		uint64_t reserved_14_19:6;
 		uint64_t size:14;
+#else
+		uint64_t size:14;
+		uint64_t reserved_14_19:6;
+		uint64_t sadr:14;
+		uint64_t reserved_34_35:2;
+		uint64_t fsrc:1;
+		uint64_t fadr:27;
+#endif
 	} s;
 	struct cvmx_l2c_oob2_s cn52xx;
 	struct cvmx_l2c_oob2_s cn52xxp1;
@@ -1035,12 +2108,21 @@ union cvmx_l2c_oob2 {
 union cvmx_l2c_oob3 {
 	uint64_t u64;
 	struct cvmx_l2c_oob3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t fadr:27;
 		uint64_t fsrc:1;
 		uint64_t reserved_34_35:2;
 		uint64_t sadr:14;
 		uint64_t reserved_14_19:6;
 		uint64_t size:14;
+#else
+		uint64_t size:14;
+		uint64_t reserved_14_19:6;
+		uint64_t sadr:14;
+		uint64_t reserved_34_35:2;
+		uint64_t fsrc:1;
+		uint64_t fadr:27;
+#endif
 	} s;
 	struct cvmx_l2c_oob3_s cn52xx;
 	struct cvmx_l2c_oob3_s cn52xxp1;
@@ -1051,8 +2133,13 @@ union cvmx_l2c_oob3 {
 union cvmx_l2c_pfcx {
 	uint64_t u64;
 	struct cvmx_l2c_pfcx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t pfcnt0:36;
+#else
+		uint64_t pfcnt0:36;
+		uint64_t reserved_36_63:28;
+#endif
 	} s;
 	struct cvmx_l2c_pfcx_s cn30xx;
 	struct cvmx_l2c_pfcx_s cn31xx;
@@ -1070,6 +2157,7 @@ union cvmx_l2c_pfcx {
 union cvmx_l2c_pfctl {
 	uint64_t u64;
 	struct cvmx_l2c_pfctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t cnt3rdclr:1;
 		uint64_t cnt2rdclr:1;
@@ -1087,6 +2175,25 @@ union cvmx_l2c_pfctl {
 		uint64_t cnt0ena:1;
 		uint64_t cnt0clr:1;
 		uint64_t cnt0sel:6;
+#else
+		uint64_t cnt0sel:6;
+		uint64_t cnt0clr:1;
+		uint64_t cnt0ena:1;
+		uint64_t cnt1sel:6;
+		uint64_t cnt1clr:1;
+		uint64_t cnt1ena:1;
+		uint64_t cnt2sel:6;
+		uint64_t cnt2clr:1;
+		uint64_t cnt2ena:1;
+		uint64_t cnt3sel:6;
+		uint64_t cnt3clr:1;
+		uint64_t cnt3ena:1;
+		uint64_t cnt0rdclr:1;
+		uint64_t cnt1rdclr:1;
+		uint64_t cnt2rdclr:1;
+		uint64_t cnt3rdclr:1;
+		uint64_t reserved_36_63:28;
+#endif
 	} s;
 	struct cvmx_l2c_pfctl_s cn30xx;
 	struct cvmx_l2c_pfctl_s cn31xx;
@@ -1104,6 +2211,7 @@ union cvmx_l2c_pfctl {
 union cvmx_l2c_ppgrp {
 	uint64_t u64;
 	struct cvmx_l2c_ppgrp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t pp11grp:2;
 		uint64_t pp10grp:2;
@@ -1117,13 +2225,36 @@ union cvmx_l2c_ppgrp {
 		uint64_t pp2grp:2;
 		uint64_t pp1grp:2;
 		uint64_t pp0grp:2;
+#else
+		uint64_t pp0grp:2;
+		uint64_t pp1grp:2;
+		uint64_t pp2grp:2;
+		uint64_t pp3grp:2;
+		uint64_t pp4grp:2;
+		uint64_t pp5grp:2;
+		uint64_t pp6grp:2;
+		uint64_t pp7grp:2;
+		uint64_t pp8grp:2;
+		uint64_t pp9grp:2;
+		uint64_t pp10grp:2;
+		uint64_t pp11grp:2;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_l2c_ppgrp_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t pp3grp:2;
 		uint64_t pp2grp:2;
 		uint64_t pp1grp:2;
 		uint64_t pp0grp:2;
+#else
+		uint64_t pp0grp:2;
+		uint64_t pp1grp:2;
+		uint64_t pp2grp:2;
+		uint64_t pp3grp:2;
+		uint64_t reserved_8_63:56;
+#endif
 	} cn52xx;
 	struct cvmx_l2c_ppgrp_cn52xx cn52xxp1;
 	struct cvmx_l2c_ppgrp_s cn56xx;
@@ -1133,81 +2264,200 @@ union cvmx_l2c_ppgrp {
 union cvmx_l2c_qos_iobx {
 	uint64_t u64;
 	struct cvmx_l2c_qos_iobx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t dwblvl:3;
+		uint64_t reserved_3_3:1;
+		uint64_t lvl:3;
+#else
+		uint64_t lvl:3;
+		uint64_t reserved_3_3:1;
+		uint64_t dwblvl:3;
+		uint64_t reserved_7_63:57;
+#endif
+	} s;
+	struct cvmx_l2c_qos_iobx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t dwblvl:2;
 		uint64_t reserved_2_3:2;
 		uint64_t lvl:2;
-	} s;
-	struct cvmx_l2c_qos_iobx_s cn63xx;
-	struct cvmx_l2c_qos_iobx_s cn63xxp1;
+#else
+		uint64_t lvl:2;
+		uint64_t reserved_2_3:2;
+		uint64_t dwblvl:2;
+		uint64_t reserved_6_63:58;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_qos_iobx_cn61xx cn63xx;
+	struct cvmx_l2c_qos_iobx_cn61xx cn63xxp1;
+	struct cvmx_l2c_qos_iobx_cn61xx cn66xx;
+	struct cvmx_l2c_qos_iobx_s cn68xx;
+	struct cvmx_l2c_qos_iobx_s cn68xxp1;
+	struct cvmx_l2c_qos_iobx_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_qos_ppx {
 	uint64_t u64;
 	struct cvmx_l2c_qos_ppx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_3_63:61;
+		uint64_t lvl:3;
+#else
+		uint64_t lvl:3;
+		uint64_t reserved_3_63:61;
+#endif
+	} s;
+	struct cvmx_l2c_qos_ppx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t lvl:2;
-	} s;
-	struct cvmx_l2c_qos_ppx_s cn63xx;
-	struct cvmx_l2c_qos_ppx_s cn63xxp1;
+#else
+		uint64_t lvl:2;
+		uint64_t reserved_2_63:62;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_qos_ppx_cn61xx cn63xx;
+	struct cvmx_l2c_qos_ppx_cn61xx cn63xxp1;
+	struct cvmx_l2c_qos_ppx_cn61xx cn66xx;
+	struct cvmx_l2c_qos_ppx_s cn68xx;
+	struct cvmx_l2c_qos_ppx_s cn68xxp1;
+	struct cvmx_l2c_qos_ppx_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_qos_wgt {
 	uint64_t u64;
 	struct cvmx_l2c_qos_wgt_s {
-		uint64_t reserved_32_63:32;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t wgt7:8;
+		uint64_t wgt6:8;
+		uint64_t wgt5:8;
+		uint64_t wgt4:8;
 		uint64_t wgt3:8;
 		uint64_t wgt2:8;
 		uint64_t wgt1:8;
 		uint64_t wgt0:8;
+#else
+		uint64_t wgt0:8;
+		uint64_t wgt1:8;
+		uint64_t wgt2:8;
+		uint64_t wgt3:8;
+		uint64_t wgt4:8;
+		uint64_t wgt5:8;
+		uint64_t wgt6:8;
+		uint64_t wgt7:8;
+#endif
 	} s;
-	struct cvmx_l2c_qos_wgt_s cn63xx;
-	struct cvmx_l2c_qos_wgt_s cn63xxp1;
+	struct cvmx_l2c_qos_wgt_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t wgt3:8;
+		uint64_t wgt2:8;
+		uint64_t wgt1:8;
+		uint64_t wgt0:8;
+#else
+		uint64_t wgt0:8;
+		uint64_t wgt1:8;
+		uint64_t wgt2:8;
+		uint64_t wgt3:8;
+		uint64_t reserved_32_63:32;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_qos_wgt_cn61xx cn63xx;
+	struct cvmx_l2c_qos_wgt_cn61xx cn63xxp1;
+	struct cvmx_l2c_qos_wgt_cn61xx cn66xx;
+	struct cvmx_l2c_qos_wgt_s cn68xx;
+	struct cvmx_l2c_qos_wgt_s cn68xxp1;
+	struct cvmx_l2c_qos_wgt_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_rscx_pfc {
 	uint64_t u64;
 	struct cvmx_l2c_rscx_pfc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t count:64;
+#else
+		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_rscx_pfc_s cn61xx;
 	struct cvmx_l2c_rscx_pfc_s cn63xx;
 	struct cvmx_l2c_rscx_pfc_s cn63xxp1;
+	struct cvmx_l2c_rscx_pfc_s cn66xx;
+	struct cvmx_l2c_rscx_pfc_s cn68xx;
+	struct cvmx_l2c_rscx_pfc_s cn68xxp1;
+	struct cvmx_l2c_rscx_pfc_s cnf71xx;
 };
 
 union cvmx_l2c_rsdx_pfc {
 	uint64_t u64;
 	struct cvmx_l2c_rsdx_pfc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t count:64;
+#else
+		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_rsdx_pfc_s cn61xx;
 	struct cvmx_l2c_rsdx_pfc_s cn63xx;
 	struct cvmx_l2c_rsdx_pfc_s cn63xxp1;
+	struct cvmx_l2c_rsdx_pfc_s cn66xx;
+	struct cvmx_l2c_rsdx_pfc_s cn68xx;
+	struct cvmx_l2c_rsdx_pfc_s cn68xxp1;
+	struct cvmx_l2c_rsdx_pfc_s cnf71xx;
 };
 
 union cvmx_l2c_spar0 {
 	uint64_t u64;
 	struct cvmx_l2c_spar0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t umsk3:8;
 		uint64_t umsk2:8;
 		uint64_t umsk1:8;
 		uint64_t umsk0:8;
+#else
+		uint64_t umsk0:8;
+		uint64_t umsk1:8;
+		uint64_t umsk2:8;
+		uint64_t umsk3:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_l2c_spar0_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t umsk0:4;
+#else
+		uint64_t umsk0:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_spar0_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t umsk1:4;
 		uint64_t reserved_4_7:4;
 		uint64_t umsk0:4;
+#else
+		uint64_t umsk0:4;
+		uint64_t reserved_4_7:4;
+		uint64_t umsk1:4;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn31xx;
 	struct cvmx_l2c_spar0_s cn38xx;
 	struct cvmx_l2c_spar0_s cn38xxp2;
 	struct cvmx_l2c_spar0_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t umsk1:8;
 		uint64_t umsk0:8;
+#else
+		uint64_t umsk0:8;
+		uint64_t umsk1:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn50xx;
 	struct cvmx_l2c_spar0_s cn52xx;
 	struct cvmx_l2c_spar0_s cn52xxp1;
@@ -1220,11 +2470,19 @@ union cvmx_l2c_spar0 {
 union cvmx_l2c_spar1 {
 	uint64_t u64;
 	struct cvmx_l2c_spar1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t umsk7:8;
 		uint64_t umsk6:8;
 		uint64_t umsk5:8;
 		uint64_t umsk4:8;
+#else
+		uint64_t umsk4:8;
+		uint64_t umsk5:8;
+		uint64_t umsk6:8;
+		uint64_t umsk7:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_l2c_spar1_s cn38xx;
 	struct cvmx_l2c_spar1_s cn38xxp2;
@@ -1237,11 +2495,19 @@ union cvmx_l2c_spar1 {
 union cvmx_l2c_spar2 {
 	uint64_t u64;
 	struct cvmx_l2c_spar2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t umsk11:8;
 		uint64_t umsk10:8;
 		uint64_t umsk9:8;
 		uint64_t umsk8:8;
+#else
+		uint64_t umsk8:8;
+		uint64_t umsk9:8;
+		uint64_t umsk10:8;
+		uint64_t umsk11:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_l2c_spar2_s cn38xx;
 	struct cvmx_l2c_spar2_s cn38xxp2;
@@ -1254,11 +2520,19 @@ union cvmx_l2c_spar2 {
 union cvmx_l2c_spar3 {
 	uint64_t u64;
 	struct cvmx_l2c_spar3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t umsk15:8;
 		uint64_t umsk14:8;
 		uint64_t umsk13:8;
 		uint64_t umsk12:8;
+#else
+		uint64_t umsk12:8;
+		uint64_t umsk13:8;
+		uint64_t umsk14:8;
+		uint64_t umsk15:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_l2c_spar3_s cn38xx;
 	struct cvmx_l2c_spar3_s cn38xxp2;
@@ -1269,12 +2543,22 @@ union cvmx_l2c_spar3 {
 union cvmx_l2c_spar4 {
 	uint64_t u64;
 	struct cvmx_l2c_spar4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t umskiob:8;
+#else
+		uint64_t umskiob:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_l2c_spar4_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t umskiob:4;
+#else
+		uint64_t umskiob:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn30xx;
 	struct cvmx_l2c_spar4_cn30xx cn31xx;
 	struct cvmx_l2c_spar4_s cn38xx;
@@ -1291,6 +2575,7 @@ union cvmx_l2c_spar4 {
 union cvmx_l2c_tadx_ecc0 {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_ecc0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_58_63:6;
 		uint64_t ow3ecc:10;
 		uint64_t reserved_42_47:6;
@@ -1299,14 +2584,30 @@ union cvmx_l2c_tadx_ecc0 {
 		uint64_t ow1ecc:10;
 		uint64_t reserved_10_15:6;
 		uint64_t ow0ecc:10;
+#else
+		uint64_t ow0ecc:10;
+		uint64_t reserved_10_15:6;
+		uint64_t ow1ecc:10;
+		uint64_t reserved_26_31:6;
+		uint64_t ow2ecc:10;
+		uint64_t reserved_42_47:6;
+		uint64_t ow3ecc:10;
+		uint64_t reserved_58_63:6;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_ecc0_s cn61xx;
 	struct cvmx_l2c_tadx_ecc0_s cn63xx;
 	struct cvmx_l2c_tadx_ecc0_s cn63xxp1;
+	struct cvmx_l2c_tadx_ecc0_s cn66xx;
+	struct cvmx_l2c_tadx_ecc0_s cn68xx;
+	struct cvmx_l2c_tadx_ecc0_s cn68xxp1;
+	struct cvmx_l2c_tadx_ecc0_s cnf71xx;
 };
 
 union cvmx_l2c_tadx_ecc1 {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_ecc1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_58_63:6;
 		uint64_t ow7ecc:10;
 		uint64_t reserved_42_47:6;
@@ -1315,14 +2616,30 @@ union cvmx_l2c_tadx_ecc1 {
 		uint64_t ow5ecc:10;
 		uint64_t reserved_10_15:6;
 		uint64_t ow4ecc:10;
+#else
+		uint64_t ow4ecc:10;
+		uint64_t reserved_10_15:6;
+		uint64_t ow5ecc:10;
+		uint64_t reserved_26_31:6;
+		uint64_t ow6ecc:10;
+		uint64_t reserved_42_47:6;
+		uint64_t ow7ecc:10;
+		uint64_t reserved_58_63:6;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_ecc1_s cn61xx;
 	struct cvmx_l2c_tadx_ecc1_s cn63xx;
 	struct cvmx_l2c_tadx_ecc1_s cn63xxp1;
+	struct cvmx_l2c_tadx_ecc1_s cn66xx;
+	struct cvmx_l2c_tadx_ecc1_s cn68xx;
+	struct cvmx_l2c_tadx_ecc1_s cn68xxp1;
+	struct cvmx_l2c_tadx_ecc1_s cnf71xx;
 };
 
 union cvmx_l2c_tadx_ien {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_ien_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t wrdislmc:1;
 		uint64_t rddislmc:1;
@@ -1333,9 +2650,23 @@ union cvmx_l2c_tadx_ien {
 		uint64_t tagsbe:1;
 		uint64_t l2ddbe:1;
 		uint64_t l2dsbe:1;
+#else
+		uint64_t l2dsbe:1;
+		uint64_t l2ddbe:1;
+		uint64_t tagsbe:1;
+		uint64_t tagdbe:1;
+		uint64_t vbfsbe:1;
+		uint64_t vbfdbe:1;
+		uint64_t noway:1;
+		uint64_t rddislmc:1;
+		uint64_t wrdislmc:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_ien_s cn61xx;
 	struct cvmx_l2c_tadx_ien_s cn63xx;
 	struct cvmx_l2c_tadx_ien_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t noway:1;
 		uint64_t vbfdbe:1;
@@ -1344,12 +2675,27 @@ union cvmx_l2c_tadx_ien {
 		uint64_t tagsbe:1;
 		uint64_t l2ddbe:1;
 		uint64_t l2dsbe:1;
+#else
+		uint64_t l2dsbe:1;
+		uint64_t l2ddbe:1;
+		uint64_t tagsbe:1;
+		uint64_t tagdbe:1;
+		uint64_t vbfsbe:1;
+		uint64_t vbfdbe:1;
+		uint64_t noway:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} cn63xxp1;
+	struct cvmx_l2c_tadx_ien_s cn66xx;
+	struct cvmx_l2c_tadx_ien_s cn68xx;
+	struct cvmx_l2c_tadx_ien_s cn68xxp1;
+	struct cvmx_l2c_tadx_ien_s cnf71xx;
 };
 
 union cvmx_l2c_tadx_int {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t wrdislmc:1;
 		uint64_t rddislmc:1;
@@ -1360,62 +2706,129 @@ union cvmx_l2c_tadx_int {
 		uint64_t tagsbe:1;
 		uint64_t l2ddbe:1;
 		uint64_t l2dsbe:1;
+#else
+		uint64_t l2dsbe:1;
+		uint64_t l2ddbe:1;
+		uint64_t tagsbe:1;
+		uint64_t tagdbe:1;
+		uint64_t vbfsbe:1;
+		uint64_t vbfdbe:1;
+		uint64_t noway:1;
+		uint64_t rddislmc:1;
+		uint64_t wrdislmc:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_int_s cn61xx;
 	struct cvmx_l2c_tadx_int_s cn63xx;
+	struct cvmx_l2c_tadx_int_s cn66xx;
+	struct cvmx_l2c_tadx_int_s cn68xx;
+	struct cvmx_l2c_tadx_int_s cn68xxp1;
+	struct cvmx_l2c_tadx_int_s cnf71xx;
 };
 
 union cvmx_l2c_tadx_pfc0 {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_pfc0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t count:64;
+#else
+		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_pfc0_s cn61xx;
 	struct cvmx_l2c_tadx_pfc0_s cn63xx;
 	struct cvmx_l2c_tadx_pfc0_s cn63xxp1;
+	struct cvmx_l2c_tadx_pfc0_s cn66xx;
+	struct cvmx_l2c_tadx_pfc0_s cn68xx;
+	struct cvmx_l2c_tadx_pfc0_s cn68xxp1;
+	struct cvmx_l2c_tadx_pfc0_s cnf71xx;
 };
 
 union cvmx_l2c_tadx_pfc1 {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_pfc1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t count:64;
+#else
+		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_pfc1_s cn61xx;
 	struct cvmx_l2c_tadx_pfc1_s cn63xx;
 	struct cvmx_l2c_tadx_pfc1_s cn63xxp1;
+	struct cvmx_l2c_tadx_pfc1_s cn66xx;
+	struct cvmx_l2c_tadx_pfc1_s cn68xx;
+	struct cvmx_l2c_tadx_pfc1_s cn68xxp1;
+	struct cvmx_l2c_tadx_pfc1_s cnf71xx;
 };
 
 union cvmx_l2c_tadx_pfc2 {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_pfc2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t count:64;
+#else
+		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_pfc2_s cn61xx;
 	struct cvmx_l2c_tadx_pfc2_s cn63xx;
 	struct cvmx_l2c_tadx_pfc2_s cn63xxp1;
+	struct cvmx_l2c_tadx_pfc2_s cn66xx;
+	struct cvmx_l2c_tadx_pfc2_s cn68xx;
+	struct cvmx_l2c_tadx_pfc2_s cn68xxp1;
+	struct cvmx_l2c_tadx_pfc2_s cnf71xx;
 };
 
 union cvmx_l2c_tadx_pfc3 {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_pfc3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t count:64;
+#else
+		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_pfc3_s cn61xx;
 	struct cvmx_l2c_tadx_pfc3_s cn63xx;
 	struct cvmx_l2c_tadx_pfc3_s cn63xxp1;
+	struct cvmx_l2c_tadx_pfc3_s cn66xx;
+	struct cvmx_l2c_tadx_pfc3_s cn68xx;
+	struct cvmx_l2c_tadx_pfc3_s cn68xxp1;
+	struct cvmx_l2c_tadx_pfc3_s cnf71xx;
 };
 
 union cvmx_l2c_tadx_prf {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_prf_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt3sel:8;
 		uint64_t cnt2sel:8;
 		uint64_t cnt1sel:8;
 		uint64_t cnt0sel:8;
+#else
+		uint64_t cnt0sel:8;
+		uint64_t cnt1sel:8;
+		uint64_t cnt2sel:8;
+		uint64_t cnt3sel:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_prf_s cn61xx;
 	struct cvmx_l2c_tadx_prf_s cn63xx;
 	struct cvmx_l2c_tadx_prf_s cn63xxp1;
+	struct cvmx_l2c_tadx_prf_s cn66xx;
+	struct cvmx_l2c_tadx_prf_s cn68xx;
+	struct cvmx_l2c_tadx_prf_s cn68xxp1;
+	struct cvmx_l2c_tadx_prf_s cnf71xx;
 };
 
 union cvmx_l2c_tadx_tag {
 	uint64_t u64;
 	struct cvmx_l2c_tadx_tag_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_46_63:18;
 		uint64_t ecc:6;
 		uint64_t reserved_36_39:4;
@@ -1425,145 +2838,330 @@ union cvmx_l2c_tadx_tag {
 		uint64_t valid:1;
 		uint64_t dirty:1;
 		uint64_t lock:1;
+#else
+		uint64_t lock:1;
+		uint64_t dirty:1;
+		uint64_t valid:1;
+		uint64_t use:1;
+		uint64_t reserved_4_16:13;
+		uint64_t tag:19;
+		uint64_t reserved_36_39:4;
+		uint64_t ecc:6;
+		uint64_t reserved_46_63:18;
+#endif
 	} s;
+	struct cvmx_l2c_tadx_tag_s cn61xx;
 	struct cvmx_l2c_tadx_tag_s cn63xx;
 	struct cvmx_l2c_tadx_tag_s cn63xxp1;
+	struct cvmx_l2c_tadx_tag_s cn66xx;
+	struct cvmx_l2c_tadx_tag_s cn68xx;
+	struct cvmx_l2c_tadx_tag_s cn68xxp1;
+	struct cvmx_l2c_tadx_tag_s cnf71xx;
 };
 
 union cvmx_l2c_ver_id {
 	uint64_t u64;
 	struct cvmx_l2c_ver_id_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mask:64;
+#else
+		uint64_t mask:64;
+#endif
 	} s;
+	struct cvmx_l2c_ver_id_s cn61xx;
 	struct cvmx_l2c_ver_id_s cn63xx;
 	struct cvmx_l2c_ver_id_s cn63xxp1;
+	struct cvmx_l2c_ver_id_s cn66xx;
+	struct cvmx_l2c_ver_id_s cn68xx;
+	struct cvmx_l2c_ver_id_s cn68xxp1;
+	struct cvmx_l2c_ver_id_s cnf71xx;
 };
 
 union cvmx_l2c_ver_iob {
 	uint64_t u64;
 	struct cvmx_l2c_ver_iob_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_2_63:62;
+		uint64_t mask:2;
+#else
+		uint64_t mask:2;
+		uint64_t reserved_2_63:62;
+#endif
+	} s;
+	struct cvmx_l2c_ver_iob_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t mask:1;
-	} s;
-	struct cvmx_l2c_ver_iob_s cn63xx;
-	struct cvmx_l2c_ver_iob_s cn63xxp1;
+#else
+		uint64_t mask:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_ver_iob_cn61xx cn63xx;
+	struct cvmx_l2c_ver_iob_cn61xx cn63xxp1;
+	struct cvmx_l2c_ver_iob_cn61xx cn66xx;
+	struct cvmx_l2c_ver_iob_s cn68xx;
+	struct cvmx_l2c_ver_iob_s cn68xxp1;
+	struct cvmx_l2c_ver_iob_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_ver_msc {
 	uint64_t u64;
 	struct cvmx_l2c_ver_msc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t invl2:1;
 		uint64_t dwb:1;
+#else
+		uint64_t dwb:1;
+		uint64_t invl2:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
+	struct cvmx_l2c_ver_msc_s cn61xx;
 	struct cvmx_l2c_ver_msc_s cn63xx;
+	struct cvmx_l2c_ver_msc_s cn66xx;
+	struct cvmx_l2c_ver_msc_s cn68xx;
+	struct cvmx_l2c_ver_msc_s cn68xxp1;
+	struct cvmx_l2c_ver_msc_s cnf71xx;
 };
 
 union cvmx_l2c_ver_pp {
 	uint64_t u64;
 	struct cvmx_l2c_ver_pp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t mask:32;
+#else
+		uint64_t mask:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_l2c_ver_pp_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t mask:4;
+#else
+		uint64_t mask:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} cn61xx;
+	struct cvmx_l2c_ver_pp_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t mask:6;
-	} s;
-	struct cvmx_l2c_ver_pp_s cn63xx;
-	struct cvmx_l2c_ver_pp_s cn63xxp1;
+#else
+		uint64_t mask:6;
+		uint64_t reserved_6_63:58;
+#endif
+	} cn63xx;
+	struct cvmx_l2c_ver_pp_cn63xx cn63xxp1;
+	struct cvmx_l2c_ver_pp_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_10_63:54;
+		uint64_t mask:10;
+#else
+		uint64_t mask:10;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn66xx;
+	struct cvmx_l2c_ver_pp_s cn68xx;
+	struct cvmx_l2c_ver_pp_s cn68xxp1;
+	struct cvmx_l2c_ver_pp_cn61xx cnf71xx;
 };
 
 union cvmx_l2c_virtid_iobx {
 	uint64_t u64;
 	struct cvmx_l2c_virtid_iobx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t dwbid:6;
 		uint64_t reserved_6_7:2;
 		uint64_t id:6;
+#else
+		uint64_t id:6;
+		uint64_t reserved_6_7:2;
+		uint64_t dwbid:6;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
+	struct cvmx_l2c_virtid_iobx_s cn61xx;
 	struct cvmx_l2c_virtid_iobx_s cn63xx;
 	struct cvmx_l2c_virtid_iobx_s cn63xxp1;
+	struct cvmx_l2c_virtid_iobx_s cn66xx;
+	struct cvmx_l2c_virtid_iobx_s cn68xx;
+	struct cvmx_l2c_virtid_iobx_s cn68xxp1;
+	struct cvmx_l2c_virtid_iobx_s cnf71xx;
 };
 
 union cvmx_l2c_virtid_ppx {
 	uint64_t u64;
 	struct cvmx_l2c_virtid_ppx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t id:6;
+#else
+		uint64_t id:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
+	struct cvmx_l2c_virtid_ppx_s cn61xx;
 	struct cvmx_l2c_virtid_ppx_s cn63xx;
 	struct cvmx_l2c_virtid_ppx_s cn63xxp1;
+	struct cvmx_l2c_virtid_ppx_s cn66xx;
+	struct cvmx_l2c_virtid_ppx_s cn68xx;
+	struct cvmx_l2c_virtid_ppx_s cn68xxp1;
+	struct cvmx_l2c_virtid_ppx_s cnf71xx;
 };
 
 union cvmx_l2c_vrt_ctl {
 	uint64_t u64;
 	struct cvmx_l2c_vrt_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t ooberr:1;
 		uint64_t reserved_7_7:1;
 		uint64_t memsz:3;
 		uint64_t numid:3;
 		uint64_t enable:1;
+#else
+		uint64_t enable:1;
+		uint64_t numid:3;
+		uint64_t memsz:3;
+		uint64_t reserved_7_7:1;
+		uint64_t ooberr:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
+	struct cvmx_l2c_vrt_ctl_s cn61xx;
 	struct cvmx_l2c_vrt_ctl_s cn63xx;
 	struct cvmx_l2c_vrt_ctl_s cn63xxp1;
+	struct cvmx_l2c_vrt_ctl_s cn66xx;
+	struct cvmx_l2c_vrt_ctl_s cn68xx;
+	struct cvmx_l2c_vrt_ctl_s cn68xxp1;
+	struct cvmx_l2c_vrt_ctl_s cnf71xx;
 };
 
 union cvmx_l2c_vrt_memx {
 	uint64_t u64;
 	struct cvmx_l2c_vrt_memx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t parity:4;
 		uint64_t data:32;
+#else
+		uint64_t data:32;
+		uint64_t parity:4;
+		uint64_t reserved_36_63:28;
+#endif
 	} s;
+	struct cvmx_l2c_vrt_memx_s cn61xx;
 	struct cvmx_l2c_vrt_memx_s cn63xx;
 	struct cvmx_l2c_vrt_memx_s cn63xxp1;
+	struct cvmx_l2c_vrt_memx_s cn66xx;
+	struct cvmx_l2c_vrt_memx_s cn68xx;
+	struct cvmx_l2c_vrt_memx_s cn68xxp1;
+	struct cvmx_l2c_vrt_memx_s cnf71xx;
 };
 
 union cvmx_l2c_wpar_iobx {
 	uint64_t u64;
 	struct cvmx_l2c_wpar_iobx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t mask:16;
+#else
+		uint64_t mask:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
+	struct cvmx_l2c_wpar_iobx_s cn61xx;
 	struct cvmx_l2c_wpar_iobx_s cn63xx;
 	struct cvmx_l2c_wpar_iobx_s cn63xxp1;
+	struct cvmx_l2c_wpar_iobx_s cn66xx;
+	struct cvmx_l2c_wpar_iobx_s cn68xx;
+	struct cvmx_l2c_wpar_iobx_s cn68xxp1;
+	struct cvmx_l2c_wpar_iobx_s cnf71xx;
 };
 
 union cvmx_l2c_wpar_ppx {
 	uint64_t u64;
 	struct cvmx_l2c_wpar_ppx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t mask:16;
+#else
+		uint64_t mask:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
+	struct cvmx_l2c_wpar_ppx_s cn61xx;
 	struct cvmx_l2c_wpar_ppx_s cn63xx;
 	struct cvmx_l2c_wpar_ppx_s cn63xxp1;
+	struct cvmx_l2c_wpar_ppx_s cn66xx;
+	struct cvmx_l2c_wpar_ppx_s cn68xx;
+	struct cvmx_l2c_wpar_ppx_s cn68xxp1;
+	struct cvmx_l2c_wpar_ppx_s cnf71xx;
 };
 
 union cvmx_l2c_xmcx_pfc {
 	uint64_t u64;
 	struct cvmx_l2c_xmcx_pfc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t count:64;
+#else
 		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_xmcx_pfc_s cn61xx;
 	struct cvmx_l2c_xmcx_pfc_s cn63xx;
 	struct cvmx_l2c_xmcx_pfc_s cn63xxp1;
+	struct cvmx_l2c_xmcx_pfc_s cn66xx;
+	struct cvmx_l2c_xmcx_pfc_s cn68xx;
+	struct cvmx_l2c_xmcx_pfc_s cn68xxp1;
+	struct cvmx_l2c_xmcx_pfc_s cnf71xx;
 };
 
 union cvmx_l2c_xmc_cmd {
 	uint64_t u64;
 	struct cvmx_l2c_xmc_cmd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t inuse:1;
 		uint64_t cmd:6;
 		uint64_t reserved_38_56:19;
 		uint64_t addr:38;
+#else
+		uint64_t addr:38;
+		uint64_t reserved_38_56:19;
+		uint64_t cmd:6;
+		uint64_t inuse:1;
+#endif
 	} s;
+	struct cvmx_l2c_xmc_cmd_s cn61xx;
 	struct cvmx_l2c_xmc_cmd_s cn63xx;
 	struct cvmx_l2c_xmc_cmd_s cn63xxp1;
+	struct cvmx_l2c_xmc_cmd_s cn66xx;
+	struct cvmx_l2c_xmc_cmd_s cn68xx;
+	struct cvmx_l2c_xmc_cmd_s cn68xxp1;
+	struct cvmx_l2c_xmc_cmd_s cnf71xx;
 };
 
 union cvmx_l2c_xmdx_pfc {
 	uint64_t u64;
 	struct cvmx_l2c_xmdx_pfc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t count:64;
+#else
+		uint64_t count:64;
+#endif
 	} s;
+	struct cvmx_l2c_xmdx_pfc_s cn61xx;
 	struct cvmx_l2c_xmdx_pfc_s cn63xx;
 	struct cvmx_l2c_xmdx_pfc_s cn63xxp1;
+	struct cvmx_l2c_xmdx_pfc_s cn66xx;
+	struct cvmx_l2c_xmdx_pfc_s cn68xx;
+	struct cvmx_l2c_xmdx_pfc_s cn68xxp1;
+	struct cvmx_l2c_xmdx_pfc_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-l2d-defs.h b/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
index 60543e0e77f..11a45621563 100644
--- a/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-l2d-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -44,9 +44,15 @@
 union cvmx_l2d_bst0 {
 	uint64_t u64;
 	struct cvmx_l2d_bst0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_35_63:29;
 		uint64_t ftl:1;
 		uint64_t q0stat:34;
+#else
+		uint64_t q0stat:34;
+		uint64_t ftl:1;
+		uint64_t reserved_35_63:29;
+#endif
 	} s;
 	struct cvmx_l2d_bst0_s cn30xx;
 	struct cvmx_l2d_bst0_s cn31xx;
@@ -64,8 +70,13 @@ union cvmx_l2d_bst0 {
 union cvmx_l2d_bst1 {
 	uint64_t u64;
 	struct cvmx_l2d_bst1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t q1stat:34;
+#else
+		uint64_t q1stat:34;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_l2d_bst1_s cn30xx;
 	struct cvmx_l2d_bst1_s cn31xx;
@@ -83,8 +94,13 @@ union cvmx_l2d_bst1 {
 union cvmx_l2d_bst2 {
 	uint64_t u64;
 	struct cvmx_l2d_bst2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t q2stat:34;
+#else
+		uint64_t q2stat:34;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_l2d_bst2_s cn30xx;
 	struct cvmx_l2d_bst2_s cn31xx;
@@ -102,8 +118,13 @@ union cvmx_l2d_bst2 {
 union cvmx_l2d_bst3 {
 	uint64_t u64;
 	struct cvmx_l2d_bst3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t q3stat:34;
+#else
+		uint64_t q3stat:34;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_l2d_bst3_s cn30xx;
 	struct cvmx_l2d_bst3_s cn31xx;
@@ -121,6 +142,7 @@ union cvmx_l2d_bst3 {
 union cvmx_l2d_err {
 	uint64_t u64;
 	struct cvmx_l2d_err_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t bmhclsel:1;
 		uint64_t ded_err:1;
@@ -128,6 +150,15 @@ union cvmx_l2d_err {
 		uint64_t ded_intena:1;
 		uint64_t sec_intena:1;
 		uint64_t ecc_ena:1;
+#else
+		uint64_t ecc_ena:1;
+		uint64_t sec_intena:1;
+		uint64_t ded_intena:1;
+		uint64_t sec_err:1;
+		uint64_t ded_err:1;
+		uint64_t bmhclsel:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_l2d_err_s cn30xx;
 	struct cvmx_l2d_err_s cn31xx;
@@ -145,48 +176,97 @@ union cvmx_l2d_err {
 union cvmx_l2d_fadr {
 	uint64_t u64;
 	struct cvmx_l2d_fadr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t fadru:1;
 		uint64_t fowmsk:4;
 		uint64_t fset:3;
 		uint64_t fadr:11;
+#else
+		uint64_t fadr:11;
+		uint64_t fset:3;
+		uint64_t fowmsk:4;
+		uint64_t fadru:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} s;
 	struct cvmx_l2d_fadr_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t fowmsk:4;
 		uint64_t reserved_13_13:1;
 		uint64_t fset:2;
 		uint64_t reserved_9_10:2;
 		uint64_t fadr:9;
+#else
+		uint64_t fadr:9;
+		uint64_t reserved_9_10:2;
+		uint64_t fset:2;
+		uint64_t reserved_13_13:1;
+		uint64_t fowmsk:4;
+		uint64_t reserved_18_63:46;
+#endif
 	} cn30xx;
 	struct cvmx_l2d_fadr_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t fowmsk:4;
 		uint64_t reserved_13_13:1;
 		uint64_t fset:2;
 		uint64_t reserved_10_10:1;
 		uint64_t fadr:10;
+#else
+		uint64_t fadr:10;
+		uint64_t reserved_10_10:1;
+		uint64_t fset:2;
+		uint64_t reserved_13_13:1;
+		uint64_t fowmsk:4;
+		uint64_t reserved_18_63:46;
+#endif
 	} cn31xx;
 	struct cvmx_l2d_fadr_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t fowmsk:4;
 		uint64_t fset:3;
 		uint64_t fadr:11;
+#else
+		uint64_t fadr:11;
+		uint64_t fset:3;
+		uint64_t fowmsk:4;
+		uint64_t reserved_18_63:46;
+#endif
 	} cn38xx;
 	struct cvmx_l2d_fadr_cn38xx cn38xxp2;
 	struct cvmx_l2d_fadr_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t fowmsk:4;
 		uint64_t fset:3;
 		uint64_t reserved_8_10:3;
 		uint64_t fadr:8;
+#else
+		uint64_t fadr:8;
+		uint64_t reserved_8_10:3;
+		uint64_t fset:3;
+		uint64_t fowmsk:4;
+		uint64_t reserved_18_63:46;
+#endif
 	} cn50xx;
 	struct cvmx_l2d_fadr_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t fowmsk:4;
 		uint64_t fset:3;
 		uint64_t reserved_10_10:1;
 		uint64_t fadr:10;
+#else
+		uint64_t fadr:10;
+		uint64_t reserved_10_10:1;
+		uint64_t fset:3;
+		uint64_t fowmsk:4;
+		uint64_t reserved_18_63:46;
+#endif
 	} cn52xx;
 	struct cvmx_l2d_fadr_cn52xx cn52xxp1;
 	struct cvmx_l2d_fadr_s cn56xx;
@@ -198,9 +278,15 @@ union cvmx_l2d_fadr {
 union cvmx_l2d_fsyn0 {
 	uint64_t u64;
 	struct cvmx_l2d_fsyn0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t fsyn_ow1:10;
 		uint64_t fsyn_ow0:10;
+#else
+		uint64_t fsyn_ow0:10;
+		uint64_t fsyn_ow1:10;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_l2d_fsyn0_s cn30xx;
 	struct cvmx_l2d_fsyn0_s cn31xx;
@@ -218,9 +304,15 @@ union cvmx_l2d_fsyn0 {
 union cvmx_l2d_fsyn1 {
 	uint64_t u64;
 	struct cvmx_l2d_fsyn1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t fsyn_ow3:10;
 		uint64_t fsyn_ow2:10;
+#else
+		uint64_t fsyn_ow2:10;
+		uint64_t fsyn_ow3:10;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_l2d_fsyn1_s cn30xx;
 	struct cvmx_l2d_fsyn1_s cn31xx;
@@ -238,8 +330,13 @@ union cvmx_l2d_fsyn1 {
 union cvmx_l2d_fus0 {
 	uint64_t u64;
 	struct cvmx_l2d_fus0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t q0fus:34;
+#else
+		uint64_t q0fus:34;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_l2d_fus0_s cn30xx;
 	struct cvmx_l2d_fus0_s cn31xx;
@@ -257,8 +354,13 @@ union cvmx_l2d_fus0 {
 union cvmx_l2d_fus1 {
 	uint64_t u64;
 	struct cvmx_l2d_fus1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t q1fus:34;
+#else
+		uint64_t q1fus:34;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_l2d_fus1_s cn30xx;
 	struct cvmx_l2d_fus1_s cn31xx;
@@ -276,8 +378,13 @@ union cvmx_l2d_fus1 {
 union cvmx_l2d_fus2 {
 	uint64_t u64;
 	struct cvmx_l2d_fus2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t q2fus:34;
+#else
+		uint64_t q2fus:34;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_l2d_fus2_s cn30xx;
 	struct cvmx_l2d_fus2_s cn31xx;
@@ -295,61 +402,123 @@ union cvmx_l2d_fus2 {
 union cvmx_l2d_fus3 {
 	uint64_t u64;
 	struct cvmx_l2d_fus3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t ema_ctl:3;
 		uint64_t reserved_34_36:3;
 		uint64_t q3fus:34;
+#else
+		uint64_t q3fus:34;
+		uint64_t reserved_34_36:3;
+		uint64_t ema_ctl:3;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_l2d_fus3_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_35_63:29;
 		uint64_t crip_64k:1;
 		uint64_t q3fus:34;
+#else
+		uint64_t q3fus:34;
+		uint64_t crip_64k:1;
+		uint64_t reserved_35_63:29;
+#endif
 	} cn30xx;
 	struct cvmx_l2d_fus3_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_35_63:29;
 		uint64_t crip_128k:1;
 		uint64_t q3fus:34;
+#else
+		uint64_t q3fus:34;
+		uint64_t crip_128k:1;
+		uint64_t reserved_35_63:29;
+#endif
 	} cn31xx;
 	struct cvmx_l2d_fus3_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t crip_256k:1;
 		uint64_t crip_512k:1;
 		uint64_t q3fus:34;
+#else
+		uint64_t q3fus:34;
+		uint64_t crip_512k:1;
+		uint64_t crip_256k:1;
+		uint64_t reserved_36_63:28;
+#endif
 	} cn38xx;
 	struct cvmx_l2d_fus3_cn38xx cn38xxp2;
 	struct cvmx_l2d_fus3_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t ema_ctl:3;
 		uint64_t reserved_36_36:1;
 		uint64_t crip_32k:1;
 		uint64_t crip_64k:1;
 		uint64_t q3fus:34;
+#else
+		uint64_t q3fus:34;
+		uint64_t crip_64k:1;
+		uint64_t crip_32k:1;
+		uint64_t reserved_36_36:1;
+		uint64_t ema_ctl:3;
+		uint64_t reserved_40_63:24;
+#endif
 	} cn50xx;
 	struct cvmx_l2d_fus3_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t ema_ctl:3;
 		uint64_t reserved_36_36:1;
 		uint64_t crip_128k:1;
 		uint64_t crip_256k:1;
 		uint64_t q3fus:34;
+#else
+		uint64_t q3fus:34;
+		uint64_t crip_256k:1;
+		uint64_t crip_128k:1;
+		uint64_t reserved_36_36:1;
+		uint64_t ema_ctl:3;
+		uint64_t reserved_40_63:24;
+#endif
 	} cn52xx;
 	struct cvmx_l2d_fus3_cn52xx cn52xxp1;
 	struct cvmx_l2d_fus3_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t ema_ctl:3;
 		uint64_t reserved_36_36:1;
 		uint64_t crip_512k:1;
 		uint64_t crip_1024k:1;
 		uint64_t q3fus:34;
+#else
+		uint64_t q3fus:34;
+		uint64_t crip_1024k:1;
+		uint64_t crip_512k:1;
+		uint64_t reserved_36_36:1;
+		uint64_t ema_ctl:3;
+		uint64_t reserved_40_63:24;
+#endif
 	} cn56xx;
 	struct cvmx_l2d_fus3_cn56xx cn56xxp1;
 	struct cvmx_l2d_fus3_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_39_63:25;
 		uint64_t ema_ctl:2;
 		uint64_t reserved_36_36:1;
 		uint64_t crip_512k:1;
 		uint64_t crip_1024k:1;
 		uint64_t q3fus:34;
+#else
+		uint64_t q3fus:34;
+		uint64_t crip_1024k:1;
+		uint64_t crip_512k:1;
+		uint64_t reserved_36_36:1;
+		uint64_t ema_ctl:2;
+		uint64_t reserved_39_63:25;
+#endif
 	} cn58xx;
 	struct cvmx_l2d_fus3_cn58xx cn58xxp1;
 };
diff --git a/arch/mips/include/asm/octeon/cvmx-l2t-defs.h b/arch/mips/include/asm/octeon/cvmx-l2t-defs.h
index 873968f55ee..83ce22c080e 100644
--- a/arch/mips/include/asm/octeon/cvmx-l2t-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-l2t-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -33,6 +33,7 @@
 union cvmx_l2t_err {
 	uint64_t u64;
 	struct cvmx_l2t_err_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t fadru:1;
 		uint64_t lck_intena2:1;
@@ -47,8 +48,25 @@ union cvmx_l2t_err {
 		uint64_t ded_intena:1;
 		uint64_t sec_intena:1;
 		uint64_t ecc_ena:1;
+#else
+		uint64_t ecc_ena:1;
+		uint64_t sec_intena:1;
+		uint64_t ded_intena:1;
+		uint64_t sec_err:1;
+		uint64_t ded_err:1;
+		uint64_t fsyn:6;
+		uint64_t fadr:10;
+		uint64_t fset:3;
+		uint64_t lckerr:1;
+		uint64_t lck_intena:1;
+		uint64_t lckerr2:1;
+		uint64_t lck_intena2:1;
+		uint64_t fadru:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_l2t_err_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t lck_intena2:1;
 		uint64_t lckerr2:1;
@@ -64,8 +82,26 @@ union cvmx_l2t_err {
 		uint64_t ded_intena:1;
 		uint64_t sec_intena:1;
 		uint64_t ecc_ena:1;
+#else
+		uint64_t ecc_ena:1;
+		uint64_t sec_intena:1;
+		uint64_t ded_intena:1;
+		uint64_t sec_err:1;
+		uint64_t ded_err:1;
+		uint64_t fsyn:6;
+		uint64_t fadr:8;
+		uint64_t reserved_19_20:2;
+		uint64_t fset:2;
+		uint64_t reserved_23_23:1;
+		uint64_t lckerr:1;
+		uint64_t lck_intena:1;
+		uint64_t lckerr2:1;
+		uint64_t lck_intena2:1;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn30xx;
 	struct cvmx_l2t_err_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t lck_intena2:1;
 		uint64_t lckerr2:1;
@@ -81,8 +117,26 @@ union cvmx_l2t_err {
 		uint64_t ded_intena:1;
 		uint64_t sec_intena:1;
 		uint64_t ecc_ena:1;
+#else
+		uint64_t ecc_ena:1;
+		uint64_t sec_intena:1;
+		uint64_t ded_intena:1;
+		uint64_t sec_err:1;
+		uint64_t ded_err:1;
+		uint64_t fsyn:6;
+		uint64_t fadr:9;
+		uint64_t reserved_20_20:1;
+		uint64_t fset:2;
+		uint64_t reserved_23_23:1;
+		uint64_t lckerr:1;
+		uint64_t lck_intena:1;
+		uint64_t lckerr2:1;
+		uint64_t lck_intena2:1;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn31xx;
 	struct cvmx_l2t_err_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t lck_intena2:1;
 		uint64_t lckerr2:1;
@@ -96,9 +150,25 @@ union cvmx_l2t_err {
 		uint64_t ded_intena:1;
 		uint64_t sec_intena:1;
 		uint64_t ecc_ena:1;
+#else
+		uint64_t ecc_ena:1;
+		uint64_t sec_intena:1;
+		uint64_t ded_intena:1;
+		uint64_t sec_err:1;
+		uint64_t ded_err:1;
+		uint64_t fsyn:6;
+		uint64_t fadr:10;
+		uint64_t fset:3;
+		uint64_t lckerr:1;
+		uint64_t lck_intena:1;
+		uint64_t lckerr2:1;
+		uint64_t lck_intena2:1;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn38xx;
 	struct cvmx_l2t_err_cn38xx cn38xxp2;
 	struct cvmx_l2t_err_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t lck_intena2:1;
 		uint64_t lckerr2:1;
@@ -113,8 +183,25 @@ union cvmx_l2t_err {
 		uint64_t ded_intena:1;
 		uint64_t sec_intena:1;
 		uint64_t ecc_ena:1;
+#else
+		uint64_t ecc_ena:1;
+		uint64_t sec_intena:1;
+		uint64_t ded_intena:1;
+		uint64_t sec_err:1;
+		uint64_t ded_err:1;
+		uint64_t fsyn:6;
+		uint64_t fadr:7;
+		uint64_t reserved_18_20:3;
+		uint64_t fset:3;
+		uint64_t lckerr:1;
+		uint64_t lck_intena:1;
+		uint64_t lckerr2:1;
+		uint64_t lck_intena2:1;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn50xx;
 	struct cvmx_l2t_err_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t lck_intena2:1;
 		uint64_t lckerr2:1;
@@ -129,6 +216,22 @@ union cvmx_l2t_err {
 		uint64_t ded_intena:1;
 		uint64_t sec_intena:1;
 		uint64_t ecc_ena:1;
+#else
+		uint64_t ecc_ena:1;
+		uint64_t sec_intena:1;
+		uint64_t ded_intena:1;
+		uint64_t sec_err:1;
+		uint64_t ded_err:1;
+		uint64_t fsyn:6;
+		uint64_t fadr:9;
+		uint64_t reserved_20_20:1;
+		uint64_t fset:3;
+		uint64_t lckerr:1;
+		uint64_t lck_intena:1;
+		uint64_t lckerr2:1;
+		uint64_t lck_intena2:1;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn52xx;
 	struct cvmx_l2t_err_cn52xx cn52xxp1;
 	struct cvmx_l2t_err_s cn56xx;
diff --git a/arch/mips/include/asm/octeon/cvmx-led-defs.h b/arch/mips/include/asm/octeon/cvmx-led-defs.h
index e25173bb8bb..d36d42b8307 100644
--- a/arch/mips/include/asm/octeon/cvmx-led-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-led-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -45,8 +45,13 @@
 union cvmx_led_blink {
 	uint64_t u64;
 	struct cvmx_led_blink_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t rate:8;
+#else
+		uint64_t rate:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_led_blink_s cn38xx;
 	struct cvmx_led_blink_s cn38xxp2;
@@ -59,8 +64,13 @@ union cvmx_led_blink {
 union cvmx_led_clk_phase {
 	uint64_t u64;
 	struct cvmx_led_clk_phase_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t phase:7;
+#else
+		uint64_t phase:7;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_led_clk_phase_s cn38xx;
 	struct cvmx_led_clk_phase_s cn38xxp2;
@@ -73,8 +83,13 @@ union cvmx_led_clk_phase {
 union cvmx_led_cylon {
 	uint64_t u64;
 	struct cvmx_led_cylon_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t rate:16;
+#else
+		uint64_t rate:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_led_cylon_s cn38xx;
 	struct cvmx_led_cylon_s cn38xxp2;
@@ -87,8 +102,13 @@ union cvmx_led_cylon {
 union cvmx_led_dbg {
 	uint64_t u64;
 	struct cvmx_led_dbg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t dbg_en:1;
+#else
+		uint64_t dbg_en:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_led_dbg_s cn38xx;
 	struct cvmx_led_dbg_s cn38xxp2;
@@ -101,8 +121,13 @@ union cvmx_led_dbg {
 union cvmx_led_en {
 	uint64_t u64;
 	struct cvmx_led_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_led_en_s cn38xx;
 	struct cvmx_led_en_s cn38xxp2;
@@ -115,8 +140,13 @@ union cvmx_led_en {
 union cvmx_led_polarity {
 	uint64_t u64;
 	struct cvmx_led_polarity_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t polarity:1;
+#else
+		uint64_t polarity:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_led_polarity_s cn38xx;
 	struct cvmx_led_polarity_s cn38xxp2;
@@ -129,8 +159,13 @@ union cvmx_led_polarity {
 union cvmx_led_prt {
 	uint64_t u64;
 	struct cvmx_led_prt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t prt_en:8;
+#else
+		uint64_t prt_en:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_led_prt_s cn38xx;
 	struct cvmx_led_prt_s cn38xxp2;
@@ -143,8 +178,13 @@ union cvmx_led_prt {
 union cvmx_led_prt_fmt {
 	uint64_t u64;
 	struct cvmx_led_prt_fmt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t format:4;
+#else
+		uint64_t format:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_led_prt_fmt_s cn38xx;
 	struct cvmx_led_prt_fmt_s cn38xxp2;
@@ -157,8 +197,13 @@ union cvmx_led_prt_fmt {
 union cvmx_led_prt_statusx {
 	uint64_t u64;
 	struct cvmx_led_prt_statusx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t status:6;
+#else
+		uint64_t status:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_led_prt_statusx_s cn38xx;
 	struct cvmx_led_prt_statusx_s cn38xxp2;
@@ -171,8 +216,13 @@ union cvmx_led_prt_statusx {
 union cvmx_led_udd_cntx {
 	uint64_t u64;
 	struct cvmx_led_udd_cntx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t cnt:6;
+#else
+		uint64_t cnt:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_led_udd_cntx_s cn38xx;
 	struct cvmx_led_udd_cntx_s cn38xxp2;
@@ -185,8 +235,13 @@ union cvmx_led_udd_cntx {
 union cvmx_led_udd_datx {
 	uint64_t u64;
 	struct cvmx_led_udd_datx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t dat:32;
+#else
+		uint64_t dat:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_led_udd_datx_s cn38xx;
 	struct cvmx_led_udd_datx_s cn38xxp2;
@@ -199,8 +254,13 @@ union cvmx_led_udd_datx {
 union cvmx_led_udd_dat_clrx {
 	uint64_t u64;
 	struct cvmx_led_udd_dat_clrx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t clr:32;
+#else
+		uint64_t clr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_led_udd_dat_clrx_s cn38xx;
 	struct cvmx_led_udd_dat_clrx_s cn38xxp2;
@@ -213,8 +273,13 @@ union cvmx_led_udd_dat_clrx {
 union cvmx_led_udd_dat_setx {
 	uint64_t u64;
 	struct cvmx_led_udd_dat_setx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t set:32;
+#else
+		uint64_t set:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_led_udd_dat_setx_s cn38xx;
 	struct cvmx_led_udd_dat_setx_s cn38xxp2;
diff --git a/arch/mips/include/asm/octeon/cvmx-mio-defs.h b/arch/mips/include/asm/octeon/cvmx-mio-defs.h
index b1774126736..bb0ae338a46 100644
--- a/arch/mips/include/asm/octeon/cvmx-mio-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-mio-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -94,6 +94,7 @@
 #define CVMX_MIO_PTP_CLOCK_HI (CVMX_ADD_IO_SEG(0x0001070000000F10ull))
 #define CVMX_MIO_PTP_CLOCK_LO (CVMX_ADD_IO_SEG(0x0001070000000F08ull))
 #define CVMX_MIO_PTP_EVT_CNT (CVMX_ADD_IO_SEG(0x0001070000000F28ull))
+#define CVMX_MIO_PTP_PHY_1PPS_IN (CVMX_ADD_IO_SEG(0x0001070000000F70ull))
 #define CVMX_MIO_PTP_PPS_HI_INCR (CVMX_ADD_IO_SEG(0x0001070000000F60ull))
 #define CVMX_MIO_PTP_PPS_LO_INCR (CVMX_ADD_IO_SEG(0x0001070000000F68ull))
 #define CVMX_MIO_PTP_PPS_THRESH_HI (CVMX_ADD_IO_SEG(0x0001070000000F58ull))
@@ -166,24 +167,44 @@
 union cvmx_mio_boot_bist_stat {
 	uint64_t u64;
 	struct cvmx_mio_boot_bist_stat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_mio_boot_bist_stat_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t ncbo_1:1;
 		uint64_t ncbo_0:1;
 		uint64_t loc:1;
 		uint64_t ncbi:1;
+#else
+		uint64_t ncbi:1;
+		uint64_t loc:1;
+		uint64_t ncbo_0:1;
+		uint64_t ncbo_1:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn30xx;
 	struct cvmx_mio_boot_bist_stat_cn30xx cn31xx;
 	struct cvmx_mio_boot_bist_stat_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t ncbo_0:1;
 		uint64_t loc:1;
 		uint64_t ncbi:1;
+#else
+		uint64_t ncbi:1;
+		uint64_t loc:1;
+		uint64_t ncbo_0:1;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn38xx;
 	struct cvmx_mio_boot_bist_stat_cn38xx cn38xxp2;
 	struct cvmx_mio_boot_bist_stat_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t pcm_1:1;
 		uint64_t pcm_0:1;
@@ -191,72 +212,132 @@ union cvmx_mio_boot_bist_stat {
 		uint64_t ncbo_0:1;
 		uint64_t loc:1;
 		uint64_t ncbi:1;
+#else
+		uint64_t ncbi:1;
+		uint64_t loc:1;
+		uint64_t ncbo_0:1;
+		uint64_t ncbo_1:1;
+		uint64_t pcm_0:1;
+		uint64_t pcm_1:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn50xx;
 	struct cvmx_mio_boot_bist_stat_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t ndf:2;
 		uint64_t ncbo_0:1;
 		uint64_t dma:1;
 		uint64_t loc:1;
 		uint64_t ncbi:1;
+#else
+		uint64_t ncbi:1;
+		uint64_t loc:1;
+		uint64_t dma:1;
+		uint64_t ncbo_0:1;
+		uint64_t ndf:2;
+		uint64_t reserved_6_63:58;
+#endif
 	} cn52xx;
 	struct cvmx_mio_boot_bist_stat_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t ncbo_0:1;
 		uint64_t dma:1;
 		uint64_t loc:1;
 		uint64_t ncbi:1;
+#else
+		uint64_t ncbi:1;
+		uint64_t loc:1;
+		uint64_t dma:1;
+		uint64_t ncbo_0:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn52xxp1;
 	struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xx;
 	struct cvmx_mio_boot_bist_stat_cn52xxp1 cn56xxp1;
 	struct cvmx_mio_boot_bist_stat_cn38xx cn58xx;
 	struct cvmx_mio_boot_bist_stat_cn38xx cn58xxp1;
 	struct cvmx_mio_boot_bist_stat_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t stat:12;
+#else
+		uint64_t stat:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn61xx;
 	struct cvmx_mio_boot_bist_stat_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t stat:9;
+#else
+		uint64_t stat:9;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn63xx;
 	struct cvmx_mio_boot_bist_stat_cn63xx cn63xxp1;
 	struct cvmx_mio_boot_bist_stat_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t stat:10;
+#else
+		uint64_t stat:10;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn66xx;
 	struct cvmx_mio_boot_bist_stat_cn66xx cn68xx;
 	struct cvmx_mio_boot_bist_stat_cn66xx cn68xxp1;
+	struct cvmx_mio_boot_bist_stat_cn61xx cnf71xx;
 };
 
 union cvmx_mio_boot_comp {
 	uint64_t u64;
 	struct cvmx_mio_boot_comp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_mio_boot_comp_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t pctl:5;
 		uint64_t nctl:5;
+#else
+		uint64_t nctl:5;
+		uint64_t pctl:5;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn50xx;
 	struct cvmx_mio_boot_comp_cn50xx cn52xx;
 	struct cvmx_mio_boot_comp_cn50xx cn52xxp1;
 	struct cvmx_mio_boot_comp_cn50xx cn56xx;
 	struct cvmx_mio_boot_comp_cn50xx cn56xxp1;
 	struct cvmx_mio_boot_comp_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t pctl:6;
 		uint64_t nctl:6;
+#else
+		uint64_t nctl:6;
+		uint64_t pctl:6;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn61xx;
 	struct cvmx_mio_boot_comp_cn61xx cn63xx;
 	struct cvmx_mio_boot_comp_cn61xx cn63xxp1;
 	struct cvmx_mio_boot_comp_cn61xx cn66xx;
 	struct cvmx_mio_boot_comp_cn61xx cn68xx;
 	struct cvmx_mio_boot_comp_cn61xx cn68xxp1;
+	struct cvmx_mio_boot_comp_cn61xx cnf71xx;
 };
 
 union cvmx_mio_boot_dma_cfgx {
 	uint64_t u64;
 	struct cvmx_mio_boot_dma_cfgx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t en:1;
 		uint64_t rw:1;
 		uint64_t clr:1;
@@ -267,6 +348,18 @@ union cvmx_mio_boot_dma_cfgx {
 		uint64_t endian:1;
 		uint64_t size:20;
 		uint64_t adr:36;
+#else
+		uint64_t adr:36;
+		uint64_t size:20;
+		uint64_t endian:1;
+		uint64_t swap8:1;
+		uint64_t swap16:1;
+		uint64_t swap32:1;
+		uint64_t reserved_60_60:1;
+		uint64_t clr:1;
+		uint64_t rw:1;
+		uint64_t en:1;
+#endif
 	} s;
 	struct cvmx_mio_boot_dma_cfgx_s cn52xx;
 	struct cvmx_mio_boot_dma_cfgx_s cn52xxp1;
@@ -278,14 +371,21 @@ union cvmx_mio_boot_dma_cfgx {
 	struct cvmx_mio_boot_dma_cfgx_s cn66xx;
 	struct cvmx_mio_boot_dma_cfgx_s cn68xx;
 	struct cvmx_mio_boot_dma_cfgx_s cn68xxp1;
+	struct cvmx_mio_boot_dma_cfgx_s cnf71xx;
 };
 
 union cvmx_mio_boot_dma_intx {
 	uint64_t u64;
 	struct cvmx_mio_boot_dma_intx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t dmarq:1;
 		uint64_t done:1;
+#else
+		uint64_t done:1;
+		uint64_t dmarq:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_mio_boot_dma_intx_s cn52xx;
 	struct cvmx_mio_boot_dma_intx_s cn52xxp1;
@@ -297,14 +397,21 @@ union cvmx_mio_boot_dma_intx {
 	struct cvmx_mio_boot_dma_intx_s cn66xx;
 	struct cvmx_mio_boot_dma_intx_s cn68xx;
 	struct cvmx_mio_boot_dma_intx_s cn68xxp1;
+	struct cvmx_mio_boot_dma_intx_s cnf71xx;
 };
 
 union cvmx_mio_boot_dma_int_enx {
 	uint64_t u64;
 	struct cvmx_mio_boot_dma_int_enx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t dmarq:1;
 		uint64_t done:1;
+#else
+		uint64_t done:1;
+		uint64_t dmarq:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_mio_boot_dma_int_enx_s cn52xx;
 	struct cvmx_mio_boot_dma_int_enx_s cn52xxp1;
@@ -316,11 +423,13 @@ union cvmx_mio_boot_dma_int_enx {
 	struct cvmx_mio_boot_dma_int_enx_s cn66xx;
 	struct cvmx_mio_boot_dma_int_enx_s cn68xx;
 	struct cvmx_mio_boot_dma_int_enx_s cn68xxp1;
+	struct cvmx_mio_boot_dma_int_enx_s cnf71xx;
 };
 
 union cvmx_mio_boot_dma_timx {
 	uint64_t u64;
 	struct cvmx_mio_boot_dma_timx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t dmack_pi:1;
 		uint64_t dmarq_pi:1;
 		uint64_t tim_mult:2;
@@ -336,6 +445,23 @@ union cvmx_mio_boot_dma_timx {
 		uint64_t oe_a:6;
 		uint64_t dmack_s:6;
 		uint64_t dmarq:6;
+#else
+		uint64_t dmarq:6;
+		uint64_t dmack_s:6;
+		uint64_t oe_a:6;
+		uint64_t oe_n:6;
+		uint64_t we_a:6;
+		uint64_t we_n:6;
+		uint64_t dmack_h:6;
+		uint64_t pause:6;
+		uint64_t reserved_48_54:7;
+		uint64_t width:1;
+		uint64_t ddr:1;
+		uint64_t rd_dly:3;
+		uint64_t tim_mult:2;
+		uint64_t dmarq_pi:1;
+		uint64_t dmack_pi:1;
+#endif
 	} s;
 	struct cvmx_mio_boot_dma_timx_s cn52xx;
 	struct cvmx_mio_boot_dma_timx_s cn52xxp1;
@@ -347,14 +473,21 @@ union cvmx_mio_boot_dma_timx {
 	struct cvmx_mio_boot_dma_timx_s cn66xx;
 	struct cvmx_mio_boot_dma_timx_s cn68xx;
 	struct cvmx_mio_boot_dma_timx_s cn68xxp1;
+	struct cvmx_mio_boot_dma_timx_s cnf71xx;
 };
 
 union cvmx_mio_boot_err {
 	uint64_t u64;
 	struct cvmx_mio_boot_err_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t wait_err:1;
 		uint64_t adr_err:1;
+#else
+		uint64_t adr_err:1;
+		uint64_t wait_err:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_mio_boot_err_s cn30xx;
 	struct cvmx_mio_boot_err_s cn31xx;
@@ -373,14 +506,21 @@ union cvmx_mio_boot_err {
 	struct cvmx_mio_boot_err_s cn66xx;
 	struct cvmx_mio_boot_err_s cn68xx;
 	struct cvmx_mio_boot_err_s cn68xxp1;
+	struct cvmx_mio_boot_err_s cnf71xx;
 };
 
 union cvmx_mio_boot_int {
 	uint64_t u64;
 	struct cvmx_mio_boot_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t wait_int:1;
 		uint64_t adr_int:1;
+#else
+		uint64_t adr_int:1;
+		uint64_t wait_int:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_mio_boot_int_s cn30xx;
 	struct cvmx_mio_boot_int_s cn31xx;
@@ -399,14 +539,21 @@ union cvmx_mio_boot_int {
 	struct cvmx_mio_boot_int_s cn66xx;
 	struct cvmx_mio_boot_int_s cn68xx;
 	struct cvmx_mio_boot_int_s cn68xxp1;
+	struct cvmx_mio_boot_int_s cnf71xx;
 };
 
 union cvmx_mio_boot_loc_adr {
 	uint64_t u64;
 	struct cvmx_mio_boot_loc_adr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t adr:5;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t adr:5;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_boot_loc_adr_s cn30xx;
 	struct cvmx_mio_boot_loc_adr_s cn31xx;
@@ -425,16 +572,25 @@ union cvmx_mio_boot_loc_adr {
 	struct cvmx_mio_boot_loc_adr_s cn66xx;
 	struct cvmx_mio_boot_loc_adr_s cn68xx;
 	struct cvmx_mio_boot_loc_adr_s cn68xxp1;
+	struct cvmx_mio_boot_loc_adr_s cnf71xx;
 };
 
 union cvmx_mio_boot_loc_cfgx {
 	uint64_t u64;
 	struct cvmx_mio_boot_loc_cfgx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t en:1;
 		uint64_t reserved_28_30:3;
 		uint64_t base:25;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t base:25;
+		uint64_t reserved_28_30:3;
+		uint64_t en:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_mio_boot_loc_cfgx_s cn30xx;
 	struct cvmx_mio_boot_loc_cfgx_s cn31xx;
@@ -453,12 +609,17 @@ union cvmx_mio_boot_loc_cfgx {
 	struct cvmx_mio_boot_loc_cfgx_s cn66xx;
 	struct cvmx_mio_boot_loc_cfgx_s cn68xx;
 	struct cvmx_mio_boot_loc_cfgx_s cn68xxp1;
+	struct cvmx_mio_boot_loc_cfgx_s cnf71xx;
 };
 
 union cvmx_mio_boot_loc_dat {
 	uint64_t u64;
 	struct cvmx_mio_boot_loc_dat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:64;
+#else
+		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_mio_boot_loc_dat_s cn30xx;
 	struct cvmx_mio_boot_loc_dat_s cn31xx;
@@ -477,11 +638,13 @@ union cvmx_mio_boot_loc_dat {
 	struct cvmx_mio_boot_loc_dat_s cn66xx;
 	struct cvmx_mio_boot_loc_dat_s cn68xx;
 	struct cvmx_mio_boot_loc_dat_s cn68xxp1;
+	struct cvmx_mio_boot_loc_dat_s cnf71xx;
 };
 
 union cvmx_mio_boot_pin_defs {
 	uint64_t u64;
 	struct cvmx_mio_boot_pin_defs_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t user1:16;
 		uint64_t ale:1;
@@ -492,8 +655,21 @@ union cvmx_mio_boot_pin_defs {
 		uint64_t term:2;
 		uint64_t nand:1;
 		uint64_t user0:8;
+#else
+		uint64_t user0:8;
+		uint64_t nand:1;
+		uint64_t term:2;
+		uint64_t dmack_p0:1;
+		uint64_t dmack_p1:1;
+		uint64_t dmack_p2:1;
+		uint64_t width:1;
+		uint64_t ale:1;
+		uint64_t user1:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_mio_boot_pin_defs_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t ale:1;
 		uint64_t width:1;
@@ -503,8 +679,20 @@ union cvmx_mio_boot_pin_defs {
 		uint64_t term:2;
 		uint64_t nand:1;
 		uint64_t reserved_0_7:8;
+#else
+		uint64_t reserved_0_7:8;
+		uint64_t nand:1;
+		uint64_t term:2;
+		uint64_t dmack_p0:1;
+		uint64_t dmack_p1:1;
+		uint64_t reserved_13_13:1;
+		uint64_t width:1;
+		uint64_t ale:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn52xx;
 	struct cvmx_mio_boot_pin_defs_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t ale:1;
 		uint64_t width:1;
@@ -513,8 +701,19 @@ union cvmx_mio_boot_pin_defs {
 		uint64_t dmack_p0:1;
 		uint64_t term:2;
 		uint64_t reserved_0_8:9;
+#else
+		uint64_t reserved_0_8:9;
+		uint64_t term:2;
+		uint64_t dmack_p0:1;
+		uint64_t dmack_p1:1;
+		uint64_t dmack_p2:1;
+		uint64_t width:1;
+		uint64_t ale:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn56xx;
 	struct cvmx_mio_boot_pin_defs_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t user1:16;
 		uint64_t ale:1;
@@ -525,17 +724,31 @@ union cvmx_mio_boot_pin_defs {
 		uint64_t term:2;
 		uint64_t nand:1;
 		uint64_t user0:8;
+#else
+		uint64_t user0:8;
+		uint64_t nand:1;
+		uint64_t term:2;
+		uint64_t dmack_p0:1;
+		uint64_t dmack_p1:1;
+		uint64_t reserved_13_13:1;
+		uint64_t width:1;
+		uint64_t ale:1;
+		uint64_t user1:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn61xx;
 	struct cvmx_mio_boot_pin_defs_cn52xx cn63xx;
 	struct cvmx_mio_boot_pin_defs_cn52xx cn63xxp1;
 	struct cvmx_mio_boot_pin_defs_cn52xx cn66xx;
 	struct cvmx_mio_boot_pin_defs_cn52xx cn68xx;
 	struct cvmx_mio_boot_pin_defs_cn52xx cn68xxp1;
+	struct cvmx_mio_boot_pin_defs_cn61xx cnf71xx;
 };
 
 union cvmx_mio_boot_reg_cfgx {
 	uint64_t u64;
 	struct cvmx_mio_boot_reg_cfgx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t dmack:2;
 		uint64_t tim_mult:2;
@@ -549,8 +762,24 @@ union cvmx_mio_boot_reg_cfgx {
 		uint64_t width:1;
 		uint64_t size:12;
 		uint64_t base:16;
+#else
+		uint64_t base:16;
+		uint64_t size:12;
+		uint64_t width:1;
+		uint64_t ale:1;
+		uint64_t orbit:1;
+		uint64_t en:1;
+		uint64_t oe_ext:2;
+		uint64_t we_ext:2;
+		uint64_t sam:1;
+		uint64_t rd_dly:3;
+		uint64_t tim_mult:2;
+		uint64_t dmack:2;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_mio_boot_reg_cfgx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t sam:1;
 		uint64_t we_ext:2;
@@ -561,18 +790,40 @@ union cvmx_mio_boot_reg_cfgx {
 		uint64_t width:1;
 		uint64_t size:12;
 		uint64_t base:16;
+#else
+		uint64_t base:16;
+		uint64_t size:12;
+		uint64_t width:1;
+		uint64_t ale:1;
+		uint64_t orbit:1;
+		uint64_t en:1;
+		uint64_t oe_ext:2;
+		uint64_t we_ext:2;
+		uint64_t sam:1;
+		uint64_t reserved_37_63:27;
+#endif
 	} cn30xx;
 	struct cvmx_mio_boot_reg_cfgx_cn30xx cn31xx;
 	struct cvmx_mio_boot_reg_cfgx_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t en:1;
 		uint64_t orbit:1;
 		uint64_t reserved_28_29:2;
 		uint64_t size:12;
 		uint64_t base:16;
+#else
+		uint64_t base:16;
+		uint64_t size:12;
+		uint64_t reserved_28_29:2;
+		uint64_t orbit:1;
+		uint64_t en:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn38xx;
 	struct cvmx_mio_boot_reg_cfgx_cn38xx cn38xxp2;
 	struct cvmx_mio_boot_reg_cfgx_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_42_63:22;
 		uint64_t tim_mult:2;
 		uint64_t rd_dly:3;
@@ -585,6 +836,20 @@ union cvmx_mio_boot_reg_cfgx {
 		uint64_t width:1;
 		uint64_t size:12;
 		uint64_t base:16;
+#else
+		uint64_t base:16;
+		uint64_t size:12;
+		uint64_t width:1;
+		uint64_t ale:1;
+		uint64_t orbit:1;
+		uint64_t en:1;
+		uint64_t oe_ext:2;
+		uint64_t we_ext:2;
+		uint64_t sam:1;
+		uint64_t rd_dly:3;
+		uint64_t tim_mult:2;
+		uint64_t reserved_42_63:22;
+#endif
 	} cn50xx;
 	struct cvmx_mio_boot_reg_cfgx_s cn52xx;
 	struct cvmx_mio_boot_reg_cfgx_s cn52xxp1;
@@ -598,11 +863,13 @@ union cvmx_mio_boot_reg_cfgx {
 	struct cvmx_mio_boot_reg_cfgx_s cn66xx;
 	struct cvmx_mio_boot_reg_cfgx_s cn68xx;
 	struct cvmx_mio_boot_reg_cfgx_s cn68xxp1;
+	struct cvmx_mio_boot_reg_cfgx_s cnf71xx;
 };
 
 union cvmx_mio_boot_reg_timx {
 	uint64_t u64;
 	struct cvmx_mio_boot_reg_timx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t pagem:1;
 		uint64_t waitm:1;
 		uint64_t pages:2;
@@ -616,10 +883,26 @@ union cvmx_mio_boot_reg_timx {
 		uint64_t oe:6;
 		uint64_t ce:6;
 		uint64_t adr:6;
+#else
+		uint64_t adr:6;
+		uint64_t ce:6;
+		uint64_t oe:6;
+		uint64_t we:6;
+		uint64_t rd_hld:6;
+		uint64_t wr_hld:6;
+		uint64_t pause:6;
+		uint64_t wait:6;
+		uint64_t page:6;
+		uint64_t ale:6;
+		uint64_t pages:2;
+		uint64_t waitm:1;
+		uint64_t pagem:1;
+#endif
 	} s;
 	struct cvmx_mio_boot_reg_timx_s cn30xx;
 	struct cvmx_mio_boot_reg_timx_s cn31xx;
 	struct cvmx_mio_boot_reg_timx_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t pagem:1;
 		uint64_t waitm:1;
 		uint64_t pages:2;
@@ -633,6 +916,21 @@ union cvmx_mio_boot_reg_timx {
 		uint64_t oe:6;
 		uint64_t ce:6;
 		uint64_t adr:6;
+#else
+		uint64_t adr:6;
+		uint64_t ce:6;
+		uint64_t oe:6;
+		uint64_t we:6;
+		uint64_t rd_hld:6;
+		uint64_t wr_hld:6;
+		uint64_t pause:6;
+		uint64_t wait:6;
+		uint64_t page:6;
+		uint64_t reserved_54_59:6;
+		uint64_t pages:2;
+		uint64_t waitm:1;
+		uint64_t pagem:1;
+#endif
 	} cn38xx;
 	struct cvmx_mio_boot_reg_timx_cn38xx cn38xxp2;
 	struct cvmx_mio_boot_reg_timx_s cn50xx;
@@ -648,23 +946,40 @@ union cvmx_mio_boot_reg_timx {
 	struct cvmx_mio_boot_reg_timx_s cn66xx;
 	struct cvmx_mio_boot_reg_timx_s cn68xx;
 	struct cvmx_mio_boot_reg_timx_s cn68xxp1;
+	struct cvmx_mio_boot_reg_timx_s cnf71xx;
 };
 
 union cvmx_mio_boot_thr {
 	uint64_t u64;
 	struct cvmx_mio_boot_thr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_22_63:42;
 		uint64_t dma_thr:6;
 		uint64_t reserved_14_15:2;
 		uint64_t fif_cnt:6;
 		uint64_t reserved_6_7:2;
 		uint64_t fif_thr:6;
+#else
+		uint64_t fif_thr:6;
+		uint64_t reserved_6_7:2;
+		uint64_t fif_cnt:6;
+		uint64_t reserved_14_15:2;
+		uint64_t dma_thr:6;
+		uint64_t reserved_22_63:42;
+#endif
 	} s;
 	struct cvmx_mio_boot_thr_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t fif_cnt:6;
 		uint64_t reserved_6_7:2;
 		uint64_t fif_thr:6;
+#else
+		uint64_t fif_thr:6;
+		uint64_t reserved_6_7:2;
+		uint64_t fif_cnt:6;
+		uint64_t reserved_14_63:50;
+#endif
 	} cn30xx;
 	struct cvmx_mio_boot_thr_cn30xx cn31xx;
 	struct cvmx_mio_boot_thr_cn30xx cn38xx;
@@ -682,42 +997,66 @@ union cvmx_mio_boot_thr {
 	struct cvmx_mio_boot_thr_s cn66xx;
 	struct cvmx_mio_boot_thr_s cn68xx;
 	struct cvmx_mio_boot_thr_s cn68xxp1;
+	struct cvmx_mio_boot_thr_s cnf71xx;
 };
 
 union cvmx_mio_emm_buf_dat {
 	uint64_t u64;
 	struct cvmx_mio_emm_buf_dat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t dat:64;
+#else
+		uint64_t dat:64;
+#endif
 	} s;
 	struct cvmx_mio_emm_buf_dat_s cn61xx;
+	struct cvmx_mio_emm_buf_dat_s cnf71xx;
 };
 
 union cvmx_mio_emm_buf_idx {
 	uint64_t u64;
 	struct cvmx_mio_emm_buf_idx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t inc:1;
 		uint64_t reserved_7_15:9;
 		uint64_t buf_num:1;
 		uint64_t offset:6;
+#else
+		uint64_t offset:6;
+		uint64_t buf_num:1;
+		uint64_t reserved_7_15:9;
+		uint64_t inc:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_mio_emm_buf_idx_s cn61xx;
+	struct cvmx_mio_emm_buf_idx_s cnf71xx;
 };
 
 union cvmx_mio_emm_cfg {
 	uint64_t u64;
 	struct cvmx_mio_emm_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t boot_fail:1;
 		uint64_t reserved_4_15:12;
 		uint64_t bus_ena:4;
+#else
+		uint64_t bus_ena:4;
+		uint64_t reserved_4_15:12;
+		uint64_t boot_fail:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_mio_emm_cfg_s cn61xx;
+	struct cvmx_mio_emm_cfg_s cnf71xx;
 };
 
 union cvmx_mio_emm_cmd {
 	uint64_t u64;
 	struct cvmx_mio_emm_cmd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t bus_id:2;
 		uint64_t cmd_val:1;
@@ -729,13 +1068,28 @@ union cvmx_mio_emm_cmd {
 		uint64_t rtype_xor:3;
 		uint64_t cmd_idx:6;
 		uint64_t arg:32;
+#else
+		uint64_t arg:32;
+		uint64_t cmd_idx:6;
+		uint64_t rtype_xor:3;
+		uint64_t ctype_xor:2;
+		uint64_t reserved_43_48:6;
+		uint64_t offset:6;
+		uint64_t dbuf:1;
+		uint64_t reserved_56_58:3;
+		uint64_t cmd_val:1;
+		uint64_t bus_id:2;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_mio_emm_cmd_s cn61xx;
+	struct cvmx_mio_emm_cmd_s cnf71xx;
 };
 
 union cvmx_mio_emm_dma {
 	uint64_t u64;
 	struct cvmx_mio_emm_dma_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t bus_id:2;
 		uint64_t dma_val:1;
@@ -747,13 +1101,28 @@ union cvmx_mio_emm_dma {
 		uint64_t multi:1;
 		uint64_t block_cnt:16;
 		uint64_t card_addr:32;
+#else
+		uint64_t card_addr:32;
+		uint64_t block_cnt:16;
+		uint64_t multi:1;
+		uint64_t rw:1;
+		uint64_t rel_wr:1;
+		uint64_t thres:6;
+		uint64_t dat_null:1;
+		uint64_t sector:1;
+		uint64_t dma_val:1;
+		uint64_t bus_id:2;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_mio_emm_dma_s cn61xx;
+	struct cvmx_mio_emm_dma_s cnf71xx;
 };
 
 union cvmx_mio_emm_int {
 	uint64_t u64;
 	struct cvmx_mio_emm_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t switch_err:1;
 		uint64_t switch_done:1;
@@ -762,13 +1131,25 @@ union cvmx_mio_emm_int {
 		uint64_t dma_done:1;
 		uint64_t cmd_done:1;
 		uint64_t buf_done:1;
+#else
+		uint64_t buf_done:1;
+		uint64_t cmd_done:1;
+		uint64_t dma_done:1;
+		uint64_t cmd_err:1;
+		uint64_t dma_err:1;
+		uint64_t switch_done:1;
+		uint64_t switch_err:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_mio_emm_int_s cn61xx;
+	struct cvmx_mio_emm_int_s cnf71xx;
 };
 
 union cvmx_mio_emm_int_en {
 	uint64_t u64;
 	struct cvmx_mio_emm_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t switch_err:1;
 		uint64_t switch_done:1;
@@ -777,13 +1158,25 @@ union cvmx_mio_emm_int_en {
 		uint64_t dma_done:1;
 		uint64_t cmd_done:1;
 		uint64_t buf_done:1;
+#else
+		uint64_t buf_done:1;
+		uint64_t cmd_done:1;
+		uint64_t dma_done:1;
+		uint64_t cmd_err:1;
+		uint64_t dma_err:1;
+		uint64_t switch_done:1;
+		uint64_t switch_err:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_mio_emm_int_en_s cn61xx;
+	struct cvmx_mio_emm_int_en_s cnf71xx;
 };
 
 union cvmx_mio_emm_modex {
 	uint64_t u64;
 	struct cvmx_mio_emm_modex_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t hs_timing:1;
 		uint64_t reserved_43_47:5;
@@ -792,38 +1185,66 @@ union cvmx_mio_emm_modex {
 		uint64_t power_class:4;
 		uint64_t clk_hi:16;
 		uint64_t clk_lo:16;
+#else
+		uint64_t clk_lo:16;
+		uint64_t clk_hi:16;
+		uint64_t power_class:4;
+		uint64_t reserved_36_39:4;
+		uint64_t bus_width:3;
+		uint64_t reserved_43_47:5;
+		uint64_t hs_timing:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} s;
 	struct cvmx_mio_emm_modex_s cn61xx;
+	struct cvmx_mio_emm_modex_s cnf71xx;
 };
 
 union cvmx_mio_emm_rca {
 	uint64_t u64;
 	struct cvmx_mio_emm_rca_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t card_rca:16;
+#else
+		uint64_t card_rca:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_mio_emm_rca_s cn61xx;
+	struct cvmx_mio_emm_rca_s cnf71xx;
 };
 
 union cvmx_mio_emm_rsp_hi {
 	uint64_t u64;
 	struct cvmx_mio_emm_rsp_hi_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t dat:64;
+#else
 		uint64_t dat:64;
+#endif
 	} s;
 	struct cvmx_mio_emm_rsp_hi_s cn61xx;
+	struct cvmx_mio_emm_rsp_hi_s cnf71xx;
 };
 
 union cvmx_mio_emm_rsp_lo {
 	uint64_t u64;
 	struct cvmx_mio_emm_rsp_lo_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t dat:64;
+#else
+		uint64_t dat:64;
+#endif
 	} s;
 	struct cvmx_mio_emm_rsp_lo_s cn61xx;
+	struct cvmx_mio_emm_rsp_lo_s cnf71xx;
 };
 
 union cvmx_mio_emm_rsp_sts {
 	uint64_t u64;
 	struct cvmx_mio_emm_rsp_sts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t bus_id:2;
 		uint64_t cmd_val:1;
@@ -849,33 +1270,76 @@ union cvmx_mio_emm_rsp_sts {
 		uint64_t cmd_type:2;
 		uint64_t cmd_idx:6;
 		uint64_t cmd_done:1;
+#else
+		uint64_t cmd_done:1;
+		uint64_t cmd_idx:6;
+		uint64_t cmd_type:2;
+		uint64_t rsp_type:3;
+		uint64_t rsp_val:1;
+		uint64_t rsp_bad_sts:1;
+		uint64_t rsp_crc_err:1;
+		uint64_t rsp_timeout:1;
+		uint64_t stp_val:1;
+		uint64_t stp_bad_sts:1;
+		uint64_t stp_crc_err:1;
+		uint64_t stp_timeout:1;
+		uint64_t rsp_busybit:1;
+		uint64_t blk_crc_err:1;
+		uint64_t blk_timeout:1;
+		uint64_t dbuf:1;
+		uint64_t reserved_24_27:4;
+		uint64_t dbuf_err:1;
+		uint64_t reserved_29_55:27;
+		uint64_t dma_pend:1;
+		uint64_t dma_val:1;
+		uint64_t switch_val:1;
+		uint64_t cmd_val:1;
+		uint64_t bus_id:2;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_mio_emm_rsp_sts_s cn61xx;
+	struct cvmx_mio_emm_rsp_sts_s cnf71xx;
 };
 
 union cvmx_mio_emm_sample {
 	uint64_t u64;
 	struct cvmx_mio_emm_sample_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_26_63:38;
 		uint64_t cmd_cnt:10;
 		uint64_t reserved_10_15:6;
 		uint64_t dat_cnt:10;
+#else
+		uint64_t dat_cnt:10;
+		uint64_t reserved_10_15:6;
+		uint64_t cmd_cnt:10;
+		uint64_t reserved_26_63:38;
+#endif
 	} s;
 	struct cvmx_mio_emm_sample_s cn61xx;
+	struct cvmx_mio_emm_sample_s cnf71xx;
 };
 
 union cvmx_mio_emm_sts_mask {
 	uint64_t u64;
 	struct cvmx_mio_emm_sts_mask_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t sts_msk:32;
+#else
+		uint64_t sts_msk:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_mio_emm_sts_mask_s cn61xx;
+	struct cvmx_mio_emm_sts_mask_s cnf71xx;
 };
 
 union cvmx_mio_emm_switch {
 	uint64_t u64;
 	struct cvmx_mio_emm_switch_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t bus_id:2;
 		uint64_t switch_exe:1;
@@ -890,23 +1354,50 @@ union cvmx_mio_emm_switch {
 		uint64_t power_class:4;
 		uint64_t clk_hi:16;
 		uint64_t clk_lo:16;
+#else
+		uint64_t clk_lo:16;
+		uint64_t clk_hi:16;
+		uint64_t power_class:4;
+		uint64_t reserved_36_39:4;
+		uint64_t bus_width:3;
+		uint64_t reserved_43_47:5;
+		uint64_t hs_timing:1;
+		uint64_t reserved_49_55:7;
+		uint64_t switch_err2:1;
+		uint64_t switch_err1:1;
+		uint64_t switch_err0:1;
+		uint64_t switch_exe:1;
+		uint64_t bus_id:2;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_mio_emm_switch_s cn61xx;
+	struct cvmx_mio_emm_switch_s cnf71xx;
 };
 
 union cvmx_mio_emm_wdog {
 	uint64_t u64;
 	struct cvmx_mio_emm_wdog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_26_63:38;
 		uint64_t clk_cnt:26;
+#else
+		uint64_t clk_cnt:26;
+		uint64_t reserved_26_63:38;
+#endif
 	} s;
 	struct cvmx_mio_emm_wdog_s cn61xx;
+	struct cvmx_mio_emm_wdog_s cnf71xx;
 };
 
 union cvmx_mio_fus_bnk_datx {
 	uint64_t u64;
 	struct cvmx_mio_fus_bnk_datx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t dat:64;
+#else
 		uint64_t dat:64;
+#endif
 	} s;
 	struct cvmx_mio_fus_bnk_datx_s cn50xx;
 	struct cvmx_mio_fus_bnk_datx_s cn52xx;
@@ -921,13 +1412,19 @@ union cvmx_mio_fus_bnk_datx {
 	struct cvmx_mio_fus_bnk_datx_s cn66xx;
 	struct cvmx_mio_fus_bnk_datx_s cn68xx;
 	struct cvmx_mio_fus_bnk_datx_s cn68xxp1;
+	struct cvmx_mio_fus_bnk_datx_s cnf71xx;
 };
 
 union cvmx_mio_fus_dat0 {
 	uint64_t u64;
 	struct cvmx_mio_fus_dat0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t man_info:32;
+#else
+		uint64_t man_info:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_mio_fus_dat0_s cn30xx;
 	struct cvmx_mio_fus_dat0_s cn31xx;
@@ -946,13 +1443,19 @@ union cvmx_mio_fus_dat0 {
 	struct cvmx_mio_fus_dat0_s cn66xx;
 	struct cvmx_mio_fus_dat0_s cn68xx;
 	struct cvmx_mio_fus_dat0_s cn68xxp1;
+	struct cvmx_mio_fus_dat0_s cnf71xx;
 };
 
 union cvmx_mio_fus_dat1 {
 	uint64_t u64;
 	struct cvmx_mio_fus_dat1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t man_info:32;
+#else
+		uint64_t man_info:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_mio_fus_dat1_s cn30xx;
 	struct cvmx_mio_fus_dat1_s cn31xx;
@@ -971,11 +1474,13 @@ union cvmx_mio_fus_dat1 {
 	struct cvmx_mio_fus_dat1_s cn66xx;
 	struct cvmx_mio_fus_dat1_s cn68xx;
 	struct cvmx_mio_fus_dat1_s cn68xxp1;
+	struct cvmx_mio_fus_dat1_s cnf71xx;
 };
 
 union cvmx_mio_fus_dat2 {
 	uint64_t u64;
 	struct cvmx_mio_fus_dat2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t fus118:1;
 		uint64_t rom_info:10;
@@ -992,8 +1497,27 @@ union cvmx_mio_fus_dat2 {
 		uint64_t bist_dis:1;
 		uint64_t chip_id:8;
 		uint64_t reserved_0_15:16;
+#else
+		uint64_t reserved_0_15:16;
+		uint64_t chip_id:8;
+		uint64_t bist_dis:1;
+		uint64_t rst_sht:1;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t nokasu:1;
+		uint64_t reserved_30_31:2;
+		uint64_t raid_en:1;
+		uint64_t fus318:1;
+		uint64_t dorm_crypto:1;
+		uint64_t power_limit:2;
+		uint64_t rom_info:10;
+		uint64_t fus118:1;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_mio_fus_dat2_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t nodfa_cp2:1;
 		uint64_t nomul:1;
@@ -1004,8 +1528,21 @@ union cvmx_mio_fus_dat2 {
 		uint64_t pll_off:4;
 		uint64_t reserved_1_11:11;
 		uint64_t pp_dis:1;
+#else
+		uint64_t pp_dis:1;
+		uint64_t reserved_1_11:11;
+		uint64_t pll_off:4;
+		uint64_t chip_id:8;
+		uint64_t bist_dis:1;
+		uint64_t rst_sht:1;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn30xx;
 	struct cvmx_mio_fus_dat2_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t nodfa_cp2:1;
 		uint64_t nomul:1;
@@ -1016,8 +1553,21 @@ union cvmx_mio_fus_dat2 {
 		uint64_t pll_off:4;
 		uint64_t reserved_2_11:10;
 		uint64_t pp_dis:2;
+#else
+		uint64_t pp_dis:2;
+		uint64_t reserved_2_11:10;
+		uint64_t pll_off:4;
+		uint64_t chip_id:8;
+		uint64_t bist_dis:1;
+		uint64_t rst_sht:1;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn31xx;
 	struct cvmx_mio_fus_dat2_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t nodfa_cp2:1;
 		uint64_t nomul:1;
@@ -1026,9 +1576,20 @@ union cvmx_mio_fus_dat2 {
 		uint64_t bist_dis:1;
 		uint64_t chip_id:8;
 		uint64_t pp_dis:16;
+#else
+		uint64_t pp_dis:16;
+		uint64_t chip_id:8;
+		uint64_t bist_dis:1;
+		uint64_t rst_sht:1;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn38xx;
 	struct cvmx_mio_fus_dat2_cn38xx cn38xxp2;
 	struct cvmx_mio_fus_dat2_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t fus318:1;
 		uint64_t raid_en:1;
@@ -1042,8 +1603,24 @@ union cvmx_mio_fus_dat2 {
 		uint64_t chip_id:8;
 		uint64_t reserved_2_15:14;
 		uint64_t pp_dis:2;
+#else
+		uint64_t pp_dis:2;
+		uint64_t reserved_2_15:14;
+		uint64_t chip_id:8;
+		uint64_t bist_dis:1;
+		uint64_t rst_sht:1;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t nokasu:1;
+		uint64_t reserved_30_31:2;
+		uint64_t raid_en:1;
+		uint64_t fus318:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn50xx;
 	struct cvmx_mio_fus_dat2_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t fus318:1;
 		uint64_t raid_en:1;
@@ -1057,9 +1634,25 @@ union cvmx_mio_fus_dat2 {
 		uint64_t chip_id:8;
 		uint64_t reserved_4_15:12;
 		uint64_t pp_dis:4;
+#else
+		uint64_t pp_dis:4;
+		uint64_t reserved_4_15:12;
+		uint64_t chip_id:8;
+		uint64_t bist_dis:1;
+		uint64_t rst_sht:1;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t nokasu:1;
+		uint64_t reserved_30_31:2;
+		uint64_t raid_en:1;
+		uint64_t fus318:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn52xx;
 	struct cvmx_mio_fus_dat2_cn52xx cn52xxp1;
 	struct cvmx_mio_fus_dat2_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t fus318:1;
 		uint64_t raid_en:1;
@@ -1073,9 +1666,25 @@ union cvmx_mio_fus_dat2 {
 		uint64_t chip_id:8;
 		uint64_t reserved_12_15:4;
 		uint64_t pp_dis:12;
+#else
+		uint64_t pp_dis:12;
+		uint64_t reserved_12_15:4;
+		uint64_t chip_id:8;
+		uint64_t bist_dis:1;
+		uint64_t rst_sht:1;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t nokasu:1;
+		uint64_t reserved_30_31:2;
+		uint64_t raid_en:1;
+		uint64_t fus318:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn56xx;
 	struct cvmx_mio_fus_dat2_cn56xx cn56xxp1;
 	struct cvmx_mio_fus_dat2_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_30_63:34;
 		uint64_t nokasu:1;
 		uint64_t nodfa_cp2:1;
@@ -1085,9 +1694,21 @@ union cvmx_mio_fus_dat2 {
 		uint64_t bist_dis:1;
 		uint64_t chip_id:8;
 		uint64_t pp_dis:16;
+#else
+		uint64_t pp_dis:16;
+		uint64_t chip_id:8;
+		uint64_t bist_dis:1;
+		uint64_t rst_sht:1;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t nokasu:1;
+		uint64_t reserved_30_63:34;
+#endif
 	} cn58xx;
 	struct cvmx_mio_fus_dat2_cn58xx cn58xxp1;
 	struct cvmx_mio_fus_dat2_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t fus118:1;
 		uint64_t rom_info:10;
@@ -1103,8 +1724,26 @@ union cvmx_mio_fus_dat2 {
 		uint64_t chip_id:8;
 		uint64_t reserved_4_15:12;
 		uint64_t pp_dis:4;
+#else
+		uint64_t pp_dis:4;
+		uint64_t reserved_4_15:12;
+		uint64_t chip_id:8;
+		uint64_t reserved_24_25:2;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t reserved_29_31:3;
+		uint64_t raid_en:1;
+		uint64_t fus318:1;
+		uint64_t dorm_crypto:1;
+		uint64_t power_limit:2;
+		uint64_t rom_info:10;
+		uint64_t fus118:1;
+		uint64_t reserved_48_63:16;
+#endif
 	} cn61xx;
 	struct cvmx_mio_fus_dat2_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_35_63:29;
 		uint64_t dorm_crypto:1;
 		uint64_t fus318:1;
@@ -1117,9 +1756,24 @@ union cvmx_mio_fus_dat2 {
 		uint64_t chip_id:8;
 		uint64_t reserved_6_15:10;
 		uint64_t pp_dis:6;
+#else
+		uint64_t pp_dis:6;
+		uint64_t reserved_6_15:10;
+		uint64_t chip_id:8;
+		uint64_t reserved_24_25:2;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t reserved_29_31:3;
+		uint64_t raid_en:1;
+		uint64_t fus318:1;
+		uint64_t dorm_crypto:1;
+		uint64_t reserved_35_63:29;
+#endif
 	} cn63xx;
 	struct cvmx_mio_fus_dat2_cn63xx cn63xxp1;
 	struct cvmx_mio_fus_dat2_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t fus118:1;
 		uint64_t rom_info:10;
@@ -1135,8 +1789,26 @@ union cvmx_mio_fus_dat2 {
 		uint64_t chip_id:8;
 		uint64_t reserved_10_15:6;
 		uint64_t pp_dis:10;
+#else
+		uint64_t pp_dis:10;
+		uint64_t reserved_10_15:6;
+		uint64_t chip_id:8;
+		uint64_t reserved_24_25:2;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t reserved_29_31:3;
+		uint64_t raid_en:1;
+		uint64_t fus318:1;
+		uint64_t dorm_crypto:1;
+		uint64_t power_limit:2;
+		uint64_t rom_info:10;
+		uint64_t fus118:1;
+		uint64_t reserved_48_63:16;
+#endif
 	} cn66xx;
 	struct cvmx_mio_fus_dat2_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t power_limit:2;
 		uint64_t dorm_crypto:1;
@@ -1149,13 +1821,29 @@ union cvmx_mio_fus_dat2 {
 		uint64_t reserved_24_25:2;
 		uint64_t chip_id:8;
 		uint64_t reserved_0_15:16;
+#else
+		uint64_t reserved_0_15:16;
+		uint64_t chip_id:8;
+		uint64_t reserved_24_25:2;
+		uint64_t nocrypto:1;
+		uint64_t nomul:1;
+		uint64_t nodfa_cp2:1;
+		uint64_t reserved_29_31:3;
+		uint64_t raid_en:1;
+		uint64_t fus318:1;
+		uint64_t dorm_crypto:1;
+		uint64_t power_limit:2;
+		uint64_t reserved_37_63:27;
+#endif
 	} cn68xx;
 	struct cvmx_mio_fus_dat2_cn68xx cn68xxp1;
+	struct cvmx_mio_fus_dat2_cn61xx cnf71xx;
 };
 
 union cvmx_mio_fus_dat3 {
 	uint64_t u64;
 	struct cvmx_mio_fus_dat3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_58_63:6;
 		uint64_t pll_ctl:10;
 		uint64_t dfa_info_dte:3;
@@ -1174,8 +1862,29 @@ union cvmx_mio_fus_dat3 {
 		uint64_t nozip:1;
 		uint64_t nodfa_dte:1;
 		uint64_t icache:24;
+#else
+		uint64_t icache:24;
+		uint64_t nodfa_dte:1;
+		uint64_t nozip:1;
+		uint64_t efus_ign:1;
+		uint64_t efus_lck:1;
+		uint64_t bar2_en:1;
+		uint64_t reserved_29_30:2;
+		uint64_t pll_div4:1;
+		uint64_t l2c_crip:3;
+		uint64_t pll_half_dis:1;
+		uint64_t efus_lck_man:1;
+		uint64_t efus_lck_rsv:1;
+		uint64_t ema:2;
+		uint64_t reserved_40_40:1;
+		uint64_t dfa_info_clm:4;
+		uint64_t dfa_info_dte:3;
+		uint64_t pll_ctl:10;
+		uint64_t reserved_58_63:6;
+#endif
 	} s;
 	struct cvmx_mio_fus_dat3_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t pll_div4:1;
 		uint64_t reserved_29_30:2;
@@ -1185,8 +1894,20 @@ union cvmx_mio_fus_dat3 {
 		uint64_t nozip:1;
 		uint64_t nodfa_dte:1;
 		uint64_t icache:24;
+#else
+		uint64_t icache:24;
+		uint64_t nodfa_dte:1;
+		uint64_t nozip:1;
+		uint64_t efus_ign:1;
+		uint64_t efus_lck:1;
+		uint64_t bar2_en:1;
+		uint64_t reserved_29_30:2;
+		uint64_t pll_div4:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn30xx;
 	struct cvmx_mio_fus_dat3_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t pll_div4:1;
 		uint64_t zip_crip:2;
@@ -1196,8 +1917,20 @@ union cvmx_mio_fus_dat3 {
 		uint64_t nozip:1;
 		uint64_t nodfa_dte:1;
 		uint64_t icache:24;
+#else
+		uint64_t icache:24;
+		uint64_t nodfa_dte:1;
+		uint64_t nozip:1;
+		uint64_t efus_ign:1;
+		uint64_t efus_lck:1;
+		uint64_t bar2_en:1;
+		uint64_t zip_crip:2;
+		uint64_t pll_div4:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn31xx;
 	struct cvmx_mio_fus_dat3_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t zip_crip:2;
 		uint64_t bar2_en:1;
@@ -1206,8 +1939,19 @@ union cvmx_mio_fus_dat3 {
 		uint64_t nozip:1;
 		uint64_t nodfa_dte:1;
 		uint64_t icache:24;
+#else
+		uint64_t icache:24;
+		uint64_t nodfa_dte:1;
+		uint64_t nozip:1;
+		uint64_t efus_ign:1;
+		uint64_t efus_lck:1;
+		uint64_t bar2_en:1;
+		uint64_t zip_crip:2;
+		uint64_t reserved_31_63:33;
+#endif
 	} cn38xx;
 	struct cvmx_mio_fus_dat3_cn38xxp2 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t bar2_en:1;
 		uint64_t efus_lck:1;
@@ -1215,6 +1959,15 @@ union cvmx_mio_fus_dat3 {
 		uint64_t nozip:1;
 		uint64_t nodfa_dte:1;
 		uint64_t icache:24;
+#else
+		uint64_t icache:24;
+		uint64_t nodfa_dte:1;
+		uint64_t nozip:1;
+		uint64_t efus_ign:1;
+		uint64_t efus_lck:1;
+		uint64_t bar2_en:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn38xxp2;
 	struct cvmx_mio_fus_dat3_cn38xx cn50xx;
 	struct cvmx_mio_fus_dat3_cn38xx cn52xx;
@@ -1224,6 +1977,7 @@ union cvmx_mio_fus_dat3 {
 	struct cvmx_mio_fus_dat3_cn38xx cn58xx;
 	struct cvmx_mio_fus_dat3_cn38xx cn58xxp1;
 	struct cvmx_mio_fus_dat3_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_58_63:6;
 		uint64_t pll_ctl:10;
 		uint64_t dfa_info_dte:3;
@@ -1242,21 +1996,49 @@ union cvmx_mio_fus_dat3 {
 		uint64_t nozip:1;
 		uint64_t nodfa_dte:1;
 		uint64_t reserved_0_23:24;
+#else
+		uint64_t reserved_0_23:24;
+		uint64_t nodfa_dte:1;
+		uint64_t nozip:1;
+		uint64_t efus_ign:1;
+		uint64_t efus_lck:1;
+		uint64_t bar2_en:1;
+		uint64_t zip_info:2;
+		uint64_t reserved_31_31:1;
+		uint64_t l2c_crip:3;
+		uint64_t pll_half_dis:1;
+		uint64_t efus_lck_man:1;
+		uint64_t efus_lck_rsv:1;
+		uint64_t ema:2;
+		uint64_t reserved_40_40:1;
+		uint64_t dfa_info_clm:4;
+		uint64_t dfa_info_dte:3;
+		uint64_t pll_ctl:10;
+		uint64_t reserved_58_63:6;
+#endif
 	} cn61xx;
 	struct cvmx_mio_fus_dat3_cn61xx cn63xx;
 	struct cvmx_mio_fus_dat3_cn61xx cn63xxp1;
 	struct cvmx_mio_fus_dat3_cn61xx cn66xx;
 	struct cvmx_mio_fus_dat3_cn61xx cn68xx;
 	struct cvmx_mio_fus_dat3_cn61xx cn68xxp1;
+	struct cvmx_mio_fus_dat3_cn61xx cnf71xx;
 };
 
 union cvmx_mio_fus_ema {
 	uint64_t u64;
 	struct cvmx_mio_fus_ema_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t eff_ema:3;
 		uint64_t reserved_3_3:1;
 		uint64_t ema:3;
+#else
+		uint64_t ema:3;
+		uint64_t reserved_3_3:1;
+		uint64_t eff_ema:3;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_mio_fus_ema_s cn50xx;
 	struct cvmx_mio_fus_ema_s cn52xx;
@@ -1264,8 +2046,13 @@ union cvmx_mio_fus_ema {
 	struct cvmx_mio_fus_ema_s cn56xx;
 	struct cvmx_mio_fus_ema_s cn56xxp1;
 	struct cvmx_mio_fus_ema_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t ema:2;
+#else
+		uint64_t ema:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn58xx;
 	struct cvmx_mio_fus_ema_cn58xx cn58xxp1;
 	struct cvmx_mio_fus_ema_s cn61xx;
@@ -1274,12 +2061,17 @@ union cvmx_mio_fus_ema {
 	struct cvmx_mio_fus_ema_s cn66xx;
 	struct cvmx_mio_fus_ema_s cn68xx;
 	struct cvmx_mio_fus_ema_s cn68xxp1;
+	struct cvmx_mio_fus_ema_s cnf71xx;
 };
 
 union cvmx_mio_fus_pdf {
 	uint64_t u64;
 	struct cvmx_mio_fus_pdf_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t pdf:64;
+#else
 		uint64_t pdf:64;
+#endif
 	} s;
 	struct cvmx_mio_fus_pdf_s cn50xx;
 	struct cvmx_mio_fus_pdf_s cn52xx;
@@ -1293,11 +2085,13 @@ union cvmx_mio_fus_pdf {
 	struct cvmx_mio_fus_pdf_s cn66xx;
 	struct cvmx_mio_fus_pdf_s cn68xx;
 	struct cvmx_mio_fus_pdf_s cn68xxp1;
+	struct cvmx_mio_fus_pdf_s cnf71xx;
 };
 
 union cvmx_mio_fus_pll {
 	uint64_t u64;
 	struct cvmx_mio_fus_pll_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t rclk_align_r:8;
 		uint64_t rclk_align_l:8;
@@ -1308,11 +2102,29 @@ union cvmx_mio_fus_pll {
 		uint64_t pnr_cout_sel:2;
 		uint64_t rfslip:1;
 		uint64_t fbslip:1;
+#else
+		uint64_t fbslip:1;
+		uint64_t rfslip:1;
+		uint64_t pnr_cout_sel:2;
+		uint64_t pnr_cout_rst:1;
+		uint64_t c_cout_sel:2;
+		uint64_t c_cout_rst:1;
+		uint64_t reserved_8_31:24;
+		uint64_t rclk_align_l:8;
+		uint64_t rclk_align_r:8;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_mio_fus_pll_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t rfslip:1;
 		uint64_t fbslip:1;
+#else
+		uint64_t fbslip:1;
+		uint64_t rfslip:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn50xx;
 	struct cvmx_mio_fus_pll_cn50xx cn52xx;
 	struct cvmx_mio_fus_pll_cn50xx cn52xxp1;
@@ -1321,6 +2133,7 @@ union cvmx_mio_fus_pll {
 	struct cvmx_mio_fus_pll_cn50xx cn58xx;
 	struct cvmx_mio_fus_pll_cn50xx cn58xxp1;
 	struct cvmx_mio_fus_pll_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t c_cout_rst:1;
 		uint64_t c_cout_sel:2;
@@ -1328,24 +2141,45 @@ union cvmx_mio_fus_pll {
 		uint64_t pnr_cout_sel:2;
 		uint64_t rfslip:1;
 		uint64_t fbslip:1;
+#else
+		uint64_t fbslip:1;
+		uint64_t rfslip:1;
+		uint64_t pnr_cout_sel:2;
+		uint64_t pnr_cout_rst:1;
+		uint64_t c_cout_sel:2;
+		uint64_t c_cout_rst:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} cn61xx;
 	struct cvmx_mio_fus_pll_cn61xx cn63xx;
 	struct cvmx_mio_fus_pll_cn61xx cn63xxp1;
 	struct cvmx_mio_fus_pll_cn61xx cn66xx;
 	struct cvmx_mio_fus_pll_s cn68xx;
 	struct cvmx_mio_fus_pll_s cn68xxp1;
+	struct cvmx_mio_fus_pll_cn61xx cnf71xx;
 };
 
 union cvmx_mio_fus_prog {
 	uint64_t u64;
 	struct cvmx_mio_fus_prog_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t soft:1;
 		uint64_t prog:1;
+#else
+		uint64_t prog:1;
+		uint64_t soft:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_mio_fus_prog_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t prog:1;
+#else
+		uint64_t prog:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn30xx;
 	struct cvmx_mio_fus_prog_cn30xx cn31xx;
 	struct cvmx_mio_fus_prog_cn30xx cn38xx;
@@ -1363,25 +2197,44 @@ union cvmx_mio_fus_prog {
 	struct cvmx_mio_fus_prog_s cn66xx;
 	struct cvmx_mio_fus_prog_s cn68xx;
 	struct cvmx_mio_fus_prog_s cn68xxp1;
+	struct cvmx_mio_fus_prog_s cnf71xx;
 };
 
 union cvmx_mio_fus_prog_times {
 	uint64_t u64;
 	struct cvmx_mio_fus_prog_times_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_35_63:29;
 		uint64_t vgate_pin:1;
 		uint64_t fsrc_pin:1;
 		uint64_t prog_pin:1;
 		uint64_t reserved_6_31:26;
 		uint64_t setup:6;
+#else
+		uint64_t setup:6;
+		uint64_t reserved_6_31:26;
+		uint64_t prog_pin:1;
+		uint64_t fsrc_pin:1;
+		uint64_t vgate_pin:1;
+		uint64_t reserved_35_63:29;
+#endif
 	} s;
 	struct cvmx_mio_fus_prog_times_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_33_63:31;
 		uint64_t prog_pin:1;
 		uint64_t out:8;
 		uint64_t sclk_lo:4;
 		uint64_t sclk_hi:12;
 		uint64_t setup:8;
+#else
+		uint64_t setup:8;
+		uint64_t sclk_hi:12;
+		uint64_t sclk_lo:4;
+		uint64_t out:8;
+		uint64_t prog_pin:1;
+		uint64_t reserved_33_63:31;
+#endif
 	} cn50xx;
 	struct cvmx_mio_fus_prog_times_cn50xx cn52xx;
 	struct cvmx_mio_fus_prog_times_cn50xx cn52xxp1;
@@ -1390,6 +2243,7 @@ union cvmx_mio_fus_prog_times {
 	struct cvmx_mio_fus_prog_times_cn50xx cn58xx;
 	struct cvmx_mio_fus_prog_times_cn50xx cn58xxp1;
 	struct cvmx_mio_fus_prog_times_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_35_63:29;
 		uint64_t vgate_pin:1;
 		uint64_t fsrc_pin:1;
@@ -1398,17 +2252,29 @@ union cvmx_mio_fus_prog_times {
 		uint64_t sclk_lo:4;
 		uint64_t sclk_hi:15;
 		uint64_t setup:6;
+#else
+		uint64_t setup:6;
+		uint64_t sclk_hi:15;
+		uint64_t sclk_lo:4;
+		uint64_t out:7;
+		uint64_t prog_pin:1;
+		uint64_t fsrc_pin:1;
+		uint64_t vgate_pin:1;
+		uint64_t reserved_35_63:29;
+#endif
 	} cn61xx;
 	struct cvmx_mio_fus_prog_times_cn61xx cn63xx;
 	struct cvmx_mio_fus_prog_times_cn61xx cn63xxp1;
 	struct cvmx_mio_fus_prog_times_cn61xx cn66xx;
 	struct cvmx_mio_fus_prog_times_cn61xx cn68xx;
 	struct cvmx_mio_fus_prog_times_cn61xx cn68xxp1;
+	struct cvmx_mio_fus_prog_times_cn61xx cnf71xx;
 };
 
 union cvmx_mio_fus_rcmd {
 	uint64_t u64;
 	struct cvmx_mio_fus_rcmd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t dat:8;
 		uint64_t reserved_13_15:3;
@@ -1416,8 +2282,18 @@ union cvmx_mio_fus_rcmd {
 		uint64_t reserved_9_11:3;
 		uint64_t efuse:1;
 		uint64_t addr:8;
+#else
+		uint64_t addr:8;
+		uint64_t efuse:1;
+		uint64_t reserved_9_11:3;
+		uint64_t pend:1;
+		uint64_t reserved_13_15:3;
+		uint64_t dat:8;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_mio_fus_rcmd_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t dat:8;
 		uint64_t reserved_13_15:3;
@@ -1426,6 +2302,16 @@ union cvmx_mio_fus_rcmd {
 		uint64_t efuse:1;
 		uint64_t reserved_7_7:1;
 		uint64_t addr:7;
+#else
+		uint64_t addr:7;
+		uint64_t reserved_7_7:1;
+		uint64_t efuse:1;
+		uint64_t reserved_9_11:3;
+		uint64_t pend:1;
+		uint64_t reserved_13_15:3;
+		uint64_t dat:8;
+		uint64_t reserved_24_63:40;
+#endif
 	} cn30xx;
 	struct cvmx_mio_fus_rcmd_cn30xx cn31xx;
 	struct cvmx_mio_fus_rcmd_cn30xx cn38xx;
@@ -1443,17 +2329,27 @@ union cvmx_mio_fus_rcmd {
 	struct cvmx_mio_fus_rcmd_s cn66xx;
 	struct cvmx_mio_fus_rcmd_s cn68xx;
 	struct cvmx_mio_fus_rcmd_s cn68xxp1;
+	struct cvmx_mio_fus_rcmd_s cnf71xx;
 };
 
 union cvmx_mio_fus_read_times {
 	uint64_t u64;
 	struct cvmx_mio_fus_read_times_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_26_63:38;
 		uint64_t sch:4;
 		uint64_t fsh:4;
 		uint64_t prh:4;
 		uint64_t sdh:4;
 		uint64_t setup:10;
+#else
+		uint64_t setup:10;
+		uint64_t sdh:4;
+		uint64_t prh:4;
+		uint64_t fsh:4;
+		uint64_t sch:4;
+		uint64_t reserved_26_63:38;
+#endif
 	} s;
 	struct cvmx_mio_fus_read_times_s cn61xx;
 	struct cvmx_mio_fus_read_times_s cn63xx;
@@ -1461,16 +2357,25 @@ union cvmx_mio_fus_read_times {
 	struct cvmx_mio_fus_read_times_s cn66xx;
 	struct cvmx_mio_fus_read_times_s cn68xx;
 	struct cvmx_mio_fus_read_times_s cn68xxp1;
+	struct cvmx_mio_fus_read_times_s cnf71xx;
 };
 
 union cvmx_mio_fus_repair_res0 {
 	uint64_t u64;
 	struct cvmx_mio_fus_repair_res0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_55_63:9;
 		uint64_t too_many:1;
 		uint64_t repair2:18;
 		uint64_t repair1:18;
 		uint64_t repair0:18;
+#else
+		uint64_t repair0:18;
+		uint64_t repair1:18;
+		uint64_t repair2:18;
+		uint64_t too_many:1;
+		uint64_t reserved_55_63:9;
+#endif
 	} s;
 	struct cvmx_mio_fus_repair_res0_s cn61xx;
 	struct cvmx_mio_fus_repair_res0_s cn63xx;
@@ -1478,15 +2383,23 @@ union cvmx_mio_fus_repair_res0 {
 	struct cvmx_mio_fus_repair_res0_s cn66xx;
 	struct cvmx_mio_fus_repair_res0_s cn68xx;
 	struct cvmx_mio_fus_repair_res0_s cn68xxp1;
+	struct cvmx_mio_fus_repair_res0_s cnf71xx;
 };
 
 union cvmx_mio_fus_repair_res1 {
 	uint64_t u64;
 	struct cvmx_mio_fus_repair_res1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_54_63:10;
 		uint64_t repair5:18;
 		uint64_t repair4:18;
 		uint64_t repair3:18;
+#else
+		uint64_t repair3:18;
+		uint64_t repair4:18;
+		uint64_t repair5:18;
+		uint64_t reserved_54_63:10;
+#endif
 	} s;
 	struct cvmx_mio_fus_repair_res1_s cn61xx;
 	struct cvmx_mio_fus_repair_res1_s cn63xx;
@@ -1494,13 +2407,19 @@ union cvmx_mio_fus_repair_res1 {
 	struct cvmx_mio_fus_repair_res1_s cn66xx;
 	struct cvmx_mio_fus_repair_res1_s cn68xx;
 	struct cvmx_mio_fus_repair_res1_s cn68xxp1;
+	struct cvmx_mio_fus_repair_res1_s cnf71xx;
 };
 
 union cvmx_mio_fus_repair_res2 {
 	uint64_t u64;
 	struct cvmx_mio_fus_repair_res2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t repair6:18;
+#else
+		uint64_t repair6:18;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_mio_fus_repair_res2_s cn61xx;
 	struct cvmx_mio_fus_repair_res2_s cn63xx;
@@ -1508,15 +2427,23 @@ union cvmx_mio_fus_repair_res2 {
 	struct cvmx_mio_fus_repair_res2_s cn66xx;
 	struct cvmx_mio_fus_repair_res2_s cn68xx;
 	struct cvmx_mio_fus_repair_res2_s cn68xxp1;
+	struct cvmx_mio_fus_repair_res2_s cnf71xx;
 };
 
 union cvmx_mio_fus_spr_repair_res {
 	uint64_t u64;
 	struct cvmx_mio_fus_spr_repair_res_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_42_63:22;
 		uint64_t repair2:14;
 		uint64_t repair1:14;
 		uint64_t repair0:14;
+#else
+		uint64_t repair0:14;
+		uint64_t repair1:14;
+		uint64_t repair2:14;
+		uint64_t reserved_42_63:22;
+#endif
 	} s;
 	struct cvmx_mio_fus_spr_repair_res_s cn30xx;
 	struct cvmx_mio_fus_spr_repair_res_s cn31xx;
@@ -1534,13 +2461,19 @@ union cvmx_mio_fus_spr_repair_res {
 	struct cvmx_mio_fus_spr_repair_res_s cn66xx;
 	struct cvmx_mio_fus_spr_repair_res_s cn68xx;
 	struct cvmx_mio_fus_spr_repair_res_s cn68xxp1;
+	struct cvmx_mio_fus_spr_repair_res_s cnf71xx;
 };
 
 union cvmx_mio_fus_spr_repair_sum {
 	uint64_t u64;
 	struct cvmx_mio_fus_spr_repair_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t too_many:1;
+#else
+		uint64_t too_many:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_fus_spr_repair_sum_s cn30xx;
 	struct cvmx_mio_fus_spr_repair_sum_s cn31xx;
@@ -1558,23 +2491,35 @@ union cvmx_mio_fus_spr_repair_sum {
 	struct cvmx_mio_fus_spr_repair_sum_s cn66xx;
 	struct cvmx_mio_fus_spr_repair_sum_s cn68xx;
 	struct cvmx_mio_fus_spr_repair_sum_s cn68xxp1;
+	struct cvmx_mio_fus_spr_repair_sum_s cnf71xx;
 };
 
 union cvmx_mio_fus_tgg {
 	uint64_t u64;
 	struct cvmx_mio_fus_tgg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t val:1;
 		uint64_t dat:63;
+#else
+		uint64_t dat:63;
+		uint64_t val:1;
+#endif
 	} s;
 	struct cvmx_mio_fus_tgg_s cn61xx;
 	struct cvmx_mio_fus_tgg_s cn66xx;
+	struct cvmx_mio_fus_tgg_s cnf71xx;
 };
 
 union cvmx_mio_fus_unlock {
 	uint64_t u64;
 	struct cvmx_mio_fus_unlock_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t key:24;
+#else
+		uint64_t key:24;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_mio_fus_unlock_s cn30xx;
 	struct cvmx_mio_fus_unlock_s cn31xx;
@@ -1583,20 +2528,35 @@ union cvmx_mio_fus_unlock {
 union cvmx_mio_fus_wadr {
 	uint64_t u64;
 	struct cvmx_mio_fus_wadr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t addr:10;
+#else
+		uint64_t addr:10;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_mio_fus_wadr_s cn30xx;
 	struct cvmx_mio_fus_wadr_s cn31xx;
 	struct cvmx_mio_fus_wadr_s cn38xx;
 	struct cvmx_mio_fus_wadr_s cn38xxp2;
 	struct cvmx_mio_fus_wadr_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t addr:2;
+#else
+		uint64_t addr:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn50xx;
 	struct cvmx_mio_fus_wadr_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t addr:3;
+#else
+		uint64_t addr:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn52xx;
 	struct cvmx_mio_fus_wadr_cn52xx cn52xxp1;
 	struct cvmx_mio_fus_wadr_cn52xx cn56xx;
@@ -1604,22 +2564,34 @@ union cvmx_mio_fus_wadr {
 	struct cvmx_mio_fus_wadr_cn50xx cn58xx;
 	struct cvmx_mio_fus_wadr_cn50xx cn58xxp1;
 	struct cvmx_mio_fus_wadr_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t addr:4;
+#else
+		uint64_t addr:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn61xx;
 	struct cvmx_mio_fus_wadr_cn61xx cn63xx;
 	struct cvmx_mio_fus_wadr_cn61xx cn63xxp1;
 	struct cvmx_mio_fus_wadr_cn61xx cn66xx;
 	struct cvmx_mio_fus_wadr_cn61xx cn68xx;
 	struct cvmx_mio_fus_wadr_cn61xx cn68xxp1;
+	struct cvmx_mio_fus_wadr_cn61xx cnf71xx;
 };
 
 union cvmx_mio_gpio_comp {
 	uint64_t u64;
 	struct cvmx_mio_gpio_comp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t pctl:6;
 		uint64_t nctl:6;
+#else
+		uint64_t nctl:6;
+		uint64_t pctl:6;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_mio_gpio_comp_s cn61xx;
 	struct cvmx_mio_gpio_comp_s cn63xx;
@@ -1627,11 +2599,13 @@ union cvmx_mio_gpio_comp {
 	struct cvmx_mio_gpio_comp_s cn66xx;
 	struct cvmx_mio_gpio_comp_s cn68xx;
 	struct cvmx_mio_gpio_comp_s cn68xxp1;
+	struct cvmx_mio_gpio_comp_s cnf71xx;
 };
 
 union cvmx_mio_ndf_dma_cfg {
 	uint64_t u64;
 	struct cvmx_mio_ndf_dma_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t en:1;
 		uint64_t rw:1;
 		uint64_t clr:1;
@@ -1642,6 +2616,18 @@ union cvmx_mio_ndf_dma_cfg {
 		uint64_t endian:1;
 		uint64_t size:20;
 		uint64_t adr:36;
+#else
+		uint64_t adr:36;
+		uint64_t size:20;
+		uint64_t endian:1;
+		uint64_t swap8:1;
+		uint64_t swap16:1;
+		uint64_t swap32:1;
+		uint64_t reserved_60_60:1;
+		uint64_t clr:1;
+		uint64_t rw:1;
+		uint64_t en:1;
+#endif
 	} s;
 	struct cvmx_mio_ndf_dma_cfg_s cn52xx;
 	struct cvmx_mio_ndf_dma_cfg_s cn61xx;
@@ -1650,13 +2636,19 @@ union cvmx_mio_ndf_dma_cfg {
 	struct cvmx_mio_ndf_dma_cfg_s cn66xx;
 	struct cvmx_mio_ndf_dma_cfg_s cn68xx;
 	struct cvmx_mio_ndf_dma_cfg_s cn68xxp1;
+	struct cvmx_mio_ndf_dma_cfg_s cnf71xx;
 };
 
 union cvmx_mio_ndf_dma_int {
 	uint64_t u64;
 	struct cvmx_mio_ndf_dma_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t done:1;
+#else
+		uint64_t done:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_ndf_dma_int_s cn52xx;
 	struct cvmx_mio_ndf_dma_int_s cn61xx;
@@ -1665,13 +2657,19 @@ union cvmx_mio_ndf_dma_int {
 	struct cvmx_mio_ndf_dma_int_s cn66xx;
 	struct cvmx_mio_ndf_dma_int_s cn68xx;
 	struct cvmx_mio_ndf_dma_int_s cn68xxp1;
+	struct cvmx_mio_ndf_dma_int_s cnf71xx;
 };
 
 union cvmx_mio_ndf_dma_int_en {
 	uint64_t u64;
 	struct cvmx_mio_ndf_dma_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t done:1;
+#else
+		uint64_t done:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_ndf_dma_int_en_s cn52xx;
 	struct cvmx_mio_ndf_dma_int_en_s cn61xx;
@@ -1680,13 +2678,19 @@ union cvmx_mio_ndf_dma_int_en {
 	struct cvmx_mio_ndf_dma_int_en_s cn66xx;
 	struct cvmx_mio_ndf_dma_int_en_s cn68xx;
 	struct cvmx_mio_ndf_dma_int_en_s cn68xxp1;
+	struct cvmx_mio_ndf_dma_int_en_s cnf71xx;
 };
 
 union cvmx_mio_pll_ctl {
 	uint64_t u64;
 	struct cvmx_mio_pll_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t bw_ctl:5;
+#else
+		uint64_t bw_ctl:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_mio_pll_ctl_s cn30xx;
 	struct cvmx_mio_pll_ctl_s cn31xx;
@@ -1695,8 +2699,13 @@ union cvmx_mio_pll_ctl {
 union cvmx_mio_pll_setting {
 	uint64_t u64;
 	struct cvmx_mio_pll_setting_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t setting:17;
+#else
+		uint64_t setting:17;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_mio_pll_setting_s cn30xx;
 	struct cvmx_mio_pll_setting_s cn31xx;
@@ -1705,49 +2714,73 @@ union cvmx_mio_pll_setting {
 union cvmx_mio_ptp_ckout_hi_incr {
 	uint64_t u64;
 	struct cvmx_mio_ptp_ckout_hi_incr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t nanosec:32;
 		uint64_t frnanosec:32;
+#else
+		uint64_t frnanosec:32;
+		uint64_t nanosec:32;
+#endif
 	} s;
 	struct cvmx_mio_ptp_ckout_hi_incr_s cn61xx;
 	struct cvmx_mio_ptp_ckout_hi_incr_s cn66xx;
 	struct cvmx_mio_ptp_ckout_hi_incr_s cn68xx;
+	struct cvmx_mio_ptp_ckout_hi_incr_s cnf71xx;
 };
 
 union cvmx_mio_ptp_ckout_lo_incr {
 	uint64_t u64;
 	struct cvmx_mio_ptp_ckout_lo_incr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t nanosec:32;
 		uint64_t frnanosec:32;
+#else
+		uint64_t frnanosec:32;
+		uint64_t nanosec:32;
+#endif
 	} s;
 	struct cvmx_mio_ptp_ckout_lo_incr_s cn61xx;
 	struct cvmx_mio_ptp_ckout_lo_incr_s cn66xx;
 	struct cvmx_mio_ptp_ckout_lo_incr_s cn68xx;
+	struct cvmx_mio_ptp_ckout_lo_incr_s cnf71xx;
 };
 
 union cvmx_mio_ptp_ckout_thresh_hi {
 	uint64_t u64;
 	struct cvmx_mio_ptp_ckout_thresh_hi_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t nanosec:64;
+#else
 		uint64_t nanosec:64;
+#endif
 	} s;
 	struct cvmx_mio_ptp_ckout_thresh_hi_s cn61xx;
 	struct cvmx_mio_ptp_ckout_thresh_hi_s cn66xx;
 	struct cvmx_mio_ptp_ckout_thresh_hi_s cn68xx;
+	struct cvmx_mio_ptp_ckout_thresh_hi_s cnf71xx;
 };
 
 union cvmx_mio_ptp_ckout_thresh_lo {
 	uint64_t u64;
 	struct cvmx_mio_ptp_ckout_thresh_lo_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t frnanosec:32;
+#else
+		uint64_t frnanosec:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_mio_ptp_ckout_thresh_lo_s cn61xx;
 	struct cvmx_mio_ptp_ckout_thresh_lo_s cn66xx;
 	struct cvmx_mio_ptp_ckout_thresh_lo_s cn68xx;
+	struct cvmx_mio_ptp_ckout_thresh_lo_s cnf71xx;
 };
 
 union cvmx_mio_ptp_clock_cfg {
 	uint64_t u64;
 	struct cvmx_mio_ptp_clock_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_42_63:22;
 		uint64_t pps:1;
 		uint64_t ckout:1;
@@ -1768,9 +2801,32 @@ union cvmx_mio_ptp_clock_cfg {
 		uint64_t ext_clk_in:6;
 		uint64_t ext_clk_en:1;
 		uint64_t ptp_en:1;
+#else
+		uint64_t ptp_en:1;
+		uint64_t ext_clk_en:1;
+		uint64_t ext_clk_in:6;
+		uint64_t tstmp_en:1;
+		uint64_t tstmp_edge:1;
+		uint64_t tstmp_in:6;
+		uint64_t evcnt_en:1;
+		uint64_t evcnt_edge:1;
+		uint64_t evcnt_in:6;
+		uint64_t ckout_en:1;
+		uint64_t ckout_inv:1;
+		uint64_t ckout_out:4;
+		uint64_t pps_en:1;
+		uint64_t pps_inv:1;
+		uint64_t pps_out:5;
+		uint64_t ckout_out4:1;
+		uint64_t ext_clk_edge:2;
+		uint64_t ckout:1;
+		uint64_t pps:1;
+		uint64_t reserved_42_63:22;
+#endif
 	} s;
 	struct cvmx_mio_ptp_clock_cfg_s cn61xx;
 	struct cvmx_mio_ptp_clock_cfg_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t evcnt_in:6;
 		uint64_t evcnt_edge:1;
@@ -1781,9 +2837,22 @@ union cvmx_mio_ptp_clock_cfg {
 		uint64_t ext_clk_in:6;
 		uint64_t ext_clk_en:1;
 		uint64_t ptp_en:1;
+#else
+		uint64_t ptp_en:1;
+		uint64_t ext_clk_en:1;
+		uint64_t ext_clk_in:6;
+		uint64_t tstmp_en:1;
+		uint64_t tstmp_edge:1;
+		uint64_t tstmp_in:6;
+		uint64_t evcnt_en:1;
+		uint64_t evcnt_edge:1;
+		uint64_t evcnt_in:6;
+		uint64_t reserved_24_63:40;
+#endif
 	} cn63xx;
 	struct cvmx_mio_ptp_clock_cfg_cn63xx cn63xxp1;
 	struct cvmx_mio_ptp_clock_cfg_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t ext_clk_edge:2;
 		uint64_t ckout_out4:1;
@@ -1802,16 +2871,42 @@ union cvmx_mio_ptp_clock_cfg {
 		uint64_t ext_clk_in:6;
 		uint64_t ext_clk_en:1;
 		uint64_t ptp_en:1;
+#else
+		uint64_t ptp_en:1;
+		uint64_t ext_clk_en:1;
+		uint64_t ext_clk_in:6;
+		uint64_t tstmp_en:1;
+		uint64_t tstmp_edge:1;
+		uint64_t tstmp_in:6;
+		uint64_t evcnt_en:1;
+		uint64_t evcnt_edge:1;
+		uint64_t evcnt_in:6;
+		uint64_t ckout_en:1;
+		uint64_t ckout_inv:1;
+		uint64_t ckout_out:4;
+		uint64_t pps_en:1;
+		uint64_t pps_inv:1;
+		uint64_t pps_out:5;
+		uint64_t ckout_out4:1;
+		uint64_t ext_clk_edge:2;
+		uint64_t reserved_40_63:24;
+#endif
 	} cn66xx;
 	struct cvmx_mio_ptp_clock_cfg_s cn68xx;
 	struct cvmx_mio_ptp_clock_cfg_cn63xx cn68xxp1;
+	struct cvmx_mio_ptp_clock_cfg_s cnf71xx;
 };
 
 union cvmx_mio_ptp_clock_comp {
 	uint64_t u64;
 	struct cvmx_mio_ptp_clock_comp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t nanosec:32;
 		uint64_t frnanosec:32;
+#else
+		uint64_t frnanosec:32;
+		uint64_t nanosec:32;
+#endif
 	} s;
 	struct cvmx_mio_ptp_clock_comp_s cn61xx;
 	struct cvmx_mio_ptp_clock_comp_s cn63xx;
@@ -1819,12 +2914,17 @@ union cvmx_mio_ptp_clock_comp {
 	struct cvmx_mio_ptp_clock_comp_s cn66xx;
 	struct cvmx_mio_ptp_clock_comp_s cn68xx;
 	struct cvmx_mio_ptp_clock_comp_s cn68xxp1;
+	struct cvmx_mio_ptp_clock_comp_s cnf71xx;
 };
 
 union cvmx_mio_ptp_clock_hi {
 	uint64_t u64;
 	struct cvmx_mio_ptp_clock_hi_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t nanosec:64;
+#else
 		uint64_t nanosec:64;
+#endif
 	} s;
 	struct cvmx_mio_ptp_clock_hi_s cn61xx;
 	struct cvmx_mio_ptp_clock_hi_s cn63xx;
@@ -1832,13 +2932,19 @@ union cvmx_mio_ptp_clock_hi {
 	struct cvmx_mio_ptp_clock_hi_s cn66xx;
 	struct cvmx_mio_ptp_clock_hi_s cn68xx;
 	struct cvmx_mio_ptp_clock_hi_s cn68xxp1;
+	struct cvmx_mio_ptp_clock_hi_s cnf71xx;
 };
 
 union cvmx_mio_ptp_clock_lo {
 	uint64_t u64;
 	struct cvmx_mio_ptp_clock_lo_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t frnanosec:32;
+#else
+		uint64_t frnanosec:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_mio_ptp_clock_lo_s cn61xx;
 	struct cvmx_mio_ptp_clock_lo_s cn63xx;
@@ -1846,12 +2952,17 @@ union cvmx_mio_ptp_clock_lo {
 	struct cvmx_mio_ptp_clock_lo_s cn66xx;
 	struct cvmx_mio_ptp_clock_lo_s cn68xx;
 	struct cvmx_mio_ptp_clock_lo_s cn68xxp1;
+	struct cvmx_mio_ptp_clock_lo_s cnf71xx;
 };
 
 union cvmx_mio_ptp_evt_cnt {
 	uint64_t u64;
 	struct cvmx_mio_ptp_evt_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t cntr:64;
+#else
 		uint64_t cntr:64;
+#endif
 	} s;
 	struct cvmx_mio_ptp_evt_cnt_s cn61xx;
 	struct cvmx_mio_ptp_evt_cnt_s cn63xx;
@@ -1859,55 +2970,97 @@ union cvmx_mio_ptp_evt_cnt {
 	struct cvmx_mio_ptp_evt_cnt_s cn66xx;
 	struct cvmx_mio_ptp_evt_cnt_s cn68xx;
 	struct cvmx_mio_ptp_evt_cnt_s cn68xxp1;
+	struct cvmx_mio_ptp_evt_cnt_s cnf71xx;
+};
+
+union cvmx_mio_ptp_phy_1pps_in {
+	uint64_t u64;
+	struct cvmx_mio_ptp_phy_1pps_in_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_5_63:59;
+		uint64_t sel:5;
+#else
+		uint64_t sel:5;
+		uint64_t reserved_5_63:59;
+#endif
+	} s;
+	struct cvmx_mio_ptp_phy_1pps_in_s cnf71xx;
 };
 
 union cvmx_mio_ptp_pps_hi_incr {
 	uint64_t u64;
 	struct cvmx_mio_ptp_pps_hi_incr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t nanosec:32;
 		uint64_t frnanosec:32;
+#else
+		uint64_t frnanosec:32;
+		uint64_t nanosec:32;
+#endif
 	} s;
 	struct cvmx_mio_ptp_pps_hi_incr_s cn61xx;
 	struct cvmx_mio_ptp_pps_hi_incr_s cn66xx;
 	struct cvmx_mio_ptp_pps_hi_incr_s cn68xx;
+	struct cvmx_mio_ptp_pps_hi_incr_s cnf71xx;
 };
 
 union cvmx_mio_ptp_pps_lo_incr {
 	uint64_t u64;
 	struct cvmx_mio_ptp_pps_lo_incr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t nanosec:32;
 		uint64_t frnanosec:32;
+#else
+		uint64_t frnanosec:32;
+		uint64_t nanosec:32;
+#endif
 	} s;
 	struct cvmx_mio_ptp_pps_lo_incr_s cn61xx;
 	struct cvmx_mio_ptp_pps_lo_incr_s cn66xx;
 	struct cvmx_mio_ptp_pps_lo_incr_s cn68xx;
+	struct cvmx_mio_ptp_pps_lo_incr_s cnf71xx;
 };
 
 union cvmx_mio_ptp_pps_thresh_hi {
 	uint64_t u64;
 	struct cvmx_mio_ptp_pps_thresh_hi_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t nanosec:64;
+#else
 		uint64_t nanosec:64;
+#endif
 	} s;
 	struct cvmx_mio_ptp_pps_thresh_hi_s cn61xx;
 	struct cvmx_mio_ptp_pps_thresh_hi_s cn66xx;
 	struct cvmx_mio_ptp_pps_thresh_hi_s cn68xx;
+	struct cvmx_mio_ptp_pps_thresh_hi_s cnf71xx;
 };
 
 union cvmx_mio_ptp_pps_thresh_lo {
 	uint64_t u64;
 	struct cvmx_mio_ptp_pps_thresh_lo_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t frnanosec:32;
+#else
+		uint64_t frnanosec:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_mio_ptp_pps_thresh_lo_s cn61xx;
 	struct cvmx_mio_ptp_pps_thresh_lo_s cn66xx;
 	struct cvmx_mio_ptp_pps_thresh_lo_s cn68xx;
+	struct cvmx_mio_ptp_pps_thresh_lo_s cnf71xx;
 };
 
 union cvmx_mio_ptp_timestamp {
 	uint64_t u64;
 	struct cvmx_mio_ptp_timestamp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t nanosec:64;
+#else
+		uint64_t nanosec:64;
+#endif
 	} s;
 	struct cvmx_mio_ptp_timestamp_s cn61xx;
 	struct cvmx_mio_ptp_timestamp_s cn63xx;
@@ -1915,35 +3068,79 @@ union cvmx_mio_ptp_timestamp {
 	struct cvmx_mio_ptp_timestamp_s cn66xx;
 	struct cvmx_mio_ptp_timestamp_s cn68xx;
 	struct cvmx_mio_ptp_timestamp_s cn68xxp1;
+	struct cvmx_mio_ptp_timestamp_s cnf71xx;
 };
 
 union cvmx_mio_qlmx_cfg {
 	uint64_t u64;
 	struct cvmx_mio_qlmx_cfg_s {
-		uint64_t reserved_12_63:52;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t prtmode:1;
+		uint64_t reserved_12_13:2;
 		uint64_t qlm_spd:4;
 		uint64_t reserved_4_7:4;
 		uint64_t qlm_cfg:4;
+#else
+		uint64_t qlm_cfg:4;
+		uint64_t reserved_4_7:4;
+		uint64_t qlm_spd:4;
+		uint64_t reserved_12_13:2;
+		uint64_t prtmode:1;
+		uint64_t reserved_15_63:49;
+#endif
 	} s;
 	struct cvmx_mio_qlmx_cfg_cn61xx {
-		uint64_t reserved_12_63:52;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_15_63:49;
+		uint64_t prtmode:1;
+		uint64_t reserved_12_13:2;
 		uint64_t qlm_spd:4;
 		uint64_t reserved_2_7:6;
 		uint64_t qlm_cfg:2;
+#else
+		uint64_t qlm_cfg:2;
+		uint64_t reserved_2_7:6;
+		uint64_t qlm_spd:4;
+		uint64_t reserved_12_13:2;
+		uint64_t prtmode:1;
+		uint64_t reserved_15_63:49;
+#endif
 	} cn61xx;
-	struct cvmx_mio_qlmx_cfg_s cn66xx;
+	struct cvmx_mio_qlmx_cfg_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t qlm_spd:4;
+		uint64_t reserved_4_7:4;
+		uint64_t qlm_cfg:4;
+#else
+		uint64_t qlm_cfg:4;
+		uint64_t reserved_4_7:4;
+		uint64_t qlm_spd:4;
+		uint64_t reserved_12_63:52;
+#endif
+	} cn66xx;
 	struct cvmx_mio_qlmx_cfg_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t qlm_spd:4;
 		uint64_t reserved_3_7:5;
 		uint64_t qlm_cfg:3;
+#else
+		uint64_t qlm_cfg:3;
+		uint64_t reserved_3_7:5;
+		uint64_t qlm_spd:4;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn68xx;
 	struct cvmx_mio_qlmx_cfg_cn68xx cn68xxp1;
+	struct cvmx_mio_qlmx_cfg_cn61xx cnf71xx;
 };
 
 union cvmx_mio_rst_boot {
 	uint64_t u64;
 	struct cvmx_mio_rst_boot_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t chipkill:1;
 		uint64_t jtcsrdis:1;
 		uint64_t ejtagdis:1;
@@ -1963,8 +3160,30 @@ union cvmx_mio_rst_boot {
 		uint64_t lboot:10;
 		uint64_t rboot:1;
 		uint64_t rboot_pin:1;
+#else
+		uint64_t rboot_pin:1;
+		uint64_t rboot:1;
+		uint64_t lboot:10;
+		uint64_t qlm0_spd:4;
+		uint64_t qlm1_spd:4;
+		uint64_t qlm2_spd:4;
+		uint64_t pnr_mul:6;
+		uint64_t c_mul:6;
+		uint64_t qlm3_spd:4;
+		uint64_t qlm4_spd:4;
+		uint64_t reserved_44_47:4;
+		uint64_t lboot_ext:2;
+		uint64_t reserved_50_57:8;
+		uint64_t jt_tstmode:1;
+		uint64_t ckill_ppdis:1;
+		uint64_t romen:1;
+		uint64_t ejtagdis:1;
+		uint64_t jtcsrdis:1;
+		uint64_t chipkill:1;
+#endif
 	} s;
 	struct cvmx_mio_rst_boot_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t chipkill:1;
 		uint64_t jtcsrdis:1;
 		uint64_t ejtagdis:1;
@@ -1982,8 +3201,28 @@ union cvmx_mio_rst_boot {
 		uint64_t lboot:10;
 		uint64_t rboot:1;
 		uint64_t rboot_pin:1;
+#else
+		uint64_t rboot_pin:1;
+		uint64_t rboot:1;
+		uint64_t lboot:10;
+		uint64_t qlm0_spd:4;
+		uint64_t qlm1_spd:4;
+		uint64_t qlm2_spd:4;
+		uint64_t pnr_mul:6;
+		uint64_t c_mul:6;
+		uint64_t reserved_36_47:12;
+		uint64_t lboot_ext:2;
+		uint64_t reserved_50_57:8;
+		uint64_t jt_tstmode:1;
+		uint64_t ckill_ppdis:1;
+		uint64_t romen:1;
+		uint64_t ejtagdis:1;
+		uint64_t jtcsrdis:1;
+		uint64_t chipkill:1;
+#endif
 	} cn61xx;
 	struct cvmx_mio_rst_boot_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t c_mul:6;
 		uint64_t pnr_mul:6;
@@ -1993,9 +3232,21 @@ union cvmx_mio_rst_boot {
 		uint64_t lboot:10;
 		uint64_t rboot:1;
 		uint64_t rboot_pin:1;
+#else
+		uint64_t rboot_pin:1;
+		uint64_t rboot:1;
+		uint64_t lboot:10;
+		uint64_t qlm0_spd:4;
+		uint64_t qlm1_spd:4;
+		uint64_t qlm2_spd:4;
+		uint64_t pnr_mul:6;
+		uint64_t c_mul:6;
+		uint64_t reserved_36_63:28;
+#endif
 	} cn63xx;
 	struct cvmx_mio_rst_boot_cn63xx cn63xxp1;
 	struct cvmx_mio_rst_boot_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t chipkill:1;
 		uint64_t jtcsrdis:1;
 		uint64_t ejtagdis:1;
@@ -2012,8 +3263,27 @@ union cvmx_mio_rst_boot {
 		uint64_t lboot:10;
 		uint64_t rboot:1;
 		uint64_t rboot_pin:1;
+#else
+		uint64_t rboot_pin:1;
+		uint64_t rboot:1;
+		uint64_t lboot:10;
+		uint64_t qlm0_spd:4;
+		uint64_t qlm1_spd:4;
+		uint64_t qlm2_spd:4;
+		uint64_t pnr_mul:6;
+		uint64_t c_mul:6;
+		uint64_t reserved_36_47:12;
+		uint64_t lboot_ext:2;
+		uint64_t reserved_50_58:9;
+		uint64_t ckill_ppdis:1;
+		uint64_t romen:1;
+		uint64_t ejtagdis:1;
+		uint64_t jtcsrdis:1;
+		uint64_t chipkill:1;
+#endif
 	} cn66xx;
 	struct cvmx_mio_rst_boot_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t jt_tstmode:1;
 		uint64_t reserved_44_57:14;
@@ -2027,8 +3297,24 @@ union cvmx_mio_rst_boot {
 		uint64_t lboot:10;
 		uint64_t rboot:1;
 		uint64_t rboot_pin:1;
+#else
+		uint64_t rboot_pin:1;
+		uint64_t rboot:1;
+		uint64_t lboot:10;
+		uint64_t qlm0_spd:4;
+		uint64_t qlm1_spd:4;
+		uint64_t qlm2_spd:4;
+		uint64_t pnr_mul:6;
+		uint64_t c_mul:6;
+		uint64_t qlm3_spd:4;
+		uint64_t qlm4_spd:4;
+		uint64_t reserved_44_57:14;
+		uint64_t jt_tstmode:1;
+		uint64_t reserved_59_63:5;
+#endif
 	} cn68xx;
 	struct cvmx_mio_rst_boot_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t qlm4_spd:4;
 		uint64_t qlm3_spd:4;
@@ -2040,55 +3326,107 @@ union cvmx_mio_rst_boot {
 		uint64_t lboot:10;
 		uint64_t rboot:1;
 		uint64_t rboot_pin:1;
+#else
+		uint64_t rboot_pin:1;
+		uint64_t rboot:1;
+		uint64_t lboot:10;
+		uint64_t qlm0_spd:4;
+		uint64_t qlm1_spd:4;
+		uint64_t qlm2_spd:4;
+		uint64_t pnr_mul:6;
+		uint64_t c_mul:6;
+		uint64_t qlm3_spd:4;
+		uint64_t qlm4_spd:4;
+		uint64_t reserved_44_63:20;
+#endif
 	} cn68xxp1;
+	struct cvmx_mio_rst_boot_cn61xx cnf71xx;
 };
 
 union cvmx_mio_rst_cfg {
 	uint64_t u64;
 	struct cvmx_mio_rst_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t cntl_clr_bist:1;
 		uint64_t warm_clr_bist:1;
 		uint64_t soft_clr_bist:1;
+#else
+		uint64_t soft_clr_bist:1;
+		uint64_t warm_clr_bist:1;
+		uint64_t cntl_clr_bist:1;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_mio_rst_cfg_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bist_delay:58;
 		uint64_t reserved_3_5:3;
 		uint64_t cntl_clr_bist:1;
 		uint64_t warm_clr_bist:1;
 		uint64_t soft_clr_bist:1;
+#else
+		uint64_t soft_clr_bist:1;
+		uint64_t warm_clr_bist:1;
+		uint64_t cntl_clr_bist:1;
+		uint64_t reserved_3_5:3;
+		uint64_t bist_delay:58;
+#endif
 	} cn61xx;
 	struct cvmx_mio_rst_cfg_cn61xx cn63xx;
 	struct cvmx_mio_rst_cfg_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bist_delay:58;
 		uint64_t reserved_2_5:4;
 		uint64_t warm_clr_bist:1;
 		uint64_t soft_clr_bist:1;
+#else
+		uint64_t soft_clr_bist:1;
+		uint64_t warm_clr_bist:1;
+		uint64_t reserved_2_5:4;
+		uint64_t bist_delay:58;
+#endif
 	} cn63xxp1;
 	struct cvmx_mio_rst_cfg_cn61xx cn66xx;
 	struct cvmx_mio_rst_cfg_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bist_delay:56;
 		uint64_t reserved_3_7:5;
 		uint64_t cntl_clr_bist:1;
 		uint64_t warm_clr_bist:1;
 		uint64_t soft_clr_bist:1;
+#else
+		uint64_t soft_clr_bist:1;
+		uint64_t warm_clr_bist:1;
+		uint64_t cntl_clr_bist:1;
+		uint64_t reserved_3_7:5;
+		uint64_t bist_delay:56;
+#endif
 	} cn68xx;
 	struct cvmx_mio_rst_cfg_cn68xx cn68xxp1;
+	struct cvmx_mio_rst_cfg_cn61xx cnf71xx;
 };
 
 union cvmx_mio_rst_ckill {
 	uint64_t u64;
 	struct cvmx_mio_rst_ckill_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_47_63:17;
 		uint64_t timer:47;
+#else
+		uint64_t timer:47;
+		uint64_t reserved_47_63:17;
+#endif
 	} s;
 	struct cvmx_mio_rst_ckill_s cn61xx;
 	struct cvmx_mio_rst_ckill_s cn66xx;
+	struct cvmx_mio_rst_ckill_s cnf71xx;
 };
 
 union cvmx_mio_rst_cntlx {
 	uint64_t u64;
 	struct cvmx_mio_rst_cntlx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t in_rev_ln:1;
 		uint64_t rev_lanes:1;
@@ -2102,9 +3440,25 @@ union cvmx_mio_rst_cntlx {
 		uint64_t rst_rcv:1;
 		uint64_t rst_chip:1;
 		uint64_t rst_val:1;
+#else
+		uint64_t rst_val:1;
+		uint64_t rst_chip:1;
+		uint64_t rst_rcv:1;
+		uint64_t rst_drv:1;
+		uint64_t prtmode:2;
+		uint64_t host_mode:1;
+		uint64_t rst_link:1;
+		uint64_t rst_done:1;
+		uint64_t prst_link:1;
+		uint64_t gen1_only:1;
+		uint64_t rev_lanes:1;
+		uint64_t in_rev_ln:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_mio_rst_cntlx_s cn61xx;
 	struct cvmx_mio_rst_cntlx_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t prst_link:1;
 		uint64_t rst_done:1;
@@ -2115,13 +3469,27 @@ union cvmx_mio_rst_cntlx {
 		uint64_t rst_rcv:1;
 		uint64_t rst_chip:1;
 		uint64_t rst_val:1;
+#else
+		uint64_t rst_val:1;
+		uint64_t rst_chip:1;
+		uint64_t rst_rcv:1;
+		uint64_t rst_drv:1;
+		uint64_t prtmode:2;
+		uint64_t host_mode:1;
+		uint64_t rst_link:1;
+		uint64_t rst_done:1;
+		uint64_t prst_link:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn66xx;
 	struct cvmx_mio_rst_cntlx_cn66xx cn68xx;
+	struct cvmx_mio_rst_cntlx_s cnf71xx;
 };
 
 union cvmx_mio_rst_ctlx {
 	uint64_t u64;
 	struct cvmx_mio_rst_ctlx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t in_rev_ln:1;
 		uint64_t rev_lanes:1;
@@ -2135,9 +3503,25 @@ union cvmx_mio_rst_ctlx {
 		uint64_t rst_rcv:1;
 		uint64_t rst_chip:1;
 		uint64_t rst_val:1;
+#else
+		uint64_t rst_val:1;
+		uint64_t rst_chip:1;
+		uint64_t rst_rcv:1;
+		uint64_t rst_drv:1;
+		uint64_t prtmode:2;
+		uint64_t host_mode:1;
+		uint64_t rst_link:1;
+		uint64_t rst_done:1;
+		uint64_t prst_link:1;
+		uint64_t gen1_only:1;
+		uint64_t rev_lanes:1;
+		uint64_t in_rev_ln:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_mio_rst_ctlx_s cn61xx;
 	struct cvmx_mio_rst_ctlx_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t prst_link:1;
 		uint64_t rst_done:1;
@@ -2148,8 +3532,21 @@ union cvmx_mio_rst_ctlx {
 		uint64_t rst_rcv:1;
 		uint64_t rst_chip:1;
 		uint64_t rst_val:1;
+#else
+		uint64_t rst_val:1;
+		uint64_t rst_chip:1;
+		uint64_t rst_rcv:1;
+		uint64_t rst_drv:1;
+		uint64_t prtmode:2;
+		uint64_t host_mode:1;
+		uint64_t rst_link:1;
+		uint64_t rst_done:1;
+		uint64_t prst_link:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn63xx;
 	struct cvmx_mio_rst_ctlx_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t rst_done:1;
 		uint64_t rst_link:1;
@@ -2159,18 +3556,36 @@ union cvmx_mio_rst_ctlx {
 		uint64_t rst_rcv:1;
 		uint64_t rst_chip:1;
 		uint64_t rst_val:1;
+#else
+		uint64_t rst_val:1;
+		uint64_t rst_chip:1;
+		uint64_t rst_rcv:1;
+		uint64_t rst_drv:1;
+		uint64_t prtmode:2;
+		uint64_t host_mode:1;
+		uint64_t rst_link:1;
+		uint64_t rst_done:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn63xxp1;
 	struct cvmx_mio_rst_ctlx_cn63xx cn66xx;
 	struct cvmx_mio_rst_ctlx_cn63xx cn68xx;
 	struct cvmx_mio_rst_ctlx_cn63xx cn68xxp1;
+	struct cvmx_mio_rst_ctlx_s cnf71xx;
 };
 
 union cvmx_mio_rst_delay {
 	uint64_t u64;
 	struct cvmx_mio_rst_delay_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t warm_rst_dly:16;
 		uint64_t soft_rst_dly:16;
+#else
+		uint64_t soft_rst_dly:16;
+		uint64_t warm_rst_dly:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_mio_rst_delay_s cn61xx;
 	struct cvmx_mio_rst_delay_s cn63xx;
@@ -2178,11 +3593,13 @@ union cvmx_mio_rst_delay {
 	struct cvmx_mio_rst_delay_s cn66xx;
 	struct cvmx_mio_rst_delay_s cn68xx;
 	struct cvmx_mio_rst_delay_s cn68xxp1;
+	struct cvmx_mio_rst_delay_s cnf71xx;
 };
 
 union cvmx_mio_rst_int {
 	uint64_t u64;
 	struct cvmx_mio_rst_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t perst1:1;
 		uint64_t perst0:1;
@@ -2191,25 +3608,46 @@ union cvmx_mio_rst_int {
 		uint64_t rst_link2:1;
 		uint64_t rst_link1:1;
 		uint64_t rst_link0:1;
+#else
+		uint64_t rst_link0:1;
+		uint64_t rst_link1:1;
+		uint64_t rst_link2:1;
+		uint64_t rst_link3:1;
+		uint64_t reserved_4_7:4;
+		uint64_t perst0:1;
+		uint64_t perst1:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_mio_rst_int_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t perst1:1;
 		uint64_t perst0:1;
 		uint64_t reserved_2_7:6;
 		uint64_t rst_link1:1;
 		uint64_t rst_link0:1;
+#else
+		uint64_t rst_link0:1;
+		uint64_t rst_link1:1;
+		uint64_t reserved_2_7:6;
+		uint64_t perst0:1;
+		uint64_t perst1:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn61xx;
 	struct cvmx_mio_rst_int_cn61xx cn63xx;
 	struct cvmx_mio_rst_int_cn61xx cn63xxp1;
 	struct cvmx_mio_rst_int_s cn66xx;
 	struct cvmx_mio_rst_int_cn61xx cn68xx;
 	struct cvmx_mio_rst_int_cn61xx cn68xxp1;
+	struct cvmx_mio_rst_int_cn61xx cnf71xx;
 };
 
 union cvmx_mio_rst_int_en {
 	uint64_t u64;
 	struct cvmx_mio_rst_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t perst1:1;
 		uint64_t perst0:1;
@@ -2218,25 +3656,46 @@ union cvmx_mio_rst_int_en {
 		uint64_t rst_link2:1;
 		uint64_t rst_link1:1;
 		uint64_t rst_link0:1;
+#else
+		uint64_t rst_link0:1;
+		uint64_t rst_link1:1;
+		uint64_t rst_link2:1;
+		uint64_t rst_link3:1;
+		uint64_t reserved_4_7:4;
+		uint64_t perst0:1;
+		uint64_t perst1:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_mio_rst_int_en_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t perst1:1;
 		uint64_t perst0:1;
 		uint64_t reserved_2_7:6;
 		uint64_t rst_link1:1;
 		uint64_t rst_link0:1;
+#else
+		uint64_t rst_link0:1;
+		uint64_t rst_link1:1;
+		uint64_t reserved_2_7:6;
+		uint64_t perst0:1;
+		uint64_t perst1:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn61xx;
 	struct cvmx_mio_rst_int_en_cn61xx cn63xx;
 	struct cvmx_mio_rst_int_en_cn61xx cn63xxp1;
 	struct cvmx_mio_rst_int_en_s cn66xx;
 	struct cvmx_mio_rst_int_en_cn61xx cn68xx;
 	struct cvmx_mio_rst_int_en_cn61xx cn68xxp1;
+	struct cvmx_mio_rst_int_en_cn61xx cnf71xx;
 };
 
 union cvmx_mio_twsx_int {
 	uint64_t u64;
 	struct cvmx_mio_twsx_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t scl:1;
 		uint64_t sda:1;
@@ -2250,11 +3709,27 @@ union cvmx_mio_twsx_int {
 		uint64_t core_int:1;
 		uint64_t ts_int:1;
 		uint64_t st_int:1;
+#else
+		uint64_t st_int:1;
+		uint64_t ts_int:1;
+		uint64_t core_int:1;
+		uint64_t reserved_3_3:1;
+		uint64_t st_en:1;
+		uint64_t ts_en:1;
+		uint64_t core_en:1;
+		uint64_t reserved_7_7:1;
+		uint64_t sda_ovr:1;
+		uint64_t scl_ovr:1;
+		uint64_t sda:1;
+		uint64_t scl:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_mio_twsx_int_s cn30xx;
 	struct cvmx_mio_twsx_int_s cn31xx;
 	struct cvmx_mio_twsx_int_s cn38xx;
 	struct cvmx_mio_twsx_int_cn38xxp2 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t core_en:1;
 		uint64_t ts_en:1;
@@ -2263,6 +3738,16 @@ union cvmx_mio_twsx_int {
 		uint64_t core_int:1;
 		uint64_t ts_int:1;
 		uint64_t st_int:1;
+#else
+		uint64_t st_int:1;
+		uint64_t ts_int:1;
+		uint64_t core_int:1;
+		uint64_t reserved_3_3:1;
+		uint64_t st_en:1;
+		uint64_t ts_en:1;
+		uint64_t core_en:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} cn38xxp2;
 	struct cvmx_mio_twsx_int_s cn50xx;
 	struct cvmx_mio_twsx_int_s cn52xx;
@@ -2277,11 +3762,13 @@ union cvmx_mio_twsx_int {
 	struct cvmx_mio_twsx_int_s cn66xx;
 	struct cvmx_mio_twsx_int_s cn68xx;
 	struct cvmx_mio_twsx_int_s cn68xxp1;
+	struct cvmx_mio_twsx_int_s cnf71xx;
 };
 
 union cvmx_mio_twsx_sw_twsi {
 	uint64_t u64;
 	struct cvmx_mio_twsx_sw_twsi_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t v:1;
 		uint64_t slonly:1;
 		uint64_t eia:1;
@@ -2294,6 +3781,20 @@ union cvmx_mio_twsx_sw_twsi {
 		uint64_t ia:5;
 		uint64_t eop_ia:3;
 		uint64_t d:32;
+#else
+		uint64_t d:32;
+		uint64_t eop_ia:3;
+		uint64_t ia:5;
+		uint64_t a:10;
+		uint64_t scr:2;
+		uint64_t size:3;
+		uint64_t sovr:1;
+		uint64_t r:1;
+		uint64_t op:4;
+		uint64_t eia:1;
+		uint64_t slonly:1;
+		uint64_t v:1;
+#endif
 	} s;
 	struct cvmx_mio_twsx_sw_twsi_s cn30xx;
 	struct cvmx_mio_twsx_sw_twsi_s cn31xx;
@@ -2312,14 +3813,21 @@ union cvmx_mio_twsx_sw_twsi {
 	struct cvmx_mio_twsx_sw_twsi_s cn66xx;
 	struct cvmx_mio_twsx_sw_twsi_s cn68xx;
 	struct cvmx_mio_twsx_sw_twsi_s cn68xxp1;
+	struct cvmx_mio_twsx_sw_twsi_s cnf71xx;
 };
 
 union cvmx_mio_twsx_sw_twsi_ext {
 	uint64_t u64;
 	struct cvmx_mio_twsx_sw_twsi_ext_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t ia:8;
 		uint64_t d:32;
+#else
+		uint64_t d:32;
+		uint64_t ia:8;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_mio_twsx_sw_twsi_ext_s cn30xx;
 	struct cvmx_mio_twsx_sw_twsi_ext_s cn31xx;
@@ -2338,14 +3846,21 @@ union cvmx_mio_twsx_sw_twsi_ext {
 	struct cvmx_mio_twsx_sw_twsi_ext_s cn66xx;
 	struct cvmx_mio_twsx_sw_twsi_ext_s cn68xx;
 	struct cvmx_mio_twsx_sw_twsi_ext_s cn68xxp1;
+	struct cvmx_mio_twsx_sw_twsi_ext_s cnf71xx;
 };
 
 union cvmx_mio_twsx_twsi_sw {
 	uint64_t u64;
 	struct cvmx_mio_twsx_twsi_sw_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t v:2;
 		uint64_t reserved_32_61:30;
 		uint64_t d:32;
+#else
+		uint64_t d:32;
+		uint64_t reserved_32_61:30;
+		uint64_t v:2;
+#endif
 	} s;
 	struct cvmx_mio_twsx_twsi_sw_s cn30xx;
 	struct cvmx_mio_twsx_twsi_sw_s cn31xx;
@@ -2364,13 +3879,19 @@ union cvmx_mio_twsx_twsi_sw {
 	struct cvmx_mio_twsx_twsi_sw_s cn66xx;
 	struct cvmx_mio_twsx_twsi_sw_s cn68xx;
 	struct cvmx_mio_twsx_twsi_sw_s cn68xxp1;
+	struct cvmx_mio_twsx_twsi_sw_s cnf71xx;
 };
 
 union cvmx_mio_uartx_dlh {
 	uint64_t u64;
 	struct cvmx_mio_uartx_dlh_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t dlh:8;
+#else
+		uint64_t dlh:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_dlh_s cn30xx;
 	struct cvmx_mio_uartx_dlh_s cn31xx;
@@ -2389,13 +3910,19 @@ union cvmx_mio_uartx_dlh {
 	struct cvmx_mio_uartx_dlh_s cn66xx;
 	struct cvmx_mio_uartx_dlh_s cn68xx;
 	struct cvmx_mio_uartx_dlh_s cn68xxp1;
+	struct cvmx_mio_uartx_dlh_s cnf71xx;
 };
 
 union cvmx_mio_uartx_dll {
 	uint64_t u64;
 	struct cvmx_mio_uartx_dll_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t dll:8;
+#else
+		uint64_t dll:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_dll_s cn30xx;
 	struct cvmx_mio_uartx_dll_s cn31xx;
@@ -2414,13 +3941,19 @@ union cvmx_mio_uartx_dll {
 	struct cvmx_mio_uartx_dll_s cn66xx;
 	struct cvmx_mio_uartx_dll_s cn68xx;
 	struct cvmx_mio_uartx_dll_s cn68xxp1;
+	struct cvmx_mio_uartx_dll_s cnf71xx;
 };
 
 union cvmx_mio_uartx_far {
 	uint64_t u64;
 	struct cvmx_mio_uartx_far_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t far:1;
+#else
+		uint64_t far:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uartx_far_s cn30xx;
 	struct cvmx_mio_uartx_far_s cn31xx;
@@ -2439,11 +3972,13 @@ union cvmx_mio_uartx_far {
 	struct cvmx_mio_uartx_far_s cn66xx;
 	struct cvmx_mio_uartx_far_s cn68xx;
 	struct cvmx_mio_uartx_far_s cn68xxp1;
+	struct cvmx_mio_uartx_far_s cnf71xx;
 };
 
 union cvmx_mio_uartx_fcr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_fcr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t rxtrig:2;
 		uint64_t txtrig:2;
@@ -2451,6 +3986,15 @@ union cvmx_mio_uartx_fcr {
 		uint64_t txfr:1;
 		uint64_t rxfr:1;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t rxfr:1;
+		uint64_t txfr:1;
+		uint64_t reserved_3_3:1;
+		uint64_t txtrig:2;
+		uint64_t rxtrig:2;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_fcr_s cn30xx;
 	struct cvmx_mio_uartx_fcr_s cn31xx;
@@ -2469,13 +4013,19 @@ union cvmx_mio_uartx_fcr {
 	struct cvmx_mio_uartx_fcr_s cn66xx;
 	struct cvmx_mio_uartx_fcr_s cn68xx;
 	struct cvmx_mio_uartx_fcr_s cn68xxp1;
+	struct cvmx_mio_uartx_fcr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_htx {
 	uint64_t u64;
 	struct cvmx_mio_uartx_htx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t htx:1;
+#else
+		uint64_t htx:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uartx_htx_s cn30xx;
 	struct cvmx_mio_uartx_htx_s cn31xx;
@@ -2494,11 +4044,13 @@ union cvmx_mio_uartx_htx {
 	struct cvmx_mio_uartx_htx_s cn66xx;
 	struct cvmx_mio_uartx_htx_s cn68xx;
 	struct cvmx_mio_uartx_htx_s cn68xxp1;
+	struct cvmx_mio_uartx_htx_s cnf71xx;
 };
 
 union cvmx_mio_uartx_ier {
 	uint64_t u64;
 	struct cvmx_mio_uartx_ier_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ptime:1;
 		uint64_t reserved_4_6:3;
@@ -2506,6 +4058,15 @@ union cvmx_mio_uartx_ier {
 		uint64_t elsi:1;
 		uint64_t etbei:1;
 		uint64_t erbfi:1;
+#else
+		uint64_t erbfi:1;
+		uint64_t etbei:1;
+		uint64_t elsi:1;
+		uint64_t edssi:1;
+		uint64_t reserved_4_6:3;
+		uint64_t ptime:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_ier_s cn30xx;
 	struct cvmx_mio_uartx_ier_s cn31xx;
@@ -2524,15 +4085,23 @@ union cvmx_mio_uartx_ier {
 	struct cvmx_mio_uartx_ier_s cn66xx;
 	struct cvmx_mio_uartx_ier_s cn68xx;
 	struct cvmx_mio_uartx_ier_s cn68xxp1;
+	struct cvmx_mio_uartx_ier_s cnf71xx;
 };
 
 union cvmx_mio_uartx_iir {
 	uint64_t u64;
 	struct cvmx_mio_uartx_iir_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t fen:2;
 		uint64_t reserved_4_5:2;
 		uint64_t iid:4;
+#else
+		uint64_t iid:4;
+		uint64_t reserved_4_5:2;
+		uint64_t fen:2;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_iir_s cn30xx;
 	struct cvmx_mio_uartx_iir_s cn31xx;
@@ -2551,11 +4120,13 @@ union cvmx_mio_uartx_iir {
 	struct cvmx_mio_uartx_iir_s cn66xx;
 	struct cvmx_mio_uartx_iir_s cn68xx;
 	struct cvmx_mio_uartx_iir_s cn68xxp1;
+	struct cvmx_mio_uartx_iir_s cnf71xx;
 };
 
 union cvmx_mio_uartx_lcr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_lcr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t dlab:1;
 		uint64_t brk:1;
@@ -2564,6 +4135,16 @@ union cvmx_mio_uartx_lcr {
 		uint64_t pen:1;
 		uint64_t stop:1;
 		uint64_t cls:2;
+#else
+		uint64_t cls:2;
+		uint64_t stop:1;
+		uint64_t pen:1;
+		uint64_t eps:1;
+		uint64_t reserved_5_5:1;
+		uint64_t brk:1;
+		uint64_t dlab:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_lcr_s cn30xx;
 	struct cvmx_mio_uartx_lcr_s cn31xx;
@@ -2582,11 +4163,13 @@ union cvmx_mio_uartx_lcr {
 	struct cvmx_mio_uartx_lcr_s cn66xx;
 	struct cvmx_mio_uartx_lcr_s cn68xx;
 	struct cvmx_mio_uartx_lcr_s cn68xxp1;
+	struct cvmx_mio_uartx_lcr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_lsr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_lsr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ferr:1;
 		uint64_t temt:1;
@@ -2596,6 +4179,17 @@ union cvmx_mio_uartx_lsr {
 		uint64_t pe:1;
 		uint64_t oe:1;
 		uint64_t dr:1;
+#else
+		uint64_t dr:1;
+		uint64_t oe:1;
+		uint64_t pe:1;
+		uint64_t fe:1;
+		uint64_t bi:1;
+		uint64_t thre:1;
+		uint64_t temt:1;
+		uint64_t ferr:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_lsr_s cn30xx;
 	struct cvmx_mio_uartx_lsr_s cn31xx;
@@ -2614,11 +4208,13 @@ union cvmx_mio_uartx_lsr {
 	struct cvmx_mio_uartx_lsr_s cn66xx;
 	struct cvmx_mio_uartx_lsr_s cn68xx;
 	struct cvmx_mio_uartx_lsr_s cn68xxp1;
+	struct cvmx_mio_uartx_lsr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_mcr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_mcr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t afce:1;
 		uint64_t loop:1;
@@ -2626,6 +4222,15 @@ union cvmx_mio_uartx_mcr {
 		uint64_t out1:1;
 		uint64_t rts:1;
 		uint64_t dtr:1;
+#else
+		uint64_t dtr:1;
+		uint64_t rts:1;
+		uint64_t out1:1;
+		uint64_t out2:1;
+		uint64_t loop:1;
+		uint64_t afce:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_mio_uartx_mcr_s cn30xx;
 	struct cvmx_mio_uartx_mcr_s cn31xx;
@@ -2644,11 +4249,13 @@ union cvmx_mio_uartx_mcr {
 	struct cvmx_mio_uartx_mcr_s cn66xx;
 	struct cvmx_mio_uartx_mcr_s cn68xx;
 	struct cvmx_mio_uartx_mcr_s cn68xxp1;
+	struct cvmx_mio_uartx_mcr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_msr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_msr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t dcd:1;
 		uint64_t ri:1;
@@ -2658,6 +4265,17 @@ union cvmx_mio_uartx_msr {
 		uint64_t teri:1;
 		uint64_t ddsr:1;
 		uint64_t dcts:1;
+#else
+		uint64_t dcts:1;
+		uint64_t ddsr:1;
+		uint64_t teri:1;
+		uint64_t ddcd:1;
+		uint64_t cts:1;
+		uint64_t dsr:1;
+		uint64_t ri:1;
+		uint64_t dcd:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_msr_s cn30xx;
 	struct cvmx_mio_uartx_msr_s cn31xx;
@@ -2676,13 +4294,19 @@ union cvmx_mio_uartx_msr {
 	struct cvmx_mio_uartx_msr_s cn66xx;
 	struct cvmx_mio_uartx_msr_s cn68xx;
 	struct cvmx_mio_uartx_msr_s cn68xxp1;
+	struct cvmx_mio_uartx_msr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_rbr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_rbr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t rbr:8;
+#else
+		uint64_t rbr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_rbr_s cn30xx;
 	struct cvmx_mio_uartx_rbr_s cn31xx;
@@ -2701,13 +4325,19 @@ union cvmx_mio_uartx_rbr {
 	struct cvmx_mio_uartx_rbr_s cn66xx;
 	struct cvmx_mio_uartx_rbr_s cn68xx;
 	struct cvmx_mio_uartx_rbr_s cn68xxp1;
+	struct cvmx_mio_uartx_rbr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_rfl {
 	uint64_t u64;
 	struct cvmx_mio_uartx_rfl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t rfl:7;
+#else
+		uint64_t rfl:7;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_mio_uartx_rfl_s cn30xx;
 	struct cvmx_mio_uartx_rfl_s cn31xx;
@@ -2726,15 +4356,23 @@ union cvmx_mio_uartx_rfl {
 	struct cvmx_mio_uartx_rfl_s cn66xx;
 	struct cvmx_mio_uartx_rfl_s cn68xx;
 	struct cvmx_mio_uartx_rfl_s cn68xxp1;
+	struct cvmx_mio_uartx_rfl_s cnf71xx;
 };
 
 union cvmx_mio_uartx_rfw {
 	uint64_t u64;
 	struct cvmx_mio_uartx_rfw_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t rffe:1;
 		uint64_t rfpe:1;
 		uint64_t rfwd:8;
+#else
+		uint64_t rfwd:8;
+		uint64_t rfpe:1;
+		uint64_t rffe:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_mio_uartx_rfw_s cn30xx;
 	struct cvmx_mio_uartx_rfw_s cn31xx;
@@ -2753,13 +4391,19 @@ union cvmx_mio_uartx_rfw {
 	struct cvmx_mio_uartx_rfw_s cn66xx;
 	struct cvmx_mio_uartx_rfw_s cn68xx;
 	struct cvmx_mio_uartx_rfw_s cn68xxp1;
+	struct cvmx_mio_uartx_rfw_s cnf71xx;
 };
 
 union cvmx_mio_uartx_sbcr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_sbcr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t sbcr:1;
+#else
+		uint64_t sbcr:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uartx_sbcr_s cn30xx;
 	struct cvmx_mio_uartx_sbcr_s cn31xx;
@@ -2778,13 +4422,19 @@ union cvmx_mio_uartx_sbcr {
 	struct cvmx_mio_uartx_sbcr_s cn66xx;
 	struct cvmx_mio_uartx_sbcr_s cn68xx;
 	struct cvmx_mio_uartx_sbcr_s cn68xxp1;
+	struct cvmx_mio_uartx_sbcr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_scr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_scr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t scr:8;
+#else
+		uint64_t scr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_scr_s cn30xx;
 	struct cvmx_mio_uartx_scr_s cn31xx;
@@ -2803,13 +4453,19 @@ union cvmx_mio_uartx_scr {
 	struct cvmx_mio_uartx_scr_s cn66xx;
 	struct cvmx_mio_uartx_scr_s cn68xx;
 	struct cvmx_mio_uartx_scr_s cn68xxp1;
+	struct cvmx_mio_uartx_scr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_sfe {
 	uint64_t u64;
 	struct cvmx_mio_uartx_sfe_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t sfe:1;
+#else
+		uint64_t sfe:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uartx_sfe_s cn30xx;
 	struct cvmx_mio_uartx_sfe_s cn31xx;
@@ -2828,15 +4484,23 @@ union cvmx_mio_uartx_sfe {
 	struct cvmx_mio_uartx_sfe_s cn66xx;
 	struct cvmx_mio_uartx_sfe_s cn68xx;
 	struct cvmx_mio_uartx_sfe_s cn68xxp1;
+	struct cvmx_mio_uartx_sfe_s cnf71xx;
 };
 
 union cvmx_mio_uartx_srr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_srr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t stfr:1;
 		uint64_t srfr:1;
 		uint64_t usr:1;
+#else
+		uint64_t usr:1;
+		uint64_t srfr:1;
+		uint64_t stfr:1;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_mio_uartx_srr_s cn30xx;
 	struct cvmx_mio_uartx_srr_s cn31xx;
@@ -2855,13 +4519,19 @@ union cvmx_mio_uartx_srr {
 	struct cvmx_mio_uartx_srr_s cn66xx;
 	struct cvmx_mio_uartx_srr_s cn68xx;
 	struct cvmx_mio_uartx_srr_s cn68xxp1;
+	struct cvmx_mio_uartx_srr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_srt {
 	uint64_t u64;
 	struct cvmx_mio_uartx_srt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t srt:2;
+#else
+		uint64_t srt:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_mio_uartx_srt_s cn30xx;
 	struct cvmx_mio_uartx_srt_s cn31xx;
@@ -2880,13 +4550,19 @@ union cvmx_mio_uartx_srt {
 	struct cvmx_mio_uartx_srt_s cn66xx;
 	struct cvmx_mio_uartx_srt_s cn68xx;
 	struct cvmx_mio_uartx_srt_s cn68xxp1;
+	struct cvmx_mio_uartx_srt_s cnf71xx;
 };
 
 union cvmx_mio_uartx_srts {
 	uint64_t u64;
 	struct cvmx_mio_uartx_srts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t srts:1;
+#else
+		uint64_t srts:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uartx_srts_s cn30xx;
 	struct cvmx_mio_uartx_srts_s cn31xx;
@@ -2905,13 +4581,19 @@ union cvmx_mio_uartx_srts {
 	struct cvmx_mio_uartx_srts_s cn66xx;
 	struct cvmx_mio_uartx_srts_s cn68xx;
 	struct cvmx_mio_uartx_srts_s cn68xxp1;
+	struct cvmx_mio_uartx_srts_s cnf71xx;
 };
 
 union cvmx_mio_uartx_stt {
 	uint64_t u64;
 	struct cvmx_mio_uartx_stt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t stt:2;
+#else
+		uint64_t stt:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_mio_uartx_stt_s cn30xx;
 	struct cvmx_mio_uartx_stt_s cn31xx;
@@ -2930,13 +4612,19 @@ union cvmx_mio_uartx_stt {
 	struct cvmx_mio_uartx_stt_s cn66xx;
 	struct cvmx_mio_uartx_stt_s cn68xx;
 	struct cvmx_mio_uartx_stt_s cn68xxp1;
+	struct cvmx_mio_uartx_stt_s cnf71xx;
 };
 
 union cvmx_mio_uartx_tfl {
 	uint64_t u64;
 	struct cvmx_mio_uartx_tfl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t tfl:7;
+#else
+		uint64_t tfl:7;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_mio_uartx_tfl_s cn30xx;
 	struct cvmx_mio_uartx_tfl_s cn31xx;
@@ -2955,13 +4643,19 @@ union cvmx_mio_uartx_tfl {
 	struct cvmx_mio_uartx_tfl_s cn66xx;
 	struct cvmx_mio_uartx_tfl_s cn68xx;
 	struct cvmx_mio_uartx_tfl_s cn68xxp1;
+	struct cvmx_mio_uartx_tfl_s cnf71xx;
 };
 
 union cvmx_mio_uartx_tfr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_tfr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t tfr:8;
+#else
+		uint64_t tfr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_tfr_s cn30xx;
 	struct cvmx_mio_uartx_tfr_s cn31xx;
@@ -2980,13 +4674,19 @@ union cvmx_mio_uartx_tfr {
 	struct cvmx_mio_uartx_tfr_s cn66xx;
 	struct cvmx_mio_uartx_tfr_s cn68xx;
 	struct cvmx_mio_uartx_tfr_s cn68xxp1;
+	struct cvmx_mio_uartx_tfr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_thr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_thr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t thr:8;
+#else
+		uint64_t thr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uartx_thr_s cn30xx;
 	struct cvmx_mio_uartx_thr_s cn31xx;
@@ -3005,17 +4705,27 @@ union cvmx_mio_uartx_thr {
 	struct cvmx_mio_uartx_thr_s cn66xx;
 	struct cvmx_mio_uartx_thr_s cn68xx;
 	struct cvmx_mio_uartx_thr_s cn68xxp1;
+	struct cvmx_mio_uartx_thr_s cnf71xx;
 };
 
 union cvmx_mio_uartx_usr {
 	uint64_t u64;
 	struct cvmx_mio_uartx_usr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t rff:1;
 		uint64_t rfne:1;
 		uint64_t tfe:1;
 		uint64_t tfnf:1;
 		uint64_t busy:1;
+#else
+		uint64_t busy:1;
+		uint64_t tfnf:1;
+		uint64_t tfe:1;
+		uint64_t rfne:1;
+		uint64_t rff:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_mio_uartx_usr_s cn30xx;
 	struct cvmx_mio_uartx_usr_s cn31xx;
@@ -3034,13 +4744,19 @@ union cvmx_mio_uartx_usr {
 	struct cvmx_mio_uartx_usr_s cn66xx;
 	struct cvmx_mio_uartx_usr_s cn68xx;
 	struct cvmx_mio_uartx_usr_s cn68xxp1;
+	struct cvmx_mio_uartx_usr_s cnf71xx;
 };
 
 union cvmx_mio_uart2_dlh {
 	uint64_t u64;
 	struct cvmx_mio_uart2_dlh_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t dlh:8;
+#else
+		uint64_t dlh:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_dlh_s cn52xx;
 	struct cvmx_mio_uart2_dlh_s cn52xxp1;
@@ -3049,8 +4765,13 @@ union cvmx_mio_uart2_dlh {
 union cvmx_mio_uart2_dll {
 	uint64_t u64;
 	struct cvmx_mio_uart2_dll_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t dll:8;
+#else
+		uint64_t dll:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_dll_s cn52xx;
 	struct cvmx_mio_uart2_dll_s cn52xxp1;
@@ -3059,8 +4780,13 @@ union cvmx_mio_uart2_dll {
 union cvmx_mio_uart2_far {
 	uint64_t u64;
 	struct cvmx_mio_uart2_far_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t far:1;
+#else
+		uint64_t far:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uart2_far_s cn52xx;
 	struct cvmx_mio_uart2_far_s cn52xxp1;
@@ -3069,6 +4795,7 @@ union cvmx_mio_uart2_far {
 union cvmx_mio_uart2_fcr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_fcr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t rxtrig:2;
 		uint64_t txtrig:2;
@@ -3076,6 +4803,15 @@ union cvmx_mio_uart2_fcr {
 		uint64_t txfr:1;
 		uint64_t rxfr:1;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t rxfr:1;
+		uint64_t txfr:1;
+		uint64_t reserved_3_3:1;
+		uint64_t txtrig:2;
+		uint64_t rxtrig:2;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_fcr_s cn52xx;
 	struct cvmx_mio_uart2_fcr_s cn52xxp1;
@@ -3084,8 +4820,13 @@ union cvmx_mio_uart2_fcr {
 union cvmx_mio_uart2_htx {
 	uint64_t u64;
 	struct cvmx_mio_uart2_htx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t htx:1;
+#else
+		uint64_t htx:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uart2_htx_s cn52xx;
 	struct cvmx_mio_uart2_htx_s cn52xxp1;
@@ -3094,6 +4835,7 @@ union cvmx_mio_uart2_htx {
 union cvmx_mio_uart2_ier {
 	uint64_t u64;
 	struct cvmx_mio_uart2_ier_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ptime:1;
 		uint64_t reserved_4_6:3;
@@ -3101,6 +4843,15 @@ union cvmx_mio_uart2_ier {
 		uint64_t elsi:1;
 		uint64_t etbei:1;
 		uint64_t erbfi:1;
+#else
+		uint64_t erbfi:1;
+		uint64_t etbei:1;
+		uint64_t elsi:1;
+		uint64_t edssi:1;
+		uint64_t reserved_4_6:3;
+		uint64_t ptime:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_ier_s cn52xx;
 	struct cvmx_mio_uart2_ier_s cn52xxp1;
@@ -3109,10 +4860,17 @@ union cvmx_mio_uart2_ier {
 union cvmx_mio_uart2_iir {
 	uint64_t u64;
 	struct cvmx_mio_uart2_iir_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t fen:2;
 		uint64_t reserved_4_5:2;
 		uint64_t iid:4;
+#else
+		uint64_t iid:4;
+		uint64_t reserved_4_5:2;
+		uint64_t fen:2;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_iir_s cn52xx;
 	struct cvmx_mio_uart2_iir_s cn52xxp1;
@@ -3121,6 +4879,7 @@ union cvmx_mio_uart2_iir {
 union cvmx_mio_uart2_lcr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_lcr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t dlab:1;
 		uint64_t brk:1;
@@ -3129,6 +4888,16 @@ union cvmx_mio_uart2_lcr {
 		uint64_t pen:1;
 		uint64_t stop:1;
 		uint64_t cls:2;
+#else
+		uint64_t cls:2;
+		uint64_t stop:1;
+		uint64_t pen:1;
+		uint64_t eps:1;
+		uint64_t reserved_5_5:1;
+		uint64_t brk:1;
+		uint64_t dlab:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_lcr_s cn52xx;
 	struct cvmx_mio_uart2_lcr_s cn52xxp1;
@@ -3137,6 +4906,7 @@ union cvmx_mio_uart2_lcr {
 union cvmx_mio_uart2_lsr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_lsr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ferr:1;
 		uint64_t temt:1;
@@ -3146,6 +4916,17 @@ union cvmx_mio_uart2_lsr {
 		uint64_t pe:1;
 		uint64_t oe:1;
 		uint64_t dr:1;
+#else
+		uint64_t dr:1;
+		uint64_t oe:1;
+		uint64_t pe:1;
+		uint64_t fe:1;
+		uint64_t bi:1;
+		uint64_t thre:1;
+		uint64_t temt:1;
+		uint64_t ferr:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_lsr_s cn52xx;
 	struct cvmx_mio_uart2_lsr_s cn52xxp1;
@@ -3154,6 +4935,7 @@ union cvmx_mio_uart2_lsr {
 union cvmx_mio_uart2_mcr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_mcr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t afce:1;
 		uint64_t loop:1;
@@ -3161,6 +4943,15 @@ union cvmx_mio_uart2_mcr {
 		uint64_t out1:1;
 		uint64_t rts:1;
 		uint64_t dtr:1;
+#else
+		uint64_t dtr:1;
+		uint64_t rts:1;
+		uint64_t out1:1;
+		uint64_t out2:1;
+		uint64_t loop:1;
+		uint64_t afce:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_mio_uart2_mcr_s cn52xx;
 	struct cvmx_mio_uart2_mcr_s cn52xxp1;
@@ -3169,6 +4960,7 @@ union cvmx_mio_uart2_mcr {
 union cvmx_mio_uart2_msr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_msr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t dcd:1;
 		uint64_t ri:1;
@@ -3178,6 +4970,17 @@ union cvmx_mio_uart2_msr {
 		uint64_t teri:1;
 		uint64_t ddsr:1;
 		uint64_t dcts:1;
+#else
+		uint64_t dcts:1;
+		uint64_t ddsr:1;
+		uint64_t teri:1;
+		uint64_t ddcd:1;
+		uint64_t cts:1;
+		uint64_t dsr:1;
+		uint64_t ri:1;
+		uint64_t dcd:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_msr_s cn52xx;
 	struct cvmx_mio_uart2_msr_s cn52xxp1;
@@ -3186,8 +4989,13 @@ union cvmx_mio_uart2_msr {
 union cvmx_mio_uart2_rbr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_rbr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t rbr:8;
+#else
+		uint64_t rbr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_rbr_s cn52xx;
 	struct cvmx_mio_uart2_rbr_s cn52xxp1;
@@ -3196,8 +5004,13 @@ union cvmx_mio_uart2_rbr {
 union cvmx_mio_uart2_rfl {
 	uint64_t u64;
 	struct cvmx_mio_uart2_rfl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t rfl:7;
+#else
+		uint64_t rfl:7;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_mio_uart2_rfl_s cn52xx;
 	struct cvmx_mio_uart2_rfl_s cn52xxp1;
@@ -3206,10 +5019,17 @@ union cvmx_mio_uart2_rfl {
 union cvmx_mio_uart2_rfw {
 	uint64_t u64;
 	struct cvmx_mio_uart2_rfw_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t rffe:1;
 		uint64_t rfpe:1;
 		uint64_t rfwd:8;
+#else
+		uint64_t rfwd:8;
+		uint64_t rfpe:1;
+		uint64_t rffe:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_mio_uart2_rfw_s cn52xx;
 	struct cvmx_mio_uart2_rfw_s cn52xxp1;
@@ -3218,8 +5038,13 @@ union cvmx_mio_uart2_rfw {
 union cvmx_mio_uart2_sbcr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_sbcr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t sbcr:1;
+#else
+		uint64_t sbcr:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uart2_sbcr_s cn52xx;
 	struct cvmx_mio_uart2_sbcr_s cn52xxp1;
@@ -3228,8 +5053,13 @@ union cvmx_mio_uart2_sbcr {
 union cvmx_mio_uart2_scr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_scr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t scr:8;
+#else
+		uint64_t scr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_scr_s cn52xx;
 	struct cvmx_mio_uart2_scr_s cn52xxp1;
@@ -3238,8 +5068,13 @@ union cvmx_mio_uart2_scr {
 union cvmx_mio_uart2_sfe {
 	uint64_t u64;
 	struct cvmx_mio_uart2_sfe_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t sfe:1;
+#else
+		uint64_t sfe:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uart2_sfe_s cn52xx;
 	struct cvmx_mio_uart2_sfe_s cn52xxp1;
@@ -3248,10 +5083,17 @@ union cvmx_mio_uart2_sfe {
 union cvmx_mio_uart2_srr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_srr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t stfr:1;
 		uint64_t srfr:1;
 		uint64_t usr:1;
+#else
+		uint64_t usr:1;
+		uint64_t srfr:1;
+		uint64_t stfr:1;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_mio_uart2_srr_s cn52xx;
 	struct cvmx_mio_uart2_srr_s cn52xxp1;
@@ -3260,8 +5102,13 @@ union cvmx_mio_uart2_srr {
 union cvmx_mio_uart2_srt {
 	uint64_t u64;
 	struct cvmx_mio_uart2_srt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t srt:2;
+#else
+		uint64_t srt:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_mio_uart2_srt_s cn52xx;
 	struct cvmx_mio_uart2_srt_s cn52xxp1;
@@ -3270,8 +5117,13 @@ union cvmx_mio_uart2_srt {
 union cvmx_mio_uart2_srts {
 	uint64_t u64;
 	struct cvmx_mio_uart2_srts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t srts:1;
+#else
+		uint64_t srts:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_mio_uart2_srts_s cn52xx;
 	struct cvmx_mio_uart2_srts_s cn52xxp1;
@@ -3280,8 +5132,13 @@ union cvmx_mio_uart2_srts {
 union cvmx_mio_uart2_stt {
 	uint64_t u64;
 	struct cvmx_mio_uart2_stt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t stt:2;
+#else
+		uint64_t stt:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_mio_uart2_stt_s cn52xx;
 	struct cvmx_mio_uart2_stt_s cn52xxp1;
@@ -3290,8 +5147,13 @@ union cvmx_mio_uart2_stt {
 union cvmx_mio_uart2_tfl {
 	uint64_t u64;
 	struct cvmx_mio_uart2_tfl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t tfl:7;
+#else
+		uint64_t tfl:7;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_mio_uart2_tfl_s cn52xx;
 	struct cvmx_mio_uart2_tfl_s cn52xxp1;
@@ -3300,8 +5162,13 @@ union cvmx_mio_uart2_tfl {
 union cvmx_mio_uart2_tfr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_tfr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t tfr:8;
+#else
+		uint64_t tfr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_tfr_s cn52xx;
 	struct cvmx_mio_uart2_tfr_s cn52xxp1;
@@ -3310,8 +5177,13 @@ union cvmx_mio_uart2_tfr {
 union cvmx_mio_uart2_thr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_thr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t thr:8;
+#else
+		uint64_t thr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mio_uart2_thr_s cn52xx;
 	struct cvmx_mio_uart2_thr_s cn52xxp1;
@@ -3320,12 +5192,21 @@ union cvmx_mio_uart2_thr {
 union cvmx_mio_uart2_usr {
 	uint64_t u64;
 	struct cvmx_mio_uart2_usr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t rff:1;
 		uint64_t rfne:1;
 		uint64_t tfe:1;
 		uint64_t tfnf:1;
 		uint64_t busy:1;
+#else
+		uint64_t busy:1;
+		uint64_t tfnf:1;
+		uint64_t tfe:1;
+		uint64_t rfne:1;
+		uint64_t rff:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_mio_uart2_usr_s cn52xx;
 	struct cvmx_mio_uart2_usr_s cn52xxp1;
diff --git a/arch/mips/include/asm/octeon/cvmx-mixx-defs.h b/arch/mips/include/asm/octeon/cvmx-mixx-defs.h
index 7057c447e69..3155e6019dc 100644
--- a/arch/mips/include/asm/octeon/cvmx-mixx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-mixx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -47,6 +47,7 @@
 union cvmx_mixx_bist {
 	uint64_t u64;
 	struct cvmx_mixx_bist_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t opfdat:1;
 		uint64_t mrgdat:1;
@@ -54,24 +55,46 @@ union cvmx_mixx_bist {
 		uint64_t ipfdat:1;
 		uint64_t irfdat:1;
 		uint64_t orfdat:1;
+#else
+		uint64_t orfdat:1;
+		uint64_t irfdat:1;
+		uint64_t ipfdat:1;
+		uint64_t mrqdat:1;
+		uint64_t mrgdat:1;
+		uint64_t opfdat:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_mixx_bist_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t mrqdat:1;
 		uint64_t ipfdat:1;
 		uint64_t irfdat:1;
 		uint64_t orfdat:1;
+#else
+		uint64_t orfdat:1;
+		uint64_t irfdat:1;
+		uint64_t ipfdat:1;
+		uint64_t mrqdat:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn52xx;
 	struct cvmx_mixx_bist_cn52xx cn52xxp1;
 	struct cvmx_mixx_bist_cn52xx cn56xx;
 	struct cvmx_mixx_bist_cn52xx cn56xxp1;
+	struct cvmx_mixx_bist_s cn61xx;
 	struct cvmx_mixx_bist_s cn63xx;
 	struct cvmx_mixx_bist_s cn63xxp1;
+	struct cvmx_mixx_bist_s cn66xx;
+	struct cvmx_mixx_bist_s cn68xx;
+	struct cvmx_mixx_bist_s cn68xxp1;
 };
 
 union cvmx_mixx_ctl {
 	uint64_t u64;
 	struct cvmx_mixx_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t ts_thresh:4;
 		uint64_t crc_strip:1;
@@ -81,8 +104,20 @@ union cvmx_mixx_ctl {
 		uint64_t lendian:1;
 		uint64_t nbtarb:1;
 		uint64_t mrq_hwm:2;
+#else
+		uint64_t mrq_hwm:2;
+		uint64_t nbtarb:1;
+		uint64_t lendian:1;
+		uint64_t reset:1;
+		uint64_t en:1;
+		uint64_t busy:1;
+		uint64_t crc_strip:1;
+		uint64_t ts_thresh:4;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_mixx_ctl_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t crc_strip:1;
 		uint64_t busy:1;
@@ -91,17 +126,32 @@ union cvmx_mixx_ctl {
 		uint64_t lendian:1;
 		uint64_t nbtarb:1;
 		uint64_t mrq_hwm:2;
+#else
+		uint64_t mrq_hwm:2;
+		uint64_t nbtarb:1;
+		uint64_t lendian:1;
+		uint64_t reset:1;
+		uint64_t en:1;
+		uint64_t busy:1;
+		uint64_t crc_strip:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} cn52xx;
 	struct cvmx_mixx_ctl_cn52xx cn52xxp1;
 	struct cvmx_mixx_ctl_cn52xx cn56xx;
 	struct cvmx_mixx_ctl_cn52xx cn56xxp1;
+	struct cvmx_mixx_ctl_s cn61xx;
 	struct cvmx_mixx_ctl_s cn63xx;
 	struct cvmx_mixx_ctl_s cn63xxp1;
+	struct cvmx_mixx_ctl_s cn66xx;
+	struct cvmx_mixx_ctl_s cn68xx;
+	struct cvmx_mixx_ctl_s cn68xxp1;
 };
 
 union cvmx_mixx_intena {
 	uint64_t u64;
 	struct cvmx_mixx_intena_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t tsena:1;
 		uint64_t orunena:1;
@@ -111,8 +161,20 @@ union cvmx_mixx_intena {
 		uint64_t othena:1;
 		uint64_t ivfena:1;
 		uint64_t ovfena:1;
+#else
+		uint64_t ovfena:1;
+		uint64_t ivfena:1;
+		uint64_t othena:1;
+		uint64_t ithena:1;
+		uint64_t data_drpena:1;
+		uint64_t irunena:1;
+		uint64_t orunena:1;
+		uint64_t tsena:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mixx_intena_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t orunena:1;
 		uint64_t irunena:1;
@@ -121,84 +183,148 @@ union cvmx_mixx_intena {
 		uint64_t othena:1;
 		uint64_t ivfena:1;
 		uint64_t ovfena:1;
+#else
+		uint64_t ovfena:1;
+		uint64_t ivfena:1;
+		uint64_t othena:1;
+		uint64_t ithena:1;
+		uint64_t data_drpena:1;
+		uint64_t irunena:1;
+		uint64_t orunena:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} cn52xx;
 	struct cvmx_mixx_intena_cn52xx cn52xxp1;
 	struct cvmx_mixx_intena_cn52xx cn56xx;
 	struct cvmx_mixx_intena_cn52xx cn56xxp1;
+	struct cvmx_mixx_intena_s cn61xx;
 	struct cvmx_mixx_intena_s cn63xx;
 	struct cvmx_mixx_intena_s cn63xxp1;
+	struct cvmx_mixx_intena_s cn66xx;
+	struct cvmx_mixx_intena_s cn68xx;
+	struct cvmx_mixx_intena_s cn68xxp1;
 };
 
 union cvmx_mixx_ircnt {
 	uint64_t u64;
 	struct cvmx_mixx_ircnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t ircnt:20;
+#else
+		uint64_t ircnt:20;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_mixx_ircnt_s cn52xx;
 	struct cvmx_mixx_ircnt_s cn52xxp1;
 	struct cvmx_mixx_ircnt_s cn56xx;
 	struct cvmx_mixx_ircnt_s cn56xxp1;
+	struct cvmx_mixx_ircnt_s cn61xx;
 	struct cvmx_mixx_ircnt_s cn63xx;
 	struct cvmx_mixx_ircnt_s cn63xxp1;
+	struct cvmx_mixx_ircnt_s cn66xx;
+	struct cvmx_mixx_ircnt_s cn68xx;
+	struct cvmx_mixx_ircnt_s cn68xxp1;
 };
 
 union cvmx_mixx_irhwm {
 	uint64_t u64;
 	struct cvmx_mixx_irhwm_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t ibplwm:20;
 		uint64_t irhwm:20;
+#else
+		uint64_t irhwm:20;
+		uint64_t ibplwm:20;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_mixx_irhwm_s cn52xx;
 	struct cvmx_mixx_irhwm_s cn52xxp1;
 	struct cvmx_mixx_irhwm_s cn56xx;
 	struct cvmx_mixx_irhwm_s cn56xxp1;
+	struct cvmx_mixx_irhwm_s cn61xx;
 	struct cvmx_mixx_irhwm_s cn63xx;
 	struct cvmx_mixx_irhwm_s cn63xxp1;
+	struct cvmx_mixx_irhwm_s cn66xx;
+	struct cvmx_mixx_irhwm_s cn68xx;
+	struct cvmx_mixx_irhwm_s cn68xxp1;
 };
 
 union cvmx_mixx_iring1 {
 	uint64_t u64;
 	struct cvmx_mixx_iring1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_60_63:4;
 		uint64_t isize:20;
 		uint64_t ibase:37;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t ibase:37;
+		uint64_t isize:20;
+		uint64_t reserved_60_63:4;
+#endif
 	} s;
 	struct cvmx_mixx_iring1_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_60_63:4;
 		uint64_t isize:20;
 		uint64_t reserved_36_39:4;
 		uint64_t ibase:33;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t ibase:33;
+		uint64_t reserved_36_39:4;
+		uint64_t isize:20;
+		uint64_t reserved_60_63:4;
+#endif
 	} cn52xx;
 	struct cvmx_mixx_iring1_cn52xx cn52xxp1;
 	struct cvmx_mixx_iring1_cn52xx cn56xx;
 	struct cvmx_mixx_iring1_cn52xx cn56xxp1;
+	struct cvmx_mixx_iring1_s cn61xx;
 	struct cvmx_mixx_iring1_s cn63xx;
 	struct cvmx_mixx_iring1_s cn63xxp1;
+	struct cvmx_mixx_iring1_s cn66xx;
+	struct cvmx_mixx_iring1_s cn68xx;
+	struct cvmx_mixx_iring1_s cn68xxp1;
 };
 
 union cvmx_mixx_iring2 {
 	uint64_t u64;
 	struct cvmx_mixx_iring2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_52_63:12;
 		uint64_t itlptr:20;
 		uint64_t reserved_20_31:12;
 		uint64_t idbell:20;
+#else
+		uint64_t idbell:20;
+		uint64_t reserved_20_31:12;
+		uint64_t itlptr:20;
+		uint64_t reserved_52_63:12;
+#endif
 	} s;
 	struct cvmx_mixx_iring2_s cn52xx;
 	struct cvmx_mixx_iring2_s cn52xxp1;
 	struct cvmx_mixx_iring2_s cn56xx;
 	struct cvmx_mixx_iring2_s cn56xxp1;
+	struct cvmx_mixx_iring2_s cn61xx;
 	struct cvmx_mixx_iring2_s cn63xx;
 	struct cvmx_mixx_iring2_s cn63xxp1;
+	struct cvmx_mixx_iring2_s cn66xx;
+	struct cvmx_mixx_iring2_s cn68xx;
+	struct cvmx_mixx_iring2_s cn68xxp1;
 };
 
 union cvmx_mixx_isr {
 	uint64_t u64;
 	struct cvmx_mixx_isr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ts:1;
 		uint64_t orun:1;
@@ -208,8 +334,20 @@ union cvmx_mixx_isr {
 		uint64_t orthresh:1;
 		uint64_t idblovf:1;
 		uint64_t odblovf:1;
+#else
+		uint64_t odblovf:1;
+		uint64_t idblovf:1;
+		uint64_t orthresh:1;
+		uint64_t irthresh:1;
+		uint64_t data_drp:1;
+		uint64_t irun:1;
+		uint64_t orun:1;
+		uint64_t ts:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_mixx_isr_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t orun:1;
 		uint64_t irun:1;
@@ -218,117 +356,211 @@ union cvmx_mixx_isr {
 		uint64_t orthresh:1;
 		uint64_t idblovf:1;
 		uint64_t odblovf:1;
+#else
+		uint64_t odblovf:1;
+		uint64_t idblovf:1;
+		uint64_t orthresh:1;
+		uint64_t irthresh:1;
+		uint64_t data_drp:1;
+		uint64_t irun:1;
+		uint64_t orun:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} cn52xx;
 	struct cvmx_mixx_isr_cn52xx cn52xxp1;
 	struct cvmx_mixx_isr_cn52xx cn56xx;
 	struct cvmx_mixx_isr_cn52xx cn56xxp1;
+	struct cvmx_mixx_isr_s cn61xx;
 	struct cvmx_mixx_isr_s cn63xx;
 	struct cvmx_mixx_isr_s cn63xxp1;
+	struct cvmx_mixx_isr_s cn66xx;
+	struct cvmx_mixx_isr_s cn68xx;
+	struct cvmx_mixx_isr_s cn68xxp1;
 };
 
 union cvmx_mixx_orcnt {
 	uint64_t u64;
 	struct cvmx_mixx_orcnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t orcnt:20;
+#else
+		uint64_t orcnt:20;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_mixx_orcnt_s cn52xx;
 	struct cvmx_mixx_orcnt_s cn52xxp1;
 	struct cvmx_mixx_orcnt_s cn56xx;
 	struct cvmx_mixx_orcnt_s cn56xxp1;
+	struct cvmx_mixx_orcnt_s cn61xx;
 	struct cvmx_mixx_orcnt_s cn63xx;
 	struct cvmx_mixx_orcnt_s cn63xxp1;
+	struct cvmx_mixx_orcnt_s cn66xx;
+	struct cvmx_mixx_orcnt_s cn68xx;
+	struct cvmx_mixx_orcnt_s cn68xxp1;
 };
 
 union cvmx_mixx_orhwm {
 	uint64_t u64;
 	struct cvmx_mixx_orhwm_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t orhwm:20;
+#else
+		uint64_t orhwm:20;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_mixx_orhwm_s cn52xx;
 	struct cvmx_mixx_orhwm_s cn52xxp1;
 	struct cvmx_mixx_orhwm_s cn56xx;
 	struct cvmx_mixx_orhwm_s cn56xxp1;
+	struct cvmx_mixx_orhwm_s cn61xx;
 	struct cvmx_mixx_orhwm_s cn63xx;
 	struct cvmx_mixx_orhwm_s cn63xxp1;
+	struct cvmx_mixx_orhwm_s cn66xx;
+	struct cvmx_mixx_orhwm_s cn68xx;
+	struct cvmx_mixx_orhwm_s cn68xxp1;
 };
 
 union cvmx_mixx_oring1 {
 	uint64_t u64;
 	struct cvmx_mixx_oring1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_60_63:4;
 		uint64_t osize:20;
 		uint64_t obase:37;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t obase:37;
+		uint64_t osize:20;
+		uint64_t reserved_60_63:4;
+#endif
 	} s;
 	struct cvmx_mixx_oring1_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_60_63:4;
 		uint64_t osize:20;
 		uint64_t reserved_36_39:4;
 		uint64_t obase:33;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t obase:33;
+		uint64_t reserved_36_39:4;
+		uint64_t osize:20;
+		uint64_t reserved_60_63:4;
+#endif
 	} cn52xx;
 	struct cvmx_mixx_oring1_cn52xx cn52xxp1;
 	struct cvmx_mixx_oring1_cn52xx cn56xx;
 	struct cvmx_mixx_oring1_cn52xx cn56xxp1;
+	struct cvmx_mixx_oring1_s cn61xx;
 	struct cvmx_mixx_oring1_s cn63xx;
 	struct cvmx_mixx_oring1_s cn63xxp1;
+	struct cvmx_mixx_oring1_s cn66xx;
+	struct cvmx_mixx_oring1_s cn68xx;
+	struct cvmx_mixx_oring1_s cn68xxp1;
 };
 
 union cvmx_mixx_oring2 {
 	uint64_t u64;
 	struct cvmx_mixx_oring2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_52_63:12;
 		uint64_t otlptr:20;
 		uint64_t reserved_20_31:12;
 		uint64_t odbell:20;
+#else
+		uint64_t odbell:20;
+		uint64_t reserved_20_31:12;
+		uint64_t otlptr:20;
+		uint64_t reserved_52_63:12;
+#endif
 	} s;
 	struct cvmx_mixx_oring2_s cn52xx;
 	struct cvmx_mixx_oring2_s cn52xxp1;
 	struct cvmx_mixx_oring2_s cn56xx;
 	struct cvmx_mixx_oring2_s cn56xxp1;
+	struct cvmx_mixx_oring2_s cn61xx;
 	struct cvmx_mixx_oring2_s cn63xx;
 	struct cvmx_mixx_oring2_s cn63xxp1;
+	struct cvmx_mixx_oring2_s cn66xx;
+	struct cvmx_mixx_oring2_s cn68xx;
+	struct cvmx_mixx_oring2_s cn68xxp1;
 };
 
 union cvmx_mixx_remcnt {
 	uint64_t u64;
 	struct cvmx_mixx_remcnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_52_63:12;
 		uint64_t iremcnt:20;
 		uint64_t reserved_20_31:12;
 		uint64_t oremcnt:20;
+#else
+		uint64_t oremcnt:20;
+		uint64_t reserved_20_31:12;
+		uint64_t iremcnt:20;
+		uint64_t reserved_52_63:12;
+#endif
 	} s;
 	struct cvmx_mixx_remcnt_s cn52xx;
 	struct cvmx_mixx_remcnt_s cn52xxp1;
 	struct cvmx_mixx_remcnt_s cn56xx;
 	struct cvmx_mixx_remcnt_s cn56xxp1;
+	struct cvmx_mixx_remcnt_s cn61xx;
 	struct cvmx_mixx_remcnt_s cn63xx;
 	struct cvmx_mixx_remcnt_s cn63xxp1;
+	struct cvmx_mixx_remcnt_s cn66xx;
+	struct cvmx_mixx_remcnt_s cn68xx;
+	struct cvmx_mixx_remcnt_s cn68xxp1;
 };
 
 union cvmx_mixx_tsctl {
 	uint64_t u64;
 	struct cvmx_mixx_tsctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_21_63:43;
 		uint64_t tsavl:5;
 		uint64_t reserved_13_15:3;
 		uint64_t tstot:5;
 		uint64_t reserved_5_7:3;
 		uint64_t tscnt:5;
+#else
+		uint64_t tscnt:5;
+		uint64_t reserved_5_7:3;
+		uint64_t tstot:5;
+		uint64_t reserved_13_15:3;
+		uint64_t tsavl:5;
+		uint64_t reserved_21_63:43;
+#endif
 	} s;
+	struct cvmx_mixx_tsctl_s cn61xx;
 	struct cvmx_mixx_tsctl_s cn63xx;
 	struct cvmx_mixx_tsctl_s cn63xxp1;
+	struct cvmx_mixx_tsctl_s cn66xx;
+	struct cvmx_mixx_tsctl_s cn68xx;
+	struct cvmx_mixx_tsctl_s cn68xxp1;
 };
 
 union cvmx_mixx_tstamp {
 	uint64_t u64;
 	struct cvmx_mixx_tstamp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t tstamp:64;
+#else
+		uint64_t tstamp:64;
+#endif
 	} s;
+	struct cvmx_mixx_tstamp_s cn61xx;
 	struct cvmx_mixx_tstamp_s cn63xx;
 	struct cvmx_mixx_tstamp_s cn63xxp1;
+	struct cvmx_mixx_tstamp_s cn66xx;
+	struct cvmx_mixx_tstamp_s cn68xx;
+	struct cvmx_mixx_tstamp_s cn68xxp1;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-mpi-defs.h b/arch/mips/include/asm/octeon/cvmx-mpi-defs.h
new file mode 100644
index 00000000000..4615b102625
--- /dev/null
+++ b/arch/mips/include/asm/octeon/cvmx-mpi-defs.h
@@ -0,0 +1,328 @@
+/***********************license start***************
+ * Author: Cavium Networks
+ *
+ * Contact: support@caviumnetworks.com
+ * This file is part of the OCTEON SDK
+ *
+ * Copyright (c) 2003-2012 Cavium Networks
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, Version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful, but
+ * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
+ * NONINFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this file; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * or visit http://www.gnu.org/licenses/.
+ *
+ * This file may also be available under a different license from Cavium.
+ * Contact Cavium Networks for more information
+ ***********************license end**************************************/
+
+#ifndef __CVMX_MPI_DEFS_H__
+#define __CVMX_MPI_DEFS_H__
+
+#define CVMX_MPI_CFG (CVMX_ADD_IO_SEG(0x0001070000001000ull))
+#define CVMX_MPI_DATX(offset) (CVMX_ADD_IO_SEG(0x0001070000001080ull) + ((offset) & 15) * 8)
+#define CVMX_MPI_STS (CVMX_ADD_IO_SEG(0x0001070000001008ull))
+#define CVMX_MPI_TX (CVMX_ADD_IO_SEG(0x0001070000001010ull))
+
+union cvmx_mpi_cfg {
+	uint64_t u64;
+	struct cvmx_mpi_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t clkdiv:13;
+		uint64_t csena3:1;
+		uint64_t csena2:1;
+		uint64_t csena1:1;
+		uint64_t csena0:1;
+		uint64_t cslate:1;
+		uint64_t tritx:1;
+		uint64_t idleclks:2;
+		uint64_t cshi:1;
+		uint64_t csena:1;
+		uint64_t int_ena:1;
+		uint64_t lsbfirst:1;
+		uint64_t wireor:1;
+		uint64_t clk_cont:1;
+		uint64_t idlelo:1;
+		uint64_t enable:1;
+#else
+		uint64_t enable:1;
+		uint64_t idlelo:1;
+		uint64_t clk_cont:1;
+		uint64_t wireor:1;
+		uint64_t lsbfirst:1;
+		uint64_t int_ena:1;
+		uint64_t csena:1;
+		uint64_t cshi:1;
+		uint64_t idleclks:2;
+		uint64_t tritx:1;
+		uint64_t cslate:1;
+		uint64_t csena0:1;
+		uint64_t csena1:1;
+		uint64_t csena2:1;
+		uint64_t csena3:1;
+		uint64_t clkdiv:13;
+		uint64_t reserved_29_63:35;
+#endif
+	} s;
+	struct cvmx_mpi_cfg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t clkdiv:13;
+		uint64_t reserved_12_15:4;
+		uint64_t cslate:1;
+		uint64_t tritx:1;
+		uint64_t idleclks:2;
+		uint64_t cshi:1;
+		uint64_t csena:1;
+		uint64_t int_ena:1;
+		uint64_t lsbfirst:1;
+		uint64_t wireor:1;
+		uint64_t clk_cont:1;
+		uint64_t idlelo:1;
+		uint64_t enable:1;
+#else
+		uint64_t enable:1;
+		uint64_t idlelo:1;
+		uint64_t clk_cont:1;
+		uint64_t wireor:1;
+		uint64_t lsbfirst:1;
+		uint64_t int_ena:1;
+		uint64_t csena:1;
+		uint64_t cshi:1;
+		uint64_t idleclks:2;
+		uint64_t tritx:1;
+		uint64_t cslate:1;
+		uint64_t reserved_12_15:4;
+		uint64_t clkdiv:13;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn30xx;
+	struct cvmx_mpi_cfg_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t clkdiv:13;
+		uint64_t reserved_11_15:5;
+		uint64_t tritx:1;
+		uint64_t idleclks:2;
+		uint64_t cshi:1;
+		uint64_t csena:1;
+		uint64_t int_ena:1;
+		uint64_t lsbfirst:1;
+		uint64_t wireor:1;
+		uint64_t clk_cont:1;
+		uint64_t idlelo:1;
+		uint64_t enable:1;
+#else
+		uint64_t enable:1;
+		uint64_t idlelo:1;
+		uint64_t clk_cont:1;
+		uint64_t wireor:1;
+		uint64_t lsbfirst:1;
+		uint64_t int_ena:1;
+		uint64_t csena:1;
+		uint64_t cshi:1;
+		uint64_t idleclks:2;
+		uint64_t tritx:1;
+		uint64_t reserved_11_15:5;
+		uint64_t clkdiv:13;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn31xx;
+	struct cvmx_mpi_cfg_cn30xx cn50xx;
+	struct cvmx_mpi_cfg_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t clkdiv:13;
+		uint64_t reserved_14_15:2;
+		uint64_t csena1:1;
+		uint64_t csena0:1;
+		uint64_t cslate:1;
+		uint64_t tritx:1;
+		uint64_t idleclks:2;
+		uint64_t cshi:1;
+		uint64_t reserved_6_6:1;
+		uint64_t int_ena:1;
+		uint64_t lsbfirst:1;
+		uint64_t wireor:1;
+		uint64_t clk_cont:1;
+		uint64_t idlelo:1;
+		uint64_t enable:1;
+#else
+		uint64_t enable:1;
+		uint64_t idlelo:1;
+		uint64_t clk_cont:1;
+		uint64_t wireor:1;
+		uint64_t lsbfirst:1;
+		uint64_t int_ena:1;
+		uint64_t reserved_6_6:1;
+		uint64_t cshi:1;
+		uint64_t idleclks:2;
+		uint64_t tritx:1;
+		uint64_t cslate:1;
+		uint64_t csena0:1;
+		uint64_t csena1:1;
+		uint64_t reserved_14_15:2;
+		uint64_t clkdiv:13;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn61xx;
+	struct cvmx_mpi_cfg_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t clkdiv:13;
+		uint64_t csena3:1;
+		uint64_t csena2:1;
+		uint64_t reserved_12_13:2;
+		uint64_t cslate:1;
+		uint64_t tritx:1;
+		uint64_t idleclks:2;
+		uint64_t cshi:1;
+		uint64_t reserved_6_6:1;
+		uint64_t int_ena:1;
+		uint64_t lsbfirst:1;
+		uint64_t wireor:1;
+		uint64_t clk_cont:1;
+		uint64_t idlelo:1;
+		uint64_t enable:1;
+#else
+		uint64_t enable:1;
+		uint64_t idlelo:1;
+		uint64_t clk_cont:1;
+		uint64_t wireor:1;
+		uint64_t lsbfirst:1;
+		uint64_t int_ena:1;
+		uint64_t reserved_6_6:1;
+		uint64_t cshi:1;
+		uint64_t idleclks:2;
+		uint64_t tritx:1;
+		uint64_t cslate:1;
+		uint64_t reserved_12_13:2;
+		uint64_t csena2:1;
+		uint64_t csena3:1;
+		uint64_t clkdiv:13;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn66xx;
+	struct cvmx_mpi_cfg_cn61xx cnf71xx;
+};
+
+union cvmx_mpi_datx {
+	uint64_t u64;
+	struct cvmx_mpi_datx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_8_63:56;
+		uint64_t data:8;
+#else
+		uint64_t data:8;
+		uint64_t reserved_8_63:56;
+#endif
+	} s;
+	struct cvmx_mpi_datx_s cn30xx;
+	struct cvmx_mpi_datx_s cn31xx;
+	struct cvmx_mpi_datx_s cn50xx;
+	struct cvmx_mpi_datx_s cn61xx;
+	struct cvmx_mpi_datx_s cn66xx;
+	struct cvmx_mpi_datx_s cnf71xx;
+};
+
+union cvmx_mpi_sts {
+	uint64_t u64;
+	struct cvmx_mpi_sts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_13_63:51;
+		uint64_t rxnum:5;
+		uint64_t reserved_1_7:7;
+		uint64_t busy:1;
+#else
+		uint64_t busy:1;
+		uint64_t reserved_1_7:7;
+		uint64_t rxnum:5;
+		uint64_t reserved_13_63:51;
+#endif
+	} s;
+	struct cvmx_mpi_sts_s cn30xx;
+	struct cvmx_mpi_sts_s cn31xx;
+	struct cvmx_mpi_sts_s cn50xx;
+	struct cvmx_mpi_sts_s cn61xx;
+	struct cvmx_mpi_sts_s cn66xx;
+	struct cvmx_mpi_sts_s cnf71xx;
+};
+
+union cvmx_mpi_tx {
+	uint64_t u64;
+	struct cvmx_mpi_tx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_22_63:42;
+		uint64_t csid:2;
+		uint64_t reserved_17_19:3;
+		uint64_t leavecs:1;
+		uint64_t reserved_13_15:3;
+		uint64_t txnum:5;
+		uint64_t reserved_5_7:3;
+		uint64_t totnum:5;
+#else
+		uint64_t totnum:5;
+		uint64_t reserved_5_7:3;
+		uint64_t txnum:5;
+		uint64_t reserved_13_15:3;
+		uint64_t leavecs:1;
+		uint64_t reserved_17_19:3;
+		uint64_t csid:2;
+		uint64_t reserved_22_63:42;
+#endif
+	} s;
+	struct cvmx_mpi_tx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_17_63:47;
+		uint64_t leavecs:1;
+		uint64_t reserved_13_15:3;
+		uint64_t txnum:5;
+		uint64_t reserved_5_7:3;
+		uint64_t totnum:5;
+#else
+		uint64_t totnum:5;
+		uint64_t reserved_5_7:3;
+		uint64_t txnum:5;
+		uint64_t reserved_13_15:3;
+		uint64_t leavecs:1;
+		uint64_t reserved_17_63:47;
+#endif
+	} cn30xx;
+	struct cvmx_mpi_tx_cn30xx cn31xx;
+	struct cvmx_mpi_tx_cn30xx cn50xx;
+	struct cvmx_mpi_tx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_21_63:43;
+		uint64_t csid:1;
+		uint64_t reserved_17_19:3;
+		uint64_t leavecs:1;
+		uint64_t reserved_13_15:3;
+		uint64_t txnum:5;
+		uint64_t reserved_5_7:3;
+		uint64_t totnum:5;
+#else
+		uint64_t totnum:5;
+		uint64_t reserved_5_7:3;
+		uint64_t txnum:5;
+		uint64_t reserved_13_15:3;
+		uint64_t leavecs:1;
+		uint64_t reserved_17_19:3;
+		uint64_t csid:1;
+		uint64_t reserved_21_63:43;
+#endif
+	} cn61xx;
+	struct cvmx_mpi_tx_s cn66xx;
+	struct cvmx_mpi_tx_cn61xx cnf71xx;
+};
+
+#endif
diff --git a/arch/mips/include/asm/octeon/cvmx-npei-defs.h b/arch/mips/include/asm/octeon/cvmx-npei-defs.h
index a3075f733ca..58114d41435 100644
--- a/arch/mips/include/asm/octeon/cvmx-npei-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-npei-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2011 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -140,11 +140,19 @@
 union cvmx_npei_bar1_indexx {
 	uint32_t u32;
 	struct cvmx_npei_bar1_indexx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_18_31:14;
 		uint32_t addr_idx:14;
 		uint32_t ca:1;
 		uint32_t end_swp:2;
 		uint32_t addr_v:1;
+#else
+		uint32_t addr_v:1;
+		uint32_t end_swp:2;
+		uint32_t ca:1;
+		uint32_t addr_idx:14;
+		uint32_t reserved_18_31:14;
+#endif
 	} s;
 	struct cvmx_npei_bar1_indexx_s cn52xx;
 	struct cvmx_npei_bar1_indexx_s cn52xxp1;
@@ -155,6 +163,7 @@ union cvmx_npei_bar1_indexx {
 union cvmx_npei_bist_status {
 	uint64_t u64;
 	struct cvmx_npei_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t pkt_rdf:1;
 		uint64_t reserved_60_62:3;
 		uint64_t pcr_gim:1;
@@ -204,8 +213,60 @@ union cvmx_npei_bist_status {
 		uint64_t reserved_2_2:1;
 		uint64_t msi:1;
 		uint64_t ncb_cmd:1;
+#else
+		uint64_t ncb_cmd:1;
+		uint64_t msi:1;
+		uint64_t reserved_2_2:1;
+		uint64_t dif3:1;
+		uint64_t dif2:1;
+		uint64_t dif1:1;
+		uint64_t dif0:1;
+		uint64_t csm1:1;
+		uint64_t csm0:1;
+		uint64_t p2n1_p1:1;
+		uint64_t p2n1_p0:1;
+		uint64_t p2n1_n:1;
+		uint64_t p2n1_c1:1;
+		uint64_t p2n1_c0:1;
+		uint64_t p2n0_p1:1;
+		uint64_t p2n0_p0:1;
+		uint64_t p2n0_n:1;
+		uint64_t p2n0_c1:1;
+		uint64_t p2n0_c0:1;
+		uint64_t p2n0_co:1;
+		uint64_t p2n0_no:1;
+		uint64_t p2n0_po:1;
+		uint64_t p2n1_co:1;
+		uint64_t p2n1_no:1;
+		uint64_t p2n1_po:1;
+		uint64_t cpl_p1:1;
+		uint64_t cpl_p0:1;
+		uint64_t n2p1_o:1;
+		uint64_t n2p1_c:1;
+		uint64_t n2p0_o:1;
+		uint64_t n2p0_c:1;
+		uint64_t reserved_31_31:1;
+		uint64_t d3_pst:1;
+		uint64_t d2_pst:1;
+		uint64_t d1_pst:1;
+		uint64_t d0_pst:1;
+		uint64_t reserved_36_47:12;
+		uint64_t pkt_slm:1;
+		uint64_t pkt_ind:1;
+		uint64_t reserved_50_52:3;
+		uint64_t pcsr_sl:1;
+		uint64_t pcsr_id:1;
+		uint64_t pcsr_cnt:1;
+		uint64_t pcsr_im:1;
+		uint64_t pcsr_int:1;
+		uint64_t pkt_pif:1;
+		uint64_t pcr_gim:1;
+		uint64_t reserved_60_62:3;
+		uint64_t pkt_rdf:1;
+#endif
 	} s;
 	struct cvmx_npei_bist_status_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t pkt_rdf:1;
 		uint64_t reserved_60_62:3;
 		uint64_t pcr_gim:1;
@@ -264,8 +325,69 @@ union cvmx_npei_bist_status {
 		uint64_t dif4:1;
 		uint64_t msi:1;
 		uint64_t ncb_cmd:1;
+#else
+		uint64_t ncb_cmd:1;
+		uint64_t msi:1;
+		uint64_t dif4:1;
+		uint64_t dif3:1;
+		uint64_t dif2:1;
+		uint64_t dif1:1;
+		uint64_t dif0:1;
+		uint64_t csm1:1;
+		uint64_t csm0:1;
+		uint64_t p2n1_p1:1;
+		uint64_t p2n1_p0:1;
+		uint64_t p2n1_n:1;
+		uint64_t p2n1_c1:1;
+		uint64_t p2n1_c0:1;
+		uint64_t p2n0_p1:1;
+		uint64_t p2n0_p0:1;
+		uint64_t p2n0_n:1;
+		uint64_t p2n0_c1:1;
+		uint64_t p2n0_c0:1;
+		uint64_t p2n0_co:1;
+		uint64_t p2n0_no:1;
+		uint64_t p2n0_po:1;
+		uint64_t p2n1_co:1;
+		uint64_t p2n1_no:1;
+		uint64_t p2n1_po:1;
+		uint64_t cpl_p1:1;
+		uint64_t cpl_p0:1;
+		uint64_t n2p1_o:1;
+		uint64_t n2p1_c:1;
+		uint64_t n2p0_o:1;
+		uint64_t n2p0_c:1;
+		uint64_t d4_pst:1;
+		uint64_t d3_pst:1;
+		uint64_t d2_pst:1;
+		uint64_t d1_pst:1;
+		uint64_t d0_pst:1;
+		uint64_t reserved_36_39:4;
+		uint64_t ds_mem:1;
+		uint64_t d4_mem:1;
+		uint64_t d3_mem:1;
+		uint64_t d2_mem:1;
+		uint64_t d1_mem:1;
+		uint64_t d0_mem:1;
+		uint64_t pkt_pop1:1;
+		uint64_t pkt_pop0:1;
+		uint64_t reserved_48_49:2;
+		uint64_t pkt_pof:1;
+		uint64_t pkt_pfm:1;
+		uint64_t pkt_imem:1;
+		uint64_t pcsr_sl:1;
+		uint64_t pcsr_id:1;
+		uint64_t pcsr_cnt:1;
+		uint64_t pcsr_im:1;
+		uint64_t pcsr_int:1;
+		uint64_t pkt_pif:1;
+		uint64_t pcr_gim:1;
+		uint64_t reserved_60_62:3;
+		uint64_t pkt_rdf:1;
+#endif
 	} cn52xx;
 	struct cvmx_npei_bist_status_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_46_63:18;
 		uint64_t d0_mem0:1;
 		uint64_t d1_mem1:1;
@@ -313,9 +435,59 @@ union cvmx_npei_bist_status {
 		uint64_t dr3_mem:1;
 		uint64_t msi:1;
 		uint64_t ncb_cmd:1;
+#else
+		uint64_t ncb_cmd:1;
+		uint64_t msi:1;
+		uint64_t dr3_mem:1;
+		uint64_t dif3:1;
+		uint64_t dif2:1;
+		uint64_t dif1:1;
+		uint64_t dif0:1;
+		uint64_t csm1:1;
+		uint64_t csm0:1;
+		uint64_t p2n1_p1:1;
+		uint64_t p2n1_p0:1;
+		uint64_t p2n1_n:1;
+		uint64_t p2n1_c1:1;
+		uint64_t p2n1_c0:1;
+		uint64_t p2n0_p1:1;
+		uint64_t p2n0_p0:1;
+		uint64_t p2n0_n:1;
+		uint64_t p2n0_c1:1;
+		uint64_t p2n0_c0:1;
+		uint64_t p2n0_co:1;
+		uint64_t p2n0_no:1;
+		uint64_t p2n0_po:1;
+		uint64_t p2n1_co:1;
+		uint64_t p2n1_no:1;
+		uint64_t p2n1_po:1;
+		uint64_t cpl_p1:1;
+		uint64_t cpl_p0:1;
+		uint64_t n2p1_o:1;
+		uint64_t n2p1_c:1;
+		uint64_t n2p0_o:1;
+		uint64_t n2p0_c:1;
+		uint64_t dr2_mem:1;
+		uint64_t d3_pst:1;
+		uint64_t d2_pst:1;
+		uint64_t d1_pst:1;
+		uint64_t d0_pst:1;
+		uint64_t dr1_mem:1;
+		uint64_t d3_mem:1;
+		uint64_t d2_mem:1;
+		uint64_t d1_mem:1;
+		uint64_t d0_mem:1;
+		uint64_t dr0_mem:1;
+		uint64_t d3_mem3:1;
+		uint64_t d2_mem2:1;
+		uint64_t d1_mem1:1;
+		uint64_t d0_mem0:1;
+		uint64_t reserved_46_63:18;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_bist_status_cn52xx cn56xx;
 	struct cvmx_npei_bist_status_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_58_63:6;
 		uint64_t pcsr_int:1;
 		uint64_t pcsr_im:1;
@@ -375,12 +547,74 @@ union cvmx_npei_bist_status {
 		uint64_t dif4:1;
 		uint64_t msi:1;
 		uint64_t ncb_cmd:1;
+#else
+		uint64_t ncb_cmd:1;
+		uint64_t msi:1;
+		uint64_t dif4:1;
+		uint64_t dif3:1;
+		uint64_t dif2:1;
+		uint64_t dif1:1;
+		uint64_t dif0:1;
+		uint64_t csm1:1;
+		uint64_t csm0:1;
+		uint64_t p2n1_p1:1;
+		uint64_t p2n1_p0:1;
+		uint64_t p2n1_n:1;
+		uint64_t p2n1_c1:1;
+		uint64_t p2n1_c0:1;
+		uint64_t p2n0_p1:1;
+		uint64_t p2n0_p0:1;
+		uint64_t p2n0_n:1;
+		uint64_t p2n0_c1:1;
+		uint64_t p2n0_c0:1;
+		uint64_t p2n0_co:1;
+		uint64_t p2n0_no:1;
+		uint64_t p2n0_po:1;
+		uint64_t p2n1_co:1;
+		uint64_t p2n1_no:1;
+		uint64_t p2n1_po:1;
+		uint64_t cpl_p1:1;
+		uint64_t cpl_p0:1;
+		uint64_t n2p1_o:1;
+		uint64_t n2p1_c:1;
+		uint64_t n2p0_o:1;
+		uint64_t n2p0_c:1;
+		uint64_t d4_pst:1;
+		uint64_t d3_pst:1;
+		uint64_t d2_pst:1;
+		uint64_t d1_pst:1;
+		uint64_t d0_pst:1;
+		uint64_t d4_mem:1;
+		uint64_t d3_mem:1;
+		uint64_t d2_mem:1;
+		uint64_t d1_mem:1;
+		uint64_t d0_mem:1;
+		uint64_t pkt_s1:1;
+		uint64_t pkt_s0:1;
+		uint64_t pkt_i1:1;
+		uint64_t pkt_i0:1;
+		uint64_t pkt_out:1;
+		uint64_t pkt_oif:1;
+		uint64_t pkt_odf:1;
+		uint64_t pkt_slm:1;
+		uint64_t pkt_ind:1;
+		uint64_t pkt_cntm:1;
+		uint64_t pkt_imem:1;
+		uint64_t pkt_pout:1;
+		uint64_t pcsr_sl:1;
+		uint64_t pcsr_id:1;
+		uint64_t pcsr_cnt:1;
+		uint64_t pcsr_im:1;
+		uint64_t pcsr_int:1;
+		uint64_t reserved_58_63:6;
+#endif
 	} cn56xxp1;
 };
 
 union cvmx_npei_bist_status2 {
 	uint64_t u64;
 	struct cvmx_npei_bist_status2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t prd_tag:1;
 		uint64_t prd_st0:1;
@@ -396,6 +630,23 @@ union cvmx_npei_bist_status2 {
 		uint64_t pkt_gd:1;
 		uint64_t pkt_gl:1;
 		uint64_t pkt_blk:1;
+#else
+		uint64_t pkt_blk:1;
+		uint64_t pkt_gl:1;
+		uint64_t pkt_gd:1;
+		uint64_t psc_p1:1;
+		uint64_t psc_p0:1;
+		uint64_t pkt_rd:1;
+		uint64_t nwe_wr1:1;
+		uint64_t nwe_wr0:1;
+		uint64_t nwe_st:1;
+		uint64_t nrd_st:1;
+		uint64_t prd_err:1;
+		uint64_t prd_st1:1;
+		uint64_t prd_st0:1;
+		uint64_t prd_tag:1;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_npei_bist_status2_s cn52xx;
 	struct cvmx_npei_bist_status2_s cn56xx;
@@ -404,6 +655,7 @@ union cvmx_npei_bist_status2 {
 union cvmx_npei_ctl_port0 {
 	uint64_t u64;
 	struct cvmx_npei_ctl_port0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_21_63:43;
 		uint64_t waitl_com:1;
 		uint64_t intd:1;
@@ -421,6 +673,25 @@ union cvmx_npei_ctl_port0 {
 		uint64_t bar2_esx:2;
 		uint64_t bar2_cax:1;
 		uint64_t wait_com:1;
+#else
+		uint64_t wait_com:1;
+		uint64_t bar2_cax:1;
+		uint64_t bar2_esx:2;
+		uint64_t bar2_enb:1;
+		uint64_t ptlp_ro:1;
+		uint64_t reserved_6_6:1;
+		uint64_t ctlp_ro:1;
+		uint64_t inta_map:2;
+		uint64_t intb_map:2;
+		uint64_t intc_map:2;
+		uint64_t intd_map:2;
+		uint64_t inta:1;
+		uint64_t intb:1;
+		uint64_t intc:1;
+		uint64_t intd:1;
+		uint64_t waitl_com:1;
+		uint64_t reserved_21_63:43;
+#endif
 	} s;
 	struct cvmx_npei_ctl_port0_s cn52xx;
 	struct cvmx_npei_ctl_port0_s cn52xxp1;
@@ -431,6 +702,7 @@ union cvmx_npei_ctl_port0 {
 union cvmx_npei_ctl_port1 {
 	uint64_t u64;
 	struct cvmx_npei_ctl_port1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_21_63:43;
 		uint64_t waitl_com:1;
 		uint64_t intd:1;
@@ -448,6 +720,25 @@ union cvmx_npei_ctl_port1 {
 		uint64_t bar2_esx:2;
 		uint64_t bar2_cax:1;
 		uint64_t wait_com:1;
+#else
+		uint64_t wait_com:1;
+		uint64_t bar2_cax:1;
+		uint64_t bar2_esx:2;
+		uint64_t bar2_enb:1;
+		uint64_t ptlp_ro:1;
+		uint64_t reserved_6_6:1;
+		uint64_t ctlp_ro:1;
+		uint64_t inta_map:2;
+		uint64_t intb_map:2;
+		uint64_t intc_map:2;
+		uint64_t intd_map:2;
+		uint64_t inta:1;
+		uint64_t intb:1;
+		uint64_t intc:1;
+		uint64_t intd:1;
+		uint64_t waitl_com:1;
+		uint64_t reserved_21_63:43;
+#endif
 	} s;
 	struct cvmx_npei_ctl_port1_s cn52xx;
 	struct cvmx_npei_ctl_port1_s cn52xxp1;
@@ -458,6 +749,7 @@ union cvmx_npei_ctl_port1 {
 union cvmx_npei_ctl_status {
 	uint64_t u64;
 	struct cvmx_npei_ctl_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t p1_ntags:6;
 		uint64_t p0_ntags:6;
@@ -468,9 +760,22 @@ union cvmx_npei_ctl_status {
 		uint64_t pkt_bp:4;
 		uint64_t host_mode:1;
 		uint64_t chip_rev:8;
+#else
+		uint64_t chip_rev:8;
+		uint64_t host_mode:1;
+		uint64_t pkt_bp:4;
+		uint64_t arb:1;
+		uint64_t lnk_rst:1;
+		uint64_t ring_en:1;
+		uint64_t cfg_rtry:16;
+		uint64_t p0_ntags:6;
+		uint64_t p1_ntags:6;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_npei_ctl_status_s cn52xx;
 	struct cvmx_npei_ctl_status_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t p1_ntags:6;
 		uint64_t p0_ntags:6;
@@ -481,21 +786,43 @@ union cvmx_npei_ctl_status {
 		uint64_t reserved_9_12:4;
 		uint64_t host_mode:1;
 		uint64_t chip_rev:8;
+#else
+		uint64_t chip_rev:8;
+		uint64_t host_mode:1;
+		uint64_t reserved_9_12:4;
+		uint64_t arb:1;
+		uint64_t lnk_rst:1;
+		uint64_t reserved_15_15:1;
+		uint64_t cfg_rtry:16;
+		uint64_t p0_ntags:6;
+		uint64_t p1_ntags:6;
+		uint64_t reserved_44_63:20;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_ctl_status_s cn56xx;
 	struct cvmx_npei_ctl_status_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_15_63:49;
 		uint64_t lnk_rst:1;
 		uint64_t arb:1;
 		uint64_t pkt_bp:4;
 		uint64_t host_mode:1;
 		uint64_t chip_rev:8;
+#else
+		uint64_t chip_rev:8;
+		uint64_t host_mode:1;
+		uint64_t pkt_bp:4;
+		uint64_t arb:1;
+		uint64_t lnk_rst:1;
+		uint64_t reserved_15_63:49;
+#endif
 	} cn56xxp1;
 };
 
 union cvmx_npei_ctl_status2 {
 	uint64_t u64;
 	struct cvmx_npei_ctl_status2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t mps:1;
 		uint64_t mrrs:3;
@@ -507,6 +834,19 @@ union cvmx_npei_ctl_status2 {
 		uint64_t c1_b0_d:1;
 		uint64_t c0_wi_d:1;
 		uint64_t c0_b0_d:1;
+#else
+		uint64_t c0_b0_d:1;
+		uint64_t c0_wi_d:1;
+		uint64_t c1_b0_d:1;
+		uint64_t c1_wi_d:1;
+		uint64_t c0_b1_s:3;
+		uint64_t c1_b1_s:3;
+		uint64_t c0_w_flt:1;
+		uint64_t c1_w_flt:1;
+		uint64_t mrrs:3;
+		uint64_t mps:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_npei_ctl_status2_s cn52xx;
 	struct cvmx_npei_ctl_status2_s cn52xxp1;
@@ -517,11 +857,19 @@ union cvmx_npei_ctl_status2 {
 union cvmx_npei_data_out_cnt {
 	uint64_t u64;
 	struct cvmx_npei_data_out_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t p1_ucnt:16;
 		uint64_t p1_fcnt:6;
 		uint64_t p0_ucnt:16;
 		uint64_t p0_fcnt:6;
+#else
+		uint64_t p0_fcnt:6;
+		uint64_t p0_ucnt:16;
+		uint64_t p1_fcnt:6;
+		uint64_t p1_ucnt:16;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_npei_data_out_cnt_s cn52xx;
 	struct cvmx_npei_data_out_cnt_s cn52xxp1;
@@ -532,6 +880,7 @@ union cvmx_npei_data_out_cnt {
 union cvmx_npei_dbg_data {
 	uint64_t u64;
 	struct cvmx_npei_dbg_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t qlm0_rev_lanes:1;
 		uint64_t reserved_25_26:2;
@@ -539,8 +888,18 @@ union cvmx_npei_dbg_data {
 		uint64_t c_mul:5;
 		uint64_t dsel_ext:1;
 		uint64_t data:17;
+#else
+		uint64_t data:17;
+		uint64_t dsel_ext:1;
+		uint64_t c_mul:5;
+		uint64_t qlm1_spd:2;
+		uint64_t reserved_25_26:2;
+		uint64_t qlm0_rev_lanes:1;
+		uint64_t reserved_28_63:36;
+#endif
 	} s;
 	struct cvmx_npei_dbg_data_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t qlm0_link_width:1;
 		uint64_t qlm0_rev_lanes:1;
@@ -549,9 +908,20 @@ union cvmx_npei_dbg_data {
 		uint64_t c_mul:5;
 		uint64_t dsel_ext:1;
 		uint64_t data:17;
+#else
+		uint64_t data:17;
+		uint64_t dsel_ext:1;
+		uint64_t c_mul:5;
+		uint64_t qlm1_spd:2;
+		uint64_t qlm1_mode:2;
+		uint64_t qlm0_rev_lanes:1;
+		uint64_t qlm0_link_width:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn52xx;
 	struct cvmx_npei_dbg_data_cn52xx cn52xxp1;
 	struct cvmx_npei_dbg_data_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t qlm2_rev_lanes:1;
 		uint64_t qlm0_rev_lanes:1;
@@ -560,6 +930,16 @@ union cvmx_npei_dbg_data {
 		uint64_t c_mul:5;
 		uint64_t dsel_ext:1;
 		uint64_t data:17;
+#else
+		uint64_t data:17;
+		uint64_t dsel_ext:1;
+		uint64_t c_mul:5;
+		uint64_t qlm1_spd:2;
+		uint64_t qlm3_spd:2;
+		uint64_t qlm0_rev_lanes:1;
+		uint64_t qlm2_rev_lanes:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn56xx;
 	struct cvmx_npei_dbg_data_cn56xx cn56xxp1;
 };
@@ -567,8 +947,13 @@ union cvmx_npei_dbg_data {
 union cvmx_npei_dbg_select {
 	uint64_t u64;
 	struct cvmx_npei_dbg_select_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t dbg_sel:16;
+#else
+		uint64_t dbg_sel:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_npei_dbg_select_s cn52xx;
 	struct cvmx_npei_dbg_select_s cn52xxp1;
@@ -579,9 +964,15 @@ union cvmx_npei_dbg_select {
 union cvmx_npei_dmax_counts {
 	uint64_t u64;
 	struct cvmx_npei_dmax_counts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_39_63:25;
 		uint64_t fcnt:7;
 		uint64_t dbell:32;
+#else
+		uint64_t dbell:32;
+		uint64_t fcnt:7;
+		uint64_t reserved_39_63:25;
+#endif
 	} s;
 	struct cvmx_npei_dmax_counts_s cn52xx;
 	struct cvmx_npei_dmax_counts_s cn52xxp1;
@@ -592,8 +983,13 @@ union cvmx_npei_dmax_counts {
 union cvmx_npei_dmax_dbell {
 	uint32_t u32;
 	struct cvmx_npei_dmax_dbell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_16_31:16;
 		uint32_t dbell:16;
+#else
+		uint32_t dbell:16;
+		uint32_t reserved_16_31:16;
+#endif
 	} s;
 	struct cvmx_npei_dmax_dbell_s cn52xx;
 	struct cvmx_npei_dmax_dbell_s cn52xxp1;
@@ -604,16 +1000,29 @@ union cvmx_npei_dmax_dbell {
 union cvmx_npei_dmax_ibuff_saddr {
 	uint64_t u64;
 	struct cvmx_npei_dmax_ibuff_saddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t idle:1;
 		uint64_t saddr:29;
 		uint64_t reserved_0_6:7;
+#else
+		uint64_t reserved_0_6:7;
+		uint64_t saddr:29;
+		uint64_t idle:1;
+		uint64_t reserved_37_63:27;
+#endif
 	} s;
 	struct cvmx_npei_dmax_ibuff_saddr_s cn52xx;
 	struct cvmx_npei_dmax_ibuff_saddr_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t saddr:29;
 		uint64_t reserved_0_6:7;
+#else
+		uint64_t reserved_0_6:7;
+		uint64_t saddr:29;
+		uint64_t reserved_36_63:28;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_dmax_ibuff_saddr_s cn56xx;
 	struct cvmx_npei_dmax_ibuff_saddr_cn52xxp1 cn56xxp1;
@@ -622,8 +1031,13 @@ union cvmx_npei_dmax_ibuff_saddr {
 union cvmx_npei_dmax_naddr {
 	uint64_t u64;
 	struct cvmx_npei_dmax_naddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t addr:36;
+#else
+		uint64_t addr:36;
+		uint64_t reserved_36_63:28;
+#endif
 	} s;
 	struct cvmx_npei_dmax_naddr_s cn52xx;
 	struct cvmx_npei_dmax_naddr_s cn52xxp1;
@@ -634,8 +1048,13 @@ union cvmx_npei_dmax_naddr {
 union cvmx_npei_dma0_int_level {
 	uint64_t u64;
 	struct cvmx_npei_dma0_int_level_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t time:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t time:32;
+#endif
 	} s;
 	struct cvmx_npei_dma0_int_level_s cn52xx;
 	struct cvmx_npei_dma0_int_level_s cn52xxp1;
@@ -646,8 +1065,13 @@ union cvmx_npei_dma0_int_level {
 union cvmx_npei_dma1_int_level {
 	uint64_t u64;
 	struct cvmx_npei_dma1_int_level_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t time:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t time:32;
+#endif
 	} s;
 	struct cvmx_npei_dma1_int_level_s cn52xx;
 	struct cvmx_npei_dma1_int_level_s cn52xxp1;
@@ -658,8 +1082,13 @@ union cvmx_npei_dma1_int_level {
 union cvmx_npei_dma_cnts {
 	uint64_t u64;
 	struct cvmx_npei_dma_cnts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t dma1:32;
 		uint64_t dma0:32;
+#else
+		uint64_t dma0:32;
+		uint64_t dma1:32;
+#endif
 	} s;
 	struct cvmx_npei_dma_cnts_s cn52xx;
 	struct cvmx_npei_dma_cnts_s cn52xxp1;
@@ -670,6 +1099,7 @@ union cvmx_npei_dma_cnts {
 union cvmx_npei_dma_control {
 	uint64_t u64;
 	struct cvmx_npei_dma_control_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t p_32b_m:1;
 		uint64_t dma4_enb:1;
@@ -687,9 +1117,29 @@ union cvmx_npei_dma_control {
 		uint64_t o_es:2;
 		uint64_t o_mode:1;
 		uint64_t csize:14;
+#else
+		uint64_t csize:14;
+		uint64_t o_mode:1;
+		uint64_t o_es:2;
+		uint64_t o_ns:1;
+		uint64_t o_ro:1;
+		uint64_t o_add1:1;
+		uint64_t fpa_que:3;
+		uint64_t dwb_ichk:9;
+		uint64_t dwb_denb:1;
+		uint64_t b0_lend:1;
+		uint64_t dma0_enb:1;
+		uint64_t dma1_enb:1;
+		uint64_t dma2_enb:1;
+		uint64_t dma3_enb:1;
+		uint64_t dma4_enb:1;
+		uint64_t p_32b_m:1;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_npei_dma_control_s cn52xx;
 	struct cvmx_npei_dma_control_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t dma3_enb:1;
 		uint64_t dma2_enb:1;
@@ -705,9 +1155,27 @@ union cvmx_npei_dma_control {
 		uint64_t o_es:2;
 		uint64_t o_mode:1;
 		uint64_t csize:14;
+#else
+		uint64_t csize:14;
+		uint64_t o_mode:1;
+		uint64_t o_es:2;
+		uint64_t o_ns:1;
+		uint64_t o_ro:1;
+		uint64_t o_add1:1;
+		uint64_t fpa_que:3;
+		uint64_t dwb_ichk:9;
+		uint64_t dwb_denb:1;
+		uint64_t b0_lend:1;
+		uint64_t dma0_enb:1;
+		uint64_t dma1_enb:1;
+		uint64_t dma2_enb:1;
+		uint64_t dma3_enb:1;
+		uint64_t reserved_38_63:26;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_dma_control_s cn56xx;
 	struct cvmx_npei_dma_control_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_39_63:25;
 		uint64_t dma4_enb:1;
 		uint64_t dma3_enb:1;
@@ -724,12 +1192,31 @@ union cvmx_npei_dma_control {
 		uint64_t o_es:2;
 		uint64_t o_mode:1;
 		uint64_t csize:14;
+#else
+		uint64_t csize:14;
+		uint64_t o_mode:1;
+		uint64_t o_es:2;
+		uint64_t o_ns:1;
+		uint64_t o_ro:1;
+		uint64_t o_add1:1;
+		uint64_t fpa_que:3;
+		uint64_t dwb_ichk:9;
+		uint64_t dwb_denb:1;
+		uint64_t b0_lend:1;
+		uint64_t dma0_enb:1;
+		uint64_t dma1_enb:1;
+		uint64_t dma2_enb:1;
+		uint64_t dma3_enb:1;
+		uint64_t dma4_enb:1;
+		uint64_t reserved_39_63:25;
+#endif
 	} cn56xxp1;
 };
 
 union cvmx_npei_dma_pcie_req_num {
 	uint64_t u64;
 	struct cvmx_npei_dma_pcie_req_num_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t dma_arb:1;
 		uint64_t reserved_53_62:10;
 		uint64_t pkt_cnt:5;
@@ -745,6 +1232,23 @@ union cvmx_npei_dma_pcie_req_num {
 		uint64_t dma0_cnt:5;
 		uint64_t reserved_5_7:3;
 		uint64_t dma_cnt:5;
+#else
+		uint64_t dma_cnt:5;
+		uint64_t reserved_5_7:3;
+		uint64_t dma0_cnt:5;
+		uint64_t reserved_13_15:3;
+		uint64_t dma1_cnt:5;
+		uint64_t reserved_21_23:3;
+		uint64_t dma2_cnt:5;
+		uint64_t reserved_29_31:3;
+		uint64_t dma3_cnt:5;
+		uint64_t reserved_37_39:3;
+		uint64_t dma4_cnt:5;
+		uint64_t reserved_45_47:3;
+		uint64_t pkt_cnt:5;
+		uint64_t reserved_53_62:10;
+		uint64_t dma_arb:1;
+#endif
 	} s;
 	struct cvmx_npei_dma_pcie_req_num_s cn52xx;
 	struct cvmx_npei_dma_pcie_req_num_s cn56xx;
@@ -753,12 +1257,21 @@ union cvmx_npei_dma_pcie_req_num {
 union cvmx_npei_dma_state1 {
 	uint64_t u64;
 	struct cvmx_npei_dma_state1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t d4_dwe:8;
 		uint64_t d3_dwe:8;
 		uint64_t d2_dwe:8;
 		uint64_t d1_dwe:8;
 		uint64_t d0_dwe:8;
+#else
+		uint64_t d0_dwe:8;
+		uint64_t d1_dwe:8;
+		uint64_t d2_dwe:8;
+		uint64_t d3_dwe:8;
+		uint64_t d4_dwe:8;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_npei_dma_state1_s cn52xx;
 };
@@ -766,6 +1279,7 @@ union cvmx_npei_dma_state1 {
 union cvmx_npei_dma_state1_p1 {
 	uint64_t u64;
 	struct cvmx_npei_dma_state1_p1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_60_63:4;
 		uint64_t d0_difst:7;
 		uint64_t d1_difst:7;
@@ -777,8 +1291,22 @@ union cvmx_npei_dma_state1_p1 {
 		uint64_t d2_reqst:5;
 		uint64_t d3_reqst:5;
 		uint64_t d4_reqst:5;
+#else
+		uint64_t d4_reqst:5;
+		uint64_t d3_reqst:5;
+		uint64_t d2_reqst:5;
+		uint64_t d1_reqst:5;
+		uint64_t d0_reqst:5;
+		uint64_t d4_difst:7;
+		uint64_t d3_difst:7;
+		uint64_t d2_difst:7;
+		uint64_t d1_difst:7;
+		uint64_t d0_difst:7;
+		uint64_t reserved_60_63:4;
+#endif
 	} s;
 	struct cvmx_npei_dma_state1_p1_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_60_63:4;
 		uint64_t d0_difst:7;
 		uint64_t d1_difst:7;
@@ -790,6 +1318,19 @@ union cvmx_npei_dma_state1_p1 {
 		uint64_t d2_reqst:5;
 		uint64_t d3_reqst:5;
 		uint64_t reserved_0_4:5;
+#else
+		uint64_t reserved_0_4:5;
+		uint64_t d3_reqst:5;
+		uint64_t d2_reqst:5;
+		uint64_t d1_reqst:5;
+		uint64_t d0_reqst:5;
+		uint64_t reserved_25_31:7;
+		uint64_t d3_difst:7;
+		uint64_t d2_difst:7;
+		uint64_t d1_difst:7;
+		uint64_t d0_difst:7;
+		uint64_t reserved_60_63:4;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_dma_state1_p1_s cn56xxp1;
 };
@@ -797,12 +1338,21 @@ union cvmx_npei_dma_state1_p1 {
 union cvmx_npei_dma_state2 {
 	uint64_t u64;
 	struct cvmx_npei_dma_state2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t ndwe:4;
 		uint64_t reserved_21_23:3;
 		uint64_t ndre:5;
 		uint64_t reserved_10_15:6;
 		uint64_t prd:10;
+#else
+		uint64_t prd:10;
+		uint64_t reserved_10_15:6;
+		uint64_t ndre:5;
+		uint64_t reserved_21_23:3;
+		uint64_t ndwe:4;
+		uint64_t reserved_28_63:36;
+#endif
 	} s;
 	struct cvmx_npei_dma_state2_s cn52xx;
 };
@@ -810,20 +1360,38 @@ union cvmx_npei_dma_state2 {
 union cvmx_npei_dma_state2_p1 {
 	uint64_t u64;
 	struct cvmx_npei_dma_state2_p1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_45_63:19;
 		uint64_t d0_dffst:9;
 		uint64_t d1_dffst:9;
 		uint64_t d2_dffst:9;
 		uint64_t d3_dffst:9;
 		uint64_t d4_dffst:9;
+#else
+		uint64_t d4_dffst:9;
+		uint64_t d3_dffst:9;
+		uint64_t d2_dffst:9;
+		uint64_t d1_dffst:9;
+		uint64_t d0_dffst:9;
+		uint64_t reserved_45_63:19;
+#endif
 	} s;
 	struct cvmx_npei_dma_state2_p1_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_45_63:19;
 		uint64_t d0_dffst:9;
 		uint64_t d1_dffst:9;
 		uint64_t d2_dffst:9;
 		uint64_t d3_dffst:9;
 		uint64_t reserved_0_8:9;
+#else
+		uint64_t reserved_0_8:9;
+		uint64_t d3_dffst:9;
+		uint64_t d2_dffst:9;
+		uint64_t d1_dffst:9;
+		uint64_t d0_dffst:9;
+		uint64_t reserved_45_63:19;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_dma_state2_p1_s cn56xxp1;
 };
@@ -831,11 +1399,19 @@ union cvmx_npei_dma_state2_p1 {
 union cvmx_npei_dma_state3_p1 {
 	uint64_t u64;
 	struct cvmx_npei_dma_state3_p1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_60_63:4;
 		uint64_t d0_drest:15;
 		uint64_t d1_drest:15;
 		uint64_t d2_drest:15;
 		uint64_t d3_drest:15;
+#else
+		uint64_t d3_drest:15;
+		uint64_t d2_drest:15;
+		uint64_t d1_drest:15;
+		uint64_t d0_drest:15;
+		uint64_t reserved_60_63:4;
+#endif
 	} s;
 	struct cvmx_npei_dma_state3_p1_s cn52xxp1;
 	struct cvmx_npei_dma_state3_p1_s cn56xxp1;
@@ -844,11 +1420,19 @@ union cvmx_npei_dma_state3_p1 {
 union cvmx_npei_dma_state4_p1 {
 	uint64_t u64;
 	struct cvmx_npei_dma_state4_p1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_52_63:12;
 		uint64_t d0_dwest:13;
 		uint64_t d1_dwest:13;
 		uint64_t d2_dwest:13;
 		uint64_t d3_dwest:13;
+#else
+		uint64_t d3_dwest:13;
+		uint64_t d2_dwest:13;
+		uint64_t d1_dwest:13;
+		uint64_t d0_dwest:13;
+		uint64_t reserved_52_63:12;
+#endif
 	} s;
 	struct cvmx_npei_dma_state4_p1_s cn52xxp1;
 	struct cvmx_npei_dma_state4_p1_s cn56xxp1;
@@ -857,9 +1441,15 @@ union cvmx_npei_dma_state4_p1 {
 union cvmx_npei_dma_state5_p1 {
 	uint64_t u64;
 	struct cvmx_npei_dma_state5_p1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t d4_drest:15;
 		uint64_t d4_dwest:13;
+#else
+		uint64_t d4_dwest:13;
+		uint64_t d4_drest:15;
+		uint64_t reserved_28_63:36;
+#endif
 	} s;
 	struct cvmx_npei_dma_state5_p1_s cn56xxp1;
 };
@@ -867,6 +1457,7 @@ union cvmx_npei_dma_state5_p1 {
 union cvmx_npei_int_a_enb {
 	uint64_t u64;
 	struct cvmx_npei_int_a_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t pout_err:1;
 		uint64_t pin_bp:1;
@@ -878,12 +1469,31 @@ union cvmx_npei_int_a_enb {
 		uint64_t pins_err:1;
 		uint64_t dma1_cpl:1;
 		uint64_t dma0_cpl:1;
+#else
+		uint64_t dma0_cpl:1;
+		uint64_t dma1_cpl:1;
+		uint64_t pins_err:1;
+		uint64_t pop_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pgl_err:1;
+		uint64_t p0_rdlk:1;
+		uint64_t p1_rdlk:1;
+		uint64_t pin_bp:1;
+		uint64_t pout_err:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_npei_int_a_enb_s cn52xx;
 	struct cvmx_npei_int_a_enb_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t dma1_cpl:1;
 		uint64_t dma0_cpl:1;
+#else
+		uint64_t dma0_cpl:1;
+		uint64_t dma1_cpl:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_int_a_enb_s cn56xx;
 };
@@ -891,6 +1501,7 @@ union cvmx_npei_int_a_enb {
 union cvmx_npei_int_a_enb2 {
 	uint64_t u64;
 	struct cvmx_npei_int_a_enb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t pout_err:1;
 		uint64_t pin_bp:1;
@@ -902,12 +1513,31 @@ union cvmx_npei_int_a_enb2 {
 		uint64_t pins_err:1;
 		uint64_t dma1_cpl:1;
 		uint64_t dma0_cpl:1;
+#else
+		uint64_t dma0_cpl:1;
+		uint64_t dma1_cpl:1;
+		uint64_t pins_err:1;
+		uint64_t pop_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pgl_err:1;
+		uint64_t p0_rdlk:1;
+		uint64_t p1_rdlk:1;
+		uint64_t pin_bp:1;
+		uint64_t pout_err:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_npei_int_a_enb2_s cn52xx;
 	struct cvmx_npei_int_a_enb2_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t dma1_cpl:1;
 		uint64_t dma0_cpl:1;
+#else
+		uint64_t dma0_cpl:1;
+		uint64_t dma1_cpl:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_int_a_enb2_s cn56xx;
 };
@@ -915,6 +1545,7 @@ union cvmx_npei_int_a_enb2 {
 union cvmx_npei_int_a_sum {
 	uint64_t u64;
 	struct cvmx_npei_int_a_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t pout_err:1;
 		uint64_t pin_bp:1;
@@ -926,12 +1557,31 @@ union cvmx_npei_int_a_sum {
 		uint64_t pins_err:1;
 		uint64_t dma1_cpl:1;
 		uint64_t dma0_cpl:1;
+#else
+		uint64_t dma0_cpl:1;
+		uint64_t dma1_cpl:1;
+		uint64_t pins_err:1;
+		uint64_t pop_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pgl_err:1;
+		uint64_t p0_rdlk:1;
+		uint64_t p1_rdlk:1;
+		uint64_t pin_bp:1;
+		uint64_t pout_err:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_npei_int_a_sum_s cn52xx;
 	struct cvmx_npei_int_a_sum_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t dma1_cpl:1;
 		uint64_t dma0_cpl:1;
+#else
+		uint64_t dma0_cpl:1;
+		uint64_t dma1_cpl:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_int_a_sum_s cn56xx;
 };
@@ -939,6 +1589,7 @@ union cvmx_npei_int_a_sum {
 union cvmx_npei_int_enb {
 	uint64_t u64;
 	struct cvmx_npei_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mio_inta:1;
 		uint64_t reserved_62_62:1;
 		uint64_t int_a:1;
@@ -1003,9 +1654,76 @@ union cvmx_npei_int_enb {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t dma4dbo:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t psldbof:1;
+		uint64_t pidbof:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t c0_aeri:1;
+		uint64_t crs0_er:1;
+		uint64_t c0_se:1;
+		uint64_t crs0_dr:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t crs1_er:1;
+		uint64_t c1_se:1;
+		uint64_t crs1_dr:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t int_a:1;
+		uint64_t reserved_62_62:1;
+		uint64_t mio_inta:1;
+#endif
 	} s;
 	struct cvmx_npei_int_enb_s cn52xx;
 	struct cvmx_npei_int_enb_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mio_inta:1;
 		uint64_t reserved_62_62:1;
 		uint64_t int_a:1;
@@ -1070,9 +1788,76 @@ union cvmx_npei_int_enb {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t reserved_8_8:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t psldbof:1;
+		uint64_t pidbof:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t c0_aeri:1;
+		uint64_t crs0_er:1;
+		uint64_t c0_se:1;
+		uint64_t crs0_dr:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t crs1_er:1;
+		uint64_t c1_se:1;
+		uint64_t crs1_dr:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t int_a:1;
+		uint64_t reserved_62_62:1;
+		uint64_t mio_inta:1;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_int_enb_s cn56xx;
 	struct cvmx_npei_int_enb_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mio_inta:1;
 		uint64_t reserved_61_62:2;
 		uint64_t c1_ldwn:1;
@@ -1136,12 +1921,78 @@ union cvmx_npei_int_enb {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t dma4dbo:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t psldbof:1;
+		uint64_t pidbof:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t c0_aeri:1;
+		uint64_t reserved_20_20:1;
+		uint64_t c0_se:1;
+		uint64_t reserved_22_22:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t reserved_27_27:1;
+		uint64_t c1_se:1;
+		uint64_t reserved_29_29:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t reserved_61_62:2;
+		uint64_t mio_inta:1;
+#endif
 	} cn56xxp1;
 };
 
 union cvmx_npei_int_enb2 {
 	uint64_t u64;
 	struct cvmx_npei_int_enb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t int_a:1;
 		uint64_t c1_ldwn:1;
@@ -1205,9 +2056,75 @@ union cvmx_npei_int_enb2 {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t dma4dbo:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t psldbof:1;
+		uint64_t pidbof:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t c0_aeri:1;
+		uint64_t crs0_er:1;
+		uint64_t c0_se:1;
+		uint64_t crs0_dr:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t crs1_er:1;
+		uint64_t c1_se:1;
+		uint64_t crs1_dr:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t int_a:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_npei_int_enb2_s cn52xx;
 	struct cvmx_npei_int_enb2_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t int_a:1;
 		uint64_t c1_ldwn:1;
@@ -1271,9 +2188,75 @@ union cvmx_npei_int_enb2 {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t reserved_8_8:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t psldbof:1;
+		uint64_t pidbof:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t c0_aeri:1;
+		uint64_t crs0_er:1;
+		uint64_t c0_se:1;
+		uint64_t crs0_dr:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t crs1_er:1;
+		uint64_t c1_se:1;
+		uint64_t crs1_dr:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t int_a:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_int_enb2_s cn56xx;
 	struct cvmx_npei_int_enb2_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t c1_ldwn:1;
 		uint64_t c0_ldwn:1;
@@ -1336,15 +2319,85 @@ union cvmx_npei_int_enb2 {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t dma4dbo:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t psldbof:1;
+		uint64_t pidbof:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t c0_aeri:1;
+		uint64_t reserved_20_20:1;
+		uint64_t c0_se:1;
+		uint64_t reserved_22_22:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t reserved_27_27:1;
+		uint64_t c1_se:1;
+		uint64_t reserved_29_29:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t reserved_61_63:3;
+#endif
 	} cn56xxp1;
 };
 
 union cvmx_npei_int_info {
 	uint64_t u64;
 	struct cvmx_npei_int_info_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t pidbof:6;
 		uint64_t psldbof:6;
+#else
+		uint64_t psldbof:6;
+		uint64_t pidbof:6;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_npei_int_info_s cn52xx;
 	struct cvmx_npei_int_info_s cn56xx;
@@ -1354,6 +2407,7 @@ union cvmx_npei_int_info {
 union cvmx_npei_int_sum {
 	uint64_t u64;
 	struct cvmx_npei_int_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mio_inta:1;
 		uint64_t reserved_62_62:1;
 		uint64_t int_a:1;
@@ -1418,9 +2472,76 @@ union cvmx_npei_int_sum {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t dma4dbo:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t psldbof:1;
+		uint64_t pidbof:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t c0_aeri:1;
+		uint64_t crs0_er:1;
+		uint64_t c0_se:1;
+		uint64_t crs0_dr:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t crs1_er:1;
+		uint64_t c1_se:1;
+		uint64_t crs1_dr:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t int_a:1;
+		uint64_t reserved_62_62:1;
+		uint64_t mio_inta:1;
+#endif
 	} s;
 	struct cvmx_npei_int_sum_s cn52xx;
 	struct cvmx_npei_int_sum_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mio_inta:1;
 		uint64_t reserved_62_62:1;
 		uint64_t int_a:1;
@@ -1482,9 +2603,73 @@ union cvmx_npei_int_sum {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t reserved_8_8:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t reserved_15_18:4;
+		uint64_t c0_aeri:1;
+		uint64_t crs0_er:1;
+		uint64_t c0_se:1;
+		uint64_t crs0_dr:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t crs1_er:1;
+		uint64_t c1_se:1;
+		uint64_t crs1_dr:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t int_a:1;
+		uint64_t reserved_62_62:1;
+		uint64_t mio_inta:1;
+#endif
 	} cn52xxp1;
 	struct cvmx_npei_int_sum_s cn56xx;
 	struct cvmx_npei_int_sum_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mio_inta:1;
 		uint64_t reserved_61_62:2;
 		uint64_t c1_ldwn:1;
@@ -1545,12 +2730,75 @@ union cvmx_npei_int_sum {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t dma4dbo:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t reserved_15_18:4;
+		uint64_t c0_aeri:1;
+		uint64_t reserved_20_20:1;
+		uint64_t c0_se:1;
+		uint64_t reserved_22_22:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t reserved_27_27:1;
+		uint64_t c1_se:1;
+		uint64_t reserved_29_29:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t reserved_61_62:2;
+		uint64_t mio_inta:1;
+#endif
 	} cn56xxp1;
 };
 
 union cvmx_npei_int_sum2 {
 	uint64_t u64;
 	struct cvmx_npei_int_sum2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t mio_inta:1;
 		uint64_t reserved_62_62:1;
 		uint64_t int_a:1;
@@ -1612,6 +2860,69 @@ union cvmx_npei_int_sum2 {
 		uint64_t bar0_to:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t dma0dbo:1;
+		uint64_t dma1dbo:1;
+		uint64_t dma2dbo:1;
+		uint64_t dma3dbo:1;
+		uint64_t reserved_8_8:1;
+		uint64_t dma0fi:1;
+		uint64_t dma1fi:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t reserved_15_18:4;
+		uint64_t c0_aeri:1;
+		uint64_t crs0_er:1;
+		uint64_t c0_se:1;
+		uint64_t crs0_dr:1;
+		uint64_t c0_wake:1;
+		uint64_t c0_pmei:1;
+		uint64_t c0_hpint:1;
+		uint64_t c1_aeri:1;
+		uint64_t crs1_er:1;
+		uint64_t c1_se:1;
+		uint64_t crs1_dr:1;
+		uint64_t c1_wake:1;
+		uint64_t c1_pmei:1;
+		uint64_t c1_hpint:1;
+		uint64_t c0_up_b0:1;
+		uint64_t c0_up_b1:1;
+		uint64_t c0_up_b2:1;
+		uint64_t c0_up_wi:1;
+		uint64_t c0_up_bx:1;
+		uint64_t c0_un_b0:1;
+		uint64_t c0_un_b1:1;
+		uint64_t c0_un_b2:1;
+		uint64_t c0_un_wi:1;
+		uint64_t c0_un_bx:1;
+		uint64_t c1_up_b0:1;
+		uint64_t c1_up_b1:1;
+		uint64_t c1_up_b2:1;
+		uint64_t c1_up_wi:1;
+		uint64_t c1_up_bx:1;
+		uint64_t c1_un_b0:1;
+		uint64_t c1_un_b1:1;
+		uint64_t c1_un_b2:1;
+		uint64_t c1_un_wi:1;
+		uint64_t c1_un_bx:1;
+		uint64_t c0_un_wf:1;
+		uint64_t c1_un_wf:1;
+		uint64_t c0_up_wf:1;
+		uint64_t c1_up_wf:1;
+		uint64_t c0_exc:1;
+		uint64_t c1_exc:1;
+		uint64_t c0_ldwn:1;
+		uint64_t c1_ldwn:1;
+		uint64_t int_a:1;
+		uint64_t reserved_62_62:1;
+		uint64_t mio_inta:1;
+#endif
 	} s;
 	struct cvmx_npei_int_sum2_s cn52xx;
 	struct cvmx_npei_int_sum2_s cn52xxp1;
@@ -1621,7 +2932,11 @@ union cvmx_npei_int_sum2 {
 union cvmx_npei_last_win_rdata0 {
 	uint64_t u64;
 	struct cvmx_npei_last_win_rdata0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:64;
+#else
+		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_npei_last_win_rdata0_s cn52xx;
 	struct cvmx_npei_last_win_rdata0_s cn52xxp1;
@@ -1632,7 +2947,11 @@ union cvmx_npei_last_win_rdata0 {
 union cvmx_npei_last_win_rdata1 {
 	uint64_t u64;
 	struct cvmx_npei_last_win_rdata1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_npei_last_win_rdata1_s cn52xx;
 	struct cvmx_npei_last_win_rdata1_s cn52xxp1;
@@ -1643,9 +2962,15 @@ union cvmx_npei_last_win_rdata1 {
 union cvmx_npei_mem_access_ctl {
 	uint64_t u64;
 	struct cvmx_npei_mem_access_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t max_word:4;
 		uint64_t timer:10;
+#else
+		uint64_t timer:10;
+		uint64_t max_word:4;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_npei_mem_access_ctl_s cn52xx;
 	struct cvmx_npei_mem_access_ctl_s cn52xxp1;
@@ -1656,6 +2981,7 @@ union cvmx_npei_mem_access_ctl {
 union cvmx_npei_mem_access_subidx {
 	uint64_t u64;
 	struct cvmx_npei_mem_access_subidx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_42_63:22;
 		uint64_t zero:1;
 		uint64_t port:2;
@@ -1667,6 +2993,19 @@ union cvmx_npei_mem_access_subidx {
 		uint64_t ror:1;
 		uint64_t row:1;
 		uint64_t ba:30;
+#else
+		uint64_t ba:30;
+		uint64_t row:1;
+		uint64_t ror:1;
+		uint64_t nsw:1;
+		uint64_t nsr:1;
+		uint64_t esw:2;
+		uint64_t esr:2;
+		uint64_t nmerge:1;
+		uint64_t port:2;
+		uint64_t zero:1;
+		uint64_t reserved_42_63:22;
+#endif
 	} s;
 	struct cvmx_npei_mem_access_subidx_s cn52xx;
 	struct cvmx_npei_mem_access_subidx_s cn52xxp1;
@@ -1677,7 +3016,11 @@ union cvmx_npei_mem_access_subidx {
 union cvmx_npei_msi_enb0 {
 	uint64_t u64;
 	struct cvmx_npei_msi_enb0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t enb:64;
+#else
+		uint64_t enb:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_enb0_s cn52xx;
 	struct cvmx_npei_msi_enb0_s cn52xxp1;
@@ -1688,7 +3031,11 @@ union cvmx_npei_msi_enb0 {
 union cvmx_npei_msi_enb1 {
 	uint64_t u64;
 	struct cvmx_npei_msi_enb1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t enb:64;
+#else
 		uint64_t enb:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_enb1_s cn52xx;
 	struct cvmx_npei_msi_enb1_s cn52xxp1;
@@ -1699,7 +3046,11 @@ union cvmx_npei_msi_enb1 {
 union cvmx_npei_msi_enb2 {
 	uint64_t u64;
 	struct cvmx_npei_msi_enb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t enb:64;
+#else
 		uint64_t enb:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_enb2_s cn52xx;
 	struct cvmx_npei_msi_enb2_s cn52xxp1;
@@ -1710,7 +3061,11 @@ union cvmx_npei_msi_enb2 {
 union cvmx_npei_msi_enb3 {
 	uint64_t u64;
 	struct cvmx_npei_msi_enb3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t enb:64;
+#else
+		uint64_t enb:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_enb3_s cn52xx;
 	struct cvmx_npei_msi_enb3_s cn52xxp1;
@@ -1721,7 +3076,11 @@ union cvmx_npei_msi_enb3 {
 union cvmx_npei_msi_rcv0 {
 	uint64_t u64;
 	struct cvmx_npei_msi_rcv0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t intr:64;
+#else
+		uint64_t intr:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_rcv0_s cn52xx;
 	struct cvmx_npei_msi_rcv0_s cn52xxp1;
@@ -1732,7 +3091,11 @@ union cvmx_npei_msi_rcv0 {
 union cvmx_npei_msi_rcv1 {
 	uint64_t u64;
 	struct cvmx_npei_msi_rcv1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t intr:64;
+#else
 		uint64_t intr:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_rcv1_s cn52xx;
 	struct cvmx_npei_msi_rcv1_s cn52xxp1;
@@ -1743,7 +3106,11 @@ union cvmx_npei_msi_rcv1 {
 union cvmx_npei_msi_rcv2 {
 	uint64_t u64;
 	struct cvmx_npei_msi_rcv2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t intr:64;
+#else
 		uint64_t intr:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_rcv2_s cn52xx;
 	struct cvmx_npei_msi_rcv2_s cn52xxp1;
@@ -1754,7 +3121,11 @@ union cvmx_npei_msi_rcv2 {
 union cvmx_npei_msi_rcv3 {
 	uint64_t u64;
 	struct cvmx_npei_msi_rcv3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t intr:64;
+#else
+		uint64_t intr:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_rcv3_s cn52xx;
 	struct cvmx_npei_msi_rcv3_s cn52xxp1;
@@ -1765,9 +3136,15 @@ union cvmx_npei_msi_rcv3 {
 union cvmx_npei_msi_rd_map {
 	uint64_t u64;
 	struct cvmx_npei_msi_rd_map_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t rd_int:8;
 		uint64_t msi_int:8;
+#else
+		uint64_t msi_int:8;
+		uint64_t rd_int:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_npei_msi_rd_map_s cn52xx;
 	struct cvmx_npei_msi_rd_map_s cn52xxp1;
@@ -1778,7 +3155,11 @@ union cvmx_npei_msi_rd_map {
 union cvmx_npei_msi_w1c_enb0 {
 	uint64_t u64;
 	struct cvmx_npei_msi_w1c_enb0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t clr:64;
+#else
+		uint64_t clr:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_w1c_enb0_s cn52xx;
 	struct cvmx_npei_msi_w1c_enb0_s cn56xx;
@@ -1787,7 +3168,11 @@ union cvmx_npei_msi_w1c_enb0 {
 union cvmx_npei_msi_w1c_enb1 {
 	uint64_t u64;
 	struct cvmx_npei_msi_w1c_enb1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t clr:64;
+#else
 		uint64_t clr:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_w1c_enb1_s cn52xx;
 	struct cvmx_npei_msi_w1c_enb1_s cn56xx;
@@ -1796,7 +3181,11 @@ union cvmx_npei_msi_w1c_enb1 {
 union cvmx_npei_msi_w1c_enb2 {
 	uint64_t u64;
 	struct cvmx_npei_msi_w1c_enb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t clr:64;
+#else
 		uint64_t clr:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_w1c_enb2_s cn52xx;
 	struct cvmx_npei_msi_w1c_enb2_s cn56xx;
@@ -1805,7 +3194,11 @@ union cvmx_npei_msi_w1c_enb2 {
 union cvmx_npei_msi_w1c_enb3 {
 	uint64_t u64;
 	struct cvmx_npei_msi_w1c_enb3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t clr:64;
+#else
+		uint64_t clr:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_w1c_enb3_s cn52xx;
 	struct cvmx_npei_msi_w1c_enb3_s cn56xx;
@@ -1814,7 +3207,11 @@ union cvmx_npei_msi_w1c_enb3 {
 union cvmx_npei_msi_w1s_enb0 {
 	uint64_t u64;
 	struct cvmx_npei_msi_w1s_enb0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t set:64;
+#else
 		uint64_t set:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_w1s_enb0_s cn52xx;
 	struct cvmx_npei_msi_w1s_enb0_s cn56xx;
@@ -1823,7 +3220,11 @@ union cvmx_npei_msi_w1s_enb0 {
 union cvmx_npei_msi_w1s_enb1 {
 	uint64_t u64;
 	struct cvmx_npei_msi_w1s_enb1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t set:64;
+#else
 		uint64_t set:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_w1s_enb1_s cn52xx;
 	struct cvmx_npei_msi_w1s_enb1_s cn56xx;
@@ -1832,7 +3233,11 @@ union cvmx_npei_msi_w1s_enb1 {
 union cvmx_npei_msi_w1s_enb2 {
 	uint64_t u64;
 	struct cvmx_npei_msi_w1s_enb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t set:64;
+#else
 		uint64_t set:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_w1s_enb2_s cn52xx;
 	struct cvmx_npei_msi_w1s_enb2_s cn56xx;
@@ -1841,7 +3246,11 @@ union cvmx_npei_msi_w1s_enb2 {
 union cvmx_npei_msi_w1s_enb3 {
 	uint64_t u64;
 	struct cvmx_npei_msi_w1s_enb3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t set:64;
+#else
+		uint64_t set:64;
+#endif
 	} s;
 	struct cvmx_npei_msi_w1s_enb3_s cn52xx;
 	struct cvmx_npei_msi_w1s_enb3_s cn56xx;
@@ -1850,9 +3259,15 @@ union cvmx_npei_msi_w1s_enb3 {
 union cvmx_npei_msi_wr_map {
 	uint64_t u64;
 	struct cvmx_npei_msi_wr_map_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t ciu_int:8;
 		uint64_t msi_int:8;
+#else
+		uint64_t msi_int:8;
+		uint64_t ciu_int:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_npei_msi_wr_map_s cn52xx;
 	struct cvmx_npei_msi_wr_map_s cn52xxp1;
@@ -1863,6 +3278,7 @@ union cvmx_npei_msi_wr_map {
 union cvmx_npei_pcie_credit_cnt {
 	uint64_t u64;
 	struct cvmx_npei_pcie_credit_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t p1_ccnt:8;
 		uint64_t p1_ncnt:8;
@@ -1870,6 +3286,15 @@ union cvmx_npei_pcie_credit_cnt {
 		uint64_t p0_ccnt:8;
 		uint64_t p0_ncnt:8;
 		uint64_t p0_pcnt:8;
+#else
+		uint64_t p0_pcnt:8;
+		uint64_t p0_ncnt:8;
+		uint64_t p0_ccnt:8;
+		uint64_t p1_pcnt:8;
+		uint64_t p1_ncnt:8;
+		uint64_t p1_ccnt:8;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_npei_pcie_credit_cnt_s cn52xx;
 	struct cvmx_npei_pcie_credit_cnt_s cn56xx;
@@ -1878,8 +3303,13 @@ union cvmx_npei_pcie_credit_cnt {
 union cvmx_npei_pcie_msi_rcv {
 	uint64_t u64;
 	struct cvmx_npei_pcie_msi_rcv_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t intr:8;
+#else
+		uint64_t intr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_npei_pcie_msi_rcv_s cn52xx;
 	struct cvmx_npei_pcie_msi_rcv_s cn52xxp1;
@@ -1890,9 +3320,15 @@ union cvmx_npei_pcie_msi_rcv {
 union cvmx_npei_pcie_msi_rcv_b1 {
 	uint64_t u64;
 	struct cvmx_npei_pcie_msi_rcv_b1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t intr:8;
 		uint64_t reserved_0_7:8;
+#else
+		uint64_t reserved_0_7:8;
+		uint64_t intr:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_npei_pcie_msi_rcv_b1_s cn52xx;
 	struct cvmx_npei_pcie_msi_rcv_b1_s cn52xxp1;
@@ -1903,9 +3339,15 @@ union cvmx_npei_pcie_msi_rcv_b1 {
 union cvmx_npei_pcie_msi_rcv_b2 {
 	uint64_t u64;
 	struct cvmx_npei_pcie_msi_rcv_b2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t intr:8;
 		uint64_t reserved_0_15:16;
+#else
+		uint64_t reserved_0_15:16;
+		uint64_t intr:8;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_npei_pcie_msi_rcv_b2_s cn52xx;
 	struct cvmx_npei_pcie_msi_rcv_b2_s cn52xxp1;
@@ -1916,9 +3358,15 @@ union cvmx_npei_pcie_msi_rcv_b2 {
 union cvmx_npei_pcie_msi_rcv_b3 {
 	uint64_t u64;
 	struct cvmx_npei_pcie_msi_rcv_b3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t intr:8;
 		uint64_t reserved_0_23:24;
+#else
+		uint64_t reserved_0_23:24;
+		uint64_t intr:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pcie_msi_rcv_b3_s cn52xx;
 	struct cvmx_npei_pcie_msi_rcv_b3_s cn52xxp1;
@@ -1929,9 +3377,15 @@ union cvmx_npei_pcie_msi_rcv_b3 {
 union cvmx_npei_pktx_cnts {
 	uint64_t u64;
 	struct cvmx_npei_pktx_cnts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_54_63:10;
 		uint64_t timer:22;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t timer:22;
+		uint64_t reserved_54_63:10;
+#endif
 	} s;
 	struct cvmx_npei_pktx_cnts_s cn52xx;
 	struct cvmx_npei_pktx_cnts_s cn56xx;
@@ -1940,8 +3394,13 @@ union cvmx_npei_pktx_cnts {
 union cvmx_npei_pktx_in_bp {
 	uint64_t u64;
 	struct cvmx_npei_pktx_in_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t wmark:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t wmark:32;
+#endif
 	} s;
 	struct cvmx_npei_pktx_in_bp_s cn52xx;
 	struct cvmx_npei_pktx_in_bp_s cn56xx;
@@ -1950,8 +3409,13 @@ union cvmx_npei_pktx_in_bp {
 union cvmx_npei_pktx_instr_baddr {
 	uint64_t u64;
 	struct cvmx_npei_pktx_instr_baddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:61;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t addr:61;
+#endif
 	} s;
 	struct cvmx_npei_pktx_instr_baddr_s cn52xx;
 	struct cvmx_npei_pktx_instr_baddr_s cn56xx;
@@ -1960,8 +3424,13 @@ union cvmx_npei_pktx_instr_baddr {
 union cvmx_npei_pktx_instr_baoff_dbell {
 	uint64_t u64;
 	struct cvmx_npei_pktx_instr_baoff_dbell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t aoff:32;
 		uint64_t dbell:32;
+#else
+		uint64_t dbell:32;
+		uint64_t aoff:32;
+#endif
 	} s;
 	struct cvmx_npei_pktx_instr_baoff_dbell_s cn52xx;
 	struct cvmx_npei_pktx_instr_baoff_dbell_s cn56xx;
@@ -1970,11 +3439,19 @@ union cvmx_npei_pktx_instr_baoff_dbell {
 union cvmx_npei_pktx_instr_fifo_rsize {
 	uint64_t u64;
 	struct cvmx_npei_pktx_instr_fifo_rsize_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t max:9;
 		uint64_t rrp:9;
 		uint64_t wrp:9;
 		uint64_t fcnt:5;
 		uint64_t rsize:32;
+#else
+		uint64_t rsize:32;
+		uint64_t fcnt:5;
+		uint64_t wrp:9;
+		uint64_t rrp:9;
+		uint64_t max:9;
+#endif
 	} s;
 	struct cvmx_npei_pktx_instr_fifo_rsize_s cn52xx;
 	struct cvmx_npei_pktx_instr_fifo_rsize_s cn56xx;
@@ -1983,6 +3460,7 @@ union cvmx_npei_pktx_instr_fifo_rsize {
 union cvmx_npei_pktx_instr_header {
 	uint64_t u64;
 	struct cvmx_npei_pktx_instr_header_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t pbp:1;
 		uint64_t reserved_38_42:5;
@@ -1996,6 +3474,21 @@ union cvmx_npei_pktx_instr_header {
 		uint64_t reserved_13_13:1;
 		uint64_t skp_len:7;
 		uint64_t reserved_0_5:6;
+#else
+		uint64_t reserved_0_5:6;
+		uint64_t skp_len:7;
+		uint64_t reserved_13_13:1;
+		uint64_t par_mode:2;
+		uint64_t reserved_16_20:5;
+		uint64_t use_ihdr:1;
+		uint64_t reserved_22_27:6;
+		uint64_t rskp_len:7;
+		uint64_t reserved_35_35:1;
+		uint64_t rparmode:2;
+		uint64_t reserved_38_42:5;
+		uint64_t pbp:1;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_npei_pktx_instr_header_s cn52xx;
 	struct cvmx_npei_pktx_instr_header_s cn56xx;
@@ -2004,8 +3497,13 @@ union cvmx_npei_pktx_instr_header {
 union cvmx_npei_pktx_slist_baddr {
 	uint64_t u64;
 	struct cvmx_npei_pktx_slist_baddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:60;
 		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t addr:60;
+#endif
 	} s;
 	struct cvmx_npei_pktx_slist_baddr_s cn52xx;
 	struct cvmx_npei_pktx_slist_baddr_s cn56xx;
@@ -2014,8 +3512,13 @@ union cvmx_npei_pktx_slist_baddr {
 union cvmx_npei_pktx_slist_baoff_dbell {
 	uint64_t u64;
 	struct cvmx_npei_pktx_slist_baoff_dbell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t aoff:32;
 		uint64_t dbell:32;
+#else
+		uint64_t dbell:32;
+		uint64_t aoff:32;
+#endif
 	} s;
 	struct cvmx_npei_pktx_slist_baoff_dbell_s cn52xx;
 	struct cvmx_npei_pktx_slist_baoff_dbell_s cn56xx;
@@ -2024,8 +3527,13 @@ union cvmx_npei_pktx_slist_baoff_dbell {
 union cvmx_npei_pktx_slist_fifo_rsize {
 	uint64_t u64;
 	struct cvmx_npei_pktx_slist_fifo_rsize_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t rsize:32;
+#else
+		uint64_t rsize:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pktx_slist_fifo_rsize_s cn52xx;
 	struct cvmx_npei_pktx_slist_fifo_rsize_s cn56xx;
@@ -2034,8 +3542,13 @@ union cvmx_npei_pktx_slist_fifo_rsize {
 union cvmx_npei_pkt_cnt_int {
 	uint64_t u64;
 	struct cvmx_npei_pkt_cnt_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t port:32;
+#else
+		uint64_t port:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_cnt_int_s cn52xx;
 	struct cvmx_npei_pkt_cnt_int_s cn56xx;
@@ -2044,8 +3557,13 @@ union cvmx_npei_pkt_cnt_int {
 union cvmx_npei_pkt_cnt_int_enb {
 	uint64_t u64;
 	struct cvmx_npei_pkt_cnt_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t port:32;
+#else
+		uint64_t port:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_cnt_int_enb_s cn52xx;
 	struct cvmx_npei_pkt_cnt_int_enb_s cn56xx;
@@ -2054,7 +3572,11 @@ union cvmx_npei_pkt_cnt_int_enb {
 union cvmx_npei_pkt_data_out_es {
 	uint64_t u64;
 	struct cvmx_npei_pkt_data_out_es_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t es:64;
+#else
 		uint64_t es:64;
+#endif
 	} s;
 	struct cvmx_npei_pkt_data_out_es_s cn52xx;
 	struct cvmx_npei_pkt_data_out_es_s cn56xx;
@@ -2063,8 +3585,13 @@ union cvmx_npei_pkt_data_out_es {
 union cvmx_npei_pkt_data_out_ns {
 	uint64_t u64;
 	struct cvmx_npei_pkt_data_out_ns_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t nsr:32;
+#else
+		uint64_t nsr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_data_out_ns_s cn52xx;
 	struct cvmx_npei_pkt_data_out_ns_s cn56xx;
@@ -2073,8 +3600,13 @@ union cvmx_npei_pkt_data_out_ns {
 union cvmx_npei_pkt_data_out_ror {
 	uint64_t u64;
 	struct cvmx_npei_pkt_data_out_ror_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t ror:32;
+#else
+		uint64_t ror:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_data_out_ror_s cn52xx;
 	struct cvmx_npei_pkt_data_out_ror_s cn56xx;
@@ -2083,8 +3615,13 @@ union cvmx_npei_pkt_data_out_ror {
 union cvmx_npei_pkt_dpaddr {
 	uint64_t u64;
 	struct cvmx_npei_pkt_dpaddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t dptr:32;
+#else
+		uint64_t dptr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_dpaddr_s cn52xx;
 	struct cvmx_npei_pkt_dpaddr_s cn56xx;
@@ -2093,8 +3630,13 @@ union cvmx_npei_pkt_dpaddr {
 union cvmx_npei_pkt_in_bp {
 	uint64_t u64;
 	struct cvmx_npei_pkt_in_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t bp:32;
+#else
+		uint64_t bp:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_in_bp_s cn52xx;
 	struct cvmx_npei_pkt_in_bp_s cn56xx;
@@ -2103,8 +3645,13 @@ union cvmx_npei_pkt_in_bp {
 union cvmx_npei_pkt_in_donex_cnts {
 	uint64_t u64;
 	struct cvmx_npei_pkt_in_donex_cnts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_in_donex_cnts_s cn52xx;
 	struct cvmx_npei_pkt_in_donex_cnts_s cn56xx;
@@ -2113,8 +3660,13 @@ union cvmx_npei_pkt_in_donex_cnts {
 union cvmx_npei_pkt_in_instr_counts {
 	uint64_t u64;
 	struct cvmx_npei_pkt_in_instr_counts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t wr_cnt:32;
 		uint64_t rd_cnt:32;
+#else
+		uint64_t rd_cnt:32;
+		uint64_t wr_cnt:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_in_instr_counts_s cn52xx;
 	struct cvmx_npei_pkt_in_instr_counts_s cn56xx;
@@ -2123,7 +3675,11 @@ union cvmx_npei_pkt_in_instr_counts {
 union cvmx_npei_pkt_in_pcie_port {
 	uint64_t u64;
 	struct cvmx_npei_pkt_in_pcie_port_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t pp:64;
+#else
 		uint64_t pp:64;
+#endif
 	} s;
 	struct cvmx_npei_pkt_in_pcie_port_s cn52xx;
 	struct cvmx_npei_pkt_in_pcie_port_s cn56xx;
@@ -2132,6 +3688,7 @@ union cvmx_npei_pkt_in_pcie_port {
 union cvmx_npei_pkt_input_control {
 	uint64_t u64;
 	struct cvmx_npei_pkt_input_control_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t pkt_rr:1;
 		uint64_t pbp_dhi:13;
@@ -2142,6 +3699,18 @@ union cvmx_npei_pkt_input_control {
 		uint64_t nsr:1;
 		uint64_t esr:2;
 		uint64_t ror:1;
+#else
+		uint64_t ror:1;
+		uint64_t esr:2;
+		uint64_t nsr:1;
+		uint64_t use_csr:1;
+		uint64_t d_ror:1;
+		uint64_t d_esr:2;
+		uint64_t d_nsr:1;
+		uint64_t pbp_dhi:13;
+		uint64_t pkt_rr:1;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_npei_pkt_input_control_s cn52xx;
 	struct cvmx_npei_pkt_input_control_s cn56xx;
@@ -2150,8 +3719,13 @@ union cvmx_npei_pkt_input_control {
 union cvmx_npei_pkt_instr_enb {
 	uint64_t u64;
 	struct cvmx_npei_pkt_instr_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t enb:32;
+#else
+		uint64_t enb:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_instr_enb_s cn52xx;
 	struct cvmx_npei_pkt_instr_enb_s cn56xx;
@@ -2160,7 +3734,11 @@ union cvmx_npei_pkt_instr_enb {
 union cvmx_npei_pkt_instr_rd_size {
 	uint64_t u64;
 	struct cvmx_npei_pkt_instr_rd_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rdsize:64;
+#else
+		uint64_t rdsize:64;
+#endif
 	} s;
 	struct cvmx_npei_pkt_instr_rd_size_s cn52xx;
 	struct cvmx_npei_pkt_instr_rd_size_s cn56xx;
@@ -2169,8 +3747,13 @@ union cvmx_npei_pkt_instr_rd_size {
 union cvmx_npei_pkt_instr_size {
 	uint64_t u64;
 	struct cvmx_npei_pkt_instr_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t is_64b:32;
+#else
+		uint64_t is_64b:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_instr_size_s cn52xx;
 	struct cvmx_npei_pkt_instr_size_s cn56xx;
@@ -2179,9 +3762,15 @@ union cvmx_npei_pkt_instr_size {
 union cvmx_npei_pkt_int_levels {
 	uint64_t u64;
 	struct cvmx_npei_pkt_int_levels_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_54_63:10;
 		uint64_t time:22;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t time:22;
+		uint64_t reserved_54_63:10;
+#endif
 	} s;
 	struct cvmx_npei_pkt_int_levels_s cn52xx;
 	struct cvmx_npei_pkt_int_levels_s cn56xx;
@@ -2190,8 +3779,13 @@ union cvmx_npei_pkt_int_levels {
 union cvmx_npei_pkt_iptr {
 	uint64_t u64;
 	struct cvmx_npei_pkt_iptr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t iptr:32;
+#else
+		uint64_t iptr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_iptr_s cn52xx;
 	struct cvmx_npei_pkt_iptr_s cn56xx;
@@ -2200,8 +3794,13 @@ union cvmx_npei_pkt_iptr {
 union cvmx_npei_pkt_out_bmode {
 	uint64_t u64;
 	struct cvmx_npei_pkt_out_bmode_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t bmode:32;
+#else
+		uint64_t bmode:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_out_bmode_s cn52xx;
 	struct cvmx_npei_pkt_out_bmode_s cn56xx;
@@ -2210,8 +3809,13 @@ union cvmx_npei_pkt_out_bmode {
 union cvmx_npei_pkt_out_enb {
 	uint64_t u64;
 	struct cvmx_npei_pkt_out_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t enb:32;
+#else
+		uint64_t enb:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_out_enb_s cn52xx;
 	struct cvmx_npei_pkt_out_enb_s cn56xx;
@@ -2220,8 +3824,13 @@ union cvmx_npei_pkt_out_enb {
 union cvmx_npei_pkt_output_wmark {
 	uint64_t u64;
 	struct cvmx_npei_pkt_output_wmark_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t wmark:32;
+#else
+		uint64_t wmark:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_output_wmark_s cn52xx;
 	struct cvmx_npei_pkt_output_wmark_s cn56xx;
@@ -2230,7 +3839,11 @@ union cvmx_npei_pkt_output_wmark {
 union cvmx_npei_pkt_pcie_port {
 	uint64_t u64;
 	struct cvmx_npei_pkt_pcie_port_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t pp:64;
+#else
+		uint64_t pp:64;
+#endif
 	} s;
 	struct cvmx_npei_pkt_pcie_port_s cn52xx;
 	struct cvmx_npei_pkt_pcie_port_s cn56xx;
@@ -2239,8 +3852,13 @@ union cvmx_npei_pkt_pcie_port {
 union cvmx_npei_pkt_port_in_rst {
 	uint64_t u64;
 	struct cvmx_npei_pkt_port_in_rst_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t in_rst:32;
 		uint64_t out_rst:32;
+#else
+		uint64_t out_rst:32;
+		uint64_t in_rst:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_port_in_rst_s cn52xx;
 	struct cvmx_npei_pkt_port_in_rst_s cn56xx;
@@ -2249,7 +3867,11 @@ union cvmx_npei_pkt_port_in_rst {
 union cvmx_npei_pkt_slist_es {
 	uint64_t u64;
 	struct cvmx_npei_pkt_slist_es_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t es:64;
+#else
+		uint64_t es:64;
+#endif
 	} s;
 	struct cvmx_npei_pkt_slist_es_s cn52xx;
 	struct cvmx_npei_pkt_slist_es_s cn56xx;
@@ -2258,9 +3880,15 @@ union cvmx_npei_pkt_slist_es {
 union cvmx_npei_pkt_slist_id_size {
 	uint64_t u64;
 	struct cvmx_npei_pkt_slist_id_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t isize:7;
 		uint64_t bsize:16;
+#else
+		uint64_t bsize:16;
+		uint64_t isize:7;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_npei_pkt_slist_id_size_s cn52xx;
 	struct cvmx_npei_pkt_slist_id_size_s cn56xx;
@@ -2269,8 +3897,13 @@ union cvmx_npei_pkt_slist_id_size {
 union cvmx_npei_pkt_slist_ns {
 	uint64_t u64;
 	struct cvmx_npei_pkt_slist_ns_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t nsr:32;
+#else
+		uint64_t nsr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_slist_ns_s cn52xx;
 	struct cvmx_npei_pkt_slist_ns_s cn56xx;
@@ -2279,8 +3912,13 @@ union cvmx_npei_pkt_slist_ns {
 union cvmx_npei_pkt_slist_ror {
 	uint64_t u64;
 	struct cvmx_npei_pkt_slist_ror_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t ror:32;
+#else
+		uint64_t ror:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_slist_ror_s cn52xx;
 	struct cvmx_npei_pkt_slist_ror_s cn56xx;
@@ -2289,8 +3927,13 @@ union cvmx_npei_pkt_slist_ror {
 union cvmx_npei_pkt_time_int {
 	uint64_t u64;
 	struct cvmx_npei_pkt_time_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t port:32;
+#else
+		uint64_t port:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_time_int_s cn52xx;
 	struct cvmx_npei_pkt_time_int_s cn56xx;
@@ -2299,8 +3942,13 @@ union cvmx_npei_pkt_time_int {
 union cvmx_npei_pkt_time_int_enb {
 	uint64_t u64;
 	struct cvmx_npei_pkt_time_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t port:32;
+#else
+		uint64_t port:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_pkt_time_int_enb_s cn52xx;
 	struct cvmx_npei_pkt_time_int_enb_s cn56xx;
@@ -2309,6 +3957,7 @@ union cvmx_npei_pkt_time_int_enb {
 union cvmx_npei_rsl_int_blocks {
 	uint64_t u64;
 	struct cvmx_npei_rsl_int_blocks_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t iob:1;
 		uint64_t lmc1:1;
@@ -2338,6 +3987,37 @@ union cvmx_npei_rsl_int_blocks {
 		uint64_t gmx1:1;
 		uint64_t gmx0:1;
 		uint64_t mio:1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t gmx1:1;
+		uint64_t npei:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t dfa:1;
+		uint64_t zip:1;
+		uint64_t reserved_8_8:1;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t usb:1;
+		uint64_t rad:1;
+		uint64_t usb1:1;
+		uint64_t l2c:1;
+		uint64_t lmc0:1;
+		uint64_t spx0:1;
+		uint64_t spx1:1;
+		uint64_t pip:1;
+		uint64_t reserved_21_21:1;
+		uint64_t asxpcs0:1;
+		uint64_t asxpcs1:1;
+		uint64_t reserved_24_27:4;
+		uint64_t agl:1;
+		uint64_t lmc1:1;
+		uint64_t iob:1;
+		uint64_t reserved_31_63:33;
+#endif
 	} s;
 	struct cvmx_npei_rsl_int_blocks_s cn52xx;
 	struct cvmx_npei_rsl_int_blocks_s cn52xxp1;
@@ -2348,7 +4028,11 @@ union cvmx_npei_rsl_int_blocks {
 union cvmx_npei_scratch_1 {
 	uint64_t u64;
 	struct cvmx_npei_scratch_1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_npei_scratch_1_s cn52xx;
 	struct cvmx_npei_scratch_1_s cn52xxp1;
@@ -2359,10 +4043,17 @@ union cvmx_npei_scratch_1 {
 union cvmx_npei_state1 {
 	uint64_t u64;
 	struct cvmx_npei_state1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t cpl1:12;
 		uint64_t cpl0:12;
 		uint64_t arb:1;
 		uint64_t csr:39;
+#else
+		uint64_t csr:39;
+		uint64_t arb:1;
+		uint64_t cpl0:12;
+		uint64_t cpl1:12;
+#endif
 	} s;
 	struct cvmx_npei_state1_s cn52xx;
 	struct cvmx_npei_state1_s cn52xxp1;
@@ -2373,6 +4064,7 @@ union cvmx_npei_state1 {
 union cvmx_npei_state2 {
 	uint64_t u64;
 	struct cvmx_npei_state2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t npei:1;
 		uint64_t rac:1;
@@ -2380,6 +4072,15 @@ union cvmx_npei_state2 {
 		uint64_t csm0:15;
 		uint64_t nnp0:8;
 		uint64_t nnd:8;
+#else
+		uint64_t nnd:8;
+		uint64_t nnp0:8;
+		uint64_t csm0:15;
+		uint64_t csm1:15;
+		uint64_t rac:1;
+		uint64_t npei:1;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_npei_state2_s cn52xx;
 	struct cvmx_npei_state2_s cn52xxp1;
@@ -2390,11 +4091,19 @@ union cvmx_npei_state2 {
 union cvmx_npei_state3 {
 	uint64_t u64;
 	struct cvmx_npei_state3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t psm1:15;
 		uint64_t psm0:15;
 		uint64_t nsm1:13;
 		uint64_t nsm0:13;
+#else
+		uint64_t nsm0:13;
+		uint64_t nsm1:13;
+		uint64_t psm0:15;
+		uint64_t psm1:15;
+		uint64_t reserved_56_63:8;
+#endif
 	} s;
 	struct cvmx_npei_state3_s cn52xx;
 	struct cvmx_npei_state3_s cn52xxp1;
@@ -2405,10 +4114,17 @@ union cvmx_npei_state3 {
 union cvmx_npei_win_rd_addr {
 	uint64_t u64;
 	struct cvmx_npei_win_rd_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_51_63:13;
 		uint64_t ld_cmd:2;
 		uint64_t iobit:1;
 		uint64_t rd_addr:48;
+#else
+		uint64_t rd_addr:48;
+		uint64_t iobit:1;
+		uint64_t ld_cmd:2;
+		uint64_t reserved_51_63:13;
+#endif
 	} s;
 	struct cvmx_npei_win_rd_addr_s cn52xx;
 	struct cvmx_npei_win_rd_addr_s cn52xxp1;
@@ -2419,7 +4135,11 @@ union cvmx_npei_win_rd_addr {
 union cvmx_npei_win_rd_data {
 	uint64_t u64;
 	struct cvmx_npei_win_rd_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rd_data:64;
+#else
 		uint64_t rd_data:64;
+#endif
 	} s;
 	struct cvmx_npei_win_rd_data_s cn52xx;
 	struct cvmx_npei_win_rd_data_s cn52xxp1;
@@ -2430,10 +4150,17 @@ union cvmx_npei_win_rd_data {
 union cvmx_npei_win_wr_addr {
 	uint64_t u64;
 	struct cvmx_npei_win_wr_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t iobit:1;
 		uint64_t wr_addr:46;
 		uint64_t reserved_0_1:2;
+#else
+		uint64_t reserved_0_1:2;
+		uint64_t wr_addr:46;
+		uint64_t iobit:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} s;
 	struct cvmx_npei_win_wr_addr_s cn52xx;
 	struct cvmx_npei_win_wr_addr_s cn52xxp1;
@@ -2444,7 +4171,11 @@ union cvmx_npei_win_wr_addr {
 union cvmx_npei_win_wr_data {
 	uint64_t u64;
 	struct cvmx_npei_win_wr_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t wr_data:64;
+#else
+		uint64_t wr_data:64;
+#endif
 	} s;
 	struct cvmx_npei_win_wr_data_s cn52xx;
 	struct cvmx_npei_win_wr_data_s cn52xxp1;
@@ -2455,8 +4186,13 @@ union cvmx_npei_win_wr_data {
 union cvmx_npei_win_wr_mask {
 	uint64_t u64;
 	struct cvmx_npei_win_wr_mask_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t wr_mask:8;
+#else
+		uint64_t wr_mask:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_npei_win_wr_mask_s cn52xx;
 	struct cvmx_npei_win_wr_mask_s cn52xxp1;
@@ -2467,8 +4203,13 @@ union cvmx_npei_win_wr_mask {
 union cvmx_npei_window_ctl {
 	uint64_t u64;
 	struct cvmx_npei_window_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t time:32;
+#else
+		uint64_t time:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npei_window_ctl_s cn52xx;
 	struct cvmx_npei_window_ctl_s cn52xxp1;
diff --git a/arch/mips/include/asm/octeon/cvmx-npi-defs.h b/arch/mips/include/asm/octeon/cvmx-npi-defs.h
index f089c780060..129bb250e53 100644
--- a/arch/mips/include/asm/octeon/cvmx-npi-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-npi-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -152,8 +152,13 @@
 union cvmx_npi_base_addr_inputx {
 	uint64_t u64;
 	struct cvmx_npi_base_addr_inputx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t baddr:61;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t baddr:61;
+#endif
 	} s;
 	struct cvmx_npi_base_addr_inputx_s cn30xx;
 	struct cvmx_npi_base_addr_inputx_s cn31xx;
@@ -167,8 +172,13 @@ union cvmx_npi_base_addr_inputx {
 union cvmx_npi_base_addr_outputx {
 	uint64_t u64;
 	struct cvmx_npi_base_addr_outputx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t baddr:61;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t baddr:61;
+#endif
 	} s;
 	struct cvmx_npi_base_addr_outputx_s cn30xx;
 	struct cvmx_npi_base_addr_outputx_s cn31xx;
@@ -182,6 +192,7 @@ union cvmx_npi_base_addr_outputx {
 union cvmx_npi_bist_status {
 	uint64_t u64;
 	struct cvmx_npi_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t csr_bs:1;
 		uint64_t dif_bs:1;
@@ -203,8 +214,32 @@ union cvmx_npi_bist_status {
 		uint64_t dob_bs:1;
 		uint64_t pdf_bs:1;
 		uint64_t dpi_bs:1;
+#else
+		uint64_t dpi_bs:1;
+		uint64_t pdf_bs:1;
+		uint64_t dob_bs:1;
+		uint64_t nus_bs:1;
+		uint64_t pos_bs:1;
+		uint64_t pof3_bs:1;
+		uint64_t pof2_bs:1;
+		uint64_t pof1_bs:1;
+		uint64_t pof0_bs:1;
+		uint64_t pig_bs:1;
+		uint64_t pgf_bs:1;
+		uint64_t rdnl_bs:1;
+		uint64_t pcad_bs:1;
+		uint64_t pcac_bs:1;
+		uint64_t rdn_bs:1;
+		uint64_t pcn_bs:1;
+		uint64_t pcnc_bs:1;
+		uint64_t rdp_bs:1;
+		uint64_t dif_bs:1;
+		uint64_t csr_bs:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_npi_bist_status_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t csr_bs:1;
 		uint64_t dif_bs:1;
@@ -224,11 +259,33 @@ union cvmx_npi_bist_status {
 		uint64_t dob_bs:1;
 		uint64_t pdf_bs:1;
 		uint64_t dpi_bs:1;
+#else
+		uint64_t dpi_bs:1;
+		uint64_t pdf_bs:1;
+		uint64_t dob_bs:1;
+		uint64_t nus_bs:1;
+		uint64_t pos_bs:1;
+		uint64_t reserved_5_7:3;
+		uint64_t pof0_bs:1;
+		uint64_t pig_bs:1;
+		uint64_t pgf_bs:1;
+		uint64_t rdnl_bs:1;
+		uint64_t pcad_bs:1;
+		uint64_t pcac_bs:1;
+		uint64_t rdn_bs:1;
+		uint64_t pcn_bs:1;
+		uint64_t pcnc_bs:1;
+		uint64_t rdp_bs:1;
+		uint64_t dif_bs:1;
+		uint64_t csr_bs:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn30xx;
 	struct cvmx_npi_bist_status_s cn31xx;
 	struct cvmx_npi_bist_status_s cn38xx;
 	struct cvmx_npi_bist_status_s cn38xxp2;
 	struct cvmx_npi_bist_status_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t csr_bs:1;
 		uint64_t dif_bs:1;
@@ -249,6 +306,28 @@ union cvmx_npi_bist_status {
 		uint64_t dob_bs:1;
 		uint64_t pdf_bs:1;
 		uint64_t dpi_bs:1;
+#else
+		uint64_t dpi_bs:1;
+		uint64_t pdf_bs:1;
+		uint64_t dob_bs:1;
+		uint64_t nus_bs:1;
+		uint64_t pos_bs:1;
+		uint64_t reserved_5_6:2;
+		uint64_t pof1_bs:1;
+		uint64_t pof0_bs:1;
+		uint64_t pig_bs:1;
+		uint64_t pgf_bs:1;
+		uint64_t rdnl_bs:1;
+		uint64_t pcad_bs:1;
+		uint64_t pcac_bs:1;
+		uint64_t rdn_bs:1;
+		uint64_t pcn_bs:1;
+		uint64_t pcnc_bs:1;
+		uint64_t rdp_bs:1;
+		uint64_t dif_bs:1;
+		uint64_t csr_bs:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn50xx;
 	struct cvmx_npi_bist_status_s cn58xx;
 	struct cvmx_npi_bist_status_s cn58xxp1;
@@ -257,9 +336,15 @@ union cvmx_npi_bist_status {
 union cvmx_npi_buff_size_outputx {
 	uint64_t u64;
 	struct cvmx_npi_buff_size_outputx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t isize:7;
 		uint64_t bsize:16;
+#else
+		uint64_t bsize:16;
+		uint64_t isize:7;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_npi_buff_size_outputx_s cn30xx;
 	struct cvmx_npi_buff_size_outputx_s cn31xx;
@@ -273,9 +358,15 @@ union cvmx_npi_buff_size_outputx {
 union cvmx_npi_comp_ctl {
 	uint64_t u64;
 	struct cvmx_npi_comp_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t pctl:5;
 		uint64_t nctl:5;
+#else
+		uint64_t nctl:5;
+		uint64_t pctl:5;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_npi_comp_ctl_s cn50xx;
 	struct cvmx_npi_comp_ctl_s cn58xx;
@@ -285,6 +376,7 @@ union cvmx_npi_comp_ctl {
 union cvmx_npi_ctl_status {
 	uint64_t u64;
 	struct cvmx_npi_ctl_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_63_63:1;
 		uint64_t chip_rev:8;
 		uint64_t dis_pniw:1;
@@ -306,8 +398,32 @@ union cvmx_npi_ctl_status {
 		uint64_t max_word:5;
 		uint64_t reserved_10_31:22;
 		uint64_t timer:10;
+#else
+		uint64_t timer:10;
+		uint64_t reserved_10_31:22;
+		uint64_t max_word:5;
+		uint64_t reserved_37_39:3;
+		uint64_t wait_com:1;
+		uint64_t pci_wdis:1;
+		uint64_t ins0_64b:1;
+		uint64_t ins1_64b:1;
+		uint64_t ins2_64b:1;
+		uint64_t ins3_64b:1;
+		uint64_t ins0_enb:1;
+		uint64_t ins1_enb:1;
+		uint64_t ins2_enb:1;
+		uint64_t ins3_enb:1;
+		uint64_t out0_enb:1;
+		uint64_t out1_enb:1;
+		uint64_t out2_enb:1;
+		uint64_t out3_enb:1;
+		uint64_t dis_pniw:1;
+		uint64_t chip_rev:8;
+		uint64_t reserved_63_63:1;
+#endif
 	} s;
 	struct cvmx_npi_ctl_status_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_63_63:1;
 		uint64_t chip_rev:8;
 		uint64_t dis_pniw:1;
@@ -323,8 +439,26 @@ union cvmx_npi_ctl_status {
 		uint64_t max_word:5;
 		uint64_t reserved_10_31:22;
 		uint64_t timer:10;
+#else
+		uint64_t timer:10;
+		uint64_t reserved_10_31:22;
+		uint64_t max_word:5;
+		uint64_t reserved_37_39:3;
+		uint64_t wait_com:1;
+		uint64_t pci_wdis:1;
+		uint64_t ins0_64b:1;
+		uint64_t reserved_43_45:3;
+		uint64_t ins0_enb:1;
+		uint64_t reserved_47_49:3;
+		uint64_t out0_enb:1;
+		uint64_t reserved_51_53:3;
+		uint64_t dis_pniw:1;
+		uint64_t chip_rev:8;
+		uint64_t reserved_63_63:1;
+#endif
 	} cn30xx;
 	struct cvmx_npi_ctl_status_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_63_63:1;
 		uint64_t chip_rev:8;
 		uint64_t dis_pniw:1;
@@ -343,6 +477,26 @@ union cvmx_npi_ctl_status {
 		uint64_t max_word:5;
 		uint64_t reserved_10_31:22;
 		uint64_t timer:10;
+#else
+		uint64_t timer:10;
+		uint64_t reserved_10_31:22;
+		uint64_t max_word:5;
+		uint64_t reserved_37_39:3;
+		uint64_t wait_com:1;
+		uint64_t pci_wdis:1;
+		uint64_t ins0_64b:1;
+		uint64_t ins1_64b:1;
+		uint64_t reserved_44_45:2;
+		uint64_t ins0_enb:1;
+		uint64_t ins1_enb:1;
+		uint64_t reserved_48_49:2;
+		uint64_t out0_enb:1;
+		uint64_t out1_enb:1;
+		uint64_t reserved_52_53:2;
+		uint64_t dis_pniw:1;
+		uint64_t chip_rev:8;
+		uint64_t reserved_63_63:1;
+#endif
 	} cn31xx;
 	struct cvmx_npi_ctl_status_s cn38xx;
 	struct cvmx_npi_ctl_status_s cn38xxp2;
@@ -354,8 +508,13 @@ union cvmx_npi_ctl_status {
 union cvmx_npi_dbg_select {
 	uint64_t u64;
 	struct cvmx_npi_dbg_select_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t dbg_sel:16;
+#else
+		uint64_t dbg_sel:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_npi_dbg_select_s cn30xx;
 	struct cvmx_npi_dbg_select_s cn31xx;
@@ -369,6 +528,7 @@ union cvmx_npi_dbg_select {
 union cvmx_npi_dma_control {
 	uint64_t u64;
 	struct cvmx_npi_dma_control_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t b0_lend:1;
 		uint64_t dwb_denb:1;
@@ -382,6 +542,21 @@ union cvmx_npi_dma_control {
 		uint64_t hp_enb:1;
 		uint64_t lp_enb:1;
 		uint64_t csize:14;
+#else
+		uint64_t csize:14;
+		uint64_t lp_enb:1;
+		uint64_t hp_enb:1;
+		uint64_t o_mode:1;
+		uint64_t o_es:2;
+		uint64_t o_ns:1;
+		uint64_t o_ro:1;
+		uint64_t o_add1:1;
+		uint64_t fpa_que:3;
+		uint64_t dwb_ichk:9;
+		uint64_t dwb_denb:1;
+		uint64_t b0_lend:1;
+		uint64_t reserved_36_63:28;
+#endif
 	} s;
 	struct cvmx_npi_dma_control_s cn30xx;
 	struct cvmx_npi_dma_control_s cn31xx;
@@ -395,9 +570,15 @@ union cvmx_npi_dma_control {
 union cvmx_npi_dma_highp_counts {
 	uint64_t u64;
 	struct cvmx_npi_dma_highp_counts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_39_63:25;
 		uint64_t fcnt:7;
 		uint64_t dbell:32;
+#else
+		uint64_t dbell:32;
+		uint64_t fcnt:7;
+		uint64_t reserved_39_63:25;
+#endif
 	} s;
 	struct cvmx_npi_dma_highp_counts_s cn30xx;
 	struct cvmx_npi_dma_highp_counts_s cn31xx;
@@ -411,9 +592,15 @@ union cvmx_npi_dma_highp_counts {
 union cvmx_npi_dma_highp_naddr {
 	uint64_t u64;
 	struct cvmx_npi_dma_highp_naddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t state:4;
 		uint64_t addr:36;
+#else
+		uint64_t addr:36;
+		uint64_t state:4;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_npi_dma_highp_naddr_s cn30xx;
 	struct cvmx_npi_dma_highp_naddr_s cn31xx;
@@ -427,9 +614,15 @@ union cvmx_npi_dma_highp_naddr {
 union cvmx_npi_dma_lowp_counts {
 	uint64_t u64;
 	struct cvmx_npi_dma_lowp_counts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_39_63:25;
 		uint64_t fcnt:7;
 		uint64_t dbell:32;
+#else
+		uint64_t dbell:32;
+		uint64_t fcnt:7;
+		uint64_t reserved_39_63:25;
+#endif
 	} s;
 	struct cvmx_npi_dma_lowp_counts_s cn30xx;
 	struct cvmx_npi_dma_lowp_counts_s cn31xx;
@@ -443,9 +636,15 @@ union cvmx_npi_dma_lowp_counts {
 union cvmx_npi_dma_lowp_naddr {
 	uint64_t u64;
 	struct cvmx_npi_dma_lowp_naddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t state:4;
 		uint64_t addr:36;
+#else
+		uint64_t addr:36;
+		uint64_t state:4;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_npi_dma_lowp_naddr_s cn30xx;
 	struct cvmx_npi_dma_lowp_naddr_s cn31xx;
@@ -459,8 +658,13 @@ union cvmx_npi_dma_lowp_naddr {
 union cvmx_npi_highp_dbell {
 	uint64_t u64;
 	struct cvmx_npi_highp_dbell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t dbell:16;
+#else
+		uint64_t dbell:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_npi_highp_dbell_s cn30xx;
 	struct cvmx_npi_highp_dbell_s cn31xx;
@@ -474,8 +678,13 @@ union cvmx_npi_highp_dbell {
 union cvmx_npi_highp_ibuff_saddr {
 	uint64_t u64;
 	struct cvmx_npi_highp_ibuff_saddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t saddr:36;
+#else
+		uint64_t saddr:36;
+		uint64_t reserved_36_63:28;
+#endif
 	} s;
 	struct cvmx_npi_highp_ibuff_saddr_s cn30xx;
 	struct cvmx_npi_highp_ibuff_saddr_s cn31xx;
@@ -489,6 +698,7 @@ union cvmx_npi_highp_ibuff_saddr {
 union cvmx_npi_input_control {
 	uint64_t u64;
 	struct cvmx_npi_input_control_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t pkt_rr:1;
 		uint64_t pbp_dhi:13;
@@ -499,8 +709,21 @@ union cvmx_npi_input_control {
 		uint64_t nsr:1;
 		uint64_t esr:2;
 		uint64_t ror:1;
+#else
+		uint64_t ror:1;
+		uint64_t esr:2;
+		uint64_t nsr:1;
+		uint64_t use_csr:1;
+		uint64_t d_ror:1;
+		uint64_t d_esr:2;
+		uint64_t d_nsr:1;
+		uint64_t pbp_dhi:13;
+		uint64_t pkt_rr:1;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_npi_input_control_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_22_63:42;
 		uint64_t pbp_dhi:13;
 		uint64_t d_nsr:1;
@@ -510,6 +733,17 @@ union cvmx_npi_input_control {
 		uint64_t nsr:1;
 		uint64_t esr:2;
 		uint64_t ror:1;
+#else
+		uint64_t ror:1;
+		uint64_t esr:2;
+		uint64_t nsr:1;
+		uint64_t use_csr:1;
+		uint64_t d_ror:1;
+		uint64_t d_esr:2;
+		uint64_t d_nsr:1;
+		uint64_t pbp_dhi:13;
+		uint64_t reserved_22_63:42;
+#endif
 	} cn30xx;
 	struct cvmx_npi_input_control_cn30xx cn31xx;
 	struct cvmx_npi_input_control_s cn38xx;
@@ -522,6 +756,7 @@ union cvmx_npi_input_control {
 union cvmx_npi_int_enb {
 	uint64_t u64;
 	struct cvmx_npi_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t q1_a_f:1;
 		uint64_t q1_s_e:1;
@@ -585,8 +820,74 @@ union cvmx_npi_int_enb {
 		uint64_t pci_rsl:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t pci_rsl:1;
+		uint64_t po0_2sml:1;
+		uint64_t po1_2sml:1;
+		uint64_t po2_2sml:1;
+		uint64_t po3_2sml:1;
+		uint64_t i0_rtout:1;
+		uint64_t i1_rtout:1;
+		uint64_t i2_rtout:1;
+		uint64_t i3_rtout:1;
+		uint64_t i0_overf:1;
+		uint64_t i1_overf:1;
+		uint64_t i2_overf:1;
+		uint64_t i3_overf:1;
+		uint64_t p0_rtout:1;
+		uint64_t p1_rtout:1;
+		uint64_t p2_rtout:1;
+		uint64_t p3_rtout:1;
+		uint64_t p0_perr:1;
+		uint64_t p1_perr:1;
+		uint64_t p2_perr:1;
+		uint64_t p3_perr:1;
+		uint64_t g0_rtout:1;
+		uint64_t g1_rtout:1;
+		uint64_t g2_rtout:1;
+		uint64_t g3_rtout:1;
+		uint64_t p0_pperr:1;
+		uint64_t p1_pperr:1;
+		uint64_t p2_pperr:1;
+		uint64_t p3_pperr:1;
+		uint64_t p0_ptout:1;
+		uint64_t p1_ptout:1;
+		uint64_t p2_ptout:1;
+		uint64_t p3_ptout:1;
+		uint64_t i0_pperr:1;
+		uint64_t i1_pperr:1;
+		uint64_t i2_pperr:1;
+		uint64_t i3_pperr:1;
+		uint64_t win_rto:1;
+		uint64_t p_dperr:1;
+		uint64_t iobdma:1;
+		uint64_t fcr_s_e:1;
+		uint64_t fcr_a_f:1;
+		uint64_t pcr_s_e:1;
+		uint64_t pcr_a_f:1;
+		uint64_t q2_s_e:1;
+		uint64_t q2_a_f:1;
+		uint64_t q3_s_e:1;
+		uint64_t q3_a_f:1;
+		uint64_t com_s_e:1;
+		uint64_t com_a_f:1;
+		uint64_t pnc_s_e:1;
+		uint64_t pnc_a_f:1;
+		uint64_t rwx_s_e:1;
+		uint64_t rdx_s_e:1;
+		uint64_t pcf_p_e:1;
+		uint64_t pcf_p_f:1;
+		uint64_t pdf_p_e:1;
+		uint64_t pdf_p_f:1;
+		uint64_t q1_s_e:1;
+		uint64_t q1_a_f:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_npi_int_enb_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t q1_a_f:1;
 		uint64_t q1_s_e:1;
@@ -632,8 +933,56 @@ union cvmx_npi_int_enb {
 		uint64_t pci_rsl:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t pci_rsl:1;
+		uint64_t po0_2sml:1;
+		uint64_t reserved_4_6:3;
+		uint64_t i0_rtout:1;
+		uint64_t reserved_8_10:3;
+		uint64_t i0_overf:1;
+		uint64_t reserved_12_14:3;
+		uint64_t p0_rtout:1;
+		uint64_t reserved_16_18:3;
+		uint64_t p0_perr:1;
+		uint64_t reserved_20_22:3;
+		uint64_t g0_rtout:1;
+		uint64_t reserved_24_26:3;
+		uint64_t p0_pperr:1;
+		uint64_t reserved_28_30:3;
+		uint64_t p0_ptout:1;
+		uint64_t reserved_32_34:3;
+		uint64_t i0_pperr:1;
+		uint64_t reserved_36_38:3;
+		uint64_t win_rto:1;
+		uint64_t p_dperr:1;
+		uint64_t iobdma:1;
+		uint64_t fcr_s_e:1;
+		uint64_t fcr_a_f:1;
+		uint64_t pcr_s_e:1;
+		uint64_t pcr_a_f:1;
+		uint64_t q2_s_e:1;
+		uint64_t q2_a_f:1;
+		uint64_t q3_s_e:1;
+		uint64_t q3_a_f:1;
+		uint64_t com_s_e:1;
+		uint64_t com_a_f:1;
+		uint64_t pnc_s_e:1;
+		uint64_t pnc_a_f:1;
+		uint64_t rwx_s_e:1;
+		uint64_t rdx_s_e:1;
+		uint64_t pcf_p_e:1;
+		uint64_t pcf_p_f:1;
+		uint64_t pdf_p_e:1;
+		uint64_t pdf_p_f:1;
+		uint64_t q1_s_e:1;
+		uint64_t q1_a_f:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} cn30xx;
 	struct cvmx_npi_int_enb_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t q1_a_f:1;
 		uint64_t q1_s_e:1;
@@ -688,9 +1037,66 @@ union cvmx_npi_int_enb {
 		uint64_t pci_rsl:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t pci_rsl:1;
+		uint64_t po0_2sml:1;
+		uint64_t po1_2sml:1;
+		uint64_t reserved_5_6:2;
+		uint64_t i0_rtout:1;
+		uint64_t i1_rtout:1;
+		uint64_t reserved_9_10:2;
+		uint64_t i0_overf:1;
+		uint64_t i1_overf:1;
+		uint64_t reserved_13_14:2;
+		uint64_t p0_rtout:1;
+		uint64_t p1_rtout:1;
+		uint64_t reserved_17_18:2;
+		uint64_t p0_perr:1;
+		uint64_t p1_perr:1;
+		uint64_t reserved_21_22:2;
+		uint64_t g0_rtout:1;
+		uint64_t g1_rtout:1;
+		uint64_t reserved_25_26:2;
+		uint64_t p0_pperr:1;
+		uint64_t p1_pperr:1;
+		uint64_t reserved_29_30:2;
+		uint64_t p0_ptout:1;
+		uint64_t p1_ptout:1;
+		uint64_t reserved_33_34:2;
+		uint64_t i0_pperr:1;
+		uint64_t i1_pperr:1;
+		uint64_t reserved_37_38:2;
+		uint64_t win_rto:1;
+		uint64_t p_dperr:1;
+		uint64_t iobdma:1;
+		uint64_t fcr_s_e:1;
+		uint64_t fcr_a_f:1;
+		uint64_t pcr_s_e:1;
+		uint64_t pcr_a_f:1;
+		uint64_t q2_s_e:1;
+		uint64_t q2_a_f:1;
+		uint64_t q3_s_e:1;
+		uint64_t q3_a_f:1;
+		uint64_t com_s_e:1;
+		uint64_t com_a_f:1;
+		uint64_t pnc_s_e:1;
+		uint64_t pnc_a_f:1;
+		uint64_t rwx_s_e:1;
+		uint64_t rdx_s_e:1;
+		uint64_t pcf_p_e:1;
+		uint64_t pcf_p_f:1;
+		uint64_t pdf_p_e:1;
+		uint64_t pdf_p_f:1;
+		uint64_t q1_s_e:1;
+		uint64_t q1_a_f:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} cn31xx;
 	struct cvmx_npi_int_enb_s cn38xx;
 	struct cvmx_npi_int_enb_cn38xxp2 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_42_63:22;
 		uint64_t iobdma:1;
 		uint64_t p_dperr:1;
@@ -734,6 +1140,51 @@ union cvmx_npi_int_enb {
 		uint64_t pci_rsl:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t pci_rsl:1;
+		uint64_t po0_2sml:1;
+		uint64_t po1_2sml:1;
+		uint64_t po2_2sml:1;
+		uint64_t po3_2sml:1;
+		uint64_t i0_rtout:1;
+		uint64_t i1_rtout:1;
+		uint64_t i2_rtout:1;
+		uint64_t i3_rtout:1;
+		uint64_t i0_overf:1;
+		uint64_t i1_overf:1;
+		uint64_t i2_overf:1;
+		uint64_t i3_overf:1;
+		uint64_t p0_rtout:1;
+		uint64_t p1_rtout:1;
+		uint64_t p2_rtout:1;
+		uint64_t p3_rtout:1;
+		uint64_t p0_perr:1;
+		uint64_t p1_perr:1;
+		uint64_t p2_perr:1;
+		uint64_t p3_perr:1;
+		uint64_t g0_rtout:1;
+		uint64_t g1_rtout:1;
+		uint64_t g2_rtout:1;
+		uint64_t g3_rtout:1;
+		uint64_t p0_pperr:1;
+		uint64_t p1_pperr:1;
+		uint64_t p2_pperr:1;
+		uint64_t p3_pperr:1;
+		uint64_t p0_ptout:1;
+		uint64_t p1_ptout:1;
+		uint64_t p2_ptout:1;
+		uint64_t p3_ptout:1;
+		uint64_t i0_pperr:1;
+		uint64_t i1_pperr:1;
+		uint64_t i2_pperr:1;
+		uint64_t i3_pperr:1;
+		uint64_t win_rto:1;
+		uint64_t p_dperr:1;
+		uint64_t iobdma:1;
+		uint64_t reserved_42_63:22;
+#endif
 	} cn38xxp2;
 	struct cvmx_npi_int_enb_cn31xx cn50xx;
 	struct cvmx_npi_int_enb_s cn58xx;
@@ -743,6 +1194,7 @@ union cvmx_npi_int_enb {
 union cvmx_npi_int_sum {
 	uint64_t u64;
 	struct cvmx_npi_int_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t q1_a_f:1;
 		uint64_t q1_s_e:1;
@@ -806,8 +1258,74 @@ union cvmx_npi_int_sum {
 		uint64_t pci_rsl:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t pci_rsl:1;
+		uint64_t po0_2sml:1;
+		uint64_t po1_2sml:1;
+		uint64_t po2_2sml:1;
+		uint64_t po3_2sml:1;
+		uint64_t i0_rtout:1;
+		uint64_t i1_rtout:1;
+		uint64_t i2_rtout:1;
+		uint64_t i3_rtout:1;
+		uint64_t i0_overf:1;
+		uint64_t i1_overf:1;
+		uint64_t i2_overf:1;
+		uint64_t i3_overf:1;
+		uint64_t p0_rtout:1;
+		uint64_t p1_rtout:1;
+		uint64_t p2_rtout:1;
+		uint64_t p3_rtout:1;
+		uint64_t p0_perr:1;
+		uint64_t p1_perr:1;
+		uint64_t p2_perr:1;
+		uint64_t p3_perr:1;
+		uint64_t g0_rtout:1;
+		uint64_t g1_rtout:1;
+		uint64_t g2_rtout:1;
+		uint64_t g3_rtout:1;
+		uint64_t p0_pperr:1;
+		uint64_t p1_pperr:1;
+		uint64_t p2_pperr:1;
+		uint64_t p3_pperr:1;
+		uint64_t p0_ptout:1;
+		uint64_t p1_ptout:1;
+		uint64_t p2_ptout:1;
+		uint64_t p3_ptout:1;
+		uint64_t i0_pperr:1;
+		uint64_t i1_pperr:1;
+		uint64_t i2_pperr:1;
+		uint64_t i3_pperr:1;
+		uint64_t win_rto:1;
+		uint64_t p_dperr:1;
+		uint64_t iobdma:1;
+		uint64_t fcr_s_e:1;
+		uint64_t fcr_a_f:1;
+		uint64_t pcr_s_e:1;
+		uint64_t pcr_a_f:1;
+		uint64_t q2_s_e:1;
+		uint64_t q2_a_f:1;
+		uint64_t q3_s_e:1;
+		uint64_t q3_a_f:1;
+		uint64_t com_s_e:1;
+		uint64_t com_a_f:1;
+		uint64_t pnc_s_e:1;
+		uint64_t pnc_a_f:1;
+		uint64_t rwx_s_e:1;
+		uint64_t rdx_s_e:1;
+		uint64_t pcf_p_e:1;
+		uint64_t pcf_p_f:1;
+		uint64_t pdf_p_e:1;
+		uint64_t pdf_p_f:1;
+		uint64_t q1_s_e:1;
+		uint64_t q1_a_f:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_npi_int_sum_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t q1_a_f:1;
 		uint64_t q1_s_e:1;
@@ -853,8 +1371,56 @@ union cvmx_npi_int_sum {
 		uint64_t pci_rsl:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t pci_rsl:1;
+		uint64_t po0_2sml:1;
+		uint64_t reserved_4_6:3;
+		uint64_t i0_rtout:1;
+		uint64_t reserved_8_10:3;
+		uint64_t i0_overf:1;
+		uint64_t reserved_12_14:3;
+		uint64_t p0_rtout:1;
+		uint64_t reserved_16_18:3;
+		uint64_t p0_perr:1;
+		uint64_t reserved_20_22:3;
+		uint64_t g0_rtout:1;
+		uint64_t reserved_24_26:3;
+		uint64_t p0_pperr:1;
+		uint64_t reserved_28_30:3;
+		uint64_t p0_ptout:1;
+		uint64_t reserved_32_34:3;
+		uint64_t i0_pperr:1;
+		uint64_t reserved_36_38:3;
+		uint64_t win_rto:1;
+		uint64_t p_dperr:1;
+		uint64_t iobdma:1;
+		uint64_t fcr_s_e:1;
+		uint64_t fcr_a_f:1;
+		uint64_t pcr_s_e:1;
+		uint64_t pcr_a_f:1;
+		uint64_t q2_s_e:1;
+		uint64_t q2_a_f:1;
+		uint64_t q3_s_e:1;
+		uint64_t q3_a_f:1;
+		uint64_t com_s_e:1;
+		uint64_t com_a_f:1;
+		uint64_t pnc_s_e:1;
+		uint64_t pnc_a_f:1;
+		uint64_t rwx_s_e:1;
+		uint64_t rdx_s_e:1;
+		uint64_t pcf_p_e:1;
+		uint64_t pcf_p_f:1;
+		uint64_t pdf_p_e:1;
+		uint64_t pdf_p_f:1;
+		uint64_t q1_s_e:1;
+		uint64_t q1_a_f:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} cn30xx;
 	struct cvmx_npi_int_sum_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t q1_a_f:1;
 		uint64_t q1_s_e:1;
@@ -909,9 +1475,66 @@ union cvmx_npi_int_sum {
 		uint64_t pci_rsl:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t pci_rsl:1;
+		uint64_t po0_2sml:1;
+		uint64_t po1_2sml:1;
+		uint64_t reserved_5_6:2;
+		uint64_t i0_rtout:1;
+		uint64_t i1_rtout:1;
+		uint64_t reserved_9_10:2;
+		uint64_t i0_overf:1;
+		uint64_t i1_overf:1;
+		uint64_t reserved_13_14:2;
+		uint64_t p0_rtout:1;
+		uint64_t p1_rtout:1;
+		uint64_t reserved_17_18:2;
+		uint64_t p0_perr:1;
+		uint64_t p1_perr:1;
+		uint64_t reserved_21_22:2;
+		uint64_t g0_rtout:1;
+		uint64_t g1_rtout:1;
+		uint64_t reserved_25_26:2;
+		uint64_t p0_pperr:1;
+		uint64_t p1_pperr:1;
+		uint64_t reserved_29_30:2;
+		uint64_t p0_ptout:1;
+		uint64_t p1_ptout:1;
+		uint64_t reserved_33_34:2;
+		uint64_t i0_pperr:1;
+		uint64_t i1_pperr:1;
+		uint64_t reserved_37_38:2;
+		uint64_t win_rto:1;
+		uint64_t p_dperr:1;
+		uint64_t iobdma:1;
+		uint64_t fcr_s_e:1;
+		uint64_t fcr_a_f:1;
+		uint64_t pcr_s_e:1;
+		uint64_t pcr_a_f:1;
+		uint64_t q2_s_e:1;
+		uint64_t q2_a_f:1;
+		uint64_t q3_s_e:1;
+		uint64_t q3_a_f:1;
+		uint64_t com_s_e:1;
+		uint64_t com_a_f:1;
+		uint64_t pnc_s_e:1;
+		uint64_t pnc_a_f:1;
+		uint64_t rwx_s_e:1;
+		uint64_t rdx_s_e:1;
+		uint64_t pcf_p_e:1;
+		uint64_t pcf_p_f:1;
+		uint64_t pdf_p_e:1;
+		uint64_t pdf_p_f:1;
+		uint64_t q1_s_e:1;
+		uint64_t q1_a_f:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} cn31xx;
 	struct cvmx_npi_int_sum_s cn38xx;
 	struct cvmx_npi_int_sum_cn38xxp2 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_42_63:22;
 		uint64_t iobdma:1;
 		uint64_t p_dperr:1;
@@ -955,6 +1578,51 @@ union cvmx_npi_int_sum {
 		uint64_t pci_rsl:1;
 		uint64_t rml_wto:1;
 		uint64_t rml_rto:1;
+#else
+		uint64_t rml_rto:1;
+		uint64_t rml_wto:1;
+		uint64_t pci_rsl:1;
+		uint64_t po0_2sml:1;
+		uint64_t po1_2sml:1;
+		uint64_t po2_2sml:1;
+		uint64_t po3_2sml:1;
+		uint64_t i0_rtout:1;
+		uint64_t i1_rtout:1;
+		uint64_t i2_rtout:1;
+		uint64_t i3_rtout:1;
+		uint64_t i0_overf:1;
+		uint64_t i1_overf:1;
+		uint64_t i2_overf:1;
+		uint64_t i3_overf:1;
+		uint64_t p0_rtout:1;
+		uint64_t p1_rtout:1;
+		uint64_t p2_rtout:1;
+		uint64_t p3_rtout:1;
+		uint64_t p0_perr:1;
+		uint64_t p1_perr:1;
+		uint64_t p2_perr:1;
+		uint64_t p3_perr:1;
+		uint64_t g0_rtout:1;
+		uint64_t g1_rtout:1;
+		uint64_t g2_rtout:1;
+		uint64_t g3_rtout:1;
+		uint64_t p0_pperr:1;
+		uint64_t p1_pperr:1;
+		uint64_t p2_pperr:1;
+		uint64_t p3_pperr:1;
+		uint64_t p0_ptout:1;
+		uint64_t p1_ptout:1;
+		uint64_t p2_ptout:1;
+		uint64_t p3_ptout:1;
+		uint64_t i0_pperr:1;
+		uint64_t i1_pperr:1;
+		uint64_t i2_pperr:1;
+		uint64_t i3_pperr:1;
+		uint64_t win_rto:1;
+		uint64_t p_dperr:1;
+		uint64_t iobdma:1;
+		uint64_t reserved_42_63:22;
+#endif
 	} cn38xxp2;
 	struct cvmx_npi_int_sum_cn31xx cn50xx;
 	struct cvmx_npi_int_sum_s cn58xx;
@@ -964,8 +1632,13 @@ union cvmx_npi_int_sum {
 union cvmx_npi_lowp_dbell {
 	uint64_t u64;
 	struct cvmx_npi_lowp_dbell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t dbell:16;
+#else
+		uint64_t dbell:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_npi_lowp_dbell_s cn30xx;
 	struct cvmx_npi_lowp_dbell_s cn31xx;
@@ -979,8 +1652,13 @@ union cvmx_npi_lowp_dbell {
 union cvmx_npi_lowp_ibuff_saddr {
 	uint64_t u64;
 	struct cvmx_npi_lowp_ibuff_saddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t saddr:36;
+#else
+		uint64_t saddr:36;
+		uint64_t reserved_36_63:28;
+#endif
 	} s;
 	struct cvmx_npi_lowp_ibuff_saddr_s cn30xx;
 	struct cvmx_npi_lowp_ibuff_saddr_s cn31xx;
@@ -994,6 +1672,7 @@ union cvmx_npi_lowp_ibuff_saddr {
 union cvmx_npi_mem_access_subidx {
 	uint64_t u64;
 	struct cvmx_npi_mem_access_subidx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t shortl:1;
 		uint64_t nmerge:1;
@@ -1004,9 +1683,22 @@ union cvmx_npi_mem_access_subidx {
 		uint64_t ror:1;
 		uint64_t row:1;
 		uint64_t ba:28;
+#else
+		uint64_t ba:28;
+		uint64_t row:1;
+		uint64_t ror:1;
+		uint64_t nsw:1;
+		uint64_t nsr:1;
+		uint64_t esw:2;
+		uint64_t esr:2;
+		uint64_t nmerge:1;
+		uint64_t shortl:1;
+		uint64_t reserved_38_63:26;
+#endif
 	} s;
 	struct cvmx_npi_mem_access_subidx_s cn30xx;
 	struct cvmx_npi_mem_access_subidx_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t esr:2;
 		uint64_t esw:2;
@@ -1015,6 +1707,16 @@ union cvmx_npi_mem_access_subidx {
 		uint64_t ror:1;
 		uint64_t row:1;
 		uint64_t ba:28;
+#else
+		uint64_t ba:28;
+		uint64_t row:1;
+		uint64_t ror:1;
+		uint64_t nsw:1;
+		uint64_t nsr:1;
+		uint64_t esw:2;
+		uint64_t esr:2;
+		uint64_t reserved_36_63:28;
+#endif
 	} cn31xx;
 	struct cvmx_npi_mem_access_subidx_s cn38xx;
 	struct cvmx_npi_mem_access_subidx_cn31xx cn38xxp2;
@@ -1026,7 +1728,11 @@ union cvmx_npi_mem_access_subidx {
 union cvmx_npi_msi_rcv {
 	uint64_t u64;
 	struct cvmx_npi_msi_rcv_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t int_vec:64;
+#else
 		uint64_t int_vec:64;
+#endif
 	} s;
 	struct cvmx_npi_msi_rcv_s cn30xx;
 	struct cvmx_npi_msi_rcv_s cn31xx;
@@ -1040,8 +1746,13 @@ union cvmx_npi_msi_rcv {
 union cvmx_npi_num_desc_outputx {
 	uint64_t u64;
 	struct cvmx_npi_num_desc_outputx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t size:32;
+#else
+		uint64_t size:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npi_num_desc_outputx_s cn30xx;
 	struct cvmx_npi_num_desc_outputx_s cn31xx;
@@ -1055,6 +1766,7 @@ union cvmx_npi_num_desc_outputx {
 union cvmx_npi_output_control {
 	uint64_t u64;
 	struct cvmx_npi_output_control_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t pkt_rr:1;
 		uint64_t p3_bmode:1;
@@ -1094,8 +1806,50 @@ union cvmx_npi_output_control {
 		uint64_t esr_sl0:2;
 		uint64_t nsr_sl0:1;
 		uint64_t ror_sl0:1;
+#else
+		uint64_t ror_sl0:1;
+		uint64_t nsr_sl0:1;
+		uint64_t esr_sl0:2;
+		uint64_t ror_sl1:1;
+		uint64_t nsr_sl1:1;
+		uint64_t esr_sl1:2;
+		uint64_t ror_sl2:1;
+		uint64_t nsr_sl2:1;
+		uint64_t esr_sl2:2;
+		uint64_t ror_sl3:1;
+		uint64_t nsr_sl3:1;
+		uint64_t esr_sl3:2;
+		uint64_t iptr_o0:1;
+		uint64_t iptr_o1:1;
+		uint64_t iptr_o2:1;
+		uint64_t iptr_o3:1;
+		uint64_t reserved_20_23:4;
+		uint64_t o0_csrm:1;
+		uint64_t o1_csrm:1;
+		uint64_t o2_csrm:1;
+		uint64_t o3_csrm:1;
+		uint64_t o0_ro:1;
+		uint64_t o0_ns:1;
+		uint64_t o0_es:2;
+		uint64_t o1_ro:1;
+		uint64_t o1_ns:1;
+		uint64_t o1_es:2;
+		uint64_t o2_ro:1;
+		uint64_t o2_ns:1;
+		uint64_t o2_es:2;
+		uint64_t o3_ro:1;
+		uint64_t o3_ns:1;
+		uint64_t o3_es:2;
+		uint64_t p0_bmode:1;
+		uint64_t p1_bmode:1;
+		uint64_t p2_bmode:1;
+		uint64_t p3_bmode:1;
+		uint64_t pkt_rr:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} s;
 	struct cvmx_npi_output_control_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_45_63:19;
 		uint64_t p0_bmode:1;
 		uint64_t reserved_32_43:12;
@@ -1110,8 +1864,25 @@ union cvmx_npi_output_control {
 		uint64_t esr_sl0:2;
 		uint64_t nsr_sl0:1;
 		uint64_t ror_sl0:1;
+#else
+		uint64_t ror_sl0:1;
+		uint64_t nsr_sl0:1;
+		uint64_t esr_sl0:2;
+		uint64_t reserved_4_15:12;
+		uint64_t iptr_o0:1;
+		uint64_t reserved_17_23:7;
+		uint64_t o0_csrm:1;
+		uint64_t reserved_25_27:3;
+		uint64_t o0_ro:1;
+		uint64_t o0_ns:1;
+		uint64_t o0_es:2;
+		uint64_t reserved_32_43:12;
+		uint64_t p0_bmode:1;
+		uint64_t reserved_45_63:19;
+#endif
 	} cn30xx;
 	struct cvmx_npi_output_control_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_46_63:18;
 		uint64_t p1_bmode:1;
 		uint64_t p0_bmode:1;
@@ -1135,9 +1906,35 @@ union cvmx_npi_output_control {
 		uint64_t esr_sl0:2;
 		uint64_t nsr_sl0:1;
 		uint64_t ror_sl0:1;
+#else
+		uint64_t ror_sl0:1;
+		uint64_t nsr_sl0:1;
+		uint64_t esr_sl0:2;
+		uint64_t ror_sl1:1;
+		uint64_t nsr_sl1:1;
+		uint64_t esr_sl1:2;
+		uint64_t reserved_8_15:8;
+		uint64_t iptr_o0:1;
+		uint64_t iptr_o1:1;
+		uint64_t reserved_18_23:6;
+		uint64_t o0_csrm:1;
+		uint64_t o1_csrm:1;
+		uint64_t reserved_26_27:2;
+		uint64_t o0_ro:1;
+		uint64_t o0_ns:1;
+		uint64_t o0_es:2;
+		uint64_t o1_ro:1;
+		uint64_t o1_ns:1;
+		uint64_t o1_es:2;
+		uint64_t reserved_36_43:8;
+		uint64_t p0_bmode:1;
+		uint64_t p1_bmode:1;
+		uint64_t reserved_46_63:18;
+#endif
 	} cn31xx;
 	struct cvmx_npi_output_control_s cn38xx;
 	struct cvmx_npi_output_control_cn38xxp2 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t p3_bmode:1;
 		uint64_t p2_bmode:1;
@@ -1176,8 +1973,49 @@ union cvmx_npi_output_control {
 		uint64_t esr_sl0:2;
 		uint64_t nsr_sl0:1;
 		uint64_t ror_sl0:1;
+#else
+		uint64_t ror_sl0:1;
+		uint64_t nsr_sl0:1;
+		uint64_t esr_sl0:2;
+		uint64_t ror_sl1:1;
+		uint64_t nsr_sl1:1;
+		uint64_t esr_sl1:2;
+		uint64_t ror_sl2:1;
+		uint64_t nsr_sl2:1;
+		uint64_t esr_sl2:2;
+		uint64_t ror_sl3:1;
+		uint64_t nsr_sl3:1;
+		uint64_t esr_sl3:2;
+		uint64_t iptr_o0:1;
+		uint64_t iptr_o1:1;
+		uint64_t iptr_o2:1;
+		uint64_t iptr_o3:1;
+		uint64_t reserved_20_23:4;
+		uint64_t o0_csrm:1;
+		uint64_t o1_csrm:1;
+		uint64_t o2_csrm:1;
+		uint64_t o3_csrm:1;
+		uint64_t o0_ro:1;
+		uint64_t o0_ns:1;
+		uint64_t o0_es:2;
+		uint64_t o1_ro:1;
+		uint64_t o1_ns:1;
+		uint64_t o1_es:2;
+		uint64_t o2_ro:1;
+		uint64_t o2_ns:1;
+		uint64_t o2_es:2;
+		uint64_t o3_ro:1;
+		uint64_t o3_ns:1;
+		uint64_t o3_es:2;
+		uint64_t p0_bmode:1;
+		uint64_t p1_bmode:1;
+		uint64_t p2_bmode:1;
+		uint64_t p3_bmode:1;
+		uint64_t reserved_48_63:16;
+#endif
 	} cn38xxp2;
 	struct cvmx_npi_output_control_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t pkt_rr:1;
 		uint64_t reserved_46_47:2;
@@ -1203,6 +2041,33 @@ union cvmx_npi_output_control {
 		uint64_t esr_sl0:2;
 		uint64_t nsr_sl0:1;
 		uint64_t ror_sl0:1;
+#else
+		uint64_t ror_sl0:1;
+		uint64_t nsr_sl0:1;
+		uint64_t esr_sl0:2;
+		uint64_t ror_sl1:1;
+		uint64_t nsr_sl1:1;
+		uint64_t esr_sl1:2;
+		uint64_t reserved_8_15:8;
+		uint64_t iptr_o0:1;
+		uint64_t iptr_o1:1;
+		uint64_t reserved_18_23:6;
+		uint64_t o0_csrm:1;
+		uint64_t o1_csrm:1;
+		uint64_t reserved_26_27:2;
+		uint64_t o0_ro:1;
+		uint64_t o0_ns:1;
+		uint64_t o0_es:2;
+		uint64_t o1_ro:1;
+		uint64_t o1_ns:1;
+		uint64_t o1_es:2;
+		uint64_t reserved_36_43:8;
+		uint64_t p0_bmode:1;
+		uint64_t p1_bmode:1;
+		uint64_t reserved_46_47:2;
+		uint64_t pkt_rr:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} cn50xx;
 	struct cvmx_npi_output_control_s cn58xx;
 	struct cvmx_npi_output_control_s cn58xxp1;
@@ -1211,9 +2076,15 @@ union cvmx_npi_output_control {
 union cvmx_npi_px_dbpair_addr {
 	uint64_t u64;
 	struct cvmx_npi_px_dbpair_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_63_63:1;
 		uint64_t state:2;
 		uint64_t naddr:61;
+#else
+		uint64_t naddr:61;
+		uint64_t state:2;
+		uint64_t reserved_63_63:1;
+#endif
 	} s;
 	struct cvmx_npi_px_dbpair_addr_s cn30xx;
 	struct cvmx_npi_px_dbpair_addr_s cn31xx;
@@ -1227,8 +2098,13 @@ union cvmx_npi_px_dbpair_addr {
 union cvmx_npi_px_instr_addr {
 	uint64_t u64;
 	struct cvmx_npi_px_instr_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t state:3;
 		uint64_t naddr:61;
+#else
+		uint64_t naddr:61;
+		uint64_t state:3;
+#endif
 	} s;
 	struct cvmx_npi_px_instr_addr_s cn30xx;
 	struct cvmx_npi_px_instr_addr_s cn31xx;
@@ -1242,9 +2118,15 @@ union cvmx_npi_px_instr_addr {
 union cvmx_npi_px_instr_cnts {
 	uint64_t u64;
 	struct cvmx_npi_px_instr_cnts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t fcnt:6;
 		uint64_t avail:32;
+#else
+		uint64_t avail:32;
+		uint64_t fcnt:6;
+		uint64_t reserved_38_63:26;
+#endif
 	} s;
 	struct cvmx_npi_px_instr_cnts_s cn30xx;
 	struct cvmx_npi_px_instr_cnts_s cn31xx;
@@ -1258,9 +2140,15 @@ union cvmx_npi_px_instr_cnts {
 union cvmx_npi_px_pair_cnts {
 	uint64_t u64;
 	struct cvmx_npi_px_pair_cnts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t fcnt:5;
 		uint64_t avail:32;
+#else
+		uint64_t avail:32;
+		uint64_t fcnt:5;
+		uint64_t reserved_37_63:27;
+#endif
 	} s;
 	struct cvmx_npi_px_pair_cnts_s cn30xx;
 	struct cvmx_npi_px_pair_cnts_s cn31xx;
@@ -1274,9 +2162,15 @@ union cvmx_npi_px_pair_cnts {
 union cvmx_npi_pci_burst_size {
 	uint64_t u64;
 	struct cvmx_npi_pci_burst_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t wr_brst:7;
 		uint64_t rd_brst:7;
+#else
+		uint64_t rd_brst:7;
+		uint64_t wr_brst:7;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_npi_pci_burst_size_s cn30xx;
 	struct cvmx_npi_pci_burst_size_s cn31xx;
@@ -1290,6 +2184,7 @@ union cvmx_npi_pci_burst_size {
 union cvmx_npi_pci_int_arb_cfg {
 	uint64_t u64;
 	struct cvmx_npi_pci_int_arb_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t hostmode:1;
 		uint64_t pci_ovr:4;
@@ -1297,12 +2192,28 @@ union cvmx_npi_pci_int_arb_cfg {
 		uint64_t en:1;
 		uint64_t park_mod:1;
 		uint64_t park_dev:3;
+#else
+		uint64_t park_dev:3;
+		uint64_t park_mod:1;
+		uint64_t en:1;
+		uint64_t reserved_5_7:3;
+		uint64_t pci_ovr:4;
+		uint64_t hostmode:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_npi_pci_int_arb_cfg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t en:1;
 		uint64_t park_mod:1;
 		uint64_t park_dev:3;
+#else
+		uint64_t park_dev:3;
+		uint64_t park_mod:1;
+		uint64_t en:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} cn30xx;
 	struct cvmx_npi_pci_int_arb_cfg_cn30xx cn31xx;
 	struct cvmx_npi_pci_int_arb_cfg_cn30xx cn38xx;
@@ -1315,8 +2226,13 @@ union cvmx_npi_pci_int_arb_cfg {
 union cvmx_npi_pci_read_cmd {
 	uint64_t u64;
 	struct cvmx_npi_pci_read_cmd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t cmd_size:11;
+#else
+		uint64_t cmd_size:11;
+		uint64_t reserved_11_63:53;
+#endif
 	} s;
 	struct cvmx_npi_pci_read_cmd_s cn30xx;
 	struct cvmx_npi_pci_read_cmd_s cn31xx;
@@ -1330,6 +2246,7 @@ union cvmx_npi_pci_read_cmd {
 union cvmx_npi_port32_instr_hdr {
 	uint64_t u64;
 	struct cvmx_npi_port32_instr_hdr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t pbp:1;
 		uint64_t rsv_f:5;
@@ -1343,6 +2260,21 @@ union cvmx_npi_port32_instr_hdr {
 		uint64_t rsv_b:1;
 		uint64_t skp_len:7;
 		uint64_t rsv_a:6;
+#else
+		uint64_t rsv_a:6;
+		uint64_t skp_len:7;
+		uint64_t rsv_b:1;
+		uint64_t par_mode:2;
+		uint64_t rsv_c:5;
+		uint64_t use_ihdr:1;
+		uint64_t rsv_d:6;
+		uint64_t rskp_len:7;
+		uint64_t rsv_e:1;
+		uint64_t rparmode:2;
+		uint64_t rsv_f:5;
+		uint64_t pbp:1;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_npi_port32_instr_hdr_s cn30xx;
 	struct cvmx_npi_port32_instr_hdr_s cn31xx;
@@ -1356,6 +2288,7 @@ union cvmx_npi_port32_instr_hdr {
 union cvmx_npi_port33_instr_hdr {
 	uint64_t u64;
 	struct cvmx_npi_port33_instr_hdr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t pbp:1;
 		uint64_t rsv_f:5;
@@ -1369,6 +2302,21 @@ union cvmx_npi_port33_instr_hdr {
 		uint64_t rsv_b:1;
 		uint64_t skp_len:7;
 		uint64_t rsv_a:6;
+#else
+		uint64_t rsv_a:6;
+		uint64_t skp_len:7;
+		uint64_t rsv_b:1;
+		uint64_t par_mode:2;
+		uint64_t rsv_c:5;
+		uint64_t use_ihdr:1;
+		uint64_t rsv_d:6;
+		uint64_t rskp_len:7;
+		uint64_t rsv_e:1;
+		uint64_t rparmode:2;
+		uint64_t rsv_f:5;
+		uint64_t pbp:1;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_npi_port33_instr_hdr_s cn31xx;
 	struct cvmx_npi_port33_instr_hdr_s cn38xx;
@@ -1381,6 +2329,7 @@ union cvmx_npi_port33_instr_hdr {
 union cvmx_npi_port34_instr_hdr {
 	uint64_t u64;
 	struct cvmx_npi_port34_instr_hdr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t pbp:1;
 		uint64_t rsv_f:5;
@@ -1394,6 +2343,21 @@ union cvmx_npi_port34_instr_hdr {
 		uint64_t rsv_b:1;
 		uint64_t skp_len:7;
 		uint64_t rsv_a:6;
+#else
+		uint64_t rsv_a:6;
+		uint64_t skp_len:7;
+		uint64_t rsv_b:1;
+		uint64_t par_mode:2;
+		uint64_t rsv_c:5;
+		uint64_t use_ihdr:1;
+		uint64_t rsv_d:6;
+		uint64_t rskp_len:7;
+		uint64_t rsv_e:1;
+		uint64_t rparmode:2;
+		uint64_t rsv_f:5;
+		uint64_t pbp:1;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_npi_port34_instr_hdr_s cn38xx;
 	struct cvmx_npi_port34_instr_hdr_s cn38xxp2;
@@ -1404,6 +2368,7 @@ union cvmx_npi_port34_instr_hdr {
 union cvmx_npi_port35_instr_hdr {
 	uint64_t u64;
 	struct cvmx_npi_port35_instr_hdr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t pbp:1;
 		uint64_t rsv_f:5;
@@ -1417,6 +2382,21 @@ union cvmx_npi_port35_instr_hdr {
 		uint64_t rsv_b:1;
 		uint64_t skp_len:7;
 		uint64_t rsv_a:6;
+#else
+		uint64_t rsv_a:6;
+		uint64_t skp_len:7;
+		uint64_t rsv_b:1;
+		uint64_t par_mode:2;
+		uint64_t rsv_c:5;
+		uint64_t use_ihdr:1;
+		uint64_t rsv_d:6;
+		uint64_t rskp_len:7;
+		uint64_t rsv_e:1;
+		uint64_t rparmode:2;
+		uint64_t rsv_f:5;
+		uint64_t pbp:1;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_npi_port35_instr_hdr_s cn38xx;
 	struct cvmx_npi_port35_instr_hdr_s cn38xxp2;
@@ -1427,9 +2407,15 @@ union cvmx_npi_port35_instr_hdr {
 union cvmx_npi_port_bp_control {
 	uint64_t u64;
 	struct cvmx_npi_port_bp_control_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t bp_on:4;
 		uint64_t enb:4;
+#else
+		uint64_t enb:4;
+		uint64_t bp_on:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_npi_port_bp_control_s cn30xx;
 	struct cvmx_npi_port_bp_control_s cn31xx;
@@ -1443,6 +2429,7 @@ union cvmx_npi_port_bp_control {
 union cvmx_npi_rsl_int_blocks {
 	uint64_t u64;
 	struct cvmx_npi_rsl_int_blocks_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t rint_31:1;
 		uint64_t iob:1;
@@ -1474,8 +2461,42 @@ union cvmx_npi_rsl_int_blocks {
 		uint64_t gmx1:1;
 		uint64_t gmx0:1;
 		uint64_t mio:1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t gmx1:1;
+		uint64_t npi:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t dfa:1;
+		uint64_t zip:1;
+		uint64_t rint_8:1;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t reserved_13_14:2;
+		uint64_t rint_15:1;
+		uint64_t l2c:1;
+		uint64_t lmc:1;
+		uint64_t spx0:1;
+		uint64_t spx1:1;
+		uint64_t pip:1;
+		uint64_t rint_21:1;
+		uint64_t asx0:1;
+		uint64_t asx1:1;
+		uint64_t rint_24:1;
+		uint64_t rint_25:1;
+		uint64_t rint_26:1;
+		uint64_t rint_27:1;
+		uint64_t reserved_28_29:2;
+		uint64_t iob:1;
+		uint64_t rint_31:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npi_rsl_int_blocks_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t rint_31:1;
 		uint64_t iob:1;
@@ -1509,9 +2530,45 @@ union cvmx_npi_rsl_int_blocks {
 		uint64_t gmx1:1;
 		uint64_t gmx0:1;
 		uint64_t mio:1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t gmx1:1;
+		uint64_t npi:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t dfa:1;
+		uint64_t zip:1;
+		uint64_t rint_8:1;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t usb:1;
+		uint64_t rint_14:1;
+		uint64_t rint_15:1;
+		uint64_t l2c:1;
+		uint64_t lmc:1;
+		uint64_t spx0:1;
+		uint64_t spx1:1;
+		uint64_t pip:1;
+		uint64_t rint_21:1;
+		uint64_t asx0:1;
+		uint64_t asx1:1;
+		uint64_t rint_24:1;
+		uint64_t rint_25:1;
+		uint64_t rint_26:1;
+		uint64_t rint_27:1;
+		uint64_t rint_28:1;
+		uint64_t rint_29:1;
+		uint64_t iob:1;
+		uint64_t rint_31:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn30xx;
 	struct cvmx_npi_rsl_int_blocks_cn30xx cn31xx;
 	struct cvmx_npi_rsl_int_blocks_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t rint_31:1;
 		uint64_t iob:1;
@@ -1545,9 +2602,45 @@ union cvmx_npi_rsl_int_blocks {
 		uint64_t gmx1:1;
 		uint64_t gmx0:1;
 		uint64_t mio:1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t gmx1:1;
+		uint64_t npi:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t dfa:1;
+		uint64_t zip:1;
+		uint64_t rint_8:1;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t rint_13:1;
+		uint64_t rint_14:1;
+		uint64_t rint_15:1;
+		uint64_t l2c:1;
+		uint64_t lmc:1;
+		uint64_t spx0:1;
+		uint64_t spx1:1;
+		uint64_t pip:1;
+		uint64_t rint_21:1;
+		uint64_t asx0:1;
+		uint64_t asx1:1;
+		uint64_t rint_24:1;
+		uint64_t rint_25:1;
+		uint64_t rint_26:1;
+		uint64_t rint_27:1;
+		uint64_t rint_28:1;
+		uint64_t rint_29:1;
+		uint64_t iob:1;
+		uint64_t rint_31:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn38xx;
 	struct cvmx_npi_rsl_int_blocks_cn38xx cn38xxp2;
 	struct cvmx_npi_rsl_int_blocks_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t iob:1;
 		uint64_t lmc1:1;
@@ -1577,6 +2670,37 @@ union cvmx_npi_rsl_int_blocks {
 		uint64_t gmx1:1;
 		uint64_t gmx0:1;
 		uint64_t mio:1;
+#else
+		uint64_t mio:1;
+		uint64_t gmx0:1;
+		uint64_t gmx1:1;
+		uint64_t npi:1;
+		uint64_t key:1;
+		uint64_t fpa:1;
+		uint64_t dfa:1;
+		uint64_t zip:1;
+		uint64_t reserved_8_8:1;
+		uint64_t ipd:1;
+		uint64_t pko:1;
+		uint64_t tim:1;
+		uint64_t pow:1;
+		uint64_t usb:1;
+		uint64_t rad:1;
+		uint64_t reserved_15_15:1;
+		uint64_t l2c:1;
+		uint64_t lmc:1;
+		uint64_t spx0:1;
+		uint64_t spx1:1;
+		uint64_t pip:1;
+		uint64_t reserved_21_21:1;
+		uint64_t asx0:1;
+		uint64_t asx1:1;
+		uint64_t reserved_24_27:4;
+		uint64_t agl:1;
+		uint64_t lmc1:1;
+		uint64_t iob:1;
+		uint64_t reserved_31_63:33;
+#endif
 	} cn50xx;
 	struct cvmx_npi_rsl_int_blocks_cn38xx cn58xx;
 	struct cvmx_npi_rsl_int_blocks_cn38xx cn58xxp1;
@@ -1585,8 +2709,13 @@ union cvmx_npi_rsl_int_blocks {
 union cvmx_npi_size_inputx {
 	uint64_t u64;
 	struct cvmx_npi_size_inputx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t size:32;
+#else
+		uint64_t size:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npi_size_inputx_s cn30xx;
 	struct cvmx_npi_size_inputx_s cn31xx;
@@ -1600,8 +2729,13 @@ union cvmx_npi_size_inputx {
 union cvmx_npi_win_read_to {
 	uint64_t u64;
 	struct cvmx_npi_win_read_to_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t time:32;
+#else
+		uint64_t time:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_npi_win_read_to_s cn30xx;
 	struct cvmx_npi_win_read_to_s cn31xx;
diff --git a/arch/mips/include/asm/octeon/cvmx-pci-defs.h b/arch/mips/include/asm/octeon/cvmx-pci-defs.h
index 6ff6d9d357b..25d603f1829 100644
--- a/arch/mips/include/asm/octeon/cvmx-pci-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pci-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -117,11 +117,19 @@
 union cvmx_pci_bar1_indexx {
 	uint32_t u32;
 	struct cvmx_pci_bar1_indexx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_18_31:14;
 		uint32_t addr_idx:14;
 		uint32_t ca:1;
 		uint32_t end_swp:2;
 		uint32_t addr_v:1;
+#else
+		uint32_t addr_v:1;
+		uint32_t end_swp:2;
+		uint32_t ca:1;
+		uint32_t addr_idx:14;
+		uint32_t reserved_18_31:14;
+#endif
 	} s;
 	struct cvmx_pci_bar1_indexx_s cn30xx;
 	struct cvmx_pci_bar1_indexx_s cn31xx;
@@ -135,6 +143,7 @@ union cvmx_pci_bar1_indexx {
 union cvmx_pci_bist_reg {
 	uint64_t u64;
 	struct cvmx_pci_bist_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t rsp_bs:1;
 		uint64_t dma0_bs:1;
@@ -146,6 +155,19 @@ union cvmx_pci_bist_reg {
 		uint64_t csr2n_bs:1;
 		uint64_t dat2n_bs:1;
 		uint64_t dbg2n_bs:1;
+#else
+		uint64_t dbg2n_bs:1;
+		uint64_t dat2n_bs:1;
+		uint64_t csr2n_bs:1;
+		uint64_t rsp2p_bs:1;
+		uint64_t csrr_bs:1;
+		uint64_t csr2p_bs:1;
+		uint64_t cmd_bs:1;
+		uint64_t cmd0_bs:1;
+		uint64_t dma0_bs:1;
+		uint64_t rsp_bs:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_pci_bist_reg_s cn50xx;
 };
@@ -153,8 +175,13 @@ union cvmx_pci_bist_reg {
 union cvmx_pci_cfg00 {
 	uint32_t u32;
 	struct cvmx_pci_cfg00_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t devid:16;
 		uint32_t vendid:16;
+#else
+		uint32_t vendid:16;
+		uint32_t devid:16;
+#endif
 	} s;
 	struct cvmx_pci_cfg00_s cn30xx;
 	struct cvmx_pci_cfg00_s cn31xx;
@@ -168,6 +195,7 @@ union cvmx_pci_cfg00 {
 union cvmx_pci_cfg01 {
 	uint32_t u32;
 	struct cvmx_pci_cfg01_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t dpe:1;
 		uint32_t sse:1;
 		uint32_t rma:1;
@@ -192,6 +220,32 @@ union cvmx_pci_cfg01 {
 		uint32_t me:1;
 		uint32_t msae:1;
 		uint32_t isae:1;
+#else
+		uint32_t isae:1;
+		uint32_t msae:1;
+		uint32_t me:1;
+		uint32_t scse:1;
+		uint32_t mwice:1;
+		uint32_t vps:1;
+		uint32_t pee:1;
+		uint32_t ads:1;
+		uint32_t see:1;
+		uint32_t fbbe:1;
+		uint32_t i_dis:1;
+		uint32_t reserved_11_18:8;
+		uint32_t i_stat:1;
+		uint32_t cle:1;
+		uint32_t m66:1;
+		uint32_t reserved_22_22:1;
+		uint32_t fbb:1;
+		uint32_t mdpe:1;
+		uint32_t devt:2;
+		uint32_t sta:1;
+		uint32_t rta:1;
+		uint32_t rma:1;
+		uint32_t sse:1;
+		uint32_t dpe:1;
+#endif
 	} s;
 	struct cvmx_pci_cfg01_s cn30xx;
 	struct cvmx_pci_cfg01_s cn31xx;
@@ -205,8 +259,13 @@ union cvmx_pci_cfg01 {
 union cvmx_pci_cfg02 {
 	uint32_t u32;
 	struct cvmx_pci_cfg02_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t cc:24;
 		uint32_t rid:8;
+#else
+		uint32_t rid:8;
+		uint32_t cc:24;
+#endif
 	} s;
 	struct cvmx_pci_cfg02_s cn30xx;
 	struct cvmx_pci_cfg02_s cn31xx;
@@ -220,6 +279,7 @@ union cvmx_pci_cfg02 {
 union cvmx_pci_cfg03 {
 	uint32_t u32;
 	struct cvmx_pci_cfg03_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t bcap:1;
 		uint32_t brb:1;
 		uint32_t reserved_28_29:2;
@@ -227,6 +287,15 @@ union cvmx_pci_cfg03 {
 		uint32_t ht:8;
 		uint32_t lt:8;
 		uint32_t cls:8;
+#else
+		uint32_t cls:8;
+		uint32_t lt:8;
+		uint32_t ht:8;
+		uint32_t bcod:4;
+		uint32_t reserved_28_29:2;
+		uint32_t brb:1;
+		uint32_t bcap:1;
+#endif
 	} s;
 	struct cvmx_pci_cfg03_s cn30xx;
 	struct cvmx_pci_cfg03_s cn31xx;
@@ -240,11 +309,19 @@ union cvmx_pci_cfg03 {
 union cvmx_pci_cfg04 {
 	uint32_t u32;
 	struct cvmx_pci_cfg04_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t lbase:20;
 		uint32_t lbasez:8;
 		uint32_t pf:1;
 		uint32_t typ:2;
 		uint32_t mspc:1;
+#else
+		uint32_t mspc:1;
+		uint32_t typ:2;
+		uint32_t pf:1;
+		uint32_t lbasez:8;
+		uint32_t lbase:20;
+#endif
 	} s;
 	struct cvmx_pci_cfg04_s cn30xx;
 	struct cvmx_pci_cfg04_s cn31xx;
@@ -258,7 +335,11 @@ union cvmx_pci_cfg04 {
 union cvmx_pci_cfg05 {
 	uint32_t u32;
 	struct cvmx_pci_cfg05_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t hbase:32;
+#else
 		uint32_t hbase:32;
+#endif
 	} s;
 	struct cvmx_pci_cfg05_s cn30xx;
 	struct cvmx_pci_cfg05_s cn31xx;
@@ -272,11 +353,19 @@ union cvmx_pci_cfg05 {
 union cvmx_pci_cfg06 {
 	uint32_t u32;
 	struct cvmx_pci_cfg06_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t lbase:5;
 		uint32_t lbasez:23;
 		uint32_t pf:1;
 		uint32_t typ:2;
 		uint32_t mspc:1;
+#else
+		uint32_t mspc:1;
+		uint32_t typ:2;
+		uint32_t pf:1;
+		uint32_t lbasez:23;
+		uint32_t lbase:5;
+#endif
 	} s;
 	struct cvmx_pci_cfg06_s cn30xx;
 	struct cvmx_pci_cfg06_s cn31xx;
@@ -290,7 +379,11 @@ union cvmx_pci_cfg06 {
 union cvmx_pci_cfg07 {
 	uint32_t u32;
 	struct cvmx_pci_cfg07_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t hbase:32;
+#else
 		uint32_t hbase:32;
+#endif
 	} s;
 	struct cvmx_pci_cfg07_s cn30xx;
 	struct cvmx_pci_cfg07_s cn31xx;
@@ -304,10 +397,17 @@ union cvmx_pci_cfg07 {
 union cvmx_pci_cfg08 {
 	uint32_t u32;
 	struct cvmx_pci_cfg08_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t lbasez:28;
 		uint32_t pf:1;
 		uint32_t typ:2;
 		uint32_t mspc:1;
+#else
+		uint32_t mspc:1;
+		uint32_t typ:2;
+		uint32_t pf:1;
+		uint32_t lbasez:28;
+#endif
 	} s;
 	struct cvmx_pci_cfg08_s cn30xx;
 	struct cvmx_pci_cfg08_s cn31xx;
@@ -321,8 +421,13 @@ union cvmx_pci_cfg08 {
 union cvmx_pci_cfg09 {
 	uint32_t u32;
 	struct cvmx_pci_cfg09_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t hbase:25;
 		uint32_t hbasez:7;
+#else
+		uint32_t hbasez:7;
+		uint32_t hbase:25;
+#endif
 	} s;
 	struct cvmx_pci_cfg09_s cn30xx;
 	struct cvmx_pci_cfg09_s cn31xx;
@@ -336,7 +441,11 @@ union cvmx_pci_cfg09 {
 union cvmx_pci_cfg10 {
 	uint32_t u32;
 	struct cvmx_pci_cfg10_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t cisp:32;
+#else
 		uint32_t cisp:32;
+#endif
 	} s;
 	struct cvmx_pci_cfg10_s cn30xx;
 	struct cvmx_pci_cfg10_s cn31xx;
@@ -350,8 +459,13 @@ union cvmx_pci_cfg10 {
 union cvmx_pci_cfg11 {
 	uint32_t u32;
 	struct cvmx_pci_cfg11_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t ssid:16;
 		uint32_t ssvid:16;
+#else
+		uint32_t ssvid:16;
+		uint32_t ssid:16;
+#endif
 	} s;
 	struct cvmx_pci_cfg11_s cn30xx;
 	struct cvmx_pci_cfg11_s cn31xx;
@@ -365,10 +479,17 @@ union cvmx_pci_cfg11 {
 union cvmx_pci_cfg12 {
 	uint32_t u32;
 	struct cvmx_pci_cfg12_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t erbar:16;
 		uint32_t erbarz:5;
 		uint32_t reserved_1_10:10;
 		uint32_t erbar_en:1;
+#else
+		uint32_t erbar_en:1;
+		uint32_t reserved_1_10:10;
+		uint32_t erbarz:5;
+		uint32_t erbar:16;
+#endif
 	} s;
 	struct cvmx_pci_cfg12_s cn30xx;
 	struct cvmx_pci_cfg12_s cn31xx;
@@ -382,8 +503,13 @@ union cvmx_pci_cfg12 {
 union cvmx_pci_cfg13 {
 	uint32_t u32;
 	struct cvmx_pci_cfg13_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_8_31:24;
 		uint32_t cp:8;
+#else
+		uint32_t cp:8;
+		uint32_t reserved_8_31:24;
+#endif
 	} s;
 	struct cvmx_pci_cfg13_s cn30xx;
 	struct cvmx_pci_cfg13_s cn31xx;
@@ -397,10 +523,17 @@ union cvmx_pci_cfg13 {
 union cvmx_pci_cfg15 {
 	uint32_t u32;
 	struct cvmx_pci_cfg15_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t ml:8;
 		uint32_t mg:8;
 		uint32_t inta:8;
 		uint32_t il:8;
+#else
+		uint32_t il:8;
+		uint32_t inta:8;
+		uint32_t mg:8;
+		uint32_t ml:8;
+#endif
 	} s;
 	struct cvmx_pci_cfg15_s cn30xx;
 	struct cvmx_pci_cfg15_s cn31xx;
@@ -414,6 +547,7 @@ union cvmx_pci_cfg15 {
 union cvmx_pci_cfg16 {
 	uint32_t u32;
 	struct cvmx_pci_cfg16_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t trdnpr:1;
 		uint32_t trdard:1;
 		uint32_t rdsati:1;
@@ -430,6 +564,24 @@ union cvmx_pci_cfg16 {
 		uint32_t reserved_2_2:1;
 		uint32_t tswc:1;
 		uint32_t mltd:1;
+#else
+		uint32_t mltd:1;
+		uint32_t tswc:1;
+		uint32_t reserved_2_2:1;
+		uint32_t dppmr:1;
+		uint32_t pbe:12;
+		uint32_t tilt:4;
+		uint32_t tslte:3;
+		uint32_t tmae:1;
+		uint32_t twtae:1;
+		uint32_t twsen:1;
+		uint32_t twsei:1;
+		uint32_t trtae:1;
+		uint32_t trdrs:1;
+		uint32_t rdsati:1;
+		uint32_t trdard:1;
+		uint32_t trdnpr:1;
+#endif
 	} s;
 	struct cvmx_pci_cfg16_s cn30xx;
 	struct cvmx_pci_cfg16_s cn31xx;
@@ -443,7 +595,11 @@ union cvmx_pci_cfg16 {
 union cvmx_pci_cfg17 {
 	uint32_t u32;
 	struct cvmx_pci_cfg17_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t tscme:32;
+#else
+		uint32_t tscme:32;
+#endif
 	} s;
 	struct cvmx_pci_cfg17_s cn30xx;
 	struct cvmx_pci_cfg17_s cn31xx;
@@ -457,7 +613,11 @@ union cvmx_pci_cfg17 {
 union cvmx_pci_cfg18 {
 	uint32_t u32;
 	struct cvmx_pci_cfg18_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t tdsrps:32;
+#else
 		uint32_t tdsrps:32;
+#endif
 	} s;
 	struct cvmx_pci_cfg18_s cn30xx;
 	struct cvmx_pci_cfg18_s cn31xx;
@@ -471,6 +631,7 @@ union cvmx_pci_cfg18 {
 union cvmx_pci_cfg19 {
 	uint32_t u32;
 	struct cvmx_pci_cfg19_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t mrbcm:1;
 		uint32_t mrbci:1;
 		uint32_t mdwe:1;
@@ -489,6 +650,26 @@ union cvmx_pci_cfg19 {
 		uint32_t reserved_6_6:1;
 		uint32_t tidomc:1;
 		uint32_t tdomc:5;
+#else
+		uint32_t tdomc:5;
+		uint32_t tidomc:1;
+		uint32_t reserved_6_6:1;
+		uint32_t tibde:1;
+		uint32_t tibcd:1;
+		uint32_t reserved_9_10:2;
+		uint32_t tmapes:1;
+		uint32_t tmdpes:1;
+		uint32_t tmse:1;
+		uint32_t tmei:1;
+		uint32_t teci:1;
+		uint32_t tmes:8;
+		uint32_t mdrrmc:3;
+		uint32_t mdrimc:1;
+		uint32_t mdre:1;
+		uint32_t mdwe:1;
+		uint32_t mrbci:1;
+		uint32_t mrbcm:1;
+#endif
 	} s;
 	struct cvmx_pci_cfg19_s cn30xx;
 	struct cvmx_pci_cfg19_s cn31xx;
@@ -502,7 +683,11 @@ union cvmx_pci_cfg19 {
 union cvmx_pci_cfg20 {
 	uint32_t u32;
 	struct cvmx_pci_cfg20_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t mdsp:32;
+#else
+		uint32_t mdsp:32;
+#endif
 	} s;
 	struct cvmx_pci_cfg20_s cn30xx;
 	struct cvmx_pci_cfg20_s cn31xx;
@@ -516,7 +701,11 @@ union cvmx_pci_cfg20 {
 union cvmx_pci_cfg21 {
 	uint32_t u32;
 	struct cvmx_pci_cfg21_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t scmre:32;
+#else
 		uint32_t scmre:32;
+#endif
 	} s;
 	struct cvmx_pci_cfg21_s cn30xx;
 	struct cvmx_pci_cfg21_s cn31xx;
@@ -530,6 +719,7 @@ union cvmx_pci_cfg21 {
 union cvmx_pci_cfg22 {
 	uint32_t u32;
 	struct cvmx_pci_cfg22_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t mac:7;
 		uint32_t reserved_19_24:6;
 		uint32_t flush:1;
@@ -537,6 +727,15 @@ union cvmx_pci_cfg22 {
 		uint32_t mtta:1;
 		uint32_t mrv:8;
 		uint32_t mttv:8;
+#else
+		uint32_t mttv:8;
+		uint32_t mrv:8;
+		uint32_t mtta:1;
+		uint32_t mra:1;
+		uint32_t flush:1;
+		uint32_t reserved_19_24:6;
+		uint32_t mac:7;
+#endif
 	} s;
 	struct cvmx_pci_cfg22_s cn30xx;
 	struct cvmx_pci_cfg22_s cn31xx;
@@ -550,6 +749,7 @@ union cvmx_pci_cfg22 {
 union cvmx_pci_cfg56 {
 	uint32_t u32;
 	struct cvmx_pci_cfg56_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_23_31:9;
 		uint32_t most:3;
 		uint32_t mmbc:2;
@@ -557,6 +757,15 @@ union cvmx_pci_cfg56 {
 		uint32_t dpere:1;
 		uint32_t ncp:8;
 		uint32_t pxcid:8;
+#else
+		uint32_t pxcid:8;
+		uint32_t ncp:8;
+		uint32_t dpere:1;
+		uint32_t roe:1;
+		uint32_t mmbc:2;
+		uint32_t most:3;
+		uint32_t reserved_23_31:9;
+#endif
 	} s;
 	struct cvmx_pci_cfg56_s cn30xx;
 	struct cvmx_pci_cfg56_s cn31xx;
@@ -570,6 +779,7 @@ union cvmx_pci_cfg56 {
 union cvmx_pci_cfg57 {
 	uint32_t u32;
 	struct cvmx_pci_cfg57_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_30_31:2;
 		uint32_t scemr:1;
 		uint32_t mcrsd:3;
@@ -583,6 +793,21 @@ union cvmx_pci_cfg57 {
 		uint32_t bn:8;
 		uint32_t dn:5;
 		uint32_t fn:3;
+#else
+		uint32_t fn:3;
+		uint32_t dn:5;
+		uint32_t bn:8;
+		uint32_t w64:1;
+		uint32_t m133:1;
+		uint32_t scd:1;
+		uint32_t usc:1;
+		uint32_t dc:1;
+		uint32_t mmrbcd:2;
+		uint32_t mostd:3;
+		uint32_t mcrsd:3;
+		uint32_t scemr:1;
+		uint32_t reserved_30_31:2;
+#endif
 	} s;
 	struct cvmx_pci_cfg57_s cn30xx;
 	struct cvmx_pci_cfg57_s cn31xx;
@@ -596,6 +821,7 @@ union cvmx_pci_cfg57 {
 union cvmx_pci_cfg58 {
 	uint32_t u32;
 	struct cvmx_pci_cfg58_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t pmes:5;
 		uint32_t d2s:1;
 		uint32_t d1s:1;
@@ -606,6 +832,18 @@ union cvmx_pci_cfg58 {
 		uint32_t pcimiv:3;
 		uint32_t ncp:8;
 		uint32_t pmcid:8;
+#else
+		uint32_t pmcid:8;
+		uint32_t ncp:8;
+		uint32_t pcimiv:3;
+		uint32_t pmec:1;
+		uint32_t reserved_20_20:1;
+		uint32_t dsi:1;
+		uint32_t auxc:3;
+		uint32_t d1s:1;
+		uint32_t d2s:1;
+		uint32_t pmes:5;
+#endif
 	} s;
 	struct cvmx_pci_cfg58_s cn30xx;
 	struct cvmx_pci_cfg58_s cn31xx;
@@ -619,6 +857,7 @@ union cvmx_pci_cfg58 {
 union cvmx_pci_cfg59 {
 	uint32_t u32;
 	struct cvmx_pci_cfg59_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t pmdia:8;
 		uint32_t bpccen:1;
 		uint32_t bd3h:1;
@@ -629,6 +868,18 @@ union cvmx_pci_cfg59 {
 		uint32_t pmeens:1;
 		uint32_t reserved_2_7:6;
 		uint32_t ps:2;
+#else
+		uint32_t ps:2;
+		uint32_t reserved_2_7:6;
+		uint32_t pmeens:1;
+		uint32_t pmds:4;
+		uint32_t pmedsia:2;
+		uint32_t pmess:1;
+		uint32_t reserved_16_21:6;
+		uint32_t bd3h:1;
+		uint32_t bpccen:1;
+		uint32_t pmdia:8;
+#endif
 	} s;
 	struct cvmx_pci_cfg59_s cn30xx;
 	struct cvmx_pci_cfg59_s cn31xx;
@@ -642,6 +893,7 @@ union cvmx_pci_cfg59 {
 union cvmx_pci_cfg60 {
 	uint32_t u32;
 	struct cvmx_pci_cfg60_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_24_31:8;
 		uint32_t m64:1;
 		uint32_t mme:3;
@@ -649,6 +901,15 @@ union cvmx_pci_cfg60 {
 		uint32_t msien:1;
 		uint32_t ncp:8;
 		uint32_t msicid:8;
+#else
+		uint32_t msicid:8;
+		uint32_t ncp:8;
+		uint32_t msien:1;
+		uint32_t mmc:3;
+		uint32_t mme:3;
+		uint32_t m64:1;
+		uint32_t reserved_24_31:8;
+#endif
 	} s;
 	struct cvmx_pci_cfg60_s cn30xx;
 	struct cvmx_pci_cfg60_s cn31xx;
@@ -662,8 +923,13 @@ union cvmx_pci_cfg60 {
 union cvmx_pci_cfg61 {
 	uint32_t u32;
 	struct cvmx_pci_cfg61_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t msi31t2:30;
 		uint32_t reserved_0_1:2;
+#else
+		uint32_t reserved_0_1:2;
+		uint32_t msi31t2:30;
+#endif
 	} s;
 	struct cvmx_pci_cfg61_s cn30xx;
 	struct cvmx_pci_cfg61_s cn31xx;
@@ -677,7 +943,11 @@ union cvmx_pci_cfg61 {
 union cvmx_pci_cfg62 {
 	uint32_t u32;
 	struct cvmx_pci_cfg62_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t msi:32;
+#else
+		uint32_t msi:32;
+#endif
 	} s;
 	struct cvmx_pci_cfg62_s cn30xx;
 	struct cvmx_pci_cfg62_s cn31xx;
@@ -691,8 +961,13 @@ union cvmx_pci_cfg62 {
 union cvmx_pci_cfg63 {
 	uint32_t u32;
 	struct cvmx_pci_cfg63_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_16_31:16;
 		uint32_t msimd:16;
+#else
+		uint32_t msimd:16;
+		uint32_t reserved_16_31:16;
+#endif
 	} s;
 	struct cvmx_pci_cfg63_s cn30xx;
 	struct cvmx_pci_cfg63_s cn31xx;
@@ -706,12 +981,21 @@ union cvmx_pci_cfg63 {
 union cvmx_pci_cnt_reg {
 	uint64_t u64;
 	struct cvmx_pci_cnt_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t hm_pcix:1;
 		uint64_t hm_speed:2;
 		uint64_t ap_pcix:1;
 		uint64_t ap_speed:2;
 		uint64_t pcicnt:32;
+#else
+		uint64_t pcicnt:32;
+		uint64_t ap_speed:2;
+		uint64_t ap_pcix:1;
+		uint64_t hm_speed:2;
+		uint64_t hm_pcix:1;
+		uint64_t reserved_38_63:26;
+#endif
 	} s;
 	struct cvmx_pci_cnt_reg_s cn50xx;
 	struct cvmx_pci_cnt_reg_s cn58xx;
@@ -721,6 +1005,7 @@ union cvmx_pci_cnt_reg {
 union cvmx_pci_ctl_status_2 {
 	uint32_t u32;
 	struct cvmx_pci_ctl_status_2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_29_31:3;
 		uint32_t bb1_hole:3;
 		uint32_t bb1_siz:1;
@@ -743,9 +1028,34 @@ union cvmx_pci_ctl_status_2 {
 		uint32_t bar2_enb:1;
 		uint32_t bar2_esx:2;
 		uint32_t bar2_cax:1;
+#else
+		uint32_t bar2_cax:1;
+		uint32_t bar2_esx:2;
+		uint32_t bar2_enb:1;
+		uint32_t tsr_hwm:3;
+		uint32_t pmo_fpc:3;
+		uint32_t pmo_amod:1;
+		uint32_t b12_bist:1;
+		uint32_t ap_64ad:1;
+		uint32_t ap_pcix:1;
+		uint32_t reserved_14_14:1;
+		uint32_t en_wfilt:1;
+		uint32_t scm:1;
+		uint32_t scmtyp:1;
+		uint32_t bar2pres:1;
+		uint32_t erst_n:1;
+		uint32_t bb0:1;
+		uint32_t bb1:1;
+		uint32_t bb_es:2;
+		uint32_t bb_ca:1;
+		uint32_t bb1_siz:1;
+		uint32_t bb1_hole:3;
+		uint32_t reserved_29_31:3;
+#endif
 	} s;
 	struct cvmx_pci_ctl_status_2_s cn30xx;
 	struct cvmx_pci_ctl_status_2_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_20_31:12;
 		uint32_t erst_n:1;
 		uint32_t bar2pres:1;
@@ -762,6 +1072,24 @@ union cvmx_pci_ctl_status_2 {
 		uint32_t bar2_enb:1;
 		uint32_t bar2_esx:2;
 		uint32_t bar2_cax:1;
+#else
+		uint32_t bar2_cax:1;
+		uint32_t bar2_esx:2;
+		uint32_t bar2_enb:1;
+		uint32_t tsr_hwm:3;
+		uint32_t pmo_fpc:3;
+		uint32_t pmo_amod:1;
+		uint32_t b12_bist:1;
+		uint32_t ap_64ad:1;
+		uint32_t ap_pcix:1;
+		uint32_t reserved_14_14:1;
+		uint32_t en_wfilt:1;
+		uint32_t scm:1;
+		uint32_t scmtyp:1;
+		uint32_t bar2pres:1;
+		uint32_t erst_n:1;
+		uint32_t reserved_20_31:12;
+#endif
 	} cn31xx;
 	struct cvmx_pci_ctl_status_2_s cn38xx;
 	struct cvmx_pci_ctl_status_2_cn31xx cn38xxp2;
@@ -773,8 +1101,13 @@ union cvmx_pci_ctl_status_2 {
 union cvmx_pci_dbellx {
 	uint32_t u32;
 	struct cvmx_pci_dbellx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_16_31:16;
 		uint32_t inc_val:16;
+#else
+		uint32_t inc_val:16;
+		uint32_t reserved_16_31:16;
+#endif
 	} s;
 	struct cvmx_pci_dbellx_s cn30xx;
 	struct cvmx_pci_dbellx_s cn31xx;
@@ -788,7 +1121,11 @@ union cvmx_pci_dbellx {
 union cvmx_pci_dma_cntx {
 	uint32_t u32;
 	struct cvmx_pci_dma_cntx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t dma_cnt:32;
+#else
 		uint32_t dma_cnt:32;
+#endif
 	} s;
 	struct cvmx_pci_dma_cntx_s cn30xx;
 	struct cvmx_pci_dma_cntx_s cn31xx;
@@ -802,7 +1139,11 @@ union cvmx_pci_dma_cntx {
 union cvmx_pci_dma_int_levx {
 	uint32_t u32;
 	struct cvmx_pci_dma_int_levx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t pkt_cnt:32;
+#else
+		uint32_t pkt_cnt:32;
+#endif
 	} s;
 	struct cvmx_pci_dma_int_levx_s cn30xx;
 	struct cvmx_pci_dma_int_levx_s cn31xx;
@@ -816,7 +1157,11 @@ union cvmx_pci_dma_int_levx {
 union cvmx_pci_dma_timex {
 	uint32_t u32;
 	struct cvmx_pci_dma_timex_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t dma_time:32;
+#else
 		uint32_t dma_time:32;
+#endif
 	} s;
 	struct cvmx_pci_dma_timex_s cn30xx;
 	struct cvmx_pci_dma_timex_s cn31xx;
@@ -830,7 +1175,11 @@ union cvmx_pci_dma_timex {
 union cvmx_pci_instr_countx {
 	uint32_t u32;
 	struct cvmx_pci_instr_countx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t icnt:32;
+#else
 		uint32_t icnt:32;
+#endif
 	} s;
 	struct cvmx_pci_instr_countx_s cn30xx;
 	struct cvmx_pci_instr_countx_s cn31xx;
@@ -844,6 +1193,7 @@ union cvmx_pci_instr_countx {
 union cvmx_pci_int_enb {
 	uint64_t u64;
 	struct cvmx_pci_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -879,8 +1229,46 @@ union cvmx_pci_int_enb {
 		uint64_t imr_wtto:1;
 		uint64_t imr_wabt:1;
 		uint64_t itr_wabt:1;
+#else
+		uint64_t itr_wabt:1;
+		uint64_t imr_wabt:1;
+		uint64_t imr_wtto:1;
+		uint64_t itr_abt:1;
+		uint64_t imr_abt:1;
+		uint64_t imr_tto:1;
+		uint64_t imsi_per:1;
+		uint64_t imsi_tabt:1;
+		uint64_t imsi_mabt:1;
+		uint64_t imsc_msg:1;
+		uint64_t itsr_abt:1;
+		uint64_t iserr:1;
+		uint64_t iaperr:1;
+		uint64_t idperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t irsl_int:1;
+		uint64_t ipcnt0:1;
+		uint64_t ipcnt1:1;
+		uint64_t ipcnt2:1;
+		uint64_t ipcnt3:1;
+		uint64_t iptime0:1;
+		uint64_t iptime1:1;
+		uint64_t iptime2:1;
+		uint64_t iptime3:1;
+		uint64_t idcnt0:1;
+		uint64_t idcnt1:1;
+		uint64_t idtime0:1;
+		uint64_t idtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_pci_int_enb_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -912,8 +1300,42 @@ union cvmx_pci_int_enb {
 		uint64_t imr_wtto:1;
 		uint64_t imr_wabt:1;
 		uint64_t itr_wabt:1;
+#else
+		uint64_t itr_wabt:1;
+		uint64_t imr_wabt:1;
+		uint64_t imr_wtto:1;
+		uint64_t itr_abt:1;
+		uint64_t imr_abt:1;
+		uint64_t imr_tto:1;
+		uint64_t imsi_per:1;
+		uint64_t imsi_tabt:1;
+		uint64_t imsi_mabt:1;
+		uint64_t imsc_msg:1;
+		uint64_t itsr_abt:1;
+		uint64_t iserr:1;
+		uint64_t iaperr:1;
+		uint64_t idperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t irsl_int:1;
+		uint64_t ipcnt0:1;
+		uint64_t reserved_18_20:3;
+		uint64_t iptime0:1;
+		uint64_t reserved_22_24:3;
+		uint64_t idcnt0:1;
+		uint64_t idcnt1:1;
+		uint64_t idtime0:1;
+		uint64_t idtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn30xx;
 	struct cvmx_pci_int_enb_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -947,6 +1369,41 @@ union cvmx_pci_int_enb {
 		uint64_t imr_wtto:1;
 		uint64_t imr_wabt:1;
 		uint64_t itr_wabt:1;
+#else
+		uint64_t itr_wabt:1;
+		uint64_t imr_wabt:1;
+		uint64_t imr_wtto:1;
+		uint64_t itr_abt:1;
+		uint64_t imr_abt:1;
+		uint64_t imr_tto:1;
+		uint64_t imsi_per:1;
+		uint64_t imsi_tabt:1;
+		uint64_t imsi_mabt:1;
+		uint64_t imsc_msg:1;
+		uint64_t itsr_abt:1;
+		uint64_t iserr:1;
+		uint64_t iaperr:1;
+		uint64_t idperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t irsl_int:1;
+		uint64_t ipcnt0:1;
+		uint64_t ipcnt1:1;
+		uint64_t reserved_19_20:2;
+		uint64_t iptime0:1;
+		uint64_t iptime1:1;
+		uint64_t reserved_23_24:2;
+		uint64_t idcnt0:1;
+		uint64_t idcnt1:1;
+		uint64_t idtime0:1;
+		uint64_t idtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn31xx;
 	struct cvmx_pci_int_enb_s cn38xx;
 	struct cvmx_pci_int_enb_s cn38xxp2;
@@ -958,6 +1415,7 @@ union cvmx_pci_int_enb {
 union cvmx_pci_int_enb2 {
 	uint64_t u64;
 	struct cvmx_pci_int_enb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -993,8 +1451,46 @@ union cvmx_pci_int_enb2 {
 		uint64_t rmr_wtto:1;
 		uint64_t rmr_wabt:1;
 		uint64_t rtr_wabt:1;
+#else
+		uint64_t rtr_wabt:1;
+		uint64_t rmr_wabt:1;
+		uint64_t rmr_wtto:1;
+		uint64_t rtr_abt:1;
+		uint64_t rmr_abt:1;
+		uint64_t rmr_tto:1;
+		uint64_t rmsi_per:1;
+		uint64_t rmsi_tabt:1;
+		uint64_t rmsi_mabt:1;
+		uint64_t rmsc_msg:1;
+		uint64_t rtsr_abt:1;
+		uint64_t rserr:1;
+		uint64_t raperr:1;
+		uint64_t rdperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t rrsl_int:1;
+		uint64_t rpcnt0:1;
+		uint64_t rpcnt1:1;
+		uint64_t rpcnt2:1;
+		uint64_t rpcnt3:1;
+		uint64_t rptime0:1;
+		uint64_t rptime1:1;
+		uint64_t rptime2:1;
+		uint64_t rptime3:1;
+		uint64_t rdcnt0:1;
+		uint64_t rdcnt1:1;
+		uint64_t rdtime0:1;
+		uint64_t rdtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_pci_int_enb2_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -1026,8 +1522,42 @@ union cvmx_pci_int_enb2 {
 		uint64_t rmr_wtto:1;
 		uint64_t rmr_wabt:1;
 		uint64_t rtr_wabt:1;
+#else
+		uint64_t rtr_wabt:1;
+		uint64_t rmr_wabt:1;
+		uint64_t rmr_wtto:1;
+		uint64_t rtr_abt:1;
+		uint64_t rmr_abt:1;
+		uint64_t rmr_tto:1;
+		uint64_t rmsi_per:1;
+		uint64_t rmsi_tabt:1;
+		uint64_t rmsi_mabt:1;
+		uint64_t rmsc_msg:1;
+		uint64_t rtsr_abt:1;
+		uint64_t rserr:1;
+		uint64_t raperr:1;
+		uint64_t rdperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t rrsl_int:1;
+		uint64_t rpcnt0:1;
+		uint64_t reserved_18_20:3;
+		uint64_t rptime0:1;
+		uint64_t reserved_22_24:3;
+		uint64_t rdcnt0:1;
+		uint64_t rdcnt1:1;
+		uint64_t rdtime0:1;
+		uint64_t rdtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn30xx;
 	struct cvmx_pci_int_enb2_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -1061,6 +1591,41 @@ union cvmx_pci_int_enb2 {
 		uint64_t rmr_wtto:1;
 		uint64_t rmr_wabt:1;
 		uint64_t rtr_wabt:1;
+#else
+		uint64_t rtr_wabt:1;
+		uint64_t rmr_wabt:1;
+		uint64_t rmr_wtto:1;
+		uint64_t rtr_abt:1;
+		uint64_t rmr_abt:1;
+		uint64_t rmr_tto:1;
+		uint64_t rmsi_per:1;
+		uint64_t rmsi_tabt:1;
+		uint64_t rmsi_mabt:1;
+		uint64_t rmsc_msg:1;
+		uint64_t rtsr_abt:1;
+		uint64_t rserr:1;
+		uint64_t raperr:1;
+		uint64_t rdperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t rrsl_int:1;
+		uint64_t rpcnt0:1;
+		uint64_t rpcnt1:1;
+		uint64_t reserved_19_20:2;
+		uint64_t rptime0:1;
+		uint64_t rptime1:1;
+		uint64_t reserved_23_24:2;
+		uint64_t rdcnt0:1;
+		uint64_t rdcnt1:1;
+		uint64_t rdtime0:1;
+		uint64_t rdtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn31xx;
 	struct cvmx_pci_int_enb2_s cn38xx;
 	struct cvmx_pci_int_enb2_s cn38xxp2;
@@ -1072,6 +1637,7 @@ union cvmx_pci_int_enb2 {
 union cvmx_pci_int_sum {
 	uint64_t u64;
 	struct cvmx_pci_int_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -1107,8 +1673,46 @@ union cvmx_pci_int_sum {
 		uint64_t mr_wtto:1;
 		uint64_t mr_wabt:1;
 		uint64_t tr_wabt:1;
+#else
+		uint64_t tr_wabt:1;
+		uint64_t mr_wabt:1;
+		uint64_t mr_wtto:1;
+		uint64_t tr_abt:1;
+		uint64_t mr_abt:1;
+		uint64_t mr_tto:1;
+		uint64_t msi_per:1;
+		uint64_t msi_tabt:1;
+		uint64_t msi_mabt:1;
+		uint64_t msc_msg:1;
+		uint64_t tsr_abt:1;
+		uint64_t serr:1;
+		uint64_t aperr:1;
+		uint64_t dperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t rsl_int:1;
+		uint64_t pcnt0:1;
+		uint64_t pcnt1:1;
+		uint64_t pcnt2:1;
+		uint64_t pcnt3:1;
+		uint64_t ptime0:1;
+		uint64_t ptime1:1;
+		uint64_t ptime2:1;
+		uint64_t ptime3:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_pci_int_sum_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -1140,8 +1744,42 @@ union cvmx_pci_int_sum {
 		uint64_t mr_wtto:1;
 		uint64_t mr_wabt:1;
 		uint64_t tr_wabt:1;
+#else
+		uint64_t tr_wabt:1;
+		uint64_t mr_wabt:1;
+		uint64_t mr_wtto:1;
+		uint64_t tr_abt:1;
+		uint64_t mr_abt:1;
+		uint64_t mr_tto:1;
+		uint64_t msi_per:1;
+		uint64_t msi_tabt:1;
+		uint64_t msi_mabt:1;
+		uint64_t msc_msg:1;
+		uint64_t tsr_abt:1;
+		uint64_t serr:1;
+		uint64_t aperr:1;
+		uint64_t dperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t rsl_int:1;
+		uint64_t pcnt0:1;
+		uint64_t reserved_18_20:3;
+		uint64_t ptime0:1;
+		uint64_t reserved_22_24:3;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn30xx;
 	struct cvmx_pci_int_sum_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -1175,6 +1813,41 @@ union cvmx_pci_int_sum {
 		uint64_t mr_wtto:1;
 		uint64_t mr_wabt:1;
 		uint64_t tr_wabt:1;
+#else
+		uint64_t tr_wabt:1;
+		uint64_t mr_wabt:1;
+		uint64_t mr_wtto:1;
+		uint64_t tr_abt:1;
+		uint64_t mr_abt:1;
+		uint64_t mr_tto:1;
+		uint64_t msi_per:1;
+		uint64_t msi_tabt:1;
+		uint64_t msi_mabt:1;
+		uint64_t msc_msg:1;
+		uint64_t tsr_abt:1;
+		uint64_t serr:1;
+		uint64_t aperr:1;
+		uint64_t dperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t rsl_int:1;
+		uint64_t pcnt0:1;
+		uint64_t pcnt1:1;
+		uint64_t reserved_19_20:2;
+		uint64_t ptime0:1;
+		uint64_t ptime1:1;
+		uint64_t reserved_23_24:2;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn31xx;
 	struct cvmx_pci_int_sum_s cn38xx;
 	struct cvmx_pci_int_sum_s cn38xxp2;
@@ -1186,6 +1859,7 @@ union cvmx_pci_int_sum {
 union cvmx_pci_int_sum2 {
 	uint64_t u64;
 	struct cvmx_pci_int_sum2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -1221,8 +1895,46 @@ union cvmx_pci_int_sum2 {
 		uint64_t mr_wtto:1;
 		uint64_t mr_wabt:1;
 		uint64_t tr_wabt:1;
+#else
+		uint64_t tr_wabt:1;
+		uint64_t mr_wabt:1;
+		uint64_t mr_wtto:1;
+		uint64_t tr_abt:1;
+		uint64_t mr_abt:1;
+		uint64_t mr_tto:1;
+		uint64_t msi_per:1;
+		uint64_t msi_tabt:1;
+		uint64_t msi_mabt:1;
+		uint64_t msc_msg:1;
+		uint64_t tsr_abt:1;
+		uint64_t serr:1;
+		uint64_t aperr:1;
+		uint64_t dperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t rsl_int:1;
+		uint64_t pcnt0:1;
+		uint64_t pcnt1:1;
+		uint64_t pcnt2:1;
+		uint64_t pcnt3:1;
+		uint64_t ptime0:1;
+		uint64_t ptime1:1;
+		uint64_t ptime2:1;
+		uint64_t ptime3:1;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} s;
 	struct cvmx_pci_int_sum2_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -1254,8 +1966,42 @@ union cvmx_pci_int_sum2 {
 		uint64_t mr_wtto:1;
 		uint64_t mr_wabt:1;
 		uint64_t tr_wabt:1;
+#else
+		uint64_t tr_wabt:1;
+		uint64_t mr_wabt:1;
+		uint64_t mr_wtto:1;
+		uint64_t tr_abt:1;
+		uint64_t mr_abt:1;
+		uint64_t mr_tto:1;
+		uint64_t msi_per:1;
+		uint64_t msi_tabt:1;
+		uint64_t msi_mabt:1;
+		uint64_t msc_msg:1;
+		uint64_t tsr_abt:1;
+		uint64_t serr:1;
+		uint64_t aperr:1;
+		uint64_t dperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t rsl_int:1;
+		uint64_t pcnt0:1;
+		uint64_t reserved_18_20:3;
+		uint64_t ptime0:1;
+		uint64_t reserved_22_24:3;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn30xx;
 	struct cvmx_pci_int_sum2_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_34_63:30;
 		uint64_t ill_rd:1;
 		uint64_t ill_wr:1;
@@ -1289,6 +2035,41 @@ union cvmx_pci_int_sum2 {
 		uint64_t mr_wtto:1;
 		uint64_t mr_wabt:1;
 		uint64_t tr_wabt:1;
+#else
+		uint64_t tr_wabt:1;
+		uint64_t mr_wabt:1;
+		uint64_t mr_wtto:1;
+		uint64_t tr_abt:1;
+		uint64_t mr_abt:1;
+		uint64_t mr_tto:1;
+		uint64_t msi_per:1;
+		uint64_t msi_tabt:1;
+		uint64_t msi_mabt:1;
+		uint64_t msc_msg:1;
+		uint64_t tsr_abt:1;
+		uint64_t serr:1;
+		uint64_t aperr:1;
+		uint64_t dperr:1;
+		uint64_t ill_rwr:1;
+		uint64_t ill_rrd:1;
+		uint64_t rsl_int:1;
+		uint64_t pcnt0:1;
+		uint64_t pcnt1:1;
+		uint64_t reserved_19_20:2;
+		uint64_t ptime0:1;
+		uint64_t ptime1:1;
+		uint64_t reserved_23_24:2;
+		uint64_t dcnt0:1;
+		uint64_t dcnt1:1;
+		uint64_t dtime0:1;
+		uint64_t dtime1:1;
+		uint64_t dma0_fi:1;
+		uint64_t dma1_fi:1;
+		uint64_t win_wr:1;
+		uint64_t ill_wr:1;
+		uint64_t ill_rd:1;
+		uint64_t reserved_34_63:30;
+#endif
 	} cn31xx;
 	struct cvmx_pci_int_sum2_s cn38xx;
 	struct cvmx_pci_int_sum2_s cn38xxp2;
@@ -1300,8 +2081,13 @@ union cvmx_pci_int_sum2 {
 union cvmx_pci_msi_rcv {
 	uint32_t u32;
 	struct cvmx_pci_msi_rcv_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_6_31:26;
 		uint32_t intr:6;
+#else
+		uint32_t intr:6;
+		uint32_t reserved_6_31:26;
+#endif
 	} s;
 	struct cvmx_pci_msi_rcv_s cn30xx;
 	struct cvmx_pci_msi_rcv_s cn31xx;
@@ -1315,8 +2101,13 @@ union cvmx_pci_msi_rcv {
 union cvmx_pci_pkt_creditsx {
 	uint32_t u32;
 	struct cvmx_pci_pkt_creditsx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t pkt_cnt:16;
 		uint32_t ptr_cnt:16;
+#else
+		uint32_t ptr_cnt:16;
+		uint32_t pkt_cnt:16;
+#endif
 	} s;
 	struct cvmx_pci_pkt_creditsx_s cn30xx;
 	struct cvmx_pci_pkt_creditsx_s cn31xx;
@@ -1330,7 +2121,11 @@ union cvmx_pci_pkt_creditsx {
 union cvmx_pci_pkts_sentx {
 	uint32_t u32;
 	struct cvmx_pci_pkts_sentx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t pkt_cnt:32;
+#else
+		uint32_t pkt_cnt:32;
+#endif
 	} s;
 	struct cvmx_pci_pkts_sentx_s cn30xx;
 	struct cvmx_pci_pkts_sentx_s cn31xx;
@@ -1344,7 +2139,11 @@ union cvmx_pci_pkts_sentx {
 union cvmx_pci_pkts_sent_int_levx {
 	uint32_t u32;
 	struct cvmx_pci_pkts_sent_int_levx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t pkt_cnt:32;
+#else
 		uint32_t pkt_cnt:32;
+#endif
 	} s;
 	struct cvmx_pci_pkts_sent_int_levx_s cn30xx;
 	struct cvmx_pci_pkts_sent_int_levx_s cn31xx;
@@ -1358,7 +2157,11 @@ union cvmx_pci_pkts_sent_int_levx {
 union cvmx_pci_pkts_sent_timex {
 	uint32_t u32;
 	struct cvmx_pci_pkts_sent_timex_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t pkt_time:32;
+#else
 		uint32_t pkt_time:32;
+#endif
 	} s;
 	struct cvmx_pci_pkts_sent_timex_s cn30xx;
 	struct cvmx_pci_pkts_sent_timex_s cn31xx;
@@ -1372,9 +2175,15 @@ union cvmx_pci_pkts_sent_timex {
 union cvmx_pci_read_cmd_6 {
 	uint32_t u32;
 	struct cvmx_pci_read_cmd_6_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_9_31:23;
 		uint32_t min_data:6;
 		uint32_t prefetch:3;
+#else
+		uint32_t prefetch:3;
+		uint32_t min_data:6;
+		uint32_t reserved_9_31:23;
+#endif
 	} s;
 	struct cvmx_pci_read_cmd_6_s cn30xx;
 	struct cvmx_pci_read_cmd_6_s cn31xx;
@@ -1388,9 +2197,15 @@ union cvmx_pci_read_cmd_6 {
 union cvmx_pci_read_cmd_c {
 	uint32_t u32;
 	struct cvmx_pci_read_cmd_c_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_9_31:23;
 		uint32_t min_data:6;
 		uint32_t prefetch:3;
+#else
+		uint32_t prefetch:3;
+		uint32_t min_data:6;
+		uint32_t reserved_9_31:23;
+#endif
 	} s;
 	struct cvmx_pci_read_cmd_c_s cn30xx;
 	struct cvmx_pci_read_cmd_c_s cn31xx;
@@ -1404,9 +2219,15 @@ union cvmx_pci_read_cmd_c {
 union cvmx_pci_read_cmd_e {
 	uint32_t u32;
 	struct cvmx_pci_read_cmd_e_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_9_31:23;
 		uint32_t min_data:6;
 		uint32_t prefetch:3;
+#else
+		uint32_t prefetch:3;
+		uint32_t min_data:6;
+		uint32_t reserved_9_31:23;
+#endif
 	} s;
 	struct cvmx_pci_read_cmd_e_s cn30xx;
 	struct cvmx_pci_read_cmd_e_s cn31xx;
@@ -1420,9 +2241,15 @@ union cvmx_pci_read_cmd_e {
 union cvmx_pci_read_timeout {
 	uint64_t u64;
 	struct cvmx_pci_read_timeout_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t enb:1;
 		uint64_t cnt:31;
+#else
+		uint64_t cnt:31;
+		uint64_t enb:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pci_read_timeout_s cn30xx;
 	struct cvmx_pci_read_timeout_s cn31xx;
@@ -1436,8 +2263,13 @@ union cvmx_pci_read_timeout {
 union cvmx_pci_scm_reg {
 	uint64_t u64;
 	struct cvmx_pci_scm_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t scm:32;
+#else
+		uint64_t scm:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pci_scm_reg_s cn30xx;
 	struct cvmx_pci_scm_reg_s cn31xx;
@@ -1451,8 +2283,13 @@ union cvmx_pci_scm_reg {
 union cvmx_pci_tsr_reg {
 	uint64_t u64;
 	struct cvmx_pci_tsr_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_36_63:28;
 		uint64_t tsr:36;
+#else
+		uint64_t tsr:36;
+		uint64_t reserved_36_63:28;
+#endif
 	} s;
 	struct cvmx_pci_tsr_reg_s cn30xx;
 	struct cvmx_pci_tsr_reg_s cn31xx;
@@ -1466,22 +2303,42 @@ union cvmx_pci_tsr_reg {
 union cvmx_pci_win_rd_addr {
 	uint64_t u64;
 	struct cvmx_pci_win_rd_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t iobit:1;
 		uint64_t reserved_0_47:48;
+#else
+		uint64_t reserved_0_47:48;
+		uint64_t iobit:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} s;
 	struct cvmx_pci_win_rd_addr_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t iobit:1;
 		uint64_t rd_addr:46;
 		uint64_t reserved_0_1:2;
+#else
+		uint64_t reserved_0_1:2;
+		uint64_t rd_addr:46;
+		uint64_t iobit:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} cn30xx;
 	struct cvmx_pci_win_rd_addr_cn30xx cn31xx;
 	struct cvmx_pci_win_rd_addr_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t iobit:1;
 		uint64_t rd_addr:45;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t rd_addr:45;
+		uint64_t iobit:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} cn38xx;
 	struct cvmx_pci_win_rd_addr_cn38xx cn38xxp2;
 	struct cvmx_pci_win_rd_addr_cn30xx cn50xx;
@@ -1492,7 +2349,11 @@ union cvmx_pci_win_rd_addr {
 union cvmx_pci_win_rd_data {
 	uint64_t u64;
 	struct cvmx_pci_win_rd_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rd_data:64;
+#else
 		uint64_t rd_data:64;
+#endif
 	} s;
 	struct cvmx_pci_win_rd_data_s cn30xx;
 	struct cvmx_pci_win_rd_data_s cn31xx;
@@ -1506,10 +2367,17 @@ union cvmx_pci_win_rd_data {
 union cvmx_pci_win_wr_addr {
 	uint64_t u64;
 	struct cvmx_pci_win_wr_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t iobit:1;
 		uint64_t wr_addr:45;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t wr_addr:45;
+		uint64_t iobit:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} s;
 	struct cvmx_pci_win_wr_addr_s cn30xx;
 	struct cvmx_pci_win_wr_addr_s cn31xx;
@@ -1523,7 +2391,11 @@ union cvmx_pci_win_wr_addr {
 union cvmx_pci_win_wr_data {
 	uint64_t u64;
 	struct cvmx_pci_win_wr_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t wr_data:64;
+#else
+		uint64_t wr_data:64;
+#endif
 	} s;
 	struct cvmx_pci_win_wr_data_s cn30xx;
 	struct cvmx_pci_win_wr_data_s cn31xx;
@@ -1537,8 +2409,13 @@ union cvmx_pci_win_wr_data {
 union cvmx_pci_win_wr_mask {
 	uint64_t u64;
 	struct cvmx_pci_win_wr_mask_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t wr_mask:8;
+#else
+		uint64_t wr_mask:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_pci_win_wr_mask_s cn30xx;
 	struct cvmx_pci_win_wr_mask_s cn31xx;
diff --git a/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h
index 7b1dc8b74e5..4bce393391e 100644
--- a/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2011 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -109,8 +109,13 @@
 union cvmx_pciercx_cfg000 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg000_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t devid:16;
 		uint32_t vendid:16;
+#else
+		uint32_t vendid:16;
+		uint32_t devid:16;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg000_s cn52xx;
 	struct cvmx_pciercx_cfg000_s cn52xxp1;
@@ -122,11 +127,13 @@ union cvmx_pciercx_cfg000 {
 	struct cvmx_pciercx_cfg000_s cn66xx;
 	struct cvmx_pciercx_cfg000_s cn68xx;
 	struct cvmx_pciercx_cfg000_s cn68xxp1;
+	struct cvmx_pciercx_cfg000_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg001 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg001_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t dpe:1;
 		uint32_t sse:1;
 		uint32_t rma:1;
@@ -151,6 +158,32 @@ union cvmx_pciercx_cfg001 {
 		uint32_t me:1;
 		uint32_t msae:1;
 		uint32_t isae:1;
+#else
+		uint32_t isae:1;
+		uint32_t msae:1;
+		uint32_t me:1;
+		uint32_t scse:1;
+		uint32_t mwice:1;
+		uint32_t vps:1;
+		uint32_t per:1;
+		uint32_t ids_wcc:1;
+		uint32_t see:1;
+		uint32_t fbbe:1;
+		uint32_t i_dis:1;
+		uint32_t reserved_11_18:8;
+		uint32_t i_stat:1;
+		uint32_t cl:1;
+		uint32_t m66:1;
+		uint32_t reserved_22_22:1;
+		uint32_t fbb:1;
+		uint32_t mdpe:1;
+		uint32_t devt:2;
+		uint32_t sta:1;
+		uint32_t rta:1;
+		uint32_t rma:1;
+		uint32_t sse:1;
+		uint32_t dpe:1;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg001_s cn52xx;
 	struct cvmx_pciercx_cfg001_s cn52xxp1;
@@ -162,15 +195,23 @@ union cvmx_pciercx_cfg001 {
 	struct cvmx_pciercx_cfg001_s cn66xx;
 	struct cvmx_pciercx_cfg001_s cn68xx;
 	struct cvmx_pciercx_cfg001_s cn68xxp1;
+	struct cvmx_pciercx_cfg001_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg002 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg002_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t bcc:8;
 		uint32_t sc:8;
 		uint32_t pi:8;
 		uint32_t rid:8;
+#else
+		uint32_t rid:8;
+		uint32_t pi:8;
+		uint32_t sc:8;
+		uint32_t bcc:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg002_s cn52xx;
 	struct cvmx_pciercx_cfg002_s cn52xxp1;
@@ -182,16 +223,25 @@ union cvmx_pciercx_cfg002 {
 	struct cvmx_pciercx_cfg002_s cn66xx;
 	struct cvmx_pciercx_cfg002_s cn68xx;
 	struct cvmx_pciercx_cfg002_s cn68xxp1;
+	struct cvmx_pciercx_cfg002_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg003 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg003_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t bist:8;
 		uint32_t mfd:1;
 		uint32_t chf:7;
 		uint32_t lt:8;
 		uint32_t cls:8;
+#else
+		uint32_t cls:8;
+		uint32_t lt:8;
+		uint32_t chf:7;
+		uint32_t mfd:1;
+		uint32_t bist:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg003_s cn52xx;
 	struct cvmx_pciercx_cfg003_s cn52xxp1;
@@ -203,12 +253,17 @@ union cvmx_pciercx_cfg003 {
 	struct cvmx_pciercx_cfg003_s cn66xx;
 	struct cvmx_pciercx_cfg003_s cn68xx;
 	struct cvmx_pciercx_cfg003_s cn68xxp1;
+	struct cvmx_pciercx_cfg003_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg004 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg004_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_0_31:32;
+#else
 		uint32_t reserved_0_31:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg004_s cn52xx;
 	struct cvmx_pciercx_cfg004_s cn52xxp1;
@@ -220,12 +275,17 @@ union cvmx_pciercx_cfg004 {
 	struct cvmx_pciercx_cfg004_s cn66xx;
 	struct cvmx_pciercx_cfg004_s cn68xx;
 	struct cvmx_pciercx_cfg004_s cn68xxp1;
+	struct cvmx_pciercx_cfg004_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg005 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg005_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_0_31:32;
+#else
 		uint32_t reserved_0_31:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg005_s cn52xx;
 	struct cvmx_pciercx_cfg005_s cn52xxp1;
@@ -237,15 +297,23 @@ union cvmx_pciercx_cfg005 {
 	struct cvmx_pciercx_cfg005_s cn66xx;
 	struct cvmx_pciercx_cfg005_s cn68xx;
 	struct cvmx_pciercx_cfg005_s cn68xxp1;
+	struct cvmx_pciercx_cfg005_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg006 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg006_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t slt:8;
 		uint32_t subbnum:8;
 		uint32_t sbnum:8;
 		uint32_t pbnum:8;
+#else
+		uint32_t pbnum:8;
+		uint32_t sbnum:8;
+		uint32_t subbnum:8;
+		uint32_t slt:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg006_s cn52xx;
 	struct cvmx_pciercx_cfg006_s cn52xxp1;
@@ -257,11 +325,13 @@ union cvmx_pciercx_cfg006 {
 	struct cvmx_pciercx_cfg006_s cn66xx;
 	struct cvmx_pciercx_cfg006_s cn68xx;
 	struct cvmx_pciercx_cfg006_s cn68xxp1;
+	struct cvmx_pciercx_cfg006_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg007 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg007_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t dpe:1;
 		uint32_t sse:1;
 		uint32_t rma:1;
@@ -279,6 +349,25 @@ union cvmx_pciercx_cfg007 {
 		uint32_t lio_base:4;
 		uint32_t reserved_1_3:3;
 		uint32_t io32a:1;
+#else
+		uint32_t io32a:1;
+		uint32_t reserved_1_3:3;
+		uint32_t lio_base:4;
+		uint32_t io32b:1;
+		uint32_t reserved_9_11:3;
+		uint32_t lio_limi:4;
+		uint32_t reserved_16_20:5;
+		uint32_t m66:1;
+		uint32_t reserved_22_22:1;
+		uint32_t fbb:1;
+		uint32_t mdpe:1;
+		uint32_t devt:2;
+		uint32_t sta:1;
+		uint32_t rta:1;
+		uint32_t rma:1;
+		uint32_t sse:1;
+		uint32_t dpe:1;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg007_s cn52xx;
 	struct cvmx_pciercx_cfg007_s cn52xxp1;
@@ -290,15 +379,23 @@ union cvmx_pciercx_cfg007 {
 	struct cvmx_pciercx_cfg007_s cn66xx;
 	struct cvmx_pciercx_cfg007_s cn68xx;
 	struct cvmx_pciercx_cfg007_s cn68xxp1;
+	struct cvmx_pciercx_cfg007_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg008 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg008_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t ml_addr:12;
 		uint32_t reserved_16_19:4;
 		uint32_t mb_addr:12;
 		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t mb_addr:12;
+		uint32_t reserved_16_19:4;
+		uint32_t ml_addr:12;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg008_s cn52xx;
 	struct cvmx_pciercx_cfg008_s cn52xxp1;
@@ -310,17 +407,27 @@ union cvmx_pciercx_cfg008 {
 	struct cvmx_pciercx_cfg008_s cn66xx;
 	struct cvmx_pciercx_cfg008_s cn68xx;
 	struct cvmx_pciercx_cfg008_s cn68xxp1;
+	struct cvmx_pciercx_cfg008_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg009 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg009_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t lmem_limit:12;
 		uint32_t reserved_17_19:3;
 		uint32_t mem64b:1;
 		uint32_t lmem_base:12;
 		uint32_t reserved_1_3:3;
 		uint32_t mem64a:1;
+#else
+		uint32_t mem64a:1;
+		uint32_t reserved_1_3:3;
+		uint32_t lmem_base:12;
+		uint32_t mem64b:1;
+		uint32_t reserved_17_19:3;
+		uint32_t lmem_limit:12;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg009_s cn52xx;
 	struct cvmx_pciercx_cfg009_s cn52xxp1;
@@ -332,12 +439,17 @@ union cvmx_pciercx_cfg009 {
 	struct cvmx_pciercx_cfg009_s cn66xx;
 	struct cvmx_pciercx_cfg009_s cn68xx;
 	struct cvmx_pciercx_cfg009_s cn68xxp1;
+	struct cvmx_pciercx_cfg009_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg010 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg010_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t umem_base:32;
+#else
+		uint32_t umem_base:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg010_s cn52xx;
 	struct cvmx_pciercx_cfg010_s cn52xxp1;
@@ -349,12 +461,17 @@ union cvmx_pciercx_cfg010 {
 	struct cvmx_pciercx_cfg010_s cn66xx;
 	struct cvmx_pciercx_cfg010_s cn68xx;
 	struct cvmx_pciercx_cfg010_s cn68xxp1;
+	struct cvmx_pciercx_cfg010_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg011 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg011_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t umem_limit:32;
+#else
+		uint32_t umem_limit:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg011_s cn52xx;
 	struct cvmx_pciercx_cfg011_s cn52xxp1;
@@ -366,13 +483,19 @@ union cvmx_pciercx_cfg011 {
 	struct cvmx_pciercx_cfg011_s cn66xx;
 	struct cvmx_pciercx_cfg011_s cn68xx;
 	struct cvmx_pciercx_cfg011_s cn68xxp1;
+	struct cvmx_pciercx_cfg011_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg012 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg012_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t uio_limit:16;
 		uint32_t uio_base:16;
+#else
+		uint32_t uio_base:16;
+		uint32_t uio_limit:16;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg012_s cn52xx;
 	struct cvmx_pciercx_cfg012_s cn52xxp1;
@@ -384,13 +507,19 @@ union cvmx_pciercx_cfg012 {
 	struct cvmx_pciercx_cfg012_s cn66xx;
 	struct cvmx_pciercx_cfg012_s cn68xx;
 	struct cvmx_pciercx_cfg012_s cn68xxp1;
+	struct cvmx_pciercx_cfg012_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg013 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg013_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_8_31:24;
 		uint32_t cp:8;
+#else
+		uint32_t cp:8;
+		uint32_t reserved_8_31:24;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg013_s cn52xx;
 	struct cvmx_pciercx_cfg013_s cn52xxp1;
@@ -402,12 +531,17 @@ union cvmx_pciercx_cfg013 {
 	struct cvmx_pciercx_cfg013_s cn66xx;
 	struct cvmx_pciercx_cfg013_s cn68xx;
 	struct cvmx_pciercx_cfg013_s cn68xxp1;
+	struct cvmx_pciercx_cfg013_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg014 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg014_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_0_31:32;
+#else
 		uint32_t reserved_0_31:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg014_s cn52xx;
 	struct cvmx_pciercx_cfg014_s cn52xxp1;
@@ -419,11 +553,13 @@ union cvmx_pciercx_cfg014 {
 	struct cvmx_pciercx_cfg014_s cn66xx;
 	struct cvmx_pciercx_cfg014_s cn68xx;
 	struct cvmx_pciercx_cfg014_s cn68xxp1;
+	struct cvmx_pciercx_cfg014_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg015 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg015_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_28_31:4;
 		uint32_t dtsees:1;
 		uint32_t dts:1;
@@ -439,6 +575,23 @@ union cvmx_pciercx_cfg015 {
 		uint32_t pere:1;
 		uint32_t inta:8;
 		uint32_t il:8;
+#else
+		uint32_t il:8;
+		uint32_t inta:8;
+		uint32_t pere:1;
+		uint32_t see:1;
+		uint32_t isae:1;
+		uint32_t vgae:1;
+		uint32_t vga16d:1;
+		uint32_t mam:1;
+		uint32_t sbrst:1;
+		uint32_t fbbe:1;
+		uint32_t pdt:1;
+		uint32_t sdt:1;
+		uint32_t dts:1;
+		uint32_t dtsees:1;
+		uint32_t reserved_28_31:4;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg015_s cn52xx;
 	struct cvmx_pciercx_cfg015_s cn52xxp1;
@@ -450,11 +603,13 @@ union cvmx_pciercx_cfg015 {
 	struct cvmx_pciercx_cfg015_s cn66xx;
 	struct cvmx_pciercx_cfg015_s cn68xx;
 	struct cvmx_pciercx_cfg015_s cn68xxp1;
+	struct cvmx_pciercx_cfg015_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg016 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg016_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t pmes:5;
 		uint32_t d2s:1;
 		uint32_t d1s:1;
@@ -465,6 +620,18 @@ union cvmx_pciercx_cfg016 {
 		uint32_t pmsv:3;
 		uint32_t ncp:8;
 		uint32_t pmcid:8;
+#else
+		uint32_t pmcid:8;
+		uint32_t ncp:8;
+		uint32_t pmsv:3;
+		uint32_t pme_clock:1;
+		uint32_t reserved_20_20:1;
+		uint32_t dsi:1;
+		uint32_t auxc:3;
+		uint32_t d1s:1;
+		uint32_t d2s:1;
+		uint32_t pmes:5;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg016_s cn52xx;
 	struct cvmx_pciercx_cfg016_s cn52xxp1;
@@ -476,11 +643,13 @@ union cvmx_pciercx_cfg016 {
 	struct cvmx_pciercx_cfg016_s cn66xx;
 	struct cvmx_pciercx_cfg016_s cn68xx;
 	struct cvmx_pciercx_cfg016_s cn68xxp1;
+	struct cvmx_pciercx_cfg016_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg017 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg017_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t pmdia:8;
 		uint32_t bpccee:1;
 		uint32_t bd3h:1;
@@ -493,6 +662,20 @@ union cvmx_pciercx_cfg017 {
 		uint32_t nsr:1;
 		uint32_t reserved_2_2:1;
 		uint32_t ps:2;
+#else
+		uint32_t ps:2;
+		uint32_t reserved_2_2:1;
+		uint32_t nsr:1;
+		uint32_t reserved_4_7:4;
+		uint32_t pmeens:1;
+		uint32_t pmds:4;
+		uint32_t pmedsia:2;
+		uint32_t pmess:1;
+		uint32_t reserved_16_21:6;
+		uint32_t bd3h:1;
+		uint32_t bpccee:1;
+		uint32_t pmdia:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg017_s cn52xx;
 	struct cvmx_pciercx_cfg017_s cn52xxp1;
@@ -504,11 +687,13 @@ union cvmx_pciercx_cfg017 {
 	struct cvmx_pciercx_cfg017_s cn66xx;
 	struct cvmx_pciercx_cfg017_s cn68xx;
 	struct cvmx_pciercx_cfg017_s cn68xxp1;
+	struct cvmx_pciercx_cfg017_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg020 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg020_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_25_31:7;
 		uint32_t pvm:1;
 		uint32_t m64:1;
@@ -517,8 +702,19 @@ union cvmx_pciercx_cfg020 {
 		uint32_t msien:1;
 		uint32_t ncp:8;
 		uint32_t msicid:8;
+#else
+		uint32_t msicid:8;
+		uint32_t ncp:8;
+		uint32_t msien:1;
+		uint32_t mmc:3;
+		uint32_t mme:3;
+		uint32_t m64:1;
+		uint32_t pvm:1;
+		uint32_t reserved_25_31:7;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg020_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_24_31:8;
 		uint32_t m64:1;
 		uint32_t mme:3;
@@ -526,6 +722,15 @@ union cvmx_pciercx_cfg020 {
 		uint32_t msien:1;
 		uint32_t ncp:8;
 		uint32_t msicid:8;
+#else
+		uint32_t msicid:8;
+		uint32_t ncp:8;
+		uint32_t msien:1;
+		uint32_t mmc:3;
+		uint32_t mme:3;
+		uint32_t m64:1;
+		uint32_t reserved_24_31:8;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg020_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg020_cn52xx cn56xx;
@@ -536,13 +741,19 @@ union cvmx_pciercx_cfg020 {
 	struct cvmx_pciercx_cfg020_cn52xx cn66xx;
 	struct cvmx_pciercx_cfg020_cn52xx cn68xx;
 	struct cvmx_pciercx_cfg020_cn52xx cn68xxp1;
+	struct cvmx_pciercx_cfg020_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg021 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg021_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t lmsi:30;
 		uint32_t reserved_0_1:2;
+#else
+		uint32_t reserved_0_1:2;
+		uint32_t lmsi:30;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg021_s cn52xx;
 	struct cvmx_pciercx_cfg021_s cn52xxp1;
@@ -554,12 +765,17 @@ union cvmx_pciercx_cfg021 {
 	struct cvmx_pciercx_cfg021_s cn66xx;
 	struct cvmx_pciercx_cfg021_s cn68xx;
 	struct cvmx_pciercx_cfg021_s cn68xxp1;
+	struct cvmx_pciercx_cfg021_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg022 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg022_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t umsi:32;
+#else
+		uint32_t umsi:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg022_s cn52xx;
 	struct cvmx_pciercx_cfg022_s cn52xxp1;
@@ -571,13 +787,19 @@ union cvmx_pciercx_cfg022 {
 	struct cvmx_pciercx_cfg022_s cn66xx;
 	struct cvmx_pciercx_cfg022_s cn68xx;
 	struct cvmx_pciercx_cfg022_s cn68xxp1;
+	struct cvmx_pciercx_cfg022_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg023 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg023_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_16_31:16;
 		uint32_t msimd:16;
+#else
+		uint32_t msimd:16;
+		uint32_t reserved_16_31:16;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg023_s cn52xx;
 	struct cvmx_pciercx_cfg023_s cn52xxp1;
@@ -589,11 +811,13 @@ union cvmx_pciercx_cfg023 {
 	struct cvmx_pciercx_cfg023_s cn66xx;
 	struct cvmx_pciercx_cfg023_s cn68xx;
 	struct cvmx_pciercx_cfg023_s cn68xxp1;
+	struct cvmx_pciercx_cfg023_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg028 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg028_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_30_31:2;
 		uint32_t imn:5;
 		uint32_t si:1;
@@ -601,6 +825,15 @@ union cvmx_pciercx_cfg028 {
 		uint32_t pciecv:4;
 		uint32_t ncp:8;
 		uint32_t pcieid:8;
+#else
+		uint32_t pcieid:8;
+		uint32_t ncp:8;
+		uint32_t pciecv:4;
+		uint32_t dpt:4;
+		uint32_t si:1;
+		uint32_t imn:5;
+		uint32_t reserved_30_31:2;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg028_s cn52xx;
 	struct cvmx_pciercx_cfg028_s cn52xxp1;
@@ -612,11 +845,13 @@ union cvmx_pciercx_cfg028 {
 	struct cvmx_pciercx_cfg028_s cn66xx;
 	struct cvmx_pciercx_cfg028_s cn68xx;
 	struct cvmx_pciercx_cfg028_s cn68xxp1;
+	struct cvmx_pciercx_cfg028_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg029 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg029_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_28_31:4;
 		uint32_t cspls:2;
 		uint32_t csplv:8;
@@ -628,6 +863,19 @@ union cvmx_pciercx_cfg029 {
 		uint32_t etfs:1;
 		uint32_t pfs:2;
 		uint32_t mpss:3;
+#else
+		uint32_t mpss:3;
+		uint32_t pfs:2;
+		uint32_t etfs:1;
+		uint32_t el0al:3;
+		uint32_t el1al:3;
+		uint32_t reserved_12_14:3;
+		uint32_t rber:1;
+		uint32_t reserved_16_17:2;
+		uint32_t csplv:8;
+		uint32_t cspls:2;
+		uint32_t reserved_28_31:4;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg029_s cn52xx;
 	struct cvmx_pciercx_cfg029_s cn52xxp1;
@@ -639,11 +887,13 @@ union cvmx_pciercx_cfg029 {
 	struct cvmx_pciercx_cfg029_s cn66xx;
 	struct cvmx_pciercx_cfg029_s cn68xx;
 	struct cvmx_pciercx_cfg029_s cn68xxp1;
+	struct cvmx_pciercx_cfg029_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg030 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg030_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_22_31:10;
 		uint32_t tp:1;
 		uint32_t ap_d:1;
@@ -663,6 +913,27 @@ union cvmx_pciercx_cfg030 {
 		uint32_t fe_en:1;
 		uint32_t nfe_en:1;
 		uint32_t ce_en:1;
+#else
+		uint32_t ce_en:1;
+		uint32_t nfe_en:1;
+		uint32_t fe_en:1;
+		uint32_t ur_en:1;
+		uint32_t ro_en:1;
+		uint32_t mps:3;
+		uint32_t etf_en:1;
+		uint32_t pf_en:1;
+		uint32_t ap_en:1;
+		uint32_t ns_en:1;
+		uint32_t mrrs:3;
+		uint32_t reserved_15_15:1;
+		uint32_t ce_d:1;
+		uint32_t nfe_d:1;
+		uint32_t fe_d:1;
+		uint32_t ur_d:1;
+		uint32_t ap_d:1;
+		uint32_t tp:1;
+		uint32_t reserved_22_31:10;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg030_s cn52xx;
 	struct cvmx_pciercx_cfg030_s cn52xxp1;
@@ -674,11 +945,13 @@ union cvmx_pciercx_cfg030 {
 	struct cvmx_pciercx_cfg030_s cn66xx;
 	struct cvmx_pciercx_cfg030_s cn68xx;
 	struct cvmx_pciercx_cfg030_s cn68xxp1;
+	struct cvmx_pciercx_cfg030_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg031 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg031_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t pnum:8;
 		uint32_t reserved_23_23:1;
 		uint32_t aspm:1;
@@ -691,8 +964,23 @@ union cvmx_pciercx_cfg031 {
 		uint32_t aslpms:2;
 		uint32_t mlw:6;
 		uint32_t mls:4;
+#else
+		uint32_t mls:4;
+		uint32_t mlw:6;
+		uint32_t aslpms:2;
+		uint32_t l0el:3;
+		uint32_t l1el:3;
+		uint32_t cpm:1;
+		uint32_t sderc:1;
+		uint32_t dllarc:1;
+		uint32_t lbnc:1;
+		uint32_t aspm:1;
+		uint32_t reserved_23_23:1;
+		uint32_t pnum:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg031_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t pnum:8;
 		uint32_t reserved_22_23:2;
 		uint32_t lbnc:1;
@@ -704,6 +992,19 @@ union cvmx_pciercx_cfg031 {
 		uint32_t aslpms:2;
 		uint32_t mlw:6;
 		uint32_t mls:4;
+#else
+		uint32_t mls:4;
+		uint32_t mlw:6;
+		uint32_t aslpms:2;
+		uint32_t l0el:3;
+		uint32_t l1el:3;
+		uint32_t cpm:1;
+		uint32_t sderc:1;
+		uint32_t dllarc:1;
+		uint32_t lbnc:1;
+		uint32_t reserved_22_23:2;
+		uint32_t pnum:8;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg031_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg031_cn52xx cn56xx;
@@ -714,11 +1015,13 @@ union cvmx_pciercx_cfg031 {
 	struct cvmx_pciercx_cfg031_s cn66xx;
 	struct cvmx_pciercx_cfg031_s cn68xx;
 	struct cvmx_pciercx_cfg031_cn52xx cn68xxp1;
+	struct cvmx_pciercx_cfg031_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg032 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg032_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t lab:1;
 		uint32_t lbm:1;
 		uint32_t dlla:1;
@@ -739,6 +1042,28 @@ union cvmx_pciercx_cfg032 {
 		uint32_t rcb:1;
 		uint32_t reserved_2_2:1;
 		uint32_t aslpc:2;
+#else
+		uint32_t aslpc:2;
+		uint32_t reserved_2_2:1;
+		uint32_t rcb:1;
+		uint32_t ld:1;
+		uint32_t rl:1;
+		uint32_t ccc:1;
+		uint32_t es:1;
+		uint32_t ecpm:1;
+		uint32_t hawd:1;
+		uint32_t lbm_int_enb:1;
+		uint32_t lab_int_enb:1;
+		uint32_t reserved_12_15:4;
+		uint32_t ls:4;
+		uint32_t nlw:6;
+		uint32_t reserved_26_26:1;
+		uint32_t lt:1;
+		uint32_t scc:1;
+		uint32_t dlla:1;
+		uint32_t lbm:1;
+		uint32_t lab:1;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg032_s cn52xx;
 	struct cvmx_pciercx_cfg032_s cn52xxp1;
@@ -750,11 +1075,13 @@ union cvmx_pciercx_cfg032 {
 	struct cvmx_pciercx_cfg032_s cn66xx;
 	struct cvmx_pciercx_cfg032_s cn68xx;
 	struct cvmx_pciercx_cfg032_s cn68xxp1;
+	struct cvmx_pciercx_cfg032_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg033 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg033_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t ps_num:13;
 		uint32_t nccs:1;
 		uint32_t emip:1;
@@ -767,6 +1094,20 @@ union cvmx_pciercx_cfg033 {
 		uint32_t mrlsp:1;
 		uint32_t pcp:1;
 		uint32_t abp:1;
+#else
+		uint32_t abp:1;
+		uint32_t pcp:1;
+		uint32_t mrlsp:1;
+		uint32_t aip:1;
+		uint32_t pip:1;
+		uint32_t hp_s:1;
+		uint32_t hp_c:1;
+		uint32_t sp_lv:8;
+		uint32_t sp_ls:2;
+		uint32_t emip:1;
+		uint32_t nccs:1;
+		uint32_t ps_num:13;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg033_s cn52xx;
 	struct cvmx_pciercx_cfg033_s cn52xxp1;
@@ -778,11 +1119,13 @@ union cvmx_pciercx_cfg033 {
 	struct cvmx_pciercx_cfg033_s cn66xx;
 	struct cvmx_pciercx_cfg033_s cn68xx;
 	struct cvmx_pciercx_cfg033_s cn68xxp1;
+	struct cvmx_pciercx_cfg033_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg034 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg034_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_25_31:7;
 		uint32_t dlls_c:1;
 		uint32_t emis:1;
@@ -805,6 +1148,30 @@ union cvmx_pciercx_cfg034 {
 		uint32_t mrls_en:1;
 		uint32_t pf_en:1;
 		uint32_t abp_en:1;
+#else
+		uint32_t abp_en:1;
+		uint32_t pf_en:1;
+		uint32_t mrls_en:1;
+		uint32_t pd_en:1;
+		uint32_t ccint_en:1;
+		uint32_t hpint_en:1;
+		uint32_t aic:2;
+		uint32_t pic:2;
+		uint32_t pcc:1;
+		uint32_t emic:1;
+		uint32_t dlls_en:1;
+		uint32_t reserved_13_15:3;
+		uint32_t abp_d:1;
+		uint32_t pf_d:1;
+		uint32_t mrls_c:1;
+		uint32_t pd_c:1;
+		uint32_t ccint_d:1;
+		uint32_t mrlss:1;
+		uint32_t pds:1;
+		uint32_t emis:1;
+		uint32_t dlls_c:1;
+		uint32_t reserved_25_31:7;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg034_s cn52xx;
 	struct cvmx_pciercx_cfg034_s cn52xxp1;
@@ -816,11 +1183,13 @@ union cvmx_pciercx_cfg034 {
 	struct cvmx_pciercx_cfg034_s cn66xx;
 	struct cvmx_pciercx_cfg034_s cn68xx;
 	struct cvmx_pciercx_cfg034_s cn68xxp1;
+	struct cvmx_pciercx_cfg034_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg035 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg035_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_17_31:15;
 		uint32_t crssv:1;
 		uint32_t reserved_5_15:11;
@@ -829,6 +1198,16 @@ union cvmx_pciercx_cfg035 {
 		uint32_t sefee:1;
 		uint32_t senfee:1;
 		uint32_t secee:1;
+#else
+		uint32_t secee:1;
+		uint32_t senfee:1;
+		uint32_t sefee:1;
+		uint32_t pmeie:1;
+		uint32_t crssve:1;
+		uint32_t reserved_5_15:11;
+		uint32_t crssv:1;
+		uint32_t reserved_17_31:15;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg035_s cn52xx;
 	struct cvmx_pciercx_cfg035_s cn52xxp1;
@@ -840,15 +1219,23 @@ union cvmx_pciercx_cfg035 {
 	struct cvmx_pciercx_cfg035_s cn66xx;
 	struct cvmx_pciercx_cfg035_s cn68xx;
 	struct cvmx_pciercx_cfg035_s cn68xxp1;
+	struct cvmx_pciercx_cfg035_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg036 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg036_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_18_31:14;
 		uint32_t pme_pend:1;
 		uint32_t pme_stat:1;
 		uint32_t pme_rid:16;
+#else
+		uint32_t pme_rid:16;
+		uint32_t pme_stat:1;
+		uint32_t pme_pend:1;
+		uint32_t reserved_18_31:14;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg036_s cn52xx;
 	struct cvmx_pciercx_cfg036_s cn52xxp1;
@@ -860,14 +1247,17 @@ union cvmx_pciercx_cfg036 {
 	struct cvmx_pciercx_cfg036_s cn66xx;
 	struct cvmx_pciercx_cfg036_s cn68xx;
 	struct cvmx_pciercx_cfg036_s cn68xxp1;
+	struct cvmx_pciercx_cfg036_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg037 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg037_s {
-		uint32_t reserved_14_31:18;
-		uint32_t tph:2;
-		uint32_t reserved_11_11:1;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_20_31:12;
+		uint32_t obffs:2;
+		uint32_t reserved_12_17:6;
+		uint32_t ltrs:1;
 		uint32_t noroprpr:1;
 		uint32_t atom128s:1;
 		uint32_t atom64s:1;
@@ -876,16 +1266,37 @@ union cvmx_pciercx_cfg037 {
 		uint32_t reserved_5_5:1;
 		uint32_t ctds:1;
 		uint32_t ctrs:4;
+#else
+		uint32_t ctrs:4;
+		uint32_t ctds:1;
+		uint32_t reserved_5_5:1;
+		uint32_t atom_ops:1;
+		uint32_t atom32s:1;
+		uint32_t atom64s:1;
+		uint32_t atom128s:1;
+		uint32_t noroprpr:1;
+		uint32_t ltrs:1;
+		uint32_t reserved_12_17:6;
+		uint32_t obffs:2;
+		uint32_t reserved_20_31:12;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg037_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_5_31:27;
 		uint32_t ctds:1;
 		uint32_t ctrs:4;
+#else
+		uint32_t ctrs:4;
+		uint32_t ctds:1;
+		uint32_t reserved_5_31:27;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg037_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg037_cn52xx cn56xx;
 	struct cvmx_pciercx_cfg037_cn52xx cn56xxp1;
 	struct cvmx_pciercx_cfg037_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_14_31:18;
 		uint32_t tph:2;
 		uint32_t reserved_11_11:1;
@@ -897,10 +1308,24 @@ union cvmx_pciercx_cfg037 {
 		uint32_t ari_fw:1;
 		uint32_t ctds:1;
 		uint32_t ctrs:4;
+#else
+		uint32_t ctrs:4;
+		uint32_t ctds:1;
+		uint32_t ari_fw:1;
+		uint32_t atom_ops:1;
+		uint32_t atom32s:1;
+		uint32_t atom64s:1;
+		uint32_t atom128s:1;
+		uint32_t noroprpr:1;
+		uint32_t reserved_11_11:1;
+		uint32_t tph:2;
+		uint32_t reserved_14_31:18;
+#endif
 	} cn61xx;
 	struct cvmx_pciercx_cfg037_cn52xx cn63xx;
 	struct cvmx_pciercx_cfg037_cn52xx cn63xxp1;
 	struct cvmx_pciercx_cfg037_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_14_31:18;
 		uint32_t tph:2;
 		uint32_t reserved_11_11:1;
@@ -912,15 +1337,63 @@ union cvmx_pciercx_cfg037 {
 		uint32_t ari:1;
 		uint32_t ctds:1;
 		uint32_t ctrs:4;
+#else
+		uint32_t ctrs:4;
+		uint32_t ctds:1;
+		uint32_t ari:1;
+		uint32_t atom_ops:1;
+		uint32_t atom32s:1;
+		uint32_t atom64s:1;
+		uint32_t atom128s:1;
+		uint32_t noroprpr:1;
+		uint32_t reserved_11_11:1;
+		uint32_t tph:2;
+		uint32_t reserved_14_31:18;
+#endif
 	} cn66xx;
 	struct cvmx_pciercx_cfg037_cn66xx cn68xx;
 	struct cvmx_pciercx_cfg037_cn66xx cn68xxp1;
+	struct cvmx_pciercx_cfg037_cnf71xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_20_31:12;
+		uint32_t obffs:2;
+		uint32_t reserved_14_17:4;
+		uint32_t tphs:2;
+		uint32_t ltrs:1;
+		uint32_t noroprpr:1;
+		uint32_t atom128s:1;
+		uint32_t atom64s:1;
+		uint32_t atom32s:1;
+		uint32_t atom_ops:1;
+		uint32_t ari_fw:1;
+		uint32_t ctds:1;
+		uint32_t ctrs:4;
+#else
+		uint32_t ctrs:4;
+		uint32_t ctds:1;
+		uint32_t ari_fw:1;
+		uint32_t atom_ops:1;
+		uint32_t atom32s:1;
+		uint32_t atom64s:1;
+		uint32_t atom128s:1;
+		uint32_t noroprpr:1;
+		uint32_t ltrs:1;
+		uint32_t tphs:2;
+		uint32_t reserved_14_17:4;
+		uint32_t obffs:2;
+		uint32_t reserved_20_31:12;
+#endif
+	} cnf71xx;
 };
 
 union cvmx_pciercx_cfg038 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg038_s {
-		uint32_t reserved_10_31:22;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_15_31:17;
+		uint32_t obffe:2;
+		uint32_t reserved_11_12:2;
+		uint32_t ltre:1;
 		uint32_t id0_cp:1;
 		uint32_t id0_rq:1;
 		uint32_t atom_op_eb:1;
@@ -928,33 +1401,84 @@ union cvmx_pciercx_cfg038 {
 		uint32_t ari:1;
 		uint32_t ctd:1;
 		uint32_t ctv:4;
+#else
+		uint32_t ctv:4;
+		uint32_t ctd:1;
+		uint32_t ari:1;
+		uint32_t atom_op:1;
+		uint32_t atom_op_eb:1;
+		uint32_t id0_rq:1;
+		uint32_t id0_cp:1;
+		uint32_t ltre:1;
+		uint32_t reserved_11_12:2;
+		uint32_t obffe:2;
+		uint32_t reserved_15_31:17;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg038_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_5_31:27;
 		uint32_t ctd:1;
 		uint32_t ctv:4;
+#else
+		uint32_t ctv:4;
+		uint32_t ctd:1;
+		uint32_t reserved_5_31:27;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg038_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg038_cn52xx cn56xx;
 	struct cvmx_pciercx_cfg038_cn52xx cn56xxp1;
-	struct cvmx_pciercx_cfg038_s cn61xx;
+	struct cvmx_pciercx_cfg038_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_10_31:22;
+		uint32_t id0_cp:1;
+		uint32_t id0_rq:1;
+		uint32_t atom_op_eb:1;
+		uint32_t atom_op:1;
+		uint32_t ari:1;
+		uint32_t ctd:1;
+		uint32_t ctv:4;
+#else
+		uint32_t ctv:4;
+		uint32_t ctd:1;
+		uint32_t ari:1;
+		uint32_t atom_op:1;
+		uint32_t atom_op_eb:1;
+		uint32_t id0_rq:1;
+		uint32_t id0_cp:1;
+		uint32_t reserved_10_31:22;
+#endif
+	} cn61xx;
 	struct cvmx_pciercx_cfg038_cn52xx cn63xx;
 	struct cvmx_pciercx_cfg038_cn52xx cn63xxp1;
-	struct cvmx_pciercx_cfg038_s cn66xx;
-	struct cvmx_pciercx_cfg038_s cn68xx;
-	struct cvmx_pciercx_cfg038_s cn68xxp1;
+	struct cvmx_pciercx_cfg038_cn61xx cn66xx;
+	struct cvmx_pciercx_cfg038_cn61xx cn68xx;
+	struct cvmx_pciercx_cfg038_cn61xx cn68xxp1;
+	struct cvmx_pciercx_cfg038_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg039 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg039_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_9_31:23;
 		uint32_t cls:1;
 		uint32_t slsv:7;
 		uint32_t reserved_0_0:1;
+#else
+		uint32_t reserved_0_0:1;
+		uint32_t slsv:7;
+		uint32_t cls:1;
+		uint32_t reserved_9_31:23;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg039_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_0_31:32;
+#else
 		uint32_t reserved_0_31:32;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg039_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg039_cn52xx cn56xx;
@@ -965,11 +1489,13 @@ union cvmx_pciercx_cfg039 {
 	struct cvmx_pciercx_cfg039_s cn66xx;
 	struct cvmx_pciercx_cfg039_s cn68xx;
 	struct cvmx_pciercx_cfg039_s cn68xxp1;
+	struct cvmx_pciercx_cfg039_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg040 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg040_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_17_31:15;
 		uint32_t cdl:1;
 		uint32_t reserved_13_15:3;
@@ -981,9 +1507,26 @@ union cvmx_pciercx_cfg040 {
 		uint32_t hasd:1;
 		uint32_t ec:1;
 		uint32_t tls:4;
+#else
+		uint32_t tls:4;
+		uint32_t ec:1;
+		uint32_t hasd:1;
+		uint32_t sde:1;
+		uint32_t tm:3;
+		uint32_t emc:1;
+		uint32_t csos:1;
+		uint32_t cde:1;
+		uint32_t reserved_13_15:3;
+		uint32_t cdl:1;
+		uint32_t reserved_17_31:15;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg040_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_0_31:32;
+#else
 		uint32_t reserved_0_31:32;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg040_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg040_cn52xx cn56xx;
@@ -994,12 +1537,17 @@ union cvmx_pciercx_cfg040 {
 	struct cvmx_pciercx_cfg040_s cn66xx;
 	struct cvmx_pciercx_cfg040_s cn68xx;
 	struct cvmx_pciercx_cfg040_s cn68xxp1;
+	struct cvmx_pciercx_cfg040_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg041 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg041_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_0_31:32;
+#else
 		uint32_t reserved_0_31:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg041_s cn52xx;
 	struct cvmx_pciercx_cfg041_s cn52xxp1;
@@ -1011,12 +1559,17 @@ union cvmx_pciercx_cfg041 {
 	struct cvmx_pciercx_cfg041_s cn66xx;
 	struct cvmx_pciercx_cfg041_s cn68xx;
 	struct cvmx_pciercx_cfg041_s cn68xxp1;
+	struct cvmx_pciercx_cfg041_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg042 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg042_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_0_31:32;
+#else
 		uint32_t reserved_0_31:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg042_s cn52xx;
 	struct cvmx_pciercx_cfg042_s cn52xxp1;
@@ -1028,14 +1581,21 @@ union cvmx_pciercx_cfg042 {
 	struct cvmx_pciercx_cfg042_s cn66xx;
 	struct cvmx_pciercx_cfg042_s cn68xx;
 	struct cvmx_pciercx_cfg042_s cn68xxp1;
+	struct cvmx_pciercx_cfg042_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg064 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg064_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t nco:12;
 		uint32_t cv:4;
 		uint32_t pcieec:16;
+#else
+		uint32_t pcieec:16;
+		uint32_t cv:4;
+		uint32_t nco:12;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg064_s cn52xx;
 	struct cvmx_pciercx_cfg064_s cn52xxp1;
@@ -1047,14 +1607,18 @@ union cvmx_pciercx_cfg064 {
 	struct cvmx_pciercx_cfg064_s cn66xx;
 	struct cvmx_pciercx_cfg064_s cn68xx;
 	struct cvmx_pciercx_cfg064_s cn68xxp1;
+	struct cvmx_pciercx_cfg064_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg065 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg065_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_25_31:7;
 		uint32_t uatombs:1;
-		uint32_t reserved_21_23:3;
+		uint32_t reserved_23_23:1;
+		uint32_t ucies:1;
+		uint32_t reserved_21_21:1;
 		uint32_t ures:1;
 		uint32_t ecrces:1;
 		uint32_t mtlps:1;
@@ -1068,8 +1632,29 @@ union cvmx_pciercx_cfg065 {
 		uint32_t sdes:1;
 		uint32_t dlpes:1;
 		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t dlpes:1;
+		uint32_t sdes:1;
+		uint32_t reserved_6_11:6;
+		uint32_t ptlps:1;
+		uint32_t fcpes:1;
+		uint32_t cts:1;
+		uint32_t cas:1;
+		uint32_t ucs:1;
+		uint32_t ros:1;
+		uint32_t mtlps:1;
+		uint32_t ecrces:1;
+		uint32_t ures:1;
+		uint32_t reserved_21_21:1;
+		uint32_t ucies:1;
+		uint32_t reserved_23_23:1;
+		uint32_t uatombs:1;
+		uint32_t reserved_25_31:7;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg065_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_21_31:11;
 		uint32_t ures:1;
 		uint32_t ecrces:1;
@@ -1084,24 +1669,80 @@ union cvmx_pciercx_cfg065 {
 		uint32_t sdes:1;
 		uint32_t dlpes:1;
 		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t dlpes:1;
+		uint32_t sdes:1;
+		uint32_t reserved_6_11:6;
+		uint32_t ptlps:1;
+		uint32_t fcpes:1;
+		uint32_t cts:1;
+		uint32_t cas:1;
+		uint32_t ucs:1;
+		uint32_t ros:1;
+		uint32_t mtlps:1;
+		uint32_t ecrces:1;
+		uint32_t ures:1;
+		uint32_t reserved_21_31:11;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg065_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg065_cn52xx cn56xx;
 	struct cvmx_pciercx_cfg065_cn52xx cn56xxp1;
-	struct cvmx_pciercx_cfg065_s cn61xx;
+	struct cvmx_pciercx_cfg065_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_25_31:7;
+		uint32_t uatombs:1;
+		uint32_t reserved_21_23:3;
+		uint32_t ures:1;
+		uint32_t ecrces:1;
+		uint32_t mtlps:1;
+		uint32_t ros:1;
+		uint32_t ucs:1;
+		uint32_t cas:1;
+		uint32_t cts:1;
+		uint32_t fcpes:1;
+		uint32_t ptlps:1;
+		uint32_t reserved_6_11:6;
+		uint32_t sdes:1;
+		uint32_t dlpes:1;
+		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t dlpes:1;
+		uint32_t sdes:1;
+		uint32_t reserved_6_11:6;
+		uint32_t ptlps:1;
+		uint32_t fcpes:1;
+		uint32_t cts:1;
+		uint32_t cas:1;
+		uint32_t ucs:1;
+		uint32_t ros:1;
+		uint32_t mtlps:1;
+		uint32_t ecrces:1;
+		uint32_t ures:1;
+		uint32_t reserved_21_23:3;
+		uint32_t uatombs:1;
+		uint32_t reserved_25_31:7;
+#endif
+	} cn61xx;
 	struct cvmx_pciercx_cfg065_cn52xx cn63xx;
 	struct cvmx_pciercx_cfg065_cn52xx cn63xxp1;
-	struct cvmx_pciercx_cfg065_s cn66xx;
-	struct cvmx_pciercx_cfg065_s cn68xx;
+	struct cvmx_pciercx_cfg065_cn61xx cn66xx;
+	struct cvmx_pciercx_cfg065_cn61xx cn68xx;
 	struct cvmx_pciercx_cfg065_cn52xx cn68xxp1;
+	struct cvmx_pciercx_cfg065_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg066 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg066_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_25_31:7;
 		uint32_t uatombm:1;
-		uint32_t reserved_21_23:3;
+		uint32_t reserved_23_23:1;
+		uint32_t uciem:1;
+		uint32_t reserved_21_21:1;
 		uint32_t urem:1;
 		uint32_t ecrcem:1;
 		uint32_t mtlpm:1;
@@ -1115,8 +1756,29 @@ union cvmx_pciercx_cfg066 {
 		uint32_t sdem:1;
 		uint32_t dlpem:1;
 		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t dlpem:1;
+		uint32_t sdem:1;
+		uint32_t reserved_6_11:6;
+		uint32_t ptlpm:1;
+		uint32_t fcpem:1;
+		uint32_t ctm:1;
+		uint32_t cam:1;
+		uint32_t ucm:1;
+		uint32_t rom:1;
+		uint32_t mtlpm:1;
+		uint32_t ecrcem:1;
+		uint32_t urem:1;
+		uint32_t reserved_21_21:1;
+		uint32_t uciem:1;
+		uint32_t reserved_23_23:1;
+		uint32_t uatombm:1;
+		uint32_t reserved_25_31:7;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg066_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_21_31:11;
 		uint32_t urem:1;
 		uint32_t ecrcem:1;
@@ -1131,24 +1793,80 @@ union cvmx_pciercx_cfg066 {
 		uint32_t sdem:1;
 		uint32_t dlpem:1;
 		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t dlpem:1;
+		uint32_t sdem:1;
+		uint32_t reserved_6_11:6;
+		uint32_t ptlpm:1;
+		uint32_t fcpem:1;
+		uint32_t ctm:1;
+		uint32_t cam:1;
+		uint32_t ucm:1;
+		uint32_t rom:1;
+		uint32_t mtlpm:1;
+		uint32_t ecrcem:1;
+		uint32_t urem:1;
+		uint32_t reserved_21_31:11;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg066_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg066_cn52xx cn56xx;
 	struct cvmx_pciercx_cfg066_cn52xx cn56xxp1;
-	struct cvmx_pciercx_cfg066_s cn61xx;
+	struct cvmx_pciercx_cfg066_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_25_31:7;
+		uint32_t uatombm:1;
+		uint32_t reserved_21_23:3;
+		uint32_t urem:1;
+		uint32_t ecrcem:1;
+		uint32_t mtlpm:1;
+		uint32_t rom:1;
+		uint32_t ucm:1;
+		uint32_t cam:1;
+		uint32_t ctm:1;
+		uint32_t fcpem:1;
+		uint32_t ptlpm:1;
+		uint32_t reserved_6_11:6;
+		uint32_t sdem:1;
+		uint32_t dlpem:1;
+		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t dlpem:1;
+		uint32_t sdem:1;
+		uint32_t reserved_6_11:6;
+		uint32_t ptlpm:1;
+		uint32_t fcpem:1;
+		uint32_t ctm:1;
+		uint32_t cam:1;
+		uint32_t ucm:1;
+		uint32_t rom:1;
+		uint32_t mtlpm:1;
+		uint32_t ecrcem:1;
+		uint32_t urem:1;
+		uint32_t reserved_21_23:3;
+		uint32_t uatombm:1;
+		uint32_t reserved_25_31:7;
+#endif
+	} cn61xx;
 	struct cvmx_pciercx_cfg066_cn52xx cn63xx;
 	struct cvmx_pciercx_cfg066_cn52xx cn63xxp1;
-	struct cvmx_pciercx_cfg066_s cn66xx;
-	struct cvmx_pciercx_cfg066_s cn68xx;
+	struct cvmx_pciercx_cfg066_cn61xx cn66xx;
+	struct cvmx_pciercx_cfg066_cn61xx cn68xx;
 	struct cvmx_pciercx_cfg066_cn52xx cn68xxp1;
+	struct cvmx_pciercx_cfg066_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg067 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg067_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_25_31:7;
 		uint32_t uatombs:1;
-		uint32_t reserved_21_23:3;
+		uint32_t reserved_23_23:1;
+		uint32_t ucies:1;
+		uint32_t reserved_21_21:1;
 		uint32_t ures:1;
 		uint32_t ecrces:1;
 		uint32_t mtlps:1;
@@ -1162,8 +1880,29 @@ union cvmx_pciercx_cfg067 {
 		uint32_t sdes:1;
 		uint32_t dlpes:1;
 		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t dlpes:1;
+		uint32_t sdes:1;
+		uint32_t reserved_6_11:6;
+		uint32_t ptlps:1;
+		uint32_t fcpes:1;
+		uint32_t cts:1;
+		uint32_t cas:1;
+		uint32_t ucs:1;
+		uint32_t ros:1;
+		uint32_t mtlps:1;
+		uint32_t ecrces:1;
+		uint32_t ures:1;
+		uint32_t reserved_21_21:1;
+		uint32_t ucies:1;
+		uint32_t reserved_23_23:1;
+		uint32_t uatombs:1;
+		uint32_t reserved_25_31:7;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg067_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_21_31:11;
 		uint32_t ures:1;
 		uint32_t ecrces:1;
@@ -1178,22 +1917,77 @@ union cvmx_pciercx_cfg067 {
 		uint32_t sdes:1;
 		uint32_t dlpes:1;
 		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t dlpes:1;
+		uint32_t sdes:1;
+		uint32_t reserved_6_11:6;
+		uint32_t ptlps:1;
+		uint32_t fcpes:1;
+		uint32_t cts:1;
+		uint32_t cas:1;
+		uint32_t ucs:1;
+		uint32_t ros:1;
+		uint32_t mtlps:1;
+		uint32_t ecrces:1;
+		uint32_t ures:1;
+		uint32_t reserved_21_31:11;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg067_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg067_cn52xx cn56xx;
 	struct cvmx_pciercx_cfg067_cn52xx cn56xxp1;
-	struct cvmx_pciercx_cfg067_s cn61xx;
+	struct cvmx_pciercx_cfg067_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_25_31:7;
+		uint32_t uatombs:1;
+		uint32_t reserved_21_23:3;
+		uint32_t ures:1;
+		uint32_t ecrces:1;
+		uint32_t mtlps:1;
+		uint32_t ros:1;
+		uint32_t ucs:1;
+		uint32_t cas:1;
+		uint32_t cts:1;
+		uint32_t fcpes:1;
+		uint32_t ptlps:1;
+		uint32_t reserved_6_11:6;
+		uint32_t sdes:1;
+		uint32_t dlpes:1;
+		uint32_t reserved_0_3:4;
+#else
+		uint32_t reserved_0_3:4;
+		uint32_t dlpes:1;
+		uint32_t sdes:1;
+		uint32_t reserved_6_11:6;
+		uint32_t ptlps:1;
+		uint32_t fcpes:1;
+		uint32_t cts:1;
+		uint32_t cas:1;
+		uint32_t ucs:1;
+		uint32_t ros:1;
+		uint32_t mtlps:1;
+		uint32_t ecrces:1;
+		uint32_t ures:1;
+		uint32_t reserved_21_23:3;
+		uint32_t uatombs:1;
+		uint32_t reserved_25_31:7;
+#endif
+	} cn61xx;
 	struct cvmx_pciercx_cfg067_cn52xx cn63xx;
 	struct cvmx_pciercx_cfg067_cn52xx cn63xxp1;
-	struct cvmx_pciercx_cfg067_s cn66xx;
-	struct cvmx_pciercx_cfg067_s cn68xx;
+	struct cvmx_pciercx_cfg067_cn61xx cn66xx;
+	struct cvmx_pciercx_cfg067_cn61xx cn68xx;
 	struct cvmx_pciercx_cfg067_cn52xx cn68xxp1;
+	struct cvmx_pciercx_cfg067_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg068 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg068_s {
-		uint32_t reserved_14_31:18;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_15_31:17;
+		uint32_t cies:1;
 		uint32_t anfes:1;
 		uint32_t rtts:1;
 		uint32_t reserved_9_11:3;
@@ -1202,23 +1996,60 @@ union cvmx_pciercx_cfg068 {
 		uint32_t btlps:1;
 		uint32_t reserved_1_5:5;
 		uint32_t res:1;
+#else
+		uint32_t res:1;
+		uint32_t reserved_1_5:5;
+		uint32_t btlps:1;
+		uint32_t bdllps:1;
+		uint32_t rnrs:1;
+		uint32_t reserved_9_11:3;
+		uint32_t rtts:1;
+		uint32_t anfes:1;
+		uint32_t cies:1;
+		uint32_t reserved_15_31:17;
+#endif
 	} s;
-	struct cvmx_pciercx_cfg068_s cn52xx;
-	struct cvmx_pciercx_cfg068_s cn52xxp1;
-	struct cvmx_pciercx_cfg068_s cn56xx;
-	struct cvmx_pciercx_cfg068_s cn56xxp1;
-	struct cvmx_pciercx_cfg068_s cn61xx;
-	struct cvmx_pciercx_cfg068_s cn63xx;
-	struct cvmx_pciercx_cfg068_s cn63xxp1;
-	struct cvmx_pciercx_cfg068_s cn66xx;
-	struct cvmx_pciercx_cfg068_s cn68xx;
-	struct cvmx_pciercx_cfg068_s cn68xxp1;
+	struct cvmx_pciercx_cfg068_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_14_31:18;
+		uint32_t anfes:1;
+		uint32_t rtts:1;
+		uint32_t reserved_9_11:3;
+		uint32_t rnrs:1;
+		uint32_t bdllps:1;
+		uint32_t btlps:1;
+		uint32_t reserved_1_5:5;
+		uint32_t res:1;
+#else
+		uint32_t res:1;
+		uint32_t reserved_1_5:5;
+		uint32_t btlps:1;
+		uint32_t bdllps:1;
+		uint32_t rnrs:1;
+		uint32_t reserved_9_11:3;
+		uint32_t rtts:1;
+		uint32_t anfes:1;
+		uint32_t reserved_14_31:18;
+#endif
+	} cn52xx;
+	struct cvmx_pciercx_cfg068_cn52xx cn52xxp1;
+	struct cvmx_pciercx_cfg068_cn52xx cn56xx;
+	struct cvmx_pciercx_cfg068_cn52xx cn56xxp1;
+	struct cvmx_pciercx_cfg068_cn52xx cn61xx;
+	struct cvmx_pciercx_cfg068_cn52xx cn63xx;
+	struct cvmx_pciercx_cfg068_cn52xx cn63xxp1;
+	struct cvmx_pciercx_cfg068_cn52xx cn66xx;
+	struct cvmx_pciercx_cfg068_cn52xx cn68xx;
+	struct cvmx_pciercx_cfg068_cn52xx cn68xxp1;
+	struct cvmx_pciercx_cfg068_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg069 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg069_s {
-		uint32_t reserved_14_31:18;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_15_31:17;
+		uint32_t ciem:1;
 		uint32_t anfem:1;
 		uint32_t rttm:1;
 		uint32_t reserved_9_11:3;
@@ -1227,28 +2058,72 @@ union cvmx_pciercx_cfg069 {
 		uint32_t btlpm:1;
 		uint32_t reserved_1_5:5;
 		uint32_t rem:1;
+#else
+		uint32_t rem:1;
+		uint32_t reserved_1_5:5;
+		uint32_t btlpm:1;
+		uint32_t bdllpm:1;
+		uint32_t rnrm:1;
+		uint32_t reserved_9_11:3;
+		uint32_t rttm:1;
+		uint32_t anfem:1;
+		uint32_t ciem:1;
+		uint32_t reserved_15_31:17;
+#endif
 	} s;
-	struct cvmx_pciercx_cfg069_s cn52xx;
-	struct cvmx_pciercx_cfg069_s cn52xxp1;
-	struct cvmx_pciercx_cfg069_s cn56xx;
-	struct cvmx_pciercx_cfg069_s cn56xxp1;
-	struct cvmx_pciercx_cfg069_s cn61xx;
-	struct cvmx_pciercx_cfg069_s cn63xx;
-	struct cvmx_pciercx_cfg069_s cn63xxp1;
-	struct cvmx_pciercx_cfg069_s cn66xx;
-	struct cvmx_pciercx_cfg069_s cn68xx;
-	struct cvmx_pciercx_cfg069_s cn68xxp1;
+	struct cvmx_pciercx_cfg069_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t reserved_14_31:18;
+		uint32_t anfem:1;
+		uint32_t rttm:1;
+		uint32_t reserved_9_11:3;
+		uint32_t rnrm:1;
+		uint32_t bdllpm:1;
+		uint32_t btlpm:1;
+		uint32_t reserved_1_5:5;
+		uint32_t rem:1;
+#else
+		uint32_t rem:1;
+		uint32_t reserved_1_5:5;
+		uint32_t btlpm:1;
+		uint32_t bdllpm:1;
+		uint32_t rnrm:1;
+		uint32_t reserved_9_11:3;
+		uint32_t rttm:1;
+		uint32_t anfem:1;
+		uint32_t reserved_14_31:18;
+#endif
+	} cn52xx;
+	struct cvmx_pciercx_cfg069_cn52xx cn52xxp1;
+	struct cvmx_pciercx_cfg069_cn52xx cn56xx;
+	struct cvmx_pciercx_cfg069_cn52xx cn56xxp1;
+	struct cvmx_pciercx_cfg069_cn52xx cn61xx;
+	struct cvmx_pciercx_cfg069_cn52xx cn63xx;
+	struct cvmx_pciercx_cfg069_cn52xx cn63xxp1;
+	struct cvmx_pciercx_cfg069_cn52xx cn66xx;
+	struct cvmx_pciercx_cfg069_cn52xx cn68xx;
+	struct cvmx_pciercx_cfg069_cn52xx cn68xxp1;
+	struct cvmx_pciercx_cfg069_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg070 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg070_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_9_31:23;
 		uint32_t ce:1;
 		uint32_t cc:1;
 		uint32_t ge:1;
 		uint32_t gc:1;
 		uint32_t fep:5;
+#else
+		uint32_t fep:5;
+		uint32_t gc:1;
+		uint32_t ge:1;
+		uint32_t cc:1;
+		uint32_t ce:1;
+		uint32_t reserved_9_31:23;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg070_s cn52xx;
 	struct cvmx_pciercx_cfg070_s cn52xxp1;
@@ -1260,12 +2135,17 @@ union cvmx_pciercx_cfg070 {
 	struct cvmx_pciercx_cfg070_s cn66xx;
 	struct cvmx_pciercx_cfg070_s cn68xx;
 	struct cvmx_pciercx_cfg070_s cn68xxp1;
+	struct cvmx_pciercx_cfg070_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg071 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg071_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t dword1:32;
+#else
+		uint32_t dword1:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg071_s cn52xx;
 	struct cvmx_pciercx_cfg071_s cn52xxp1;
@@ -1277,12 +2157,17 @@ union cvmx_pciercx_cfg071 {
 	struct cvmx_pciercx_cfg071_s cn66xx;
 	struct cvmx_pciercx_cfg071_s cn68xx;
 	struct cvmx_pciercx_cfg071_s cn68xxp1;
+	struct cvmx_pciercx_cfg071_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg072 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg072_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t dword2:32;
+#else
+		uint32_t dword2:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg072_s cn52xx;
 	struct cvmx_pciercx_cfg072_s cn52xxp1;
@@ -1294,12 +2179,17 @@ union cvmx_pciercx_cfg072 {
 	struct cvmx_pciercx_cfg072_s cn66xx;
 	struct cvmx_pciercx_cfg072_s cn68xx;
 	struct cvmx_pciercx_cfg072_s cn68xxp1;
+	struct cvmx_pciercx_cfg072_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg073 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg073_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t dword3:32;
+#else
+		uint32_t dword3:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg073_s cn52xx;
 	struct cvmx_pciercx_cfg073_s cn52xxp1;
@@ -1311,12 +2201,17 @@ union cvmx_pciercx_cfg073 {
 	struct cvmx_pciercx_cfg073_s cn66xx;
 	struct cvmx_pciercx_cfg073_s cn68xx;
 	struct cvmx_pciercx_cfg073_s cn68xxp1;
+	struct cvmx_pciercx_cfg073_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg074 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg074_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t dword4:32;
+#else
 		uint32_t dword4:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg074_s cn52xx;
 	struct cvmx_pciercx_cfg074_s cn52xxp1;
@@ -1328,15 +2223,23 @@ union cvmx_pciercx_cfg074 {
 	struct cvmx_pciercx_cfg074_s cn66xx;
 	struct cvmx_pciercx_cfg074_s cn68xx;
 	struct cvmx_pciercx_cfg074_s cn68xxp1;
+	struct cvmx_pciercx_cfg074_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg075 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg075_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_3_31:29;
 		uint32_t fere:1;
 		uint32_t nfere:1;
 		uint32_t cere:1;
+#else
+		uint32_t cere:1;
+		uint32_t nfere:1;
+		uint32_t fere:1;
+		uint32_t reserved_3_31:29;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg075_s cn52xx;
 	struct cvmx_pciercx_cfg075_s cn52xxp1;
@@ -1348,11 +2251,13 @@ union cvmx_pciercx_cfg075 {
 	struct cvmx_pciercx_cfg075_s cn66xx;
 	struct cvmx_pciercx_cfg075_s cn68xx;
 	struct cvmx_pciercx_cfg075_s cn68xxp1;
+	struct cvmx_pciercx_cfg075_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg076 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg076_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t aeimn:5;
 		uint32_t reserved_7_26:20;
 		uint32_t femr:1;
@@ -1362,6 +2267,17 @@ union cvmx_pciercx_cfg076 {
 		uint32_t efnfr:1;
 		uint32_t multi_ecr:1;
 		uint32_t ecr:1;
+#else
+		uint32_t ecr:1;
+		uint32_t multi_ecr:1;
+		uint32_t efnfr:1;
+		uint32_t multi_efnfr:1;
+		uint32_t fuf:1;
+		uint32_t nfemr:1;
+		uint32_t femr:1;
+		uint32_t reserved_7_26:20;
+		uint32_t aeimn:5;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg076_s cn52xx;
 	struct cvmx_pciercx_cfg076_s cn52xxp1;
@@ -1373,13 +2289,19 @@ union cvmx_pciercx_cfg076 {
 	struct cvmx_pciercx_cfg076_s cn66xx;
 	struct cvmx_pciercx_cfg076_s cn68xx;
 	struct cvmx_pciercx_cfg076_s cn68xxp1;
+	struct cvmx_pciercx_cfg076_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg077 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg077_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t efnfsi:16;
 		uint32_t ecsi:16;
+#else
+		uint32_t ecsi:16;
+		uint32_t efnfsi:16;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg077_s cn52xx;
 	struct cvmx_pciercx_cfg077_s cn52xxp1;
@@ -1391,13 +2313,19 @@ union cvmx_pciercx_cfg077 {
 	struct cvmx_pciercx_cfg077_s cn66xx;
 	struct cvmx_pciercx_cfg077_s cn68xx;
 	struct cvmx_pciercx_cfg077_s cn68xxp1;
+	struct cvmx_pciercx_cfg077_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg448 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg448_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t rtl:16;
 		uint32_t rtltl:16;
+#else
+		uint32_t rtltl:16;
+		uint32_t rtl:16;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg448_s cn52xx;
 	struct cvmx_pciercx_cfg448_s cn52xxp1;
@@ -1409,12 +2337,17 @@ union cvmx_pciercx_cfg448 {
 	struct cvmx_pciercx_cfg448_s cn66xx;
 	struct cvmx_pciercx_cfg448_s cn68xx;
 	struct cvmx_pciercx_cfg448_s cn68xxp1;
+	struct cvmx_pciercx_cfg448_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg449 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg449_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t omr:32;
+#else
 		uint32_t omr:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg449_s cn52xx;
 	struct cvmx_pciercx_cfg449_s cn52xxp1;
@@ -1426,17 +2359,27 @@ union cvmx_pciercx_cfg449 {
 	struct cvmx_pciercx_cfg449_s cn66xx;
 	struct cvmx_pciercx_cfg449_s cn68xx;
 	struct cvmx_pciercx_cfg449_s cn68xxp1;
+	struct cvmx_pciercx_cfg449_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg450 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg450_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t lpec:8;
 		uint32_t reserved_22_23:2;
 		uint32_t link_state:6;
 		uint32_t force_link:1;
 		uint32_t reserved_8_14:7;
 		uint32_t link_num:8;
+#else
+		uint32_t link_num:8;
+		uint32_t reserved_8_14:7;
+		uint32_t force_link:1;
+		uint32_t link_state:6;
+		uint32_t reserved_22_23:2;
+		uint32_t lpec:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg450_s cn52xx;
 	struct cvmx_pciercx_cfg450_s cn52xxp1;
@@ -1448,11 +2391,13 @@ union cvmx_pciercx_cfg450 {
 	struct cvmx_pciercx_cfg450_s cn66xx;
 	struct cvmx_pciercx_cfg450_s cn68xx;
 	struct cvmx_pciercx_cfg450_s cn68xxp1;
+	struct cvmx_pciercx_cfg450_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg451 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg451_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_31_31:1;
 		uint32_t easpml1:1;
 		uint32_t l1el:3;
@@ -1460,14 +2405,32 @@ union cvmx_pciercx_cfg451 {
 		uint32_t n_fts_cc:8;
 		uint32_t n_fts:8;
 		uint32_t ack_freq:8;
+#else
+		uint32_t ack_freq:8;
+		uint32_t n_fts:8;
+		uint32_t n_fts_cc:8;
+		uint32_t l0el:3;
+		uint32_t l1el:3;
+		uint32_t easpml1:1;
+		uint32_t reserved_31_31:1;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg451_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_30_31:2;
 		uint32_t l1el:3;
 		uint32_t l0el:3;
 		uint32_t n_fts_cc:8;
 		uint32_t n_fts:8;
 		uint32_t ack_freq:8;
+#else
+		uint32_t ack_freq:8;
+		uint32_t n_fts:8;
+		uint32_t n_fts_cc:8;
+		uint32_t l0el:3;
+		uint32_t l1el:3;
+		uint32_t reserved_30_31:2;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg451_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg451_cn52xx cn56xx;
@@ -1478,11 +2441,13 @@ union cvmx_pciercx_cfg451 {
 	struct cvmx_pciercx_cfg451_s cn66xx;
 	struct cvmx_pciercx_cfg451_s cn68xx;
 	struct cvmx_pciercx_cfg451_s cn68xxp1;
+	struct cvmx_pciercx_cfg451_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg452 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg452_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_26_31:6;
 		uint32_t eccrc:1;
 		uint32_t reserved_22_24:3;
@@ -1496,12 +2461,28 @@ union cvmx_pciercx_cfg452 {
 		uint32_t le:1;
 		uint32_t sd:1;
 		uint32_t omr:1;
+#else
+		uint32_t omr:1;
+		uint32_t sd:1;
+		uint32_t le:1;
+		uint32_t ra:1;
+		uint32_t reserved_4_4:1;
+		uint32_t dllle:1;
+		uint32_t reserved_6_6:1;
+		uint32_t flm:1;
+		uint32_t reserved_8_15:8;
+		uint32_t lme:6;
+		uint32_t reserved_22_24:3;
+		uint32_t eccrc:1;
+		uint32_t reserved_26_31:6;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg452_s cn52xx;
 	struct cvmx_pciercx_cfg452_s cn52xxp1;
 	struct cvmx_pciercx_cfg452_s cn56xx;
 	struct cvmx_pciercx_cfg452_s cn56xxp1;
 	struct cvmx_pciercx_cfg452_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_22_31:10;
 		uint32_t lme:6;
 		uint32_t reserved_8_15:8;
@@ -1513,22 +2494,44 @@ union cvmx_pciercx_cfg452 {
 		uint32_t le:1;
 		uint32_t sd:1;
 		uint32_t omr:1;
+#else
+		uint32_t omr:1;
+		uint32_t sd:1;
+		uint32_t le:1;
+		uint32_t ra:1;
+		uint32_t reserved_4_4:1;
+		uint32_t dllle:1;
+		uint32_t reserved_6_6:1;
+		uint32_t flm:1;
+		uint32_t reserved_8_15:8;
+		uint32_t lme:6;
+		uint32_t reserved_22_31:10;
+#endif
 	} cn61xx;
 	struct cvmx_pciercx_cfg452_s cn63xx;
 	struct cvmx_pciercx_cfg452_s cn63xxp1;
 	struct cvmx_pciercx_cfg452_cn61xx cn66xx;
 	struct cvmx_pciercx_cfg452_cn61xx cn68xx;
 	struct cvmx_pciercx_cfg452_cn61xx cn68xxp1;
+	struct cvmx_pciercx_cfg452_cn61xx cnf71xx;
 };
 
 union cvmx_pciercx_cfg453 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg453_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t dlld:1;
 		uint32_t reserved_26_30:5;
 		uint32_t ack_nak:1;
 		uint32_t fcd:1;
 		uint32_t ilst:24;
+#else
+		uint32_t ilst:24;
+		uint32_t fcd:1;
+		uint32_t ack_nak:1;
+		uint32_t reserved_26_30:5;
+		uint32_t dlld:1;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg453_s cn52xx;
 	struct cvmx_pciercx_cfg453_s cn52xxp1;
@@ -1540,11 +2543,13 @@ union cvmx_pciercx_cfg453 {
 	struct cvmx_pciercx_cfg453_s cn66xx;
 	struct cvmx_pciercx_cfg453_s cn68xx;
 	struct cvmx_pciercx_cfg453_s cn68xxp1;
+	struct cvmx_pciercx_cfg453_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg454 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg454_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t cx_nfunc:3;
 		uint32_t tmfcwt:5;
 		uint32_t tmanlt:5;
@@ -1552,8 +2557,18 @@ union cvmx_pciercx_cfg454 {
 		uint32_t reserved_11_13:3;
 		uint32_t nskps:3;
 		uint32_t reserved_0_7:8;
+#else
+		uint32_t reserved_0_7:8;
+		uint32_t nskps:3;
+		uint32_t reserved_11_13:3;
+		uint32_t tmrt:5;
+		uint32_t tmanlt:5;
+		uint32_t tmfcwt:5;
+		uint32_t cx_nfunc:3;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg454_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_29_31:3;
 		uint32_t tmfcwt:5;
 		uint32_t tmanlt:5;
@@ -1562,28 +2577,49 @@ union cvmx_pciercx_cfg454 {
 		uint32_t nskps:3;
 		uint32_t reserved_4_7:4;
 		uint32_t ntss:4;
+#else
+		uint32_t ntss:4;
+		uint32_t reserved_4_7:4;
+		uint32_t nskps:3;
+		uint32_t reserved_11_13:3;
+		uint32_t tmrt:5;
+		uint32_t tmanlt:5;
+		uint32_t tmfcwt:5;
+		uint32_t reserved_29_31:3;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg454_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg454_cn52xx cn56xx;
 	struct cvmx_pciercx_cfg454_cn52xx cn56xxp1;
 	struct cvmx_pciercx_cfg454_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t cx_nfunc:3;
 		uint32_t tmfcwt:5;
 		uint32_t tmanlt:5;
 		uint32_t tmrt:5;
 		uint32_t reserved_8_13:6;
 		uint32_t mfuncn:8;
+#else
+		uint32_t mfuncn:8;
+		uint32_t reserved_8_13:6;
+		uint32_t tmrt:5;
+		uint32_t tmanlt:5;
+		uint32_t tmfcwt:5;
+		uint32_t cx_nfunc:3;
+#endif
 	} cn61xx;
 	struct cvmx_pciercx_cfg454_cn52xx cn63xx;
 	struct cvmx_pciercx_cfg454_cn52xx cn63xxp1;
 	struct cvmx_pciercx_cfg454_cn61xx cn66xx;
 	struct cvmx_pciercx_cfg454_cn61xx cn68xx;
 	struct cvmx_pciercx_cfg454_cn52xx cn68xxp1;
+	struct cvmx_pciercx_cfg454_cn61xx cnf71xx;
 };
 
 union cvmx_pciercx_cfg455 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg455_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t m_cfg0_filt:1;
 		uint32_t m_io_filt:1;
 		uint32_t msg_ctrl:1;
@@ -1603,6 +2639,27 @@ union cvmx_pciercx_cfg455 {
 		uint32_t dfcwt:1;
 		uint32_t reserved_11_14:4;
 		uint32_t skpiv:11;
+#else
+		uint32_t skpiv:11;
+		uint32_t reserved_11_14:4;
+		uint32_t dfcwt:1;
+		uint32_t m_fun:1;
+		uint32_t m_pois_filt:1;
+		uint32_t m_bar_match:1;
+		uint32_t m_cfg1_filt:1;
+		uint32_t m_lk_filt:1;
+		uint32_t m_cpl_tag_err:1;
+		uint32_t m_cpl_rid_err:1;
+		uint32_t m_cpl_fun_err:1;
+		uint32_t m_cpl_tc_err:1;
+		uint32_t m_cpl_attr_err:1;
+		uint32_t m_cpl_len_err:1;
+		uint32_t m_ecrc_filt:1;
+		uint32_t m_cpl_ecrc_filt:1;
+		uint32_t msg_ctrl:1;
+		uint32_t m_io_filt:1;
+		uint32_t m_cfg0_filt:1;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg455_s cn52xx;
 	struct cvmx_pciercx_cfg455_s cn52xxp1;
@@ -1614,21 +2671,36 @@ union cvmx_pciercx_cfg455 {
 	struct cvmx_pciercx_cfg455_s cn66xx;
 	struct cvmx_pciercx_cfg455_s cn68xx;
 	struct cvmx_pciercx_cfg455_s cn68xxp1;
+	struct cvmx_pciercx_cfg455_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg456 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg456_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_4_31:28;
 		uint32_t m_handle_flush:1;
 		uint32_t m_dabort_4ucpl:1;
 		uint32_t m_vend1_drp:1;
 		uint32_t m_vend0_drp:1;
+#else
+		uint32_t m_vend0_drp:1;
+		uint32_t m_vend1_drp:1;
+		uint32_t m_dabort_4ucpl:1;
+		uint32_t m_handle_flush:1;
+		uint32_t reserved_4_31:28;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg456_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_2_31:30;
 		uint32_t m_vend1_drp:1;
 		uint32_t m_vend0_drp:1;
+#else
+		uint32_t m_vend0_drp:1;
+		uint32_t m_vend1_drp:1;
+		uint32_t reserved_2_31:30;
+#endif
 	} cn52xx;
 	struct cvmx_pciercx_cfg456_cn52xx cn52xxp1;
 	struct cvmx_pciercx_cfg456_cn52xx cn56xx;
@@ -1639,12 +2711,17 @@ union cvmx_pciercx_cfg456 {
 	struct cvmx_pciercx_cfg456_s cn66xx;
 	struct cvmx_pciercx_cfg456_s cn68xx;
 	struct cvmx_pciercx_cfg456_cn52xx cn68xxp1;
+	struct cvmx_pciercx_cfg456_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg458 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg458_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t dbg_info_l32:32;
+#else
 		uint32_t dbg_info_l32:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg458_s cn52xx;
 	struct cvmx_pciercx_cfg458_s cn52xxp1;
@@ -1656,12 +2733,17 @@ union cvmx_pciercx_cfg458 {
 	struct cvmx_pciercx_cfg458_s cn66xx;
 	struct cvmx_pciercx_cfg458_s cn68xx;
 	struct cvmx_pciercx_cfg458_s cn68xxp1;
+	struct cvmx_pciercx_cfg458_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg459 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg459_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t dbg_info_u32:32;
+#else
 		uint32_t dbg_info_u32:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg459_s cn52xx;
 	struct cvmx_pciercx_cfg459_s cn52xxp1;
@@ -1673,14 +2755,21 @@ union cvmx_pciercx_cfg459 {
 	struct cvmx_pciercx_cfg459_s cn66xx;
 	struct cvmx_pciercx_cfg459_s cn68xx;
 	struct cvmx_pciercx_cfg459_s cn68xxp1;
+	struct cvmx_pciercx_cfg459_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg460 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg460_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_20_31:12;
 		uint32_t tphfcc:8;
 		uint32_t tpdfcc:12;
+#else
+		uint32_t tpdfcc:12;
+		uint32_t tphfcc:8;
+		uint32_t reserved_20_31:12;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg460_s cn52xx;
 	struct cvmx_pciercx_cfg460_s cn52xxp1;
@@ -1692,14 +2781,21 @@ union cvmx_pciercx_cfg460 {
 	struct cvmx_pciercx_cfg460_s cn66xx;
 	struct cvmx_pciercx_cfg460_s cn68xx;
 	struct cvmx_pciercx_cfg460_s cn68xxp1;
+	struct cvmx_pciercx_cfg460_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg461 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg461_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_20_31:12;
 		uint32_t tchfcc:8;
 		uint32_t tcdfcc:12;
+#else
+		uint32_t tcdfcc:12;
+		uint32_t tchfcc:8;
+		uint32_t reserved_20_31:12;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg461_s cn52xx;
 	struct cvmx_pciercx_cfg461_s cn52xxp1;
@@ -1711,14 +2807,21 @@ union cvmx_pciercx_cfg461 {
 	struct cvmx_pciercx_cfg461_s cn66xx;
 	struct cvmx_pciercx_cfg461_s cn68xx;
 	struct cvmx_pciercx_cfg461_s cn68xxp1;
+	struct cvmx_pciercx_cfg461_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg462 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg462_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_20_31:12;
 		uint32_t tchfcc:8;
 		uint32_t tcdfcc:12;
+#else
+		uint32_t tcdfcc:12;
+		uint32_t tchfcc:8;
+		uint32_t reserved_20_31:12;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg462_s cn52xx;
 	struct cvmx_pciercx_cfg462_s cn52xxp1;
@@ -1730,15 +2833,23 @@ union cvmx_pciercx_cfg462 {
 	struct cvmx_pciercx_cfg462_s cn66xx;
 	struct cvmx_pciercx_cfg462_s cn68xx;
 	struct cvmx_pciercx_cfg462_s cn68xxp1;
+	struct cvmx_pciercx_cfg462_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg463 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg463_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_3_31:29;
 		uint32_t rqne:1;
 		uint32_t trbne:1;
 		uint32_t rtlpfccnr:1;
+#else
+		uint32_t rtlpfccnr:1;
+		uint32_t trbne:1;
+		uint32_t rqne:1;
+		uint32_t reserved_3_31:29;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg463_s cn52xx;
 	struct cvmx_pciercx_cfg463_s cn52xxp1;
@@ -1750,15 +2861,23 @@ union cvmx_pciercx_cfg463 {
 	struct cvmx_pciercx_cfg463_s cn66xx;
 	struct cvmx_pciercx_cfg463_s cn68xx;
 	struct cvmx_pciercx_cfg463_s cn68xxp1;
+	struct cvmx_pciercx_cfg463_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg464 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg464_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t wrr_vc3:8;
 		uint32_t wrr_vc2:8;
 		uint32_t wrr_vc1:8;
 		uint32_t wrr_vc0:8;
+#else
+		uint32_t wrr_vc0:8;
+		uint32_t wrr_vc1:8;
+		uint32_t wrr_vc2:8;
+		uint32_t wrr_vc3:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg464_s cn52xx;
 	struct cvmx_pciercx_cfg464_s cn52xxp1;
@@ -1770,15 +2889,23 @@ union cvmx_pciercx_cfg464 {
 	struct cvmx_pciercx_cfg464_s cn66xx;
 	struct cvmx_pciercx_cfg464_s cn68xx;
 	struct cvmx_pciercx_cfg464_s cn68xxp1;
+	struct cvmx_pciercx_cfg464_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg465 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg465_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t wrr_vc7:8;
 		uint32_t wrr_vc6:8;
 		uint32_t wrr_vc5:8;
 		uint32_t wrr_vc4:8;
+#else
+		uint32_t wrr_vc4:8;
+		uint32_t wrr_vc5:8;
+		uint32_t wrr_vc6:8;
+		uint32_t wrr_vc7:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg465_s cn52xx;
 	struct cvmx_pciercx_cfg465_s cn52xxp1;
@@ -1790,11 +2917,13 @@ union cvmx_pciercx_cfg465 {
 	struct cvmx_pciercx_cfg465_s cn66xx;
 	struct cvmx_pciercx_cfg465_s cn68xx;
 	struct cvmx_pciercx_cfg465_s cn68xxp1;
+	struct cvmx_pciercx_cfg465_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg466 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg466_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t rx_queue_order:1;
 		uint32_t type_ordering:1;
 		uint32_t reserved_24_29:6;
@@ -1802,6 +2931,15 @@ union cvmx_pciercx_cfg466 {
 		uint32_t reserved_20_20:1;
 		uint32_t header_credits:8;
 		uint32_t data_credits:12;
+#else
+		uint32_t data_credits:12;
+		uint32_t header_credits:8;
+		uint32_t reserved_20_20:1;
+		uint32_t queue_mode:3;
+		uint32_t reserved_24_29:6;
+		uint32_t type_ordering:1;
+		uint32_t rx_queue_order:1;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg466_s cn52xx;
 	struct cvmx_pciercx_cfg466_s cn52xxp1;
@@ -1813,16 +2951,25 @@ union cvmx_pciercx_cfg466 {
 	struct cvmx_pciercx_cfg466_s cn66xx;
 	struct cvmx_pciercx_cfg466_s cn68xx;
 	struct cvmx_pciercx_cfg466_s cn68xxp1;
+	struct cvmx_pciercx_cfg466_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg467 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg467_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_24_31:8;
 		uint32_t queue_mode:3;
 		uint32_t reserved_20_20:1;
 		uint32_t header_credits:8;
 		uint32_t data_credits:12;
+#else
+		uint32_t data_credits:12;
+		uint32_t header_credits:8;
+		uint32_t reserved_20_20:1;
+		uint32_t queue_mode:3;
+		uint32_t reserved_24_31:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg467_s cn52xx;
 	struct cvmx_pciercx_cfg467_s cn52xxp1;
@@ -1834,16 +2981,25 @@ union cvmx_pciercx_cfg467 {
 	struct cvmx_pciercx_cfg467_s cn66xx;
 	struct cvmx_pciercx_cfg467_s cn68xx;
 	struct cvmx_pciercx_cfg467_s cn68xxp1;
+	struct cvmx_pciercx_cfg467_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg468 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg468_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_24_31:8;
 		uint32_t queue_mode:3;
 		uint32_t reserved_20_20:1;
 		uint32_t header_credits:8;
 		uint32_t data_credits:12;
+#else
+		uint32_t data_credits:12;
+		uint32_t header_credits:8;
+		uint32_t reserved_20_20:1;
+		uint32_t queue_mode:3;
+		uint32_t reserved_24_31:8;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg468_s cn52xx;
 	struct cvmx_pciercx_cfg468_s cn52xxp1;
@@ -1855,15 +3011,23 @@ union cvmx_pciercx_cfg468 {
 	struct cvmx_pciercx_cfg468_s cn66xx;
 	struct cvmx_pciercx_cfg468_s cn68xx;
 	struct cvmx_pciercx_cfg468_s cn68xxp1;
+	struct cvmx_pciercx_cfg468_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg490 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg490_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_26_31:6;
 		uint32_t header_depth:10;
 		uint32_t reserved_14_15:2;
 		uint32_t data_depth:14;
+#else
+		uint32_t data_depth:14;
+		uint32_t reserved_14_15:2;
+		uint32_t header_depth:10;
+		uint32_t reserved_26_31:6;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg490_s cn52xx;
 	struct cvmx_pciercx_cfg490_s cn52xxp1;
@@ -1875,15 +3039,23 @@ union cvmx_pciercx_cfg490 {
 	struct cvmx_pciercx_cfg490_s cn66xx;
 	struct cvmx_pciercx_cfg490_s cn68xx;
 	struct cvmx_pciercx_cfg490_s cn68xxp1;
+	struct cvmx_pciercx_cfg490_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg491 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg491_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_26_31:6;
 		uint32_t header_depth:10;
 		uint32_t reserved_14_15:2;
 		uint32_t data_depth:14;
+#else
+		uint32_t data_depth:14;
+		uint32_t reserved_14_15:2;
+		uint32_t header_depth:10;
+		uint32_t reserved_26_31:6;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg491_s cn52xx;
 	struct cvmx_pciercx_cfg491_s cn52xxp1;
@@ -1895,15 +3067,23 @@ union cvmx_pciercx_cfg491 {
 	struct cvmx_pciercx_cfg491_s cn66xx;
 	struct cvmx_pciercx_cfg491_s cn68xx;
 	struct cvmx_pciercx_cfg491_s cn68xxp1;
+	struct cvmx_pciercx_cfg491_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg492 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg492_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_26_31:6;
 		uint32_t header_depth:10;
 		uint32_t reserved_14_15:2;
 		uint32_t data_depth:14;
+#else
+		uint32_t data_depth:14;
+		uint32_t reserved_14_15:2;
+		uint32_t header_depth:10;
+		uint32_t reserved_26_31:6;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg492_s cn52xx;
 	struct cvmx_pciercx_cfg492_s cn52xxp1;
@@ -1915,11 +3095,13 @@ union cvmx_pciercx_cfg492 {
 	struct cvmx_pciercx_cfg492_s cn66xx;
 	struct cvmx_pciercx_cfg492_s cn68xx;
 	struct cvmx_pciercx_cfg492_s cn68xxp1;
+	struct cvmx_pciercx_cfg492_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg515 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg515_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint32_t reserved_21_31:11;
 		uint32_t s_d_e:1;
 		uint32_t ctcrb:1;
@@ -1927,6 +3109,15 @@ union cvmx_pciercx_cfg515 {
 		uint32_t dsc:1;
 		uint32_t le:9;
 		uint32_t n_fts:8;
+#else
+		uint32_t n_fts:8;
+		uint32_t le:9;
+		uint32_t dsc:1;
+		uint32_t cpyts:1;
+		uint32_t ctcrb:1;
+		uint32_t s_d_e:1;
+		uint32_t reserved_21_31:11;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg515_s cn61xx;
 	struct cvmx_pciercx_cfg515_s cn63xx;
@@ -1934,12 +3125,17 @@ union cvmx_pciercx_cfg515 {
 	struct cvmx_pciercx_cfg515_s cn66xx;
 	struct cvmx_pciercx_cfg515_s cn68xx;
 	struct cvmx_pciercx_cfg515_s cn68xxp1;
+	struct cvmx_pciercx_cfg515_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg516 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg516_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t phy_stat:32;
+#else
 		uint32_t phy_stat:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg516_s cn52xx;
 	struct cvmx_pciercx_cfg516_s cn52xxp1;
@@ -1951,12 +3147,17 @@ union cvmx_pciercx_cfg516 {
 	struct cvmx_pciercx_cfg516_s cn66xx;
 	struct cvmx_pciercx_cfg516_s cn68xx;
 	struct cvmx_pciercx_cfg516_s cn68xxp1;
+	struct cvmx_pciercx_cfg516_s cnf71xx;
 };
 
 union cvmx_pciercx_cfg517 {
 	uint32_t u32;
 	struct cvmx_pciercx_cfg517_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint32_t phy_ctrl:32;
+#else
 		uint32_t phy_ctrl:32;
+#endif
 	} s;
 	struct cvmx_pciercx_cfg517_s cn52xx;
 	struct cvmx_pciercx_cfg517_s cn52xxp1;
@@ -1968,6 +3169,7 @@ union cvmx_pciercx_cfg517 {
 	struct cvmx_pciercx_cfg517_s cn66xx;
 	struct cvmx_pciercx_cfg517_s cn68xx;
 	struct cvmx_pciercx_cfg517_s cn68xxp1;
+	struct cvmx_pciercx_cfg517_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h b/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h
index d45952df5f5..a5e8fd861c3 100644
--- a/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pcsx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,44 +28,316 @@
 #ifndef __CVMX_PCSX_DEFS_H__
 #define __CVMX_PCSX_DEFS_H__
 
-#define CVMX_PCSX_ANX_ADV_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001010ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_ANX_EXT_ST_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001028ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_ANX_LP_ABIL_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001018ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_ANX_RESULTS_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001020ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_INTX_EN_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001088ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_INTX_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001080ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_LINKX_TIMER_COUNT_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001040ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_LOG_ANLX_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001090ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_MISCX_CTL_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001078ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_MRX_CONTROL_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001000ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_MRX_STATUS_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001008ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_RXX_STATES_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001058ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_RXX_SYNC_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001050ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_SGMX_AN_ADV_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001068ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_SGMX_LP_ADV_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001070ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_TXX_STATES_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001060ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSX_TX_RXX_POLARITY_REG(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0001048ull + (((offset) & 3) * 1024) + (((block_id) & 1) * 0x8000000ull))
+static inline uint64_t CVMX_PCSX_ANX_ADV_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_ANX_EXT_ST_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_ANX_LP_ABIL_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_ANX_RESULTS_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_INTX_EN_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_INTX_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_LINKX_TIMER_COUNT_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_LOG_ANLX_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_MISCX_CTL_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_MRX_CONTROL_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_MRX_STATUS_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_RXX_STATES_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_RXX_SYNC_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_SGMX_AN_ADV_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_SGMX_LP_ADV_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_TXX_STATES_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
+
+static inline uint64_t CVMX_PCSX_TX_RXX_POLARITY_REG(unsigned long offset, unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x4000ull) * 1024;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024;
+}
 
 union cvmx_pcsx_anx_adv_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_anx_adv_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t np:1;
 		uint64_t reserved_14_14:1;
@@ -75,32 +347,67 @@ union cvmx_pcsx_anx_adv_reg {
 		uint64_t hfd:1;
 		uint64_t fd:1;
 		uint64_t reserved_0_4:5;
+#else
+		uint64_t reserved_0_4:5;
+		uint64_t fd:1;
+		uint64_t hfd:1;
+		uint64_t pause:2;
+		uint64_t reserved_9_11:3;
+		uint64_t rem_flt:2;
+		uint64_t reserved_14_14:1;
+		uint64_t np:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsx_anx_adv_reg_s cn52xx;
 	struct cvmx_pcsx_anx_adv_reg_s cn52xxp1;
 	struct cvmx_pcsx_anx_adv_reg_s cn56xx;
 	struct cvmx_pcsx_anx_adv_reg_s cn56xxp1;
+	struct cvmx_pcsx_anx_adv_reg_s cn61xx;
+	struct cvmx_pcsx_anx_adv_reg_s cn63xx;
+	struct cvmx_pcsx_anx_adv_reg_s cn63xxp1;
+	struct cvmx_pcsx_anx_adv_reg_s cn66xx;
+	struct cvmx_pcsx_anx_adv_reg_s cn68xx;
+	struct cvmx_pcsx_anx_adv_reg_s cn68xxp1;
+	struct cvmx_pcsx_anx_adv_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_anx_ext_st_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_anx_ext_st_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t thou_xfd:1;
 		uint64_t thou_xhd:1;
 		uint64_t thou_tfd:1;
 		uint64_t thou_thd:1;
 		uint64_t reserved_0_11:12;
+#else
+		uint64_t reserved_0_11:12;
+		uint64_t thou_thd:1;
+		uint64_t thou_tfd:1;
+		uint64_t thou_xhd:1;
+		uint64_t thou_xfd:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsx_anx_ext_st_reg_s cn52xx;
 	struct cvmx_pcsx_anx_ext_st_reg_s cn52xxp1;
 	struct cvmx_pcsx_anx_ext_st_reg_s cn56xx;
 	struct cvmx_pcsx_anx_ext_st_reg_s cn56xxp1;
+	struct cvmx_pcsx_anx_ext_st_reg_s cn61xx;
+	struct cvmx_pcsx_anx_ext_st_reg_s cn63xx;
+	struct cvmx_pcsx_anx_ext_st_reg_s cn63xxp1;
+	struct cvmx_pcsx_anx_ext_st_reg_s cn66xx;
+	struct cvmx_pcsx_anx_ext_st_reg_s cn68xx;
+	struct cvmx_pcsx_anx_ext_st_reg_s cn68xxp1;
+	struct cvmx_pcsx_anx_ext_st_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_anx_lp_abil_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_anx_lp_abil_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t np:1;
 		uint64_t ack:1;
@@ -110,33 +417,69 @@ union cvmx_pcsx_anx_lp_abil_reg {
 		uint64_t hfd:1;
 		uint64_t fd:1;
 		uint64_t reserved_0_4:5;
+#else
+		uint64_t reserved_0_4:5;
+		uint64_t fd:1;
+		uint64_t hfd:1;
+		uint64_t pause:2;
+		uint64_t reserved_9_11:3;
+		uint64_t rem_flt:2;
+		uint64_t ack:1;
+		uint64_t np:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsx_anx_lp_abil_reg_s cn52xx;
 	struct cvmx_pcsx_anx_lp_abil_reg_s cn52xxp1;
 	struct cvmx_pcsx_anx_lp_abil_reg_s cn56xx;
 	struct cvmx_pcsx_anx_lp_abil_reg_s cn56xxp1;
+	struct cvmx_pcsx_anx_lp_abil_reg_s cn61xx;
+	struct cvmx_pcsx_anx_lp_abil_reg_s cn63xx;
+	struct cvmx_pcsx_anx_lp_abil_reg_s cn63xxp1;
+	struct cvmx_pcsx_anx_lp_abil_reg_s cn66xx;
+	struct cvmx_pcsx_anx_lp_abil_reg_s cn68xx;
+	struct cvmx_pcsx_anx_lp_abil_reg_s cn68xxp1;
+	struct cvmx_pcsx_anx_lp_abil_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_anx_results_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_anx_results_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t pause:2;
 		uint64_t spd:2;
 		uint64_t an_cpt:1;
 		uint64_t dup:1;
 		uint64_t link_ok:1;
+#else
+		uint64_t link_ok:1;
+		uint64_t dup:1;
+		uint64_t an_cpt:1;
+		uint64_t spd:2;
+		uint64_t pause:2;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_pcsx_anx_results_reg_s cn52xx;
 	struct cvmx_pcsx_anx_results_reg_s cn52xxp1;
 	struct cvmx_pcsx_anx_results_reg_s cn56xx;
 	struct cvmx_pcsx_anx_results_reg_s cn56xxp1;
+	struct cvmx_pcsx_anx_results_reg_s cn61xx;
+	struct cvmx_pcsx_anx_results_reg_s cn63xx;
+	struct cvmx_pcsx_anx_results_reg_s cn63xxp1;
+	struct cvmx_pcsx_anx_results_reg_s cn66xx;
+	struct cvmx_pcsx_anx_results_reg_s cn68xx;
+	struct cvmx_pcsx_anx_results_reg_s cn68xxp1;
+	struct cvmx_pcsx_anx_results_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_intx_en_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_intx_en_reg_s {
-		uint64_t reserved_12_63:52;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_13_63:51;
+		uint64_t dbg_sync_en:1;
 		uint64_t dup:1;
 		uint64_t sync_bad_en:1;
 		uint64_t an_bad_en:1;
@@ -149,17 +492,72 @@ union cvmx_pcsx_intx_en_reg {
 		uint64_t an_err_en:1;
 		uint64_t xmit_en:1;
 		uint64_t lnkspd_en:1;
+#else
+		uint64_t lnkspd_en:1;
+		uint64_t xmit_en:1;
+		uint64_t an_err_en:1;
+		uint64_t txfifu_en:1;
+		uint64_t txfifo_en:1;
+		uint64_t txbad_en:1;
+		uint64_t rxerr_en:1;
+		uint64_t rxbad_en:1;
+		uint64_t rxlock_en:1;
+		uint64_t an_bad_en:1;
+		uint64_t sync_bad_en:1;
+		uint64_t dup:1;
+		uint64_t dbg_sync_en:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
-	struct cvmx_pcsx_intx_en_reg_s cn52xx;
-	struct cvmx_pcsx_intx_en_reg_s cn52xxp1;
-	struct cvmx_pcsx_intx_en_reg_s cn56xx;
-	struct cvmx_pcsx_intx_en_reg_s cn56xxp1;
+	struct cvmx_pcsx_intx_en_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t dup:1;
+		uint64_t sync_bad_en:1;
+		uint64_t an_bad_en:1;
+		uint64_t rxlock_en:1;
+		uint64_t rxbad_en:1;
+		uint64_t rxerr_en:1;
+		uint64_t txbad_en:1;
+		uint64_t txfifo_en:1;
+		uint64_t txfifu_en:1;
+		uint64_t an_err_en:1;
+		uint64_t xmit_en:1;
+		uint64_t lnkspd_en:1;
+#else
+		uint64_t lnkspd_en:1;
+		uint64_t xmit_en:1;
+		uint64_t an_err_en:1;
+		uint64_t txfifu_en:1;
+		uint64_t txfifo_en:1;
+		uint64_t txbad_en:1;
+		uint64_t rxerr_en:1;
+		uint64_t rxbad_en:1;
+		uint64_t rxlock_en:1;
+		uint64_t an_bad_en:1;
+		uint64_t sync_bad_en:1;
+		uint64_t dup:1;
+		uint64_t reserved_12_63:52;
+#endif
+	} cn52xx;
+	struct cvmx_pcsx_intx_en_reg_cn52xx cn52xxp1;
+	struct cvmx_pcsx_intx_en_reg_cn52xx cn56xx;
+	struct cvmx_pcsx_intx_en_reg_cn52xx cn56xxp1;
+	struct cvmx_pcsx_intx_en_reg_s cn61xx;
+	struct cvmx_pcsx_intx_en_reg_s cn63xx;
+	struct cvmx_pcsx_intx_en_reg_s cn63xxp1;
+	struct cvmx_pcsx_intx_en_reg_s cn66xx;
+	struct cvmx_pcsx_intx_en_reg_s cn68xx;
+	struct cvmx_pcsx_intx_en_reg_s cn68xxp1;
+	struct cvmx_pcsx_intx_en_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_intx_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_intx_reg_s {
-		uint64_t reserved_12_63:52;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_13_63:51;
+		uint64_t dbg_sync:1;
 		uint64_t dup:1;
 		uint64_t sync_bad:1;
 		uint64_t an_bad:1;
@@ -172,42 +570,122 @@ union cvmx_pcsx_intx_reg {
 		uint64_t an_err:1;
 		uint64_t xmit:1;
 		uint64_t lnkspd:1;
+#else
+		uint64_t lnkspd:1;
+		uint64_t xmit:1;
+		uint64_t an_err:1;
+		uint64_t txfifu:1;
+		uint64_t txfifo:1;
+		uint64_t txbad:1;
+		uint64_t rxerr:1;
+		uint64_t rxbad:1;
+		uint64_t rxlock:1;
+		uint64_t an_bad:1;
+		uint64_t sync_bad:1;
+		uint64_t dup:1;
+		uint64_t dbg_sync:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
-	struct cvmx_pcsx_intx_reg_s cn52xx;
-	struct cvmx_pcsx_intx_reg_s cn52xxp1;
-	struct cvmx_pcsx_intx_reg_s cn56xx;
-	struct cvmx_pcsx_intx_reg_s cn56xxp1;
+	struct cvmx_pcsx_intx_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t dup:1;
+		uint64_t sync_bad:1;
+		uint64_t an_bad:1;
+		uint64_t rxlock:1;
+		uint64_t rxbad:1;
+		uint64_t rxerr:1;
+		uint64_t txbad:1;
+		uint64_t txfifo:1;
+		uint64_t txfifu:1;
+		uint64_t an_err:1;
+		uint64_t xmit:1;
+		uint64_t lnkspd:1;
+#else
+		uint64_t lnkspd:1;
+		uint64_t xmit:1;
+		uint64_t an_err:1;
+		uint64_t txfifu:1;
+		uint64_t txfifo:1;
+		uint64_t txbad:1;
+		uint64_t rxerr:1;
+		uint64_t rxbad:1;
+		uint64_t rxlock:1;
+		uint64_t an_bad:1;
+		uint64_t sync_bad:1;
+		uint64_t dup:1;
+		uint64_t reserved_12_63:52;
+#endif
+	} cn52xx;
+	struct cvmx_pcsx_intx_reg_cn52xx cn52xxp1;
+	struct cvmx_pcsx_intx_reg_cn52xx cn56xx;
+	struct cvmx_pcsx_intx_reg_cn52xx cn56xxp1;
+	struct cvmx_pcsx_intx_reg_s cn61xx;
+	struct cvmx_pcsx_intx_reg_s cn63xx;
+	struct cvmx_pcsx_intx_reg_s cn63xxp1;
+	struct cvmx_pcsx_intx_reg_s cn66xx;
+	struct cvmx_pcsx_intx_reg_s cn68xx;
+	struct cvmx_pcsx_intx_reg_s cn68xxp1;
+	struct cvmx_pcsx_intx_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_linkx_timer_count_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_linkx_timer_count_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t count:16;
+#else
+		uint64_t count:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsx_linkx_timer_count_reg_s cn52xx;
 	struct cvmx_pcsx_linkx_timer_count_reg_s cn52xxp1;
 	struct cvmx_pcsx_linkx_timer_count_reg_s cn56xx;
 	struct cvmx_pcsx_linkx_timer_count_reg_s cn56xxp1;
+	struct cvmx_pcsx_linkx_timer_count_reg_s cn61xx;
+	struct cvmx_pcsx_linkx_timer_count_reg_s cn63xx;
+	struct cvmx_pcsx_linkx_timer_count_reg_s cn63xxp1;
+	struct cvmx_pcsx_linkx_timer_count_reg_s cn66xx;
+	struct cvmx_pcsx_linkx_timer_count_reg_s cn68xx;
+	struct cvmx_pcsx_linkx_timer_count_reg_s cn68xxp1;
+	struct cvmx_pcsx_linkx_timer_count_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_log_anlx_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_log_anlx_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t lafifovfl:1;
 		uint64_t la_en:1;
 		uint64_t pkt_sz:2;
+#else
+		uint64_t pkt_sz:2;
+		uint64_t la_en:1;
+		uint64_t lafifovfl:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_pcsx_log_anlx_reg_s cn52xx;
 	struct cvmx_pcsx_log_anlx_reg_s cn52xxp1;
 	struct cvmx_pcsx_log_anlx_reg_s cn56xx;
 	struct cvmx_pcsx_log_anlx_reg_s cn56xxp1;
+	struct cvmx_pcsx_log_anlx_reg_s cn61xx;
+	struct cvmx_pcsx_log_anlx_reg_s cn63xx;
+	struct cvmx_pcsx_log_anlx_reg_s cn63xxp1;
+	struct cvmx_pcsx_log_anlx_reg_s cn66xx;
+	struct cvmx_pcsx_log_anlx_reg_s cn68xx;
+	struct cvmx_pcsx_log_anlx_reg_s cn68xxp1;
+	struct cvmx_pcsx_log_anlx_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_miscx_ctl_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_miscx_ctl_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t sgmii:1;
 		uint64_t gmxeno:1;
@@ -216,16 +694,34 @@ union cvmx_pcsx_miscx_ctl_reg {
 		uint64_t mode:1;
 		uint64_t an_ovrd:1;
 		uint64_t samp_pt:7;
+#else
+		uint64_t samp_pt:7;
+		uint64_t an_ovrd:1;
+		uint64_t mode:1;
+		uint64_t mac_phy:1;
+		uint64_t loopbck2:1;
+		uint64_t gmxeno:1;
+		uint64_t sgmii:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_pcsx_miscx_ctl_reg_s cn52xx;
 	struct cvmx_pcsx_miscx_ctl_reg_s cn52xxp1;
 	struct cvmx_pcsx_miscx_ctl_reg_s cn56xx;
 	struct cvmx_pcsx_miscx_ctl_reg_s cn56xxp1;
+	struct cvmx_pcsx_miscx_ctl_reg_s cn61xx;
+	struct cvmx_pcsx_miscx_ctl_reg_s cn63xx;
+	struct cvmx_pcsx_miscx_ctl_reg_s cn63xxp1;
+	struct cvmx_pcsx_miscx_ctl_reg_s cn66xx;
+	struct cvmx_pcsx_miscx_ctl_reg_s cn68xx;
+	struct cvmx_pcsx_miscx_ctl_reg_s cn68xxp1;
+	struct cvmx_pcsx_miscx_ctl_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_mrx_control_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_mrx_control_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t reset:1;
 		uint64_t loopbck1:1;
@@ -239,16 +735,39 @@ union cvmx_pcsx_mrx_control_reg {
 		uint64_t spdmsb:1;
 		uint64_t uni:1;
 		uint64_t reserved_0_4:5;
+#else
+		uint64_t reserved_0_4:5;
+		uint64_t uni:1;
+		uint64_t spdmsb:1;
+		uint64_t coltst:1;
+		uint64_t dup:1;
+		uint64_t rst_an:1;
+		uint64_t reserved_10_10:1;
+		uint64_t pwr_dn:1;
+		uint64_t an_en:1;
+		uint64_t spdlsb:1;
+		uint64_t loopbck1:1;
+		uint64_t reset:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsx_mrx_control_reg_s cn52xx;
 	struct cvmx_pcsx_mrx_control_reg_s cn52xxp1;
 	struct cvmx_pcsx_mrx_control_reg_s cn56xx;
 	struct cvmx_pcsx_mrx_control_reg_s cn56xxp1;
+	struct cvmx_pcsx_mrx_control_reg_s cn61xx;
+	struct cvmx_pcsx_mrx_control_reg_s cn63xx;
+	struct cvmx_pcsx_mrx_control_reg_s cn63xxp1;
+	struct cvmx_pcsx_mrx_control_reg_s cn66xx;
+	struct cvmx_pcsx_mrx_control_reg_s cn68xx;
+	struct cvmx_pcsx_mrx_control_reg_s cn68xxp1;
+	struct cvmx_pcsx_mrx_control_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_mrx_status_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_mrx_status_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t hun_t4:1;
 		uint64_t hun_xfd:1;
@@ -266,16 +785,43 @@ union cvmx_pcsx_mrx_status_reg {
 		uint64_t lnk_st:1;
 		uint64_t reserved_1_1:1;
 		uint64_t extnd:1;
+#else
+		uint64_t extnd:1;
+		uint64_t reserved_1_1:1;
+		uint64_t lnk_st:1;
+		uint64_t an_abil:1;
+		uint64_t rm_flt:1;
+		uint64_t an_cpt:1;
+		uint64_t prb_sup:1;
+		uint64_t reserved_7_7:1;
+		uint64_t ext_st:1;
+		uint64_t hun_t2hd:1;
+		uint64_t hun_t2fd:1;
+		uint64_t ten_hd:1;
+		uint64_t ten_fd:1;
+		uint64_t hun_xhd:1;
+		uint64_t hun_xfd:1;
+		uint64_t hun_t4:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsx_mrx_status_reg_s cn52xx;
 	struct cvmx_pcsx_mrx_status_reg_s cn52xxp1;
 	struct cvmx_pcsx_mrx_status_reg_s cn56xx;
 	struct cvmx_pcsx_mrx_status_reg_s cn56xxp1;
+	struct cvmx_pcsx_mrx_status_reg_s cn61xx;
+	struct cvmx_pcsx_mrx_status_reg_s cn63xx;
+	struct cvmx_pcsx_mrx_status_reg_s cn63xxp1;
+	struct cvmx_pcsx_mrx_status_reg_s cn66xx;
+	struct cvmx_pcsx_mrx_status_reg_s cn68xx;
+	struct cvmx_pcsx_mrx_status_reg_s cn68xxp1;
+	struct cvmx_pcsx_mrx_status_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_rxx_states_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_rxx_states_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t rx_bad:1;
 		uint64_t rx_st:5;
@@ -283,29 +829,59 @@ union cvmx_pcsx_rxx_states_reg {
 		uint64_t sync:4;
 		uint64_t an_bad:1;
 		uint64_t an_st:4;
+#else
+		uint64_t an_st:4;
+		uint64_t an_bad:1;
+		uint64_t sync:4;
+		uint64_t sync_bad:1;
+		uint64_t rx_st:5;
+		uint64_t rx_bad:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsx_rxx_states_reg_s cn52xx;
 	struct cvmx_pcsx_rxx_states_reg_s cn52xxp1;
 	struct cvmx_pcsx_rxx_states_reg_s cn56xx;
 	struct cvmx_pcsx_rxx_states_reg_s cn56xxp1;
+	struct cvmx_pcsx_rxx_states_reg_s cn61xx;
+	struct cvmx_pcsx_rxx_states_reg_s cn63xx;
+	struct cvmx_pcsx_rxx_states_reg_s cn63xxp1;
+	struct cvmx_pcsx_rxx_states_reg_s cn66xx;
+	struct cvmx_pcsx_rxx_states_reg_s cn68xx;
+	struct cvmx_pcsx_rxx_states_reg_s cn68xxp1;
+	struct cvmx_pcsx_rxx_states_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_rxx_sync_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_rxx_sync_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t sync:1;
 		uint64_t bit_lock:1;
+#else
+		uint64_t bit_lock:1;
+		uint64_t sync:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_pcsx_rxx_sync_reg_s cn52xx;
 	struct cvmx_pcsx_rxx_sync_reg_s cn52xxp1;
 	struct cvmx_pcsx_rxx_sync_reg_s cn56xx;
 	struct cvmx_pcsx_rxx_sync_reg_s cn56xxp1;
+	struct cvmx_pcsx_rxx_sync_reg_s cn61xx;
+	struct cvmx_pcsx_rxx_sync_reg_s cn63xx;
+	struct cvmx_pcsx_rxx_sync_reg_s cn63xxp1;
+	struct cvmx_pcsx_rxx_sync_reg_s cn66xx;
+	struct cvmx_pcsx_rxx_sync_reg_s cn68xx;
+	struct cvmx_pcsx_rxx_sync_reg_s cn68xxp1;
+	struct cvmx_pcsx_rxx_sync_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_sgmx_an_adv_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_sgmx_an_adv_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t link:1;
 		uint64_t ack:1;
@@ -314,16 +890,34 @@ union cvmx_pcsx_sgmx_an_adv_reg {
 		uint64_t speed:2;
 		uint64_t reserved_1_9:9;
 		uint64_t one:1;
+#else
+		uint64_t one:1;
+		uint64_t reserved_1_9:9;
+		uint64_t speed:2;
+		uint64_t dup:1;
+		uint64_t reserved_13_13:1;
+		uint64_t ack:1;
+		uint64_t link:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsx_sgmx_an_adv_reg_s cn52xx;
 	struct cvmx_pcsx_sgmx_an_adv_reg_s cn52xxp1;
 	struct cvmx_pcsx_sgmx_an_adv_reg_s cn56xx;
 	struct cvmx_pcsx_sgmx_an_adv_reg_s cn56xxp1;
+	struct cvmx_pcsx_sgmx_an_adv_reg_s cn61xx;
+	struct cvmx_pcsx_sgmx_an_adv_reg_s cn63xx;
+	struct cvmx_pcsx_sgmx_an_adv_reg_s cn63xxp1;
+	struct cvmx_pcsx_sgmx_an_adv_reg_s cn66xx;
+	struct cvmx_pcsx_sgmx_an_adv_reg_s cn68xx;
+	struct cvmx_pcsx_sgmx_an_adv_reg_s cn68xxp1;
+	struct cvmx_pcsx_sgmx_an_adv_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_sgmx_lp_adv_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_sgmx_lp_adv_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t link:1;
 		uint64_t reserved_13_14:2;
@@ -331,40 +925,85 @@ union cvmx_pcsx_sgmx_lp_adv_reg {
 		uint64_t speed:2;
 		uint64_t reserved_1_9:9;
 		uint64_t one:1;
+#else
+		uint64_t one:1;
+		uint64_t reserved_1_9:9;
+		uint64_t speed:2;
+		uint64_t dup:1;
+		uint64_t reserved_13_14:2;
+		uint64_t link:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn52xx;
 	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn52xxp1;
 	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn56xx;
 	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn56xxp1;
+	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn61xx;
+	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn63xx;
+	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn63xxp1;
+	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn66xx;
+	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn68xx;
+	struct cvmx_pcsx_sgmx_lp_adv_reg_s cn68xxp1;
+	struct cvmx_pcsx_sgmx_lp_adv_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_txx_states_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_txx_states_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t xmit:2;
 		uint64_t tx_bad:1;
 		uint64_t ord_st:4;
+#else
+		uint64_t ord_st:4;
+		uint64_t tx_bad:1;
+		uint64_t xmit:2;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_pcsx_txx_states_reg_s cn52xx;
 	struct cvmx_pcsx_txx_states_reg_s cn52xxp1;
 	struct cvmx_pcsx_txx_states_reg_s cn56xx;
 	struct cvmx_pcsx_txx_states_reg_s cn56xxp1;
+	struct cvmx_pcsx_txx_states_reg_s cn61xx;
+	struct cvmx_pcsx_txx_states_reg_s cn63xx;
+	struct cvmx_pcsx_txx_states_reg_s cn63xxp1;
+	struct cvmx_pcsx_txx_states_reg_s cn66xx;
+	struct cvmx_pcsx_txx_states_reg_s cn68xx;
+	struct cvmx_pcsx_txx_states_reg_s cn68xxp1;
+	struct cvmx_pcsx_txx_states_reg_s cnf71xx;
 };
 
 union cvmx_pcsx_tx_rxx_polarity_reg {
 	uint64_t u64;
 	struct cvmx_pcsx_tx_rxx_polarity_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t rxovrd:1;
 		uint64_t autorxpl:1;
 		uint64_t rxplrt:1;
 		uint64_t txplrt:1;
+#else
+		uint64_t txplrt:1;
+		uint64_t rxplrt:1;
+		uint64_t autorxpl:1;
+		uint64_t rxovrd:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn52xx;
 	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn52xxp1;
 	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn56xx;
 	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn56xxp1;
+	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn61xx;
+	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn63xx;
+	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn63xxp1;
+	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn66xx;
+	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn68xx;
+	struct cvmx_pcsx_tx_rxx_polarity_reg_s cn68xxp1;
+	struct cvmx_pcsx_tx_rxx_polarity_reg_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h b/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h
index 55d120fe8ae..b5b45d26f1c 100644
--- a/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pcsxx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,40 +28,250 @@
 #ifndef __CVMX_PCSXX_DEFS_H__
 #define __CVMX_PCSXX_DEFS_H__
 
-#define CVMX_PCSXX_10GBX_STATUS_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000828ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_BIST_STATUS_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000870ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_BIT_LOCK_STATUS_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000850ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_CONTROL1_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000800ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_CONTROL2_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000818ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_INT_EN_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000860ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_INT_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000858ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_LOG_ANL_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000868ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_MISC_CTL_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000848ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_RX_SYNC_STATES_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000838ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_SPD_ABIL_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000810ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_STATUS1_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000808ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_STATUS2_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000820ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_TX_RX_POLARITY_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000840ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_PCSXX_TX_RX_STATES_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800B0000830ull + (((block_id) & 1) * 0x8000000ull))
+static inline uint64_t CVMX_PCSXX_10GBX_STATUS_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000828ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_BIST_STATUS_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000870ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_BIT_LOCK_STATUS_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000850ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000850ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000850ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000850ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_CONTROL1_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000800ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000800ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000800ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000800ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_CONTROL2_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000818ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000818ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000818ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000818ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_INT_EN_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000860ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000860ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000860ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000860ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_INT_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000858ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000858ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000858ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000858ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_LOG_ANL_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000868ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000868ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000868ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000868ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_MISC_CTL_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000848ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000848ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000848ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000848ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_RX_SYNC_STATES_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000838ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000838ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000838ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000838ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_SPD_ABIL_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000810ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000810ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000810ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000810ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_STATUS1_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000808ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000808ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000808ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000808ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_STATUS2_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000820ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000820ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000820ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000820ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_TX_RX_POLARITY_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000840ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000840ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000840ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000840ull) + (block_id) * 0x1000000ull;
+}
+
+static inline uint64_t CVMX_PCSXX_TX_RX_STATES_REG(unsigned long block_id)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000830ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000830ull) + (block_id) * 0x8000000ull;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x00011800B0000830ull) + (block_id) * 0x1000000ull;
+	}
+	return CVMX_ADD_IO_SEG(0x00011800B0000830ull) + (block_id) * 0x1000000ull;
+}
 
 union cvmx_pcsxx_10gbx_status_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_10gbx_status_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t alignd:1;
 		uint64_t pattst:1;
@@ -70,43 +280,85 @@ union cvmx_pcsxx_10gbx_status_reg {
 		uint64_t l2sync:1;
 		uint64_t l1sync:1;
 		uint64_t l0sync:1;
+#else
+		uint64_t l0sync:1;
+		uint64_t l1sync:1;
+		uint64_t l2sync:1;
+		uint64_t l3sync:1;
+		uint64_t reserved_4_10:7;
+		uint64_t pattst:1;
+		uint64_t alignd:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_pcsxx_10gbx_status_reg_s cn52xx;
 	struct cvmx_pcsxx_10gbx_status_reg_s cn52xxp1;
 	struct cvmx_pcsxx_10gbx_status_reg_s cn56xx;
 	struct cvmx_pcsxx_10gbx_status_reg_s cn56xxp1;
+	struct cvmx_pcsxx_10gbx_status_reg_s cn61xx;
+	struct cvmx_pcsxx_10gbx_status_reg_s cn63xx;
+	struct cvmx_pcsxx_10gbx_status_reg_s cn63xxp1;
+	struct cvmx_pcsxx_10gbx_status_reg_s cn66xx;
+	struct cvmx_pcsxx_10gbx_status_reg_s cn68xx;
+	struct cvmx_pcsxx_10gbx_status_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_bist_status_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_bist_status_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t bist_status:1;
+#else
+		uint64_t bist_status:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_pcsxx_bist_status_reg_s cn52xx;
 	struct cvmx_pcsxx_bist_status_reg_s cn52xxp1;
 	struct cvmx_pcsxx_bist_status_reg_s cn56xx;
 	struct cvmx_pcsxx_bist_status_reg_s cn56xxp1;
+	struct cvmx_pcsxx_bist_status_reg_s cn61xx;
+	struct cvmx_pcsxx_bist_status_reg_s cn63xx;
+	struct cvmx_pcsxx_bist_status_reg_s cn63xxp1;
+	struct cvmx_pcsxx_bist_status_reg_s cn66xx;
+	struct cvmx_pcsxx_bist_status_reg_s cn68xx;
+	struct cvmx_pcsxx_bist_status_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_bit_lock_status_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_bit_lock_status_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t bitlck3:1;
 		uint64_t bitlck2:1;
 		uint64_t bitlck1:1;
 		uint64_t bitlck0:1;
+#else
+		uint64_t bitlck0:1;
+		uint64_t bitlck1:1;
+		uint64_t bitlck2:1;
+		uint64_t bitlck3:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_pcsxx_bit_lock_status_reg_s cn52xx;
 	struct cvmx_pcsxx_bit_lock_status_reg_s cn52xxp1;
 	struct cvmx_pcsxx_bit_lock_status_reg_s cn56xx;
 	struct cvmx_pcsxx_bit_lock_status_reg_s cn56xxp1;
+	struct cvmx_pcsxx_bit_lock_status_reg_s cn61xx;
+	struct cvmx_pcsxx_bit_lock_status_reg_s cn63xx;
+	struct cvmx_pcsxx_bit_lock_status_reg_s cn63xxp1;
+	struct cvmx_pcsxx_bit_lock_status_reg_s cn66xx;
+	struct cvmx_pcsxx_bit_lock_status_reg_s cn68xx;
+	struct cvmx_pcsxx_bit_lock_status_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_control1_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_control1_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t reset:1;
 		uint64_t loopbck1:1;
@@ -117,137 +369,309 @@ union cvmx_pcsxx_control1_reg {
 		uint64_t spdsel0:1;
 		uint64_t spd:4;
 		uint64_t reserved_0_1:2;
+#else
+		uint64_t reserved_0_1:2;
+		uint64_t spd:4;
+		uint64_t spdsel0:1;
+		uint64_t reserved_7_10:4;
+		uint64_t lo_pwr:1;
+		uint64_t reserved_12_12:1;
+		uint64_t spdsel1:1;
+		uint64_t loopbck1:1;
+		uint64_t reset:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsxx_control1_reg_s cn52xx;
 	struct cvmx_pcsxx_control1_reg_s cn52xxp1;
 	struct cvmx_pcsxx_control1_reg_s cn56xx;
 	struct cvmx_pcsxx_control1_reg_s cn56xxp1;
+	struct cvmx_pcsxx_control1_reg_s cn61xx;
+	struct cvmx_pcsxx_control1_reg_s cn63xx;
+	struct cvmx_pcsxx_control1_reg_s cn63xxp1;
+	struct cvmx_pcsxx_control1_reg_s cn66xx;
+	struct cvmx_pcsxx_control1_reg_s cn68xx;
+	struct cvmx_pcsxx_control1_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_control2_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_control2_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t type:2;
+#else
+		uint64_t type:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_pcsxx_control2_reg_s cn52xx;
 	struct cvmx_pcsxx_control2_reg_s cn52xxp1;
 	struct cvmx_pcsxx_control2_reg_s cn56xx;
 	struct cvmx_pcsxx_control2_reg_s cn56xxp1;
+	struct cvmx_pcsxx_control2_reg_s cn61xx;
+	struct cvmx_pcsxx_control2_reg_s cn63xx;
+	struct cvmx_pcsxx_control2_reg_s cn63xxp1;
+	struct cvmx_pcsxx_control2_reg_s cn66xx;
+	struct cvmx_pcsxx_control2_reg_s cn68xx;
+	struct cvmx_pcsxx_control2_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_int_en_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_int_en_reg_s {
-		uint64_t reserved_6_63:58;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t dbg_sync_en:1;
 		uint64_t algnlos_en:1;
 		uint64_t synlos_en:1;
 		uint64_t bitlckls_en:1;
 		uint64_t rxsynbad_en:1;
 		uint64_t rxbad_en:1;
 		uint64_t txflt_en:1;
+#else
+		uint64_t txflt_en:1;
+		uint64_t rxbad_en:1;
+		uint64_t rxsynbad_en:1;
+		uint64_t bitlckls_en:1;
+		uint64_t synlos_en:1;
+		uint64_t algnlos_en:1;
+		uint64_t dbg_sync_en:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
-	struct cvmx_pcsxx_int_en_reg_s cn52xx;
-	struct cvmx_pcsxx_int_en_reg_s cn52xxp1;
-	struct cvmx_pcsxx_int_en_reg_s cn56xx;
-	struct cvmx_pcsxx_int_en_reg_s cn56xxp1;
+	struct cvmx_pcsxx_int_en_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_6_63:58;
+		uint64_t algnlos_en:1;
+		uint64_t synlos_en:1;
+		uint64_t bitlckls_en:1;
+		uint64_t rxsynbad_en:1;
+		uint64_t rxbad_en:1;
+		uint64_t txflt_en:1;
+#else
+		uint64_t txflt_en:1;
+		uint64_t rxbad_en:1;
+		uint64_t rxsynbad_en:1;
+		uint64_t bitlckls_en:1;
+		uint64_t synlos_en:1;
+		uint64_t algnlos_en:1;
+		uint64_t reserved_6_63:58;
+#endif
+	} cn52xx;
+	struct cvmx_pcsxx_int_en_reg_cn52xx cn52xxp1;
+	struct cvmx_pcsxx_int_en_reg_cn52xx cn56xx;
+	struct cvmx_pcsxx_int_en_reg_cn52xx cn56xxp1;
+	struct cvmx_pcsxx_int_en_reg_s cn61xx;
+	struct cvmx_pcsxx_int_en_reg_s cn63xx;
+	struct cvmx_pcsxx_int_en_reg_s cn63xxp1;
+	struct cvmx_pcsxx_int_en_reg_s cn66xx;
+	struct cvmx_pcsxx_int_en_reg_s cn68xx;
+	struct cvmx_pcsxx_int_en_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_int_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_int_reg_s {
-		uint64_t reserved_6_63:58;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t dbg_sync:1;
 		uint64_t algnlos:1;
 		uint64_t synlos:1;
 		uint64_t bitlckls:1;
 		uint64_t rxsynbad:1;
 		uint64_t rxbad:1;
 		uint64_t txflt:1;
+#else
+		uint64_t txflt:1;
+		uint64_t rxbad:1;
+		uint64_t rxsynbad:1;
+		uint64_t bitlckls:1;
+		uint64_t synlos:1;
+		uint64_t algnlos:1;
+		uint64_t dbg_sync:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
-	struct cvmx_pcsxx_int_reg_s cn52xx;
-	struct cvmx_pcsxx_int_reg_s cn52xxp1;
-	struct cvmx_pcsxx_int_reg_s cn56xx;
-	struct cvmx_pcsxx_int_reg_s cn56xxp1;
+	struct cvmx_pcsxx_int_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_6_63:58;
+		uint64_t algnlos:1;
+		uint64_t synlos:1;
+		uint64_t bitlckls:1;
+		uint64_t rxsynbad:1;
+		uint64_t rxbad:1;
+		uint64_t txflt:1;
+#else
+		uint64_t txflt:1;
+		uint64_t rxbad:1;
+		uint64_t rxsynbad:1;
+		uint64_t bitlckls:1;
+		uint64_t synlos:1;
+		uint64_t algnlos:1;
+		uint64_t reserved_6_63:58;
+#endif
+	} cn52xx;
+	struct cvmx_pcsxx_int_reg_cn52xx cn52xxp1;
+	struct cvmx_pcsxx_int_reg_cn52xx cn56xx;
+	struct cvmx_pcsxx_int_reg_cn52xx cn56xxp1;
+	struct cvmx_pcsxx_int_reg_s cn61xx;
+	struct cvmx_pcsxx_int_reg_s cn63xx;
+	struct cvmx_pcsxx_int_reg_s cn63xxp1;
+	struct cvmx_pcsxx_int_reg_s cn66xx;
+	struct cvmx_pcsxx_int_reg_s cn68xx;
+	struct cvmx_pcsxx_int_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_log_anl_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_log_anl_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t enc_mode:1;
 		uint64_t drop_ln:2;
 		uint64_t lafifovfl:1;
 		uint64_t la_en:1;
 		uint64_t pkt_sz:2;
+#else
+		uint64_t pkt_sz:2;
+		uint64_t la_en:1;
+		uint64_t lafifovfl:1;
+		uint64_t drop_ln:2;
+		uint64_t enc_mode:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_pcsxx_log_anl_reg_s cn52xx;
 	struct cvmx_pcsxx_log_anl_reg_s cn52xxp1;
 	struct cvmx_pcsxx_log_anl_reg_s cn56xx;
 	struct cvmx_pcsxx_log_anl_reg_s cn56xxp1;
+	struct cvmx_pcsxx_log_anl_reg_s cn61xx;
+	struct cvmx_pcsxx_log_anl_reg_s cn63xx;
+	struct cvmx_pcsxx_log_anl_reg_s cn63xxp1;
+	struct cvmx_pcsxx_log_anl_reg_s cn66xx;
+	struct cvmx_pcsxx_log_anl_reg_s cn68xx;
+	struct cvmx_pcsxx_log_anl_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_misc_ctl_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_misc_ctl_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t tx_swap:1;
 		uint64_t rx_swap:1;
 		uint64_t xaui:1;
 		uint64_t gmxeno:1;
+#else
+		uint64_t gmxeno:1;
+		uint64_t xaui:1;
+		uint64_t rx_swap:1;
+		uint64_t tx_swap:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_pcsxx_misc_ctl_reg_s cn52xx;
 	struct cvmx_pcsxx_misc_ctl_reg_s cn52xxp1;
 	struct cvmx_pcsxx_misc_ctl_reg_s cn56xx;
 	struct cvmx_pcsxx_misc_ctl_reg_s cn56xxp1;
+	struct cvmx_pcsxx_misc_ctl_reg_s cn61xx;
+	struct cvmx_pcsxx_misc_ctl_reg_s cn63xx;
+	struct cvmx_pcsxx_misc_ctl_reg_s cn63xxp1;
+	struct cvmx_pcsxx_misc_ctl_reg_s cn66xx;
+	struct cvmx_pcsxx_misc_ctl_reg_s cn68xx;
+	struct cvmx_pcsxx_misc_ctl_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_rx_sync_states_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_rx_sync_states_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t sync3st:4;
 		uint64_t sync2st:4;
 		uint64_t sync1st:4;
 		uint64_t sync0st:4;
+#else
+		uint64_t sync0st:4;
+		uint64_t sync1st:4;
+		uint64_t sync2st:4;
+		uint64_t sync3st:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsxx_rx_sync_states_reg_s cn52xx;
 	struct cvmx_pcsxx_rx_sync_states_reg_s cn52xxp1;
 	struct cvmx_pcsxx_rx_sync_states_reg_s cn56xx;
 	struct cvmx_pcsxx_rx_sync_states_reg_s cn56xxp1;
+	struct cvmx_pcsxx_rx_sync_states_reg_s cn61xx;
+	struct cvmx_pcsxx_rx_sync_states_reg_s cn63xx;
+	struct cvmx_pcsxx_rx_sync_states_reg_s cn63xxp1;
+	struct cvmx_pcsxx_rx_sync_states_reg_s cn66xx;
+	struct cvmx_pcsxx_rx_sync_states_reg_s cn68xx;
+	struct cvmx_pcsxx_rx_sync_states_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_spd_abil_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_spd_abil_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t tenpasst:1;
 		uint64_t tengb:1;
+#else
+		uint64_t tengb:1;
+		uint64_t tenpasst:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_pcsxx_spd_abil_reg_s cn52xx;
 	struct cvmx_pcsxx_spd_abil_reg_s cn52xxp1;
 	struct cvmx_pcsxx_spd_abil_reg_s cn56xx;
 	struct cvmx_pcsxx_spd_abil_reg_s cn56xxp1;
+	struct cvmx_pcsxx_spd_abil_reg_s cn61xx;
+	struct cvmx_pcsxx_spd_abil_reg_s cn63xx;
+	struct cvmx_pcsxx_spd_abil_reg_s cn63xxp1;
+	struct cvmx_pcsxx_spd_abil_reg_s cn66xx;
+	struct cvmx_pcsxx_spd_abil_reg_s cn68xx;
+	struct cvmx_pcsxx_spd_abil_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_status1_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_status1_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t flt:1;
 		uint64_t reserved_3_6:4;
 		uint64_t rcv_lnk:1;
 		uint64_t lpable:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t lpable:1;
+		uint64_t rcv_lnk:1;
+		uint64_t reserved_3_6:4;
+		uint64_t flt:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_pcsxx_status1_reg_s cn52xx;
 	struct cvmx_pcsxx_status1_reg_s cn52xxp1;
 	struct cvmx_pcsxx_status1_reg_s cn56xx;
 	struct cvmx_pcsxx_status1_reg_s cn56xxp1;
+	struct cvmx_pcsxx_status1_reg_s cn61xx;
+	struct cvmx_pcsxx_status1_reg_s cn63xx;
+	struct cvmx_pcsxx_status1_reg_s cn63xxp1;
+	struct cvmx_pcsxx_status1_reg_s cn66xx;
+	struct cvmx_pcsxx_status1_reg_s cn68xx;
+	struct cvmx_pcsxx_status1_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_status2_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_status2_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t dev:2;
 		uint64_t reserved_12_13:2;
@@ -257,35 +681,73 @@ union cvmx_pcsxx_status2_reg {
 		uint64_t tengb_w:1;
 		uint64_t tengb_x:1;
 		uint64_t tengb_r:1;
+#else
+		uint64_t tengb_r:1;
+		uint64_t tengb_x:1;
+		uint64_t tengb_w:1;
+		uint64_t reserved_3_9:7;
+		uint64_t rcvflt:1;
+		uint64_t xmtflt:1;
+		uint64_t reserved_12_13:2;
+		uint64_t dev:2;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pcsxx_status2_reg_s cn52xx;
 	struct cvmx_pcsxx_status2_reg_s cn52xxp1;
 	struct cvmx_pcsxx_status2_reg_s cn56xx;
 	struct cvmx_pcsxx_status2_reg_s cn56xxp1;
+	struct cvmx_pcsxx_status2_reg_s cn61xx;
+	struct cvmx_pcsxx_status2_reg_s cn63xx;
+	struct cvmx_pcsxx_status2_reg_s cn63xxp1;
+	struct cvmx_pcsxx_status2_reg_s cn66xx;
+	struct cvmx_pcsxx_status2_reg_s cn68xx;
+	struct cvmx_pcsxx_status2_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_tx_rx_polarity_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_tx_rx_polarity_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t xor_rxplrt:4;
 		uint64_t xor_txplrt:4;
 		uint64_t rxplrt:1;
 		uint64_t txplrt:1;
+#else
+		uint64_t txplrt:1;
+		uint64_t rxplrt:1;
+		uint64_t xor_txplrt:4;
+		uint64_t xor_rxplrt:4;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_pcsxx_tx_rx_polarity_reg_s cn52xx;
 	struct cvmx_pcsxx_tx_rx_polarity_reg_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t rxplrt:1;
 		uint64_t txplrt:1;
+#else
+		uint64_t txplrt:1;
+		uint64_t rxplrt:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn52xxp1;
 	struct cvmx_pcsxx_tx_rx_polarity_reg_s cn56xx;
 	struct cvmx_pcsxx_tx_rx_polarity_reg_cn52xxp1 cn56xxp1;
+	struct cvmx_pcsxx_tx_rx_polarity_reg_s cn61xx;
+	struct cvmx_pcsxx_tx_rx_polarity_reg_s cn63xx;
+	struct cvmx_pcsxx_tx_rx_polarity_reg_s cn63xxp1;
+	struct cvmx_pcsxx_tx_rx_polarity_reg_s cn66xx;
+	struct cvmx_pcsxx_tx_rx_polarity_reg_s cn68xx;
+	struct cvmx_pcsxx_tx_rx_polarity_reg_s cn68xxp1;
 };
 
 union cvmx_pcsxx_tx_rx_states_reg {
 	uint64_t u64;
 	struct cvmx_pcsxx_tx_rx_states_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t term_err:1;
 		uint64_t syn3bad:1;
@@ -296,9 +758,22 @@ union cvmx_pcsxx_tx_rx_states_reg {
 		uint64_t algn_st:3;
 		uint64_t rx_st:2;
 		uint64_t tx_st:3;
+#else
+		uint64_t tx_st:3;
+		uint64_t rx_st:2;
+		uint64_t algn_st:3;
+		uint64_t rxbad:1;
+		uint64_t syn0bad:1;
+		uint64_t syn1bad:1;
+		uint64_t syn2bad:1;
+		uint64_t syn3bad:1;
+		uint64_t term_err:1;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_pcsxx_tx_rx_states_reg_s cn52xx;
 	struct cvmx_pcsxx_tx_rx_states_reg_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t syn3bad:1;
 		uint64_t syn2bad:1;
@@ -308,9 +783,26 @@ union cvmx_pcsxx_tx_rx_states_reg {
 		uint64_t algn_st:3;
 		uint64_t rx_st:2;
 		uint64_t tx_st:3;
+#else
+		uint64_t tx_st:3;
+		uint64_t rx_st:2;
+		uint64_t algn_st:3;
+		uint64_t rxbad:1;
+		uint64_t syn0bad:1;
+		uint64_t syn1bad:1;
+		uint64_t syn2bad:1;
+		uint64_t syn3bad:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} cn52xxp1;
 	struct cvmx_pcsxx_tx_rx_states_reg_s cn56xx;
 	struct cvmx_pcsxx_tx_rx_states_reg_cn52xxp1 cn56xxp1;
+	struct cvmx_pcsxx_tx_rx_states_reg_s cn61xx;
+	struct cvmx_pcsxx_tx_rx_states_reg_s cn63xx;
+	struct cvmx_pcsxx_tx_rx_states_reg_s cn63xxp1;
+	struct cvmx_pcsxx_tx_rx_states_reg_s cn66xx;
+	struct cvmx_pcsxx_tx_rx_states_reg_s cn68xx;
+	struct cvmx_pcsxx_tx_rx_states_reg_s cn68xxp1;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-pemx-defs.h b/arch/mips/include/asm/octeon/cvmx-pemx-defs.h
index be189a2585e..50a916f892f 100644
--- a/arch/mips/include/asm/octeon/cvmx-pemx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pemx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2011 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -54,11 +54,19 @@
 union cvmx_pemx_bar1_indexx {
 	uint64_t u64;
 	struct cvmx_pemx_bar1_indexx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t addr_idx:16;
 		uint64_t ca:1;
 		uint64_t end_swp:2;
 		uint64_t addr_v:1;
+#else
+		uint64_t addr_v:1;
+		uint64_t end_swp:2;
+		uint64_t ca:1;
+		uint64_t addr_idx:16;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_pemx_bar1_indexx_s cn61xx;
 	struct cvmx_pemx_bar1_indexx_s cn63xx;
@@ -66,29 +74,45 @@ union cvmx_pemx_bar1_indexx {
 	struct cvmx_pemx_bar1_indexx_s cn66xx;
 	struct cvmx_pemx_bar1_indexx_s cn68xx;
 	struct cvmx_pemx_bar1_indexx_s cn68xxp1;
+	struct cvmx_pemx_bar1_indexx_s cnf71xx;
 };
 
 union cvmx_pemx_bar2_mask {
 	uint64_t u64;
 	struct cvmx_pemx_bar2_mask_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t mask:35;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t mask:35;
+		uint64_t reserved_38_63:26;
+#endif
 	} s;
 	struct cvmx_pemx_bar2_mask_s cn61xx;
 	struct cvmx_pemx_bar2_mask_s cn66xx;
 	struct cvmx_pemx_bar2_mask_s cn68xx;
 	struct cvmx_pemx_bar2_mask_s cn68xxp1;
+	struct cvmx_pemx_bar2_mask_s cnf71xx;
 };
 
 union cvmx_pemx_bar_ctl {
 	uint64_t u64;
 	struct cvmx_pemx_bar_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t bar1_siz:3;
 		uint64_t bar2_enb:1;
 		uint64_t bar2_esx:2;
 		uint64_t bar2_cax:1;
+#else
+		uint64_t bar2_cax:1;
+		uint64_t bar2_esx:2;
+		uint64_t bar2_enb:1;
+		uint64_t bar1_siz:3;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_pemx_bar_ctl_s cn61xx;
 	struct cvmx_pemx_bar_ctl_s cn63xx;
@@ -96,11 +120,13 @@ union cvmx_pemx_bar_ctl {
 	struct cvmx_pemx_bar_ctl_s cn66xx;
 	struct cvmx_pemx_bar_ctl_s cn68xx;
 	struct cvmx_pemx_bar_ctl_s cn68xxp1;
+	struct cvmx_pemx_bar_ctl_s cnf71xx;
 };
 
 union cvmx_pemx_bist_status {
 	uint64_t u64;
 	struct cvmx_pemx_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t retry:1;
 		uint64_t rqdata0:1;
@@ -110,6 +136,17 @@ union cvmx_pemx_bist_status {
 		uint64_t rqhdr1:1;
 		uint64_t rqhdr0:1;
 		uint64_t sot:1;
+#else
+		uint64_t sot:1;
+		uint64_t rqhdr0:1;
+		uint64_t rqhdr1:1;
+		uint64_t rqdata3:1;
+		uint64_t rqdata2:1;
+		uint64_t rqdata1:1;
+		uint64_t rqdata0:1;
+		uint64_t retry:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_pemx_bist_status_s cn61xx;
 	struct cvmx_pemx_bist_status_s cn63xx;
@@ -117,11 +154,13 @@ union cvmx_pemx_bist_status {
 	struct cvmx_pemx_bist_status_s cn66xx;
 	struct cvmx_pemx_bist_status_s cn68xx;
 	struct cvmx_pemx_bist_status_s cn68xxp1;
+	struct cvmx_pemx_bist_status_s cnf71xx;
 };
 
 union cvmx_pemx_bist_status2 {
 	uint64_t u64;
 	struct cvmx_pemx_bist_status2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t e2p_cpl:1;
 		uint64_t e2p_n:1;
@@ -133,6 +172,19 @@ union cvmx_pemx_bist_status2 {
 		uint64_t pef_tcf1:1;
 		uint64_t pef_tc0:1;
 		uint64_t ppf:1;
+#else
+		uint64_t ppf:1;
+		uint64_t pef_tc0:1;
+		uint64_t pef_tcf1:1;
+		uint64_t pef_tnf:1;
+		uint64_t pef_tpf0:1;
+		uint64_t pef_tpf1:1;
+		uint64_t peai_p2e:1;
+		uint64_t e2p_p:1;
+		uint64_t e2p_n:1;
+		uint64_t e2p_cpl:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_pemx_bist_status2_s cn61xx;
 	struct cvmx_pemx_bist_status2_s cn63xx;
@@ -140,13 +192,19 @@ union cvmx_pemx_bist_status2 {
 	struct cvmx_pemx_bist_status2_s cn66xx;
 	struct cvmx_pemx_bist_status2_s cn68xx;
 	struct cvmx_pemx_bist_status2_s cn68xxp1;
+	struct cvmx_pemx_bist_status2_s cnf71xx;
 };
 
 union cvmx_pemx_cfg_rd {
 	uint64_t u64;
 	struct cvmx_pemx_cfg_rd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:32;
 		uint64_t addr:32;
+#else
+		uint64_t addr:32;
+		uint64_t data:32;
+#endif
 	} s;
 	struct cvmx_pemx_cfg_rd_s cn61xx;
 	struct cvmx_pemx_cfg_rd_s cn63xx;
@@ -154,13 +212,19 @@ union cvmx_pemx_cfg_rd {
 	struct cvmx_pemx_cfg_rd_s cn66xx;
 	struct cvmx_pemx_cfg_rd_s cn68xx;
 	struct cvmx_pemx_cfg_rd_s cn68xxp1;
+	struct cvmx_pemx_cfg_rd_s cnf71xx;
 };
 
 union cvmx_pemx_cfg_wr {
 	uint64_t u64;
 	struct cvmx_pemx_cfg_wr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:32;
 		uint64_t addr:32;
+#else
+		uint64_t addr:32;
+		uint64_t data:32;
+#endif
 	} s;
 	struct cvmx_pemx_cfg_wr_s cn61xx;
 	struct cvmx_pemx_cfg_wr_s cn63xx;
@@ -168,13 +232,19 @@ union cvmx_pemx_cfg_wr {
 	struct cvmx_pemx_cfg_wr_s cn66xx;
 	struct cvmx_pemx_cfg_wr_s cn68xx;
 	struct cvmx_pemx_cfg_wr_s cn68xxp1;
+	struct cvmx_pemx_cfg_wr_s cnf71xx;
 };
 
 union cvmx_pemx_cpl_lut_valid {
 	uint64_t u64;
 	struct cvmx_pemx_cpl_lut_valid_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t tag:32;
+#else
+		uint64_t tag:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pemx_cpl_lut_valid_s cn61xx;
 	struct cvmx_pemx_cpl_lut_valid_s cn63xx;
@@ -182,11 +252,13 @@ union cvmx_pemx_cpl_lut_valid {
 	struct cvmx_pemx_cpl_lut_valid_s cn66xx;
 	struct cvmx_pemx_cpl_lut_valid_s cn68xx;
 	struct cvmx_pemx_cpl_lut_valid_s cn68xxp1;
+	struct cvmx_pemx_cpl_lut_valid_s cnf71xx;
 };
 
 union cvmx_pemx_ctl_status {
 	uint64_t u64;
 	struct cvmx_pemx_ctl_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t auto_sd:1;
 		uint64_t dnum:5;
@@ -205,6 +277,26 @@ union cvmx_pemx_ctl_status {
 		uint64_t fast_lm:1;
 		uint64_t inv_ecrc:1;
 		uint64_t inv_lcrc:1;
+#else
+		uint64_t inv_lcrc:1;
+		uint64_t inv_ecrc:1;
+		uint64_t fast_lm:1;
+		uint64_t ro_ctlp:1;
+		uint64_t lnk_enb:1;
+		uint64_t dly_one:1;
+		uint64_t nf_ecrc:1;
+		uint64_t reserved_7_8:2;
+		uint64_t ob_p_cmd:1;
+		uint64_t pm_xpme:1;
+		uint64_t pm_xtoff:1;
+		uint64_t reserved_12_15:4;
+		uint64_t cfg_rtry:16;
+		uint64_t reserved_32_33:2;
+		uint64_t pbus:8;
+		uint64_t dnum:5;
+		uint64_t auto_sd:1;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_pemx_ctl_status_s cn61xx;
 	struct cvmx_pemx_ctl_status_s cn63xx;
@@ -212,11 +304,13 @@ union cvmx_pemx_ctl_status {
 	struct cvmx_pemx_ctl_status_s cn66xx;
 	struct cvmx_pemx_ctl_status_s cn68xx;
 	struct cvmx_pemx_ctl_status_s cn68xxp1;
+	struct cvmx_pemx_ctl_status_s cnf71xx;
 };
 
 union cvmx_pemx_dbg_info {
 	uint64_t u64;
 	struct cvmx_pemx_dbg_info_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t ecrc_e:1;
 		uint64_t rawwpp:1;
@@ -249,6 +343,40 @@ union cvmx_pemx_dbg_info {
 		uint64_t rtlplle:1;
 		uint64_t rtlpmal:1;
 		uint64_t spoison:1;
+#else
+		uint64_t spoison:1;
+		uint64_t rtlpmal:1;
+		uint64_t rtlplle:1;
+		uint64_t recrce:1;
+		uint64_t rpoison:1;
+		uint64_t rcemrc:1;
+		uint64_t rnfemrc:1;
+		uint64_t rfemrc:1;
+		uint64_t rpmerc:1;
+		uint64_t rptamrc:1;
+		uint64_t rumep:1;
+		uint64_t rvdm:1;
+		uint64_t acto:1;
+		uint64_t rte:1;
+		uint64_t mre:1;
+		uint64_t rdwdle:1;
+		uint64_t rtwdle:1;
+		uint64_t dpeoosd:1;
+		uint64_t fcpvwt:1;
+		uint64_t rpe:1;
+		uint64_t fcuv:1;
+		uint64_t rqo:1;
+		uint64_t rauc:1;
+		uint64_t racur:1;
+		uint64_t racca:1;
+		uint64_t caar:1;
+		uint64_t rarwdns:1;
+		uint64_t ramtlp:1;
+		uint64_t racpp:1;
+		uint64_t rawwpp:1;
+		uint64_t ecrc_e:1;
+		uint64_t reserved_31_63:33;
+#endif
 	} s;
 	struct cvmx_pemx_dbg_info_s cn61xx;
 	struct cvmx_pemx_dbg_info_s cn63xx;
@@ -256,11 +384,13 @@ union cvmx_pemx_dbg_info {
 	struct cvmx_pemx_dbg_info_s cn66xx;
 	struct cvmx_pemx_dbg_info_s cn68xx;
 	struct cvmx_pemx_dbg_info_s cn68xxp1;
+	struct cvmx_pemx_dbg_info_s cnf71xx;
 };
 
 union cvmx_pemx_dbg_info_en {
 	uint64_t u64;
 	struct cvmx_pemx_dbg_info_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t ecrc_e:1;
 		uint64_t rawwpp:1;
@@ -293,6 +423,40 @@ union cvmx_pemx_dbg_info_en {
 		uint64_t rtlplle:1;
 		uint64_t rtlpmal:1;
 		uint64_t spoison:1;
+#else
+		uint64_t spoison:1;
+		uint64_t rtlpmal:1;
+		uint64_t rtlplle:1;
+		uint64_t recrce:1;
+		uint64_t rpoison:1;
+		uint64_t rcemrc:1;
+		uint64_t rnfemrc:1;
+		uint64_t rfemrc:1;
+		uint64_t rpmerc:1;
+		uint64_t rptamrc:1;
+		uint64_t rumep:1;
+		uint64_t rvdm:1;
+		uint64_t acto:1;
+		uint64_t rte:1;
+		uint64_t mre:1;
+		uint64_t rdwdle:1;
+		uint64_t rtwdle:1;
+		uint64_t dpeoosd:1;
+		uint64_t fcpvwt:1;
+		uint64_t rpe:1;
+		uint64_t fcuv:1;
+		uint64_t rqo:1;
+		uint64_t rauc:1;
+		uint64_t racur:1;
+		uint64_t racca:1;
+		uint64_t caar:1;
+		uint64_t rarwdns:1;
+		uint64_t ramtlp:1;
+		uint64_t racpp:1;
+		uint64_t rawwpp:1;
+		uint64_t ecrc_e:1;
+		uint64_t reserved_31_63:33;
+#endif
 	} s;
 	struct cvmx_pemx_dbg_info_en_s cn61xx;
 	struct cvmx_pemx_dbg_info_en_s cn63xx;
@@ -300,16 +464,25 @@ union cvmx_pemx_dbg_info_en {
 	struct cvmx_pemx_dbg_info_en_s cn66xx;
 	struct cvmx_pemx_dbg_info_en_s cn68xx;
 	struct cvmx_pemx_dbg_info_en_s cn68xxp1;
+	struct cvmx_pemx_dbg_info_en_s cnf71xx;
 };
 
 union cvmx_pemx_diag_status {
 	uint64_t u64;
 	struct cvmx_pemx_diag_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t pm_dst:1;
 		uint64_t pm_stat:1;
 		uint64_t pm_en:1;
 		uint64_t aux_en:1;
+#else
+		uint64_t aux_en:1;
+		uint64_t pm_en:1;
+		uint64_t pm_stat:1;
+		uint64_t pm_dst:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_pemx_diag_status_s cn61xx;
 	struct cvmx_pemx_diag_status_s cn63xx;
@@ -317,22 +490,30 @@ union cvmx_pemx_diag_status {
 	struct cvmx_pemx_diag_status_s cn66xx;
 	struct cvmx_pemx_diag_status_s cn68xx;
 	struct cvmx_pemx_diag_status_s cn68xxp1;
+	struct cvmx_pemx_diag_status_s cnf71xx;
 };
 
 union cvmx_pemx_inb_read_credits {
 	uint64_t u64;
 	struct cvmx_pemx_inb_read_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t num:6;
+#else
+		uint64_t num:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_pemx_inb_read_credits_s cn61xx;
 	struct cvmx_pemx_inb_read_credits_s cn66xx;
 	struct cvmx_pemx_inb_read_credits_s cn68xx;
+	struct cvmx_pemx_inb_read_credits_s cnf71xx;
 };
 
 union cvmx_pemx_int_enb {
 	uint64_t u64;
 	struct cvmx_pemx_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t crs_dr:1;
 		uint64_t crs_er:1;
@@ -348,6 +529,23 @@ union cvmx_pemx_int_enb {
 		uint64_t pmei:1;
 		uint64_t se:1;
 		uint64_t aeri:1;
+#else
+		uint64_t aeri:1;
+		uint64_t se:1;
+		uint64_t pmei:1;
+		uint64_t pmem:1;
+		uint64_t up_b1:1;
+		uint64_t up_b2:1;
+		uint64_t up_bx:1;
+		uint64_t un_b1:1;
+		uint64_t un_b2:1;
+		uint64_t un_bx:1;
+		uint64_t exc:1;
+		uint64_t rdlk:1;
+		uint64_t crs_er:1;
+		uint64_t crs_dr:1;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_pemx_int_enb_s cn61xx;
 	struct cvmx_pemx_int_enb_s cn63xx;
@@ -355,11 +553,13 @@ union cvmx_pemx_int_enb {
 	struct cvmx_pemx_int_enb_s cn66xx;
 	struct cvmx_pemx_int_enb_s cn68xx;
 	struct cvmx_pemx_int_enb_s cn68xxp1;
+	struct cvmx_pemx_int_enb_s cnf71xx;
 };
 
 union cvmx_pemx_int_enb_int {
 	uint64_t u64;
 	struct cvmx_pemx_int_enb_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t crs_dr:1;
 		uint64_t crs_er:1;
@@ -375,6 +575,23 @@ union cvmx_pemx_int_enb_int {
 		uint64_t pmei:1;
 		uint64_t se:1;
 		uint64_t aeri:1;
+#else
+		uint64_t aeri:1;
+		uint64_t se:1;
+		uint64_t pmei:1;
+		uint64_t pmem:1;
+		uint64_t up_b1:1;
+		uint64_t up_b2:1;
+		uint64_t up_bx:1;
+		uint64_t un_b1:1;
+		uint64_t un_b2:1;
+		uint64_t un_bx:1;
+		uint64_t exc:1;
+		uint64_t rdlk:1;
+		uint64_t crs_er:1;
+		uint64_t crs_dr:1;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_pemx_int_enb_int_s cn61xx;
 	struct cvmx_pemx_int_enb_int_s cn63xx;
@@ -382,11 +599,13 @@ union cvmx_pemx_int_enb_int {
 	struct cvmx_pemx_int_enb_int_s cn66xx;
 	struct cvmx_pemx_int_enb_int_s cn68xx;
 	struct cvmx_pemx_int_enb_int_s cn68xxp1;
+	struct cvmx_pemx_int_enb_int_s cnf71xx;
 };
 
 union cvmx_pemx_int_sum {
 	uint64_t u64;
 	struct cvmx_pemx_int_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t crs_dr:1;
 		uint64_t crs_er:1;
@@ -402,6 +621,23 @@ union cvmx_pemx_int_sum {
 		uint64_t pmei:1;
 		uint64_t se:1;
 		uint64_t aeri:1;
+#else
+		uint64_t aeri:1;
+		uint64_t se:1;
+		uint64_t pmei:1;
+		uint64_t pmem:1;
+		uint64_t up_b1:1;
+		uint64_t up_b2:1;
+		uint64_t up_bx:1;
+		uint64_t un_b1:1;
+		uint64_t un_b2:1;
+		uint64_t un_bx:1;
+		uint64_t exc:1;
+		uint64_t rdlk:1;
+		uint64_t crs_er:1;
+		uint64_t crs_dr:1;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_pemx_int_sum_s cn61xx;
 	struct cvmx_pemx_int_sum_s cn63xx;
@@ -409,13 +645,19 @@ union cvmx_pemx_int_sum {
 	struct cvmx_pemx_int_sum_s cn66xx;
 	struct cvmx_pemx_int_sum_s cn68xx;
 	struct cvmx_pemx_int_sum_s cn68xxp1;
+	struct cvmx_pemx_int_sum_s cnf71xx;
 };
 
 union cvmx_pemx_p2n_bar0_start {
 	uint64_t u64;
 	struct cvmx_pemx_p2n_bar0_start_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:50;
 		uint64_t reserved_0_13:14;
+#else
+		uint64_t reserved_0_13:14;
+		uint64_t addr:50;
+#endif
 	} s;
 	struct cvmx_pemx_p2n_bar0_start_s cn61xx;
 	struct cvmx_pemx_p2n_bar0_start_s cn63xx;
@@ -423,13 +665,19 @@ union cvmx_pemx_p2n_bar0_start {
 	struct cvmx_pemx_p2n_bar0_start_s cn66xx;
 	struct cvmx_pemx_p2n_bar0_start_s cn68xx;
 	struct cvmx_pemx_p2n_bar0_start_s cn68xxp1;
+	struct cvmx_pemx_p2n_bar0_start_s cnf71xx;
 };
 
 union cvmx_pemx_p2n_bar1_start {
 	uint64_t u64;
 	struct cvmx_pemx_p2n_bar1_start_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:38;
 		uint64_t reserved_0_25:26;
+#else
+		uint64_t reserved_0_25:26;
+		uint64_t addr:38;
+#endif
 	} s;
 	struct cvmx_pemx_p2n_bar1_start_s cn61xx;
 	struct cvmx_pemx_p2n_bar1_start_s cn63xx;
@@ -437,13 +685,19 @@ union cvmx_pemx_p2n_bar1_start {
 	struct cvmx_pemx_p2n_bar1_start_s cn66xx;
 	struct cvmx_pemx_p2n_bar1_start_s cn68xx;
 	struct cvmx_pemx_p2n_bar1_start_s cn68xxp1;
+	struct cvmx_pemx_p2n_bar1_start_s cnf71xx;
 };
 
 union cvmx_pemx_p2n_bar2_start {
 	uint64_t u64;
 	struct cvmx_pemx_p2n_bar2_start_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:23;
 		uint64_t reserved_0_40:41;
+#else
+		uint64_t reserved_0_40:41;
+		uint64_t addr:23;
+#endif
 	} s;
 	struct cvmx_pemx_p2n_bar2_start_s cn61xx;
 	struct cvmx_pemx_p2n_bar2_start_s cn63xx;
@@ -451,13 +705,19 @@ union cvmx_pemx_p2n_bar2_start {
 	struct cvmx_pemx_p2n_bar2_start_s cn66xx;
 	struct cvmx_pemx_p2n_bar2_start_s cn68xx;
 	struct cvmx_pemx_p2n_bar2_start_s cn68xxp1;
+	struct cvmx_pemx_p2n_bar2_start_s cnf71xx;
 };
 
 union cvmx_pemx_p2p_barx_end {
 	uint64_t u64;
 	struct cvmx_pemx_p2p_barx_end_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:52;
 		uint64_t reserved_0_11:12;
+#else
+		uint64_t reserved_0_11:12;
+		uint64_t addr:52;
+#endif
 	} s;
 	struct cvmx_pemx_p2p_barx_end_s cn63xx;
 	struct cvmx_pemx_p2p_barx_end_s cn63xxp1;
@@ -469,8 +729,13 @@ union cvmx_pemx_p2p_barx_end {
 union cvmx_pemx_p2p_barx_start {
 	uint64_t u64;
 	struct cvmx_pemx_p2p_barx_start_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:52;
 		uint64_t reserved_0_11:12;
+#else
+		uint64_t reserved_0_11:12;
+		uint64_t addr:52;
+#endif
 	} s;
 	struct cvmx_pemx_p2p_barx_start_s cn63xx;
 	struct cvmx_pemx_p2p_barx_start_s cn63xxp1;
@@ -482,6 +747,7 @@ union cvmx_pemx_p2p_barx_start {
 union cvmx_pemx_tlp_credits {
 	uint64_t u64;
 	struct cvmx_pemx_tlp_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t peai_ppf:8;
 		uint64_t pem_cpl:8;
@@ -490,20 +756,40 @@ union cvmx_pemx_tlp_credits {
 		uint64_t sli_cpl:8;
 		uint64_t sli_np:8;
 		uint64_t sli_p:8;
+#else
+		uint64_t sli_p:8;
+		uint64_t sli_np:8;
+		uint64_t sli_cpl:8;
+		uint64_t pem_p:8;
+		uint64_t pem_np:8;
+		uint64_t pem_cpl:8;
+		uint64_t peai_ppf:8;
+		uint64_t reserved_56_63:8;
+#endif
 	} s;
 	struct cvmx_pemx_tlp_credits_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t peai_ppf:8;
 		uint64_t reserved_24_47:24;
 		uint64_t sli_cpl:8;
 		uint64_t sli_np:8;
 		uint64_t sli_p:8;
+#else
+		uint64_t sli_p:8;
+		uint64_t sli_np:8;
+		uint64_t sli_cpl:8;
+		uint64_t reserved_24_47:24;
+		uint64_t peai_ppf:8;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn61xx;
 	struct cvmx_pemx_tlp_credits_s cn63xx;
 	struct cvmx_pemx_tlp_credits_s cn63xxp1;
 	struct cvmx_pemx_tlp_credits_s cn66xx;
 	struct cvmx_pemx_tlp_credits_s cn68xx;
 	struct cvmx_pemx_tlp_credits_s cn68xxp1;
+	struct cvmx_pemx_tlp_credits_cn61xx cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-pescx-defs.h b/arch/mips/include/asm/octeon/cvmx-pescx-defs.h
index aef84851a94..59b3dc56544 100644
--- a/arch/mips/include/asm/octeon/cvmx-pescx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pescx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -48,6 +48,7 @@
 union cvmx_pescx_bist_status {
 	uint64_t u64;
 	struct cvmx_pescx_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t rqdata5:1;
 		uint64_t ctlp_or:1;
@@ -62,9 +63,26 @@ union cvmx_pescx_bist_status {
 		uint64_t rqhdr1:1;
 		uint64_t rqhdr0:1;
 		uint64_t sot:1;
+#else
+		uint64_t sot:1;
+		uint64_t rqhdr0:1;
+		uint64_t rqhdr1:1;
+		uint64_t rqdata4:1;
+		uint64_t rqdata3:1;
+		uint64_t rqdata2:1;
+		uint64_t rqdata1:1;
+		uint64_t rqdata0:1;
+		uint64_t retry:1;
+		uint64_t ptlp_or:1;
+		uint64_t ntlp_or:1;
+		uint64_t ctlp_or:1;
+		uint64_t rqdata5:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_pescx_bist_status_s cn52xx;
 	struct cvmx_pescx_bist_status_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t ctlp_or:1;
 		uint64_t ntlp_or:1;
@@ -78,6 +96,21 @@ union cvmx_pescx_bist_status {
 		uint64_t rqhdr1:1;
 		uint64_t rqhdr0:1;
 		uint64_t sot:1;
+#else
+		uint64_t sot:1;
+		uint64_t rqhdr0:1;
+		uint64_t rqhdr1:1;
+		uint64_t rqdata4:1;
+		uint64_t rqdata3:1;
+		uint64_t rqdata2:1;
+		uint64_t rqdata1:1;
+		uint64_t rqdata0:1;
+		uint64_t retry:1;
+		uint64_t ptlp_or:1;
+		uint64_t ntlp_or:1;
+		uint64_t ctlp_or:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn52xxp1;
 	struct cvmx_pescx_bist_status_s cn56xx;
 	struct cvmx_pescx_bist_status_cn52xxp1 cn56xxp1;
@@ -86,6 +119,7 @@ union cvmx_pescx_bist_status {
 union cvmx_pescx_bist_status2 {
 	uint64_t u64;
 	struct cvmx_pescx_bist_status2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t cto_p2e:1;
 		uint64_t e2p_cpl:1;
@@ -101,6 +135,23 @@ union cvmx_pescx_bist_status2 {
 		uint64_t pef_tcf1:1;
 		uint64_t pef_tc0:1;
 		uint64_t ppf:1;
+#else
+		uint64_t ppf:1;
+		uint64_t pef_tc0:1;
+		uint64_t pef_tcf1:1;
+		uint64_t pef_tnf:1;
+		uint64_t pef_tpf0:1;
+		uint64_t pef_tpf1:1;
+		uint64_t rsl_p2e:1;
+		uint64_t peai_p2e:1;
+		uint64_t dbg_p2e:1;
+		uint64_t e2p_rsl:1;
+		uint64_t e2p_p:1;
+		uint64_t e2p_n:1;
+		uint64_t e2p_cpl:1;
+		uint64_t cto_p2e:1;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_pescx_bist_status2_s cn52xx;
 	struct cvmx_pescx_bist_status2_s cn52xxp1;
@@ -111,8 +162,13 @@ union cvmx_pescx_bist_status2 {
 union cvmx_pescx_cfg_rd {
 	uint64_t u64;
 	struct cvmx_pescx_cfg_rd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:32;
 		uint64_t addr:32;
+#else
+		uint64_t addr:32;
+		uint64_t data:32;
+#endif
 	} s;
 	struct cvmx_pescx_cfg_rd_s cn52xx;
 	struct cvmx_pescx_cfg_rd_s cn52xxp1;
@@ -123,8 +179,13 @@ union cvmx_pescx_cfg_rd {
 union cvmx_pescx_cfg_wr {
 	uint64_t u64;
 	struct cvmx_pescx_cfg_wr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:32;
 		uint64_t addr:32;
+#else
+		uint64_t addr:32;
+		uint64_t data:32;
+#endif
 	} s;
 	struct cvmx_pescx_cfg_wr_s cn52xx;
 	struct cvmx_pescx_cfg_wr_s cn52xxp1;
@@ -135,8 +196,13 @@ union cvmx_pescx_cfg_wr {
 union cvmx_pescx_cpl_lut_valid {
 	uint64_t u64;
 	struct cvmx_pescx_cpl_lut_valid_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t tag:32;
+#else
+		uint64_t tag:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pescx_cpl_lut_valid_s cn52xx;
 	struct cvmx_pescx_cpl_lut_valid_s cn52xxp1;
@@ -147,6 +213,7 @@ union cvmx_pescx_cpl_lut_valid {
 union cvmx_pescx_ctl_status {
 	uint64_t u64;
 	struct cvmx_pescx_ctl_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t dnum:5;
 		uint64_t pbus:8;
@@ -163,10 +230,29 @@ union cvmx_pescx_ctl_status {
 		uint64_t reserved_2_2:1;
 		uint64_t inv_ecrc:1;
 		uint64_t inv_lcrc:1;
+#else
+		uint64_t inv_lcrc:1;
+		uint64_t inv_ecrc:1;
+		uint64_t reserved_2_2:1;
+		uint64_t ro_ctlp:1;
+		uint64_t lnk_enb:1;
+		uint64_t dly_one:1;
+		uint64_t nf_ecrc:1;
+		uint64_t reserved_7_8:2;
+		uint64_t ob_p_cmd:1;
+		uint64_t pm_xpme:1;
+		uint64_t pm_xtoff:1;
+		uint64_t lane_swp:1;
+		uint64_t qlm_cfg:2;
+		uint64_t pbus:8;
+		uint64_t dnum:5;
+		uint64_t reserved_28_63:36;
+#endif
 	} s;
 	struct cvmx_pescx_ctl_status_s cn52xx;
 	struct cvmx_pescx_ctl_status_s cn52xxp1;
 	struct cvmx_pescx_ctl_status_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t dnum:5;
 		uint64_t pbus:8;
@@ -183,6 +269,24 @@ union cvmx_pescx_ctl_status {
 		uint64_t reserved_2_2:1;
 		uint64_t inv_ecrc:1;
 		uint64_t inv_lcrc:1;
+#else
+		uint64_t inv_lcrc:1;
+		uint64_t inv_ecrc:1;
+		uint64_t reserved_2_2:1;
+		uint64_t ro_ctlp:1;
+		uint64_t lnk_enb:1;
+		uint64_t dly_one:1;
+		uint64_t nf_ecrc:1;
+		uint64_t reserved_7_8:2;
+		uint64_t ob_p_cmd:1;
+		uint64_t pm_xpme:1;
+		uint64_t pm_xtoff:1;
+		uint64_t reserved_12_12:1;
+		uint64_t qlm_cfg:2;
+		uint64_t pbus:8;
+		uint64_t dnum:5;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn56xx;
 	struct cvmx_pescx_ctl_status_cn56xx cn56xxp1;
 };
@@ -190,14 +294,25 @@ union cvmx_pescx_ctl_status {
 union cvmx_pescx_ctl_status2 {
 	uint64_t u64;
 	struct cvmx_pescx_ctl_status2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t pclk_run:1;
 		uint64_t pcierst:1;
+#else
+		uint64_t pcierst:1;
+		uint64_t pclk_run:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_pescx_ctl_status2_s cn52xx;
 	struct cvmx_pescx_ctl_status2_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t pcierst:1;
+#else
+		uint64_t pcierst:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} cn52xxp1;
 	struct cvmx_pescx_ctl_status2_s cn56xx;
 	struct cvmx_pescx_ctl_status2_cn52xxp1 cn56xxp1;
@@ -206,6 +321,7 @@ union cvmx_pescx_ctl_status2 {
 union cvmx_pescx_dbg_info {
 	uint64_t u64;
 	struct cvmx_pescx_dbg_info_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t ecrc_e:1;
 		uint64_t rawwpp:1;
@@ -238,6 +354,40 @@ union cvmx_pescx_dbg_info {
 		uint64_t rtlplle:1;
 		uint64_t rtlpmal:1;
 		uint64_t spoison:1;
+#else
+		uint64_t spoison:1;
+		uint64_t rtlpmal:1;
+		uint64_t rtlplle:1;
+		uint64_t recrce:1;
+		uint64_t rpoison:1;
+		uint64_t rcemrc:1;
+		uint64_t rnfemrc:1;
+		uint64_t rfemrc:1;
+		uint64_t rpmerc:1;
+		uint64_t rptamrc:1;
+		uint64_t rumep:1;
+		uint64_t rvdm:1;
+		uint64_t acto:1;
+		uint64_t rte:1;
+		uint64_t mre:1;
+		uint64_t rdwdle:1;
+		uint64_t rtwdle:1;
+		uint64_t dpeoosd:1;
+		uint64_t fcpvwt:1;
+		uint64_t rpe:1;
+		uint64_t fcuv:1;
+		uint64_t rqo:1;
+		uint64_t rauc:1;
+		uint64_t racur:1;
+		uint64_t racca:1;
+		uint64_t caar:1;
+		uint64_t rarwdns:1;
+		uint64_t ramtlp:1;
+		uint64_t racpp:1;
+		uint64_t rawwpp:1;
+		uint64_t ecrc_e:1;
+		uint64_t reserved_31_63:33;
+#endif
 	} s;
 	struct cvmx_pescx_dbg_info_s cn52xx;
 	struct cvmx_pescx_dbg_info_s cn52xxp1;
@@ -248,6 +398,7 @@ union cvmx_pescx_dbg_info {
 union cvmx_pescx_dbg_info_en {
 	uint64_t u64;
 	struct cvmx_pescx_dbg_info_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t ecrc_e:1;
 		uint64_t rawwpp:1;
@@ -280,6 +431,40 @@ union cvmx_pescx_dbg_info_en {
 		uint64_t rtlplle:1;
 		uint64_t rtlpmal:1;
 		uint64_t spoison:1;
+#else
+		uint64_t spoison:1;
+		uint64_t rtlpmal:1;
+		uint64_t rtlplle:1;
+		uint64_t recrce:1;
+		uint64_t rpoison:1;
+		uint64_t rcemrc:1;
+		uint64_t rnfemrc:1;
+		uint64_t rfemrc:1;
+		uint64_t rpmerc:1;
+		uint64_t rptamrc:1;
+		uint64_t rumep:1;
+		uint64_t rvdm:1;
+		uint64_t acto:1;
+		uint64_t rte:1;
+		uint64_t mre:1;
+		uint64_t rdwdle:1;
+		uint64_t rtwdle:1;
+		uint64_t dpeoosd:1;
+		uint64_t fcpvwt:1;
+		uint64_t rpe:1;
+		uint64_t fcuv:1;
+		uint64_t rqo:1;
+		uint64_t rauc:1;
+		uint64_t racur:1;
+		uint64_t racca:1;
+		uint64_t caar:1;
+		uint64_t rarwdns:1;
+		uint64_t ramtlp:1;
+		uint64_t racpp:1;
+		uint64_t rawwpp:1;
+		uint64_t ecrc_e:1;
+		uint64_t reserved_31_63:33;
+#endif
 	} s;
 	struct cvmx_pescx_dbg_info_en_s cn52xx;
 	struct cvmx_pescx_dbg_info_en_s cn52xxp1;
@@ -290,11 +475,19 @@ union cvmx_pescx_dbg_info_en {
 union cvmx_pescx_diag_status {
 	uint64_t u64;
 	struct cvmx_pescx_diag_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t pm_dst:1;
 		uint64_t pm_stat:1;
 		uint64_t pm_en:1;
 		uint64_t aux_en:1;
+#else
+		uint64_t aux_en:1;
+		uint64_t pm_en:1;
+		uint64_t pm_stat:1;
+		uint64_t pm_dst:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_pescx_diag_status_s cn52xx;
 	struct cvmx_pescx_diag_status_s cn52xxp1;
@@ -305,8 +498,13 @@ union cvmx_pescx_diag_status {
 union cvmx_pescx_p2n_bar0_start {
 	uint64_t u64;
 	struct cvmx_pescx_p2n_bar0_start_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:50;
 		uint64_t reserved_0_13:14;
+#else
+		uint64_t reserved_0_13:14;
+		uint64_t addr:50;
+#endif
 	} s;
 	struct cvmx_pescx_p2n_bar0_start_s cn52xx;
 	struct cvmx_pescx_p2n_bar0_start_s cn52xxp1;
@@ -317,8 +515,13 @@ union cvmx_pescx_p2n_bar0_start {
 union cvmx_pescx_p2n_bar1_start {
 	uint64_t u64;
 	struct cvmx_pescx_p2n_bar1_start_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:38;
 		uint64_t reserved_0_25:26;
+#else
+		uint64_t reserved_0_25:26;
+		uint64_t addr:38;
+#endif
 	} s;
 	struct cvmx_pescx_p2n_bar1_start_s cn52xx;
 	struct cvmx_pescx_p2n_bar1_start_s cn52xxp1;
@@ -329,8 +532,13 @@ union cvmx_pescx_p2n_bar1_start {
 union cvmx_pescx_p2n_bar2_start {
 	uint64_t u64;
 	struct cvmx_pescx_p2n_bar2_start_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:25;
 		uint64_t reserved_0_38:39;
+#else
+		uint64_t reserved_0_38:39;
+		uint64_t addr:25;
+#endif
 	} s;
 	struct cvmx_pescx_p2n_bar2_start_s cn52xx;
 	struct cvmx_pescx_p2n_bar2_start_s cn52xxp1;
@@ -341,8 +549,13 @@ union cvmx_pescx_p2n_bar2_start {
 union cvmx_pescx_p2p_barx_end {
 	uint64_t u64;
 	struct cvmx_pescx_p2p_barx_end_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:52;
 		uint64_t reserved_0_11:12;
+#else
+		uint64_t reserved_0_11:12;
+		uint64_t addr:52;
+#endif
 	} s;
 	struct cvmx_pescx_p2p_barx_end_s cn52xx;
 	struct cvmx_pescx_p2p_barx_end_s cn52xxp1;
@@ -353,8 +566,13 @@ union cvmx_pescx_p2p_barx_end {
 union cvmx_pescx_p2p_barx_start {
 	uint64_t u64;
 	struct cvmx_pescx_p2p_barx_start_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:52;
 		uint64_t reserved_0_11:12;
+#else
+		uint64_t reserved_0_11:12;
+		uint64_t addr:52;
+#endif
 	} s;
 	struct cvmx_pescx_p2p_barx_start_s cn52xx;
 	struct cvmx_pescx_p2p_barx_start_s cn52xxp1;
@@ -365,9 +583,14 @@ union cvmx_pescx_p2p_barx_start {
 union cvmx_pescx_tlp_credits {
 	uint64_t u64;
 	struct cvmx_pescx_tlp_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
 		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pescx_tlp_credits_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t peai_ppf:8;
 		uint64_t pesc_cpl:8;
@@ -376,8 +599,19 @@ union cvmx_pescx_tlp_credits {
 		uint64_t npei_cpl:8;
 		uint64_t npei_np:8;
 		uint64_t npei_p:8;
+#else
+		uint64_t npei_p:8;
+		uint64_t npei_np:8;
+		uint64_t npei_cpl:8;
+		uint64_t pesc_p:8;
+		uint64_t pesc_np:8;
+		uint64_t pesc_cpl:8;
+		uint64_t peai_ppf:8;
+		uint64_t reserved_56_63:8;
+#endif
 	} cn52xx;
 	struct cvmx_pescx_tlp_credits_cn52xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_38_63:26;
 		uint64_t peai_ppf:8;
 		uint64_t pesc_cpl:5;
@@ -386,6 +620,16 @@ union cvmx_pescx_tlp_credits {
 		uint64_t npei_cpl:5;
 		uint64_t npei_np:5;
 		uint64_t npei_p:5;
+#else
+		uint64_t npei_p:5;
+		uint64_t npei_np:5;
+		uint64_t npei_cpl:5;
+		uint64_t pesc_p:5;
+		uint64_t pesc_np:5;
+		uint64_t pesc_cpl:5;
+		uint64_t peai_ppf:8;
+		uint64_t reserved_38_63:26;
+#endif
 	} cn52xxp1;
 	struct cvmx_pescx_tlp_credits_cn52xx cn56xx;
 	struct cvmx_pescx_tlp_credits_cn52xxp1 cn56xxp1;
diff --git a/arch/mips/include/asm/octeon/cvmx-pexp-defs.h b/arch/mips/include/asm/octeon/cvmx-pexp-defs.h
index 4438d211988..eb673f3514d 100644
--- a/arch/mips/include/asm/octeon/cvmx-pexp-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pexp-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2011 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
diff --git a/arch/mips/include/asm/octeon/cvmx-pip-defs.h b/arch/mips/include/asm/octeon/cvmx-pip-defs.h
index 5a369100ca6..05a917d6ebe 100644
--- a/arch/mips/include/asm/octeon/cvmx-pip-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pip-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -51,93 +51,137 @@ enum cvmx_pip_port_parse_mode {
 	CVMX_PIP_PORT_CFG_MODE_SKIPIP = 2ull
 };
 
-#define CVMX_PIP_BCK_PRS \
-	 CVMX_ADD_IO_SEG(0x00011800A0000038ull)
-#define CVMX_PIP_BIST_STATUS \
-	 CVMX_ADD_IO_SEG(0x00011800A0000000ull)
-#define CVMX_PIP_CRC_CTLX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000040ull + (((offset) & 1) * 8))
-#define CVMX_PIP_CRC_IVX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000050ull + (((offset) & 1) * 8))
-#define CVMX_PIP_DEC_IPSECX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000080ull + (((offset) & 3) * 8))
-#define CVMX_PIP_DSA_SRC_GRP \
-	 CVMX_ADD_IO_SEG(0x00011800A0000190ull)
-#define CVMX_PIP_DSA_VID_GRP \
-	 CVMX_ADD_IO_SEG(0x00011800A0000198ull)
-#define CVMX_PIP_FRM_LEN_CHKX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000180ull + (((offset) & 1) * 8))
-#define CVMX_PIP_GBL_CFG \
-	 CVMX_ADD_IO_SEG(0x00011800A0000028ull)
-#define CVMX_PIP_GBL_CTL \
-	 CVMX_ADD_IO_SEG(0x00011800A0000020ull)
-#define CVMX_PIP_HG_PRI_QOS \
-	 CVMX_ADD_IO_SEG(0x00011800A00001A0ull)
-#define CVMX_PIP_INT_EN \
-	 CVMX_ADD_IO_SEG(0x00011800A0000010ull)
-#define CVMX_PIP_INT_REG \
-	 CVMX_ADD_IO_SEG(0x00011800A0000008ull)
-#define CVMX_PIP_IP_OFFSET \
-	 CVMX_ADD_IO_SEG(0x00011800A0000060ull)
-#define CVMX_PIP_PRT_CFGX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000200ull + (((offset) & 63) * 8))
-#define CVMX_PIP_PRT_TAGX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000400ull + (((offset) & 63) * 8))
-#define CVMX_PIP_QOS_DIFFX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000600ull + (((offset) & 63) * 8))
-#define CVMX_PIP_QOS_VLANX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A00000C0ull + (((offset) & 7) * 8))
-#define CVMX_PIP_QOS_WATCHX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000100ull + (((offset) & 7) * 8))
-#define CVMX_PIP_RAW_WORD \
-	 CVMX_ADD_IO_SEG(0x00011800A00000B0ull)
-#define CVMX_PIP_SFT_RST \
-	 CVMX_ADD_IO_SEG(0x00011800A0000030ull)
-#define CVMX_PIP_STAT0_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000800ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT1_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000808ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT2_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000810ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT3_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000818ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT4_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000820ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT5_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000828ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT6_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000830ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT7_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000838ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT8_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000840ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT9_PRTX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0000848ull + (((offset) & 63) * 80))
-#define CVMX_PIP_STAT_CTL \
-	 CVMX_ADD_IO_SEG(0x00011800A0000018ull)
-#define CVMX_PIP_STAT_INB_ERRSX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0001A10ull + (((offset) & 63) * 32))
-#define CVMX_PIP_STAT_INB_OCTSX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0001A08ull + (((offset) & 63) * 32))
-#define CVMX_PIP_STAT_INB_PKTSX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0001A00ull + (((offset) & 63) * 32))
-#define CVMX_PIP_TAG_INCX(offset) \
-	 CVMX_ADD_IO_SEG(0x00011800A0001800ull + (((offset) & 63) * 8))
-#define CVMX_PIP_TAG_MASK \
-	 CVMX_ADD_IO_SEG(0x00011800A0000070ull)
-#define CVMX_PIP_TAG_SECRET \
-	 CVMX_ADD_IO_SEG(0x00011800A0000068ull)
-#define CVMX_PIP_TODO_ENTRY \
-	 CVMX_ADD_IO_SEG(0x00011800A0000078ull)
+#define CVMX_PIP_ALT_SKIP_CFGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002A00ull) + ((offset) & 3) * 8)
+#define CVMX_PIP_BCK_PRS (CVMX_ADD_IO_SEG(0x00011800A0000038ull))
+#define CVMX_PIP_BIST_STATUS (CVMX_ADD_IO_SEG(0x00011800A0000000ull))
+#define CVMX_PIP_BSEL_EXT_CFGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002800ull) + ((offset) & 3) * 16)
+#define CVMX_PIP_BSEL_EXT_POSX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002808ull) + ((offset) & 3) * 16)
+#define CVMX_PIP_BSEL_TBL_ENTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0003000ull) + ((offset) & 511) * 8)
+#define CVMX_PIP_CLKEN (CVMX_ADD_IO_SEG(0x00011800A0000040ull))
+#define CVMX_PIP_CRC_CTLX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000040ull) + ((offset) & 1) * 8)
+#define CVMX_PIP_CRC_IVX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000050ull) + ((offset) & 1) * 8)
+#define CVMX_PIP_DEC_IPSECX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000080ull) + ((offset) & 3) * 8)
+#define CVMX_PIP_DSA_SRC_GRP (CVMX_ADD_IO_SEG(0x00011800A0000190ull))
+#define CVMX_PIP_DSA_VID_GRP (CVMX_ADD_IO_SEG(0x00011800A0000198ull))
+#define CVMX_PIP_FRM_LEN_CHKX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000180ull) + ((offset) & 1) * 8)
+#define CVMX_PIP_GBL_CFG (CVMX_ADD_IO_SEG(0x00011800A0000028ull))
+#define CVMX_PIP_GBL_CTL (CVMX_ADD_IO_SEG(0x00011800A0000020ull))
+#define CVMX_PIP_HG_PRI_QOS (CVMX_ADD_IO_SEG(0x00011800A00001A0ull))
+#define CVMX_PIP_INT_EN (CVMX_ADD_IO_SEG(0x00011800A0000010ull))
+#define CVMX_PIP_INT_REG (CVMX_ADD_IO_SEG(0x00011800A0000008ull))
+#define CVMX_PIP_IP_OFFSET (CVMX_ADD_IO_SEG(0x00011800A0000060ull))
+#define CVMX_PIP_PRI_TBLX(offset) (CVMX_ADD_IO_SEG(0x00011800A0004000ull) + ((offset) & 255) * 8)
+#define CVMX_PIP_PRT_CFGBX(offset) (CVMX_ADD_IO_SEG(0x00011800A0008000ull) + ((offset) & 63) * 8)
+#define CVMX_PIP_PRT_CFGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000200ull) + ((offset) & 63) * 8)
+#define CVMX_PIP_PRT_TAGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000400ull) + ((offset) & 63) * 8)
+#define CVMX_PIP_QOS_DIFFX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000600ull) + ((offset) & 63) * 8)
+#define CVMX_PIP_QOS_VLANX(offset) (CVMX_ADD_IO_SEG(0x00011800A00000C0ull) + ((offset) & 7) * 8)
+#define CVMX_PIP_QOS_WATCHX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000100ull) + ((offset) & 7) * 8)
+#define CVMX_PIP_RAW_WORD (CVMX_ADD_IO_SEG(0x00011800A00000B0ull))
+#define CVMX_PIP_SFT_RST (CVMX_ADD_IO_SEG(0x00011800A0000030ull))
+#define CVMX_PIP_STAT0_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000800ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT0_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040000ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT10_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001480ull) + ((offset) & 63) * 16)
+#define CVMX_PIP_STAT10_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040050ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT11_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001488ull) + ((offset) & 63) * 16)
+#define CVMX_PIP_STAT11_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040058ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT1_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000808ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT1_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040008ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT2_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000810ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT2_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040010ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT3_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000818ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT3_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040018ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT4_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000820ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT4_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040020ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT5_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000828ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT5_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040028ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT6_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000830ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT6_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040030ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT7_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000838ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT7_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040038ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT8_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000840ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT8_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040040ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT9_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000848ull) + ((offset) & 63) * 80)
+#define CVMX_PIP_STAT9_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040048ull) + ((offset) & 63) * 128)
+#define CVMX_PIP_STAT_CTL (CVMX_ADD_IO_SEG(0x00011800A0000018ull))
+#define CVMX_PIP_STAT_INB_ERRSX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001A10ull) + ((offset) & 63) * 32)
+#define CVMX_PIP_STAT_INB_ERRS_PKNDX(offset) (CVMX_ADD_IO_SEG(0x00011800A0020010ull) + ((offset) & 63) * 32)
+#define CVMX_PIP_STAT_INB_OCTSX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001A08ull) + ((offset) & 63) * 32)
+#define CVMX_PIP_STAT_INB_OCTS_PKNDX(offset) (CVMX_ADD_IO_SEG(0x00011800A0020008ull) + ((offset) & 63) * 32)
+#define CVMX_PIP_STAT_INB_PKTSX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001A00ull) + ((offset) & 63) * 32)
+#define CVMX_PIP_STAT_INB_PKTS_PKNDX(offset) (CVMX_ADD_IO_SEG(0x00011800A0020000ull) + ((offset) & 63) * 32)
+#define CVMX_PIP_SUB_PKIND_FCSX(block_id) (CVMX_ADD_IO_SEG(0x00011800A0080000ull))
+#define CVMX_PIP_TAG_INCX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001800ull) + ((offset) & 63) * 8)
+#define CVMX_PIP_TAG_MASK (CVMX_ADD_IO_SEG(0x00011800A0000070ull))
+#define CVMX_PIP_TAG_SECRET (CVMX_ADD_IO_SEG(0x00011800A0000068ull))
+#define CVMX_PIP_TODO_ENTRY (CVMX_ADD_IO_SEG(0x00011800A0000078ull))
+#define CVMX_PIP_VLAN_ETYPESX(offset) (CVMX_ADD_IO_SEG(0x00011800A00001C0ull) + ((offset) & 1) * 8)
+#define CVMX_PIP_XSTAT0_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002000ull) + ((offset) & 63) * 80 - 80*40)
+#define CVMX_PIP_XSTAT10_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001700ull) + ((offset) & 63) * 16 - 16*40)
+#define CVMX_PIP_XSTAT11_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001708ull) + ((offset) & 63) * 16 - 16*40)
+#define CVMX_PIP_XSTAT1_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002008ull) + ((offset) & 63) * 80 - 80*40)
+#define CVMX_PIP_XSTAT2_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002010ull) + ((offset) & 63) * 80 - 80*40)
+#define CVMX_PIP_XSTAT3_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002018ull) + ((offset) & 63) * 80 - 80*40)
+#define CVMX_PIP_XSTAT4_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002020ull) + ((offset) & 63) * 80 - 80*40)
+#define CVMX_PIP_XSTAT5_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002028ull) + ((offset) & 63) * 80 - 80*40)
+#define CVMX_PIP_XSTAT6_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002030ull) + ((offset) & 63) * 80 - 80*40)
+#define CVMX_PIP_XSTAT7_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002038ull) + ((offset) & 63) * 80 - 80*40)
+#define CVMX_PIP_XSTAT8_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002040ull) + ((offset) & 63) * 80 - 80*40)
+#define CVMX_PIP_XSTAT9_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002048ull) + ((offset) & 63) * 80 - 80*40)
+
+union cvmx_pip_alt_skip_cfgx {
+	uint64_t u64;
+	struct cvmx_pip_alt_skip_cfgx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_57_63:7;
+		uint64_t len:1;
+		uint64_t reserved_46_55:10;
+		uint64_t bit1:6;
+		uint64_t reserved_38_39:2;
+		uint64_t bit0:6;
+		uint64_t reserved_23_31:9;
+		uint64_t skip3:7;
+		uint64_t reserved_15_15:1;
+		uint64_t skip2:7;
+		uint64_t reserved_7_7:1;
+		uint64_t skip1:7;
+#else
+		uint64_t skip1:7;
+		uint64_t reserved_7_7:1;
+		uint64_t skip2:7;
+		uint64_t reserved_15_15:1;
+		uint64_t skip3:7;
+		uint64_t reserved_23_31:9;
+		uint64_t bit0:6;
+		uint64_t reserved_38_39:2;
+		uint64_t bit1:6;
+		uint64_t reserved_46_55:10;
+		uint64_t len:1;
+		uint64_t reserved_57_63:7;
+#endif
+	} s;
+	struct cvmx_pip_alt_skip_cfgx_s cn61xx;
+	struct cvmx_pip_alt_skip_cfgx_s cn66xx;
+	struct cvmx_pip_alt_skip_cfgx_s cn68xx;
+	struct cvmx_pip_alt_skip_cfgx_s cnf71xx;
+};
 
 union cvmx_pip_bck_prs {
 	uint64_t u64;
 	struct cvmx_pip_bck_prs_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bckprs:1;
 		uint64_t reserved_13_62:50;
 		uint64_t hiwater:5;
 		uint64_t reserved_5_7:3;
 		uint64_t lowater:5;
+#else
+		uint64_t lowater:5;
+		uint64_t reserved_5_7:3;
+		uint64_t hiwater:5;
+		uint64_t reserved_13_62:50;
+		uint64_t bckprs:1;
+#endif
 	} s;
 	struct cvmx_pip_bck_prs_s cn38xx;
 	struct cvmx_pip_bck_prs_s cn38xxp2;
@@ -145,36 +189,236 @@ union cvmx_pip_bck_prs {
 	struct cvmx_pip_bck_prs_s cn56xxp1;
 	struct cvmx_pip_bck_prs_s cn58xx;
 	struct cvmx_pip_bck_prs_s cn58xxp1;
+	struct cvmx_pip_bck_prs_s cn61xx;
+	struct cvmx_pip_bck_prs_s cn63xx;
+	struct cvmx_pip_bck_prs_s cn63xxp1;
+	struct cvmx_pip_bck_prs_s cn66xx;
+	struct cvmx_pip_bck_prs_s cn68xx;
+	struct cvmx_pip_bck_prs_s cn68xxp1;
+	struct cvmx_pip_bck_prs_s cnf71xx;
 };
 
 union cvmx_pip_bist_status {
 	uint64_t u64;
 	struct cvmx_pip_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_22_63:42;
+		uint64_t bist:22;
+#else
+		uint64_t bist:22;
+		uint64_t reserved_22_63:42;
+#endif
+	} s;
+	struct cvmx_pip_bist_status_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t bist:18;
-	} s;
-	struct cvmx_pip_bist_status_s cn30xx;
-	struct cvmx_pip_bist_status_s cn31xx;
-	struct cvmx_pip_bist_status_s cn38xx;
-	struct cvmx_pip_bist_status_s cn38xxp2;
+#else
+		uint64_t bist:18;
+		uint64_t reserved_18_63:46;
+#endif
+	} cn30xx;
+	struct cvmx_pip_bist_status_cn30xx cn31xx;
+	struct cvmx_pip_bist_status_cn30xx cn38xx;
+	struct cvmx_pip_bist_status_cn30xx cn38xxp2;
 	struct cvmx_pip_bist_status_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t bist:17;
+#else
+		uint64_t bist:17;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn50xx;
-	struct cvmx_pip_bist_status_s cn52xx;
-	struct cvmx_pip_bist_status_s cn52xxp1;
-	struct cvmx_pip_bist_status_s cn56xx;
-	struct cvmx_pip_bist_status_s cn56xxp1;
-	struct cvmx_pip_bist_status_s cn58xx;
-	struct cvmx_pip_bist_status_s cn58xxp1;
+	struct cvmx_pip_bist_status_cn30xx cn52xx;
+	struct cvmx_pip_bist_status_cn30xx cn52xxp1;
+	struct cvmx_pip_bist_status_cn30xx cn56xx;
+	struct cvmx_pip_bist_status_cn30xx cn56xxp1;
+	struct cvmx_pip_bist_status_cn30xx cn58xx;
+	struct cvmx_pip_bist_status_cn30xx cn58xxp1;
+	struct cvmx_pip_bist_status_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t bist:20;
+#else
+		uint64_t bist:20;
+		uint64_t reserved_20_63:44;
+#endif
+	} cn61xx;
+	struct cvmx_pip_bist_status_cn30xx cn63xx;
+	struct cvmx_pip_bist_status_cn30xx cn63xxp1;
+	struct cvmx_pip_bist_status_cn61xx cn66xx;
+	struct cvmx_pip_bist_status_s cn68xx;
+	struct cvmx_pip_bist_status_cn61xx cn68xxp1;
+	struct cvmx_pip_bist_status_cn61xx cnf71xx;
+};
+
+union cvmx_pip_bsel_ext_cfgx {
+	uint64_t u64;
+	struct cvmx_pip_bsel_ext_cfgx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t upper_tag:16;
+		uint64_t tag:8;
+		uint64_t reserved_25_31:7;
+		uint64_t offset:9;
+		uint64_t reserved_7_15:9;
+		uint64_t skip:7;
+#else
+		uint64_t skip:7;
+		uint64_t reserved_7_15:9;
+		uint64_t offset:9;
+		uint64_t reserved_25_31:7;
+		uint64_t tag:8;
+		uint64_t upper_tag:16;
+		uint64_t reserved_56_63:8;
+#endif
+	} s;
+	struct cvmx_pip_bsel_ext_cfgx_s cn61xx;
+	struct cvmx_pip_bsel_ext_cfgx_s cn68xx;
+	struct cvmx_pip_bsel_ext_cfgx_s cnf71xx;
+};
+
+union cvmx_pip_bsel_ext_posx {
+	uint64_t u64;
+	struct cvmx_pip_bsel_ext_posx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t pos7_val:1;
+		uint64_t pos7:7;
+		uint64_t pos6_val:1;
+		uint64_t pos6:7;
+		uint64_t pos5_val:1;
+		uint64_t pos5:7;
+		uint64_t pos4_val:1;
+		uint64_t pos4:7;
+		uint64_t pos3_val:1;
+		uint64_t pos3:7;
+		uint64_t pos2_val:1;
+		uint64_t pos2:7;
+		uint64_t pos1_val:1;
+		uint64_t pos1:7;
+		uint64_t pos0_val:1;
+		uint64_t pos0:7;
+#else
+		uint64_t pos0:7;
+		uint64_t pos0_val:1;
+		uint64_t pos1:7;
+		uint64_t pos1_val:1;
+		uint64_t pos2:7;
+		uint64_t pos2_val:1;
+		uint64_t pos3:7;
+		uint64_t pos3_val:1;
+		uint64_t pos4:7;
+		uint64_t pos4_val:1;
+		uint64_t pos5:7;
+		uint64_t pos5_val:1;
+		uint64_t pos6:7;
+		uint64_t pos6_val:1;
+		uint64_t pos7:7;
+		uint64_t pos7_val:1;
+#endif
+	} s;
+	struct cvmx_pip_bsel_ext_posx_s cn61xx;
+	struct cvmx_pip_bsel_ext_posx_s cn68xx;
+	struct cvmx_pip_bsel_ext_posx_s cnf71xx;
+};
+
+union cvmx_pip_bsel_tbl_entx {
+	uint64_t u64;
+	struct cvmx_pip_bsel_tbl_entx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t tag_en:1;
+		uint64_t grp_en:1;
+		uint64_t tt_en:1;
+		uint64_t qos_en:1;
+		uint64_t reserved_40_59:20;
+		uint64_t tag:8;
+		uint64_t reserved_22_31:10;
+		uint64_t grp:6;
+		uint64_t reserved_10_15:6;
+		uint64_t tt:2;
+		uint64_t reserved_3_7:5;
+		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t reserved_3_7:5;
+		uint64_t tt:2;
+		uint64_t reserved_10_15:6;
+		uint64_t grp:6;
+		uint64_t reserved_22_31:10;
+		uint64_t tag:8;
+		uint64_t reserved_40_59:20;
+		uint64_t qos_en:1;
+		uint64_t tt_en:1;
+		uint64_t grp_en:1;
+		uint64_t tag_en:1;
+#endif
+	} s;
+	struct cvmx_pip_bsel_tbl_entx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t tag_en:1;
+		uint64_t grp_en:1;
+		uint64_t tt_en:1;
+		uint64_t qos_en:1;
+		uint64_t reserved_40_59:20;
+		uint64_t tag:8;
+		uint64_t reserved_20_31:12;
+		uint64_t grp:4;
+		uint64_t reserved_10_15:6;
+		uint64_t tt:2;
+		uint64_t reserved_3_7:5;
+		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t reserved_3_7:5;
+		uint64_t tt:2;
+		uint64_t reserved_10_15:6;
+		uint64_t grp:4;
+		uint64_t reserved_20_31:12;
+		uint64_t tag:8;
+		uint64_t reserved_40_59:20;
+		uint64_t qos_en:1;
+		uint64_t tt_en:1;
+		uint64_t grp_en:1;
+		uint64_t tag_en:1;
+#endif
+	} cn61xx;
+	struct cvmx_pip_bsel_tbl_entx_s cn68xx;
+	struct cvmx_pip_bsel_tbl_entx_cn61xx cnf71xx;
+};
+
+union cvmx_pip_clken {
+	uint64_t u64;
+	struct cvmx_pip_clken_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t clken:1;
+#else
+		uint64_t clken:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} s;
+	struct cvmx_pip_clken_s cn61xx;
+	struct cvmx_pip_clken_s cn63xx;
+	struct cvmx_pip_clken_s cn63xxp1;
+	struct cvmx_pip_clken_s cn66xx;
+	struct cvmx_pip_clken_s cn68xx;
+	struct cvmx_pip_clken_s cn68xxp1;
+	struct cvmx_pip_clken_s cnf71xx;
 };
 
 union cvmx_pip_crc_ctlx {
 	uint64_t u64;
 	struct cvmx_pip_crc_ctlx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t invres:1;
 		uint64_t reflect:1;
+#else
+		uint64_t reflect:1;
+		uint64_t invres:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_pip_crc_ctlx_s cn38xx;
 	struct cvmx_pip_crc_ctlx_s cn38xxp2;
@@ -185,8 +429,13 @@ union cvmx_pip_crc_ctlx {
 union cvmx_pip_crc_ivx {
 	uint64_t u64;
 	struct cvmx_pip_crc_ivx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t iv:32;
+#else
+		uint64_t iv:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pip_crc_ivx_s cn38xx;
 	struct cvmx_pip_crc_ivx_s cn38xxp2;
@@ -197,10 +446,17 @@ union cvmx_pip_crc_ivx {
 union cvmx_pip_dec_ipsecx {
 	uint64_t u64;
 	struct cvmx_pip_dec_ipsecx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t tcp:1;
 		uint64_t udp:1;
 		uint64_t dprt:16;
+#else
+		uint64_t dprt:16;
+		uint64_t udp:1;
+		uint64_t tcp:1;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_pip_dec_ipsecx_s cn30xx;
 	struct cvmx_pip_dec_ipsecx_s cn31xx;
@@ -213,11 +469,19 @@ union cvmx_pip_dec_ipsecx {
 	struct cvmx_pip_dec_ipsecx_s cn56xxp1;
 	struct cvmx_pip_dec_ipsecx_s cn58xx;
 	struct cvmx_pip_dec_ipsecx_s cn58xxp1;
+	struct cvmx_pip_dec_ipsecx_s cn61xx;
+	struct cvmx_pip_dec_ipsecx_s cn63xx;
+	struct cvmx_pip_dec_ipsecx_s cn63xxp1;
+	struct cvmx_pip_dec_ipsecx_s cn66xx;
+	struct cvmx_pip_dec_ipsecx_s cn68xx;
+	struct cvmx_pip_dec_ipsecx_s cn68xxp1;
+	struct cvmx_pip_dec_ipsecx_s cnf71xx;
 };
 
 union cvmx_pip_dsa_src_grp {
 	uint64_t u64;
 	struct cvmx_pip_dsa_src_grp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t map15:4;
 		uint64_t map14:4;
 		uint64_t map13:4;
@@ -234,15 +498,41 @@ union cvmx_pip_dsa_src_grp {
 		uint64_t map2:4;
 		uint64_t map1:4;
 		uint64_t map0:4;
+#else
+		uint64_t map0:4;
+		uint64_t map1:4;
+		uint64_t map2:4;
+		uint64_t map3:4;
+		uint64_t map4:4;
+		uint64_t map5:4;
+		uint64_t map6:4;
+		uint64_t map7:4;
+		uint64_t map8:4;
+		uint64_t map9:4;
+		uint64_t map10:4;
+		uint64_t map11:4;
+		uint64_t map12:4;
+		uint64_t map13:4;
+		uint64_t map14:4;
+		uint64_t map15:4;
+#endif
 	} s;
 	struct cvmx_pip_dsa_src_grp_s cn52xx;
 	struct cvmx_pip_dsa_src_grp_s cn52xxp1;
 	struct cvmx_pip_dsa_src_grp_s cn56xx;
+	struct cvmx_pip_dsa_src_grp_s cn61xx;
+	struct cvmx_pip_dsa_src_grp_s cn63xx;
+	struct cvmx_pip_dsa_src_grp_s cn63xxp1;
+	struct cvmx_pip_dsa_src_grp_s cn66xx;
+	struct cvmx_pip_dsa_src_grp_s cn68xx;
+	struct cvmx_pip_dsa_src_grp_s cn68xxp1;
+	struct cvmx_pip_dsa_src_grp_s cnf71xx;
 };
 
 union cvmx_pip_dsa_vid_grp {
 	uint64_t u64;
 	struct cvmx_pip_dsa_vid_grp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t map15:4;
 		uint64_t map14:4;
 		uint64_t map13:4;
@@ -259,29 +549,68 @@ union cvmx_pip_dsa_vid_grp {
 		uint64_t map2:4;
 		uint64_t map1:4;
 		uint64_t map0:4;
+#else
+		uint64_t map0:4;
+		uint64_t map1:4;
+		uint64_t map2:4;
+		uint64_t map3:4;
+		uint64_t map4:4;
+		uint64_t map5:4;
+		uint64_t map6:4;
+		uint64_t map7:4;
+		uint64_t map8:4;
+		uint64_t map9:4;
+		uint64_t map10:4;
+		uint64_t map11:4;
+		uint64_t map12:4;
+		uint64_t map13:4;
+		uint64_t map14:4;
+		uint64_t map15:4;
+#endif
 	} s;
 	struct cvmx_pip_dsa_vid_grp_s cn52xx;
 	struct cvmx_pip_dsa_vid_grp_s cn52xxp1;
 	struct cvmx_pip_dsa_vid_grp_s cn56xx;
+	struct cvmx_pip_dsa_vid_grp_s cn61xx;
+	struct cvmx_pip_dsa_vid_grp_s cn63xx;
+	struct cvmx_pip_dsa_vid_grp_s cn63xxp1;
+	struct cvmx_pip_dsa_vid_grp_s cn66xx;
+	struct cvmx_pip_dsa_vid_grp_s cn68xx;
+	struct cvmx_pip_dsa_vid_grp_s cn68xxp1;
+	struct cvmx_pip_dsa_vid_grp_s cnf71xx;
 };
 
 union cvmx_pip_frm_len_chkx {
 	uint64_t u64;
 	struct cvmx_pip_frm_len_chkx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t maxlen:16;
 		uint64_t minlen:16;
+#else
+		uint64_t minlen:16;
+		uint64_t maxlen:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pip_frm_len_chkx_s cn50xx;
 	struct cvmx_pip_frm_len_chkx_s cn52xx;
 	struct cvmx_pip_frm_len_chkx_s cn52xxp1;
 	struct cvmx_pip_frm_len_chkx_s cn56xx;
 	struct cvmx_pip_frm_len_chkx_s cn56xxp1;
+	struct cvmx_pip_frm_len_chkx_s cn61xx;
+	struct cvmx_pip_frm_len_chkx_s cn63xx;
+	struct cvmx_pip_frm_len_chkx_s cn63xxp1;
+	struct cvmx_pip_frm_len_chkx_s cn66xx;
+	struct cvmx_pip_frm_len_chkx_s cn68xx;
+	struct cvmx_pip_frm_len_chkx_s cn68xxp1;
+	struct cvmx_pip_frm_len_chkx_s cnf71xx;
 };
 
 union cvmx_pip_gbl_cfg {
 	uint64_t u64;
 	struct cvmx_pip_gbl_cfg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t tag_syn:1;
 		uint64_t ip6_udp:1;
@@ -290,6 +619,16 @@ union cvmx_pip_gbl_cfg {
 		uint64_t raw_shf:3;
 		uint64_t reserved_3_7:5;
 		uint64_t nip_shf:3;
+#else
+		uint64_t nip_shf:3;
+		uint64_t reserved_3_7:5;
+		uint64_t raw_shf:3;
+		uint64_t reserved_11_15:5;
+		uint64_t max_l2:1;
+		uint64_t ip6_udp:1;
+		uint64_t tag_syn:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} s;
 	struct cvmx_pip_gbl_cfg_s cn30xx;
 	struct cvmx_pip_gbl_cfg_s cn31xx;
@@ -302,12 +641,22 @@ union cvmx_pip_gbl_cfg {
 	struct cvmx_pip_gbl_cfg_s cn56xxp1;
 	struct cvmx_pip_gbl_cfg_s cn58xx;
 	struct cvmx_pip_gbl_cfg_s cn58xxp1;
+	struct cvmx_pip_gbl_cfg_s cn61xx;
+	struct cvmx_pip_gbl_cfg_s cn63xx;
+	struct cvmx_pip_gbl_cfg_s cn63xxp1;
+	struct cvmx_pip_gbl_cfg_s cn66xx;
+	struct cvmx_pip_gbl_cfg_s cn68xx;
+	struct cvmx_pip_gbl_cfg_s cn68xxp1;
+	struct cvmx_pip_gbl_cfg_s cnf71xx;
 };
 
 union cvmx_pip_gbl_ctl {
 	uint64_t u64;
 	struct cvmx_pip_gbl_ctl_s {
-		uint64_t reserved_27_63:37;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t egrp_dis:1;
+		uint64_t ihmsk_dis:1;
 		uint64_t dsa_grp_tvid:1;
 		uint64_t dsa_grp_scmd:1;
 		uint64_t dsa_grp_sid:1;
@@ -329,8 +678,35 @@ union cvmx_pip_gbl_ctl {
 		uint64_t ip_hop:1;
 		uint64_t ip_mal:1;
 		uint64_t ip_chk:1;
+#else
+		uint64_t ip_chk:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_hop:1;
+		uint64_t ip4_opts:1;
+		uint64_t ip6_eext:2;
+		uint64_t reserved_6_7:2;
+		uint64_t l4_mal:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_len:1;
+		uint64_t tcp_flag:1;
+		uint64_t l2_mal:1;
+		uint64_t vs_qos:1;
+		uint64_t vs_wqe:1;
+		uint64_t ignrs:1;
+		uint64_t reserved_17_19:3;
+		uint64_t ring_en:1;
+		uint64_t reserved_21_23:3;
+		uint64_t dsa_grp_sid:1;
+		uint64_t dsa_grp_scmd:1;
+		uint64_t dsa_grp_tvid:1;
+		uint64_t ihmsk_dis:1;
+		uint64_t egrp_dis:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_pip_gbl_ctl_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t ignrs:1;
 		uint64_t vs_wqe:1;
@@ -347,15 +723,82 @@ union cvmx_pip_gbl_ctl {
 		uint64_t ip_hop:1;
 		uint64_t ip_mal:1;
 		uint64_t ip_chk:1;
+#else
+		uint64_t ip_chk:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_hop:1;
+		uint64_t ip4_opts:1;
+		uint64_t ip6_eext:2;
+		uint64_t reserved_6_7:2;
+		uint64_t l4_mal:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_len:1;
+		uint64_t tcp_flag:1;
+		uint64_t l2_mal:1;
+		uint64_t vs_qos:1;
+		uint64_t vs_wqe:1;
+		uint64_t ignrs:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn30xx;
 	struct cvmx_pip_gbl_ctl_cn30xx cn31xx;
 	struct cvmx_pip_gbl_ctl_cn30xx cn38xx;
 	struct cvmx_pip_gbl_ctl_cn30xx cn38xxp2;
 	struct cvmx_pip_gbl_ctl_cn30xx cn50xx;
-	struct cvmx_pip_gbl_ctl_s cn52xx;
-	struct cvmx_pip_gbl_ctl_s cn52xxp1;
-	struct cvmx_pip_gbl_ctl_s cn56xx;
+	struct cvmx_pip_gbl_ctl_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_27_63:37;
+		uint64_t dsa_grp_tvid:1;
+		uint64_t dsa_grp_scmd:1;
+		uint64_t dsa_grp_sid:1;
+		uint64_t reserved_21_23:3;
+		uint64_t ring_en:1;
+		uint64_t reserved_17_19:3;
+		uint64_t ignrs:1;
+		uint64_t vs_wqe:1;
+		uint64_t vs_qos:1;
+		uint64_t l2_mal:1;
+		uint64_t tcp_flag:1;
+		uint64_t l4_len:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_mal:1;
+		uint64_t reserved_6_7:2;
+		uint64_t ip6_eext:2;
+		uint64_t ip4_opts:1;
+		uint64_t ip_hop:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_chk:1;
+#else
+		uint64_t ip_chk:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_hop:1;
+		uint64_t ip4_opts:1;
+		uint64_t ip6_eext:2;
+		uint64_t reserved_6_7:2;
+		uint64_t l4_mal:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_len:1;
+		uint64_t tcp_flag:1;
+		uint64_t l2_mal:1;
+		uint64_t vs_qos:1;
+		uint64_t vs_wqe:1;
+		uint64_t ignrs:1;
+		uint64_t reserved_17_19:3;
+		uint64_t ring_en:1;
+		uint64_t reserved_21_23:3;
+		uint64_t dsa_grp_sid:1;
+		uint64_t dsa_grp_scmd:1;
+		uint64_t dsa_grp_tvid:1;
+		uint64_t reserved_27_63:37;
+#endif
+	} cn52xx;
+	struct cvmx_pip_gbl_ctl_cn52xx cn52xxp1;
+	struct cvmx_pip_gbl_ctl_cn52xx cn56xx;
 	struct cvmx_pip_gbl_ctl_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_21_63:43;
 		uint64_t ring_en:1;
 		uint64_t reserved_17_19:3;
@@ -374,27 +817,215 @@ union cvmx_pip_gbl_ctl {
 		uint64_t ip_hop:1;
 		uint64_t ip_mal:1;
 		uint64_t ip_chk:1;
+#else
+		uint64_t ip_chk:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_hop:1;
+		uint64_t ip4_opts:1;
+		uint64_t ip6_eext:2;
+		uint64_t reserved_6_7:2;
+		uint64_t l4_mal:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_len:1;
+		uint64_t tcp_flag:1;
+		uint64_t l2_mal:1;
+		uint64_t vs_qos:1;
+		uint64_t vs_wqe:1;
+		uint64_t ignrs:1;
+		uint64_t reserved_17_19:3;
+		uint64_t ring_en:1;
+		uint64_t reserved_21_63:43;
+#endif
 	} cn56xxp1;
 	struct cvmx_pip_gbl_ctl_cn30xx cn58xx;
 	struct cvmx_pip_gbl_ctl_cn30xx cn58xxp1;
+	struct cvmx_pip_gbl_ctl_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_28_63:36;
+		uint64_t ihmsk_dis:1;
+		uint64_t dsa_grp_tvid:1;
+		uint64_t dsa_grp_scmd:1;
+		uint64_t dsa_grp_sid:1;
+		uint64_t reserved_21_23:3;
+		uint64_t ring_en:1;
+		uint64_t reserved_17_19:3;
+		uint64_t ignrs:1;
+		uint64_t vs_wqe:1;
+		uint64_t vs_qos:1;
+		uint64_t l2_mal:1;
+		uint64_t tcp_flag:1;
+		uint64_t l4_len:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_mal:1;
+		uint64_t reserved_6_7:2;
+		uint64_t ip6_eext:2;
+		uint64_t ip4_opts:1;
+		uint64_t ip_hop:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_chk:1;
+#else
+		uint64_t ip_chk:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_hop:1;
+		uint64_t ip4_opts:1;
+		uint64_t ip6_eext:2;
+		uint64_t reserved_6_7:2;
+		uint64_t l4_mal:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_len:1;
+		uint64_t tcp_flag:1;
+		uint64_t l2_mal:1;
+		uint64_t vs_qos:1;
+		uint64_t vs_wqe:1;
+		uint64_t ignrs:1;
+		uint64_t reserved_17_19:3;
+		uint64_t ring_en:1;
+		uint64_t reserved_21_23:3;
+		uint64_t dsa_grp_sid:1;
+		uint64_t dsa_grp_scmd:1;
+		uint64_t dsa_grp_tvid:1;
+		uint64_t ihmsk_dis:1;
+		uint64_t reserved_28_63:36;
+#endif
+	} cn61xx;
+	struct cvmx_pip_gbl_ctl_cn61xx cn63xx;
+	struct cvmx_pip_gbl_ctl_cn61xx cn63xxp1;
+	struct cvmx_pip_gbl_ctl_cn61xx cn66xx;
+	struct cvmx_pip_gbl_ctl_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_29_63:35;
+		uint64_t egrp_dis:1;
+		uint64_t ihmsk_dis:1;
+		uint64_t dsa_grp_tvid:1;
+		uint64_t dsa_grp_scmd:1;
+		uint64_t dsa_grp_sid:1;
+		uint64_t reserved_17_23:7;
+		uint64_t ignrs:1;
+		uint64_t vs_wqe:1;
+		uint64_t vs_qos:1;
+		uint64_t l2_mal:1;
+		uint64_t tcp_flag:1;
+		uint64_t l4_len:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_mal:1;
+		uint64_t reserved_6_7:2;
+		uint64_t ip6_eext:2;
+		uint64_t ip4_opts:1;
+		uint64_t ip_hop:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_chk:1;
+#else
+		uint64_t ip_chk:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_hop:1;
+		uint64_t ip4_opts:1;
+		uint64_t ip6_eext:2;
+		uint64_t reserved_6_7:2;
+		uint64_t l4_mal:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_len:1;
+		uint64_t tcp_flag:1;
+		uint64_t l2_mal:1;
+		uint64_t vs_qos:1;
+		uint64_t vs_wqe:1;
+		uint64_t ignrs:1;
+		uint64_t reserved_17_23:7;
+		uint64_t dsa_grp_sid:1;
+		uint64_t dsa_grp_scmd:1;
+		uint64_t dsa_grp_tvid:1;
+		uint64_t ihmsk_dis:1;
+		uint64_t egrp_dis:1;
+		uint64_t reserved_29_63:35;
+#endif
+	} cn68xx;
+	struct cvmx_pip_gbl_ctl_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_28_63:36;
+		uint64_t ihmsk_dis:1;
+		uint64_t dsa_grp_tvid:1;
+		uint64_t dsa_grp_scmd:1;
+		uint64_t dsa_grp_sid:1;
+		uint64_t reserved_17_23:7;
+		uint64_t ignrs:1;
+		uint64_t vs_wqe:1;
+		uint64_t vs_qos:1;
+		uint64_t l2_mal:1;
+		uint64_t tcp_flag:1;
+		uint64_t l4_len:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_mal:1;
+		uint64_t reserved_6_7:2;
+		uint64_t ip6_eext:2;
+		uint64_t ip4_opts:1;
+		uint64_t ip_hop:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_chk:1;
+#else
+		uint64_t ip_chk:1;
+		uint64_t ip_mal:1;
+		uint64_t ip_hop:1;
+		uint64_t ip4_opts:1;
+		uint64_t ip6_eext:2;
+		uint64_t reserved_6_7:2;
+		uint64_t l4_mal:1;
+		uint64_t l4_prt:1;
+		uint64_t l4_chk:1;
+		uint64_t l4_len:1;
+		uint64_t tcp_flag:1;
+		uint64_t l2_mal:1;
+		uint64_t vs_qos:1;
+		uint64_t vs_wqe:1;
+		uint64_t ignrs:1;
+		uint64_t reserved_17_23:7;
+		uint64_t dsa_grp_sid:1;
+		uint64_t dsa_grp_scmd:1;
+		uint64_t dsa_grp_tvid:1;
+		uint64_t ihmsk_dis:1;
+		uint64_t reserved_28_63:36;
+#endif
+	} cn68xxp1;
+	struct cvmx_pip_gbl_ctl_cn61xx cnf71xx;
 };
 
 union cvmx_pip_hg_pri_qos {
 	uint64_t u64;
 	struct cvmx_pip_hg_pri_qos_s {
-		uint64_t reserved_11_63:53;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_13_63:51;
+		uint64_t up_qos:1;
+		uint64_t reserved_11_11:1;
 		uint64_t qos:3;
 		uint64_t reserved_6_7:2;
 		uint64_t pri:6;
+#else
+		uint64_t pri:6;
+		uint64_t reserved_6_7:2;
+		uint64_t qos:3;
+		uint64_t reserved_11_11:1;
+		uint64_t up_qos:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_pip_hg_pri_qos_s cn52xx;
 	struct cvmx_pip_hg_pri_qos_s cn52xxp1;
 	struct cvmx_pip_hg_pri_qos_s cn56xx;
+	struct cvmx_pip_hg_pri_qos_s cn61xx;
+	struct cvmx_pip_hg_pri_qos_s cn63xx;
+	struct cvmx_pip_hg_pri_qos_s cn63xxp1;
+	struct cvmx_pip_hg_pri_qos_s cn66xx;
+	struct cvmx_pip_hg_pri_qos_s cnf71xx;
 };
 
 union cvmx_pip_int_en {
 	uint64_t u64;
 	struct cvmx_pip_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t punyerr:1;
 		uint64_t lenerr:1;
@@ -409,8 +1040,25 @@ union cvmx_pip_int_en {
 		uint64_t bckprs:1;
 		uint64_t crcerr:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t crcerr:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t minerr:1;
+		uint64_t maxerr:1;
+		uint64_t lenerr:1;
+		uint64_t punyerr:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_pip_int_en_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t beperr:1;
 		uint64_t feperr:1;
@@ -421,11 +1069,24 @@ union cvmx_pip_int_en {
 		uint64_t bckprs:1;
 		uint64_t crcerr:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t crcerr:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn30xx;
 	struct cvmx_pip_int_en_cn30xx cn31xx;
 	struct cvmx_pip_int_en_cn30xx cn38xx;
 	struct cvmx_pip_int_en_cn30xx cn38xxp2;
 	struct cvmx_pip_int_en_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t lenerr:1;
 		uint64_t maxerr:1;
@@ -439,8 +1100,24 @@ union cvmx_pip_int_en {
 		uint64_t bckprs:1;
 		uint64_t reserved_1_1:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t minerr:1;
+		uint64_t maxerr:1;
+		uint64_t lenerr:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn50xx;
 	struct cvmx_pip_int_en_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t punyerr:1;
 		uint64_t lenerr:1;
@@ -455,10 +1132,27 @@ union cvmx_pip_int_en {
 		uint64_t bckprs:1;
 		uint64_t reserved_1_1:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t minerr:1;
+		uint64_t maxerr:1;
+		uint64_t lenerr:1;
+		uint64_t punyerr:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} cn52xx;
 	struct cvmx_pip_int_en_cn52xx cn52xxp1;
 	struct cvmx_pip_int_en_s cn56xx;
 	struct cvmx_pip_int_en_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t lenerr:1;
 		uint64_t maxerr:1;
@@ -472,8 +1166,24 @@ union cvmx_pip_int_en {
 		uint64_t bckprs:1;
 		uint64_t crcerr:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t crcerr:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t minerr:1;
+		uint64_t maxerr:1;
+		uint64_t lenerr:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xxp1;
 	struct cvmx_pip_int_en_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t punyerr:1;
 		uint64_t reserved_9_11:3;
@@ -486,13 +1196,35 @@ union cvmx_pip_int_en {
 		uint64_t bckprs:1;
 		uint64_t crcerr:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t crcerr:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t reserved_9_11:3;
+		uint64_t punyerr:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} cn58xx;
 	struct cvmx_pip_int_en_cn30xx cn58xxp1;
+	struct cvmx_pip_int_en_s cn61xx;
+	struct cvmx_pip_int_en_s cn63xx;
+	struct cvmx_pip_int_en_s cn63xxp1;
+	struct cvmx_pip_int_en_s cn66xx;
+	struct cvmx_pip_int_en_s cn68xx;
+	struct cvmx_pip_int_en_s cn68xxp1;
+	struct cvmx_pip_int_en_s cnf71xx;
 };
 
 union cvmx_pip_int_reg {
 	uint64_t u64;
 	struct cvmx_pip_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t punyerr:1;
 		uint64_t lenerr:1;
@@ -507,8 +1239,25 @@ union cvmx_pip_int_reg {
 		uint64_t bckprs:1;
 		uint64_t crcerr:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t crcerr:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t minerr:1;
+		uint64_t maxerr:1;
+		uint64_t lenerr:1;
+		uint64_t punyerr:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_pip_int_reg_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t beperr:1;
 		uint64_t feperr:1;
@@ -519,11 +1268,24 @@ union cvmx_pip_int_reg {
 		uint64_t bckprs:1;
 		uint64_t crcerr:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t crcerr:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn30xx;
 	struct cvmx_pip_int_reg_cn30xx cn31xx;
 	struct cvmx_pip_int_reg_cn30xx cn38xx;
 	struct cvmx_pip_int_reg_cn30xx cn38xxp2;
 	struct cvmx_pip_int_reg_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t lenerr:1;
 		uint64_t maxerr:1;
@@ -537,8 +1299,24 @@ union cvmx_pip_int_reg {
 		uint64_t bckprs:1;
 		uint64_t reserved_1_1:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t minerr:1;
+		uint64_t maxerr:1;
+		uint64_t lenerr:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn50xx;
 	struct cvmx_pip_int_reg_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t punyerr:1;
 		uint64_t lenerr:1;
@@ -553,10 +1331,27 @@ union cvmx_pip_int_reg {
 		uint64_t bckprs:1;
 		uint64_t reserved_1_1:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t minerr:1;
+		uint64_t maxerr:1;
+		uint64_t lenerr:1;
+		uint64_t punyerr:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} cn52xx;
 	struct cvmx_pip_int_reg_cn52xx cn52xxp1;
 	struct cvmx_pip_int_reg_s cn56xx;
 	struct cvmx_pip_int_reg_cn56xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t lenerr:1;
 		uint64_t maxerr:1;
@@ -570,8 +1365,24 @@ union cvmx_pip_int_reg {
 		uint64_t bckprs:1;
 		uint64_t crcerr:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t crcerr:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t minerr:1;
+		uint64_t maxerr:1;
+		uint64_t lenerr:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} cn56xxp1;
 	struct cvmx_pip_int_reg_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t punyerr:1;
 		uint64_t reserved_9_11:3;
@@ -584,15 +1395,41 @@ union cvmx_pip_int_reg {
 		uint64_t bckprs:1;
 		uint64_t crcerr:1;
 		uint64_t pktdrp:1;
+#else
+		uint64_t pktdrp:1;
+		uint64_t crcerr:1;
+		uint64_t bckprs:1;
+		uint64_t prtnxa:1;
+		uint64_t badtag:1;
+		uint64_t skprunt:1;
+		uint64_t todoovr:1;
+		uint64_t feperr:1;
+		uint64_t beperr:1;
+		uint64_t reserved_9_11:3;
+		uint64_t punyerr:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} cn58xx;
 	struct cvmx_pip_int_reg_cn30xx cn58xxp1;
+	struct cvmx_pip_int_reg_s cn61xx;
+	struct cvmx_pip_int_reg_s cn63xx;
+	struct cvmx_pip_int_reg_s cn63xxp1;
+	struct cvmx_pip_int_reg_s cn66xx;
+	struct cvmx_pip_int_reg_s cn68xx;
+	struct cvmx_pip_int_reg_s cn68xxp1;
+	struct cvmx_pip_int_reg_s cnf71xx;
 };
 
 union cvmx_pip_ip_offset {
 	uint64_t u64;
 	struct cvmx_pip_ip_offset_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t offset:3;
+#else
+		uint64_t offset:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_pip_ip_offset_s cn30xx;
 	struct cvmx_pip_ip_offset_s cn31xx;
@@ -605,12 +1442,63 @@ union cvmx_pip_ip_offset {
 	struct cvmx_pip_ip_offset_s cn56xxp1;
 	struct cvmx_pip_ip_offset_s cn58xx;
 	struct cvmx_pip_ip_offset_s cn58xxp1;
+	struct cvmx_pip_ip_offset_s cn61xx;
+	struct cvmx_pip_ip_offset_s cn63xx;
+	struct cvmx_pip_ip_offset_s cn63xxp1;
+	struct cvmx_pip_ip_offset_s cn66xx;
+	struct cvmx_pip_ip_offset_s cn68xx;
+	struct cvmx_pip_ip_offset_s cn68xxp1;
+	struct cvmx_pip_ip_offset_s cnf71xx;
+};
+
+union cvmx_pip_pri_tblx {
+	uint64_t u64;
+	struct cvmx_pip_pri_tblx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t diff2_padd:8;
+		uint64_t hg2_padd:8;
+		uint64_t vlan2_padd:8;
+		uint64_t reserved_38_39:2;
+		uint64_t diff2_bpid:6;
+		uint64_t reserved_30_31:2;
+		uint64_t hg2_bpid:6;
+		uint64_t reserved_22_23:2;
+		uint64_t vlan2_bpid:6;
+		uint64_t reserved_11_15:5;
+		uint64_t diff2_qos:3;
+		uint64_t reserved_7_7:1;
+		uint64_t hg2_qos:3;
+		uint64_t reserved_3_3:1;
+		uint64_t vlan2_qos:3;
+#else
+		uint64_t vlan2_qos:3;
+		uint64_t reserved_3_3:1;
+		uint64_t hg2_qos:3;
+		uint64_t reserved_7_7:1;
+		uint64_t diff2_qos:3;
+		uint64_t reserved_11_15:5;
+		uint64_t vlan2_bpid:6;
+		uint64_t reserved_22_23:2;
+		uint64_t hg2_bpid:6;
+		uint64_t reserved_30_31:2;
+		uint64_t diff2_bpid:6;
+		uint64_t reserved_38_39:2;
+		uint64_t vlan2_padd:8;
+		uint64_t hg2_padd:8;
+		uint64_t diff2_padd:8;
+#endif
+	} s;
+	struct cvmx_pip_pri_tblx_s cn68xx;
+	struct cvmx_pip_pri_tblx_s cn68xxp1;
 };
 
 union cvmx_pip_prt_cfgx {
 	uint64_t u64;
 	struct cvmx_pip_prt_cfgx_s {
-		uint64_t reserved_53_63:11;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_55_63:9;
+		uint64_t ih_pri:1;
+		uint64_t len_chk_sel:1;
 		uint64_t pad_len:1;
 		uint64_t vlan_len:1;
 		uint64_t lenerr_en:1;
@@ -638,8 +1526,41 @@ union cvmx_pip_prt_cfgx {
 		uint64_t mode:2;
 		uint64_t reserved_7_7:1;
 		uint64_t skip:7;
+#else
+		uint64_t skip:7;
+		uint64_t reserved_7_7:1;
+		uint64_t mode:2;
+		uint64_t dsa_en:1;
+		uint64_t higig_en:1;
+		uint64_t crc_en:1;
+		uint64_t reserved_13_15:3;
+		uint64_t qos_vlan:1;
+		uint64_t qos_diff:1;
+		uint64_t qos_vod:1;
+		uint64_t qos_vsel:1;
+		uint64_t qos_wat:4;
+		uint64_t qos:3;
+		uint64_t hg_qos:1;
+		uint64_t grp_wat:4;
+		uint64_t inst_hdr:1;
+		uint64_t dyn_rs:1;
+		uint64_t tag_inc:2;
+		uint64_t rawdrp:1;
+		uint64_t reserved_37_39:3;
+		uint64_t qos_wat_47:4;
+		uint64_t grp_wat_47:4;
+		uint64_t minerr_en:1;
+		uint64_t maxerr_en:1;
+		uint64_t lenerr_en:1;
+		uint64_t vlan_len:1;
+		uint64_t pad_len:1;
+		uint64_t len_chk_sel:1;
+		uint64_t ih_pri:1;
+		uint64_t reserved_55_63:9;
+#endif
 	} s;
 	struct cvmx_pip_prt_cfgx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t rawdrp:1;
 		uint64_t tag_inc:2;
@@ -656,9 +1577,28 @@ union cvmx_pip_prt_cfgx {
 		uint64_t mode:2;
 		uint64_t reserved_7_7:1;
 		uint64_t skip:7;
+#else
+		uint64_t skip:7;
+		uint64_t reserved_7_7:1;
+		uint64_t mode:2;
+		uint64_t reserved_10_15:6;
+		uint64_t qos_vlan:1;
+		uint64_t qos_diff:1;
+		uint64_t reserved_18_19:2;
+		uint64_t qos_wat:4;
+		uint64_t qos:3;
+		uint64_t reserved_27_27:1;
+		uint64_t grp_wat:4;
+		uint64_t inst_hdr:1;
+		uint64_t dyn_rs:1;
+		uint64_t tag_inc:2;
+		uint64_t rawdrp:1;
+		uint64_t reserved_37_63:27;
+#endif
 	} cn30xx;
 	struct cvmx_pip_prt_cfgx_cn30xx cn31xx;
 	struct cvmx_pip_prt_cfgx_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t rawdrp:1;
 		uint64_t tag_inc:2;
@@ -677,9 +1617,30 @@ union cvmx_pip_prt_cfgx {
 		uint64_t mode:2;
 		uint64_t reserved_7_7:1;
 		uint64_t skip:7;
+#else
+		uint64_t skip:7;
+		uint64_t reserved_7_7:1;
+		uint64_t mode:2;
+		uint64_t reserved_10_11:2;
+		uint64_t crc_en:1;
+		uint64_t reserved_13_15:3;
+		uint64_t qos_vlan:1;
+		uint64_t qos_diff:1;
+		uint64_t reserved_18_19:2;
+		uint64_t qos_wat:4;
+		uint64_t qos:3;
+		uint64_t reserved_27_27:1;
+		uint64_t grp_wat:4;
+		uint64_t inst_hdr:1;
+		uint64_t dyn_rs:1;
+		uint64_t tag_inc:2;
+		uint64_t rawdrp:1;
+		uint64_t reserved_37_63:27;
+#endif
 	} cn38xx;
 	struct cvmx_pip_prt_cfgx_cn38xx cn38xxp2;
 	struct cvmx_pip_prt_cfgx_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_53_63:11;
 		uint64_t pad_len:1;
 		uint64_t vlan_len:1;
@@ -707,12 +1668,102 @@ union cvmx_pip_prt_cfgx {
 		uint64_t mode:2;
 		uint64_t reserved_7_7:1;
 		uint64_t skip:7;
+#else
+		uint64_t skip:7;
+		uint64_t reserved_7_7:1;
+		uint64_t mode:2;
+		uint64_t reserved_10_11:2;
+		uint64_t crc_en:1;
+		uint64_t reserved_13_15:3;
+		uint64_t qos_vlan:1;
+		uint64_t qos_diff:1;
+		uint64_t qos_vod:1;
+		uint64_t reserved_19_19:1;
+		uint64_t qos_wat:4;
+		uint64_t qos:3;
+		uint64_t reserved_27_27:1;
+		uint64_t grp_wat:4;
+		uint64_t inst_hdr:1;
+		uint64_t dyn_rs:1;
+		uint64_t tag_inc:2;
+		uint64_t rawdrp:1;
+		uint64_t reserved_37_39:3;
+		uint64_t qos_wat_47:4;
+		uint64_t grp_wat_47:4;
+		uint64_t minerr_en:1;
+		uint64_t maxerr_en:1;
+		uint64_t lenerr_en:1;
+		uint64_t vlan_len:1;
+		uint64_t pad_len:1;
+		uint64_t reserved_53_63:11;
+#endif
 	} cn50xx;
-	struct cvmx_pip_prt_cfgx_s cn52xx;
-	struct cvmx_pip_prt_cfgx_s cn52xxp1;
-	struct cvmx_pip_prt_cfgx_s cn56xx;
+	struct cvmx_pip_prt_cfgx_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_53_63:11;
+		uint64_t pad_len:1;
+		uint64_t vlan_len:1;
+		uint64_t lenerr_en:1;
+		uint64_t maxerr_en:1;
+		uint64_t minerr_en:1;
+		uint64_t grp_wat_47:4;
+		uint64_t qos_wat_47:4;
+		uint64_t reserved_37_39:3;
+		uint64_t rawdrp:1;
+		uint64_t tag_inc:2;
+		uint64_t dyn_rs:1;
+		uint64_t inst_hdr:1;
+		uint64_t grp_wat:4;
+		uint64_t hg_qos:1;
+		uint64_t qos:3;
+		uint64_t qos_wat:4;
+		uint64_t qos_vsel:1;
+		uint64_t qos_vod:1;
+		uint64_t qos_diff:1;
+		uint64_t qos_vlan:1;
+		uint64_t reserved_13_15:3;
+		uint64_t crc_en:1;
+		uint64_t higig_en:1;
+		uint64_t dsa_en:1;
+		uint64_t mode:2;
+		uint64_t reserved_7_7:1;
+		uint64_t skip:7;
+#else
+		uint64_t skip:7;
+		uint64_t reserved_7_7:1;
+		uint64_t mode:2;
+		uint64_t dsa_en:1;
+		uint64_t higig_en:1;
+		uint64_t crc_en:1;
+		uint64_t reserved_13_15:3;
+		uint64_t qos_vlan:1;
+		uint64_t qos_diff:1;
+		uint64_t qos_vod:1;
+		uint64_t qos_vsel:1;
+		uint64_t qos_wat:4;
+		uint64_t qos:3;
+		uint64_t hg_qos:1;
+		uint64_t grp_wat:4;
+		uint64_t inst_hdr:1;
+		uint64_t dyn_rs:1;
+		uint64_t tag_inc:2;
+		uint64_t rawdrp:1;
+		uint64_t reserved_37_39:3;
+		uint64_t qos_wat_47:4;
+		uint64_t grp_wat_47:4;
+		uint64_t minerr_en:1;
+		uint64_t maxerr_en:1;
+		uint64_t lenerr_en:1;
+		uint64_t vlan_len:1;
+		uint64_t pad_len:1;
+		uint64_t reserved_53_63:11;
+#endif
+	} cn52xx;
+	struct cvmx_pip_prt_cfgx_cn52xx cn52xxp1;
+	struct cvmx_pip_prt_cfgx_cn52xx cn56xx;
 	struct cvmx_pip_prt_cfgx_cn50xx cn56xxp1;
 	struct cvmx_pip_prt_cfgx_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t rawdrp:1;
 		uint64_t tag_inc:2;
@@ -732,14 +1783,191 @@ union cvmx_pip_prt_cfgx {
 		uint64_t mode:2;
 		uint64_t reserved_7_7:1;
 		uint64_t skip:7;
+#else
+		uint64_t skip:7;
+		uint64_t reserved_7_7:1;
+		uint64_t mode:2;
+		uint64_t reserved_10_11:2;
+		uint64_t crc_en:1;
+		uint64_t reserved_13_15:3;
+		uint64_t qos_vlan:1;
+		uint64_t qos_diff:1;
+		uint64_t qos_vod:1;
+		uint64_t reserved_19_19:1;
+		uint64_t qos_wat:4;
+		uint64_t qos:3;
+		uint64_t reserved_27_27:1;
+		uint64_t grp_wat:4;
+		uint64_t inst_hdr:1;
+		uint64_t dyn_rs:1;
+		uint64_t tag_inc:2;
+		uint64_t rawdrp:1;
+		uint64_t reserved_37_63:27;
+#endif
 	} cn58xx;
 	struct cvmx_pip_prt_cfgx_cn58xx cn58xxp1;
+	struct cvmx_pip_prt_cfgx_cn52xx cn61xx;
+	struct cvmx_pip_prt_cfgx_cn52xx cn63xx;
+	struct cvmx_pip_prt_cfgx_cn52xx cn63xxp1;
+	struct cvmx_pip_prt_cfgx_cn52xx cn66xx;
+	struct cvmx_pip_prt_cfgx_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_55_63:9;
+		uint64_t ih_pri:1;
+		uint64_t len_chk_sel:1;
+		uint64_t pad_len:1;
+		uint64_t vlan_len:1;
+		uint64_t lenerr_en:1;
+		uint64_t maxerr_en:1;
+		uint64_t minerr_en:1;
+		uint64_t grp_wat_47:4;
+		uint64_t qos_wat_47:4;
+		uint64_t reserved_37_39:3;
+		uint64_t rawdrp:1;
+		uint64_t tag_inc:2;
+		uint64_t dyn_rs:1;
+		uint64_t inst_hdr:1;
+		uint64_t grp_wat:4;
+		uint64_t hg_qos:1;
+		uint64_t qos:3;
+		uint64_t qos_wat:4;
+		uint64_t reserved_19_19:1;
+		uint64_t qos_vod:1;
+		uint64_t qos_diff:1;
+		uint64_t qos_vlan:1;
+		uint64_t reserved_13_15:3;
+		uint64_t crc_en:1;
+		uint64_t higig_en:1;
+		uint64_t dsa_en:1;
+		uint64_t mode:2;
+		uint64_t reserved_7_7:1;
+		uint64_t skip:7;
+#else
+		uint64_t skip:7;
+		uint64_t reserved_7_7:1;
+		uint64_t mode:2;
+		uint64_t dsa_en:1;
+		uint64_t higig_en:1;
+		uint64_t crc_en:1;
+		uint64_t reserved_13_15:3;
+		uint64_t qos_vlan:1;
+		uint64_t qos_diff:1;
+		uint64_t qos_vod:1;
+		uint64_t reserved_19_19:1;
+		uint64_t qos_wat:4;
+		uint64_t qos:3;
+		uint64_t hg_qos:1;
+		uint64_t grp_wat:4;
+		uint64_t inst_hdr:1;
+		uint64_t dyn_rs:1;
+		uint64_t tag_inc:2;
+		uint64_t rawdrp:1;
+		uint64_t reserved_37_39:3;
+		uint64_t qos_wat_47:4;
+		uint64_t grp_wat_47:4;
+		uint64_t minerr_en:1;
+		uint64_t maxerr_en:1;
+		uint64_t lenerr_en:1;
+		uint64_t vlan_len:1;
+		uint64_t pad_len:1;
+		uint64_t len_chk_sel:1;
+		uint64_t ih_pri:1;
+		uint64_t reserved_55_63:9;
+#endif
+	} cn68xx;
+	struct cvmx_pip_prt_cfgx_cn68xx cn68xxp1;
+	struct cvmx_pip_prt_cfgx_cn52xx cnf71xx;
+};
+
+union cvmx_pip_prt_cfgbx {
+	uint64_t u64;
+	struct cvmx_pip_prt_cfgbx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_39_63:25;
+		uint64_t alt_skp_sel:2;
+		uint64_t alt_skp_en:1;
+		uint64_t reserved_35_35:1;
+		uint64_t bsel_num:2;
+		uint64_t bsel_en:1;
+		uint64_t reserved_24_31:8;
+		uint64_t base:8;
+		uint64_t reserved_6_15:10;
+		uint64_t bpid:6;
+#else
+		uint64_t bpid:6;
+		uint64_t reserved_6_15:10;
+		uint64_t base:8;
+		uint64_t reserved_24_31:8;
+		uint64_t bsel_en:1;
+		uint64_t bsel_num:2;
+		uint64_t reserved_35_35:1;
+		uint64_t alt_skp_en:1;
+		uint64_t alt_skp_sel:2;
+		uint64_t reserved_39_63:25;
+#endif
+	} s;
+	struct cvmx_pip_prt_cfgbx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_39_63:25;
+		uint64_t alt_skp_sel:2;
+		uint64_t alt_skp_en:1;
+		uint64_t reserved_35_35:1;
+		uint64_t bsel_num:2;
+		uint64_t bsel_en:1;
+		uint64_t reserved_0_31:32;
+#else
+		uint64_t reserved_0_31:32;
+		uint64_t bsel_en:1;
+		uint64_t bsel_num:2;
+		uint64_t reserved_35_35:1;
+		uint64_t alt_skp_en:1;
+		uint64_t alt_skp_sel:2;
+		uint64_t reserved_39_63:25;
+#endif
+	} cn61xx;
+	struct cvmx_pip_prt_cfgbx_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_39_63:25;
+		uint64_t alt_skp_sel:2;
+		uint64_t alt_skp_en:1;
+		uint64_t reserved_0_35:36;
+#else
+		uint64_t reserved_0_35:36;
+		uint64_t alt_skp_en:1;
+		uint64_t alt_skp_sel:2;
+		uint64_t reserved_39_63:25;
+#endif
+	} cn66xx;
+	struct cvmx_pip_prt_cfgbx_s cn68xx;
+	struct cvmx_pip_prt_cfgbx_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_24_63:40;
+		uint64_t base:8;
+		uint64_t reserved_6_15:10;
+		uint64_t bpid:6;
+#else
+		uint64_t bpid:6;
+		uint64_t reserved_6_15:10;
+		uint64_t base:8;
+		uint64_t reserved_24_63:40;
+#endif
+	} cn68xxp1;
+	struct cvmx_pip_prt_cfgbx_cn61xx cnf71xx;
 };
 
 union cvmx_pip_prt_tagx {
 	uint64_t u64;
 	struct cvmx_pip_prt_tagx_s {
-		uint64_t reserved_40_63:24;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_54_63:10;
+		uint64_t portadd_en:1;
+		uint64_t inc_hwchk:1;
+		uint64_t reserved_50_51:2;
+		uint64_t grptagbase_msb:2;
+		uint64_t reserved_46_47:2;
+		uint64_t grptagmask_msb:2;
+		uint64_t reserved_42_43:2;
+		uint64_t grp_msb:2;
 		uint64_t grptagbase:4;
 		uint64_t grptagmask:4;
 		uint64_t grptag:1;
@@ -764,8 +1992,44 @@ union cvmx_pip_prt_tagx {
 		uint64_t ip4_tag_type:2;
 		uint64_t non_tag_type:2;
 		uint64_t grp:4;
+#else
+		uint64_t grp:4;
+		uint64_t non_tag_type:2;
+		uint64_t ip4_tag_type:2;
+		uint64_t ip6_tag_type:2;
+		uint64_t tcp4_tag_type:2;
+		uint64_t tcp6_tag_type:2;
+		uint64_t ip4_src_flag:1;
+		uint64_t ip6_src_flag:1;
+		uint64_t ip4_dst_flag:1;
+		uint64_t ip6_dst_flag:1;
+		uint64_t ip4_pctl_flag:1;
+		uint64_t ip6_nxth_flag:1;
+		uint64_t ip4_sprt_flag:1;
+		uint64_t ip6_sprt_flag:1;
+		uint64_t ip4_dprt_flag:1;
+		uint64_t ip6_dprt_flag:1;
+		uint64_t inc_prt_flag:1;
+		uint64_t inc_vlan:1;
+		uint64_t inc_vs:2;
+		uint64_t tag_mode:2;
+		uint64_t grptag_mskip:1;
+		uint64_t grptag:1;
+		uint64_t grptagmask:4;
+		uint64_t grptagbase:4;
+		uint64_t grp_msb:2;
+		uint64_t reserved_42_43:2;
+		uint64_t grptagmask_msb:2;
+		uint64_t reserved_46_47:2;
+		uint64_t grptagbase_msb:2;
+		uint64_t reserved_50_51:2;
+		uint64_t inc_hwchk:1;
+		uint64_t portadd_en:1;
+		uint64_t reserved_54_63:10;
+#endif
 	} s;
 	struct cvmx_pip_prt_tagx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t grptagbase:4;
 		uint64_t grptagmask:4;
@@ -791,24 +2055,117 @@ union cvmx_pip_prt_tagx {
 		uint64_t ip4_tag_type:2;
 		uint64_t non_tag_type:2;
 		uint64_t grp:4;
+#else
+		uint64_t grp:4;
+		uint64_t non_tag_type:2;
+		uint64_t ip4_tag_type:2;
+		uint64_t ip6_tag_type:2;
+		uint64_t tcp4_tag_type:2;
+		uint64_t tcp6_tag_type:2;
+		uint64_t ip4_src_flag:1;
+		uint64_t ip6_src_flag:1;
+		uint64_t ip4_dst_flag:1;
+		uint64_t ip6_dst_flag:1;
+		uint64_t ip4_pctl_flag:1;
+		uint64_t ip6_nxth_flag:1;
+		uint64_t ip4_sprt_flag:1;
+		uint64_t ip6_sprt_flag:1;
+		uint64_t ip4_dprt_flag:1;
+		uint64_t ip6_dprt_flag:1;
+		uint64_t inc_prt_flag:1;
+		uint64_t inc_vlan:1;
+		uint64_t inc_vs:2;
+		uint64_t tag_mode:2;
+		uint64_t reserved_30_30:1;
+		uint64_t grptag:1;
+		uint64_t grptagmask:4;
+		uint64_t grptagbase:4;
+		uint64_t reserved_40_63:24;
+#endif
 	} cn30xx;
 	struct cvmx_pip_prt_tagx_cn30xx cn31xx;
 	struct cvmx_pip_prt_tagx_cn30xx cn38xx;
 	struct cvmx_pip_prt_tagx_cn30xx cn38xxp2;
-	struct cvmx_pip_prt_tagx_s cn50xx;
-	struct cvmx_pip_prt_tagx_s cn52xx;
-	struct cvmx_pip_prt_tagx_s cn52xxp1;
-	struct cvmx_pip_prt_tagx_s cn56xx;
-	struct cvmx_pip_prt_tagx_s cn56xxp1;
+	struct cvmx_pip_prt_tagx_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_40_63:24;
+		uint64_t grptagbase:4;
+		uint64_t grptagmask:4;
+		uint64_t grptag:1;
+		uint64_t grptag_mskip:1;
+		uint64_t tag_mode:2;
+		uint64_t inc_vs:2;
+		uint64_t inc_vlan:1;
+		uint64_t inc_prt_flag:1;
+		uint64_t ip6_dprt_flag:1;
+		uint64_t ip4_dprt_flag:1;
+		uint64_t ip6_sprt_flag:1;
+		uint64_t ip4_sprt_flag:1;
+		uint64_t ip6_nxth_flag:1;
+		uint64_t ip4_pctl_flag:1;
+		uint64_t ip6_dst_flag:1;
+		uint64_t ip4_dst_flag:1;
+		uint64_t ip6_src_flag:1;
+		uint64_t ip4_src_flag:1;
+		uint64_t tcp6_tag_type:2;
+		uint64_t tcp4_tag_type:2;
+		uint64_t ip6_tag_type:2;
+		uint64_t ip4_tag_type:2;
+		uint64_t non_tag_type:2;
+		uint64_t grp:4;
+#else
+		uint64_t grp:4;
+		uint64_t non_tag_type:2;
+		uint64_t ip4_tag_type:2;
+		uint64_t ip6_tag_type:2;
+		uint64_t tcp4_tag_type:2;
+		uint64_t tcp6_tag_type:2;
+		uint64_t ip4_src_flag:1;
+		uint64_t ip6_src_flag:1;
+		uint64_t ip4_dst_flag:1;
+		uint64_t ip6_dst_flag:1;
+		uint64_t ip4_pctl_flag:1;
+		uint64_t ip6_nxth_flag:1;
+		uint64_t ip4_sprt_flag:1;
+		uint64_t ip6_sprt_flag:1;
+		uint64_t ip4_dprt_flag:1;
+		uint64_t ip6_dprt_flag:1;
+		uint64_t inc_prt_flag:1;
+		uint64_t inc_vlan:1;
+		uint64_t inc_vs:2;
+		uint64_t tag_mode:2;
+		uint64_t grptag_mskip:1;
+		uint64_t grptag:1;
+		uint64_t grptagmask:4;
+		uint64_t grptagbase:4;
+		uint64_t reserved_40_63:24;
+#endif
+	} cn50xx;
+	struct cvmx_pip_prt_tagx_cn50xx cn52xx;
+	struct cvmx_pip_prt_tagx_cn50xx cn52xxp1;
+	struct cvmx_pip_prt_tagx_cn50xx cn56xx;
+	struct cvmx_pip_prt_tagx_cn50xx cn56xxp1;
 	struct cvmx_pip_prt_tagx_cn30xx cn58xx;
 	struct cvmx_pip_prt_tagx_cn30xx cn58xxp1;
+	struct cvmx_pip_prt_tagx_cn50xx cn61xx;
+	struct cvmx_pip_prt_tagx_cn50xx cn63xx;
+	struct cvmx_pip_prt_tagx_cn50xx cn63xxp1;
+	struct cvmx_pip_prt_tagx_cn50xx cn66xx;
+	struct cvmx_pip_prt_tagx_s cn68xx;
+	struct cvmx_pip_prt_tagx_s cn68xxp1;
+	struct cvmx_pip_prt_tagx_cn50xx cnf71xx;
 };
 
 union cvmx_pip_qos_diffx {
 	uint64_t u64;
 	struct cvmx_pip_qos_diffx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_pip_qos_diffx_s cn30xx;
 	struct cvmx_pip_qos_diffx_s cn31xx;
@@ -821,19 +2178,36 @@ union cvmx_pip_qos_diffx {
 	struct cvmx_pip_qos_diffx_s cn56xxp1;
 	struct cvmx_pip_qos_diffx_s cn58xx;
 	struct cvmx_pip_qos_diffx_s cn58xxp1;
+	struct cvmx_pip_qos_diffx_s cn61xx;
+	struct cvmx_pip_qos_diffx_s cn63xx;
+	struct cvmx_pip_qos_diffx_s cn63xxp1;
+	struct cvmx_pip_qos_diffx_s cn66xx;
+	struct cvmx_pip_qos_diffx_s cnf71xx;
 };
 
 union cvmx_pip_qos_vlanx {
 	uint64_t u64;
 	struct cvmx_pip_qos_vlanx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t qos1:3;
 		uint64_t reserved_3_3:1;
 		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t reserved_3_3:1;
+		uint64_t qos1:3;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_pip_qos_vlanx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn30xx;
 	struct cvmx_pip_qos_vlanx_cn30xx cn31xx;
 	struct cvmx_pip_qos_vlanx_cn30xx cn38xx;
@@ -845,22 +2219,40 @@ union cvmx_pip_qos_vlanx {
 	struct cvmx_pip_qos_vlanx_cn30xx cn56xxp1;
 	struct cvmx_pip_qos_vlanx_cn30xx cn58xx;
 	struct cvmx_pip_qos_vlanx_cn30xx cn58xxp1;
+	struct cvmx_pip_qos_vlanx_s cn61xx;
+	struct cvmx_pip_qos_vlanx_s cn63xx;
+	struct cvmx_pip_qos_vlanx_s cn63xxp1;
+	struct cvmx_pip_qos_vlanx_s cn66xx;
+	struct cvmx_pip_qos_vlanx_s cnf71xx;
 };
 
 union cvmx_pip_qos_watchx {
 	uint64_t u64;
 	struct cvmx_pip_qos_watchx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t mask:16;
-		uint64_t reserved_28_31:4;
-		uint64_t grp:4;
+		uint64_t reserved_30_31:2;
+		uint64_t grp:6;
 		uint64_t reserved_23_23:1;
 		uint64_t qos:3;
 		uint64_t reserved_19_19:1;
 		uint64_t match_type:3;
 		uint64_t match_value:16;
+#else
+		uint64_t match_value:16;
+		uint64_t match_type:3;
+		uint64_t reserved_19_19:1;
+		uint64_t qos:3;
+		uint64_t reserved_23_23:1;
+		uint64_t grp:6;
+		uint64_t reserved_30_31:2;
+		uint64_t mask:16;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_pip_qos_watchx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t mask:16;
 		uint64_t reserved_28_31:4;
@@ -870,24 +2262,69 @@ union cvmx_pip_qos_watchx {
 		uint64_t reserved_18_19:2;
 		uint64_t match_type:2;
 		uint64_t match_value:16;
+#else
+		uint64_t match_value:16;
+		uint64_t match_type:2;
+		uint64_t reserved_18_19:2;
+		uint64_t qos:3;
+		uint64_t reserved_23_23:1;
+		uint64_t grp:4;
+		uint64_t reserved_28_31:4;
+		uint64_t mask:16;
+		uint64_t reserved_48_63:16;
+#endif
 	} cn30xx;
 	struct cvmx_pip_qos_watchx_cn30xx cn31xx;
 	struct cvmx_pip_qos_watchx_cn30xx cn38xx;
 	struct cvmx_pip_qos_watchx_cn30xx cn38xxp2;
-	struct cvmx_pip_qos_watchx_s cn50xx;
-	struct cvmx_pip_qos_watchx_s cn52xx;
-	struct cvmx_pip_qos_watchx_s cn52xxp1;
-	struct cvmx_pip_qos_watchx_s cn56xx;
-	struct cvmx_pip_qos_watchx_s cn56xxp1;
+	struct cvmx_pip_qos_watchx_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_48_63:16;
+		uint64_t mask:16;
+		uint64_t reserved_28_31:4;
+		uint64_t grp:4;
+		uint64_t reserved_23_23:1;
+		uint64_t qos:3;
+		uint64_t reserved_19_19:1;
+		uint64_t match_type:3;
+		uint64_t match_value:16;
+#else
+		uint64_t match_value:16;
+		uint64_t match_type:3;
+		uint64_t reserved_19_19:1;
+		uint64_t qos:3;
+		uint64_t reserved_23_23:1;
+		uint64_t grp:4;
+		uint64_t reserved_28_31:4;
+		uint64_t mask:16;
+		uint64_t reserved_48_63:16;
+#endif
+	} cn50xx;
+	struct cvmx_pip_qos_watchx_cn50xx cn52xx;
+	struct cvmx_pip_qos_watchx_cn50xx cn52xxp1;
+	struct cvmx_pip_qos_watchx_cn50xx cn56xx;
+	struct cvmx_pip_qos_watchx_cn50xx cn56xxp1;
 	struct cvmx_pip_qos_watchx_cn30xx cn58xx;
 	struct cvmx_pip_qos_watchx_cn30xx cn58xxp1;
+	struct cvmx_pip_qos_watchx_cn50xx cn61xx;
+	struct cvmx_pip_qos_watchx_cn50xx cn63xx;
+	struct cvmx_pip_qos_watchx_cn50xx cn63xxp1;
+	struct cvmx_pip_qos_watchx_cn50xx cn66xx;
+	struct cvmx_pip_qos_watchx_s cn68xx;
+	struct cvmx_pip_qos_watchx_s cn68xxp1;
+	struct cvmx_pip_qos_watchx_cn50xx cnf71xx;
 };
 
 union cvmx_pip_raw_word {
 	uint64_t u64;
 	struct cvmx_pip_raw_word_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t word:56;
+#else
+		uint64_t word:56;
+		uint64_t reserved_56_63:8;
+#endif
 	} s;
 	struct cvmx_pip_raw_word_s cn30xx;
 	struct cvmx_pip_raw_word_s cn31xx;
@@ -900,13 +2337,25 @@ union cvmx_pip_raw_word {
 	struct cvmx_pip_raw_word_s cn56xxp1;
 	struct cvmx_pip_raw_word_s cn58xx;
 	struct cvmx_pip_raw_word_s cn58xxp1;
+	struct cvmx_pip_raw_word_s cn61xx;
+	struct cvmx_pip_raw_word_s cn63xx;
+	struct cvmx_pip_raw_word_s cn63xxp1;
+	struct cvmx_pip_raw_word_s cn66xx;
+	struct cvmx_pip_raw_word_s cn68xx;
+	struct cvmx_pip_raw_word_s cn68xxp1;
+	struct cvmx_pip_raw_word_s cnf71xx;
 };
 
 union cvmx_pip_sft_rst {
 	uint64_t u64;
 	struct cvmx_pip_sft_rst_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t rst:1;
+#else
+		uint64_t rst:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_pip_sft_rst_s cn30xx;
 	struct cvmx_pip_sft_rst_s cn31xx;
@@ -918,13 +2367,40 @@ union cvmx_pip_sft_rst {
 	struct cvmx_pip_sft_rst_s cn56xxp1;
 	struct cvmx_pip_sft_rst_s cn58xx;
 	struct cvmx_pip_sft_rst_s cn58xxp1;
+	struct cvmx_pip_sft_rst_s cn61xx;
+	struct cvmx_pip_sft_rst_s cn63xx;
+	struct cvmx_pip_sft_rst_s cn63xxp1;
+	struct cvmx_pip_sft_rst_s cn66xx;
+	struct cvmx_pip_sft_rst_s cn68xx;
+	struct cvmx_pip_sft_rst_s cn68xxp1;
+	struct cvmx_pip_sft_rst_s cnf71xx;
+};
+
+union cvmx_pip_stat0_x {
+	uint64_t u64;
+	struct cvmx_pip_stat0_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t drp_pkts:32;
+		uint64_t drp_octs:32;
+#else
+		uint64_t drp_octs:32;
+		uint64_t drp_pkts:32;
+#endif
+	} s;
+	struct cvmx_pip_stat0_x_s cn68xx;
+	struct cvmx_pip_stat0_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat0_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat0_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t drp_pkts:32;
 		uint64_t drp_octs:32;
+#else
+		uint64_t drp_octs:32;
+		uint64_t drp_pkts:32;
+#endif
 	} s;
 	struct cvmx_pip_stat0_prtx_s cn30xx;
 	struct cvmx_pip_stat0_prtx_s cn31xx;
@@ -937,13 +2413,112 @@ union cvmx_pip_stat0_prtx {
 	struct cvmx_pip_stat0_prtx_s cn56xxp1;
 	struct cvmx_pip_stat0_prtx_s cn58xx;
 	struct cvmx_pip_stat0_prtx_s cn58xxp1;
+	struct cvmx_pip_stat0_prtx_s cn61xx;
+	struct cvmx_pip_stat0_prtx_s cn63xx;
+	struct cvmx_pip_stat0_prtx_s cn63xxp1;
+	struct cvmx_pip_stat0_prtx_s cn66xx;
+	struct cvmx_pip_stat0_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat10_x {
+	uint64_t u64;
+	struct cvmx_pip_stat10_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bcast:32;
+		uint64_t mcast:32;
+#else
+		uint64_t mcast:32;
+		uint64_t bcast:32;
+#endif
+	} s;
+	struct cvmx_pip_stat10_x_s cn68xx;
+	struct cvmx_pip_stat10_x_s cn68xxp1;
+};
+
+union cvmx_pip_stat10_prtx {
+	uint64_t u64;
+	struct cvmx_pip_stat10_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bcast:32;
+		uint64_t mcast:32;
+#else
+		uint64_t mcast:32;
+		uint64_t bcast:32;
+#endif
+	} s;
+	struct cvmx_pip_stat10_prtx_s cn52xx;
+	struct cvmx_pip_stat10_prtx_s cn52xxp1;
+	struct cvmx_pip_stat10_prtx_s cn56xx;
+	struct cvmx_pip_stat10_prtx_s cn56xxp1;
+	struct cvmx_pip_stat10_prtx_s cn61xx;
+	struct cvmx_pip_stat10_prtx_s cn63xx;
+	struct cvmx_pip_stat10_prtx_s cn63xxp1;
+	struct cvmx_pip_stat10_prtx_s cn66xx;
+	struct cvmx_pip_stat10_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat11_x {
+	uint64_t u64;
+	struct cvmx_pip_stat11_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bcast:32;
+		uint64_t mcast:32;
+#else
+		uint64_t mcast:32;
+		uint64_t bcast:32;
+#endif
+	} s;
+	struct cvmx_pip_stat11_x_s cn68xx;
+	struct cvmx_pip_stat11_x_s cn68xxp1;
+};
+
+union cvmx_pip_stat11_prtx {
+	uint64_t u64;
+	struct cvmx_pip_stat11_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bcast:32;
+		uint64_t mcast:32;
+#else
+		uint64_t mcast:32;
+		uint64_t bcast:32;
+#endif
+	} s;
+	struct cvmx_pip_stat11_prtx_s cn52xx;
+	struct cvmx_pip_stat11_prtx_s cn52xxp1;
+	struct cvmx_pip_stat11_prtx_s cn56xx;
+	struct cvmx_pip_stat11_prtx_s cn56xxp1;
+	struct cvmx_pip_stat11_prtx_s cn61xx;
+	struct cvmx_pip_stat11_prtx_s cn63xx;
+	struct cvmx_pip_stat11_prtx_s cn63xxp1;
+	struct cvmx_pip_stat11_prtx_s cn66xx;
+	struct cvmx_pip_stat11_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat1_x {
+	uint64_t u64;
+	struct cvmx_pip_stat1_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_48_63:16;
+		uint64_t octs:48;
+#else
+		uint64_t octs:48;
+		uint64_t reserved_48_63:16;
+#endif
+	} s;
+	struct cvmx_pip_stat1_x_s cn68xx;
+	struct cvmx_pip_stat1_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat1_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat1_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t octs:48;
+#else
+		uint64_t octs:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_pip_stat1_prtx_s cn30xx;
 	struct cvmx_pip_stat1_prtx_s cn31xx;
@@ -956,13 +2531,38 @@ union cvmx_pip_stat1_prtx {
 	struct cvmx_pip_stat1_prtx_s cn56xxp1;
 	struct cvmx_pip_stat1_prtx_s cn58xx;
 	struct cvmx_pip_stat1_prtx_s cn58xxp1;
+	struct cvmx_pip_stat1_prtx_s cn61xx;
+	struct cvmx_pip_stat1_prtx_s cn63xx;
+	struct cvmx_pip_stat1_prtx_s cn63xxp1;
+	struct cvmx_pip_stat1_prtx_s cn66xx;
+	struct cvmx_pip_stat1_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat2_x {
+	uint64_t u64;
+	struct cvmx_pip_stat2_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t pkts:32;
+		uint64_t raw:32;
+#else
+		uint64_t raw:32;
+		uint64_t pkts:32;
+#endif
+	} s;
+	struct cvmx_pip_stat2_x_s cn68xx;
+	struct cvmx_pip_stat2_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat2_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat2_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t pkts:32;
 		uint64_t raw:32;
+#else
+		uint64_t raw:32;
+		uint64_t pkts:32;
+#endif
 	} s;
 	struct cvmx_pip_stat2_prtx_s cn30xx;
 	struct cvmx_pip_stat2_prtx_s cn31xx;
@@ -975,13 +2575,38 @@ union cvmx_pip_stat2_prtx {
 	struct cvmx_pip_stat2_prtx_s cn56xxp1;
 	struct cvmx_pip_stat2_prtx_s cn58xx;
 	struct cvmx_pip_stat2_prtx_s cn58xxp1;
+	struct cvmx_pip_stat2_prtx_s cn61xx;
+	struct cvmx_pip_stat2_prtx_s cn63xx;
+	struct cvmx_pip_stat2_prtx_s cn63xxp1;
+	struct cvmx_pip_stat2_prtx_s cn66xx;
+	struct cvmx_pip_stat2_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat3_x {
+	uint64_t u64;
+	struct cvmx_pip_stat3_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bcst:32;
+		uint64_t mcst:32;
+#else
+		uint64_t mcst:32;
+		uint64_t bcst:32;
+#endif
+	} s;
+	struct cvmx_pip_stat3_x_s cn68xx;
+	struct cvmx_pip_stat3_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat3_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat3_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t bcst:32;
 		uint64_t mcst:32;
+#else
+		uint64_t mcst:32;
+		uint64_t bcst:32;
+#endif
 	} s;
 	struct cvmx_pip_stat3_prtx_s cn30xx;
 	struct cvmx_pip_stat3_prtx_s cn31xx;
@@ -994,13 +2619,38 @@ union cvmx_pip_stat3_prtx {
 	struct cvmx_pip_stat3_prtx_s cn56xxp1;
 	struct cvmx_pip_stat3_prtx_s cn58xx;
 	struct cvmx_pip_stat3_prtx_s cn58xxp1;
+	struct cvmx_pip_stat3_prtx_s cn61xx;
+	struct cvmx_pip_stat3_prtx_s cn63xx;
+	struct cvmx_pip_stat3_prtx_s cn63xxp1;
+	struct cvmx_pip_stat3_prtx_s cn66xx;
+	struct cvmx_pip_stat3_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat4_x {
+	uint64_t u64;
+	struct cvmx_pip_stat4_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t h65to127:32;
+		uint64_t h64:32;
+#else
+		uint64_t h64:32;
+		uint64_t h65to127:32;
+#endif
+	} s;
+	struct cvmx_pip_stat4_x_s cn68xx;
+	struct cvmx_pip_stat4_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat4_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat4_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t h65to127:32;
 		uint64_t h64:32;
+#else
+		uint64_t h64:32;
+		uint64_t h65to127:32;
+#endif
 	} s;
 	struct cvmx_pip_stat4_prtx_s cn30xx;
 	struct cvmx_pip_stat4_prtx_s cn31xx;
@@ -1013,13 +2663,38 @@ union cvmx_pip_stat4_prtx {
 	struct cvmx_pip_stat4_prtx_s cn56xxp1;
 	struct cvmx_pip_stat4_prtx_s cn58xx;
 	struct cvmx_pip_stat4_prtx_s cn58xxp1;
+	struct cvmx_pip_stat4_prtx_s cn61xx;
+	struct cvmx_pip_stat4_prtx_s cn63xx;
+	struct cvmx_pip_stat4_prtx_s cn63xxp1;
+	struct cvmx_pip_stat4_prtx_s cn66xx;
+	struct cvmx_pip_stat4_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat5_x {
+	uint64_t u64;
+	struct cvmx_pip_stat5_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t h256to511:32;
+		uint64_t h128to255:32;
+#else
+		uint64_t h128to255:32;
+		uint64_t h256to511:32;
+#endif
+	} s;
+	struct cvmx_pip_stat5_x_s cn68xx;
+	struct cvmx_pip_stat5_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat5_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat5_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t h256to511:32;
 		uint64_t h128to255:32;
+#else
+		uint64_t h128to255:32;
+		uint64_t h256to511:32;
+#endif
 	} s;
 	struct cvmx_pip_stat5_prtx_s cn30xx;
 	struct cvmx_pip_stat5_prtx_s cn31xx;
@@ -1032,13 +2707,38 @@ union cvmx_pip_stat5_prtx {
 	struct cvmx_pip_stat5_prtx_s cn56xxp1;
 	struct cvmx_pip_stat5_prtx_s cn58xx;
 	struct cvmx_pip_stat5_prtx_s cn58xxp1;
+	struct cvmx_pip_stat5_prtx_s cn61xx;
+	struct cvmx_pip_stat5_prtx_s cn63xx;
+	struct cvmx_pip_stat5_prtx_s cn63xxp1;
+	struct cvmx_pip_stat5_prtx_s cn66xx;
+	struct cvmx_pip_stat5_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat6_x {
+	uint64_t u64;
+	struct cvmx_pip_stat6_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t h1024to1518:32;
+		uint64_t h512to1023:32;
+#else
+		uint64_t h512to1023:32;
+		uint64_t h1024to1518:32;
+#endif
+	} s;
+	struct cvmx_pip_stat6_x_s cn68xx;
+	struct cvmx_pip_stat6_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat6_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat6_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t h1024to1518:32;
 		uint64_t h512to1023:32;
+#else
+		uint64_t h512to1023:32;
+		uint64_t h1024to1518:32;
+#endif
 	} s;
 	struct cvmx_pip_stat6_prtx_s cn30xx;
 	struct cvmx_pip_stat6_prtx_s cn31xx;
@@ -1051,13 +2751,38 @@ union cvmx_pip_stat6_prtx {
 	struct cvmx_pip_stat6_prtx_s cn56xxp1;
 	struct cvmx_pip_stat6_prtx_s cn58xx;
 	struct cvmx_pip_stat6_prtx_s cn58xxp1;
+	struct cvmx_pip_stat6_prtx_s cn61xx;
+	struct cvmx_pip_stat6_prtx_s cn63xx;
+	struct cvmx_pip_stat6_prtx_s cn63xxp1;
+	struct cvmx_pip_stat6_prtx_s cn66xx;
+	struct cvmx_pip_stat6_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat7_x {
+	uint64_t u64;
+	struct cvmx_pip_stat7_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t fcs:32;
+		uint64_t h1519:32;
+#else
+		uint64_t h1519:32;
+		uint64_t fcs:32;
+#endif
+	} s;
+	struct cvmx_pip_stat7_x_s cn68xx;
+	struct cvmx_pip_stat7_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat7_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat7_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t fcs:32;
 		uint64_t h1519:32;
+#else
+		uint64_t h1519:32;
+		uint64_t fcs:32;
+#endif
 	} s;
 	struct cvmx_pip_stat7_prtx_s cn30xx;
 	struct cvmx_pip_stat7_prtx_s cn31xx;
@@ -1070,13 +2795,38 @@ union cvmx_pip_stat7_prtx {
 	struct cvmx_pip_stat7_prtx_s cn56xxp1;
 	struct cvmx_pip_stat7_prtx_s cn58xx;
 	struct cvmx_pip_stat7_prtx_s cn58xxp1;
+	struct cvmx_pip_stat7_prtx_s cn61xx;
+	struct cvmx_pip_stat7_prtx_s cn63xx;
+	struct cvmx_pip_stat7_prtx_s cn63xxp1;
+	struct cvmx_pip_stat7_prtx_s cn66xx;
+	struct cvmx_pip_stat7_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat8_x {
+	uint64_t u64;
+	struct cvmx_pip_stat8_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t frag:32;
+		uint64_t undersz:32;
+#else
+		uint64_t undersz:32;
+		uint64_t frag:32;
+#endif
+	} s;
+	struct cvmx_pip_stat8_x_s cn68xx;
+	struct cvmx_pip_stat8_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat8_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat8_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t frag:32;
 		uint64_t undersz:32;
+#else
+		uint64_t undersz:32;
+		uint64_t frag:32;
+#endif
 	} s;
 	struct cvmx_pip_stat8_prtx_s cn30xx;
 	struct cvmx_pip_stat8_prtx_s cn31xx;
@@ -1089,13 +2839,38 @@ union cvmx_pip_stat8_prtx {
 	struct cvmx_pip_stat8_prtx_s cn56xxp1;
 	struct cvmx_pip_stat8_prtx_s cn58xx;
 	struct cvmx_pip_stat8_prtx_s cn58xxp1;
+	struct cvmx_pip_stat8_prtx_s cn61xx;
+	struct cvmx_pip_stat8_prtx_s cn63xx;
+	struct cvmx_pip_stat8_prtx_s cn63xxp1;
+	struct cvmx_pip_stat8_prtx_s cn66xx;
+	struct cvmx_pip_stat8_prtx_s cnf71xx;
+};
+
+union cvmx_pip_stat9_x {
+	uint64_t u64;
+	struct cvmx_pip_stat9_x_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t jabber:32;
+		uint64_t oversz:32;
+#else
+		uint64_t oversz:32;
+		uint64_t jabber:32;
+#endif
+	} s;
+	struct cvmx_pip_stat9_x_s cn68xx;
+	struct cvmx_pip_stat9_x_s cn68xxp1;
 };
 
 union cvmx_pip_stat9_prtx {
 	uint64_t u64;
 	struct cvmx_pip_stat9_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t jabber:32;
 		uint64_t oversz:32;
+#else
+		uint64_t oversz:32;
+		uint64_t jabber:32;
+#endif
 	} s;
 	struct cvmx_pip_stat9_prtx_s cn30xx;
 	struct cvmx_pip_stat9_prtx_s cn31xx;
@@ -1108,32 +2883,66 @@ union cvmx_pip_stat9_prtx {
 	struct cvmx_pip_stat9_prtx_s cn56xxp1;
 	struct cvmx_pip_stat9_prtx_s cn58xx;
 	struct cvmx_pip_stat9_prtx_s cn58xxp1;
+	struct cvmx_pip_stat9_prtx_s cn61xx;
+	struct cvmx_pip_stat9_prtx_s cn63xx;
+	struct cvmx_pip_stat9_prtx_s cn63xxp1;
+	struct cvmx_pip_stat9_prtx_s cn66xx;
+	struct cvmx_pip_stat9_prtx_s cnf71xx;
 };
 
 union cvmx_pip_stat_ctl {
 	uint64_t u64;
 	struct cvmx_pip_stat_ctl_s {
-		uint64_t reserved_1_63:63;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_9_63:55;
+		uint64_t mode:1;
+		uint64_t reserved_1_7:7;
+		uint64_t rdclr:1;
+#else
 		uint64_t rdclr:1;
+		uint64_t reserved_1_7:7;
+		uint64_t mode:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
-	struct cvmx_pip_stat_ctl_s cn30xx;
-	struct cvmx_pip_stat_ctl_s cn31xx;
-	struct cvmx_pip_stat_ctl_s cn38xx;
-	struct cvmx_pip_stat_ctl_s cn38xxp2;
-	struct cvmx_pip_stat_ctl_s cn50xx;
-	struct cvmx_pip_stat_ctl_s cn52xx;
-	struct cvmx_pip_stat_ctl_s cn52xxp1;
-	struct cvmx_pip_stat_ctl_s cn56xx;
-	struct cvmx_pip_stat_ctl_s cn56xxp1;
-	struct cvmx_pip_stat_ctl_s cn58xx;
-	struct cvmx_pip_stat_ctl_s cn58xxp1;
+	struct cvmx_pip_stat_ctl_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_1_63:63;
+		uint64_t rdclr:1;
+#else
+		uint64_t rdclr:1;
+		uint64_t reserved_1_63:63;
+#endif
+	} cn30xx;
+	struct cvmx_pip_stat_ctl_cn30xx cn31xx;
+	struct cvmx_pip_stat_ctl_cn30xx cn38xx;
+	struct cvmx_pip_stat_ctl_cn30xx cn38xxp2;
+	struct cvmx_pip_stat_ctl_cn30xx cn50xx;
+	struct cvmx_pip_stat_ctl_cn30xx cn52xx;
+	struct cvmx_pip_stat_ctl_cn30xx cn52xxp1;
+	struct cvmx_pip_stat_ctl_cn30xx cn56xx;
+	struct cvmx_pip_stat_ctl_cn30xx cn56xxp1;
+	struct cvmx_pip_stat_ctl_cn30xx cn58xx;
+	struct cvmx_pip_stat_ctl_cn30xx cn58xxp1;
+	struct cvmx_pip_stat_ctl_cn30xx cn61xx;
+	struct cvmx_pip_stat_ctl_cn30xx cn63xx;
+	struct cvmx_pip_stat_ctl_cn30xx cn63xxp1;
+	struct cvmx_pip_stat_ctl_cn30xx cn66xx;
+	struct cvmx_pip_stat_ctl_s cn68xx;
+	struct cvmx_pip_stat_ctl_s cn68xxp1;
+	struct cvmx_pip_stat_ctl_cn30xx cnf71xx;
 };
 
 union cvmx_pip_stat_inb_errsx {
 	uint64_t u64;
 	struct cvmx_pip_stat_inb_errsx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t errs:16;
+#else
+		uint64_t errs:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pip_stat_inb_errsx_s cn30xx;
 	struct cvmx_pip_stat_inb_errsx_s cn31xx;
@@ -1146,13 +2955,38 @@ union cvmx_pip_stat_inb_errsx {
 	struct cvmx_pip_stat_inb_errsx_s cn56xxp1;
 	struct cvmx_pip_stat_inb_errsx_s cn58xx;
 	struct cvmx_pip_stat_inb_errsx_s cn58xxp1;
+	struct cvmx_pip_stat_inb_errsx_s cn61xx;
+	struct cvmx_pip_stat_inb_errsx_s cn63xx;
+	struct cvmx_pip_stat_inb_errsx_s cn63xxp1;
+	struct cvmx_pip_stat_inb_errsx_s cn66xx;
+	struct cvmx_pip_stat_inb_errsx_s cnf71xx;
+};
+
+union cvmx_pip_stat_inb_errs_pkndx {
+	uint64_t u64;
+	struct cvmx_pip_stat_inb_errs_pkndx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t errs:16;
+#else
+		uint64_t errs:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_pip_stat_inb_errs_pkndx_s cn68xx;
+	struct cvmx_pip_stat_inb_errs_pkndx_s cn68xxp1;
 };
 
 union cvmx_pip_stat_inb_octsx {
 	uint64_t u64;
 	struct cvmx_pip_stat_inb_octsx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t octs:48;
+#else
+		uint64_t octs:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_pip_stat_inb_octsx_s cn30xx;
 	struct cvmx_pip_stat_inb_octsx_s cn31xx;
@@ -1165,13 +2999,38 @@ union cvmx_pip_stat_inb_octsx {
 	struct cvmx_pip_stat_inb_octsx_s cn56xxp1;
 	struct cvmx_pip_stat_inb_octsx_s cn58xx;
 	struct cvmx_pip_stat_inb_octsx_s cn58xxp1;
+	struct cvmx_pip_stat_inb_octsx_s cn61xx;
+	struct cvmx_pip_stat_inb_octsx_s cn63xx;
+	struct cvmx_pip_stat_inb_octsx_s cn63xxp1;
+	struct cvmx_pip_stat_inb_octsx_s cn66xx;
+	struct cvmx_pip_stat_inb_octsx_s cnf71xx;
+};
+
+union cvmx_pip_stat_inb_octs_pkndx {
+	uint64_t u64;
+	struct cvmx_pip_stat_inb_octs_pkndx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_48_63:16;
+		uint64_t octs:48;
+#else
+		uint64_t octs:48;
+		uint64_t reserved_48_63:16;
+#endif
+	} s;
+	struct cvmx_pip_stat_inb_octs_pkndx_s cn68xx;
+	struct cvmx_pip_stat_inb_octs_pkndx_s cn68xxp1;
 };
 
 union cvmx_pip_stat_inb_pktsx {
 	uint64_t u64;
 	struct cvmx_pip_stat_inb_pktsx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t pkts:32;
+#else
+		uint64_t pkts:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pip_stat_inb_pktsx_s cn30xx;
 	struct cvmx_pip_stat_inb_pktsx_s cn31xx;
@@ -1184,13 +3043,51 @@ union cvmx_pip_stat_inb_pktsx {
 	struct cvmx_pip_stat_inb_pktsx_s cn56xxp1;
 	struct cvmx_pip_stat_inb_pktsx_s cn58xx;
 	struct cvmx_pip_stat_inb_pktsx_s cn58xxp1;
+	struct cvmx_pip_stat_inb_pktsx_s cn61xx;
+	struct cvmx_pip_stat_inb_pktsx_s cn63xx;
+	struct cvmx_pip_stat_inb_pktsx_s cn63xxp1;
+	struct cvmx_pip_stat_inb_pktsx_s cn66xx;
+	struct cvmx_pip_stat_inb_pktsx_s cnf71xx;
+};
+
+union cvmx_pip_stat_inb_pkts_pkndx {
+	uint64_t u64;
+	struct cvmx_pip_stat_inb_pkts_pkndx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t pkts:32;
+#else
+		uint64_t pkts:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_pip_stat_inb_pkts_pkndx_s cn68xx;
+	struct cvmx_pip_stat_inb_pkts_pkndx_s cn68xxp1;
+};
+
+union cvmx_pip_sub_pkind_fcsx {
+	uint64_t u64;
+	struct cvmx_pip_sub_pkind_fcsx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t port_bit:64;
+#else
+		uint64_t port_bit:64;
+#endif
+	} s;
+	struct cvmx_pip_sub_pkind_fcsx_s cn68xx;
+	struct cvmx_pip_sub_pkind_fcsx_s cn68xxp1;
 };
 
 union cvmx_pip_tag_incx {
 	uint64_t u64;
 	struct cvmx_pip_tag_incx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t en:8;
+#else
+		uint64_t en:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_pip_tag_incx_s cn30xx;
 	struct cvmx_pip_tag_incx_s cn31xx;
@@ -1203,13 +3100,25 @@ union cvmx_pip_tag_incx {
 	struct cvmx_pip_tag_incx_s cn56xxp1;
 	struct cvmx_pip_tag_incx_s cn58xx;
 	struct cvmx_pip_tag_incx_s cn58xxp1;
+	struct cvmx_pip_tag_incx_s cn61xx;
+	struct cvmx_pip_tag_incx_s cn63xx;
+	struct cvmx_pip_tag_incx_s cn63xxp1;
+	struct cvmx_pip_tag_incx_s cn66xx;
+	struct cvmx_pip_tag_incx_s cn68xx;
+	struct cvmx_pip_tag_incx_s cn68xxp1;
+	struct cvmx_pip_tag_incx_s cnf71xx;
 };
 
 union cvmx_pip_tag_mask {
 	uint64_t u64;
 	struct cvmx_pip_tag_mask_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t mask:16;
+#else
+		uint64_t mask:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pip_tag_mask_s cn30xx;
 	struct cvmx_pip_tag_mask_s cn31xx;
@@ -1222,14 +3131,27 @@ union cvmx_pip_tag_mask {
 	struct cvmx_pip_tag_mask_s cn56xxp1;
 	struct cvmx_pip_tag_mask_s cn58xx;
 	struct cvmx_pip_tag_mask_s cn58xxp1;
+	struct cvmx_pip_tag_mask_s cn61xx;
+	struct cvmx_pip_tag_mask_s cn63xx;
+	struct cvmx_pip_tag_mask_s cn63xxp1;
+	struct cvmx_pip_tag_mask_s cn66xx;
+	struct cvmx_pip_tag_mask_s cn68xx;
+	struct cvmx_pip_tag_mask_s cn68xxp1;
+	struct cvmx_pip_tag_mask_s cnf71xx;
 };
 
 union cvmx_pip_tag_secret {
 	uint64_t u64;
 	struct cvmx_pip_tag_secret_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t dst:16;
 		uint64_t src:16;
+#else
+		uint64_t src:16;
+		uint64_t dst:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pip_tag_secret_s cn30xx;
 	struct cvmx_pip_tag_secret_s cn31xx;
@@ -1242,14 +3164,27 @@ union cvmx_pip_tag_secret {
 	struct cvmx_pip_tag_secret_s cn56xxp1;
 	struct cvmx_pip_tag_secret_s cn58xx;
 	struct cvmx_pip_tag_secret_s cn58xxp1;
+	struct cvmx_pip_tag_secret_s cn61xx;
+	struct cvmx_pip_tag_secret_s cn63xx;
+	struct cvmx_pip_tag_secret_s cn63xxp1;
+	struct cvmx_pip_tag_secret_s cn66xx;
+	struct cvmx_pip_tag_secret_s cn68xx;
+	struct cvmx_pip_tag_secret_s cn68xxp1;
+	struct cvmx_pip_tag_secret_s cnf71xx;
 };
 
 union cvmx_pip_todo_entry {
 	uint64_t u64;
 	struct cvmx_pip_todo_entry_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t val:1;
 		uint64_t reserved_62_62:1;
 		uint64_t entry:62;
+#else
+		uint64_t entry:62;
+		uint64_t reserved_62_62:1;
+		uint64_t val:1;
+#endif
 	} s;
 	struct cvmx_pip_todo_entry_s cn30xx;
 	struct cvmx_pip_todo_entry_s cn31xx;
@@ -1262,6 +3197,226 @@ union cvmx_pip_todo_entry {
 	struct cvmx_pip_todo_entry_s cn56xxp1;
 	struct cvmx_pip_todo_entry_s cn58xx;
 	struct cvmx_pip_todo_entry_s cn58xxp1;
+	struct cvmx_pip_todo_entry_s cn61xx;
+	struct cvmx_pip_todo_entry_s cn63xx;
+	struct cvmx_pip_todo_entry_s cn63xxp1;
+	struct cvmx_pip_todo_entry_s cn66xx;
+	struct cvmx_pip_todo_entry_s cn68xx;
+	struct cvmx_pip_todo_entry_s cn68xxp1;
+	struct cvmx_pip_todo_entry_s cnf71xx;
+};
+
+union cvmx_pip_vlan_etypesx {
+	uint64_t u64;
+	struct cvmx_pip_vlan_etypesx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t type3:16;
+		uint64_t type2:16;
+		uint64_t type1:16;
+		uint64_t type0:16;
+#else
+		uint64_t type0:16;
+		uint64_t type1:16;
+		uint64_t type2:16;
+		uint64_t type3:16;
+#endif
+	} s;
+	struct cvmx_pip_vlan_etypesx_s cn61xx;
+	struct cvmx_pip_vlan_etypesx_s cn66xx;
+	struct cvmx_pip_vlan_etypesx_s cn68xx;
+	struct cvmx_pip_vlan_etypesx_s cnf71xx;
+};
+
+union cvmx_pip_xstat0_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat0_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t drp_pkts:32;
+		uint64_t drp_octs:32;
+#else
+		uint64_t drp_octs:32;
+		uint64_t drp_pkts:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat0_prtx_s cn63xx;
+	struct cvmx_pip_xstat0_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat0_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat10_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat10_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bcast:32;
+		uint64_t mcast:32;
+#else
+		uint64_t mcast:32;
+		uint64_t bcast:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat10_prtx_s cn63xx;
+	struct cvmx_pip_xstat10_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat10_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat11_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat11_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bcast:32;
+		uint64_t mcast:32;
+#else
+		uint64_t mcast:32;
+		uint64_t bcast:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat11_prtx_s cn63xx;
+	struct cvmx_pip_xstat11_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat11_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat1_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat1_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_48_63:16;
+		uint64_t octs:48;
+#else
+		uint64_t octs:48;
+		uint64_t reserved_48_63:16;
+#endif
+	} s;
+	struct cvmx_pip_xstat1_prtx_s cn63xx;
+	struct cvmx_pip_xstat1_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat1_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat2_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat2_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t pkts:32;
+		uint64_t raw:32;
+#else
+		uint64_t raw:32;
+		uint64_t pkts:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat2_prtx_s cn63xx;
+	struct cvmx_pip_xstat2_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat2_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat3_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat3_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t bcst:32;
+		uint64_t mcst:32;
+#else
+		uint64_t mcst:32;
+		uint64_t bcst:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat3_prtx_s cn63xx;
+	struct cvmx_pip_xstat3_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat3_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat4_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat4_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t h65to127:32;
+		uint64_t h64:32;
+#else
+		uint64_t h64:32;
+		uint64_t h65to127:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat4_prtx_s cn63xx;
+	struct cvmx_pip_xstat4_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat4_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat5_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat5_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t h256to511:32;
+		uint64_t h128to255:32;
+#else
+		uint64_t h128to255:32;
+		uint64_t h256to511:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat5_prtx_s cn63xx;
+	struct cvmx_pip_xstat5_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat5_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat6_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat6_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t h1024to1518:32;
+		uint64_t h512to1023:32;
+#else
+		uint64_t h512to1023:32;
+		uint64_t h1024to1518:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat6_prtx_s cn63xx;
+	struct cvmx_pip_xstat6_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat6_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat7_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat7_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t fcs:32;
+		uint64_t h1519:32;
+#else
+		uint64_t h1519:32;
+		uint64_t fcs:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat7_prtx_s cn63xx;
+	struct cvmx_pip_xstat7_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat7_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat8_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat8_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t frag:32;
+		uint64_t undersz:32;
+#else
+		uint64_t undersz:32;
+		uint64_t frag:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat8_prtx_s cn63xx;
+	struct cvmx_pip_xstat8_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat8_prtx_s cn66xx;
+};
+
+union cvmx_pip_xstat9_prtx {
+	uint64_t u64;
+	struct cvmx_pip_xstat9_prtx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t jabber:32;
+		uint64_t oversz:32;
+#else
+		uint64_t oversz:32;
+		uint64_t jabber:32;
+#endif
+	} s;
+	struct cvmx_pip_xstat9_prtx_s cn63xx;
+	struct cvmx_pip_xstat9_prtx_s cn63xxp1;
+	struct cvmx_pip_xstat9_prtx_s cn66xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-pko-defs.h b/arch/mips/include/asm/octeon/cvmx-pko-defs.h
index 50e779cf1ad..87c3b970cad 100644
--- a/arch/mips/include/asm/octeon/cvmx-pko-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pko-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,94 +28,74 @@
 #ifndef __CVMX_PKO_DEFS_H__
 #define __CVMX_PKO_DEFS_H__
 
-#define CVMX_PKO_MEM_COUNT0 \
-	 CVMX_ADD_IO_SEG(0x0001180050001080ull)
-#define CVMX_PKO_MEM_COUNT1 \
-	 CVMX_ADD_IO_SEG(0x0001180050001088ull)
-#define CVMX_PKO_MEM_DEBUG0 \
-	 CVMX_ADD_IO_SEG(0x0001180050001100ull)
-#define CVMX_PKO_MEM_DEBUG1 \
-	 CVMX_ADD_IO_SEG(0x0001180050001108ull)
-#define CVMX_PKO_MEM_DEBUG10 \
-	 CVMX_ADD_IO_SEG(0x0001180050001150ull)
-#define CVMX_PKO_MEM_DEBUG11 \
-	 CVMX_ADD_IO_SEG(0x0001180050001158ull)
-#define CVMX_PKO_MEM_DEBUG12 \
-	 CVMX_ADD_IO_SEG(0x0001180050001160ull)
-#define CVMX_PKO_MEM_DEBUG13 \
-	 CVMX_ADD_IO_SEG(0x0001180050001168ull)
-#define CVMX_PKO_MEM_DEBUG14 \
-	 CVMX_ADD_IO_SEG(0x0001180050001170ull)
-#define CVMX_PKO_MEM_DEBUG2 \
-	 CVMX_ADD_IO_SEG(0x0001180050001110ull)
-#define CVMX_PKO_MEM_DEBUG3 \
-	 CVMX_ADD_IO_SEG(0x0001180050001118ull)
-#define CVMX_PKO_MEM_DEBUG4 \
-	 CVMX_ADD_IO_SEG(0x0001180050001120ull)
-#define CVMX_PKO_MEM_DEBUG5 \
-	 CVMX_ADD_IO_SEG(0x0001180050001128ull)
-#define CVMX_PKO_MEM_DEBUG6 \
-	 CVMX_ADD_IO_SEG(0x0001180050001130ull)
-#define CVMX_PKO_MEM_DEBUG7 \
-	 CVMX_ADD_IO_SEG(0x0001180050001138ull)
-#define CVMX_PKO_MEM_DEBUG8 \
-	 CVMX_ADD_IO_SEG(0x0001180050001140ull)
-#define CVMX_PKO_MEM_DEBUG9 \
-	 CVMX_ADD_IO_SEG(0x0001180050001148ull)
-#define CVMX_PKO_MEM_PORT_PTRS \
-	 CVMX_ADD_IO_SEG(0x0001180050001010ull)
-#define CVMX_PKO_MEM_PORT_QOS \
-	 CVMX_ADD_IO_SEG(0x0001180050001018ull)
-#define CVMX_PKO_MEM_PORT_RATE0 \
-	 CVMX_ADD_IO_SEG(0x0001180050001020ull)
-#define CVMX_PKO_MEM_PORT_RATE1 \
-	 CVMX_ADD_IO_SEG(0x0001180050001028ull)
-#define CVMX_PKO_MEM_QUEUE_PTRS \
-	 CVMX_ADD_IO_SEG(0x0001180050001000ull)
-#define CVMX_PKO_MEM_QUEUE_QOS \
-	 CVMX_ADD_IO_SEG(0x0001180050001008ull)
-#define CVMX_PKO_REG_BIST_RESULT \
-	 CVMX_ADD_IO_SEG(0x0001180050000080ull)
-#define CVMX_PKO_REG_CMD_BUF \
-	 CVMX_ADD_IO_SEG(0x0001180050000010ull)
-#define CVMX_PKO_REG_CRC_CTLX(offset) \
-	 CVMX_ADD_IO_SEG(0x0001180050000028ull + (((offset) & 1) * 8))
-#define CVMX_PKO_REG_CRC_ENABLE \
-	 CVMX_ADD_IO_SEG(0x0001180050000020ull)
-#define CVMX_PKO_REG_CRC_IVX(offset) \
-	 CVMX_ADD_IO_SEG(0x0001180050000038ull + (((offset) & 1) * 8))
-#define CVMX_PKO_REG_DEBUG0 \
-	 CVMX_ADD_IO_SEG(0x0001180050000098ull)
-#define CVMX_PKO_REG_DEBUG1 \
-	 CVMX_ADD_IO_SEG(0x00011800500000A0ull)
-#define CVMX_PKO_REG_DEBUG2 \
-	 CVMX_ADD_IO_SEG(0x00011800500000A8ull)
-#define CVMX_PKO_REG_DEBUG3 \
-	 CVMX_ADD_IO_SEG(0x00011800500000B0ull)
-#define CVMX_PKO_REG_ENGINE_INFLIGHT \
-	 CVMX_ADD_IO_SEG(0x0001180050000050ull)
-#define CVMX_PKO_REG_ENGINE_THRESH \
-	 CVMX_ADD_IO_SEG(0x0001180050000058ull)
-#define CVMX_PKO_REG_ERROR \
-	 CVMX_ADD_IO_SEG(0x0001180050000088ull)
-#define CVMX_PKO_REG_FLAGS \
-	 CVMX_ADD_IO_SEG(0x0001180050000000ull)
-#define CVMX_PKO_REG_GMX_PORT_MODE \
-	 CVMX_ADD_IO_SEG(0x0001180050000018ull)
-#define CVMX_PKO_REG_INT_MASK \
-	 CVMX_ADD_IO_SEG(0x0001180050000090ull)
-#define CVMX_PKO_REG_QUEUE_MODE \
-	 CVMX_ADD_IO_SEG(0x0001180050000048ull)
-#define CVMX_PKO_REG_QUEUE_PTRS1 \
-	 CVMX_ADD_IO_SEG(0x0001180050000100ull)
-#define CVMX_PKO_REG_READ_IDX \
-	 CVMX_ADD_IO_SEG(0x0001180050000008ull)
+#define CVMX_PKO_MEM_COUNT0 (CVMX_ADD_IO_SEG(0x0001180050001080ull))
+#define CVMX_PKO_MEM_COUNT1 (CVMX_ADD_IO_SEG(0x0001180050001088ull))
+#define CVMX_PKO_MEM_DEBUG0 (CVMX_ADD_IO_SEG(0x0001180050001100ull))
+#define CVMX_PKO_MEM_DEBUG1 (CVMX_ADD_IO_SEG(0x0001180050001108ull))
+#define CVMX_PKO_MEM_DEBUG10 (CVMX_ADD_IO_SEG(0x0001180050001150ull))
+#define CVMX_PKO_MEM_DEBUG11 (CVMX_ADD_IO_SEG(0x0001180050001158ull))
+#define CVMX_PKO_MEM_DEBUG12 (CVMX_ADD_IO_SEG(0x0001180050001160ull))
+#define CVMX_PKO_MEM_DEBUG13 (CVMX_ADD_IO_SEG(0x0001180050001168ull))
+#define CVMX_PKO_MEM_DEBUG14 (CVMX_ADD_IO_SEG(0x0001180050001170ull))
+#define CVMX_PKO_MEM_DEBUG2 (CVMX_ADD_IO_SEG(0x0001180050001110ull))
+#define CVMX_PKO_MEM_DEBUG3 (CVMX_ADD_IO_SEG(0x0001180050001118ull))
+#define CVMX_PKO_MEM_DEBUG4 (CVMX_ADD_IO_SEG(0x0001180050001120ull))
+#define CVMX_PKO_MEM_DEBUG5 (CVMX_ADD_IO_SEG(0x0001180050001128ull))
+#define CVMX_PKO_MEM_DEBUG6 (CVMX_ADD_IO_SEG(0x0001180050001130ull))
+#define CVMX_PKO_MEM_DEBUG7 (CVMX_ADD_IO_SEG(0x0001180050001138ull))
+#define CVMX_PKO_MEM_DEBUG8 (CVMX_ADD_IO_SEG(0x0001180050001140ull))
+#define CVMX_PKO_MEM_DEBUG9 (CVMX_ADD_IO_SEG(0x0001180050001148ull))
+#define CVMX_PKO_MEM_IPORT_PTRS (CVMX_ADD_IO_SEG(0x0001180050001030ull))
+#define CVMX_PKO_MEM_IPORT_QOS (CVMX_ADD_IO_SEG(0x0001180050001038ull))
+#define CVMX_PKO_MEM_IQUEUE_PTRS (CVMX_ADD_IO_SEG(0x0001180050001040ull))
+#define CVMX_PKO_MEM_IQUEUE_QOS (CVMX_ADD_IO_SEG(0x0001180050001048ull))
+#define CVMX_PKO_MEM_PORT_PTRS (CVMX_ADD_IO_SEG(0x0001180050001010ull))
+#define CVMX_PKO_MEM_PORT_QOS (CVMX_ADD_IO_SEG(0x0001180050001018ull))
+#define CVMX_PKO_MEM_PORT_RATE0 (CVMX_ADD_IO_SEG(0x0001180050001020ull))
+#define CVMX_PKO_MEM_PORT_RATE1 (CVMX_ADD_IO_SEG(0x0001180050001028ull))
+#define CVMX_PKO_MEM_QUEUE_PTRS (CVMX_ADD_IO_SEG(0x0001180050001000ull))
+#define CVMX_PKO_MEM_QUEUE_QOS (CVMX_ADD_IO_SEG(0x0001180050001008ull))
+#define CVMX_PKO_MEM_THROTTLE_INT (CVMX_ADD_IO_SEG(0x0001180050001058ull))
+#define CVMX_PKO_MEM_THROTTLE_PIPE (CVMX_ADD_IO_SEG(0x0001180050001050ull))
+#define CVMX_PKO_REG_BIST_RESULT (CVMX_ADD_IO_SEG(0x0001180050000080ull))
+#define CVMX_PKO_REG_CMD_BUF (CVMX_ADD_IO_SEG(0x0001180050000010ull))
+#define CVMX_PKO_REG_CRC_CTLX(offset) (CVMX_ADD_IO_SEG(0x0001180050000028ull) + ((offset) & 1) * 8)
+#define CVMX_PKO_REG_CRC_ENABLE (CVMX_ADD_IO_SEG(0x0001180050000020ull))
+#define CVMX_PKO_REG_CRC_IVX(offset) (CVMX_ADD_IO_SEG(0x0001180050000038ull) + ((offset) & 1) * 8)
+#define CVMX_PKO_REG_DEBUG0 (CVMX_ADD_IO_SEG(0x0001180050000098ull))
+#define CVMX_PKO_REG_DEBUG1 (CVMX_ADD_IO_SEG(0x00011800500000A0ull))
+#define CVMX_PKO_REG_DEBUG2 (CVMX_ADD_IO_SEG(0x00011800500000A8ull))
+#define CVMX_PKO_REG_DEBUG3 (CVMX_ADD_IO_SEG(0x00011800500000B0ull))
+#define CVMX_PKO_REG_DEBUG4 (CVMX_ADD_IO_SEG(0x00011800500000B8ull))
+#define CVMX_PKO_REG_ENGINE_INFLIGHT (CVMX_ADD_IO_SEG(0x0001180050000050ull))
+#define CVMX_PKO_REG_ENGINE_INFLIGHT1 (CVMX_ADD_IO_SEG(0x0001180050000318ull))
+#define CVMX_PKO_REG_ENGINE_STORAGEX(offset) (CVMX_ADD_IO_SEG(0x0001180050000300ull) + ((offset) & 1) * 8)
+#define CVMX_PKO_REG_ENGINE_THRESH (CVMX_ADD_IO_SEG(0x0001180050000058ull))
+#define CVMX_PKO_REG_ERROR (CVMX_ADD_IO_SEG(0x0001180050000088ull))
+#define CVMX_PKO_REG_FLAGS (CVMX_ADD_IO_SEG(0x0001180050000000ull))
+#define CVMX_PKO_REG_GMX_PORT_MODE (CVMX_ADD_IO_SEG(0x0001180050000018ull))
+#define CVMX_PKO_REG_INT_MASK (CVMX_ADD_IO_SEG(0x0001180050000090ull))
+#define CVMX_PKO_REG_LOOPBACK_BPID (CVMX_ADD_IO_SEG(0x0001180050000118ull))
+#define CVMX_PKO_REG_LOOPBACK_PKIND (CVMX_ADD_IO_SEG(0x0001180050000068ull))
+#define CVMX_PKO_REG_MIN_PKT (CVMX_ADD_IO_SEG(0x0001180050000070ull))
+#define CVMX_PKO_REG_PREEMPT (CVMX_ADD_IO_SEG(0x0001180050000110ull))
+#define CVMX_PKO_REG_QUEUE_MODE (CVMX_ADD_IO_SEG(0x0001180050000048ull))
+#define CVMX_PKO_REG_QUEUE_PREEMPT (CVMX_ADD_IO_SEG(0x0001180050000108ull))
+#define CVMX_PKO_REG_QUEUE_PTRS1 (CVMX_ADD_IO_SEG(0x0001180050000100ull))
+#define CVMX_PKO_REG_READ_IDX (CVMX_ADD_IO_SEG(0x0001180050000008ull))
+#define CVMX_PKO_REG_THROTTLE (CVMX_ADD_IO_SEG(0x0001180050000078ull))
+#define CVMX_PKO_REG_TIMESTAMP (CVMX_ADD_IO_SEG(0x0001180050000060ull))
 
 union cvmx_pko_mem_count0 {
 	uint64_t u64;
 	struct cvmx_pko_mem_count0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t count:32;
+#else
+		uint64_t count:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pko_mem_count0_s cn30xx;
 	struct cvmx_pko_mem_count0_s cn31xx;
@@ -128,13 +108,25 @@ union cvmx_pko_mem_count0 {
 	struct cvmx_pko_mem_count0_s cn56xxp1;
 	struct cvmx_pko_mem_count0_s cn58xx;
 	struct cvmx_pko_mem_count0_s cn58xxp1;
+	struct cvmx_pko_mem_count0_s cn61xx;
+	struct cvmx_pko_mem_count0_s cn63xx;
+	struct cvmx_pko_mem_count0_s cn63xxp1;
+	struct cvmx_pko_mem_count0_s cn66xx;
+	struct cvmx_pko_mem_count0_s cn68xx;
+	struct cvmx_pko_mem_count0_s cn68xxp1;
+	struct cvmx_pko_mem_count0_s cnf71xx;
 };
 
 union cvmx_pko_mem_count1 {
 	uint64_t u64;
 	struct cvmx_pko_mem_count1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t count:48;
+#else
+		uint64_t count:48;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_pko_mem_count1_s cn30xx;
 	struct cvmx_pko_mem_count1_s cn31xx;
@@ -147,15 +139,29 @@ union cvmx_pko_mem_count1 {
 	struct cvmx_pko_mem_count1_s cn56xxp1;
 	struct cvmx_pko_mem_count1_s cn58xx;
 	struct cvmx_pko_mem_count1_s cn58xxp1;
+	struct cvmx_pko_mem_count1_s cn61xx;
+	struct cvmx_pko_mem_count1_s cn63xx;
+	struct cvmx_pko_mem_count1_s cn63xxp1;
+	struct cvmx_pko_mem_count1_s cn66xx;
+	struct cvmx_pko_mem_count1_s cn68xx;
+	struct cvmx_pko_mem_count1_s cn68xxp1;
+	struct cvmx_pko_mem_count1_s cnf71xx;
 };
 
 union cvmx_pko_mem_debug0 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t fau:28;
 		uint64_t cmd:14;
 		uint64_t segs:6;
 		uint64_t size:16;
+#else
+		uint64_t size:16;
+		uint64_t segs:6;
+		uint64_t cmd:14;
+		uint64_t fau:28;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug0_s cn30xx;
 	struct cvmx_pko_mem_debug0_s cn31xx;
@@ -168,16 +174,31 @@ union cvmx_pko_mem_debug0 {
 	struct cvmx_pko_mem_debug0_s cn56xxp1;
 	struct cvmx_pko_mem_debug0_s cn58xx;
 	struct cvmx_pko_mem_debug0_s cn58xxp1;
+	struct cvmx_pko_mem_debug0_s cn61xx;
+	struct cvmx_pko_mem_debug0_s cn63xx;
+	struct cvmx_pko_mem_debug0_s cn63xxp1;
+	struct cvmx_pko_mem_debug0_s cn66xx;
+	struct cvmx_pko_mem_debug0_s cn68xx;
+	struct cvmx_pko_mem_debug0_s cn68xxp1;
+	struct cvmx_pko_mem_debug0_s cnf71xx;
 };
 
 union cvmx_pko_mem_debug1 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t i:1;
 		uint64_t back:4;
 		uint64_t pool:3;
 		uint64_t size:16;
 		uint64_t ptr:40;
+#else
+		uint64_t ptr:40;
+		uint64_t size:16;
+		uint64_t pool:3;
+		uint64_t back:4;
+		uint64_t i:1;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug1_s cn30xx;
 	struct cvmx_pko_mem_debug1_s cn31xx;
@@ -190,27 +211,52 @@ union cvmx_pko_mem_debug1 {
 	struct cvmx_pko_mem_debug1_s cn56xxp1;
 	struct cvmx_pko_mem_debug1_s cn58xx;
 	struct cvmx_pko_mem_debug1_s cn58xxp1;
+	struct cvmx_pko_mem_debug1_s cn61xx;
+	struct cvmx_pko_mem_debug1_s cn63xx;
+	struct cvmx_pko_mem_debug1_s cn63xxp1;
+	struct cvmx_pko_mem_debug1_s cn66xx;
+	struct cvmx_pko_mem_debug1_s cn68xx;
+	struct cvmx_pko_mem_debug1_s cn68xxp1;
+	struct cvmx_pko_mem_debug1_s cnf71xx;
 };
 
 union cvmx_pko_mem_debug10 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug10_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
 		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug10_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t fau:28;
 		uint64_t cmd:14;
 		uint64_t segs:6;
 		uint64_t size:16;
+#else
+		uint64_t size:16;
+		uint64_t segs:6;
+		uint64_t cmd:14;
+		uint64_t fau:28;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug10_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug10_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug10_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug10_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t ptrs1:17;
 		uint64_t reserved_17_31:15;
 		uint64_t ptrs2:17;
+#else
+		uint64_t ptrs2:17;
+		uint64_t reserved_17_31:15;
+		uint64_t ptrs1:17;
+		uint64_t reserved_49_63:15;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug10_cn50xx cn52xx;
 	struct cvmx_pko_mem_debug10_cn50xx cn52xxp1;
@@ -218,28 +264,52 @@ union cvmx_pko_mem_debug10 {
 	struct cvmx_pko_mem_debug10_cn50xx cn56xxp1;
 	struct cvmx_pko_mem_debug10_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug10_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug10_cn50xx cn61xx;
+	struct cvmx_pko_mem_debug10_cn50xx cn63xx;
+	struct cvmx_pko_mem_debug10_cn50xx cn63xxp1;
+	struct cvmx_pko_mem_debug10_cn50xx cn66xx;
+	struct cvmx_pko_mem_debug10_cn50xx cn68xx;
+	struct cvmx_pko_mem_debug10_cn50xx cn68xxp1;
+	struct cvmx_pko_mem_debug10_cn50xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug11 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug11_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t i:1;
 		uint64_t back:4;
 		uint64_t pool:3;
 		uint64_t size:16;
 		uint64_t reserved_0_39:40;
+#else
+		uint64_t reserved_0_39:40;
+		uint64_t size:16;
+		uint64_t pool:3;
+		uint64_t back:4;
+		uint64_t i:1;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug11_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t i:1;
 		uint64_t back:4;
 		uint64_t pool:3;
 		uint64_t size:16;
 		uint64_t ptr:40;
+#else
+		uint64_t ptr:40;
+		uint64_t size:16;
+		uint64_t pool:3;
+		uint64_t back:4;
+		uint64_t i:1;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug11_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug11_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug11_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug11_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t maj:1;
 		uint64_t uid:3;
@@ -248,6 +318,16 @@ union cvmx_pko_mem_debug11 {
 		uint64_t chk:1;
 		uint64_t cnt:13;
 		uint64_t mod:3;
+#else
+		uint64_t mod:3;
+		uint64_t cnt:13;
+		uint64_t chk:1;
+		uint64_t len:1;
+		uint64_t sop:1;
+		uint64_t uid:3;
+		uint64_t maj:1;
+		uint64_t reserved_23_63:41;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug11_cn50xx cn52xx;
 	struct cvmx_pko_mem_debug11_cn50xx cn52xxp1;
@@ -255,24 +335,46 @@ union cvmx_pko_mem_debug11 {
 	struct cvmx_pko_mem_debug11_cn50xx cn56xxp1;
 	struct cvmx_pko_mem_debug11_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug11_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug11_cn50xx cn61xx;
+	struct cvmx_pko_mem_debug11_cn50xx cn63xx;
+	struct cvmx_pko_mem_debug11_cn50xx cn63xxp1;
+	struct cvmx_pko_mem_debug11_cn50xx cn66xx;
+	struct cvmx_pko_mem_debug11_cn50xx cn68xx;
+	struct cvmx_pko_mem_debug11_cn50xx cn68xxp1;
+	struct cvmx_pko_mem_debug11_cn50xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug12 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug12_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
 		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug12_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:64;
+#else
+		uint64_t data:64;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug12_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug12_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug12_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug12_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t fau:28;
 		uint64_t cmd:14;
 		uint64_t segs:6;
 		uint64_t size:16;
+#else
+		uint64_t size:16;
+		uint64_t segs:6;
+		uint64_t cmd:14;
+		uint64_t fau:28;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug12_cn50xx cn52xx;
 	struct cvmx_pko_mem_debug12_cn50xx cn52xxp1;
@@ -280,31 +382,60 @@ union cvmx_pko_mem_debug12 {
 	struct cvmx_pko_mem_debug12_cn50xx cn56xxp1;
 	struct cvmx_pko_mem_debug12_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug12_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug12_cn50xx cn61xx;
+	struct cvmx_pko_mem_debug12_cn50xx cn63xx;
+	struct cvmx_pko_mem_debug12_cn50xx cn63xxp1;
+	struct cvmx_pko_mem_debug12_cn50xx cn66xx;
+	struct cvmx_pko_mem_debug12_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t state:64;
+#else
+		uint64_t state:64;
+#endif
+	} cn68xx;
+	struct cvmx_pko_mem_debug12_cn68xx cn68xxp1;
+	struct cvmx_pko_mem_debug12_cn50xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug13 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug13_s {
-		uint64_t i:1;
-		uint64_t back:4;
-		uint64_t pool:3;
-		uint64_t reserved_0_55:56;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug13_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_51_63:13;
 		uint64_t widx:17;
 		uint64_t ridx2:17;
 		uint64_t widx2:17;
+#else
+		uint64_t widx2:17;
+		uint64_t ridx2:17;
+		uint64_t widx:17;
+		uint64_t reserved_51_63:13;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug13_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug13_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug13_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug13_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t i:1;
 		uint64_t back:4;
 		uint64_t pool:3;
 		uint64_t size:16;
 		uint64_t ptr:40;
+#else
+		uint64_t ptr:40;
+		uint64_t size:16;
+		uint64_t pool:3;
+		uint64_t back:4;
+		uint64_t i:1;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug13_cn50xx cn52xx;
 	struct cvmx_pko_mem_debug13_cn50xx cn52xxp1;
@@ -312,36 +443,75 @@ union cvmx_pko_mem_debug13 {
 	struct cvmx_pko_mem_debug13_cn50xx cn56xxp1;
 	struct cvmx_pko_mem_debug13_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug13_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug13_cn50xx cn61xx;
+	struct cvmx_pko_mem_debug13_cn50xx cn63xx;
+	struct cvmx_pko_mem_debug13_cn50xx cn63xxp1;
+	struct cvmx_pko_mem_debug13_cn50xx cn66xx;
+	struct cvmx_pko_mem_debug13_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t state:64;
+#else
+		uint64_t state:64;
+#endif
+	} cn68xx;
+	struct cvmx_pko_mem_debug13_cn68xx cn68xxp1;
+	struct cvmx_pko_mem_debug13_cn50xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug14 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug14_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
 		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug14_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t ridx:17;
+#else
+		uint64_t ridx:17;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug14_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug14_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug14_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug14_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} cn52xx;
 	struct cvmx_pko_mem_debug14_cn52xx cn52xxp1;
 	struct cvmx_pko_mem_debug14_cn52xx cn56xx;
 	struct cvmx_pko_mem_debug14_cn52xx cn56xxp1;
+	struct cvmx_pko_mem_debug14_cn52xx cn61xx;
+	struct cvmx_pko_mem_debug14_cn52xx cn63xx;
+	struct cvmx_pko_mem_debug14_cn52xx cn63xxp1;
+	struct cvmx_pko_mem_debug14_cn52xx cn66xx;
+	struct cvmx_pko_mem_debug14_cn52xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug2 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t i:1;
 		uint64_t back:4;
 		uint64_t pool:3;
 		uint64_t size:16;
 		uint64_t ptr:40;
+#else
+		uint64_t ptr:40;
+		uint64_t size:16;
+		uint64_t pool:3;
+		uint64_t back:4;
+		uint64_t i:1;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug2_s cn30xx;
 	struct cvmx_pko_mem_debug2_s cn31xx;
@@ -354,25 +524,48 @@ union cvmx_pko_mem_debug2 {
 	struct cvmx_pko_mem_debug2_s cn56xxp1;
 	struct cvmx_pko_mem_debug2_s cn58xx;
 	struct cvmx_pko_mem_debug2_s cn58xxp1;
+	struct cvmx_pko_mem_debug2_s cn61xx;
+	struct cvmx_pko_mem_debug2_s cn63xx;
+	struct cvmx_pko_mem_debug2_s cn63xxp1;
+	struct cvmx_pko_mem_debug2_s cn66xx;
+	struct cvmx_pko_mem_debug2_s cn68xx;
+	struct cvmx_pko_mem_debug2_s cn68xxp1;
+	struct cvmx_pko_mem_debug2_s cnf71xx;
 };
 
 union cvmx_pko_mem_debug3 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug3_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t i:1;
 		uint64_t back:4;
 		uint64_t pool:3;
 		uint64_t size:16;
 		uint64_t ptr:40;
+#else
+		uint64_t ptr:40;
+		uint64_t size:16;
+		uint64_t pool:3;
+		uint64_t back:4;
+		uint64_t i:1;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug3_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug3_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug3_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug3_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug3_cn50xx cn52xx;
 	struct cvmx_pko_mem_debug3_cn50xx cn52xxp1;
@@ -380,20 +573,36 @@ union cvmx_pko_mem_debug3 {
 	struct cvmx_pko_mem_debug3_cn50xx cn56xxp1;
 	struct cvmx_pko_mem_debug3_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug3_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug3_cn50xx cn61xx;
+	struct cvmx_pko_mem_debug3_cn50xx cn63xx;
+	struct cvmx_pko_mem_debug3_cn50xx cn63xxp1;
+	struct cvmx_pko_mem_debug3_cn50xx cn66xx;
+	struct cvmx_pko_mem_debug3_cn50xx cn68xx;
+	struct cvmx_pko_mem_debug3_cn50xx cn68xxp1;
+	struct cvmx_pko_mem_debug3_cn50xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug4 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
 		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug4_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t data:64;
+#else
+		uint64_t data:64;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug4_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug4_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug4_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug4_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t cmnd_segs:3;
 		uint64_t cmnd_siz:16;
 		uint64_t cmnd_off:6;
@@ -412,8 +621,29 @@ union cvmx_pko_mem_debug4 {
 		uint64_t wait:1;
 		uint64_t minor:2;
 		uint64_t major:3;
+#else
+		uint64_t major:3;
+		uint64_t minor:2;
+		uint64_t wait:1;
+		uint64_t qid_base:8;
+		uint64_t qid_off:4;
+		uint64_t qid_off_max:4;
+		uint64_t qcb_ridx:5;
+		uint64_t qos:3;
+		uint64_t static_p:1;
+		uint64_t active:1;
+		uint64_t chk_mode:1;
+		uint64_t chk_once:1;
+		uint64_t init_dwrite:1;
+		uint64_t dread_sop:1;
+		uint64_t uid:3;
+		uint64_t cmnd_off:6;
+		uint64_t cmnd_siz:16;
+		uint64_t cmnd_segs:3;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug4_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t curr_siz:8;
 		uint64_t curr_off:16;
 		uint64_t cmnd_segs:6;
@@ -427,20 +657,47 @@ union cvmx_pko_mem_debug4 {
 		uint64_t wait:1;
 		uint64_t minor:2;
 		uint64_t major:3;
+#else
+		uint64_t major:3;
+		uint64_t minor:2;
+		uint64_t wait:1;
+		uint64_t chk_mode:1;
+		uint64_t chk_once:1;
+		uint64_t init_dwrite:1;
+		uint64_t dread_sop:1;
+		uint64_t uid:2;
+		uint64_t cmnd_off:6;
+		uint64_t cmnd_siz:16;
+		uint64_t cmnd_segs:6;
+		uint64_t curr_off:16;
+		uint64_t curr_siz:8;
+#endif
 	} cn52xx;
 	struct cvmx_pko_mem_debug4_cn52xx cn52xxp1;
 	struct cvmx_pko_mem_debug4_cn52xx cn56xx;
 	struct cvmx_pko_mem_debug4_cn52xx cn56xxp1;
 	struct cvmx_pko_mem_debug4_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug4_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug4_cn52xx cn61xx;
+	struct cvmx_pko_mem_debug4_cn52xx cn63xx;
+	struct cvmx_pko_mem_debug4_cn52xx cn63xxp1;
+	struct cvmx_pko_mem_debug4_cn52xx cn66xx;
+	struct cvmx_pko_mem_debug4_cn52xx cn68xx;
+	struct cvmx_pko_mem_debug4_cn52xx cn68xxp1;
+	struct cvmx_pko_mem_debug4_cn52xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug5 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug5_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
 		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug5_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t dwri_mod:1;
 		uint64_t dwri_sop:1;
 		uint64_t dwri_len:1;
@@ -460,32 +717,109 @@ union cvmx_pko_mem_debug5 {
 		uint64_t wait:1;
 		uint64_t minor:2;
 		uint64_t major:4;
+#else
+		uint64_t major:4;
+		uint64_t minor:2;
+		uint64_t wait:1;
+		uint64_t qid_base:7;
+		uint64_t qid_off:3;
+		uint64_t qcb_ridx:5;
+		uint64_t qos:3;
+		uint64_t active:1;
+		uint64_t chk_mode:1;
+		uint64_t reserved_27_27:1;
+		uint64_t cbuf_fre:1;
+		uint64_t xfer_dwr:1;
+		uint64_t xfer_wor:1;
+		uint64_t uid:1;
+		uint64_t cmnd_siz:16;
+		uint64_t dwri_cnt:13;
+		uint64_t dwri_len:1;
+		uint64_t dwri_sop:1;
+		uint64_t dwri_mod:1;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug5_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug5_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug5_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug5_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t curr_ptr:29;
 		uint64_t curr_siz:16;
 		uint64_t curr_off:16;
 		uint64_t cmnd_segs:3;
+#else
+		uint64_t cmnd_segs:3;
+		uint64_t curr_off:16;
+		uint64_t curr_siz:16;
+		uint64_t curr_ptr:29;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug5_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_54_63:10;
 		uint64_t nxt_inflt:6;
 		uint64_t curr_ptr:40;
 		uint64_t curr_siz:8;
+#else
+		uint64_t curr_siz:8;
+		uint64_t curr_ptr:40;
+		uint64_t nxt_inflt:6;
+		uint64_t reserved_54_63:10;
+#endif
 	} cn52xx;
 	struct cvmx_pko_mem_debug5_cn52xx cn52xxp1;
 	struct cvmx_pko_mem_debug5_cn52xx cn56xx;
 	struct cvmx_pko_mem_debug5_cn52xx cn56xxp1;
 	struct cvmx_pko_mem_debug5_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug5_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug5_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t ptp:1;
+		uint64_t major_3:1;
+		uint64_t nxt_inflt:6;
+		uint64_t curr_ptr:40;
+		uint64_t curr_siz:8;
+#else
+		uint64_t curr_siz:8;
+		uint64_t curr_ptr:40;
+		uint64_t nxt_inflt:6;
+		uint64_t major_3:1;
+		uint64_t ptp:1;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn61xx;
+	struct cvmx_pko_mem_debug5_cn61xx cn63xx;
+	struct cvmx_pko_mem_debug5_cn61xx cn63xxp1;
+	struct cvmx_pko_mem_debug5_cn61xx cn66xx;
+	struct cvmx_pko_mem_debug5_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_57_63:7;
+		uint64_t uid_2:1;
+		uint64_t ptp:1;
+		uint64_t major_3:1;
+		uint64_t nxt_inflt:6;
+		uint64_t curr_ptr:40;
+		uint64_t curr_siz:8;
+#else
+		uint64_t curr_siz:8;
+		uint64_t curr_ptr:40;
+		uint64_t nxt_inflt:6;
+		uint64_t major_3:1;
+		uint64_t ptp:1;
+		uint64_t uid_2:1;
+		uint64_t reserved_57_63:7;
+#endif
+	} cn68xx;
+	struct cvmx_pko_mem_debug5_cn68xx cn68xxp1;
+	struct cvmx_pko_mem_debug5_cn61xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug6 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug6_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t qid_offres:4;
 		uint64_t qid_offths:4;
@@ -498,8 +832,23 @@ union cvmx_pko_mem_debug6 {
 		uint64_t qcb_ridx:5;
 		uint64_t qid_offmax:4;
 		uint64_t reserved_0_11:12;
+#else
+		uint64_t reserved_0_11:12;
+		uint64_t qid_offmax:4;
+		uint64_t qcb_ridx:5;
+		uint64_t qos:3;
+		uint64_t statc:1;
+		uint64_t active:1;
+		uint64_t preempted:1;
+		uint64_t preemptee:1;
+		uint64_t preempter:1;
+		uint64_t qid_offths:4;
+		uint64_t qid_offres:4;
+		uint64_t reserved_37_63:27;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug6_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t qid_offm:3;
 		uint64_t static_p:1;
@@ -507,15 +856,30 @@ union cvmx_pko_mem_debug6 {
 		uint64_t dwri_chk:1;
 		uint64_t dwri_uid:1;
 		uint64_t dwri_mod:2;
+#else
+		uint64_t dwri_mod:2;
+		uint64_t dwri_uid:1;
+		uint64_t dwri_chk:1;
+		uint64_t work_min:3;
+		uint64_t static_p:1;
+		uint64_t qid_offm:3;
+		uint64_t reserved_11_63:53;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug6_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug6_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug6_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug6_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t curr_ptr:11;
+#else
+		uint64_t curr_ptr:11;
+		uint64_t reserved_11_63:53;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug6_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_37_63:27;
 		uint64_t qid_offres:4;
 		uint64_t qid_offths:4;
@@ -529,37 +893,77 @@ union cvmx_pko_mem_debug6 {
 		uint64_t qid_offmax:4;
 		uint64_t qid_off:4;
 		uint64_t qid_base:8;
+#else
+		uint64_t qid_base:8;
+		uint64_t qid_off:4;
+		uint64_t qid_offmax:4;
+		uint64_t qcb_ridx:5;
+		uint64_t qos:3;
+		uint64_t statc:1;
+		uint64_t active:1;
+		uint64_t preempted:1;
+		uint64_t preemptee:1;
+		uint64_t preempter:1;
+		uint64_t qid_offths:4;
+		uint64_t qid_offres:4;
+		uint64_t reserved_37_63:27;
+#endif
 	} cn52xx;
 	struct cvmx_pko_mem_debug6_cn52xx cn52xxp1;
 	struct cvmx_pko_mem_debug6_cn52xx cn56xx;
 	struct cvmx_pko_mem_debug6_cn52xx cn56xxp1;
 	struct cvmx_pko_mem_debug6_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug6_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug6_cn52xx cn61xx;
+	struct cvmx_pko_mem_debug6_cn52xx cn63xx;
+	struct cvmx_pko_mem_debug6_cn52xx cn63xxp1;
+	struct cvmx_pko_mem_debug6_cn52xx cn66xx;
+	struct cvmx_pko_mem_debug6_cn52xx cn68xx;
+	struct cvmx_pko_mem_debug6_cn52xx cn68xxp1;
+	struct cvmx_pko_mem_debug6_cn52xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug7 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug7_s {
-		uint64_t qos:5;
-		uint64_t tail:1;
-		uint64_t reserved_0_57:58;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug7_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_58_63:6;
 		uint64_t dwb:9;
 		uint64_t start:33;
 		uint64_t size:16;
+#else
+		uint64_t size:16;
+		uint64_t start:33;
+		uint64_t dwb:9;
+		uint64_t reserved_58_63:6;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug7_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug7_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug7_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug7_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t qos:5;
 		uint64_t tail:1;
 		uint64_t buf_siz:13;
 		uint64_t buf_ptr:33;
 		uint64_t qcb_widx:6;
 		uint64_t qcb_ridx:6;
+#else
+		uint64_t qcb_ridx:6;
+		uint64_t qcb_widx:6;
+		uint64_t buf_ptr:33;
+		uint64_t buf_siz:13;
+		uint64_t tail:1;
+		uint64_t qos:5;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug7_cn50xx cn52xx;
 	struct cvmx_pko_mem_debug7_cn50xx cn52xxp1;
@@ -567,28 +971,68 @@ union cvmx_pko_mem_debug7 {
 	struct cvmx_pko_mem_debug7_cn50xx cn56xxp1;
 	struct cvmx_pko_mem_debug7_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug7_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug7_cn50xx cn61xx;
+	struct cvmx_pko_mem_debug7_cn50xx cn63xx;
+	struct cvmx_pko_mem_debug7_cn50xx cn63xxp1;
+	struct cvmx_pko_mem_debug7_cn50xx cn66xx;
+	struct cvmx_pko_mem_debug7_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t qos:3;
+		uint64_t tail:1;
+		uint64_t buf_siz:13;
+		uint64_t buf_ptr:33;
+		uint64_t qcb_widx:7;
+		uint64_t qcb_ridx:7;
+#else
+		uint64_t qcb_ridx:7;
+		uint64_t qcb_widx:7;
+		uint64_t buf_ptr:33;
+		uint64_t buf_siz:13;
+		uint64_t tail:1;
+		uint64_t qos:3;
+#endif
+	} cn68xx;
+	struct cvmx_pko_mem_debug7_cn68xx cn68xxp1;
+	struct cvmx_pko_mem_debug7_cn50xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug8 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug8_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t tail:1;
 		uint64_t buf_siz:13;
 		uint64_t reserved_0_44:45;
+#else
+		uint64_t reserved_0_44:45;
+		uint64_t buf_siz:13;
+		uint64_t tail:1;
+		uint64_t reserved_59_63:5;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug8_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t qos:5;
 		uint64_t tail:1;
 		uint64_t buf_siz:13;
 		uint64_t buf_ptr:33;
 		uint64_t qcb_widx:6;
 		uint64_t qcb_ridx:6;
+#else
+		uint64_t qcb_ridx:6;
+		uint64_t qcb_widx:6;
+		uint64_t buf_ptr:33;
+		uint64_t buf_siz:13;
+		uint64_t tail:1;
+		uint64_t qos:5;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug8_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug8_cn30xx cn38xx;
 	struct cvmx_pko_mem_debug8_cn30xx cn38xxp2;
 	struct cvmx_pko_mem_debug8_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t doorbell:20;
 		uint64_t reserved_6_7:2;
@@ -596,8 +1040,18 @@ union cvmx_pko_mem_debug8 {
 		uint64_t s_tail:1;
 		uint64_t static_q:1;
 		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t static_q:1;
+		uint64_t s_tail:1;
+		uint64_t static_p:1;
+		uint64_t reserved_6_7:2;
+		uint64_t doorbell:20;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug8_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t preempter:1;
 		uint64_t doorbell:20;
@@ -607,31 +1061,115 @@ union cvmx_pko_mem_debug8 {
 		uint64_t s_tail:1;
 		uint64_t static_q:1;
 		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t static_q:1;
+		uint64_t s_tail:1;
+		uint64_t static_p:1;
+		uint64_t preemptee:1;
+		uint64_t reserved_7_7:1;
+		uint64_t doorbell:20;
+		uint64_t preempter:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn52xx;
 	struct cvmx_pko_mem_debug8_cn52xx cn52xxp1;
 	struct cvmx_pko_mem_debug8_cn52xx cn56xx;
 	struct cvmx_pko_mem_debug8_cn52xx cn56xxp1;
 	struct cvmx_pko_mem_debug8_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug8_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug8_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_42_63:22;
+		uint64_t qid_qqos:8;
+		uint64_t reserved_33_33:1;
+		uint64_t qid_idx:4;
+		uint64_t preempter:1;
+		uint64_t doorbell:20;
+		uint64_t reserved_7_7:1;
+		uint64_t preemptee:1;
+		uint64_t static_p:1;
+		uint64_t s_tail:1;
+		uint64_t static_q:1;
+		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t static_q:1;
+		uint64_t s_tail:1;
+		uint64_t static_p:1;
+		uint64_t preemptee:1;
+		uint64_t reserved_7_7:1;
+		uint64_t doorbell:20;
+		uint64_t preempter:1;
+		uint64_t qid_idx:4;
+		uint64_t reserved_33_33:1;
+		uint64_t qid_qqos:8;
+		uint64_t reserved_42_63:22;
+#endif
+	} cn61xx;
+	struct cvmx_pko_mem_debug8_cn52xx cn63xx;
+	struct cvmx_pko_mem_debug8_cn52xx cn63xxp1;
+	struct cvmx_pko_mem_debug8_cn61xx cn66xx;
+	struct cvmx_pko_mem_debug8_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_37_63:27;
+		uint64_t preempter:1;
+		uint64_t doorbell:20;
+		uint64_t reserved_9_15:7;
+		uint64_t preemptee:1;
+		uint64_t static_p:1;
+		uint64_t s_tail:1;
+		uint64_t static_q:1;
+		uint64_t qos:5;
+#else
+		uint64_t qos:5;
+		uint64_t static_q:1;
+		uint64_t s_tail:1;
+		uint64_t static_p:1;
+		uint64_t preemptee:1;
+		uint64_t reserved_9_15:7;
+		uint64_t doorbell:20;
+		uint64_t preempter:1;
+		uint64_t reserved_37_63:27;
+#endif
+	} cn68xx;
+	struct cvmx_pko_mem_debug8_cn68xx cn68xxp1;
+	struct cvmx_pko_mem_debug8_cn61xx cnf71xx;
 };
 
 union cvmx_pko_mem_debug9 {
 	uint64_t u64;
 	struct cvmx_pko_mem_debug9_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t ptrs0:17;
 		uint64_t reserved_0_31:32;
+#else
+		uint64_t reserved_0_31:32;
+		uint64_t ptrs0:17;
+		uint64_t reserved_49_63:15;
+#endif
 	} s;
 	struct cvmx_pko_mem_debug9_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t doorbell:20;
 		uint64_t reserved_5_7:3;
 		uint64_t s_tail:1;
 		uint64_t static_q:1;
 		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t static_q:1;
+		uint64_t s_tail:1;
+		uint64_t reserved_5_7:3;
+		uint64_t doorbell:20;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn30xx;
 	struct cvmx_pko_mem_debug9_cn30xx cn31xx;
 	struct cvmx_pko_mem_debug9_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t doorbell:20;
 		uint64_t reserved_6_7:2;
@@ -639,13 +1177,29 @@ union cvmx_pko_mem_debug9 {
 		uint64_t s_tail:1;
 		uint64_t static_q:1;
 		uint64_t qos:3;
+#else
+		uint64_t qos:3;
+		uint64_t static_q:1;
+		uint64_t s_tail:1;
+		uint64_t static_p:1;
+		uint64_t reserved_6_7:2;
+		uint64_t doorbell:20;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn38xx;
 	struct cvmx_pko_mem_debug9_cn38xx cn38xxp2;
 	struct cvmx_pko_mem_debug9_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t ptrs0:17;
 		uint64_t reserved_17_31:15;
 		uint64_t ptrs3:17;
+#else
+		uint64_t ptrs3:17;
+		uint64_t reserved_17_31:15;
+		uint64_t ptrs0:17;
+		uint64_t reserved_49_63:15;
+#endif
 	} cn50xx;
 	struct cvmx_pko_mem_debug9_cn50xx cn52xx;
 	struct cvmx_pko_mem_debug9_cn50xx cn52xxp1;
@@ -653,11 +1207,131 @@ union cvmx_pko_mem_debug9 {
 	struct cvmx_pko_mem_debug9_cn50xx cn56xxp1;
 	struct cvmx_pko_mem_debug9_cn50xx cn58xx;
 	struct cvmx_pko_mem_debug9_cn50xx cn58xxp1;
+	struct cvmx_pko_mem_debug9_cn50xx cn61xx;
+	struct cvmx_pko_mem_debug9_cn50xx cn63xx;
+	struct cvmx_pko_mem_debug9_cn50xx cn63xxp1;
+	struct cvmx_pko_mem_debug9_cn50xx cn66xx;
+	struct cvmx_pko_mem_debug9_cn50xx cn68xx;
+	struct cvmx_pko_mem_debug9_cn50xx cn68xxp1;
+	struct cvmx_pko_mem_debug9_cn50xx cnf71xx;
+};
+
+union cvmx_pko_mem_iport_ptrs {
+	uint64_t u64;
+	struct cvmx_pko_mem_iport_ptrs_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_63_63:1;
+		uint64_t crc:1;
+		uint64_t static_p:1;
+		uint64_t qos_mask:8;
+		uint64_t min_pkt:3;
+		uint64_t reserved_31_49:19;
+		uint64_t pipe:7;
+		uint64_t reserved_21_23:3;
+		uint64_t intr:5;
+		uint64_t reserved_13_15:3;
+		uint64_t eid:5;
+		uint64_t reserved_7_7:1;
+		uint64_t ipid:7;
+#else
+		uint64_t ipid:7;
+		uint64_t reserved_7_7:1;
+		uint64_t eid:5;
+		uint64_t reserved_13_15:3;
+		uint64_t intr:5;
+		uint64_t reserved_21_23:3;
+		uint64_t pipe:7;
+		uint64_t reserved_31_49:19;
+		uint64_t min_pkt:3;
+		uint64_t qos_mask:8;
+		uint64_t static_p:1;
+		uint64_t crc:1;
+		uint64_t reserved_63_63:1;
+#endif
+	} s;
+	struct cvmx_pko_mem_iport_ptrs_s cn68xx;
+	struct cvmx_pko_mem_iport_ptrs_s cn68xxp1;
+};
+
+union cvmx_pko_mem_iport_qos {
+	uint64_t u64;
+	struct cvmx_pko_mem_iport_qos_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_61_63:3;
+		uint64_t qos_mask:8;
+		uint64_t reserved_13_52:40;
+		uint64_t eid:5;
+		uint64_t reserved_7_7:1;
+		uint64_t ipid:7;
+#else
+		uint64_t ipid:7;
+		uint64_t reserved_7_7:1;
+		uint64_t eid:5;
+		uint64_t reserved_13_52:40;
+		uint64_t qos_mask:8;
+		uint64_t reserved_61_63:3;
+#endif
+	} s;
+	struct cvmx_pko_mem_iport_qos_s cn68xx;
+	struct cvmx_pko_mem_iport_qos_s cn68xxp1;
+};
+
+union cvmx_pko_mem_iqueue_ptrs {
+	uint64_t u64;
+	struct cvmx_pko_mem_iqueue_ptrs_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t s_tail:1;
+		uint64_t static_p:1;
+		uint64_t static_q:1;
+		uint64_t qos_mask:8;
+		uint64_t buf_ptr:31;
+		uint64_t tail:1;
+		uint64_t index:5;
+		uint64_t reserved_15_15:1;
+		uint64_t ipid:7;
+		uint64_t qid:8;
+#else
+		uint64_t qid:8;
+		uint64_t ipid:7;
+		uint64_t reserved_15_15:1;
+		uint64_t index:5;
+		uint64_t tail:1;
+		uint64_t buf_ptr:31;
+		uint64_t qos_mask:8;
+		uint64_t static_q:1;
+		uint64_t static_p:1;
+		uint64_t s_tail:1;
+#endif
+	} s;
+	struct cvmx_pko_mem_iqueue_ptrs_s cn68xx;
+	struct cvmx_pko_mem_iqueue_ptrs_s cn68xxp1;
+};
+
+union cvmx_pko_mem_iqueue_qos {
+	uint64_t u64;
+	struct cvmx_pko_mem_iqueue_qos_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_61_63:3;
+		uint64_t qos_mask:8;
+		uint64_t reserved_15_52:38;
+		uint64_t ipid:7;
+		uint64_t qid:8;
+#else
+		uint64_t qid:8;
+		uint64_t ipid:7;
+		uint64_t reserved_15_52:38;
+		uint64_t qos_mask:8;
+		uint64_t reserved_61_63:3;
+#endif
+	} s;
+	struct cvmx_pko_mem_iqueue_qos_s cn68xx;
+	struct cvmx_pko_mem_iqueue_qos_s cn68xxp1;
 };
 
 union cvmx_pko_mem_port_ptrs {
 	uint64_t u64;
 	struct cvmx_pko_mem_port_ptrs_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t static_p:1;
 		uint64_t qos_mask:8;
@@ -665,60 +1339,143 @@ union cvmx_pko_mem_port_ptrs {
 		uint64_t bp_port:6;
 		uint64_t eid:4;
 		uint64_t pid:6;
+#else
+		uint64_t pid:6;
+		uint64_t eid:4;
+		uint64_t bp_port:6;
+		uint64_t reserved_16_52:37;
+		uint64_t qos_mask:8;
+		uint64_t static_p:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_pko_mem_port_ptrs_s cn52xx;
 	struct cvmx_pko_mem_port_ptrs_s cn52xxp1;
 	struct cvmx_pko_mem_port_ptrs_s cn56xx;
 	struct cvmx_pko_mem_port_ptrs_s cn56xxp1;
+	struct cvmx_pko_mem_port_ptrs_s cn61xx;
+	struct cvmx_pko_mem_port_ptrs_s cn63xx;
+	struct cvmx_pko_mem_port_ptrs_s cn63xxp1;
+	struct cvmx_pko_mem_port_ptrs_s cn66xx;
+	struct cvmx_pko_mem_port_ptrs_s cnf71xx;
 };
 
 union cvmx_pko_mem_port_qos {
 	uint64_t u64;
 	struct cvmx_pko_mem_port_qos_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t qos_mask:8;
 		uint64_t reserved_10_52:43;
 		uint64_t eid:4;
 		uint64_t pid:6;
+#else
+		uint64_t pid:6;
+		uint64_t eid:4;
+		uint64_t reserved_10_52:43;
+		uint64_t qos_mask:8;
+		uint64_t reserved_61_63:3;
+#endif
 	} s;
 	struct cvmx_pko_mem_port_qos_s cn52xx;
 	struct cvmx_pko_mem_port_qos_s cn52xxp1;
 	struct cvmx_pko_mem_port_qos_s cn56xx;
 	struct cvmx_pko_mem_port_qos_s cn56xxp1;
+	struct cvmx_pko_mem_port_qos_s cn61xx;
+	struct cvmx_pko_mem_port_qos_s cn63xx;
+	struct cvmx_pko_mem_port_qos_s cn63xxp1;
+	struct cvmx_pko_mem_port_qos_s cn66xx;
+	struct cvmx_pko_mem_port_qos_s cnf71xx;
 };
 
 union cvmx_pko_mem_port_rate0 {
 	uint64_t u64;
 	struct cvmx_pko_mem_port_rate0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_51_63:13;
+		uint64_t rate_word:19;
+		uint64_t rate_pkt:24;
+		uint64_t reserved_7_7:1;
+		uint64_t pid:7;
+#else
+		uint64_t pid:7;
+		uint64_t reserved_7_7:1;
+		uint64_t rate_pkt:24;
+		uint64_t rate_word:19;
+		uint64_t reserved_51_63:13;
+#endif
+	} s;
+	struct cvmx_pko_mem_port_rate0_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_51_63:13;
 		uint64_t rate_word:19;
 		uint64_t rate_pkt:24;
 		uint64_t reserved_6_7:2;
 		uint64_t pid:6;
-	} s;
-	struct cvmx_pko_mem_port_rate0_s cn52xx;
-	struct cvmx_pko_mem_port_rate0_s cn52xxp1;
-	struct cvmx_pko_mem_port_rate0_s cn56xx;
-	struct cvmx_pko_mem_port_rate0_s cn56xxp1;
+#else
+		uint64_t pid:6;
+		uint64_t reserved_6_7:2;
+		uint64_t rate_pkt:24;
+		uint64_t rate_word:19;
+		uint64_t reserved_51_63:13;
+#endif
+	} cn52xx;
+	struct cvmx_pko_mem_port_rate0_cn52xx cn52xxp1;
+	struct cvmx_pko_mem_port_rate0_cn52xx cn56xx;
+	struct cvmx_pko_mem_port_rate0_cn52xx cn56xxp1;
+	struct cvmx_pko_mem_port_rate0_cn52xx cn61xx;
+	struct cvmx_pko_mem_port_rate0_cn52xx cn63xx;
+	struct cvmx_pko_mem_port_rate0_cn52xx cn63xxp1;
+	struct cvmx_pko_mem_port_rate0_cn52xx cn66xx;
+	struct cvmx_pko_mem_port_rate0_s cn68xx;
+	struct cvmx_pko_mem_port_rate0_s cn68xxp1;
+	struct cvmx_pko_mem_port_rate0_cn52xx cnf71xx;
 };
 
 union cvmx_pko_mem_port_rate1 {
 	uint64_t u64;
 	struct cvmx_pko_mem_port_rate1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t rate_lim:24;
+		uint64_t reserved_7_7:1;
+		uint64_t pid:7;
+#else
+		uint64_t pid:7;
+		uint64_t reserved_7_7:1;
+		uint64_t rate_lim:24;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_pko_mem_port_rate1_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t rate_lim:24;
 		uint64_t reserved_6_7:2;
 		uint64_t pid:6;
-	} s;
-	struct cvmx_pko_mem_port_rate1_s cn52xx;
-	struct cvmx_pko_mem_port_rate1_s cn52xxp1;
-	struct cvmx_pko_mem_port_rate1_s cn56xx;
-	struct cvmx_pko_mem_port_rate1_s cn56xxp1;
+#else
+		uint64_t pid:6;
+		uint64_t reserved_6_7:2;
+		uint64_t rate_lim:24;
+		uint64_t reserved_32_63:32;
+#endif
+	} cn52xx;
+	struct cvmx_pko_mem_port_rate1_cn52xx cn52xxp1;
+	struct cvmx_pko_mem_port_rate1_cn52xx cn56xx;
+	struct cvmx_pko_mem_port_rate1_cn52xx cn56xxp1;
+	struct cvmx_pko_mem_port_rate1_cn52xx cn61xx;
+	struct cvmx_pko_mem_port_rate1_cn52xx cn63xx;
+	struct cvmx_pko_mem_port_rate1_cn52xx cn63xxp1;
+	struct cvmx_pko_mem_port_rate1_cn52xx cn66xx;
+	struct cvmx_pko_mem_port_rate1_s cn68xx;
+	struct cvmx_pko_mem_port_rate1_s cn68xxp1;
+	struct cvmx_pko_mem_port_rate1_cn52xx cnf71xx;
 };
 
 union cvmx_pko_mem_queue_ptrs {
 	uint64_t u64;
 	struct cvmx_pko_mem_queue_ptrs_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t s_tail:1;
 		uint64_t static_p:1;
 		uint64_t static_q:1;
@@ -728,6 +1485,17 @@ union cvmx_pko_mem_queue_ptrs {
 		uint64_t index:3;
 		uint64_t port:6;
 		uint64_t queue:7;
+#else
+		uint64_t queue:7;
+		uint64_t port:6;
+		uint64_t index:3;
+		uint64_t tail:1;
+		uint64_t buf_ptr:36;
+		uint64_t qos_mask:8;
+		uint64_t static_q:1;
+		uint64_t static_p:1;
+		uint64_t s_tail:1;
+#endif
 	} s;
 	struct cvmx_pko_mem_queue_ptrs_s cn30xx;
 	struct cvmx_pko_mem_queue_ptrs_s cn31xx;
@@ -740,16 +1508,29 @@ union cvmx_pko_mem_queue_ptrs {
 	struct cvmx_pko_mem_queue_ptrs_s cn56xxp1;
 	struct cvmx_pko_mem_queue_ptrs_s cn58xx;
 	struct cvmx_pko_mem_queue_ptrs_s cn58xxp1;
+	struct cvmx_pko_mem_queue_ptrs_s cn61xx;
+	struct cvmx_pko_mem_queue_ptrs_s cn63xx;
+	struct cvmx_pko_mem_queue_ptrs_s cn63xxp1;
+	struct cvmx_pko_mem_queue_ptrs_s cn66xx;
+	struct cvmx_pko_mem_queue_ptrs_s cnf71xx;
 };
 
 union cvmx_pko_mem_queue_qos {
 	uint64_t u64;
 	struct cvmx_pko_mem_queue_qos_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t qos_mask:8;
 		uint64_t reserved_13_52:40;
 		uint64_t pid:6;
 		uint64_t qid:7;
+#else
+		uint64_t qid:7;
+		uint64_t pid:6;
+		uint64_t reserved_13_52:40;
+		uint64_t qos_mask:8;
+		uint64_t reserved_61_63:3;
+#endif
 	} s;
 	struct cvmx_pko_mem_queue_qos_s cn30xx;
 	struct cvmx_pko_mem_queue_qos_s cn31xx;
@@ -762,14 +1543,70 @@ union cvmx_pko_mem_queue_qos {
 	struct cvmx_pko_mem_queue_qos_s cn56xxp1;
 	struct cvmx_pko_mem_queue_qos_s cn58xx;
 	struct cvmx_pko_mem_queue_qos_s cn58xxp1;
+	struct cvmx_pko_mem_queue_qos_s cn61xx;
+	struct cvmx_pko_mem_queue_qos_s cn63xx;
+	struct cvmx_pko_mem_queue_qos_s cn63xxp1;
+	struct cvmx_pko_mem_queue_qos_s cn66xx;
+	struct cvmx_pko_mem_queue_qos_s cnf71xx;
+};
+
+union cvmx_pko_mem_throttle_int {
+	uint64_t u64;
+	struct cvmx_pko_mem_throttle_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_47_63:17;
+		uint64_t word:15;
+		uint64_t reserved_14_31:18;
+		uint64_t packet:6;
+		uint64_t reserved_5_7:3;
+		uint64_t intr:5;
+#else
+		uint64_t intr:5;
+		uint64_t reserved_5_7:3;
+		uint64_t packet:6;
+		uint64_t reserved_14_31:18;
+		uint64_t word:15;
+		uint64_t reserved_47_63:17;
+#endif
+	} s;
+	struct cvmx_pko_mem_throttle_int_s cn68xx;
+	struct cvmx_pko_mem_throttle_int_s cn68xxp1;
+};
+
+union cvmx_pko_mem_throttle_pipe {
+	uint64_t u64;
+	struct cvmx_pko_mem_throttle_pipe_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_47_63:17;
+		uint64_t word:15;
+		uint64_t reserved_14_31:18;
+		uint64_t packet:6;
+		uint64_t reserved_7_7:1;
+		uint64_t pipe:7;
+#else
+		uint64_t pipe:7;
+		uint64_t reserved_7_7:1;
+		uint64_t packet:6;
+		uint64_t reserved_14_31:18;
+		uint64_t word:15;
+		uint64_t reserved_47_63:17;
+#endif
+	} s;
+	struct cvmx_pko_mem_throttle_pipe_s cn68xx;
+	struct cvmx_pko_mem_throttle_pipe_s cn68xxp1;
 };
 
 union cvmx_pko_reg_bist_result {
 	uint64_t u64;
 	struct cvmx_pko_reg_bist_result_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_pko_reg_bist_result_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_27_63:37;
 		uint64_t psb2:5;
 		uint64_t count:1;
@@ -783,11 +1620,27 @@ union cvmx_pko_reg_bist_result {
 		uint64_t qcb:2;
 		uint64_t pdb:4;
 		uint64_t psb:7;
+#else
+		uint64_t psb:7;
+		uint64_t pdb:4;
+		uint64_t qcb:2;
+		uint64_t qsb:2;
+		uint64_t chk:1;
+		uint64_t crc:1;
+		uint64_t out:1;
+		uint64_t ncb:1;
+		uint64_t wif:1;
+		uint64_t rif:1;
+		uint64_t count:1;
+		uint64_t psb2:5;
+		uint64_t reserved_27_63:37;
+#endif
 	} cn30xx;
 	struct cvmx_pko_reg_bist_result_cn30xx cn31xx;
 	struct cvmx_pko_reg_bist_result_cn30xx cn38xx;
 	struct cvmx_pko_reg_bist_result_cn30xx cn38xxp2;
 	struct cvmx_pko_reg_bist_result_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_33_63:31;
 		uint64_t csr:1;
 		uint64_t iob:1;
@@ -803,8 +1656,26 @@ union cvmx_pko_reg_bist_result {
 		uint64_t prt_qsb:3;
 		uint64_t dat_dat:4;
 		uint64_t dat_ptr:4;
+#else
+		uint64_t dat_ptr:4;
+		uint64_t dat_dat:4;
+		uint64_t prt_qsb:3;
+		uint64_t prt_qcb:2;
+		uint64_t ncb_inb:2;
+		uint64_t prt_psb:6;
+		uint64_t prt_nxt:1;
+		uint64_t prt_chk:3;
+		uint64_t out_wif:1;
+		uint64_t out_sta:1;
+		uint64_t out_ctl:3;
+		uint64_t out_crc:1;
+		uint64_t iob:1;
+		uint64_t csr:1;
+		uint64_t reserved_33_63:31;
+#endif
 	} cn50xx;
 	struct cvmx_pko_reg_bist_result_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_35_63:29;
 		uint64_t csr:1;
 		uint64_t iob:1;
@@ -821,21 +1692,139 @@ union cvmx_pko_reg_bist_result {
 		uint64_t prt_ctl:2;
 		uint64_t dat_dat:2;
 		uint64_t dat_ptr:4;
+#else
+		uint64_t dat_ptr:4;
+		uint64_t dat_dat:2;
+		uint64_t prt_ctl:2;
+		uint64_t prt_qsb:3;
+		uint64_t prt_qcb:2;
+		uint64_t ncb_inb:2;
+		uint64_t prt_psb:8;
+		uint64_t prt_nxt:1;
+		uint64_t prt_chk:3;
+		uint64_t out_wif:1;
+		uint64_t out_sta:1;
+		uint64_t out_ctl:3;
+		uint64_t out_dat:1;
+		uint64_t iob:1;
+		uint64_t csr:1;
+		uint64_t reserved_35_63:29;
+#endif
 	} cn52xx;
 	struct cvmx_pko_reg_bist_result_cn52xx cn52xxp1;
 	struct cvmx_pko_reg_bist_result_cn52xx cn56xx;
 	struct cvmx_pko_reg_bist_result_cn52xx cn56xxp1;
 	struct cvmx_pko_reg_bist_result_cn50xx cn58xx;
 	struct cvmx_pko_reg_bist_result_cn50xx cn58xxp1;
+	struct cvmx_pko_reg_bist_result_cn52xx cn61xx;
+	struct cvmx_pko_reg_bist_result_cn52xx cn63xx;
+	struct cvmx_pko_reg_bist_result_cn52xx cn63xxp1;
+	struct cvmx_pko_reg_bist_result_cn52xx cn66xx;
+	struct cvmx_pko_reg_bist_result_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_36_63:28;
+		uint64_t crc:1;
+		uint64_t csr:1;
+		uint64_t iob:1;
+		uint64_t out_dat:1;
+		uint64_t reserved_31_31:1;
+		uint64_t out_ctl:2;
+		uint64_t out_sta:1;
+		uint64_t out_wif:1;
+		uint64_t prt_chk:3;
+		uint64_t prt_nxt:1;
+		uint64_t prt_psb7:1;
+		uint64_t reserved_21_21:1;
+		uint64_t prt_psb:6;
+		uint64_t ncb_inb:2;
+		uint64_t prt_qcb:2;
+		uint64_t prt_qsb:3;
+		uint64_t prt_ctl:2;
+		uint64_t dat_dat:2;
+		uint64_t dat_ptr:4;
+#else
+		uint64_t dat_ptr:4;
+		uint64_t dat_dat:2;
+		uint64_t prt_ctl:2;
+		uint64_t prt_qsb:3;
+		uint64_t prt_qcb:2;
+		uint64_t ncb_inb:2;
+		uint64_t prt_psb:6;
+		uint64_t reserved_21_21:1;
+		uint64_t prt_psb7:1;
+		uint64_t prt_nxt:1;
+		uint64_t prt_chk:3;
+		uint64_t out_wif:1;
+		uint64_t out_sta:1;
+		uint64_t out_ctl:2;
+		uint64_t reserved_31_31:1;
+		uint64_t out_dat:1;
+		uint64_t iob:1;
+		uint64_t csr:1;
+		uint64_t crc:1;
+		uint64_t reserved_36_63:28;
+#endif
+	} cn68xx;
+	struct cvmx_pko_reg_bist_result_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_35_63:29;
+		uint64_t csr:1;
+		uint64_t iob:1;
+		uint64_t out_dat:1;
+		uint64_t reserved_31_31:1;
+		uint64_t out_ctl:2;
+		uint64_t out_sta:1;
+		uint64_t out_wif:1;
+		uint64_t prt_chk:3;
+		uint64_t prt_nxt:1;
+		uint64_t prt_psb7:1;
+		uint64_t reserved_21_21:1;
+		uint64_t prt_psb:6;
+		uint64_t ncb_inb:2;
+		uint64_t prt_qcb:2;
+		uint64_t prt_qsb:3;
+		uint64_t prt_ctl:2;
+		uint64_t dat_dat:2;
+		uint64_t dat_ptr:4;
+#else
+		uint64_t dat_ptr:4;
+		uint64_t dat_dat:2;
+		uint64_t prt_ctl:2;
+		uint64_t prt_qsb:3;
+		uint64_t prt_qcb:2;
+		uint64_t ncb_inb:2;
+		uint64_t prt_psb:6;
+		uint64_t reserved_21_21:1;
+		uint64_t prt_psb7:1;
+		uint64_t prt_nxt:1;
+		uint64_t prt_chk:3;
+		uint64_t out_wif:1;
+		uint64_t out_sta:1;
+		uint64_t out_ctl:2;
+		uint64_t reserved_31_31:1;
+		uint64_t out_dat:1;
+		uint64_t iob:1;
+		uint64_t csr:1;
+		uint64_t reserved_35_63:29;
+#endif
+	} cn68xxp1;
+	struct cvmx_pko_reg_bist_result_cn52xx cnf71xx;
 };
 
 union cvmx_pko_reg_cmd_buf {
 	uint64_t u64;
 	struct cvmx_pko_reg_cmd_buf_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t pool:3;
 		uint64_t reserved_13_19:7;
 		uint64_t size:13;
+#else
+		uint64_t size:13;
+		uint64_t reserved_13_19:7;
+		uint64_t pool:3;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_pko_reg_cmd_buf_s cn30xx;
 	struct cvmx_pko_reg_cmd_buf_s cn31xx;
@@ -848,14 +1837,27 @@ union cvmx_pko_reg_cmd_buf {
 	struct cvmx_pko_reg_cmd_buf_s cn56xxp1;
 	struct cvmx_pko_reg_cmd_buf_s cn58xx;
 	struct cvmx_pko_reg_cmd_buf_s cn58xxp1;
+	struct cvmx_pko_reg_cmd_buf_s cn61xx;
+	struct cvmx_pko_reg_cmd_buf_s cn63xx;
+	struct cvmx_pko_reg_cmd_buf_s cn63xxp1;
+	struct cvmx_pko_reg_cmd_buf_s cn66xx;
+	struct cvmx_pko_reg_cmd_buf_s cn68xx;
+	struct cvmx_pko_reg_cmd_buf_s cn68xxp1;
+	struct cvmx_pko_reg_cmd_buf_s cnf71xx;
 };
 
 union cvmx_pko_reg_crc_ctlx {
 	uint64_t u64;
 	struct cvmx_pko_reg_crc_ctlx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t invres:1;
 		uint64_t refin:1;
+#else
+		uint64_t refin:1;
+		uint64_t invres:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_pko_reg_crc_ctlx_s cn38xx;
 	struct cvmx_pko_reg_crc_ctlx_s cn38xxp2;
@@ -866,8 +1868,13 @@ union cvmx_pko_reg_crc_ctlx {
 union cvmx_pko_reg_crc_enable {
 	uint64_t u64;
 	struct cvmx_pko_reg_crc_enable_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t enable:32;
+#else
+		uint64_t enable:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pko_reg_crc_enable_s cn38xx;
 	struct cvmx_pko_reg_crc_enable_s cn38xxp2;
@@ -878,8 +1885,13 @@ union cvmx_pko_reg_crc_enable {
 union cvmx_pko_reg_crc_ivx {
 	uint64_t u64;
 	struct cvmx_pko_reg_crc_ivx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t iv:32;
+#else
+		uint64_t iv:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pko_reg_crc_ivx_s cn38xx;
 	struct cvmx_pko_reg_crc_ivx_s cn38xxp2;
@@ -890,11 +1902,20 @@ union cvmx_pko_reg_crc_ivx {
 union cvmx_pko_reg_debug0 {
 	uint64_t u64;
 	struct cvmx_pko_reg_debug0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t asserts:64;
+#else
 		uint64_t asserts:64;
+#endif
 	} s;
 	struct cvmx_pko_reg_debug0_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t asserts:17;
+#else
+		uint64_t asserts:17;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn30xx;
 	struct cvmx_pko_reg_debug0_cn30xx cn31xx;
 	struct cvmx_pko_reg_debug0_cn30xx cn38xx;
@@ -906,12 +1927,23 @@ union cvmx_pko_reg_debug0 {
 	struct cvmx_pko_reg_debug0_s cn56xxp1;
 	struct cvmx_pko_reg_debug0_s cn58xx;
 	struct cvmx_pko_reg_debug0_s cn58xxp1;
+	struct cvmx_pko_reg_debug0_s cn61xx;
+	struct cvmx_pko_reg_debug0_s cn63xx;
+	struct cvmx_pko_reg_debug0_s cn63xxp1;
+	struct cvmx_pko_reg_debug0_s cn66xx;
+	struct cvmx_pko_reg_debug0_s cn68xx;
+	struct cvmx_pko_reg_debug0_s cn68xxp1;
+	struct cvmx_pko_reg_debug0_s cnf71xx;
 };
 
 union cvmx_pko_reg_debug1 {
 	uint64_t u64;
 	struct cvmx_pko_reg_debug1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t asserts:64;
+#else
 		uint64_t asserts:64;
+#endif
 	} s;
 	struct cvmx_pko_reg_debug1_s cn50xx;
 	struct cvmx_pko_reg_debug1_s cn52xx;
@@ -920,12 +1952,23 @@ union cvmx_pko_reg_debug1 {
 	struct cvmx_pko_reg_debug1_s cn56xxp1;
 	struct cvmx_pko_reg_debug1_s cn58xx;
 	struct cvmx_pko_reg_debug1_s cn58xxp1;
+	struct cvmx_pko_reg_debug1_s cn61xx;
+	struct cvmx_pko_reg_debug1_s cn63xx;
+	struct cvmx_pko_reg_debug1_s cn63xxp1;
+	struct cvmx_pko_reg_debug1_s cn66xx;
+	struct cvmx_pko_reg_debug1_s cn68xx;
+	struct cvmx_pko_reg_debug1_s cn68xxp1;
+	struct cvmx_pko_reg_debug1_s cnf71xx;
 };
 
 union cvmx_pko_reg_debug2 {
 	uint64_t u64;
 	struct cvmx_pko_reg_debug2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t asserts:64;
+#else
+		uint64_t asserts:64;
+#endif
 	} s;
 	struct cvmx_pko_reg_debug2_s cn50xx;
 	struct cvmx_pko_reg_debug2_s cn52xx;
@@ -934,12 +1977,23 @@ union cvmx_pko_reg_debug2 {
 	struct cvmx_pko_reg_debug2_s cn56xxp1;
 	struct cvmx_pko_reg_debug2_s cn58xx;
 	struct cvmx_pko_reg_debug2_s cn58xxp1;
+	struct cvmx_pko_reg_debug2_s cn61xx;
+	struct cvmx_pko_reg_debug2_s cn63xx;
+	struct cvmx_pko_reg_debug2_s cn63xxp1;
+	struct cvmx_pko_reg_debug2_s cn66xx;
+	struct cvmx_pko_reg_debug2_s cn68xx;
+	struct cvmx_pko_reg_debug2_s cn68xxp1;
+	struct cvmx_pko_reg_debug2_s cnf71xx;
 };
 
 union cvmx_pko_reg_debug3 {
 	uint64_t u64;
 	struct cvmx_pko_reg_debug3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t asserts:64;
+#else
 		uint64_t asserts:64;
+#endif
 	} s;
 	struct cvmx_pko_reg_debug3_s cn50xx;
 	struct cvmx_pko_reg_debug3_s cn52xx;
@@ -948,11 +2002,69 @@ union cvmx_pko_reg_debug3 {
 	struct cvmx_pko_reg_debug3_s cn56xxp1;
 	struct cvmx_pko_reg_debug3_s cn58xx;
 	struct cvmx_pko_reg_debug3_s cn58xxp1;
+	struct cvmx_pko_reg_debug3_s cn61xx;
+	struct cvmx_pko_reg_debug3_s cn63xx;
+	struct cvmx_pko_reg_debug3_s cn63xxp1;
+	struct cvmx_pko_reg_debug3_s cn66xx;
+	struct cvmx_pko_reg_debug3_s cn68xx;
+	struct cvmx_pko_reg_debug3_s cn68xxp1;
+	struct cvmx_pko_reg_debug3_s cnf71xx;
+};
+
+union cvmx_pko_reg_debug4 {
+	uint64_t u64;
+	struct cvmx_pko_reg_debug4_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t asserts:64;
+#else
+		uint64_t asserts:64;
+#endif
+	} s;
+	struct cvmx_pko_reg_debug4_s cn68xx;
+	struct cvmx_pko_reg_debug4_s cn68xxp1;
 };
 
 union cvmx_pko_reg_engine_inflight {
 	uint64_t u64;
 	struct cvmx_pko_reg_engine_inflight_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t engine15:4;
+		uint64_t engine14:4;
+		uint64_t engine13:4;
+		uint64_t engine12:4;
+		uint64_t engine11:4;
+		uint64_t engine10:4;
+		uint64_t engine9:4;
+		uint64_t engine8:4;
+		uint64_t engine7:4;
+		uint64_t engine6:4;
+		uint64_t engine5:4;
+		uint64_t engine4:4;
+		uint64_t engine3:4;
+		uint64_t engine2:4;
+		uint64_t engine1:4;
+		uint64_t engine0:4;
+#else
+		uint64_t engine0:4;
+		uint64_t engine1:4;
+		uint64_t engine2:4;
+		uint64_t engine3:4;
+		uint64_t engine4:4;
+		uint64_t engine5:4;
+		uint64_t engine6:4;
+		uint64_t engine7:4;
+		uint64_t engine8:4;
+		uint64_t engine9:4;
+		uint64_t engine10:4;
+		uint64_t engine11:4;
+		uint64_t engine12:4;
+		uint64_t engine13:4;
+		uint64_t engine14:4;
+		uint64_t engine15:4;
+#endif
+	} s;
+	struct cvmx_pko_reg_engine_inflight_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t engine9:4;
 		uint64_t engine8:4;
@@ -964,78 +2076,380 @@ union cvmx_pko_reg_engine_inflight {
 		uint64_t engine2:4;
 		uint64_t engine1:4;
 		uint64_t engine0:4;
+#else
+		uint64_t engine0:4;
+		uint64_t engine1:4;
+		uint64_t engine2:4;
+		uint64_t engine3:4;
+		uint64_t engine4:4;
+		uint64_t engine5:4;
+		uint64_t engine6:4;
+		uint64_t engine7:4;
+		uint64_t engine8:4;
+		uint64_t engine9:4;
+		uint64_t reserved_40_63:24;
+#endif
+	} cn52xx;
+	struct cvmx_pko_reg_engine_inflight_cn52xx cn52xxp1;
+	struct cvmx_pko_reg_engine_inflight_cn52xx cn56xx;
+	struct cvmx_pko_reg_engine_inflight_cn52xx cn56xxp1;
+	struct cvmx_pko_reg_engine_inflight_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_56_63:8;
+		uint64_t engine13:4;
+		uint64_t engine12:4;
+		uint64_t engine11:4;
+		uint64_t engine10:4;
+		uint64_t engine9:4;
+		uint64_t engine8:4;
+		uint64_t engine7:4;
+		uint64_t engine6:4;
+		uint64_t engine5:4;
+		uint64_t engine4:4;
+		uint64_t engine3:4;
+		uint64_t engine2:4;
+		uint64_t engine1:4;
+		uint64_t engine0:4;
+#else
+		uint64_t engine0:4;
+		uint64_t engine1:4;
+		uint64_t engine2:4;
+		uint64_t engine3:4;
+		uint64_t engine4:4;
+		uint64_t engine5:4;
+		uint64_t engine6:4;
+		uint64_t engine7:4;
+		uint64_t engine8:4;
+		uint64_t engine9:4;
+		uint64_t engine10:4;
+		uint64_t engine11:4;
+		uint64_t engine12:4;
+		uint64_t engine13:4;
+		uint64_t reserved_56_63:8;
+#endif
+	} cn61xx;
+	struct cvmx_pko_reg_engine_inflight_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_48_63:16;
+		uint64_t engine11:4;
+		uint64_t engine10:4;
+		uint64_t engine9:4;
+		uint64_t engine8:4;
+		uint64_t engine7:4;
+		uint64_t engine6:4;
+		uint64_t engine5:4;
+		uint64_t engine4:4;
+		uint64_t engine3:4;
+		uint64_t engine2:4;
+		uint64_t engine1:4;
+		uint64_t engine0:4;
+#else
+		uint64_t engine0:4;
+		uint64_t engine1:4;
+		uint64_t engine2:4;
+		uint64_t engine3:4;
+		uint64_t engine4:4;
+		uint64_t engine5:4;
+		uint64_t engine6:4;
+		uint64_t engine7:4;
+		uint64_t engine8:4;
+		uint64_t engine9:4;
+		uint64_t engine10:4;
+		uint64_t engine11:4;
+		uint64_t reserved_48_63:16;
+#endif
+	} cn63xx;
+	struct cvmx_pko_reg_engine_inflight_cn63xx cn63xxp1;
+	struct cvmx_pko_reg_engine_inflight_cn61xx cn66xx;
+	struct cvmx_pko_reg_engine_inflight_s cn68xx;
+	struct cvmx_pko_reg_engine_inflight_s cn68xxp1;
+	struct cvmx_pko_reg_engine_inflight_cn61xx cnf71xx;
+};
+
+union cvmx_pko_reg_engine_inflight1 {
+	uint64_t u64;
+	struct cvmx_pko_reg_engine_inflight1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t engine19:4;
+		uint64_t engine18:4;
+		uint64_t engine17:4;
+		uint64_t engine16:4;
+#else
+		uint64_t engine16:4;
+		uint64_t engine17:4;
+		uint64_t engine18:4;
+		uint64_t engine19:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
-	struct cvmx_pko_reg_engine_inflight_s cn52xx;
-	struct cvmx_pko_reg_engine_inflight_s cn52xxp1;
-	struct cvmx_pko_reg_engine_inflight_s cn56xx;
-	struct cvmx_pko_reg_engine_inflight_s cn56xxp1;
+	struct cvmx_pko_reg_engine_inflight1_s cn68xx;
+	struct cvmx_pko_reg_engine_inflight1_s cn68xxp1;
+};
+
+union cvmx_pko_reg_engine_storagex {
+	uint64_t u64;
+	struct cvmx_pko_reg_engine_storagex_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t engine15:4;
+		uint64_t engine14:4;
+		uint64_t engine13:4;
+		uint64_t engine12:4;
+		uint64_t engine11:4;
+		uint64_t engine10:4;
+		uint64_t engine9:4;
+		uint64_t engine8:4;
+		uint64_t engine7:4;
+		uint64_t engine6:4;
+		uint64_t engine5:4;
+		uint64_t engine4:4;
+		uint64_t engine3:4;
+		uint64_t engine2:4;
+		uint64_t engine1:4;
+		uint64_t engine0:4;
+#else
+		uint64_t engine0:4;
+		uint64_t engine1:4;
+		uint64_t engine2:4;
+		uint64_t engine3:4;
+		uint64_t engine4:4;
+		uint64_t engine5:4;
+		uint64_t engine6:4;
+		uint64_t engine7:4;
+		uint64_t engine8:4;
+		uint64_t engine9:4;
+		uint64_t engine10:4;
+		uint64_t engine11:4;
+		uint64_t engine12:4;
+		uint64_t engine13:4;
+		uint64_t engine14:4;
+		uint64_t engine15:4;
+#endif
+	} s;
+	struct cvmx_pko_reg_engine_storagex_s cn68xx;
+	struct cvmx_pko_reg_engine_storagex_s cn68xxp1;
 };
 
 union cvmx_pko_reg_engine_thresh {
 	uint64_t u64;
 	struct cvmx_pko_reg_engine_thresh_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t mask:20;
+#else
+		uint64_t mask:20;
+		uint64_t reserved_20_63:44;
+#endif
+	} s;
+	struct cvmx_pko_reg_engine_thresh_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t mask:10;
-	} s;
-	struct cvmx_pko_reg_engine_thresh_s cn52xx;
-	struct cvmx_pko_reg_engine_thresh_s cn52xxp1;
-	struct cvmx_pko_reg_engine_thresh_s cn56xx;
-	struct cvmx_pko_reg_engine_thresh_s cn56xxp1;
+#else
+		uint64_t mask:10;
+		uint64_t reserved_10_63:54;
+#endif
+	} cn52xx;
+	struct cvmx_pko_reg_engine_thresh_cn52xx cn52xxp1;
+	struct cvmx_pko_reg_engine_thresh_cn52xx cn56xx;
+	struct cvmx_pko_reg_engine_thresh_cn52xx cn56xxp1;
+	struct cvmx_pko_reg_engine_thresh_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_14_63:50;
+		uint64_t mask:14;
+#else
+		uint64_t mask:14;
+		uint64_t reserved_14_63:50;
+#endif
+	} cn61xx;
+	struct cvmx_pko_reg_engine_thresh_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t mask:12;
+#else
+		uint64_t mask:12;
+		uint64_t reserved_12_63:52;
+#endif
+	} cn63xx;
+	struct cvmx_pko_reg_engine_thresh_cn63xx cn63xxp1;
+	struct cvmx_pko_reg_engine_thresh_cn61xx cn66xx;
+	struct cvmx_pko_reg_engine_thresh_s cn68xx;
+	struct cvmx_pko_reg_engine_thresh_s cn68xxp1;
+	struct cvmx_pko_reg_engine_thresh_cn61xx cnf71xx;
 };
 
 union cvmx_pko_reg_error {
 	uint64_t u64;
 	struct cvmx_pko_reg_error_s {
-		uint64_t reserved_3_63:61;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t loopback:1;
 		uint64_t currzero:1;
 		uint64_t doorbell:1;
 		uint64_t parity:1;
+#else
+		uint64_t parity:1;
+		uint64_t doorbell:1;
+		uint64_t currzero:1;
+		uint64_t loopback:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_pko_reg_error_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t doorbell:1;
 		uint64_t parity:1;
+#else
+		uint64_t parity:1;
+		uint64_t doorbell:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn30xx;
 	struct cvmx_pko_reg_error_cn30xx cn31xx;
 	struct cvmx_pko_reg_error_cn30xx cn38xx;
 	struct cvmx_pko_reg_error_cn30xx cn38xxp2;
-	struct cvmx_pko_reg_error_s cn50xx;
-	struct cvmx_pko_reg_error_s cn52xx;
-	struct cvmx_pko_reg_error_s cn52xxp1;
-	struct cvmx_pko_reg_error_s cn56xx;
-	struct cvmx_pko_reg_error_s cn56xxp1;
-	struct cvmx_pko_reg_error_s cn58xx;
-	struct cvmx_pko_reg_error_s cn58xxp1;
+	struct cvmx_pko_reg_error_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_3_63:61;
+		uint64_t currzero:1;
+		uint64_t doorbell:1;
+		uint64_t parity:1;
+#else
+		uint64_t parity:1;
+		uint64_t doorbell:1;
+		uint64_t currzero:1;
+		uint64_t reserved_3_63:61;
+#endif
+	} cn50xx;
+	struct cvmx_pko_reg_error_cn50xx cn52xx;
+	struct cvmx_pko_reg_error_cn50xx cn52xxp1;
+	struct cvmx_pko_reg_error_cn50xx cn56xx;
+	struct cvmx_pko_reg_error_cn50xx cn56xxp1;
+	struct cvmx_pko_reg_error_cn50xx cn58xx;
+	struct cvmx_pko_reg_error_cn50xx cn58xxp1;
+	struct cvmx_pko_reg_error_cn50xx cn61xx;
+	struct cvmx_pko_reg_error_cn50xx cn63xx;
+	struct cvmx_pko_reg_error_cn50xx cn63xxp1;
+	struct cvmx_pko_reg_error_cn50xx cn66xx;
+	struct cvmx_pko_reg_error_s cn68xx;
+	struct cvmx_pko_reg_error_s cn68xxp1;
+	struct cvmx_pko_reg_error_cn50xx cnf71xx;
 };
 
 union cvmx_pko_reg_flags {
 	uint64_t u64;
 	struct cvmx_pko_reg_flags_s {
-		uint64_t reserved_4_63:60;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_9_63:55;
+		uint64_t dis_perf3:1;
+		uint64_t dis_perf2:1;
+		uint64_t dis_perf1:1;
+		uint64_t dis_perf0:1;
+		uint64_t ena_throttle:1;
 		uint64_t reset:1;
 		uint64_t store_be:1;
 		uint64_t ena_dwb:1;
 		uint64_t ena_pko:1;
+#else
+		uint64_t ena_pko:1;
+		uint64_t ena_dwb:1;
+		uint64_t store_be:1;
+		uint64_t reset:1;
+		uint64_t ena_throttle:1;
+		uint64_t dis_perf0:1;
+		uint64_t dis_perf1:1;
+		uint64_t dis_perf2:1;
+		uint64_t dis_perf3:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
-	struct cvmx_pko_reg_flags_s cn30xx;
-	struct cvmx_pko_reg_flags_s cn31xx;
-	struct cvmx_pko_reg_flags_s cn38xx;
-	struct cvmx_pko_reg_flags_s cn38xxp2;
-	struct cvmx_pko_reg_flags_s cn50xx;
-	struct cvmx_pko_reg_flags_s cn52xx;
-	struct cvmx_pko_reg_flags_s cn52xxp1;
-	struct cvmx_pko_reg_flags_s cn56xx;
-	struct cvmx_pko_reg_flags_s cn56xxp1;
-	struct cvmx_pko_reg_flags_s cn58xx;
-	struct cvmx_pko_reg_flags_s cn58xxp1;
+	struct cvmx_pko_reg_flags_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t reset:1;
+		uint64_t store_be:1;
+		uint64_t ena_dwb:1;
+		uint64_t ena_pko:1;
+#else
+		uint64_t ena_pko:1;
+		uint64_t ena_dwb:1;
+		uint64_t store_be:1;
+		uint64_t reset:1;
+		uint64_t reserved_4_63:60;
+#endif
+	} cn30xx;
+	struct cvmx_pko_reg_flags_cn30xx cn31xx;
+	struct cvmx_pko_reg_flags_cn30xx cn38xx;
+	struct cvmx_pko_reg_flags_cn30xx cn38xxp2;
+	struct cvmx_pko_reg_flags_cn30xx cn50xx;
+	struct cvmx_pko_reg_flags_cn30xx cn52xx;
+	struct cvmx_pko_reg_flags_cn30xx cn52xxp1;
+	struct cvmx_pko_reg_flags_cn30xx cn56xx;
+	struct cvmx_pko_reg_flags_cn30xx cn56xxp1;
+	struct cvmx_pko_reg_flags_cn30xx cn58xx;
+	struct cvmx_pko_reg_flags_cn30xx cn58xxp1;
+	struct cvmx_pko_reg_flags_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_9_63:55;
+		uint64_t dis_perf3:1;
+		uint64_t dis_perf2:1;
+		uint64_t reserved_4_6:3;
+		uint64_t reset:1;
+		uint64_t store_be:1;
+		uint64_t ena_dwb:1;
+		uint64_t ena_pko:1;
+#else
+		uint64_t ena_pko:1;
+		uint64_t ena_dwb:1;
+		uint64_t store_be:1;
+		uint64_t reset:1;
+		uint64_t reserved_4_6:3;
+		uint64_t dis_perf2:1;
+		uint64_t dis_perf3:1;
+		uint64_t reserved_9_63:55;
+#endif
+	} cn61xx;
+	struct cvmx_pko_reg_flags_cn30xx cn63xx;
+	struct cvmx_pko_reg_flags_cn30xx cn63xxp1;
+	struct cvmx_pko_reg_flags_cn61xx cn66xx;
+	struct cvmx_pko_reg_flags_s cn68xx;
+	struct cvmx_pko_reg_flags_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_7_63:57;
+		uint64_t dis_perf1:1;
+		uint64_t dis_perf0:1;
+		uint64_t ena_throttle:1;
+		uint64_t reset:1;
+		uint64_t store_be:1;
+		uint64_t ena_dwb:1;
+		uint64_t ena_pko:1;
+#else
+		uint64_t ena_pko:1;
+		uint64_t ena_dwb:1;
+		uint64_t store_be:1;
+		uint64_t reset:1;
+		uint64_t ena_throttle:1;
+		uint64_t dis_perf0:1;
+		uint64_t dis_perf1:1;
+		uint64_t reserved_7_63:57;
+#endif
+	} cn68xxp1;
+	struct cvmx_pko_reg_flags_cn61xx cnf71xx;
 };
 
 union cvmx_pko_reg_gmx_port_mode {
 	uint64_t u64;
 	struct cvmx_pko_reg_gmx_port_mode_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t mode1:3;
 		uint64_t mode0:3;
+#else
+		uint64_t mode0:3;
+		uint64_t mode1:3;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_pko_reg_gmx_port_mode_s cn30xx;
 	struct cvmx_pko_reg_gmx_port_mode_s cn31xx;
@@ -1048,38 +2462,223 @@ union cvmx_pko_reg_gmx_port_mode {
 	struct cvmx_pko_reg_gmx_port_mode_s cn56xxp1;
 	struct cvmx_pko_reg_gmx_port_mode_s cn58xx;
 	struct cvmx_pko_reg_gmx_port_mode_s cn58xxp1;
+	struct cvmx_pko_reg_gmx_port_mode_s cn61xx;
+	struct cvmx_pko_reg_gmx_port_mode_s cn63xx;
+	struct cvmx_pko_reg_gmx_port_mode_s cn63xxp1;
+	struct cvmx_pko_reg_gmx_port_mode_s cn66xx;
+	struct cvmx_pko_reg_gmx_port_mode_s cnf71xx;
 };
 
 union cvmx_pko_reg_int_mask {
 	uint64_t u64;
 	struct cvmx_pko_reg_int_mask_s {
-		uint64_t reserved_3_63:61;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t loopback:1;
 		uint64_t currzero:1;
 		uint64_t doorbell:1;
 		uint64_t parity:1;
+#else
+		uint64_t parity:1;
+		uint64_t doorbell:1;
+		uint64_t currzero:1;
+		uint64_t loopback:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_pko_reg_int_mask_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t doorbell:1;
 		uint64_t parity:1;
+#else
+		uint64_t parity:1;
+		uint64_t doorbell:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} cn30xx;
 	struct cvmx_pko_reg_int_mask_cn30xx cn31xx;
 	struct cvmx_pko_reg_int_mask_cn30xx cn38xx;
 	struct cvmx_pko_reg_int_mask_cn30xx cn38xxp2;
-	struct cvmx_pko_reg_int_mask_s cn50xx;
-	struct cvmx_pko_reg_int_mask_s cn52xx;
-	struct cvmx_pko_reg_int_mask_s cn52xxp1;
-	struct cvmx_pko_reg_int_mask_s cn56xx;
-	struct cvmx_pko_reg_int_mask_s cn56xxp1;
-	struct cvmx_pko_reg_int_mask_s cn58xx;
-	struct cvmx_pko_reg_int_mask_s cn58xxp1;
+	struct cvmx_pko_reg_int_mask_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_3_63:61;
+		uint64_t currzero:1;
+		uint64_t doorbell:1;
+		uint64_t parity:1;
+#else
+		uint64_t parity:1;
+		uint64_t doorbell:1;
+		uint64_t currzero:1;
+		uint64_t reserved_3_63:61;
+#endif
+	} cn50xx;
+	struct cvmx_pko_reg_int_mask_cn50xx cn52xx;
+	struct cvmx_pko_reg_int_mask_cn50xx cn52xxp1;
+	struct cvmx_pko_reg_int_mask_cn50xx cn56xx;
+	struct cvmx_pko_reg_int_mask_cn50xx cn56xxp1;
+	struct cvmx_pko_reg_int_mask_cn50xx cn58xx;
+	struct cvmx_pko_reg_int_mask_cn50xx cn58xxp1;
+	struct cvmx_pko_reg_int_mask_cn50xx cn61xx;
+	struct cvmx_pko_reg_int_mask_cn50xx cn63xx;
+	struct cvmx_pko_reg_int_mask_cn50xx cn63xxp1;
+	struct cvmx_pko_reg_int_mask_cn50xx cn66xx;
+	struct cvmx_pko_reg_int_mask_s cn68xx;
+	struct cvmx_pko_reg_int_mask_s cn68xxp1;
+	struct cvmx_pko_reg_int_mask_cn50xx cnf71xx;
+};
+
+union cvmx_pko_reg_loopback_bpid {
+	uint64_t u64;
+	struct cvmx_pko_reg_loopback_bpid_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_59_63:5;
+		uint64_t bpid7:6;
+		uint64_t reserved_52_52:1;
+		uint64_t bpid6:6;
+		uint64_t reserved_45_45:1;
+		uint64_t bpid5:6;
+		uint64_t reserved_38_38:1;
+		uint64_t bpid4:6;
+		uint64_t reserved_31_31:1;
+		uint64_t bpid3:6;
+		uint64_t reserved_24_24:1;
+		uint64_t bpid2:6;
+		uint64_t reserved_17_17:1;
+		uint64_t bpid1:6;
+		uint64_t reserved_10_10:1;
+		uint64_t bpid0:6;
+		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t bpid0:6;
+		uint64_t reserved_10_10:1;
+		uint64_t bpid1:6;
+		uint64_t reserved_17_17:1;
+		uint64_t bpid2:6;
+		uint64_t reserved_24_24:1;
+		uint64_t bpid3:6;
+		uint64_t reserved_31_31:1;
+		uint64_t bpid4:6;
+		uint64_t reserved_38_38:1;
+		uint64_t bpid5:6;
+		uint64_t reserved_45_45:1;
+		uint64_t bpid6:6;
+		uint64_t reserved_52_52:1;
+		uint64_t bpid7:6;
+		uint64_t reserved_59_63:5;
+#endif
+	} s;
+	struct cvmx_pko_reg_loopback_bpid_s cn68xx;
+	struct cvmx_pko_reg_loopback_bpid_s cn68xxp1;
+};
+
+union cvmx_pko_reg_loopback_pkind {
+	uint64_t u64;
+	struct cvmx_pko_reg_loopback_pkind_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_59_63:5;
+		uint64_t pkind7:6;
+		uint64_t reserved_52_52:1;
+		uint64_t pkind6:6;
+		uint64_t reserved_45_45:1;
+		uint64_t pkind5:6;
+		uint64_t reserved_38_38:1;
+		uint64_t pkind4:6;
+		uint64_t reserved_31_31:1;
+		uint64_t pkind3:6;
+		uint64_t reserved_24_24:1;
+		uint64_t pkind2:6;
+		uint64_t reserved_17_17:1;
+		uint64_t pkind1:6;
+		uint64_t reserved_10_10:1;
+		uint64_t pkind0:6;
+		uint64_t num_ports:4;
+#else
+		uint64_t num_ports:4;
+		uint64_t pkind0:6;
+		uint64_t reserved_10_10:1;
+		uint64_t pkind1:6;
+		uint64_t reserved_17_17:1;
+		uint64_t pkind2:6;
+		uint64_t reserved_24_24:1;
+		uint64_t pkind3:6;
+		uint64_t reserved_31_31:1;
+		uint64_t pkind4:6;
+		uint64_t reserved_38_38:1;
+		uint64_t pkind5:6;
+		uint64_t reserved_45_45:1;
+		uint64_t pkind6:6;
+		uint64_t reserved_52_52:1;
+		uint64_t pkind7:6;
+		uint64_t reserved_59_63:5;
+#endif
+	} s;
+	struct cvmx_pko_reg_loopback_pkind_s cn68xx;
+	struct cvmx_pko_reg_loopback_pkind_s cn68xxp1;
+};
+
+union cvmx_pko_reg_min_pkt {
+	uint64_t u64;
+	struct cvmx_pko_reg_min_pkt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t size7:8;
+		uint64_t size6:8;
+		uint64_t size5:8;
+		uint64_t size4:8;
+		uint64_t size3:8;
+		uint64_t size2:8;
+		uint64_t size1:8;
+		uint64_t size0:8;
+#else
+		uint64_t size0:8;
+		uint64_t size1:8;
+		uint64_t size2:8;
+		uint64_t size3:8;
+		uint64_t size4:8;
+		uint64_t size5:8;
+		uint64_t size6:8;
+		uint64_t size7:8;
+#endif
+	} s;
+	struct cvmx_pko_reg_min_pkt_s cn68xx;
+	struct cvmx_pko_reg_min_pkt_s cn68xxp1;
+};
+
+union cvmx_pko_reg_preempt {
+	uint64_t u64;
+	struct cvmx_pko_reg_preempt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_16_63:48;
+		uint64_t min_size:16;
+#else
+		uint64_t min_size:16;
+		uint64_t reserved_16_63:48;
+#endif
+	} s;
+	struct cvmx_pko_reg_preempt_s cn52xx;
+	struct cvmx_pko_reg_preempt_s cn52xxp1;
+	struct cvmx_pko_reg_preempt_s cn56xx;
+	struct cvmx_pko_reg_preempt_s cn56xxp1;
+	struct cvmx_pko_reg_preempt_s cn61xx;
+	struct cvmx_pko_reg_preempt_s cn63xx;
+	struct cvmx_pko_reg_preempt_s cn63xxp1;
+	struct cvmx_pko_reg_preempt_s cn66xx;
+	struct cvmx_pko_reg_preempt_s cn68xx;
+	struct cvmx_pko_reg_preempt_s cn68xxp1;
+	struct cvmx_pko_reg_preempt_s cnf71xx;
 };
 
 union cvmx_pko_reg_queue_mode {
 	uint64_t u64;
 	struct cvmx_pko_reg_queue_mode_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t mode:2;
+#else
+		uint64_t mode:2;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_pko_reg_queue_mode_s cn30xx;
 	struct cvmx_pko_reg_queue_mode_s cn31xx;
@@ -1092,14 +2691,53 @@ union cvmx_pko_reg_queue_mode {
 	struct cvmx_pko_reg_queue_mode_s cn56xxp1;
 	struct cvmx_pko_reg_queue_mode_s cn58xx;
 	struct cvmx_pko_reg_queue_mode_s cn58xxp1;
+	struct cvmx_pko_reg_queue_mode_s cn61xx;
+	struct cvmx_pko_reg_queue_mode_s cn63xx;
+	struct cvmx_pko_reg_queue_mode_s cn63xxp1;
+	struct cvmx_pko_reg_queue_mode_s cn66xx;
+	struct cvmx_pko_reg_queue_mode_s cn68xx;
+	struct cvmx_pko_reg_queue_mode_s cn68xxp1;
+	struct cvmx_pko_reg_queue_mode_s cnf71xx;
+};
+
+union cvmx_pko_reg_queue_preempt {
+	uint64_t u64;
+	struct cvmx_pko_reg_queue_preempt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_2_63:62;
+		uint64_t preemptee:1;
+		uint64_t preempter:1;
+#else
+		uint64_t preempter:1;
+		uint64_t preemptee:1;
+		uint64_t reserved_2_63:62;
+#endif
+	} s;
+	struct cvmx_pko_reg_queue_preempt_s cn52xx;
+	struct cvmx_pko_reg_queue_preempt_s cn52xxp1;
+	struct cvmx_pko_reg_queue_preempt_s cn56xx;
+	struct cvmx_pko_reg_queue_preempt_s cn56xxp1;
+	struct cvmx_pko_reg_queue_preempt_s cn61xx;
+	struct cvmx_pko_reg_queue_preempt_s cn63xx;
+	struct cvmx_pko_reg_queue_preempt_s cn63xxp1;
+	struct cvmx_pko_reg_queue_preempt_s cn66xx;
+	struct cvmx_pko_reg_queue_preempt_s cn68xx;
+	struct cvmx_pko_reg_queue_preempt_s cn68xxp1;
+	struct cvmx_pko_reg_queue_preempt_s cnf71xx;
 };
 
 union cvmx_pko_reg_queue_ptrs1 {
 	uint64_t u64;
 	struct cvmx_pko_reg_queue_ptrs1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t idx3:1;
 		uint64_t qid7:1;
+#else
+		uint64_t qid7:1;
+		uint64_t idx3:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_pko_reg_queue_ptrs1_s cn50xx;
 	struct cvmx_pko_reg_queue_ptrs1_s cn52xx;
@@ -1108,14 +2746,25 @@ union cvmx_pko_reg_queue_ptrs1 {
 	struct cvmx_pko_reg_queue_ptrs1_s cn56xxp1;
 	struct cvmx_pko_reg_queue_ptrs1_s cn58xx;
 	struct cvmx_pko_reg_queue_ptrs1_s cn58xxp1;
+	struct cvmx_pko_reg_queue_ptrs1_s cn61xx;
+	struct cvmx_pko_reg_queue_ptrs1_s cn63xx;
+	struct cvmx_pko_reg_queue_ptrs1_s cn63xxp1;
+	struct cvmx_pko_reg_queue_ptrs1_s cn66xx;
+	struct cvmx_pko_reg_queue_ptrs1_s cnf71xx;
 };
 
 union cvmx_pko_reg_read_idx {
 	uint64_t u64;
 	struct cvmx_pko_reg_read_idx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t inc:8;
 		uint64_t index:8;
+#else
+		uint64_t index:8;
+		uint64_t inc:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_pko_reg_read_idx_s cn30xx;
 	struct cvmx_pko_reg_read_idx_s cn31xx;
@@ -1128,6 +2777,48 @@ union cvmx_pko_reg_read_idx {
 	struct cvmx_pko_reg_read_idx_s cn56xxp1;
 	struct cvmx_pko_reg_read_idx_s cn58xx;
 	struct cvmx_pko_reg_read_idx_s cn58xxp1;
+	struct cvmx_pko_reg_read_idx_s cn61xx;
+	struct cvmx_pko_reg_read_idx_s cn63xx;
+	struct cvmx_pko_reg_read_idx_s cn63xxp1;
+	struct cvmx_pko_reg_read_idx_s cn66xx;
+	struct cvmx_pko_reg_read_idx_s cn68xx;
+	struct cvmx_pko_reg_read_idx_s cn68xxp1;
+	struct cvmx_pko_reg_read_idx_s cnf71xx;
+};
+
+union cvmx_pko_reg_throttle {
+	uint64_t u64;
+	struct cvmx_pko_reg_throttle_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_32_63:32;
+		uint64_t int_mask:32;
+#else
+		uint64_t int_mask:32;
+		uint64_t reserved_32_63:32;
+#endif
+	} s;
+	struct cvmx_pko_reg_throttle_s cn68xx;
+	struct cvmx_pko_reg_throttle_s cn68xxp1;
+};
+
+union cvmx_pko_reg_timestamp {
+	uint64_t u64;
+	struct cvmx_pko_reg_timestamp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_4_63:60;
+		uint64_t wqe_word:4;
+#else
+		uint64_t wqe_word:4;
+		uint64_t reserved_4_63:60;
+#endif
+	} s;
+	struct cvmx_pko_reg_timestamp_s cn61xx;
+	struct cvmx_pko_reg_timestamp_s cn63xx;
+	struct cvmx_pko_reg_timestamp_s cn63xxp1;
+	struct cvmx_pko_reg_timestamp_s cn66xx;
+	struct cvmx_pko_reg_timestamp_s cn68xx;
+	struct cvmx_pko_reg_timestamp_s cn68xxp1;
+	struct cvmx_pko_reg_timestamp_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-pow-defs.h b/arch/mips/include/asm/octeon/cvmx-pow-defs.h
index 39fd75b03f7..9020ef44373 100644
--- a/arch/mips/include/asm/octeon/cvmx-pow-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-pow-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -55,11 +55,18 @@
 union cvmx_pow_bist_stat {
 	uint64_t u64;
 	struct cvmx_pow_bist_stat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t pp:16;
 		uint64_t reserved_0_15:16;
+#else
+		uint64_t reserved_0_15:16;
+		uint64_t pp:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_bist_stat_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t pp:1;
 		uint64_t reserved_9_15:7;
@@ -72,8 +79,23 @@ union cvmx_pow_bist_stat {
 		uint64_t nbr0:1;
 		uint64_t pend:1;
 		uint64_t adr:1;
+#else
+		uint64_t adr:1;
+		uint64_t pend:1;
+		uint64_t nbr0:1;
+		uint64_t nbr1:1;
+		uint64_t fidx:1;
+		uint64_t index:1;
+		uint64_t nbt0:1;
+		uint64_t nbt1:1;
+		uint64_t cam:1;
+		uint64_t reserved_9_15:7;
+		uint64_t pp:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn30xx;
 	struct cvmx_pow_bist_stat_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t pp:2;
 		uint64_t reserved_9_15:7;
@@ -86,8 +108,23 @@ union cvmx_pow_bist_stat {
 		uint64_t nbr0:1;
 		uint64_t pend:1;
 		uint64_t adr:1;
+#else
+		uint64_t adr:1;
+		uint64_t pend:1;
+		uint64_t nbr0:1;
+		uint64_t nbr1:1;
+		uint64_t fidx:1;
+		uint64_t index:1;
+		uint64_t nbt0:1;
+		uint64_t nbt1:1;
+		uint64_t cam:1;
+		uint64_t reserved_9_15:7;
+		uint64_t pp:2;
+		uint64_t reserved_18_63:46;
+#endif
 	} cn31xx;
 	struct cvmx_pow_bist_stat_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t pp:16;
 		uint64_t reserved_10_15:6;
@@ -101,10 +138,26 @@ union cvmx_pow_bist_stat {
 		uint64_t pend0:1;
 		uint64_t adr1:1;
 		uint64_t adr0:1;
+#else
+		uint64_t adr0:1;
+		uint64_t adr1:1;
+		uint64_t pend0:1;
+		uint64_t pend1:1;
+		uint64_t nbr0:1;
+		uint64_t nbr1:1;
+		uint64_t fidx:1;
+		uint64_t index:1;
+		uint64_t nbt:1;
+		uint64_t cam:1;
+		uint64_t reserved_10_15:6;
+		uint64_t pp:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn38xx;
 	struct cvmx_pow_bist_stat_cn38xx cn38xxp2;
 	struct cvmx_pow_bist_stat_cn31xx cn50xx;
 	struct cvmx_pow_bist_stat_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t pp:4;
 		uint64_t reserved_9_15:7;
@@ -117,9 +170,24 @@ union cvmx_pow_bist_stat {
 		uint64_t nbr0:1;
 		uint64_t pend:1;
 		uint64_t adr:1;
+#else
+		uint64_t adr:1;
+		uint64_t pend:1;
+		uint64_t nbr0:1;
+		uint64_t nbr1:1;
+		uint64_t fidx:1;
+		uint64_t index:1;
+		uint64_t nbt0:1;
+		uint64_t nbt1:1;
+		uint64_t cam:1;
+		uint64_t reserved_9_15:7;
+		uint64_t pp:4;
+		uint64_t reserved_20_63:44;
+#endif
 	} cn52xx;
 	struct cvmx_pow_bist_stat_cn52xx cn52xxp1;
 	struct cvmx_pow_bist_stat_cn56xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t pp:12;
 		uint64_t reserved_10_15:6;
@@ -133,11 +201,52 @@ union cvmx_pow_bist_stat {
 		uint64_t pend0:1;
 		uint64_t adr1:1;
 		uint64_t adr0:1;
+#else
+		uint64_t adr0:1;
+		uint64_t adr1:1;
+		uint64_t pend0:1;
+		uint64_t pend1:1;
+		uint64_t nbr0:1;
+		uint64_t nbr1:1;
+		uint64_t fidx:1;
+		uint64_t index:1;
+		uint64_t nbt:1;
+		uint64_t cam:1;
+		uint64_t reserved_10_15:6;
+		uint64_t pp:12;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn56xx;
 	struct cvmx_pow_bist_stat_cn56xx cn56xxp1;
 	struct cvmx_pow_bist_stat_cn38xx cn58xx;
 	struct cvmx_pow_bist_stat_cn38xx cn58xxp1;
+	struct cvmx_pow_bist_stat_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_20_63:44;
+		uint64_t pp:4;
+		uint64_t reserved_12_15:4;
+		uint64_t cam:1;
+		uint64_t nbr:3;
+		uint64_t nbt:4;
+		uint64_t index:1;
+		uint64_t fidx:1;
+		uint64_t pend:1;
+		uint64_t adr:1;
+#else
+		uint64_t adr:1;
+		uint64_t pend:1;
+		uint64_t fidx:1;
+		uint64_t index:1;
+		uint64_t nbt:4;
+		uint64_t nbr:3;
+		uint64_t cam:1;
+		uint64_t reserved_12_15:4;
+		uint64_t pp:4;
+		uint64_t reserved_20_63:44;
+#endif
+	} cn61xx;
 	struct cvmx_pow_bist_stat_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_22_63:42;
 		uint64_t pp:6;
 		uint64_t reserved_12_15:4;
@@ -148,15 +257,58 @@ union cvmx_pow_bist_stat {
 		uint64_t fidx:1;
 		uint64_t pend:1;
 		uint64_t adr:1;
+#else
+		uint64_t adr:1;
+		uint64_t pend:1;
+		uint64_t fidx:1;
+		uint64_t index:1;
+		uint64_t nbt:4;
+		uint64_t nbr:3;
+		uint64_t cam:1;
+		uint64_t reserved_12_15:4;
+		uint64_t pp:6;
+		uint64_t reserved_22_63:42;
+#endif
 	} cn63xx;
 	struct cvmx_pow_bist_stat_cn63xx cn63xxp1;
+	struct cvmx_pow_bist_stat_cn66xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_26_63:38;
+		uint64_t pp:10;
+		uint64_t reserved_12_15:4;
+		uint64_t cam:1;
+		uint64_t nbr:3;
+		uint64_t nbt:4;
+		uint64_t index:1;
+		uint64_t fidx:1;
+		uint64_t pend:1;
+		uint64_t adr:1;
+#else
+		uint64_t adr:1;
+		uint64_t pend:1;
+		uint64_t fidx:1;
+		uint64_t index:1;
+		uint64_t nbt:4;
+		uint64_t nbr:3;
+		uint64_t cam:1;
+		uint64_t reserved_12_15:4;
+		uint64_t pp:10;
+		uint64_t reserved_26_63:38;
+#endif
+	} cn66xx;
+	struct cvmx_pow_bist_stat_cn61xx cnf71xx;
 };
 
 union cvmx_pow_ds_pc {
 	uint64_t u64;
 	struct cvmx_pow_ds_pc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t ds_pc:32;
+#else
+		uint64_t ds_pc:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_ds_pc_s cn30xx;
 	struct cvmx_pow_ds_pc_s cn31xx;
@@ -169,13 +321,17 @@ union cvmx_pow_ds_pc {
 	struct cvmx_pow_ds_pc_s cn56xxp1;
 	struct cvmx_pow_ds_pc_s cn58xx;
 	struct cvmx_pow_ds_pc_s cn58xxp1;
+	struct cvmx_pow_ds_pc_s cn61xx;
 	struct cvmx_pow_ds_pc_s cn63xx;
 	struct cvmx_pow_ds_pc_s cn63xxp1;
+	struct cvmx_pow_ds_pc_s cn66xx;
+	struct cvmx_pow_ds_pc_s cnf71xx;
 };
 
 union cvmx_pow_ecc_err {
 	uint64_t u64;
 	struct cvmx_pow_ecc_err_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_45_63:19;
 		uint64_t iop_ie:13;
 		uint64_t reserved_29_31:3;
@@ -189,9 +345,25 @@ union cvmx_pow_ecc_err {
 		uint64_t sbe_ie:1;
 		uint64_t dbe:1;
 		uint64_t sbe:1;
+#else
+		uint64_t sbe:1;
+		uint64_t dbe:1;
+		uint64_t sbe_ie:1;
+		uint64_t dbe_ie:1;
+		uint64_t syn:5;
+		uint64_t reserved_9_11:3;
+		uint64_t rpe:1;
+		uint64_t rpe_ie:1;
+		uint64_t reserved_14_15:2;
+		uint64_t iop:13;
+		uint64_t reserved_29_31:3;
+		uint64_t iop_ie:13;
+		uint64_t reserved_45_63:19;
+#endif
 	} s;
 	struct cvmx_pow_ecc_err_s cn30xx;
 	struct cvmx_pow_ecc_err_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t rpe_ie:1;
 		uint64_t rpe:1;
@@ -201,6 +373,17 @@ union cvmx_pow_ecc_err {
 		uint64_t sbe_ie:1;
 		uint64_t dbe:1;
 		uint64_t sbe:1;
+#else
+		uint64_t sbe:1;
+		uint64_t dbe:1;
+		uint64_t sbe_ie:1;
+		uint64_t dbe_ie:1;
+		uint64_t syn:5;
+		uint64_t reserved_9_11:3;
+		uint64_t rpe:1;
+		uint64_t rpe_ie:1;
+		uint64_t reserved_14_63:50;
+#endif
 	} cn31xx;
 	struct cvmx_pow_ecc_err_s cn38xx;
 	struct cvmx_pow_ecc_err_cn31xx cn38xxp2;
@@ -211,16 +394,25 @@ union cvmx_pow_ecc_err {
 	struct cvmx_pow_ecc_err_s cn56xxp1;
 	struct cvmx_pow_ecc_err_s cn58xx;
 	struct cvmx_pow_ecc_err_s cn58xxp1;
+	struct cvmx_pow_ecc_err_s cn61xx;
 	struct cvmx_pow_ecc_err_s cn63xx;
 	struct cvmx_pow_ecc_err_s cn63xxp1;
+	struct cvmx_pow_ecc_err_s cn66xx;
+	struct cvmx_pow_ecc_err_s cnf71xx;
 };
 
 union cvmx_pow_int_ctl {
 	uint64_t u64;
 	struct cvmx_pow_int_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t pfr_dis:1;
 		uint64_t nbr_thr:5;
+#else
+		uint64_t nbr_thr:5;
+		uint64_t pfr_dis:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_pow_int_ctl_s cn30xx;
 	struct cvmx_pow_int_ctl_s cn31xx;
@@ -233,15 +425,23 @@ union cvmx_pow_int_ctl {
 	struct cvmx_pow_int_ctl_s cn56xxp1;
 	struct cvmx_pow_int_ctl_s cn58xx;
 	struct cvmx_pow_int_ctl_s cn58xxp1;
+	struct cvmx_pow_int_ctl_s cn61xx;
 	struct cvmx_pow_int_ctl_s cn63xx;
 	struct cvmx_pow_int_ctl_s cn63xxp1;
+	struct cvmx_pow_int_ctl_s cn66xx;
+	struct cvmx_pow_int_ctl_s cnf71xx;
 };
 
 union cvmx_pow_iq_cntx {
 	uint64_t u64;
 	struct cvmx_pow_iq_cntx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t iq_cnt:32;
+#else
+		uint64_t iq_cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_iq_cntx_s cn30xx;
 	struct cvmx_pow_iq_cntx_s cn31xx;
@@ -254,15 +454,23 @@ union cvmx_pow_iq_cntx {
 	struct cvmx_pow_iq_cntx_s cn56xxp1;
 	struct cvmx_pow_iq_cntx_s cn58xx;
 	struct cvmx_pow_iq_cntx_s cn58xxp1;
+	struct cvmx_pow_iq_cntx_s cn61xx;
 	struct cvmx_pow_iq_cntx_s cn63xx;
 	struct cvmx_pow_iq_cntx_s cn63xxp1;
+	struct cvmx_pow_iq_cntx_s cn66xx;
+	struct cvmx_pow_iq_cntx_s cnf71xx;
 };
 
 union cvmx_pow_iq_com_cnt {
 	uint64_t u64;
 	struct cvmx_pow_iq_com_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t iq_cnt:32;
+#else
+		uint64_t iq_cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_iq_com_cnt_s cn30xx;
 	struct cvmx_pow_iq_com_cnt_s cn31xx;
@@ -275,90 +483,150 @@ union cvmx_pow_iq_com_cnt {
 	struct cvmx_pow_iq_com_cnt_s cn56xxp1;
 	struct cvmx_pow_iq_com_cnt_s cn58xx;
 	struct cvmx_pow_iq_com_cnt_s cn58xxp1;
+	struct cvmx_pow_iq_com_cnt_s cn61xx;
 	struct cvmx_pow_iq_com_cnt_s cn63xx;
 	struct cvmx_pow_iq_com_cnt_s cn63xxp1;
+	struct cvmx_pow_iq_com_cnt_s cn66xx;
+	struct cvmx_pow_iq_com_cnt_s cnf71xx;
 };
 
 union cvmx_pow_iq_int {
 	uint64_t u64;
 	struct cvmx_pow_iq_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t iq_int:8;
+#else
+		uint64_t iq_int:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_pow_iq_int_s cn52xx;
 	struct cvmx_pow_iq_int_s cn52xxp1;
 	struct cvmx_pow_iq_int_s cn56xx;
 	struct cvmx_pow_iq_int_s cn56xxp1;
+	struct cvmx_pow_iq_int_s cn61xx;
 	struct cvmx_pow_iq_int_s cn63xx;
 	struct cvmx_pow_iq_int_s cn63xxp1;
+	struct cvmx_pow_iq_int_s cn66xx;
+	struct cvmx_pow_iq_int_s cnf71xx;
 };
 
 union cvmx_pow_iq_int_en {
 	uint64_t u64;
 	struct cvmx_pow_iq_int_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t int_en:8;
+#else
+		uint64_t int_en:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_pow_iq_int_en_s cn52xx;
 	struct cvmx_pow_iq_int_en_s cn52xxp1;
 	struct cvmx_pow_iq_int_en_s cn56xx;
 	struct cvmx_pow_iq_int_en_s cn56xxp1;
+	struct cvmx_pow_iq_int_en_s cn61xx;
 	struct cvmx_pow_iq_int_en_s cn63xx;
 	struct cvmx_pow_iq_int_en_s cn63xxp1;
+	struct cvmx_pow_iq_int_en_s cn66xx;
+	struct cvmx_pow_iq_int_en_s cnf71xx;
 };
 
 union cvmx_pow_iq_thrx {
 	uint64_t u64;
 	struct cvmx_pow_iq_thrx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t iq_thr:32;
+#else
+		uint64_t iq_thr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_iq_thrx_s cn52xx;
 	struct cvmx_pow_iq_thrx_s cn52xxp1;
 	struct cvmx_pow_iq_thrx_s cn56xx;
 	struct cvmx_pow_iq_thrx_s cn56xxp1;
+	struct cvmx_pow_iq_thrx_s cn61xx;
 	struct cvmx_pow_iq_thrx_s cn63xx;
 	struct cvmx_pow_iq_thrx_s cn63xxp1;
+	struct cvmx_pow_iq_thrx_s cn66xx;
+	struct cvmx_pow_iq_thrx_s cnf71xx;
 };
 
 union cvmx_pow_nos_cnt {
 	uint64_t u64;
 	struct cvmx_pow_nos_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t nos_cnt:12;
+#else
+		uint64_t nos_cnt:12;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_pow_nos_cnt_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t nos_cnt:7;
+#else
+		uint64_t nos_cnt:7;
+		uint64_t reserved_7_63:57;
+#endif
 	} cn30xx;
 	struct cvmx_pow_nos_cnt_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t nos_cnt:9;
+#else
+		uint64_t nos_cnt:9;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn31xx;
 	struct cvmx_pow_nos_cnt_s cn38xx;
 	struct cvmx_pow_nos_cnt_s cn38xxp2;
 	struct cvmx_pow_nos_cnt_cn31xx cn50xx;
 	struct cvmx_pow_nos_cnt_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t nos_cnt:10;
+#else
+		uint64_t nos_cnt:10;
+		uint64_t reserved_10_63:54;
+#endif
 	} cn52xx;
 	struct cvmx_pow_nos_cnt_cn52xx cn52xxp1;
 	struct cvmx_pow_nos_cnt_s cn56xx;
 	struct cvmx_pow_nos_cnt_s cn56xxp1;
 	struct cvmx_pow_nos_cnt_s cn58xx;
 	struct cvmx_pow_nos_cnt_s cn58xxp1;
+	struct cvmx_pow_nos_cnt_cn52xx cn61xx;
 	struct cvmx_pow_nos_cnt_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t nos_cnt:11;
+#else
+		uint64_t nos_cnt:11;
+		uint64_t reserved_11_63:53;
+#endif
 	} cn63xx;
 	struct cvmx_pow_nos_cnt_cn63xx cn63xxp1;
+	struct cvmx_pow_nos_cnt_cn63xx cn66xx;
+	struct cvmx_pow_nos_cnt_cn52xx cnf71xx;
 };
 
 union cvmx_pow_nw_tim {
 	uint64_t u64;
 	struct cvmx_pow_nw_tim_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t nw_tim:10;
+#else
+		uint64_t nw_tim:10;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_pow_nw_tim_s cn30xx;
 	struct cvmx_pow_nw_tim_s cn31xx;
@@ -371,15 +639,23 @@ union cvmx_pow_nw_tim {
 	struct cvmx_pow_nw_tim_s cn56xxp1;
 	struct cvmx_pow_nw_tim_s cn58xx;
 	struct cvmx_pow_nw_tim_s cn58xxp1;
+	struct cvmx_pow_nw_tim_s cn61xx;
 	struct cvmx_pow_nw_tim_s cn63xx;
 	struct cvmx_pow_nw_tim_s cn63xxp1;
+	struct cvmx_pow_nw_tim_s cn66xx;
+	struct cvmx_pow_nw_tim_s cnf71xx;
 };
 
 union cvmx_pow_pf_rst_msk {
 	uint64_t u64;
 	struct cvmx_pow_pf_rst_msk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t rst_msk:8;
+#else
+		uint64_t rst_msk:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_pow_pf_rst_msk_s cn50xx;
 	struct cvmx_pow_pf_rst_msk_s cn52xx;
@@ -388,13 +664,17 @@ union cvmx_pow_pf_rst_msk {
 	struct cvmx_pow_pf_rst_msk_s cn56xxp1;
 	struct cvmx_pow_pf_rst_msk_s cn58xx;
 	struct cvmx_pow_pf_rst_msk_s cn58xxp1;
+	struct cvmx_pow_pf_rst_msk_s cn61xx;
 	struct cvmx_pow_pf_rst_msk_s cn63xx;
 	struct cvmx_pow_pf_rst_msk_s cn63xxp1;
+	struct cvmx_pow_pf_rst_msk_s cn66xx;
+	struct cvmx_pow_pf_rst_msk_s cnf71xx;
 };
 
 union cvmx_pow_pp_grp_mskx {
 	uint64_t u64;
 	struct cvmx_pow_pp_grp_mskx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t qos7_pri:4;
 		uint64_t qos6_pri:4;
@@ -405,10 +685,27 @@ union cvmx_pow_pp_grp_mskx {
 		uint64_t qos1_pri:4;
 		uint64_t qos0_pri:4;
 		uint64_t grp_msk:16;
+#else
+		uint64_t grp_msk:16;
+		uint64_t qos0_pri:4;
+		uint64_t qos1_pri:4;
+		uint64_t qos2_pri:4;
+		uint64_t qos3_pri:4;
+		uint64_t qos4_pri:4;
+		uint64_t qos5_pri:4;
+		uint64_t qos6_pri:4;
+		uint64_t qos7_pri:4;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_pow_pp_grp_mskx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t grp_msk:16;
+#else
+		uint64_t grp_msk:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn30xx;
 	struct cvmx_pow_pp_grp_mskx_cn30xx cn31xx;
 	struct cvmx_pow_pp_grp_mskx_cn30xx cn38xx;
@@ -420,18 +717,29 @@ union cvmx_pow_pp_grp_mskx {
 	struct cvmx_pow_pp_grp_mskx_s cn56xxp1;
 	struct cvmx_pow_pp_grp_mskx_s cn58xx;
 	struct cvmx_pow_pp_grp_mskx_s cn58xxp1;
+	struct cvmx_pow_pp_grp_mskx_s cn61xx;
 	struct cvmx_pow_pp_grp_mskx_s cn63xx;
 	struct cvmx_pow_pp_grp_mskx_s cn63xxp1;
+	struct cvmx_pow_pp_grp_mskx_s cn66xx;
+	struct cvmx_pow_pp_grp_mskx_s cnf71xx;
 };
 
 union cvmx_pow_qos_rndx {
 	uint64_t u64;
 	struct cvmx_pow_qos_rndx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t rnd_p3:8;
 		uint64_t rnd_p2:8;
 		uint64_t rnd_p1:8;
 		uint64_t rnd:8;
+#else
+		uint64_t rnd:8;
+		uint64_t rnd_p1:8;
+		uint64_t rnd_p2:8;
+		uint64_t rnd_p3:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_qos_rndx_s cn30xx;
 	struct cvmx_pow_qos_rndx_s cn31xx;
@@ -444,13 +752,17 @@ union cvmx_pow_qos_rndx {
 	struct cvmx_pow_qos_rndx_s cn56xxp1;
 	struct cvmx_pow_qos_rndx_s cn58xx;
 	struct cvmx_pow_qos_rndx_s cn58xxp1;
+	struct cvmx_pow_qos_rndx_s cn61xx;
 	struct cvmx_pow_qos_rndx_s cn63xx;
 	struct cvmx_pow_qos_rndx_s cn63xxp1;
+	struct cvmx_pow_qos_rndx_s cn66xx;
+	struct cvmx_pow_qos_rndx_s cnf71xx;
 };
 
 union cvmx_pow_qos_thrx {
 	uint64_t u64;
 	struct cvmx_pow_qos_thrx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_60_63:4;
 		uint64_t des_cnt:12;
 		uint64_t buf_cnt:12;
@@ -459,8 +771,19 @@ union cvmx_pow_qos_thrx {
 		uint64_t max_thr:11;
 		uint64_t reserved_11_11:1;
 		uint64_t min_thr:11;
+#else
+		uint64_t min_thr:11;
+		uint64_t reserved_11_11:1;
+		uint64_t max_thr:11;
+		uint64_t reserved_23_23:1;
+		uint64_t free_cnt:12;
+		uint64_t buf_cnt:12;
+		uint64_t des_cnt:12;
+		uint64_t reserved_60_63:4;
+#endif
 	} s;
 	struct cvmx_pow_qos_thrx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_55_63:9;
 		uint64_t des_cnt:7;
 		uint64_t reserved_43_47:5;
@@ -471,8 +794,21 @@ union cvmx_pow_qos_thrx {
 		uint64_t max_thr:6;
 		uint64_t reserved_6_11:6;
 		uint64_t min_thr:6;
+#else
+		uint64_t min_thr:6;
+		uint64_t reserved_6_11:6;
+		uint64_t max_thr:6;
+		uint64_t reserved_18_23:6;
+		uint64_t free_cnt:7;
+		uint64_t reserved_31_35:5;
+		uint64_t buf_cnt:7;
+		uint64_t reserved_43_47:5;
+		uint64_t des_cnt:7;
+		uint64_t reserved_55_63:9;
+#endif
 	} cn30xx;
 	struct cvmx_pow_qos_thrx_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_57_63:7;
 		uint64_t des_cnt:9;
 		uint64_t reserved_45_47:3;
@@ -483,11 +819,24 @@ union cvmx_pow_qos_thrx {
 		uint64_t max_thr:8;
 		uint64_t reserved_8_11:4;
 		uint64_t min_thr:8;
+#else
+		uint64_t min_thr:8;
+		uint64_t reserved_8_11:4;
+		uint64_t max_thr:8;
+		uint64_t reserved_20_23:4;
+		uint64_t free_cnt:9;
+		uint64_t reserved_33_35:3;
+		uint64_t buf_cnt:9;
+		uint64_t reserved_45_47:3;
+		uint64_t des_cnt:9;
+		uint64_t reserved_57_63:7;
+#endif
 	} cn31xx;
 	struct cvmx_pow_qos_thrx_s cn38xx;
 	struct cvmx_pow_qos_thrx_s cn38xxp2;
 	struct cvmx_pow_qos_thrx_cn31xx cn50xx;
 	struct cvmx_pow_qos_thrx_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_58_63:6;
 		uint64_t des_cnt:10;
 		uint64_t reserved_46_47:2;
@@ -498,13 +847,27 @@ union cvmx_pow_qos_thrx {
 		uint64_t max_thr:9;
 		uint64_t reserved_9_11:3;
 		uint64_t min_thr:9;
+#else
+		uint64_t min_thr:9;
+		uint64_t reserved_9_11:3;
+		uint64_t max_thr:9;
+		uint64_t reserved_21_23:3;
+		uint64_t free_cnt:10;
+		uint64_t reserved_34_35:2;
+		uint64_t buf_cnt:10;
+		uint64_t reserved_46_47:2;
+		uint64_t des_cnt:10;
+		uint64_t reserved_58_63:6;
+#endif
 	} cn52xx;
 	struct cvmx_pow_qos_thrx_cn52xx cn52xxp1;
 	struct cvmx_pow_qos_thrx_s cn56xx;
 	struct cvmx_pow_qos_thrx_s cn56xxp1;
 	struct cvmx_pow_qos_thrx_s cn58xx;
 	struct cvmx_pow_qos_thrx_s cn58xxp1;
+	struct cvmx_pow_qos_thrx_cn52xx cn61xx;
 	struct cvmx_pow_qos_thrx_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_59_63:5;
 		uint64_t des_cnt:11;
 		uint64_t reserved_47_47:1;
@@ -515,15 +878,34 @@ union cvmx_pow_qos_thrx {
 		uint64_t max_thr:10;
 		uint64_t reserved_10_11:2;
 		uint64_t min_thr:10;
+#else
+		uint64_t min_thr:10;
+		uint64_t reserved_10_11:2;
+		uint64_t max_thr:10;
+		uint64_t reserved_22_23:2;
+		uint64_t free_cnt:11;
+		uint64_t reserved_35_35:1;
+		uint64_t buf_cnt:11;
+		uint64_t reserved_47_47:1;
+		uint64_t des_cnt:11;
+		uint64_t reserved_59_63:5;
+#endif
 	} cn63xx;
 	struct cvmx_pow_qos_thrx_cn63xx cn63xxp1;
+	struct cvmx_pow_qos_thrx_cn63xx cn66xx;
+	struct cvmx_pow_qos_thrx_cn52xx cnf71xx;
 };
 
 union cvmx_pow_ts_pc {
 	uint64_t u64;
 	struct cvmx_pow_ts_pc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t ts_pc:32;
+#else
+		uint64_t ts_pc:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_ts_pc_s cn30xx;
 	struct cvmx_pow_ts_pc_s cn31xx;
@@ -536,15 +918,23 @@ union cvmx_pow_ts_pc {
 	struct cvmx_pow_ts_pc_s cn56xxp1;
 	struct cvmx_pow_ts_pc_s cn58xx;
 	struct cvmx_pow_ts_pc_s cn58xxp1;
+	struct cvmx_pow_ts_pc_s cn61xx;
 	struct cvmx_pow_ts_pc_s cn63xx;
 	struct cvmx_pow_ts_pc_s cn63xxp1;
+	struct cvmx_pow_ts_pc_s cn66xx;
+	struct cvmx_pow_ts_pc_s cnf71xx;
 };
 
 union cvmx_pow_wa_com_pc {
 	uint64_t u64;
 	struct cvmx_pow_wa_com_pc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t wa_pc:32;
+#else
+		uint64_t wa_pc:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_wa_com_pc_s cn30xx;
 	struct cvmx_pow_wa_com_pc_s cn31xx;
@@ -557,15 +947,23 @@ union cvmx_pow_wa_com_pc {
 	struct cvmx_pow_wa_com_pc_s cn56xxp1;
 	struct cvmx_pow_wa_com_pc_s cn58xx;
 	struct cvmx_pow_wa_com_pc_s cn58xxp1;
+	struct cvmx_pow_wa_com_pc_s cn61xx;
 	struct cvmx_pow_wa_com_pc_s cn63xx;
 	struct cvmx_pow_wa_com_pc_s cn63xxp1;
+	struct cvmx_pow_wa_com_pc_s cn66xx;
+	struct cvmx_pow_wa_com_pc_s cnf71xx;
 };
 
 union cvmx_pow_wa_pcx {
 	uint64_t u64;
 	struct cvmx_pow_wa_pcx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t wa_pc:32;
+#else
+		uint64_t wa_pc:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_wa_pcx_s cn30xx;
 	struct cvmx_pow_wa_pcx_s cn31xx;
@@ -578,16 +976,25 @@ union cvmx_pow_wa_pcx {
 	struct cvmx_pow_wa_pcx_s cn56xxp1;
 	struct cvmx_pow_wa_pcx_s cn58xx;
 	struct cvmx_pow_wa_pcx_s cn58xxp1;
+	struct cvmx_pow_wa_pcx_s cn61xx;
 	struct cvmx_pow_wa_pcx_s cn63xx;
 	struct cvmx_pow_wa_pcx_s cn63xxp1;
+	struct cvmx_pow_wa_pcx_s cn66xx;
+	struct cvmx_pow_wa_pcx_s cnf71xx;
 };
 
 union cvmx_pow_wq_int {
 	uint64_t u64;
 	struct cvmx_pow_wq_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t iq_dis:16;
 		uint64_t wq_int:16;
+#else
+		uint64_t wq_int:16;
+		uint64_t iq_dis:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_wq_int_s cn30xx;
 	struct cvmx_pow_wq_int_s cn31xx;
@@ -600,69 +1007,126 @@ union cvmx_pow_wq_int {
 	struct cvmx_pow_wq_int_s cn56xxp1;
 	struct cvmx_pow_wq_int_s cn58xx;
 	struct cvmx_pow_wq_int_s cn58xxp1;
+	struct cvmx_pow_wq_int_s cn61xx;
 	struct cvmx_pow_wq_int_s cn63xx;
 	struct cvmx_pow_wq_int_s cn63xxp1;
+	struct cvmx_pow_wq_int_s cn66xx;
+	struct cvmx_pow_wq_int_s cnf71xx;
 };
 
 union cvmx_pow_wq_int_cntx {
 	uint64_t u64;
 	struct cvmx_pow_wq_int_cntx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t tc_cnt:4;
 		uint64_t ds_cnt:12;
 		uint64_t iq_cnt:12;
+#else
+		uint64_t iq_cnt:12;
+		uint64_t ds_cnt:12;
+		uint64_t tc_cnt:4;
+		uint64_t reserved_28_63:36;
+#endif
 	} s;
 	struct cvmx_pow_wq_int_cntx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t tc_cnt:4;
 		uint64_t reserved_19_23:5;
 		uint64_t ds_cnt:7;
 		uint64_t reserved_7_11:5;
 		uint64_t iq_cnt:7;
+#else
+		uint64_t iq_cnt:7;
+		uint64_t reserved_7_11:5;
+		uint64_t ds_cnt:7;
+		uint64_t reserved_19_23:5;
+		uint64_t tc_cnt:4;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn30xx;
 	struct cvmx_pow_wq_int_cntx_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t tc_cnt:4;
 		uint64_t reserved_21_23:3;
 		uint64_t ds_cnt:9;
 		uint64_t reserved_9_11:3;
 		uint64_t iq_cnt:9;
+#else
+		uint64_t iq_cnt:9;
+		uint64_t reserved_9_11:3;
+		uint64_t ds_cnt:9;
+		uint64_t reserved_21_23:3;
+		uint64_t tc_cnt:4;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn31xx;
 	struct cvmx_pow_wq_int_cntx_s cn38xx;
 	struct cvmx_pow_wq_int_cntx_s cn38xxp2;
 	struct cvmx_pow_wq_int_cntx_cn31xx cn50xx;
 	struct cvmx_pow_wq_int_cntx_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t tc_cnt:4;
 		uint64_t reserved_22_23:2;
 		uint64_t ds_cnt:10;
 		uint64_t reserved_10_11:2;
 		uint64_t iq_cnt:10;
+#else
+		uint64_t iq_cnt:10;
+		uint64_t reserved_10_11:2;
+		uint64_t ds_cnt:10;
+		uint64_t reserved_22_23:2;
+		uint64_t tc_cnt:4;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn52xx;
 	struct cvmx_pow_wq_int_cntx_cn52xx cn52xxp1;
 	struct cvmx_pow_wq_int_cntx_s cn56xx;
 	struct cvmx_pow_wq_int_cntx_s cn56xxp1;
 	struct cvmx_pow_wq_int_cntx_s cn58xx;
 	struct cvmx_pow_wq_int_cntx_s cn58xxp1;
+	struct cvmx_pow_wq_int_cntx_cn52xx cn61xx;
 	struct cvmx_pow_wq_int_cntx_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t tc_cnt:4;
 		uint64_t reserved_23_23:1;
 		uint64_t ds_cnt:11;
 		uint64_t reserved_11_11:1;
 		uint64_t iq_cnt:11;
+#else
+		uint64_t iq_cnt:11;
+		uint64_t reserved_11_11:1;
+		uint64_t ds_cnt:11;
+		uint64_t reserved_23_23:1;
+		uint64_t tc_cnt:4;
+		uint64_t reserved_28_63:36;
+#endif
 	} cn63xx;
 	struct cvmx_pow_wq_int_cntx_cn63xx cn63xxp1;
+	struct cvmx_pow_wq_int_cntx_cn63xx cn66xx;
+	struct cvmx_pow_wq_int_cntx_cn52xx cnf71xx;
 };
 
 union cvmx_pow_wq_int_pc {
 	uint64_t u64;
 	struct cvmx_pow_wq_int_pc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_60_63:4;
 		uint64_t pc:28;
 		uint64_t reserved_28_31:4;
 		uint64_t pc_thr:20;
 		uint64_t reserved_0_7:8;
+#else
+		uint64_t reserved_0_7:8;
+		uint64_t pc_thr:20;
+		uint64_t reserved_28_31:4;
+		uint64_t pc:28;
+		uint64_t reserved_60_63:4;
+#endif
 	} s;
 	struct cvmx_pow_wq_int_pc_s cn30xx;
 	struct cvmx_pow_wq_int_pc_s cn31xx;
@@ -675,13 +1139,17 @@ union cvmx_pow_wq_int_pc {
 	struct cvmx_pow_wq_int_pc_s cn56xxp1;
 	struct cvmx_pow_wq_int_pc_s cn58xx;
 	struct cvmx_pow_wq_int_pc_s cn58xxp1;
+	struct cvmx_pow_wq_int_pc_s cn61xx;
 	struct cvmx_pow_wq_int_pc_s cn63xx;
 	struct cvmx_pow_wq_int_pc_s cn63xxp1;
+	struct cvmx_pow_wq_int_pc_s cn66xx;
+	struct cvmx_pow_wq_int_pc_s cnf71xx;
 };
 
 union cvmx_pow_wq_int_thrx {
 	uint64_t u64;
 	struct cvmx_pow_wq_int_thrx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t tc_en:1;
 		uint64_t tc_thr:4;
@@ -689,8 +1157,18 @@ union cvmx_pow_wq_int_thrx {
 		uint64_t ds_thr:11;
 		uint64_t reserved_11_11:1;
 		uint64_t iq_thr:11;
+#else
+		uint64_t iq_thr:11;
+		uint64_t reserved_11_11:1;
+		uint64_t ds_thr:11;
+		uint64_t reserved_23_23:1;
+		uint64_t tc_thr:4;
+		uint64_t tc_en:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} s;
 	struct cvmx_pow_wq_int_thrx_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t tc_en:1;
 		uint64_t tc_thr:4;
@@ -698,8 +1176,18 @@ union cvmx_pow_wq_int_thrx {
 		uint64_t ds_thr:6;
 		uint64_t reserved_6_11:6;
 		uint64_t iq_thr:6;
+#else
+		uint64_t iq_thr:6;
+		uint64_t reserved_6_11:6;
+		uint64_t ds_thr:6;
+		uint64_t reserved_18_23:6;
+		uint64_t tc_thr:4;
+		uint64_t tc_en:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn30xx;
 	struct cvmx_pow_wq_int_thrx_cn31xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t tc_en:1;
 		uint64_t tc_thr:4;
@@ -707,11 +1195,21 @@ union cvmx_pow_wq_int_thrx {
 		uint64_t ds_thr:8;
 		uint64_t reserved_8_11:4;
 		uint64_t iq_thr:8;
+#else
+		uint64_t iq_thr:8;
+		uint64_t reserved_8_11:4;
+		uint64_t ds_thr:8;
+		uint64_t reserved_20_23:4;
+		uint64_t tc_thr:4;
+		uint64_t tc_en:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn31xx;
 	struct cvmx_pow_wq_int_thrx_s cn38xx;
 	struct cvmx_pow_wq_int_thrx_s cn38xxp2;
 	struct cvmx_pow_wq_int_thrx_cn31xx cn50xx;
 	struct cvmx_pow_wq_int_thrx_cn52xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t tc_en:1;
 		uint64_t tc_thr:4;
@@ -719,13 +1217,24 @@ union cvmx_pow_wq_int_thrx {
 		uint64_t ds_thr:9;
 		uint64_t reserved_9_11:3;
 		uint64_t iq_thr:9;
+#else
+		uint64_t iq_thr:9;
+		uint64_t reserved_9_11:3;
+		uint64_t ds_thr:9;
+		uint64_t reserved_21_23:3;
+		uint64_t tc_thr:4;
+		uint64_t tc_en:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn52xx;
 	struct cvmx_pow_wq_int_thrx_cn52xx cn52xxp1;
 	struct cvmx_pow_wq_int_thrx_s cn56xx;
 	struct cvmx_pow_wq_int_thrx_s cn56xxp1;
 	struct cvmx_pow_wq_int_thrx_s cn58xx;
 	struct cvmx_pow_wq_int_thrx_s cn58xxp1;
+	struct cvmx_pow_wq_int_thrx_cn52xx cn61xx;
 	struct cvmx_pow_wq_int_thrx_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_29_63:35;
 		uint64_t tc_en:1;
 		uint64_t tc_thr:4;
@@ -733,15 +1242,31 @@ union cvmx_pow_wq_int_thrx {
 		uint64_t ds_thr:10;
 		uint64_t reserved_10_11:2;
 		uint64_t iq_thr:10;
+#else
+		uint64_t iq_thr:10;
+		uint64_t reserved_10_11:2;
+		uint64_t ds_thr:10;
+		uint64_t reserved_22_23:2;
+		uint64_t tc_thr:4;
+		uint64_t tc_en:1;
+		uint64_t reserved_29_63:35;
+#endif
 	} cn63xx;
 	struct cvmx_pow_wq_int_thrx_cn63xx cn63xxp1;
+	struct cvmx_pow_wq_int_thrx_cn63xx cn66xx;
+	struct cvmx_pow_wq_int_thrx_cn52xx cnf71xx;
 };
 
 union cvmx_pow_ws_pcx {
 	uint64_t u64;
 	struct cvmx_pow_ws_pcx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t ws_pc:32;
+#else
+		uint64_t ws_pc:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_pow_ws_pcx_s cn30xx;
 	struct cvmx_pow_ws_pcx_s cn31xx;
@@ -754,8 +1279,11 @@ union cvmx_pow_ws_pcx {
 	struct cvmx_pow_ws_pcx_s cn56xxp1;
 	struct cvmx_pow_ws_pcx_s cn58xx;
 	struct cvmx_pow_ws_pcx_s cn58xxp1;
+	struct cvmx_pow_ws_pcx_s cn61xx;
 	struct cvmx_pow_ws_pcx_s cn63xx;
 	struct cvmx_pow_ws_pcx_s cn63xxp1;
+	struct cvmx_pow_ws_pcx_s cn66xx;
+	struct cvmx_pow_ws_pcx_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
index c45da1f35ea..87d6f92a548 100644
--- a/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,8 +28,6 @@
 #ifndef __CVMX_RNM_DEFS_H__
 #define __CVMX_RNM_DEFS_H__
 
-#include <linux/types.h>
-
 #define CVMX_RNM_BIST_STATUS (CVMX_ADD_IO_SEG(0x0001180040000008ull))
 #define CVMX_RNM_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180040000000ull))
 #define CVMX_RNM_EER_DBG (CVMX_ADD_IO_SEG(0x0001180040000018ull))
@@ -39,9 +37,15 @@
 union cvmx_rnm_bist_status {
 	uint64_t u64;
 	struct cvmx_rnm_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t rrc:1;
 		uint64_t mem:1;
+#else
+		uint64_t mem:1;
+		uint64_t rrc:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_rnm_bist_status_s cn30xx;
 	struct cvmx_rnm_bist_status_s cn31xx;
@@ -54,14 +58,21 @@ union cvmx_rnm_bist_status {
 	struct cvmx_rnm_bist_status_s cn56xxp1;
 	struct cvmx_rnm_bist_status_s cn58xx;
 	struct cvmx_rnm_bist_status_s cn58xxp1;
+	struct cvmx_rnm_bist_status_s cn61xx;
 	struct cvmx_rnm_bist_status_s cn63xx;
 	struct cvmx_rnm_bist_status_s cn63xxp1;
+	struct cvmx_rnm_bist_status_s cn66xx;
+	struct cvmx_rnm_bist_status_s cn68xx;
+	struct cvmx_rnm_bist_status_s cn68xxp1;
+	struct cvmx_rnm_bist_status_s cnf71xx;
 };
 
 union cvmx_rnm_ctl_status {
 	uint64_t u64;
 	struct cvmx_rnm_ctl_status_s {
-		uint64_t reserved_11_63:53;
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_12_63:52;
+		uint64_t dis_mak:1;
 		uint64_t eer_lck:1;
 		uint64_t eer_val:1;
 		uint64_t ent_sel:4;
@@ -70,18 +81,39 @@ union cvmx_rnm_ctl_status {
 		uint64_t rnm_rst:1;
 		uint64_t rng_en:1;
 		uint64_t ent_en:1;
+#else
+		uint64_t ent_en:1;
+		uint64_t rng_en:1;
+		uint64_t rnm_rst:1;
+		uint64_t rng_rst:1;
+		uint64_t exp_ent:1;
+		uint64_t ent_sel:4;
+		uint64_t eer_val:1;
+		uint64_t eer_lck:1;
+		uint64_t dis_mak:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_rnm_ctl_status_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t rng_rst:1;
 		uint64_t rnm_rst:1;
 		uint64_t rng_en:1;
 		uint64_t ent_en:1;
+#else
+		uint64_t ent_en:1;
+		uint64_t rng_en:1;
+		uint64_t rnm_rst:1;
+		uint64_t rng_rst:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} cn30xx;
 	struct cvmx_rnm_ctl_status_cn30xx cn31xx;
 	struct cvmx_rnm_ctl_status_cn30xx cn38xx;
 	struct cvmx_rnm_ctl_status_cn30xx cn38xxp2;
 	struct cvmx_rnm_ctl_status_cn50xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t ent_sel:4;
 		uint64_t exp_ent:1;
@@ -89,6 +121,15 @@ union cvmx_rnm_ctl_status {
 		uint64_t rnm_rst:1;
 		uint64_t rng_en:1;
 		uint64_t ent_en:1;
+#else
+		uint64_t ent_en:1;
+		uint64_t rng_en:1;
+		uint64_t rnm_rst:1;
+		uint64_t rng_rst:1;
+		uint64_t exp_ent:1;
+		uint64_t ent_sel:4;
+		uint64_t reserved_9_63:55;
+#endif
 	} cn50xx;
 	struct cvmx_rnm_ctl_status_cn50xx cn52xx;
 	struct cvmx_rnm_ctl_status_cn50xx cn52xxp1;
@@ -96,34 +137,88 @@ union cvmx_rnm_ctl_status {
 	struct cvmx_rnm_ctl_status_cn50xx cn56xxp1;
 	struct cvmx_rnm_ctl_status_cn50xx cn58xx;
 	struct cvmx_rnm_ctl_status_cn50xx cn58xxp1;
-	struct cvmx_rnm_ctl_status_s cn63xx;
-	struct cvmx_rnm_ctl_status_s cn63xxp1;
+	struct cvmx_rnm_ctl_status_s cn61xx;
+	struct cvmx_rnm_ctl_status_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t reserved_11_63:53;
+		uint64_t eer_lck:1;
+		uint64_t eer_val:1;
+		uint64_t ent_sel:4;
+		uint64_t exp_ent:1;
+		uint64_t rng_rst:1;
+		uint64_t rnm_rst:1;
+		uint64_t rng_en:1;
+		uint64_t ent_en:1;
+#else
+		uint64_t ent_en:1;
+		uint64_t rng_en:1;
+		uint64_t rnm_rst:1;
+		uint64_t rng_rst:1;
+		uint64_t exp_ent:1;
+		uint64_t ent_sel:4;
+		uint64_t eer_val:1;
+		uint64_t eer_lck:1;
+		uint64_t reserved_11_63:53;
+#endif
+	} cn63xx;
+	struct cvmx_rnm_ctl_status_cn63xx cn63xxp1;
+	struct cvmx_rnm_ctl_status_s cn66xx;
+	struct cvmx_rnm_ctl_status_cn63xx cn68xx;
+	struct cvmx_rnm_ctl_status_cn63xx cn68xxp1;
+	struct cvmx_rnm_ctl_status_s cnf71xx;
 };
 
 union cvmx_rnm_eer_dbg {
 	uint64_t u64;
 	struct cvmx_rnm_eer_dbg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t dat:64;
+#else
+		uint64_t dat:64;
+#endif
 	} s;
+	struct cvmx_rnm_eer_dbg_s cn61xx;
 	struct cvmx_rnm_eer_dbg_s cn63xx;
 	struct cvmx_rnm_eer_dbg_s cn63xxp1;
+	struct cvmx_rnm_eer_dbg_s cn66xx;
+	struct cvmx_rnm_eer_dbg_s cn68xx;
+	struct cvmx_rnm_eer_dbg_s cn68xxp1;
+	struct cvmx_rnm_eer_dbg_s cnf71xx;
 };
 
 union cvmx_rnm_eer_key {
 	uint64_t u64;
 	struct cvmx_rnm_eer_key_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t key:64;
+#else
 		uint64_t key:64;
+#endif
 	} s;
+	struct cvmx_rnm_eer_key_s cn61xx;
 	struct cvmx_rnm_eer_key_s cn63xx;
 	struct cvmx_rnm_eer_key_s cn63xxp1;
+	struct cvmx_rnm_eer_key_s cn66xx;
+	struct cvmx_rnm_eer_key_s cn68xx;
+	struct cvmx_rnm_eer_key_s cn68xxp1;
+	struct cvmx_rnm_eer_key_s cnf71xx;
 };
 
 union cvmx_rnm_serial_num {
 	uint64_t u64;
 	struct cvmx_rnm_serial_num_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t dat:64;
+#else
 		uint64_t dat:64;
+#endif
 	} s;
+	struct cvmx_rnm_serial_num_s cn61xx;
 	struct cvmx_rnm_serial_num_s cn63xx;
+	struct cvmx_rnm_serial_num_s cn66xx;
+	struct cvmx_rnm_serial_num_s cn68xx;
+	struct cvmx_rnm_serial_num_s cn68xxp1;
+	struct cvmx_rnm_serial_num_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-sli-defs.h b/arch/mips/include/asm/octeon/cvmx-sli-defs.h
index 7c6c901d3d2..e697c2f52a6 100644
--- a/arch/mips/include/asm/octeon/cvmx-sli-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-sli-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2011 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -127,6 +127,7 @@
 union cvmx_sli_bist_status {
 	uint64_t u64;
 	struct cvmx_sli_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t ncb_req:1;
 		uint64_t n2p0_c:1;
@@ -153,8 +154,37 @@ union cvmx_sli_bist_status {
 		uint64_t dsi0_0:1;
 		uint64_t msi:1;
 		uint64_t ncb_cmd:1;
+#else
+		uint64_t ncb_cmd:1;
+		uint64_t msi:1;
+		uint64_t dsi0_0:1;
+		uint64_t dsi0_1:1;
+		uint64_t dsi1_0:1;
+		uint64_t dsi1_1:1;
+		uint64_t reserved_6_8:3;
+		uint64_t p2n1_p1:1;
+		uint64_t p2n1_p0:1;
+		uint64_t p2n1_n:1;
+		uint64_t p2n1_c1:1;
+		uint64_t p2n1_c0:1;
+		uint64_t p2n0_p1:1;
+		uint64_t p2n0_p0:1;
+		uint64_t p2n0_n:1;
+		uint64_t p2n0_c1:1;
+		uint64_t p2n0_c0:1;
+		uint64_t reserved_19_24:6;
+		uint64_t cpl_p1:1;
+		uint64_t cpl_p0:1;
+		uint64_t n2p1_o:1;
+		uint64_t n2p1_c:1;
+		uint64_t n2p0_o:1;
+		uint64_t n2p0_c:1;
+		uint64_t ncb_req:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_bist_status_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t n2p0_c:1;
 		uint64_t n2p0_o:1;
@@ -179,8 +209,35 @@ union cvmx_sli_bist_status {
 		uint64_t dsi0_0:1;
 		uint64_t msi:1;
 		uint64_t ncb_cmd:1;
+#else
+		uint64_t ncb_cmd:1;
+		uint64_t msi:1;
+		uint64_t dsi0_0:1;
+		uint64_t dsi0_1:1;
+		uint64_t dsi1_0:1;
+		uint64_t dsi1_1:1;
+		uint64_t reserved_6_8:3;
+		uint64_t p2n1_p1:1;
+		uint64_t p2n1_p0:1;
+		uint64_t p2n1_n:1;
+		uint64_t p2n1_c1:1;
+		uint64_t p2n1_c0:1;
+		uint64_t p2n0_p1:1;
+		uint64_t p2n0_p0:1;
+		uint64_t p2n0_n:1;
+		uint64_t p2n0_c1:1;
+		uint64_t p2n0_c0:1;
+		uint64_t reserved_19_24:6;
+		uint64_t cpl_p1:1;
+		uint64_t cpl_p0:1;
+		uint64_t reserved_27_28:2;
+		uint64_t n2p0_o:1;
+		uint64_t n2p0_c:1;
+		uint64_t reserved_31_63:33;
+#endif
 	} cn61xx;
 	struct cvmx_sli_bist_status_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_31_63:33;
 		uint64_t n2p0_c:1;
 		uint64_t n2p0_o:1;
@@ -206,16 +263,45 @@ union cvmx_sli_bist_status {
 		uint64_t dsi0_0:1;
 		uint64_t msi:1;
 		uint64_t ncb_cmd:1;
+#else
+		uint64_t ncb_cmd:1;
+		uint64_t msi:1;
+		uint64_t dsi0_0:1;
+		uint64_t dsi0_1:1;
+		uint64_t dsi1_0:1;
+		uint64_t dsi1_1:1;
+		uint64_t reserved_6_8:3;
+		uint64_t p2n1_p1:1;
+		uint64_t p2n1_p0:1;
+		uint64_t p2n1_n:1;
+		uint64_t p2n1_c1:1;
+		uint64_t p2n1_c0:1;
+		uint64_t p2n0_p1:1;
+		uint64_t p2n0_p0:1;
+		uint64_t p2n0_n:1;
+		uint64_t p2n0_c1:1;
+		uint64_t p2n0_c0:1;
+		uint64_t reserved_19_24:6;
+		uint64_t cpl_p1:1;
+		uint64_t cpl_p0:1;
+		uint64_t n2p1_o:1;
+		uint64_t n2p1_c:1;
+		uint64_t n2p0_o:1;
+		uint64_t n2p0_c:1;
+		uint64_t reserved_31_63:33;
+#endif
 	} cn63xx;
 	struct cvmx_sli_bist_status_cn63xx cn63xxp1;
 	struct cvmx_sli_bist_status_cn61xx cn66xx;
 	struct cvmx_sli_bist_status_s cn68xx;
 	struct cvmx_sli_bist_status_s cn68xxp1;
+	struct cvmx_sli_bist_status_cn61xx cnf71xx;
 };
 
 union cvmx_sli_ctl_portx {
 	uint64_t u64;
 	struct cvmx_sli_ctl_portx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_22_63:42;
 		uint64_t intd:1;
 		uint64_t intc:1;
@@ -232,6 +318,24 @@ union cvmx_sli_ctl_portx {
 		uint64_t ptlp_ro:1;
 		uint64_t reserved_1_4:4;
 		uint64_t wait_com:1;
+#else
+		uint64_t wait_com:1;
+		uint64_t reserved_1_4:4;
+		uint64_t ptlp_ro:1;
+		uint64_t reserved_6_6:1;
+		uint64_t ctlp_ro:1;
+		uint64_t inta_map:2;
+		uint64_t intb_map:2;
+		uint64_t intc_map:2;
+		uint64_t intd_map:2;
+		uint64_t waitl_com:1;
+		uint64_t dis_port:1;
+		uint64_t inta:1;
+		uint64_t intb:1;
+		uint64_t intc:1;
+		uint64_t intd:1;
+		uint64_t reserved_22_63:42;
+#endif
 	} s;
 	struct cvmx_sli_ctl_portx_s cn61xx;
 	struct cvmx_sli_ctl_portx_s cn63xx;
@@ -239,36 +343,59 @@ union cvmx_sli_ctl_portx {
 	struct cvmx_sli_ctl_portx_s cn66xx;
 	struct cvmx_sli_ctl_portx_s cn68xx;
 	struct cvmx_sli_ctl_portx_s cn68xxp1;
+	struct cvmx_sli_ctl_portx_s cnf71xx;
 };
 
 union cvmx_sli_ctl_status {
 	uint64_t u64;
 	struct cvmx_sli_ctl_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t p1_ntags:6;
 		uint64_t p0_ntags:6;
 		uint64_t chip_rev:8;
+#else
+		uint64_t chip_rev:8;
+		uint64_t p0_ntags:6;
+		uint64_t p1_ntags:6;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
 	struct cvmx_sli_ctl_status_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t p0_ntags:6;
 		uint64_t chip_rev:8;
+#else
+		uint64_t chip_rev:8;
+		uint64_t p0_ntags:6;
+		uint64_t reserved_14_63:50;
+#endif
 	} cn61xx;
 	struct cvmx_sli_ctl_status_s cn63xx;
 	struct cvmx_sli_ctl_status_s cn63xxp1;
 	struct cvmx_sli_ctl_status_cn61xx cn66xx;
 	struct cvmx_sli_ctl_status_s cn68xx;
 	struct cvmx_sli_ctl_status_s cn68xxp1;
+	struct cvmx_sli_ctl_status_cn61xx cnf71xx;
 };
 
 union cvmx_sli_data_out_cnt {
 	uint64_t u64;
 	struct cvmx_sli_data_out_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t p1_ucnt:16;
 		uint64_t p1_fcnt:6;
 		uint64_t p0_ucnt:16;
 		uint64_t p0_fcnt:6;
+#else
+		uint64_t p0_fcnt:6;
+		uint64_t p0_ucnt:16;
+		uint64_t p1_fcnt:6;
+		uint64_t p1_ucnt:16;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_sli_data_out_cnt_s cn61xx;
 	struct cvmx_sli_data_out_cnt_s cn63xx;
@@ -276,14 +403,21 @@ union cvmx_sli_data_out_cnt {
 	struct cvmx_sli_data_out_cnt_s cn66xx;
 	struct cvmx_sli_data_out_cnt_s cn68xx;
 	struct cvmx_sli_data_out_cnt_s cn68xxp1;
+	struct cvmx_sli_data_out_cnt_s cnf71xx;
 };
 
 union cvmx_sli_dbg_data {
 	uint64_t u64;
 	struct cvmx_sli_dbg_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t dsel_ext:1;
 		uint64_t data:17;
+#else
+		uint64_t data:17;
+		uint64_t dsel_ext:1;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_sli_dbg_data_s cn61xx;
 	struct cvmx_sli_dbg_data_s cn63xx;
@@ -291,14 +425,21 @@ union cvmx_sli_dbg_data {
 	struct cvmx_sli_dbg_data_s cn66xx;
 	struct cvmx_sli_dbg_data_s cn68xx;
 	struct cvmx_sli_dbg_data_s cn68xxp1;
+	struct cvmx_sli_dbg_data_s cnf71xx;
 };
 
 union cvmx_sli_dbg_select {
 	uint64_t u64;
 	struct cvmx_sli_dbg_select_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_33_63:31;
 		uint64_t adbg_sel:1;
 		uint64_t dbg_sel:32;
+#else
+		uint64_t dbg_sel:32;
+		uint64_t adbg_sel:1;
+		uint64_t reserved_33_63:31;
+#endif
 	} s;
 	struct cvmx_sli_dbg_select_s cn61xx;
 	struct cvmx_sli_dbg_select_s cn63xx;
@@ -306,13 +447,19 @@ union cvmx_sli_dbg_select {
 	struct cvmx_sli_dbg_select_s cn66xx;
 	struct cvmx_sli_dbg_select_s cn68xx;
 	struct cvmx_sli_dbg_select_s cn68xxp1;
+	struct cvmx_sli_dbg_select_s cnf71xx;
 };
 
 union cvmx_sli_dmax_cnt {
 	uint64_t u64;
 	struct cvmx_sli_dmax_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_dmax_cnt_s cn61xx;
 	struct cvmx_sli_dmax_cnt_s cn63xx;
@@ -320,13 +467,19 @@ union cvmx_sli_dmax_cnt {
 	struct cvmx_sli_dmax_cnt_s cn66xx;
 	struct cvmx_sli_dmax_cnt_s cn68xx;
 	struct cvmx_sli_dmax_cnt_s cn68xxp1;
+	struct cvmx_sli_dmax_cnt_s cnf71xx;
 };
 
 union cvmx_sli_dmax_int_level {
 	uint64_t u64;
 	struct cvmx_sli_dmax_int_level_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t time:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t time:32;
+#endif
 	} s;
 	struct cvmx_sli_dmax_int_level_s cn61xx;
 	struct cvmx_sli_dmax_int_level_s cn63xx;
@@ -334,13 +487,19 @@ union cvmx_sli_dmax_int_level {
 	struct cvmx_sli_dmax_int_level_s cn66xx;
 	struct cvmx_sli_dmax_int_level_s cn68xx;
 	struct cvmx_sli_dmax_int_level_s cn68xxp1;
+	struct cvmx_sli_dmax_int_level_s cnf71xx;
 };
 
 union cvmx_sli_dmax_tim {
 	uint64_t u64;
 	struct cvmx_sli_dmax_tim_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t tim:32;
+#else
+		uint64_t tim:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_dmax_tim_s cn61xx;
 	struct cvmx_sli_dmax_tim_s cn63xx;
@@ -348,11 +507,13 @@ union cvmx_sli_dmax_tim {
 	struct cvmx_sli_dmax_tim_s cn66xx;
 	struct cvmx_sli_dmax_tim_s cn68xx;
 	struct cvmx_sli_dmax_tim_s cn68xxp1;
+	struct cvmx_sli_dmax_tim_s cnf71xx;
 };
 
 union cvmx_sli_int_enb_ciu {
 	uint64_t u64;
 	struct cvmx_sli_int_enb_ciu_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t pipe_err:1;
 		uint64_t ill_pad:1;
@@ -399,8 +560,57 @@ union cvmx_sli_int_enb_ciu {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t reserved_18_19:2;
+		uint64_t m2_up_b0:1;
+		uint64_t m2_up_wi:1;
+		uint64_t m2_un_b0:1;
+		uint64_t m2_un_wi:1;
+		uint64_t m3_up_b0:1;
+		uint64_t m3_up_wi:1;
+		uint64_t m3_un_b0:1;
+		uint64_t m3_un_wi:1;
+		uint64_t reserved_28_31:4;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t pin_bp:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t sprt2_err:1;
+		uint64_t sprt3_err:1;
+		uint64_t ill_pad:1;
+		uint64_t pipe_err:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_sli_int_enb_ciu_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t ill_pad:1;
 		uint64_t sprt3_err:1;
@@ -446,8 +656,56 @@ union cvmx_sli_int_enb_ciu {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t reserved_18_19:2;
+		uint64_t m2_up_b0:1;
+		uint64_t m2_up_wi:1;
+		uint64_t m2_un_b0:1;
+		uint64_t m2_un_wi:1;
+		uint64_t m3_up_b0:1;
+		uint64_t m3_up_wi:1;
+		uint64_t m3_un_b0:1;
+		uint64_t m3_un_wi:1;
+		uint64_t reserved_28_31:4;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t pin_bp:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t sprt2_err:1;
+		uint64_t sprt3_err:1;
+		uint64_t ill_pad:1;
+		uint64_t reserved_61_63:3;
+#endif
 	} cn61xx;
 	struct cvmx_sli_int_enb_ciu_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t ill_pad:1;
 		uint64_t reserved_58_59:2;
@@ -483,10 +741,48 @@ union cvmx_sli_int_enb_ciu {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t reserved_18_31:14;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t pin_bp:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t reserved_58_59:2;
+		uint64_t ill_pad:1;
+		uint64_t reserved_61_63:3;
+#endif
 	} cn63xx;
 	struct cvmx_sli_int_enb_ciu_cn63xx cn63xxp1;
 	struct cvmx_sli_int_enb_ciu_cn61xx cn66xx;
 	struct cvmx_sli_int_enb_ciu_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t pipe_err:1;
 		uint64_t ill_pad:1;
@@ -523,13 +819,53 @@ union cvmx_sli_int_enb_ciu {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t reserved_18_31:14;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t reserved_51_51:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t reserved_58_59:2;
+		uint64_t ill_pad:1;
+		uint64_t pipe_err:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} cn68xx;
 	struct cvmx_sli_int_enb_ciu_cn68xx cn68xxp1;
+	struct cvmx_sli_int_enb_ciu_cn61xx cnf71xx;
 };
 
 union cvmx_sli_int_enb_portx {
 	uint64_t u64;
 	struct cvmx_sli_int_enb_portx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t pipe_err:1;
 		uint64_t ill_pad:1;
@@ -577,8 +913,58 @@ union cvmx_sli_int_enb_portx {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t mac0_int:1;
+		uint64_t mac1_int:1;
+		uint64_t m2_up_b0:1;
+		uint64_t m2_up_wi:1;
+		uint64_t m2_un_b0:1;
+		uint64_t m2_un_wi:1;
+		uint64_t m3_up_b0:1;
+		uint64_t m3_up_wi:1;
+		uint64_t m3_un_b0:1;
+		uint64_t m3_un_wi:1;
+		uint64_t reserved_28_31:4;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t pin_bp:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t sprt2_err:1;
+		uint64_t sprt3_err:1;
+		uint64_t ill_pad:1;
+		uint64_t pipe_err:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_sli_int_enb_portx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t ill_pad:1;
 		uint64_t sprt3_err:1;
@@ -625,8 +1011,57 @@ union cvmx_sli_int_enb_portx {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t mac0_int:1;
+		uint64_t mac1_int:1;
+		uint64_t m2_up_b0:1;
+		uint64_t m2_up_wi:1;
+		uint64_t m2_un_b0:1;
+		uint64_t m2_un_wi:1;
+		uint64_t m3_up_b0:1;
+		uint64_t m3_up_wi:1;
+		uint64_t m3_un_b0:1;
+		uint64_t m3_un_wi:1;
+		uint64_t reserved_28_31:4;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t pin_bp:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t sprt2_err:1;
+		uint64_t sprt3_err:1;
+		uint64_t ill_pad:1;
+		uint64_t reserved_61_63:3;
+#endif
 	} cn61xx;
 	struct cvmx_sli_int_enb_portx_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t ill_pad:1;
 		uint64_t reserved_58_59:2;
@@ -664,10 +1099,50 @@ union cvmx_sli_int_enb_portx {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t mac0_int:1;
+		uint64_t mac1_int:1;
+		uint64_t reserved_20_31:12;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t pin_bp:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t reserved_58_59:2;
+		uint64_t ill_pad:1;
+		uint64_t reserved_61_63:3;
+#endif
 	} cn63xx;
 	struct cvmx_sli_int_enb_portx_cn63xx cn63xxp1;
 	struct cvmx_sli_int_enb_portx_cn61xx cn66xx;
 	struct cvmx_sli_int_enb_portx_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t pipe_err:1;
 		uint64_t ill_pad:1;
@@ -706,13 +1181,55 @@ union cvmx_sli_int_enb_portx {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t mac0_int:1;
+		uint64_t mac1_int:1;
+		uint64_t reserved_20_31:12;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t reserved_51_51:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t reserved_58_59:2;
+		uint64_t ill_pad:1;
+		uint64_t pipe_err:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} cn68xx;
 	struct cvmx_sli_int_enb_portx_cn68xx cn68xxp1;
+	struct cvmx_sli_int_enb_portx_cn61xx cnf71xx;
 };
 
 union cvmx_sli_int_sum {
 	uint64_t u64;
 	struct cvmx_sli_int_sum_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t pipe_err:1;
 		uint64_t ill_pad:1;
@@ -760,8 +1277,58 @@ union cvmx_sli_int_sum {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t mac0_int:1;
+		uint64_t mac1_int:1;
+		uint64_t m2_up_b0:1;
+		uint64_t m2_up_wi:1;
+		uint64_t m2_un_b0:1;
+		uint64_t m2_un_wi:1;
+		uint64_t m3_up_b0:1;
+		uint64_t m3_up_wi:1;
+		uint64_t m3_un_b0:1;
+		uint64_t m3_un_wi:1;
+		uint64_t reserved_28_31:4;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t pin_bp:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t sprt2_err:1;
+		uint64_t sprt3_err:1;
+		uint64_t ill_pad:1;
+		uint64_t pipe_err:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} s;
 	struct cvmx_sli_int_sum_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t ill_pad:1;
 		uint64_t sprt3_err:1;
@@ -808,8 +1375,57 @@ union cvmx_sli_int_sum {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t mac0_int:1;
+		uint64_t mac1_int:1;
+		uint64_t m2_up_b0:1;
+		uint64_t m2_up_wi:1;
+		uint64_t m2_un_b0:1;
+		uint64_t m2_un_wi:1;
+		uint64_t m3_up_b0:1;
+		uint64_t m3_up_wi:1;
+		uint64_t m3_un_b0:1;
+		uint64_t m3_un_wi:1;
+		uint64_t reserved_28_31:4;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t pin_bp:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t sprt2_err:1;
+		uint64_t sprt3_err:1;
+		uint64_t ill_pad:1;
+		uint64_t reserved_61_63:3;
+#endif
 	} cn61xx;
 	struct cvmx_sli_int_sum_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_61_63:3;
 		uint64_t ill_pad:1;
 		uint64_t reserved_58_59:2;
@@ -847,10 +1463,50 @@ union cvmx_sli_int_sum {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t mac0_int:1;
+		uint64_t mac1_int:1;
+		uint64_t reserved_20_31:12;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t pin_bp:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t reserved_58_59:2;
+		uint64_t ill_pad:1;
+		uint64_t reserved_61_63:3;
+#endif
 	} cn63xx;
 	struct cvmx_sli_int_sum_cn63xx cn63xxp1;
 	struct cvmx_sli_int_sum_cn61xx cn66xx;
 	struct cvmx_sli_int_sum_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_62_63:2;
 		uint64_t pipe_err:1;
 		uint64_t ill_pad:1;
@@ -889,14 +1545,59 @@ union cvmx_sli_int_sum {
 		uint64_t bar0_to:1;
 		uint64_t reserved_1_1:1;
 		uint64_t rml_to:1;
+#else
+		uint64_t rml_to:1;
+		uint64_t reserved_1_1:1;
+		uint64_t bar0_to:1;
+		uint64_t iob2big:1;
+		uint64_t pcnt:1;
+		uint64_t ptime:1;
+		uint64_t reserved_6_7:2;
+		uint64_t m0_up_b0:1;
+		uint64_t m0_up_wi:1;
+		uint64_t m0_un_b0:1;
+		uint64_t m0_un_wi:1;
+		uint64_t m1_up_b0:1;
+		uint64_t m1_up_wi:1;
+		uint64_t m1_un_b0:1;
+		uint64_t m1_un_wi:1;
+		uint64_t mio_int0:1;
+		uint64_t mio_int1:1;
+		uint64_t mac0_int:1;
+		uint64_t mac1_int:1;
+		uint64_t reserved_20_31:12;
+		uint64_t dmafi:2;
+		uint64_t dcnt:2;
+		uint64_t dtime:2;
+		uint64_t reserved_38_47:10;
+		uint64_t pidbof:1;
+		uint64_t psldbof:1;
+		uint64_t pout_err:1;
+		uint64_t reserved_51_51:1;
+		uint64_t pgl_err:1;
+		uint64_t pdi_err:1;
+		uint64_t pop_err:1;
+		uint64_t pins_err:1;
+		uint64_t sprt0_err:1;
+		uint64_t sprt1_err:1;
+		uint64_t reserved_58_59:2;
+		uint64_t ill_pad:1;
+		uint64_t pipe_err:1;
+		uint64_t reserved_62_63:2;
+#endif
 	} cn68xx;
 	struct cvmx_sli_int_sum_cn68xx cn68xxp1;
+	struct cvmx_sli_int_sum_cn61xx cnf71xx;
 };
 
 union cvmx_sli_last_win_rdata0 {
 	uint64_t u64;
 	struct cvmx_sli_last_win_rdata0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_sli_last_win_rdata0_s cn61xx;
 	struct cvmx_sli_last_win_rdata0_s cn63xx;
@@ -904,12 +1605,17 @@ union cvmx_sli_last_win_rdata0 {
 	struct cvmx_sli_last_win_rdata0_s cn66xx;
 	struct cvmx_sli_last_win_rdata0_s cn68xx;
 	struct cvmx_sli_last_win_rdata0_s cn68xxp1;
+	struct cvmx_sli_last_win_rdata0_s cnf71xx;
 };
 
 union cvmx_sli_last_win_rdata1 {
 	uint64_t u64;
 	struct cvmx_sli_last_win_rdata1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_sli_last_win_rdata1_s cn61xx;
 	struct cvmx_sli_last_win_rdata1_s cn63xx;
@@ -917,29 +1623,41 @@ union cvmx_sli_last_win_rdata1 {
 	struct cvmx_sli_last_win_rdata1_s cn66xx;
 	struct cvmx_sli_last_win_rdata1_s cn68xx;
 	struct cvmx_sli_last_win_rdata1_s cn68xxp1;
+	struct cvmx_sli_last_win_rdata1_s cnf71xx;
 };
 
 union cvmx_sli_last_win_rdata2 {
 	uint64_t u64;
 	struct cvmx_sli_last_win_rdata2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_sli_last_win_rdata2_s cn61xx;
 	struct cvmx_sli_last_win_rdata2_s cn66xx;
+	struct cvmx_sli_last_win_rdata2_s cnf71xx;
 };
 
 union cvmx_sli_last_win_rdata3 {
 	uint64_t u64;
 	struct cvmx_sli_last_win_rdata3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_sli_last_win_rdata3_s cn61xx;
 	struct cvmx_sli_last_win_rdata3_s cn66xx;
+	struct cvmx_sli_last_win_rdata3_s cnf71xx;
 };
 
 union cvmx_sli_mac_credit_cnt {
 	uint64_t u64;
 	struct cvmx_sli_mac_credit_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_54_63:10;
 		uint64_t p1_c_d:1;
 		uint64_t p1_n_d:1;
@@ -953,10 +1671,26 @@ union cvmx_sli_mac_credit_cnt {
 		uint64_t p0_ccnt:8;
 		uint64_t p0_ncnt:8;
 		uint64_t p0_pcnt:8;
+#else
+		uint64_t p0_pcnt:8;
+		uint64_t p0_ncnt:8;
+		uint64_t p0_ccnt:8;
+		uint64_t p1_pcnt:8;
+		uint64_t p1_ncnt:8;
+		uint64_t p1_ccnt:8;
+		uint64_t p0_p_d:1;
+		uint64_t p0_n_d:1;
+		uint64_t p0_c_d:1;
+		uint64_t p1_p_d:1;
+		uint64_t p1_n_d:1;
+		uint64_t p1_c_d:1;
+		uint64_t reserved_54_63:10;
+#endif
 	} s;
 	struct cvmx_sli_mac_credit_cnt_s cn61xx;
 	struct cvmx_sli_mac_credit_cnt_s cn63xx;
 	struct cvmx_sli_mac_credit_cnt_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t p1_ccnt:8;
 		uint64_t p1_ncnt:8;
@@ -964,15 +1698,26 @@ union cvmx_sli_mac_credit_cnt {
 		uint64_t p0_ccnt:8;
 		uint64_t p0_ncnt:8;
 		uint64_t p0_pcnt:8;
+#else
+		uint64_t p0_pcnt:8;
+		uint64_t p0_ncnt:8;
+		uint64_t p0_ccnt:8;
+		uint64_t p1_pcnt:8;
+		uint64_t p1_ncnt:8;
+		uint64_t p1_ccnt:8;
+		uint64_t reserved_48_63:16;
+#endif
 	} cn63xxp1;
 	struct cvmx_sli_mac_credit_cnt_s cn66xx;
 	struct cvmx_sli_mac_credit_cnt_s cn68xx;
 	struct cvmx_sli_mac_credit_cnt_s cn68xxp1;
+	struct cvmx_sli_mac_credit_cnt_s cnf71xx;
 };
 
 union cvmx_sli_mac_credit_cnt2 {
 	uint64_t u64;
 	struct cvmx_sli_mac_credit_cnt2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_54_63:10;
 		uint64_t p3_c_d:1;
 		uint64_t p3_n_d:1;
@@ -986,34 +1731,68 @@ union cvmx_sli_mac_credit_cnt2 {
 		uint64_t p2_ccnt:8;
 		uint64_t p2_ncnt:8;
 		uint64_t p2_pcnt:8;
+#else
+		uint64_t p2_pcnt:8;
+		uint64_t p2_ncnt:8;
+		uint64_t p2_ccnt:8;
+		uint64_t p3_pcnt:8;
+		uint64_t p3_ncnt:8;
+		uint64_t p3_ccnt:8;
+		uint64_t p2_p_d:1;
+		uint64_t p2_n_d:1;
+		uint64_t p2_c_d:1;
+		uint64_t p3_p_d:1;
+		uint64_t p3_n_d:1;
+		uint64_t p3_c_d:1;
+		uint64_t reserved_54_63:10;
+#endif
 	} s;
 	struct cvmx_sli_mac_credit_cnt2_s cn61xx;
 	struct cvmx_sli_mac_credit_cnt2_s cn66xx;
+	struct cvmx_sli_mac_credit_cnt2_s cnf71xx;
 };
 
 union cvmx_sli_mac_number {
 	uint64_t u64;
 	struct cvmx_sli_mac_number_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t a_mode:1;
 		uint64_t num:8;
+#else
+		uint64_t num:8;
+		uint64_t a_mode:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_sli_mac_number_s cn61xx;
 	struct cvmx_sli_mac_number_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t num:8;
+#else
+		uint64_t num:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} cn63xx;
 	struct cvmx_sli_mac_number_s cn66xx;
 	struct cvmx_sli_mac_number_cn63xx cn68xx;
 	struct cvmx_sli_mac_number_cn63xx cn68xxp1;
+	struct cvmx_sli_mac_number_s cnf71xx;
 };
 
 union cvmx_sli_mem_access_ctl {
 	uint64_t u64;
 	struct cvmx_sli_mem_access_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t max_word:4;
 		uint64_t timer:10;
+#else
+		uint64_t timer:10;
+		uint64_t max_word:4;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_sli_mem_access_ctl_s cn61xx;
 	struct cvmx_sli_mem_access_ctl_s cn63xx;
@@ -1021,11 +1800,13 @@ union cvmx_sli_mem_access_ctl {
 	struct cvmx_sli_mem_access_ctl_s cn66xx;
 	struct cvmx_sli_mem_access_ctl_s cn68xx;
 	struct cvmx_sli_mem_access_ctl_s cn68xxp1;
+	struct cvmx_sli_mem_access_ctl_s cnf71xx;
 };
 
 union cvmx_sli_mem_access_subidx {
 	uint64_t u64;
 	struct cvmx_sli_mem_access_subidx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_43_63:21;
 		uint64_t zero:1;
 		uint64_t port:3;
@@ -1035,8 +1816,20 @@ union cvmx_sli_mem_access_subidx {
 		uint64_t wtype:2;
 		uint64_t rtype:2;
 		uint64_t reserved_0_29:30;
+#else
+		uint64_t reserved_0_29:30;
+		uint64_t rtype:2;
+		uint64_t wtype:2;
+		uint64_t esw:2;
+		uint64_t esr:2;
+		uint64_t nmerge:1;
+		uint64_t port:3;
+		uint64_t zero:1;
+		uint64_t reserved_43_63:21;
+#endif
 	} s;
 	struct cvmx_sli_mem_access_subidx_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_43_63:21;
 		uint64_t zero:1;
 		uint64_t port:3;
@@ -1046,11 +1839,23 @@ union cvmx_sli_mem_access_subidx {
 		uint64_t wtype:2;
 		uint64_t rtype:2;
 		uint64_t ba:30;
+#else
+		uint64_t ba:30;
+		uint64_t rtype:2;
+		uint64_t wtype:2;
+		uint64_t esw:2;
+		uint64_t esr:2;
+		uint64_t nmerge:1;
+		uint64_t port:3;
+		uint64_t zero:1;
+		uint64_t reserved_43_63:21;
+#endif
 	} cn61xx;
 	struct cvmx_sli_mem_access_subidx_cn61xx cn63xx;
 	struct cvmx_sli_mem_access_subidx_cn61xx cn63xxp1;
 	struct cvmx_sli_mem_access_subidx_cn61xx cn66xx;
 	struct cvmx_sli_mem_access_subidx_cn68xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_43_63:21;
 		uint64_t zero:1;
 		uint64_t port:3;
@@ -1061,14 +1866,31 @@ union cvmx_sli_mem_access_subidx {
 		uint64_t rtype:2;
 		uint64_t ba:28;
 		uint64_t reserved_0_1:2;
+#else
+		uint64_t reserved_0_1:2;
+		uint64_t ba:28;
+		uint64_t rtype:2;
+		uint64_t wtype:2;
+		uint64_t esw:2;
+		uint64_t esr:2;
+		uint64_t nmerge:1;
+		uint64_t port:3;
+		uint64_t zero:1;
+		uint64_t reserved_43_63:21;
+#endif
 	} cn68xx;
 	struct cvmx_sli_mem_access_subidx_cn68xx cn68xxp1;
+	struct cvmx_sli_mem_access_subidx_cn61xx cnf71xx;
 };
 
 union cvmx_sli_msi_enb0 {
 	uint64_t u64;
 	struct cvmx_sli_msi_enb0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t enb:64;
+#else
 		uint64_t enb:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_enb0_s cn61xx;
 	struct cvmx_sli_msi_enb0_s cn63xx;
@@ -1076,12 +1898,17 @@ union cvmx_sli_msi_enb0 {
 	struct cvmx_sli_msi_enb0_s cn66xx;
 	struct cvmx_sli_msi_enb0_s cn68xx;
 	struct cvmx_sli_msi_enb0_s cn68xxp1;
+	struct cvmx_sli_msi_enb0_s cnf71xx;
 };
 
 union cvmx_sli_msi_enb1 {
 	uint64_t u64;
 	struct cvmx_sli_msi_enb1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t enb:64;
+#else
 		uint64_t enb:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_enb1_s cn61xx;
 	struct cvmx_sli_msi_enb1_s cn63xx;
@@ -1089,12 +1916,17 @@ union cvmx_sli_msi_enb1 {
 	struct cvmx_sli_msi_enb1_s cn66xx;
 	struct cvmx_sli_msi_enb1_s cn68xx;
 	struct cvmx_sli_msi_enb1_s cn68xxp1;
+	struct cvmx_sli_msi_enb1_s cnf71xx;
 };
 
 union cvmx_sli_msi_enb2 {
 	uint64_t u64;
 	struct cvmx_sli_msi_enb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t enb:64;
+#else
 		uint64_t enb:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_enb2_s cn61xx;
 	struct cvmx_sli_msi_enb2_s cn63xx;
@@ -1102,12 +1934,17 @@ union cvmx_sli_msi_enb2 {
 	struct cvmx_sli_msi_enb2_s cn66xx;
 	struct cvmx_sli_msi_enb2_s cn68xx;
 	struct cvmx_sli_msi_enb2_s cn68xxp1;
+	struct cvmx_sli_msi_enb2_s cnf71xx;
 };
 
 union cvmx_sli_msi_enb3 {
 	uint64_t u64;
 	struct cvmx_sli_msi_enb3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t enb:64;
+#else
 		uint64_t enb:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_enb3_s cn61xx;
 	struct cvmx_sli_msi_enb3_s cn63xx;
@@ -1115,12 +1952,17 @@ union cvmx_sli_msi_enb3 {
 	struct cvmx_sli_msi_enb3_s cn66xx;
 	struct cvmx_sli_msi_enb3_s cn68xx;
 	struct cvmx_sli_msi_enb3_s cn68xxp1;
+	struct cvmx_sli_msi_enb3_s cnf71xx;
 };
 
 union cvmx_sli_msi_rcv0 {
 	uint64_t u64;
 	struct cvmx_sli_msi_rcv0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t intr:64;
+#else
 		uint64_t intr:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_rcv0_s cn61xx;
 	struct cvmx_sli_msi_rcv0_s cn63xx;
@@ -1128,12 +1970,17 @@ union cvmx_sli_msi_rcv0 {
 	struct cvmx_sli_msi_rcv0_s cn66xx;
 	struct cvmx_sli_msi_rcv0_s cn68xx;
 	struct cvmx_sli_msi_rcv0_s cn68xxp1;
+	struct cvmx_sli_msi_rcv0_s cnf71xx;
 };
 
 union cvmx_sli_msi_rcv1 {
 	uint64_t u64;
 	struct cvmx_sli_msi_rcv1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t intr:64;
+#else
 		uint64_t intr:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_rcv1_s cn61xx;
 	struct cvmx_sli_msi_rcv1_s cn63xx;
@@ -1141,12 +1988,17 @@ union cvmx_sli_msi_rcv1 {
 	struct cvmx_sli_msi_rcv1_s cn66xx;
 	struct cvmx_sli_msi_rcv1_s cn68xx;
 	struct cvmx_sli_msi_rcv1_s cn68xxp1;
+	struct cvmx_sli_msi_rcv1_s cnf71xx;
 };
 
 union cvmx_sli_msi_rcv2 {
 	uint64_t u64;
 	struct cvmx_sli_msi_rcv2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t intr:64;
+#else
 		uint64_t intr:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_rcv2_s cn61xx;
 	struct cvmx_sli_msi_rcv2_s cn63xx;
@@ -1154,12 +2006,17 @@ union cvmx_sli_msi_rcv2 {
 	struct cvmx_sli_msi_rcv2_s cn66xx;
 	struct cvmx_sli_msi_rcv2_s cn68xx;
 	struct cvmx_sli_msi_rcv2_s cn68xxp1;
+	struct cvmx_sli_msi_rcv2_s cnf71xx;
 };
 
 union cvmx_sli_msi_rcv3 {
 	uint64_t u64;
 	struct cvmx_sli_msi_rcv3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t intr:64;
+#else
 		uint64_t intr:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_rcv3_s cn61xx;
 	struct cvmx_sli_msi_rcv3_s cn63xx;
@@ -1167,14 +2024,21 @@ union cvmx_sli_msi_rcv3 {
 	struct cvmx_sli_msi_rcv3_s cn66xx;
 	struct cvmx_sli_msi_rcv3_s cn68xx;
 	struct cvmx_sli_msi_rcv3_s cn68xxp1;
+	struct cvmx_sli_msi_rcv3_s cnf71xx;
 };
 
 union cvmx_sli_msi_rd_map {
 	uint64_t u64;
 	struct cvmx_sli_msi_rd_map_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t rd_int:8;
 		uint64_t msi_int:8;
+#else
+		uint64_t msi_int:8;
+		uint64_t rd_int:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_sli_msi_rd_map_s cn61xx;
 	struct cvmx_sli_msi_rd_map_s cn63xx;
@@ -1182,12 +2046,17 @@ union cvmx_sli_msi_rd_map {
 	struct cvmx_sli_msi_rd_map_s cn66xx;
 	struct cvmx_sli_msi_rd_map_s cn68xx;
 	struct cvmx_sli_msi_rd_map_s cn68xxp1;
+	struct cvmx_sli_msi_rd_map_s cnf71xx;
 };
 
 union cvmx_sli_msi_w1c_enb0 {
 	uint64_t u64;
 	struct cvmx_sli_msi_w1c_enb0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t clr:64;
+#else
 		uint64_t clr:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_w1c_enb0_s cn61xx;
 	struct cvmx_sli_msi_w1c_enb0_s cn63xx;
@@ -1195,12 +2064,17 @@ union cvmx_sli_msi_w1c_enb0 {
 	struct cvmx_sli_msi_w1c_enb0_s cn66xx;
 	struct cvmx_sli_msi_w1c_enb0_s cn68xx;
 	struct cvmx_sli_msi_w1c_enb0_s cn68xxp1;
+	struct cvmx_sli_msi_w1c_enb0_s cnf71xx;
 };
 
 union cvmx_sli_msi_w1c_enb1 {
 	uint64_t u64;
 	struct cvmx_sli_msi_w1c_enb1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t clr:64;
+#else
 		uint64_t clr:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_w1c_enb1_s cn61xx;
 	struct cvmx_sli_msi_w1c_enb1_s cn63xx;
@@ -1208,12 +2082,17 @@ union cvmx_sli_msi_w1c_enb1 {
 	struct cvmx_sli_msi_w1c_enb1_s cn66xx;
 	struct cvmx_sli_msi_w1c_enb1_s cn68xx;
 	struct cvmx_sli_msi_w1c_enb1_s cn68xxp1;
+	struct cvmx_sli_msi_w1c_enb1_s cnf71xx;
 };
 
 union cvmx_sli_msi_w1c_enb2 {
 	uint64_t u64;
 	struct cvmx_sli_msi_w1c_enb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t clr:64;
+#else
 		uint64_t clr:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_w1c_enb2_s cn61xx;
 	struct cvmx_sli_msi_w1c_enb2_s cn63xx;
@@ -1221,12 +2100,17 @@ union cvmx_sli_msi_w1c_enb2 {
 	struct cvmx_sli_msi_w1c_enb2_s cn66xx;
 	struct cvmx_sli_msi_w1c_enb2_s cn68xx;
 	struct cvmx_sli_msi_w1c_enb2_s cn68xxp1;
+	struct cvmx_sli_msi_w1c_enb2_s cnf71xx;
 };
 
 union cvmx_sli_msi_w1c_enb3 {
 	uint64_t u64;
 	struct cvmx_sli_msi_w1c_enb3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t clr:64;
+#else
 		uint64_t clr:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_w1c_enb3_s cn61xx;
 	struct cvmx_sli_msi_w1c_enb3_s cn63xx;
@@ -1234,12 +2118,17 @@ union cvmx_sli_msi_w1c_enb3 {
 	struct cvmx_sli_msi_w1c_enb3_s cn66xx;
 	struct cvmx_sli_msi_w1c_enb3_s cn68xx;
 	struct cvmx_sli_msi_w1c_enb3_s cn68xxp1;
+	struct cvmx_sli_msi_w1c_enb3_s cnf71xx;
 };
 
 union cvmx_sli_msi_w1s_enb0 {
 	uint64_t u64;
 	struct cvmx_sli_msi_w1s_enb0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t set:64;
+#else
 		uint64_t set:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_w1s_enb0_s cn61xx;
 	struct cvmx_sli_msi_w1s_enb0_s cn63xx;
@@ -1247,12 +2136,17 @@ union cvmx_sli_msi_w1s_enb0 {
 	struct cvmx_sli_msi_w1s_enb0_s cn66xx;
 	struct cvmx_sli_msi_w1s_enb0_s cn68xx;
 	struct cvmx_sli_msi_w1s_enb0_s cn68xxp1;
+	struct cvmx_sli_msi_w1s_enb0_s cnf71xx;
 };
 
 union cvmx_sli_msi_w1s_enb1 {
 	uint64_t u64;
 	struct cvmx_sli_msi_w1s_enb1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t set:64;
+#else
 		uint64_t set:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_w1s_enb1_s cn61xx;
 	struct cvmx_sli_msi_w1s_enb1_s cn63xx;
@@ -1260,12 +2154,17 @@ union cvmx_sli_msi_w1s_enb1 {
 	struct cvmx_sli_msi_w1s_enb1_s cn66xx;
 	struct cvmx_sli_msi_w1s_enb1_s cn68xx;
 	struct cvmx_sli_msi_w1s_enb1_s cn68xxp1;
+	struct cvmx_sli_msi_w1s_enb1_s cnf71xx;
 };
 
 union cvmx_sli_msi_w1s_enb2 {
 	uint64_t u64;
 	struct cvmx_sli_msi_w1s_enb2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t set:64;
+#else
 		uint64_t set:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_w1s_enb2_s cn61xx;
 	struct cvmx_sli_msi_w1s_enb2_s cn63xx;
@@ -1273,12 +2172,17 @@ union cvmx_sli_msi_w1s_enb2 {
 	struct cvmx_sli_msi_w1s_enb2_s cn66xx;
 	struct cvmx_sli_msi_w1s_enb2_s cn68xx;
 	struct cvmx_sli_msi_w1s_enb2_s cn68xxp1;
+	struct cvmx_sli_msi_w1s_enb2_s cnf71xx;
 };
 
 union cvmx_sli_msi_w1s_enb3 {
 	uint64_t u64;
 	struct cvmx_sli_msi_w1s_enb3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t set:64;
+#else
 		uint64_t set:64;
+#endif
 	} s;
 	struct cvmx_sli_msi_w1s_enb3_s cn61xx;
 	struct cvmx_sli_msi_w1s_enb3_s cn63xx;
@@ -1286,14 +2190,21 @@ union cvmx_sli_msi_w1s_enb3 {
 	struct cvmx_sli_msi_w1s_enb3_s cn66xx;
 	struct cvmx_sli_msi_w1s_enb3_s cn68xx;
 	struct cvmx_sli_msi_w1s_enb3_s cn68xxp1;
+	struct cvmx_sli_msi_w1s_enb3_s cnf71xx;
 };
 
 union cvmx_sli_msi_wr_map {
 	uint64_t u64;
 	struct cvmx_sli_msi_wr_map_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t ciu_int:8;
 		uint64_t msi_int:8;
+#else
+		uint64_t msi_int:8;
+		uint64_t ciu_int:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_sli_msi_wr_map_s cn61xx;
 	struct cvmx_sli_msi_wr_map_s cn63xx;
@@ -1301,13 +2212,19 @@ union cvmx_sli_msi_wr_map {
 	struct cvmx_sli_msi_wr_map_s cn66xx;
 	struct cvmx_sli_msi_wr_map_s cn68xx;
 	struct cvmx_sli_msi_wr_map_s cn68xxp1;
+	struct cvmx_sli_msi_wr_map_s cnf71xx;
 };
 
 union cvmx_sli_pcie_msi_rcv {
 	uint64_t u64;
 	struct cvmx_sli_pcie_msi_rcv_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t intr:8;
+#else
+		uint64_t intr:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_sli_pcie_msi_rcv_s cn61xx;
 	struct cvmx_sli_pcie_msi_rcv_s cn63xx;
@@ -1315,14 +2232,21 @@ union cvmx_sli_pcie_msi_rcv {
 	struct cvmx_sli_pcie_msi_rcv_s cn66xx;
 	struct cvmx_sli_pcie_msi_rcv_s cn68xx;
 	struct cvmx_sli_pcie_msi_rcv_s cn68xxp1;
+	struct cvmx_sli_pcie_msi_rcv_s cnf71xx;
 };
 
 union cvmx_sli_pcie_msi_rcv_b1 {
 	uint64_t u64;
 	struct cvmx_sli_pcie_msi_rcv_b1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t intr:8;
 		uint64_t reserved_0_7:8;
+#else
+		uint64_t reserved_0_7:8;
+		uint64_t intr:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_sli_pcie_msi_rcv_b1_s cn61xx;
 	struct cvmx_sli_pcie_msi_rcv_b1_s cn63xx;
@@ -1330,14 +2254,21 @@ union cvmx_sli_pcie_msi_rcv_b1 {
 	struct cvmx_sli_pcie_msi_rcv_b1_s cn66xx;
 	struct cvmx_sli_pcie_msi_rcv_b1_s cn68xx;
 	struct cvmx_sli_pcie_msi_rcv_b1_s cn68xxp1;
+	struct cvmx_sli_pcie_msi_rcv_b1_s cnf71xx;
 };
 
 union cvmx_sli_pcie_msi_rcv_b2 {
 	uint64_t u64;
 	struct cvmx_sli_pcie_msi_rcv_b2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t intr:8;
 		uint64_t reserved_0_15:16;
+#else
+		uint64_t reserved_0_15:16;
+		uint64_t intr:8;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_sli_pcie_msi_rcv_b2_s cn61xx;
 	struct cvmx_sli_pcie_msi_rcv_b2_s cn63xx;
@@ -1345,14 +2276,21 @@ union cvmx_sli_pcie_msi_rcv_b2 {
 	struct cvmx_sli_pcie_msi_rcv_b2_s cn66xx;
 	struct cvmx_sli_pcie_msi_rcv_b2_s cn68xx;
 	struct cvmx_sli_pcie_msi_rcv_b2_s cn68xxp1;
+	struct cvmx_sli_pcie_msi_rcv_b2_s cnf71xx;
 };
 
 union cvmx_sli_pcie_msi_rcv_b3 {
 	uint64_t u64;
 	struct cvmx_sli_pcie_msi_rcv_b3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t intr:8;
 		uint64_t reserved_0_23:24;
+#else
+		uint64_t reserved_0_23:24;
+		uint64_t intr:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pcie_msi_rcv_b3_s cn61xx;
 	struct cvmx_sli_pcie_msi_rcv_b3_s cn63xx;
@@ -1360,14 +2298,21 @@ union cvmx_sli_pcie_msi_rcv_b3 {
 	struct cvmx_sli_pcie_msi_rcv_b3_s cn66xx;
 	struct cvmx_sli_pcie_msi_rcv_b3_s cn68xx;
 	struct cvmx_sli_pcie_msi_rcv_b3_s cn68xxp1;
+	struct cvmx_sli_pcie_msi_rcv_b3_s cnf71xx;
 };
 
 union cvmx_sli_pktx_cnts {
 	uint64_t u64;
 	struct cvmx_sli_pktx_cnts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_54_63:10;
 		uint64_t timer:22;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t timer:22;
+		uint64_t reserved_54_63:10;
+#endif
 	} s;
 	struct cvmx_sli_pktx_cnts_s cn61xx;
 	struct cvmx_sli_pktx_cnts_s cn63xx;
@@ -1375,25 +2320,37 @@ union cvmx_sli_pktx_cnts {
 	struct cvmx_sli_pktx_cnts_s cn66xx;
 	struct cvmx_sli_pktx_cnts_s cn68xx;
 	struct cvmx_sli_pktx_cnts_s cn68xxp1;
+	struct cvmx_sli_pktx_cnts_s cnf71xx;
 };
 
 union cvmx_sli_pktx_in_bp {
 	uint64_t u64;
 	struct cvmx_sli_pktx_in_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t wmark:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t wmark:32;
+#endif
 	} s;
 	struct cvmx_sli_pktx_in_bp_s cn61xx;
 	struct cvmx_sli_pktx_in_bp_s cn63xx;
 	struct cvmx_sli_pktx_in_bp_s cn63xxp1;
 	struct cvmx_sli_pktx_in_bp_s cn66xx;
+	struct cvmx_sli_pktx_in_bp_s cnf71xx;
 };
 
 union cvmx_sli_pktx_instr_baddr {
 	uint64_t u64;
 	struct cvmx_sli_pktx_instr_baddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:61;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t addr:61;
+#endif
 	} s;
 	struct cvmx_sli_pktx_instr_baddr_s cn61xx;
 	struct cvmx_sli_pktx_instr_baddr_s cn63xx;
@@ -1401,13 +2358,19 @@ union cvmx_sli_pktx_instr_baddr {
 	struct cvmx_sli_pktx_instr_baddr_s cn66xx;
 	struct cvmx_sli_pktx_instr_baddr_s cn68xx;
 	struct cvmx_sli_pktx_instr_baddr_s cn68xxp1;
+	struct cvmx_sli_pktx_instr_baddr_s cnf71xx;
 };
 
 union cvmx_sli_pktx_instr_baoff_dbell {
 	uint64_t u64;
 	struct cvmx_sli_pktx_instr_baoff_dbell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t aoff:32;
 		uint64_t dbell:32;
+#else
+		uint64_t dbell:32;
+		uint64_t aoff:32;
+#endif
 	} s;
 	struct cvmx_sli_pktx_instr_baoff_dbell_s cn61xx;
 	struct cvmx_sli_pktx_instr_baoff_dbell_s cn63xx;
@@ -1415,16 +2378,25 @@ union cvmx_sli_pktx_instr_baoff_dbell {
 	struct cvmx_sli_pktx_instr_baoff_dbell_s cn66xx;
 	struct cvmx_sli_pktx_instr_baoff_dbell_s cn68xx;
 	struct cvmx_sli_pktx_instr_baoff_dbell_s cn68xxp1;
+	struct cvmx_sli_pktx_instr_baoff_dbell_s cnf71xx;
 };
 
 union cvmx_sli_pktx_instr_fifo_rsize {
 	uint64_t u64;
 	struct cvmx_sli_pktx_instr_fifo_rsize_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t max:9;
 		uint64_t rrp:9;
 		uint64_t wrp:9;
 		uint64_t fcnt:5;
 		uint64_t rsize:32;
+#else
+		uint64_t rsize:32;
+		uint64_t fcnt:5;
+		uint64_t wrp:9;
+		uint64_t rrp:9;
+		uint64_t max:9;
+#endif
 	} s;
 	struct cvmx_sli_pktx_instr_fifo_rsize_s cn61xx;
 	struct cvmx_sli_pktx_instr_fifo_rsize_s cn63xx;
@@ -1432,11 +2404,13 @@ union cvmx_sli_pktx_instr_fifo_rsize {
 	struct cvmx_sli_pktx_instr_fifo_rsize_s cn66xx;
 	struct cvmx_sli_pktx_instr_fifo_rsize_s cn68xx;
 	struct cvmx_sli_pktx_instr_fifo_rsize_s cn68xxp1;
+	struct cvmx_sli_pktx_instr_fifo_rsize_s cnf71xx;
 };
 
 union cvmx_sli_pktx_instr_header {
 	uint64_t u64;
 	struct cvmx_sli_pktx_instr_header_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t pbp:1;
 		uint64_t reserved_38_42:5;
@@ -1458,8 +2432,32 @@ union cvmx_sli_pktx_instr_header {
 		uint64_t ngrp:1;
 		uint64_t ntt:1;
 		uint64_t ntag:1;
+#else
+		uint64_t ntag:1;
+		uint64_t ntt:1;
+		uint64_t ngrp:1;
+		uint64_t nqos:1;
+		uint64_t ngrpext:2;
+		uint64_t skp_len:7;
+		uint64_t reserved_13_13:1;
+		uint64_t par_mode:2;
+		uint64_t reserved_16_20:5;
+		uint64_t use_ihdr:1;
+		uint64_t rntag:1;
+		uint64_t rntt:1;
+		uint64_t rngrp:1;
+		uint64_t rnqos:1;
+		uint64_t rngrpext:2;
+		uint64_t rskp_len:7;
+		uint64_t reserved_35_35:1;
+		uint64_t rparmode:2;
+		uint64_t reserved_38_42:5;
+		uint64_t pbp:1;
+		uint64_t reserved_44_63:20;
+#endif
 	} s;
 	struct cvmx_sli_pktx_instr_header_cn61xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t pbp:1;
 		uint64_t reserved_38_42:5;
@@ -1481,20 +2479,50 @@ union cvmx_sli_pktx_instr_header {
 		uint64_t ngrp:1;
 		uint64_t ntt:1;
 		uint64_t ntag:1;
+#else
+		uint64_t ntag:1;
+		uint64_t ntt:1;
+		uint64_t ngrp:1;
+		uint64_t nqos:1;
+		uint64_t reserved_4_5:2;
+		uint64_t skp_len:7;
+		uint64_t reserved_13_13:1;
+		uint64_t par_mode:2;
+		uint64_t reserved_16_20:5;
+		uint64_t use_ihdr:1;
+		uint64_t rntag:1;
+		uint64_t rntt:1;
+		uint64_t rngrp:1;
+		uint64_t rnqos:1;
+		uint64_t reserved_26_27:2;
+		uint64_t rskp_len:7;
+		uint64_t reserved_35_35:1;
+		uint64_t rparmode:2;
+		uint64_t reserved_38_42:5;
+		uint64_t pbp:1;
+		uint64_t reserved_44_63:20;
+#endif
 	} cn61xx;
 	struct cvmx_sli_pktx_instr_header_cn61xx cn63xx;
 	struct cvmx_sli_pktx_instr_header_cn61xx cn63xxp1;
 	struct cvmx_sli_pktx_instr_header_cn61xx cn66xx;
 	struct cvmx_sli_pktx_instr_header_s cn68xx;
 	struct cvmx_sli_pktx_instr_header_cn61xx cn68xxp1;
+	struct cvmx_sli_pktx_instr_header_cn61xx cnf71xx;
 };
 
 union cvmx_sli_pktx_out_size {
 	uint64_t u64;
 	struct cvmx_sli_pktx_out_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t isize:7;
 		uint64_t bsize:16;
+#else
+		uint64_t bsize:16;
+		uint64_t isize:7;
+		uint64_t reserved_23_63:41;
+#endif
 	} s;
 	struct cvmx_sli_pktx_out_size_s cn61xx;
 	struct cvmx_sli_pktx_out_size_s cn63xx;
@@ -1502,13 +2530,19 @@ union cvmx_sli_pktx_out_size {
 	struct cvmx_sli_pktx_out_size_s cn66xx;
 	struct cvmx_sli_pktx_out_size_s cn68xx;
 	struct cvmx_sli_pktx_out_size_s cn68xxp1;
+	struct cvmx_sli_pktx_out_size_s cnf71xx;
 };
 
 union cvmx_sli_pktx_slist_baddr {
 	uint64_t u64;
 	struct cvmx_sli_pktx_slist_baddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t addr:60;
 		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t addr:60;
+#endif
 	} s;
 	struct cvmx_sli_pktx_slist_baddr_s cn61xx;
 	struct cvmx_sli_pktx_slist_baddr_s cn63xx;
@@ -1516,13 +2550,19 @@ union cvmx_sli_pktx_slist_baddr {
 	struct cvmx_sli_pktx_slist_baddr_s cn66xx;
 	struct cvmx_sli_pktx_slist_baddr_s cn68xx;
 	struct cvmx_sli_pktx_slist_baddr_s cn68xxp1;
+	struct cvmx_sli_pktx_slist_baddr_s cnf71xx;
 };
 
 union cvmx_sli_pktx_slist_baoff_dbell {
 	uint64_t u64;
 	struct cvmx_sli_pktx_slist_baoff_dbell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t aoff:32;
 		uint64_t dbell:32;
+#else
+		uint64_t dbell:32;
+		uint64_t aoff:32;
+#endif
 	} s;
 	struct cvmx_sli_pktx_slist_baoff_dbell_s cn61xx;
 	struct cvmx_sli_pktx_slist_baoff_dbell_s cn63xx;
@@ -1530,13 +2570,19 @@ union cvmx_sli_pktx_slist_baoff_dbell {
 	struct cvmx_sli_pktx_slist_baoff_dbell_s cn66xx;
 	struct cvmx_sli_pktx_slist_baoff_dbell_s cn68xx;
 	struct cvmx_sli_pktx_slist_baoff_dbell_s cn68xxp1;
+	struct cvmx_sli_pktx_slist_baoff_dbell_s cnf71xx;
 };
 
 union cvmx_sli_pktx_slist_fifo_rsize {
 	uint64_t u64;
 	struct cvmx_sli_pktx_slist_fifo_rsize_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t rsize:32;
+#else
+		uint64_t rsize:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pktx_slist_fifo_rsize_s cn61xx;
 	struct cvmx_sli_pktx_slist_fifo_rsize_s cn63xx;
@@ -1544,13 +2590,19 @@ union cvmx_sli_pktx_slist_fifo_rsize {
 	struct cvmx_sli_pktx_slist_fifo_rsize_s cn66xx;
 	struct cvmx_sli_pktx_slist_fifo_rsize_s cn68xx;
 	struct cvmx_sli_pktx_slist_fifo_rsize_s cn68xxp1;
+	struct cvmx_sli_pktx_slist_fifo_rsize_s cnf71xx;
 };
 
 union cvmx_sli_pkt_cnt_int {
 	uint64_t u64;
 	struct cvmx_sli_pkt_cnt_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t port:32;
+#else
+		uint64_t port:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_cnt_int_s cn61xx;
 	struct cvmx_sli_pkt_cnt_int_s cn63xx;
@@ -1558,13 +2610,19 @@ union cvmx_sli_pkt_cnt_int {
 	struct cvmx_sli_pkt_cnt_int_s cn66xx;
 	struct cvmx_sli_pkt_cnt_int_s cn68xx;
 	struct cvmx_sli_pkt_cnt_int_s cn68xxp1;
+	struct cvmx_sli_pkt_cnt_int_s cnf71xx;
 };
 
 union cvmx_sli_pkt_cnt_int_enb {
 	uint64_t u64;
 	struct cvmx_sli_pkt_cnt_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t port:32;
+#else
+		uint64_t port:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_cnt_int_enb_s cn61xx;
 	struct cvmx_sli_pkt_cnt_int_enb_s cn63xx;
@@ -1572,14 +2630,21 @@ union cvmx_sli_pkt_cnt_int_enb {
 	struct cvmx_sli_pkt_cnt_int_enb_s cn66xx;
 	struct cvmx_sli_pkt_cnt_int_enb_s cn68xx;
 	struct cvmx_sli_pkt_cnt_int_enb_s cn68xxp1;
+	struct cvmx_sli_pkt_cnt_int_enb_s cnf71xx;
 };
 
 union cvmx_sli_pkt_ctl {
 	uint64_t u64;
 	struct cvmx_sli_pkt_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t ring_en:1;
 		uint64_t pkt_bp:4;
+#else
+		uint64_t pkt_bp:4;
+		uint64_t ring_en:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_sli_pkt_ctl_s cn61xx;
 	struct cvmx_sli_pkt_ctl_s cn63xx;
@@ -1587,12 +2652,17 @@ union cvmx_sli_pkt_ctl {
 	struct cvmx_sli_pkt_ctl_s cn66xx;
 	struct cvmx_sli_pkt_ctl_s cn68xx;
 	struct cvmx_sli_pkt_ctl_s cn68xxp1;
+	struct cvmx_sli_pkt_ctl_s cnf71xx;
 };
 
 union cvmx_sli_pkt_data_out_es {
 	uint64_t u64;
 	struct cvmx_sli_pkt_data_out_es_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t es:64;
+#else
 		uint64_t es:64;
+#endif
 	} s;
 	struct cvmx_sli_pkt_data_out_es_s cn61xx;
 	struct cvmx_sli_pkt_data_out_es_s cn63xx;
@@ -1600,13 +2670,19 @@ union cvmx_sli_pkt_data_out_es {
 	struct cvmx_sli_pkt_data_out_es_s cn66xx;
 	struct cvmx_sli_pkt_data_out_es_s cn68xx;
 	struct cvmx_sli_pkt_data_out_es_s cn68xxp1;
+	struct cvmx_sli_pkt_data_out_es_s cnf71xx;
 };
 
 union cvmx_sli_pkt_data_out_ns {
 	uint64_t u64;
 	struct cvmx_sli_pkt_data_out_ns_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t nsr:32;
+#else
+		uint64_t nsr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_data_out_ns_s cn61xx;
 	struct cvmx_sli_pkt_data_out_ns_s cn63xx;
@@ -1614,13 +2690,19 @@ union cvmx_sli_pkt_data_out_ns {
 	struct cvmx_sli_pkt_data_out_ns_s cn66xx;
 	struct cvmx_sli_pkt_data_out_ns_s cn68xx;
 	struct cvmx_sli_pkt_data_out_ns_s cn68xxp1;
+	struct cvmx_sli_pkt_data_out_ns_s cnf71xx;
 };
 
 union cvmx_sli_pkt_data_out_ror {
 	uint64_t u64;
 	struct cvmx_sli_pkt_data_out_ror_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t ror:32;
+#else
+		uint64_t ror:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_data_out_ror_s cn61xx;
 	struct cvmx_sli_pkt_data_out_ror_s cn63xx;
@@ -1628,13 +2710,19 @@ union cvmx_sli_pkt_data_out_ror {
 	struct cvmx_sli_pkt_data_out_ror_s cn66xx;
 	struct cvmx_sli_pkt_data_out_ror_s cn68xx;
 	struct cvmx_sli_pkt_data_out_ror_s cn68xxp1;
+	struct cvmx_sli_pkt_data_out_ror_s cnf71xx;
 };
 
 union cvmx_sli_pkt_dpaddr {
 	uint64_t u64;
 	struct cvmx_sli_pkt_dpaddr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t dptr:32;
+#else
+		uint64_t dptr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_dpaddr_s cn61xx;
 	struct cvmx_sli_pkt_dpaddr_s cn63xx;
@@ -1642,25 +2730,37 @@ union cvmx_sli_pkt_dpaddr {
 	struct cvmx_sli_pkt_dpaddr_s cn66xx;
 	struct cvmx_sli_pkt_dpaddr_s cn68xx;
 	struct cvmx_sli_pkt_dpaddr_s cn68xxp1;
+	struct cvmx_sli_pkt_dpaddr_s cnf71xx;
 };
 
 union cvmx_sli_pkt_in_bp {
 	uint64_t u64;
 	struct cvmx_sli_pkt_in_bp_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t bp:32;
+#else
+		uint64_t bp:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_in_bp_s cn61xx;
 	struct cvmx_sli_pkt_in_bp_s cn63xx;
 	struct cvmx_sli_pkt_in_bp_s cn63xxp1;
 	struct cvmx_sli_pkt_in_bp_s cn66xx;
+	struct cvmx_sli_pkt_in_bp_s cnf71xx;
 };
 
 union cvmx_sli_pkt_in_donex_cnts {
 	uint64_t u64;
 	struct cvmx_sli_pkt_in_donex_cnts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_in_donex_cnts_s cn61xx;
 	struct cvmx_sli_pkt_in_donex_cnts_s cn63xx;
@@ -1668,13 +2768,19 @@ union cvmx_sli_pkt_in_donex_cnts {
 	struct cvmx_sli_pkt_in_donex_cnts_s cn66xx;
 	struct cvmx_sli_pkt_in_donex_cnts_s cn68xx;
 	struct cvmx_sli_pkt_in_donex_cnts_s cn68xxp1;
+	struct cvmx_sli_pkt_in_donex_cnts_s cnf71xx;
 };
 
 union cvmx_sli_pkt_in_instr_counts {
 	uint64_t u64;
 	struct cvmx_sli_pkt_in_instr_counts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t wr_cnt:32;
 		uint64_t rd_cnt:32;
+#else
+		uint64_t rd_cnt:32;
+		uint64_t wr_cnt:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_in_instr_counts_s cn61xx;
 	struct cvmx_sli_pkt_in_instr_counts_s cn63xx;
@@ -1682,12 +2788,17 @@ union cvmx_sli_pkt_in_instr_counts {
 	struct cvmx_sli_pkt_in_instr_counts_s cn66xx;
 	struct cvmx_sli_pkt_in_instr_counts_s cn68xx;
 	struct cvmx_sli_pkt_in_instr_counts_s cn68xxp1;
+	struct cvmx_sli_pkt_in_instr_counts_s cnf71xx;
 };
 
 union cvmx_sli_pkt_in_pcie_port {
 	uint64_t u64;
 	struct cvmx_sli_pkt_in_pcie_port_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t pp:64;
+#else
 		uint64_t pp:64;
+#endif
 	} s;
 	struct cvmx_sli_pkt_in_pcie_port_s cn61xx;
 	struct cvmx_sli_pkt_in_pcie_port_s cn63xx;
@@ -1695,11 +2806,13 @@ union cvmx_sli_pkt_in_pcie_port {
 	struct cvmx_sli_pkt_in_pcie_port_s cn66xx;
 	struct cvmx_sli_pkt_in_pcie_port_s cn68xx;
 	struct cvmx_sli_pkt_in_pcie_port_s cn68xxp1;
+	struct cvmx_sli_pkt_in_pcie_port_s cnf71xx;
 };
 
 union cvmx_sli_pkt_input_control {
 	uint64_t u64;
 	struct cvmx_sli_pkt_input_control_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t prd_erst:1;
 		uint64_t prd_rds:7;
 		uint64_t gii_erst:1;
@@ -1717,9 +2830,29 @@ union cvmx_sli_pkt_input_control {
 		uint64_t nsr:1;
 		uint64_t esr:2;
 		uint64_t ror:1;
+#else
+		uint64_t ror:1;
+		uint64_t esr:2;
+		uint64_t nsr:1;
+		uint64_t use_csr:1;
+		uint64_t d_ror:1;
+		uint64_t d_esr:2;
+		uint64_t d_nsr:1;
+		uint64_t pbp_dhi:13;
+		uint64_t pkt_rr:1;
+		uint64_t pin_rst:1;
+		uint64_t reserved_24_39:16;
+		uint64_t prc_idle:1;
+		uint64_t reserved_41_47:7;
+		uint64_t gii_rds:7;
+		uint64_t gii_erst:1;
+		uint64_t prd_rds:7;
+		uint64_t prd_erst:1;
+#endif
 	} s;
 	struct cvmx_sli_pkt_input_control_s cn61xx;
 	struct cvmx_sli_pkt_input_control_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_23_63:41;
 		uint64_t pkt_rr:1;
 		uint64_t pbp_dhi:13;
@@ -1730,18 +2863,36 @@ union cvmx_sli_pkt_input_control {
 		uint64_t nsr:1;
 		uint64_t esr:2;
 		uint64_t ror:1;
+#else
+		uint64_t ror:1;
+		uint64_t esr:2;
+		uint64_t nsr:1;
+		uint64_t use_csr:1;
+		uint64_t d_ror:1;
+		uint64_t d_esr:2;
+		uint64_t d_nsr:1;
+		uint64_t pbp_dhi:13;
+		uint64_t pkt_rr:1;
+		uint64_t reserved_23_63:41;
+#endif
 	} cn63xx;
 	struct cvmx_sli_pkt_input_control_cn63xx cn63xxp1;
 	struct cvmx_sli_pkt_input_control_s cn66xx;
 	struct cvmx_sli_pkt_input_control_s cn68xx;
 	struct cvmx_sli_pkt_input_control_s cn68xxp1;
+	struct cvmx_sli_pkt_input_control_s cnf71xx;
 };
 
 union cvmx_sli_pkt_instr_enb {
 	uint64_t u64;
 	struct cvmx_sli_pkt_instr_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t enb:32;
+#else
+		uint64_t enb:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_instr_enb_s cn61xx;
 	struct cvmx_sli_pkt_instr_enb_s cn63xx;
@@ -1749,12 +2900,17 @@ union cvmx_sli_pkt_instr_enb {
 	struct cvmx_sli_pkt_instr_enb_s cn66xx;
 	struct cvmx_sli_pkt_instr_enb_s cn68xx;
 	struct cvmx_sli_pkt_instr_enb_s cn68xxp1;
+	struct cvmx_sli_pkt_instr_enb_s cnf71xx;
 };
 
 union cvmx_sli_pkt_instr_rd_size {
 	uint64_t u64;
 	struct cvmx_sli_pkt_instr_rd_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rdsize:64;
+#else
 		uint64_t rdsize:64;
+#endif
 	} s;
 	struct cvmx_sli_pkt_instr_rd_size_s cn61xx;
 	struct cvmx_sli_pkt_instr_rd_size_s cn63xx;
@@ -1762,13 +2918,19 @@ union cvmx_sli_pkt_instr_rd_size {
 	struct cvmx_sli_pkt_instr_rd_size_s cn66xx;
 	struct cvmx_sli_pkt_instr_rd_size_s cn68xx;
 	struct cvmx_sli_pkt_instr_rd_size_s cn68xxp1;
+	struct cvmx_sli_pkt_instr_rd_size_s cnf71xx;
 };
 
 union cvmx_sli_pkt_instr_size {
 	uint64_t u64;
 	struct cvmx_sli_pkt_instr_size_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t is_64b:32;
+#else
+		uint64_t is_64b:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_instr_size_s cn61xx;
 	struct cvmx_sli_pkt_instr_size_s cn63xx;
@@ -1776,14 +2938,21 @@ union cvmx_sli_pkt_instr_size {
 	struct cvmx_sli_pkt_instr_size_s cn66xx;
 	struct cvmx_sli_pkt_instr_size_s cn68xx;
 	struct cvmx_sli_pkt_instr_size_s cn68xxp1;
+	struct cvmx_sli_pkt_instr_size_s cnf71xx;
 };
 
 union cvmx_sli_pkt_int_levels {
 	uint64_t u64;
 	struct cvmx_sli_pkt_int_levels_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_54_63:10;
 		uint64_t time:22;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t time:22;
+		uint64_t reserved_54_63:10;
+#endif
 	} s;
 	struct cvmx_sli_pkt_int_levels_s cn61xx;
 	struct cvmx_sli_pkt_int_levels_s cn63xx;
@@ -1791,13 +2960,19 @@ union cvmx_sli_pkt_int_levels {
 	struct cvmx_sli_pkt_int_levels_s cn66xx;
 	struct cvmx_sli_pkt_int_levels_s cn68xx;
 	struct cvmx_sli_pkt_int_levels_s cn68xxp1;
+	struct cvmx_sli_pkt_int_levels_s cnf71xx;
 };
 
 union cvmx_sli_pkt_iptr {
 	uint64_t u64;
 	struct cvmx_sli_pkt_iptr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t iptr:32;
+#else
+		uint64_t iptr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_iptr_s cn61xx;
 	struct cvmx_sli_pkt_iptr_s cn63xx;
@@ -1805,13 +2980,19 @@ union cvmx_sli_pkt_iptr {
 	struct cvmx_sli_pkt_iptr_s cn66xx;
 	struct cvmx_sli_pkt_iptr_s cn68xx;
 	struct cvmx_sli_pkt_iptr_s cn68xxp1;
+	struct cvmx_sli_pkt_iptr_s cnf71xx;
 };
 
 union cvmx_sli_pkt_out_bmode {
 	uint64_t u64;
 	struct cvmx_sli_pkt_out_bmode_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t bmode:32;
+#else
+		uint64_t bmode:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_out_bmode_s cn61xx;
 	struct cvmx_sli_pkt_out_bmode_s cn63xx;
@@ -1819,13 +3000,19 @@ union cvmx_sli_pkt_out_bmode {
 	struct cvmx_sli_pkt_out_bmode_s cn66xx;
 	struct cvmx_sli_pkt_out_bmode_s cn68xx;
 	struct cvmx_sli_pkt_out_bmode_s cn68xxp1;
+	struct cvmx_sli_pkt_out_bmode_s cnf71xx;
 };
 
 union cvmx_sli_pkt_out_bp_en {
 	uint64_t u64;
 	struct cvmx_sli_pkt_out_bp_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t bp_en:32;
+#else
+		uint64_t bp_en:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_out_bp_en_s cn68xx;
 	struct cvmx_sli_pkt_out_bp_en_s cn68xxp1;
@@ -1834,8 +3021,13 @@ union cvmx_sli_pkt_out_bp_en {
 union cvmx_sli_pkt_out_enb {
 	uint64_t u64;
 	struct cvmx_sli_pkt_out_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t enb:32;
+#else
+		uint64_t enb:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_out_enb_s cn61xx;
 	struct cvmx_sli_pkt_out_enb_s cn63xx;
@@ -1843,13 +3035,19 @@ union cvmx_sli_pkt_out_enb {
 	struct cvmx_sli_pkt_out_enb_s cn66xx;
 	struct cvmx_sli_pkt_out_enb_s cn68xx;
 	struct cvmx_sli_pkt_out_enb_s cn68xxp1;
+	struct cvmx_sli_pkt_out_enb_s cnf71xx;
 };
 
 union cvmx_sli_pkt_output_wmark {
 	uint64_t u64;
 	struct cvmx_sli_pkt_output_wmark_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t wmark:32;
+#else
+		uint64_t wmark:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_output_wmark_s cn61xx;
 	struct cvmx_sli_pkt_output_wmark_s cn63xx;
@@ -1857,12 +3055,17 @@ union cvmx_sli_pkt_output_wmark {
 	struct cvmx_sli_pkt_output_wmark_s cn66xx;
 	struct cvmx_sli_pkt_output_wmark_s cn68xx;
 	struct cvmx_sli_pkt_output_wmark_s cn68xxp1;
+	struct cvmx_sli_pkt_output_wmark_s cnf71xx;
 };
 
 union cvmx_sli_pkt_pcie_port {
 	uint64_t u64;
 	struct cvmx_sli_pkt_pcie_port_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t pp:64;
+#else
 		uint64_t pp:64;
+#endif
 	} s;
 	struct cvmx_sli_pkt_pcie_port_s cn61xx;
 	struct cvmx_sli_pkt_pcie_port_s cn63xx;
@@ -1870,13 +3073,19 @@ union cvmx_sli_pkt_pcie_port {
 	struct cvmx_sli_pkt_pcie_port_s cn66xx;
 	struct cvmx_sli_pkt_pcie_port_s cn68xx;
 	struct cvmx_sli_pkt_pcie_port_s cn68xxp1;
+	struct cvmx_sli_pkt_pcie_port_s cnf71xx;
 };
 
 union cvmx_sli_pkt_port_in_rst {
 	uint64_t u64;
 	struct cvmx_sli_pkt_port_in_rst_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t in_rst:32;
 		uint64_t out_rst:32;
+#else
+		uint64_t out_rst:32;
+		uint64_t in_rst:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_port_in_rst_s cn61xx;
 	struct cvmx_sli_pkt_port_in_rst_s cn63xx;
@@ -1884,12 +3093,17 @@ union cvmx_sli_pkt_port_in_rst {
 	struct cvmx_sli_pkt_port_in_rst_s cn66xx;
 	struct cvmx_sli_pkt_port_in_rst_s cn68xx;
 	struct cvmx_sli_pkt_port_in_rst_s cn68xxp1;
+	struct cvmx_sli_pkt_port_in_rst_s cnf71xx;
 };
 
 union cvmx_sli_pkt_slist_es {
 	uint64_t u64;
 	struct cvmx_sli_pkt_slist_es_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t es:64;
+#else
+		uint64_t es:64;
+#endif
 	} s;
 	struct cvmx_sli_pkt_slist_es_s cn61xx;
 	struct cvmx_sli_pkt_slist_es_s cn63xx;
@@ -1897,13 +3111,19 @@ union cvmx_sli_pkt_slist_es {
 	struct cvmx_sli_pkt_slist_es_s cn66xx;
 	struct cvmx_sli_pkt_slist_es_s cn68xx;
 	struct cvmx_sli_pkt_slist_es_s cn68xxp1;
+	struct cvmx_sli_pkt_slist_es_s cnf71xx;
 };
 
 union cvmx_sli_pkt_slist_ns {
 	uint64_t u64;
 	struct cvmx_sli_pkt_slist_ns_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t nsr:32;
+#else
+		uint64_t nsr:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_slist_ns_s cn61xx;
 	struct cvmx_sli_pkt_slist_ns_s cn63xx;
@@ -1911,13 +3131,19 @@ union cvmx_sli_pkt_slist_ns {
 	struct cvmx_sli_pkt_slist_ns_s cn66xx;
 	struct cvmx_sli_pkt_slist_ns_s cn68xx;
 	struct cvmx_sli_pkt_slist_ns_s cn68xxp1;
+	struct cvmx_sli_pkt_slist_ns_s cnf71xx;
 };
 
 union cvmx_sli_pkt_slist_ror {
 	uint64_t u64;
 	struct cvmx_sli_pkt_slist_ror_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t ror:32;
+#else
+		uint64_t ror:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_slist_ror_s cn61xx;
 	struct cvmx_sli_pkt_slist_ror_s cn63xx;
@@ -1925,13 +3151,19 @@ union cvmx_sli_pkt_slist_ror {
 	struct cvmx_sli_pkt_slist_ror_s cn66xx;
 	struct cvmx_sli_pkt_slist_ror_s cn68xx;
 	struct cvmx_sli_pkt_slist_ror_s cn68xxp1;
+	struct cvmx_sli_pkt_slist_ror_s cnf71xx;
 };
 
 union cvmx_sli_pkt_time_int {
 	uint64_t u64;
 	struct cvmx_sli_pkt_time_int_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t port:32;
+#else
+		uint64_t port:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_time_int_s cn61xx;
 	struct cvmx_sli_pkt_time_int_s cn63xx;
@@ -1939,13 +3171,19 @@ union cvmx_sli_pkt_time_int {
 	struct cvmx_sli_pkt_time_int_s cn66xx;
 	struct cvmx_sli_pkt_time_int_s cn68xx;
 	struct cvmx_sli_pkt_time_int_s cn68xxp1;
+	struct cvmx_sli_pkt_time_int_s cnf71xx;
 };
 
 union cvmx_sli_pkt_time_int_enb {
 	uint64_t u64;
 	struct cvmx_sli_pkt_time_int_enb_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t port:32;
+#else
+		uint64_t port:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_pkt_time_int_enb_s cn61xx;
 	struct cvmx_sli_pkt_time_int_enb_s cn63xx;
@@ -1953,11 +3191,13 @@ union cvmx_sli_pkt_time_int_enb {
 	struct cvmx_sli_pkt_time_int_enb_s cn66xx;
 	struct cvmx_sli_pkt_time_int_enb_s cn68xx;
 	struct cvmx_sli_pkt_time_int_enb_s cn68xxp1;
+	struct cvmx_sli_pkt_time_int_enb_s cnf71xx;
 };
 
 union cvmx_sli_portx_pkind {
 	uint64_t u64;
 	struct cvmx_sli_portx_pkind_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t rpk_enb:1;
 		uint64_t reserved_22_23:2;
@@ -1966,23 +3206,47 @@ union cvmx_sli_portx_pkind {
 		uint64_t bpkind:6;
 		uint64_t reserved_6_7:2;
 		uint64_t pkind:6;
+#else
+		uint64_t pkind:6;
+		uint64_t reserved_6_7:2;
+		uint64_t bpkind:6;
+		uint64_t reserved_14_15:2;
+		uint64_t pkindr:6;
+		uint64_t reserved_22_23:2;
+		uint64_t rpk_enb:1;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_sli_portx_pkind_s cn68xx;
 	struct cvmx_sli_portx_pkind_cn68xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t bpkind:6;
 		uint64_t reserved_6_7:2;
 		uint64_t pkind:6;
+#else
+		uint64_t pkind:6;
+		uint64_t reserved_6_7:2;
+		uint64_t bpkind:6;
+		uint64_t reserved_14_63:50;
+#endif
 	} cn68xxp1;
 };
 
 union cvmx_sli_s2m_portx_ctl {
 	uint64_t u64;
 	struct cvmx_sli_s2m_portx_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t wind_d:1;
 		uint64_t bar0_d:1;
 		uint64_t mrrs:3;
+#else
+		uint64_t mrrs:3;
+		uint64_t bar0_d:1;
+		uint64_t wind_d:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_sli_s2m_portx_ctl_s cn61xx;
 	struct cvmx_sli_s2m_portx_ctl_s cn63xx;
@@ -1990,12 +3254,17 @@ union cvmx_sli_s2m_portx_ctl {
 	struct cvmx_sli_s2m_portx_ctl_s cn66xx;
 	struct cvmx_sli_s2m_portx_ctl_s cn68xx;
 	struct cvmx_sli_s2m_portx_ctl_s cn68xxp1;
+	struct cvmx_sli_s2m_portx_ctl_s cnf71xx;
 };
 
 union cvmx_sli_scratch_1 {
 	uint64_t u64;
 	struct cvmx_sli_scratch_1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_sli_scratch_1_s cn61xx;
 	struct cvmx_sli_scratch_1_s cn63xx;
@@ -2003,12 +3272,17 @@ union cvmx_sli_scratch_1 {
 	struct cvmx_sli_scratch_1_s cn66xx;
 	struct cvmx_sli_scratch_1_s cn68xx;
 	struct cvmx_sli_scratch_1_s cn68xxp1;
+	struct cvmx_sli_scratch_1_s cnf71xx;
 };
 
 union cvmx_sli_scratch_2 {
 	uint64_t u64;
 	struct cvmx_sli_scratch_2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t data:64;
+#else
 		uint64_t data:64;
+#endif
 	} s;
 	struct cvmx_sli_scratch_2_s cn61xx;
 	struct cvmx_sli_scratch_2_s cn63xx;
@@ -2016,15 +3290,23 @@ union cvmx_sli_scratch_2 {
 	struct cvmx_sli_scratch_2_s cn66xx;
 	struct cvmx_sli_scratch_2_s cn68xx;
 	struct cvmx_sli_scratch_2_s cn68xxp1;
+	struct cvmx_sli_scratch_2_s cnf71xx;
 };
 
 union cvmx_sli_state1 {
 	uint64_t u64;
 	struct cvmx_sli_state1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t cpl1:12;
 		uint64_t cpl0:12;
 		uint64_t arb:1;
 		uint64_t csr:39;
+#else
+		uint64_t csr:39;
+		uint64_t arb:1;
+		uint64_t cpl0:12;
+		uint64_t cpl1:12;
+#endif
 	} s;
 	struct cvmx_sli_state1_s cn61xx;
 	struct cvmx_sli_state1_s cn63xx;
@@ -2032,11 +3314,13 @@ union cvmx_sli_state1 {
 	struct cvmx_sli_state1_s cn66xx;
 	struct cvmx_sli_state1_s cn68xx;
 	struct cvmx_sli_state1_s cn68xxp1;
+	struct cvmx_sli_state1_s cnf71xx;
 };
 
 union cvmx_sli_state2 {
 	uint64_t u64;
 	struct cvmx_sli_state2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t nnp1:8;
 		uint64_t reserved_47_47:1;
@@ -2045,6 +3329,16 @@ union cvmx_sli_state2 {
 		uint64_t csm0:15;
 		uint64_t nnp0:8;
 		uint64_t nnd:8;
+#else
+		uint64_t nnd:8;
+		uint64_t nnp0:8;
+		uint64_t csm0:15;
+		uint64_t csm1:15;
+		uint64_t rac:1;
+		uint64_t reserved_47_47:1;
+		uint64_t nnp1:8;
+		uint64_t reserved_56_63:8;
+#endif
 	} s;
 	struct cvmx_sli_state2_s cn61xx;
 	struct cvmx_sli_state2_s cn63xx;
@@ -2052,16 +3346,25 @@ union cvmx_sli_state2 {
 	struct cvmx_sli_state2_s cn66xx;
 	struct cvmx_sli_state2_s cn68xx;
 	struct cvmx_sli_state2_s cn68xxp1;
+	struct cvmx_sli_state2_s cnf71xx;
 };
 
 union cvmx_sli_state3 {
 	uint64_t u64;
 	struct cvmx_sli_state3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t psm1:15;
 		uint64_t psm0:15;
 		uint64_t nsm1:13;
 		uint64_t nsm0:13;
+#else
+		uint64_t nsm0:13;
+		uint64_t nsm1:13;
+		uint64_t psm0:15;
+		uint64_t psm1:15;
+		uint64_t reserved_56_63:8;
+#endif
 	} s;
 	struct cvmx_sli_state3_s cn61xx;
 	struct cvmx_sli_state3_s cn63xx;
@@ -2069,15 +3372,23 @@ union cvmx_sli_state3 {
 	struct cvmx_sli_state3_s cn66xx;
 	struct cvmx_sli_state3_s cn68xx;
 	struct cvmx_sli_state3_s cn68xxp1;
+	struct cvmx_sli_state3_s cnf71xx;
 };
 
 union cvmx_sli_tx_pipe {
 	uint64_t u64;
 	struct cvmx_sli_tx_pipe_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t nump:8;
 		uint64_t reserved_7_15:9;
 		uint64_t base:7;
+#else
+		uint64_t base:7;
+		uint64_t reserved_7_15:9;
+		uint64_t nump:8;
+		uint64_t reserved_24_63:40;
+#endif
 	} s;
 	struct cvmx_sli_tx_pipe_s cn68xx;
 	struct cvmx_sli_tx_pipe_s cn68xxp1;
@@ -2086,10 +3397,17 @@ union cvmx_sli_tx_pipe {
 union cvmx_sli_win_rd_addr {
 	uint64_t u64;
 	struct cvmx_sli_win_rd_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_51_63:13;
 		uint64_t ld_cmd:2;
 		uint64_t iobit:1;
 		uint64_t rd_addr:48;
+#else
+		uint64_t rd_addr:48;
+		uint64_t iobit:1;
+		uint64_t ld_cmd:2;
+		uint64_t reserved_51_63:13;
+#endif
 	} s;
 	struct cvmx_sli_win_rd_addr_s cn61xx;
 	struct cvmx_sli_win_rd_addr_s cn63xx;
@@ -2097,12 +3415,17 @@ union cvmx_sli_win_rd_addr {
 	struct cvmx_sli_win_rd_addr_s cn66xx;
 	struct cvmx_sli_win_rd_addr_s cn68xx;
 	struct cvmx_sli_win_rd_addr_s cn68xxp1;
+	struct cvmx_sli_win_rd_addr_s cnf71xx;
 };
 
 union cvmx_sli_win_rd_data {
 	uint64_t u64;
 	struct cvmx_sli_win_rd_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t rd_data:64;
+#else
 		uint64_t rd_data:64;
+#endif
 	} s;
 	struct cvmx_sli_win_rd_data_s cn61xx;
 	struct cvmx_sli_win_rd_data_s cn63xx;
@@ -2110,15 +3433,23 @@ union cvmx_sli_win_rd_data {
 	struct cvmx_sli_win_rd_data_s cn66xx;
 	struct cvmx_sli_win_rd_data_s cn68xx;
 	struct cvmx_sli_win_rd_data_s cn68xxp1;
+	struct cvmx_sli_win_rd_data_s cnf71xx;
 };
 
 union cvmx_sli_win_wr_addr {
 	uint64_t u64;
 	struct cvmx_sli_win_wr_addr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_49_63:15;
 		uint64_t iobit:1;
 		uint64_t wr_addr:45;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t wr_addr:45;
+		uint64_t iobit:1;
+		uint64_t reserved_49_63:15;
+#endif
 	} s;
 	struct cvmx_sli_win_wr_addr_s cn61xx;
 	struct cvmx_sli_win_wr_addr_s cn63xx;
@@ -2126,12 +3457,17 @@ union cvmx_sli_win_wr_addr {
 	struct cvmx_sli_win_wr_addr_s cn66xx;
 	struct cvmx_sli_win_wr_addr_s cn68xx;
 	struct cvmx_sli_win_wr_addr_s cn68xxp1;
+	struct cvmx_sli_win_wr_addr_s cnf71xx;
 };
 
 union cvmx_sli_win_wr_data {
 	uint64_t u64;
 	struct cvmx_sli_win_wr_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t wr_data:64;
+#else
+		uint64_t wr_data:64;
+#endif
 	} s;
 	struct cvmx_sli_win_wr_data_s cn61xx;
 	struct cvmx_sli_win_wr_data_s cn63xx;
@@ -2139,13 +3475,19 @@ union cvmx_sli_win_wr_data {
 	struct cvmx_sli_win_wr_data_s cn66xx;
 	struct cvmx_sli_win_wr_data_s cn68xx;
 	struct cvmx_sli_win_wr_data_s cn68xxp1;
+	struct cvmx_sli_win_wr_data_s cnf71xx;
 };
 
 union cvmx_sli_win_wr_mask {
 	uint64_t u64;
 	struct cvmx_sli_win_wr_mask_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t wr_mask:8;
+#else
+		uint64_t wr_mask:8;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_sli_win_wr_mask_s cn61xx;
 	struct cvmx_sli_win_wr_mask_s cn63xx;
@@ -2153,13 +3495,19 @@ union cvmx_sli_win_wr_mask {
 	struct cvmx_sli_win_wr_mask_s cn66xx;
 	struct cvmx_sli_win_wr_mask_s cn68xx;
 	struct cvmx_sli_win_wr_mask_s cn68xxp1;
+	struct cvmx_sli_win_wr_mask_s cnf71xx;
 };
 
 union cvmx_sli_window_ctl {
 	uint64_t u64;
 	struct cvmx_sli_window_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t time:32;
+#else
+		uint64_t time:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sli_window_ctl_s cn61xx;
 	struct cvmx_sli_window_ctl_s cn63xx;
@@ -2167,6 +3515,7 @@ union cvmx_sli_window_ctl {
 	struct cvmx_sli_window_ctl_s cn66xx;
 	struct cvmx_sli_window_ctl_s cn68xx;
 	struct cvmx_sli_window_ctl_s cn68xxp1;
+	struct cvmx_sli_window_ctl_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-smix-defs.h b/arch/mips/include/asm/octeon/cvmx-smix-defs.h
index 4f3c0666e94..8a278e6ddba 100644
--- a/arch/mips/include/asm/octeon/cvmx-smix-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-smix-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,15 +28,120 @@
 #ifndef __CVMX_SMIX_DEFS_H__
 #define __CVMX_SMIX_DEFS_H__
 
-#define CVMX_SMIX_CLK(offset) (CVMX_ADD_IO_SEG(0x0001180000001818ull) + ((offset) & 1) * 256)
-#define CVMX_SMIX_CMD(offset) (CVMX_ADD_IO_SEG(0x0001180000001800ull) + ((offset) & 1) * 256)
-#define CVMX_SMIX_EN(offset) (CVMX_ADD_IO_SEG(0x0001180000001820ull) + ((offset) & 1) * 256)
-#define CVMX_SMIX_RD_DAT(offset) (CVMX_ADD_IO_SEG(0x0001180000001810ull) + ((offset) & 1) * 256)
-#define CVMX_SMIX_WR_DAT(offset) (CVMX_ADD_IO_SEG(0x0001180000001808ull) + ((offset) & 1) * 256)
+static inline uint64_t CVMX_SMIX_CLK(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001818ull) + (offset) * 256;
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001818ull) + (offset) * 256;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000003818ull) + (offset) * 128;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180000001818ull) + (offset) * 256;
+}
+
+static inline uint64_t CVMX_SMIX_CMD(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001800ull) + (offset) * 256;
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001800ull) + (offset) * 256;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000003800ull) + (offset) * 128;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180000001800ull) + (offset) * 256;
+}
+
+static inline uint64_t CVMX_SMIX_EN(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001820ull) + (offset) * 256;
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001820ull) + (offset) * 256;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000003820ull) + (offset) * 128;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180000001820ull) + (offset) * 256;
+}
+
+static inline uint64_t CVMX_SMIX_RD_DAT(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001810ull) + (offset) * 256;
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001810ull) + (offset) * 256;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000003810ull) + (offset) * 128;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180000001810ull) + (offset) * 256;
+}
+
+static inline uint64_t CVMX_SMIX_WR_DAT(unsigned long offset)
+{
+	switch (cvmx_get_octeon_family()) {
+	case OCTEON_CN30XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN50XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN38XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN31XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN58XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001808ull) + (offset) * 256;
+	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN56XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN52XX & OCTEON_FAMILY_MASK:
+	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000001808ull) + (offset) * 256;
+	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
+		return CVMX_ADD_IO_SEG(0x0001180000003808ull) + (offset) * 128;
+	}
+	return CVMX_ADD_IO_SEG(0x0001180000001808ull) + (offset) * 256;
+}
 
 union cvmx_smix_clk {
 	uint64_t u64;
 	struct cvmx_smix_clk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t mode:1;
 		uint64_t reserved_21_23:3;
@@ -47,8 +152,21 @@ union cvmx_smix_clk {
 		uint64_t preamble:1;
 		uint64_t sample:4;
 		uint64_t phase:8;
+#else
+		uint64_t phase:8;
+		uint64_t sample:4;
+		uint64_t preamble:1;
+		uint64_t clk_idle:1;
+		uint64_t reserved_14_14:1;
+		uint64_t sample_mode:1;
+		uint64_t sample_hi:5;
+		uint64_t reserved_21_23:3;
+		uint64_t mode:1;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
 	struct cvmx_smix_clk_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_21_63:43;
 		uint64_t sample_hi:5;
 		uint64_t sample_mode:1;
@@ -57,6 +175,16 @@ union cvmx_smix_clk {
 		uint64_t preamble:1;
 		uint64_t sample:4;
 		uint64_t phase:8;
+#else
+		uint64_t phase:8;
+		uint64_t sample:4;
+		uint64_t preamble:1;
+		uint64_t clk_idle:1;
+		uint64_t reserved_14_14:1;
+		uint64_t sample_mode:1;
+		uint64_t sample_hi:5;
+		uint64_t reserved_21_63:43;
+#endif
 	} cn30xx;
 	struct cvmx_smix_clk_cn30xx cn31xx;
 	struct cvmx_smix_clk_cn30xx cn38xx;
@@ -68,27 +196,50 @@ union cvmx_smix_clk {
 	struct cvmx_smix_clk_s cn56xxp1;
 	struct cvmx_smix_clk_cn30xx cn58xx;
 	struct cvmx_smix_clk_cn30xx cn58xxp1;
+	struct cvmx_smix_clk_s cn61xx;
 	struct cvmx_smix_clk_s cn63xx;
 	struct cvmx_smix_clk_s cn63xxp1;
+	struct cvmx_smix_clk_s cn66xx;
+	struct cvmx_smix_clk_s cn68xx;
+	struct cvmx_smix_clk_s cn68xxp1;
+	struct cvmx_smix_clk_s cnf71xx;
 };
 
 union cvmx_smix_cmd {
 	uint64_t u64;
 	struct cvmx_smix_cmd_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t phy_op:2;
 		uint64_t reserved_13_15:3;
 		uint64_t phy_adr:5;
 		uint64_t reserved_5_7:3;
 		uint64_t reg_adr:5;
+#else
+		uint64_t reg_adr:5;
+		uint64_t reserved_5_7:3;
+		uint64_t phy_adr:5;
+		uint64_t reserved_13_15:3;
+		uint64_t phy_op:2;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_smix_cmd_cn30xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t phy_op:1;
 		uint64_t reserved_13_15:3;
 		uint64_t phy_adr:5;
 		uint64_t reserved_5_7:3;
 		uint64_t reg_adr:5;
+#else
+		uint64_t reg_adr:5;
+		uint64_t reserved_5_7:3;
+		uint64_t phy_adr:5;
+		uint64_t reserved_13_15:3;
+		uint64_t phy_op:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} cn30xx;
 	struct cvmx_smix_cmd_cn30xx cn31xx;
 	struct cvmx_smix_cmd_cn30xx cn38xx;
@@ -100,15 +251,25 @@ union cvmx_smix_cmd {
 	struct cvmx_smix_cmd_s cn56xxp1;
 	struct cvmx_smix_cmd_cn30xx cn58xx;
 	struct cvmx_smix_cmd_cn30xx cn58xxp1;
+	struct cvmx_smix_cmd_s cn61xx;
 	struct cvmx_smix_cmd_s cn63xx;
 	struct cvmx_smix_cmd_s cn63xxp1;
+	struct cvmx_smix_cmd_s cn66xx;
+	struct cvmx_smix_cmd_s cn68xx;
+	struct cvmx_smix_cmd_s cn68xxp1;
+	struct cvmx_smix_cmd_s cnf71xx;
 };
 
 union cvmx_smix_en {
 	uint64_t u64;
 	struct cvmx_smix_en_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_smix_en_s cn30xx;
 	struct cvmx_smix_en_s cn31xx;
@@ -121,17 +282,29 @@ union cvmx_smix_en {
 	struct cvmx_smix_en_s cn56xxp1;
 	struct cvmx_smix_en_s cn58xx;
 	struct cvmx_smix_en_s cn58xxp1;
+	struct cvmx_smix_en_s cn61xx;
 	struct cvmx_smix_en_s cn63xx;
 	struct cvmx_smix_en_s cn63xxp1;
+	struct cvmx_smix_en_s cn66xx;
+	struct cvmx_smix_en_s cn68xx;
+	struct cvmx_smix_en_s cn68xxp1;
+	struct cvmx_smix_en_s cnf71xx;
 };
 
 union cvmx_smix_rd_dat {
 	uint64_t u64;
 	struct cvmx_smix_rd_dat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t pending:1;
 		uint64_t val:1;
 		uint64_t dat:16;
+#else
+		uint64_t dat:16;
+		uint64_t val:1;
+		uint64_t pending:1;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_smix_rd_dat_s cn30xx;
 	struct cvmx_smix_rd_dat_s cn31xx;
@@ -144,17 +317,29 @@ union cvmx_smix_rd_dat {
 	struct cvmx_smix_rd_dat_s cn56xxp1;
 	struct cvmx_smix_rd_dat_s cn58xx;
 	struct cvmx_smix_rd_dat_s cn58xxp1;
+	struct cvmx_smix_rd_dat_s cn61xx;
 	struct cvmx_smix_rd_dat_s cn63xx;
 	struct cvmx_smix_rd_dat_s cn63xxp1;
+	struct cvmx_smix_rd_dat_s cn66xx;
+	struct cvmx_smix_rd_dat_s cn68xx;
+	struct cvmx_smix_rd_dat_s cn68xxp1;
+	struct cvmx_smix_rd_dat_s cnf71xx;
 };
 
 union cvmx_smix_wr_dat {
 	uint64_t u64;
 	struct cvmx_smix_wr_dat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_18_63:46;
 		uint64_t pending:1;
 		uint64_t val:1;
 		uint64_t dat:16;
+#else
+		uint64_t dat:16;
+		uint64_t val:1;
+		uint64_t pending:1;
+		uint64_t reserved_18_63:46;
+#endif
 	} s;
 	struct cvmx_smix_wr_dat_s cn30xx;
 	struct cvmx_smix_wr_dat_s cn31xx;
@@ -167,8 +352,13 @@ union cvmx_smix_wr_dat {
 	struct cvmx_smix_wr_dat_s cn56xxp1;
 	struct cvmx_smix_wr_dat_s cn58xx;
 	struct cvmx_smix_wr_dat_s cn58xxp1;
+	struct cvmx_smix_wr_dat_s cn61xx;
 	struct cvmx_smix_wr_dat_s cn63xx;
 	struct cvmx_smix_wr_dat_s cn63xxp1;
+	struct cvmx_smix_wr_dat_s cn66xx;
+	struct cvmx_smix_wr_dat_s cn68xx;
+	struct cvmx_smix_wr_dat_s cn68xxp1;
+	struct cvmx_smix_wr_dat_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/cvmx-spxx-defs.h b/arch/mips/include/asm/octeon/cvmx-spxx-defs.h
index b16940e32c8..c7d601d9446 100644
--- a/arch/mips/include/asm/octeon/cvmx-spxx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-spxx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,44 +28,33 @@
 #ifndef __CVMX_SPXX_DEFS_H__
 #define __CVMX_SPXX_DEFS_H__
 
-#define CVMX_SPXX_BCKPRS_CNT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000340ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_BIST_STAT(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800900007F8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_CLK_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000348ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_CLK_STAT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000350ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_DBG_DESKEW_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000368ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_DBG_DESKEW_STATE(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000370ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_DRV_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000358ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_ERR_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000320ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_INT_DAT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000318ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_INT_MSK(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000308ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_INT_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000300ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_INT_SYNC(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000310ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_TPA_ACC(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000338ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_TPA_MAX(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000330ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_TPA_SEL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000328ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SPXX_TRN4_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000360ull + (((block_id) & 1) * 0x8000000ull))
+#define CVMX_SPXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000340ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_BIST_STAT(block_id) (CVMX_ADD_IO_SEG(0x00011800900007F8ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_CLK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000348ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_CLK_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000350ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_DBG_DESKEW_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000368ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_DBG_DESKEW_STATE(block_id) (CVMX_ADD_IO_SEG(0x0001180090000370ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_DRV_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000358ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_ERR_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000320ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_INT_DAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000318ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_INT_MSK(block_id) (CVMX_ADD_IO_SEG(0x0001180090000308ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x0001180090000300ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_INT_SYNC(block_id) (CVMX_ADD_IO_SEG(0x0001180090000310ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_TPA_ACC(block_id) (CVMX_ADD_IO_SEG(0x0001180090000338ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_TPA_MAX(block_id) (CVMX_ADD_IO_SEG(0x0001180090000330ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_TPA_SEL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000328ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SPXX_TRN4_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000360ull) + ((block_id) & 1) * 0x8000000ull)
 
 union cvmx_spxx_bckprs_cnt {
 	uint64_t u64;
 	struct cvmx_spxx_bckprs_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_spxx_bckprs_cnt_s cn38xx;
 	struct cvmx_spxx_bckprs_cnt_s cn38xxp2;
@@ -76,10 +65,17 @@ union cvmx_spxx_bckprs_cnt {
 union cvmx_spxx_bist_stat {
 	uint64_t u64;
 	struct cvmx_spxx_bist_stat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t stat2:1;
 		uint64_t stat1:1;
 		uint64_t stat0:1;
+#else
+		uint64_t stat0:1;
+		uint64_t stat1:1;
+		uint64_t stat2:1;
+		uint64_t reserved_3_63:61;
+#endif
 	} s;
 	struct cvmx_spxx_bist_stat_s cn38xx;
 	struct cvmx_spxx_bist_stat_s cn38xxp2;
@@ -90,6 +86,7 @@ union cvmx_spxx_bist_stat {
 union cvmx_spxx_clk_ctl {
 	uint64_t u64;
 	struct cvmx_spxx_clk_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t seetrn:1;
 		uint64_t reserved_12_15:4;
@@ -101,6 +98,19 @@ union cvmx_spxx_clk_ctl {
 		uint64_t drptrn:1;
 		uint64_t rcvtrn:1;
 		uint64_t srxdlck:1;
+#else
+		uint64_t srxdlck:1;
+		uint64_t rcvtrn:1;
+		uint64_t drptrn:1;
+		uint64_t sndtrn:1;
+		uint64_t statrcv:1;
+		uint64_t statdrv:1;
+		uint64_t runbist:1;
+		uint64_t clkdly:5;
+		uint64_t reserved_12_15:4;
+		uint64_t seetrn:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_spxx_clk_ctl_s cn38xx;
 	struct cvmx_spxx_clk_ctl_s cn38xxp2;
@@ -111,6 +121,7 @@ union cvmx_spxx_clk_ctl {
 union cvmx_spxx_clk_stat {
 	uint64_t u64;
 	struct cvmx_spxx_clk_stat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_11_63:53;
 		uint64_t stxcal:1;
 		uint64_t reserved_9_9:1;
@@ -120,6 +131,17 @@ union cvmx_spxx_clk_stat {
 		uint64_t d4clk1:1;
 		uint64_t d4clk0:1;
 		uint64_t reserved_0_3:4;
+#else
+		uint64_t reserved_0_3:4;
+		uint64_t d4clk0:1;
+		uint64_t d4clk1:1;
+		uint64_t s4clk0:1;
+		uint64_t s4clk1:1;
+		uint64_t srxtrn:1;
+		uint64_t reserved_9_9:1;
+		uint64_t stxcal:1;
+		uint64_t reserved_11_63:53;
+#endif
 	} s;
 	struct cvmx_spxx_clk_stat_s cn38xx;
 	struct cvmx_spxx_clk_stat_s cn38xxp2;
@@ -130,6 +152,7 @@ union cvmx_spxx_clk_stat {
 union cvmx_spxx_dbg_deskew_ctl {
 	uint64_t u64;
 	struct cvmx_spxx_dbg_deskew_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_30_63:34;
 		uint64_t fallnop:1;
 		uint64_t fall8:1;
@@ -146,6 +169,24 @@ union cvmx_spxx_dbg_deskew_ctl {
 		uint64_t offdly:6;
 		uint64_t dllfrc:1;
 		uint64_t dlldis:1;
+#else
+		uint64_t dlldis:1;
+		uint64_t dllfrc:1;
+		uint64_t offdly:6;
+		uint64_t bitsel:5;
+		uint64_t offset:5;
+		uint64_t mux:1;
+		uint64_t inc:1;
+		uint64_t dec:1;
+		uint64_t clrdly:1;
+		uint64_t reserved_22_23:2;
+		uint64_t sstep:1;
+		uint64_t sstep_go:1;
+		uint64_t reserved_26_27:2;
+		uint64_t fall8:1;
+		uint64_t fallnop:1;
+		uint64_t reserved_30_63:34;
+#endif
 	} s;
 	struct cvmx_spxx_dbg_deskew_ctl_s cn38xx;
 	struct cvmx_spxx_dbg_deskew_ctl_s cn38xxp2;
@@ -156,11 +197,19 @@ union cvmx_spxx_dbg_deskew_ctl {
 union cvmx_spxx_dbg_deskew_state {
 	uint64_t u64;
 	struct cvmx_spxx_dbg_deskew_state_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t testres:1;
 		uint64_t unxterm:1;
 		uint64_t muxsel:2;
 		uint64_t offset:5;
+#else
+		uint64_t offset:5;
+		uint64_t muxsel:2;
+		uint64_t unxterm:1;
+		uint64_t testres:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_spxx_dbg_deskew_state_s cn38xx;
 	struct cvmx_spxx_dbg_deskew_state_s cn38xxp2;
@@ -171,21 +220,40 @@ union cvmx_spxx_dbg_deskew_state {
 union cvmx_spxx_drv_ctl {
 	uint64_t u64;
 	struct cvmx_spxx_drv_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_0_63:64;
+#else
+		uint64_t reserved_0_63:64;
+#endif
 	} s;
 	struct cvmx_spxx_drv_ctl_cn38xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t stx4ncmp:4;
 		uint64_t stx4pcmp:4;
 		uint64_t srx4cmp:8;
+#else
+		uint64_t srx4cmp:8;
+		uint64_t stx4pcmp:4;
+		uint64_t stx4ncmp:4;
+		uint64_t reserved_16_63:48;
+#endif
 	} cn38xx;
 	struct cvmx_spxx_drv_ctl_cn38xx cn38xxp2;
 	struct cvmx_spxx_drv_ctl_cn58xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_24_63:40;
 		uint64_t stx4ncmp:4;
 		uint64_t stx4pcmp:4;
 		uint64_t reserved_10_15:6;
 		uint64_t srx4cmp:10;
+#else
+		uint64_t srx4cmp:10;
+		uint64_t reserved_10_15:6;
+		uint64_t stx4pcmp:4;
+		uint64_t stx4ncmp:4;
+		uint64_t reserved_24_63:40;
+#endif
 	} cn58xx;
 	struct cvmx_spxx_drv_ctl_cn58xx cn58xxp1;
 };
@@ -193,12 +261,21 @@ union cvmx_spxx_drv_ctl {
 union cvmx_spxx_err_ctl {
 	uint64_t u64;
 	struct cvmx_spxx_err_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t prtnxa:1;
 		uint64_t dipcls:1;
 		uint64_t dippay:1;
 		uint64_t reserved_4_5:2;
 		uint64_t errcnt:4;
+#else
+		uint64_t errcnt:4;
+		uint64_t reserved_4_5:2;
+		uint64_t dippay:1;
+		uint64_t dipcls:1;
+		uint64_t prtnxa:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_spxx_err_ctl_s cn38xx;
 	struct cvmx_spxx_err_ctl_s cn38xxp2;
@@ -209,12 +286,21 @@ union cvmx_spxx_err_ctl {
 union cvmx_spxx_int_dat {
 	uint64_t u64;
 	struct cvmx_spxx_int_dat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t mul:1;
 		uint64_t reserved_14_30:17;
 		uint64_t calbnk:2;
 		uint64_t rsvop:4;
 		uint64_t prt:8;
+#else
+		uint64_t prt:8;
+		uint64_t rsvop:4;
+		uint64_t calbnk:2;
+		uint64_t reserved_14_30:17;
+		uint64_t mul:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_spxx_int_dat_s cn38xx;
 	struct cvmx_spxx_int_dat_s cn38xxp2;
@@ -225,6 +311,7 @@ union cvmx_spxx_int_dat {
 union cvmx_spxx_int_msk {
 	uint64_t u64;
 	struct cvmx_spxx_int_msk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t calerr:1;
 		uint64_t syncerr:1;
@@ -237,6 +324,20 @@ union cvmx_spxx_int_msk {
 		uint64_t reserved_2_3:2;
 		uint64_t abnorm:1;
 		uint64_t prtnxa:1;
+#else
+		uint64_t prtnxa:1;
+		uint64_t abnorm:1;
+		uint64_t reserved_2_3:2;
+		uint64_t spiovr:1;
+		uint64_t clserr:1;
+		uint64_t drwnng:1;
+		uint64_t rsverr:1;
+		uint64_t tpaovr:1;
+		uint64_t diperr:1;
+		uint64_t syncerr:1;
+		uint64_t calerr:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_spxx_int_msk_s cn38xx;
 	struct cvmx_spxx_int_msk_s cn38xxp2;
@@ -247,6 +348,7 @@ union cvmx_spxx_int_msk {
 union cvmx_spxx_int_reg {
 	uint64_t u64;
 	struct cvmx_spxx_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t spf:1;
 		uint64_t reserved_12_30:19;
@@ -261,6 +363,22 @@ union cvmx_spxx_int_reg {
 		uint64_t reserved_2_3:2;
 		uint64_t abnorm:1;
 		uint64_t prtnxa:1;
+#else
+		uint64_t prtnxa:1;
+		uint64_t abnorm:1;
+		uint64_t reserved_2_3:2;
+		uint64_t spiovr:1;
+		uint64_t clserr:1;
+		uint64_t drwnng:1;
+		uint64_t rsverr:1;
+		uint64_t tpaovr:1;
+		uint64_t diperr:1;
+		uint64_t syncerr:1;
+		uint64_t calerr:1;
+		uint64_t reserved_12_30:19;
+		uint64_t spf:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_spxx_int_reg_s cn38xx;
 	struct cvmx_spxx_int_reg_s cn38xxp2;
@@ -271,6 +389,7 @@ union cvmx_spxx_int_reg {
 union cvmx_spxx_int_sync {
 	uint64_t u64;
 	struct cvmx_spxx_int_sync_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_12_63:52;
 		uint64_t calerr:1;
 		uint64_t syncerr:1;
@@ -283,6 +402,20 @@ union cvmx_spxx_int_sync {
 		uint64_t reserved_2_3:2;
 		uint64_t abnorm:1;
 		uint64_t prtnxa:1;
+#else
+		uint64_t prtnxa:1;
+		uint64_t abnorm:1;
+		uint64_t reserved_2_3:2;
+		uint64_t spiovr:1;
+		uint64_t clserr:1;
+		uint64_t drwnng:1;
+		uint64_t rsverr:1;
+		uint64_t tpaovr:1;
+		uint64_t diperr:1;
+		uint64_t syncerr:1;
+		uint64_t calerr:1;
+		uint64_t reserved_12_63:52;
+#endif
 	} s;
 	struct cvmx_spxx_int_sync_s cn38xx;
 	struct cvmx_spxx_int_sync_s cn38xxp2;
@@ -293,8 +426,13 @@ union cvmx_spxx_int_sync {
 union cvmx_spxx_tpa_acc {
 	uint64_t u64;
 	struct cvmx_spxx_tpa_acc_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_spxx_tpa_acc_s cn38xx;
 	struct cvmx_spxx_tpa_acc_s cn38xxp2;
@@ -305,8 +443,13 @@ union cvmx_spxx_tpa_acc {
 union cvmx_spxx_tpa_max {
 	uint64_t u64;
 	struct cvmx_spxx_tpa_max_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t max:32;
+#else
+		uint64_t max:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_spxx_tpa_max_s cn38xx;
 	struct cvmx_spxx_tpa_max_s cn38xxp2;
@@ -317,8 +460,13 @@ union cvmx_spxx_tpa_max {
 union cvmx_spxx_tpa_sel {
 	uint64_t u64;
 	struct cvmx_spxx_tpa_sel_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t prtsel:4;
+#else
+		uint64_t prtsel:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_spxx_tpa_sel_s cn38xx;
 	struct cvmx_spxx_tpa_sel_s cn38xxp2;
@@ -329,6 +477,7 @@ union cvmx_spxx_tpa_sel {
 union cvmx_spxx_trn4_ctl {
 	uint64_t u64;
 	struct cvmx_spxx_trn4_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_13_63:51;
 		uint64_t trntest:1;
 		uint64_t jitter:3;
@@ -337,6 +486,16 @@ union cvmx_spxx_trn4_ctl {
 		uint64_t maxdist:5;
 		uint64_t macro_en:1;
 		uint64_t mux_en:1;
+#else
+		uint64_t mux_en:1;
+		uint64_t macro_en:1;
+		uint64_t maxdist:5;
+		uint64_t set_boot:1;
+		uint64_t clr_boot:1;
+		uint64_t jitter:3;
+		uint64_t trntest:1;
+		uint64_t reserved_13_63:51;
+#endif
 	} s;
 	struct cvmx_spxx_trn4_ctl_s cn38xx;
 	struct cvmx_spxx_trn4_ctl_s cn38xxp2;
diff --git a/arch/mips/include/asm/octeon/cvmx-sriox-defs.h b/arch/mips/include/asm/octeon/cvmx-sriox-defs.h
index 7be7e9ed746..5140f2d2ad1 100644
--- a/arch/mips/include/asm/octeon/cvmx-sriox-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-sriox-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2011 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -79,6 +79,7 @@
 union cvmx_sriox_acc_ctrl {
 	uint64_t u64;
 	struct cvmx_sriox_acc_ctrl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_7_63:57;
 		uint64_t deny_adr2:1;
 		uint64_t deny_adr1:1;
@@ -87,12 +88,29 @@ union cvmx_sriox_acc_ctrl {
 		uint64_t deny_bar2:1;
 		uint64_t deny_bar1:1;
 		uint64_t deny_bar0:1;
+#else
+		uint64_t deny_bar0:1;
+		uint64_t deny_bar1:1;
+		uint64_t deny_bar2:1;
+		uint64_t reserved_3_3:1;
+		uint64_t deny_adr0:1;
+		uint64_t deny_adr1:1;
+		uint64_t deny_adr2:1;
+		uint64_t reserved_7_63:57;
+#endif
 	} s;
 	struct cvmx_sriox_acc_ctrl_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_3_63:61;
 		uint64_t deny_bar2:1;
 		uint64_t deny_bar1:1;
 		uint64_t deny_bar0:1;
+#else
+		uint64_t deny_bar0:1;
+		uint64_t deny_bar1:1;
+		uint64_t deny_bar2:1;
+		uint64_t reserved_3_63:61;
+#endif
 	} cn63xx;
 	struct cvmx_sriox_acc_ctrl_cn63xx cn63xxp1;
 	struct cvmx_sriox_acc_ctrl_s cn66xx;
@@ -101,9 +119,15 @@ union cvmx_sriox_acc_ctrl {
 union cvmx_sriox_asmbly_id {
 	uint64_t u64;
 	struct cvmx_sriox_asmbly_id_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t assy_id:16;
 		uint64_t assy_ven:16;
+#else
+		uint64_t assy_ven:16;
+		uint64_t assy_id:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_asmbly_id_s cn63xx;
 	struct cvmx_sriox_asmbly_id_s cn63xxp1;
@@ -113,9 +137,15 @@ union cvmx_sriox_asmbly_id {
 union cvmx_sriox_asmbly_info {
 	uint64_t u64;
 	struct cvmx_sriox_asmbly_info_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t assy_rev:16;
 		uint64_t reserved_0_15:16;
+#else
+		uint64_t reserved_0_15:16;
+		uint64_t assy_rev:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_asmbly_info_s cn63xx;
 	struct cvmx_sriox_asmbly_info_s cn63xxp1;
@@ -125,11 +155,19 @@ union cvmx_sriox_asmbly_info {
 union cvmx_sriox_bell_resp_ctrl {
 	uint64_t u64;
 	struct cvmx_sriox_bell_resp_ctrl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t rp1_sid:1;
 		uint64_t rp0_sid:2;
 		uint64_t rp1_pid:1;
 		uint64_t rp0_pid:2;
+#else
+		uint64_t rp0_pid:2;
+		uint64_t rp1_pid:1;
+		uint64_t rp0_sid:2;
+		uint64_t rp1_sid:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_sriox_bell_resp_ctrl_s cn63xx;
 	struct cvmx_sriox_bell_resp_ctrl_s cn63xxp1;
@@ -139,6 +177,7 @@ union cvmx_sriox_bell_resp_ctrl {
 union cvmx_sriox_bist_status {
 	uint64_t u64;
 	struct cvmx_sriox_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_45_63:19;
 		uint64_t lram:1;
 		uint64_t mram:2;
@@ -159,8 +198,31 @@ union cvmx_sriox_bist_status {
 		uint64_t rxbuf:2;
 		uint64_t imsg:5;
 		uint64_t omsg:7;
+#else
+		uint64_t omsg:7;
+		uint64_t imsg:5;
+		uint64_t rxbuf:2;
+		uint64_t txbuf:2;
+		uint64_t ospf:1;
+		uint64_t ispf:1;
+		uint64_t oarb:2;
+		uint64_t rxbuf2:2;
+		uint64_t oarb2:2;
+		uint64_t optrs:4;
+		uint64_t obulk:4;
+		uint64_t rtn:2;
+		uint64_t ofree:1;
+		uint64_t itag:1;
+		uint64_t otag:2;
+		uint64_t bell:2;
+		uint64_t cram:2;
+		uint64_t mram:2;
+		uint64_t lram:1;
+		uint64_t reserved_45_63:19;
+#endif
 	} s;
 	struct cvmx_sriox_bist_status_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t mram:2;
 		uint64_t cram:2;
@@ -180,8 +242,30 @@ union cvmx_sriox_bist_status {
 		uint64_t rxbuf:2;
 		uint64_t imsg:5;
 		uint64_t omsg:7;
+#else
+		uint64_t omsg:7;
+		uint64_t imsg:5;
+		uint64_t rxbuf:2;
+		uint64_t txbuf:2;
+		uint64_t ospf:1;
+		uint64_t ispf:1;
+		uint64_t oarb:2;
+		uint64_t rxbuf2:2;
+		uint64_t oarb2:2;
+		uint64_t optrs:4;
+		uint64_t obulk:4;
+		uint64_t rtn:2;
+		uint64_t ofree:1;
+		uint64_t itag:1;
+		uint64_t otag:2;
+		uint64_t bell:2;
+		uint64_t cram:2;
+		uint64_t mram:2;
+		uint64_t reserved_44_63:20;
+#endif
 	} cn63xx;
 	struct cvmx_sriox_bist_status_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_44_63:20;
 		uint64_t mram:2;
 		uint64_t cram:2;
@@ -200,6 +284,26 @@ union cvmx_sriox_bist_status {
 		uint64_t rxbuf:2;
 		uint64_t imsg:5;
 		uint64_t omsg:7;
+#else
+		uint64_t omsg:7;
+		uint64_t imsg:5;
+		uint64_t rxbuf:2;
+		uint64_t txbuf:2;
+		uint64_t ospf:1;
+		uint64_t ispf:1;
+		uint64_t oarb:2;
+		uint64_t reserved_20_23:4;
+		uint64_t optrs:4;
+		uint64_t obulk:4;
+		uint64_t rtn:2;
+		uint64_t ofree:1;
+		uint64_t itag:1;
+		uint64_t otag:2;
+		uint64_t bell:2;
+		uint64_t cram:2;
+		uint64_t mram:2;
+		uint64_t reserved_44_63:20;
+#endif
 	} cn63xxp1;
 	struct cvmx_sriox_bist_status_s cn66xx;
 };
@@ -207,6 +311,7 @@ union cvmx_sriox_bist_status {
 union cvmx_sriox_imsg_ctrl {
 	uint64_t u64;
 	struct cvmx_sriox_imsg_ctrl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t to_mode:1;
 		uint64_t reserved_30_30:1;
@@ -221,6 +326,22 @@ union cvmx_sriox_imsg_ctrl {
 		uint64_t lttr:4;
 		uint64_t prio:4;
 		uint64_t mbox:4;
+#else
+		uint64_t mbox:4;
+		uint64_t prio:4;
+		uint64_t lttr:4;
+		uint64_t prt_sel:3;
+		uint64_t reserved_15_15:1;
+		uint64_t rp0_pid:2;
+		uint64_t rp1_pid:1;
+		uint64_t rp0_sid:2;
+		uint64_t rp1_sid:1;
+		uint64_t reserved_22_23:2;
+		uint64_t rsp_thr:6;
+		uint64_t reserved_30_30:1;
+		uint64_t to_mode:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_imsg_ctrl_s cn63xx;
 	struct cvmx_sriox_imsg_ctrl_s cn63xxp1;
@@ -230,6 +351,7 @@ union cvmx_sriox_imsg_ctrl {
 union cvmx_sriox_imsg_inst_hdrx {
 	uint64_t u64;
 	struct cvmx_sriox_imsg_inst_hdrx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t r:1;
 		uint64_t reserved_58_62:5;
 		uint64_t pm:2;
@@ -244,6 +366,22 @@ union cvmx_sriox_imsg_inst_hdrx {
 		uint64_t rs:1;
 		uint64_t tt:2;
 		uint64_t tag:32;
+#else
+		uint64_t tag:32;
+		uint64_t tt:2;
+		uint64_t rs:1;
+		uint64_t reserved_35_41:7;
+		uint64_t ntag:1;
+		uint64_t ntt:1;
+		uint64_t ngrp:1;
+		uint64_t nqos:1;
+		uint64_t reserved_46_47:2;
+		uint64_t sl:7;
+		uint64_t reserved_55_55:1;
+		uint64_t pm:2;
+		uint64_t reserved_58_62:5;
+		uint64_t r:1;
+#endif
 	} s;
 	struct cvmx_sriox_imsg_inst_hdrx_s cn63xx;
 	struct cvmx_sriox_imsg_inst_hdrx_s cn63xxp1;
@@ -253,6 +391,7 @@ union cvmx_sriox_imsg_inst_hdrx {
 union cvmx_sriox_imsg_qos_grpx {
 	uint64_t u64;
 	struct cvmx_sriox_imsg_qos_grpx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_63_63:1;
 		uint64_t qos7:3;
 		uint64_t grp7:4;
@@ -277,6 +416,32 @@ union cvmx_sriox_imsg_qos_grpx {
 		uint64_t reserved_7_7:1;
 		uint64_t qos0:3;
 		uint64_t grp0:4;
+#else
+		uint64_t grp0:4;
+		uint64_t qos0:3;
+		uint64_t reserved_7_7:1;
+		uint64_t grp1:4;
+		uint64_t qos1:3;
+		uint64_t reserved_15_15:1;
+		uint64_t grp2:4;
+		uint64_t qos2:3;
+		uint64_t reserved_23_23:1;
+		uint64_t grp3:4;
+		uint64_t qos3:3;
+		uint64_t reserved_31_31:1;
+		uint64_t grp4:4;
+		uint64_t qos4:3;
+		uint64_t reserved_39_39:1;
+		uint64_t grp5:4;
+		uint64_t qos5:3;
+		uint64_t reserved_47_47:1;
+		uint64_t grp6:4;
+		uint64_t qos6:3;
+		uint64_t reserved_55_55:1;
+		uint64_t grp7:4;
+		uint64_t qos7:3;
+		uint64_t reserved_63_63:1;
+#endif
 	} s;
 	struct cvmx_sriox_imsg_qos_grpx_s cn63xx;
 	struct cvmx_sriox_imsg_qos_grpx_s cn63xxp1;
@@ -286,6 +451,7 @@ union cvmx_sriox_imsg_qos_grpx {
 union cvmx_sriox_imsg_statusx {
 	uint64_t u64;
 	struct cvmx_sriox_imsg_statusx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t val1:1;
 		uint64_t err1:1;
 		uint64_t toe1:1;
@@ -310,6 +476,32 @@ union cvmx_sriox_imsg_statusx {
 		uint64_t mbox0:2;
 		uint64_t lttr0:2;
 		uint64_t sid0:16;
+#else
+		uint64_t sid0:16;
+		uint64_t lttr0:2;
+		uint64_t mbox0:2;
+		uint64_t seg0:4;
+		uint64_t dis0:1;
+		uint64_t tt0:1;
+		uint64_t reserved_26_26:1;
+		uint64_t prt0:1;
+		uint64_t toc0:1;
+		uint64_t toe0:1;
+		uint64_t err0:1;
+		uint64_t val0:1;
+		uint64_t sid1:16;
+		uint64_t lttr1:2;
+		uint64_t mbox1:2;
+		uint64_t seg1:4;
+		uint64_t dis1:1;
+		uint64_t tt1:1;
+		uint64_t reserved_58_58:1;
+		uint64_t prt1:1;
+		uint64_t toc1:1;
+		uint64_t toe1:1;
+		uint64_t err1:1;
+		uint64_t val1:1;
+#endif
 	} s;
 	struct cvmx_sriox_imsg_statusx_s cn63xx;
 	struct cvmx_sriox_imsg_statusx_s cn63xxp1;
@@ -319,6 +511,7 @@ union cvmx_sriox_imsg_statusx {
 union cvmx_sriox_imsg_vport_thr {
 	uint64_t u64;
 	struct cvmx_sriox_imsg_vport_thr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_54_63:10;
 		uint64_t max_tot:6;
 		uint64_t reserved_46_47:2;
@@ -332,6 +525,21 @@ union cvmx_sriox_imsg_vport_thr {
 		uint64_t max_p1:6;
 		uint64_t reserved_6_7:2;
 		uint64_t max_p0:6;
+#else
+		uint64_t max_p0:6;
+		uint64_t reserved_6_7:2;
+		uint64_t max_p1:6;
+		uint64_t reserved_14_15:2;
+		uint64_t buf_thr:4;
+		uint64_t reserved_20_30:11;
+		uint64_t sp_vport:1;
+		uint64_t max_s0:6;
+		uint64_t reserved_38_39:2;
+		uint64_t max_s1:6;
+		uint64_t reserved_46_47:2;
+		uint64_t max_tot:6;
+		uint64_t reserved_54_63:10;
+#endif
 	} s;
 	struct cvmx_sriox_imsg_vport_thr_s cn63xx;
 	struct cvmx_sriox_imsg_vport_thr_s cn63xxp1;
@@ -341,11 +549,19 @@ union cvmx_sriox_imsg_vport_thr {
 union cvmx_sriox_imsg_vport_thr2 {
 	uint64_t u64;
 	struct cvmx_sriox_imsg_vport_thr2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_46_63:18;
 		uint64_t max_s3:6;
 		uint64_t reserved_38_39:2;
 		uint64_t max_s2:6;
 		uint64_t reserved_0_31:32;
+#else
+		uint64_t reserved_0_31:32;
+		uint64_t max_s2:6;
+		uint64_t reserved_38_39:2;
+		uint64_t max_s3:6;
+		uint64_t reserved_46_63:18;
+#endif
 	} s;
 	struct cvmx_sriox_imsg_vport_thr2_s cn66xx;
 };
@@ -353,8 +569,13 @@ union cvmx_sriox_imsg_vport_thr2 {
 union cvmx_sriox_int2_enable {
 	uint64_t u64;
 	struct cvmx_sriox_int2_enable_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t pko_rst:1;
+#else
+		uint64_t pko_rst:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_sriox_int2_enable_s cn63xx;
 	struct cvmx_sriox_int2_enable_s cn66xx;
@@ -363,10 +584,17 @@ union cvmx_sriox_int2_enable {
 union cvmx_sriox_int2_reg {
 	uint64_t u64;
 	struct cvmx_sriox_int2_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t int_sum:1;
 		uint64_t reserved_1_30:30;
 		uint64_t pko_rst:1;
+#else
+		uint64_t pko_rst:1;
+		uint64_t reserved_1_30:30;
+		uint64_t int_sum:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_int2_reg_s cn63xx;
 	struct cvmx_sriox_int2_reg_s cn66xx;
@@ -375,6 +603,7 @@ union cvmx_sriox_int2_reg {
 union cvmx_sriox_int_enable {
 	uint64_t u64;
 	struct cvmx_sriox_int_enable_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_27_63:37;
 		uint64_t zero_pkt:1;
 		uint64_t ttl_tout:1;
@@ -403,9 +632,40 @@ union cvmx_sriox_int_enable {
 		uint64_t rxbell:1;
 		uint64_t bell_err:1;
 		uint64_t txbell:1;
+#else
+		uint64_t txbell:1;
+		uint64_t bell_err:1;
+		uint64_t rxbell:1;
+		uint64_t maint_op:1;
+		uint64_t bar_err:1;
+		uint64_t deny_wr:1;
+		uint64_t sli_err:1;
+		uint64_t wr_done:1;
+		uint64_t mce_tx:1;
+		uint64_t mce_rx:1;
+		uint64_t soft_tx:1;
+		uint64_t soft_rx:1;
+		uint64_t log_erb:1;
+		uint64_t phy_erb:1;
+		uint64_t link_dwn:1;
+		uint64_t link_up:1;
+		uint64_t omsg0:1;
+		uint64_t omsg1:1;
+		uint64_t omsg_err:1;
+		uint64_t pko_err:1;
+		uint64_t rtry_err:1;
+		uint64_t f_error:1;
+		uint64_t mac_buf:1;
+		uint64_t degrade:1;
+		uint64_t fail:1;
+		uint64_t ttl_tout:1;
+		uint64_t zero_pkt:1;
+		uint64_t reserved_27_63:37;
+#endif
 	} s;
 	struct cvmx_sriox_int_enable_s cn63xx;
 	struct cvmx_sriox_int_enable_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_22_63:42;
 		uint64_t f_error:1;
 		uint64_t rtry_err:1;
@@ -429,6 +689,31 @@ union cvmx_sriox_int_enable {
 		uint64_t rxbell:1;
 		uint64_t bell_err:1;
 		uint64_t txbell:1;
+#else
+		uint64_t txbell:1;
+		uint64_t bell_err:1;
+		uint64_t rxbell:1;
+		uint64_t maint_op:1;
+		uint64_t bar_err:1;
+		uint64_t deny_wr:1;
+		uint64_t sli_err:1;
+		uint64_t wr_done:1;
+		uint64_t mce_tx:1;
+		uint64_t mce_rx:1;
+		uint64_t soft_tx:1;
+		uint64_t soft_rx:1;
+		uint64_t log_erb:1;
+		uint64_t phy_erb:1;
+		uint64_t link_dwn:1;
+		uint64_t link_up:1;
+		uint64_t omsg0:1;
+		uint64_t omsg1:1;
+		uint64_t omsg_err:1;
+		uint64_t pko_err:1;
+		uint64_t rtry_err:1;
+		uint64_t f_error:1;
+		uint64_t reserved_22_63:42;
+#endif
 	} cn63xxp1;
 	struct cvmx_sriox_int_enable_s cn66xx;
 };
@@ -436,6 +721,7 @@ union cvmx_sriox_int_enable {
 union cvmx_sriox_int_info0 {
 	uint64_t u64;
 	struct cvmx_sriox_int_info0_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t cmd:4;
 		uint64_t type:4;
 		uint64_t tag:8;
@@ -445,6 +731,17 @@ union cvmx_sriox_int_info0 {
 		uint64_t reserved_16_28:13;
 		uint64_t be0:8;
 		uint64_t be1:8;
+#else
+		uint64_t be1:8;
+		uint64_t be0:8;
+		uint64_t reserved_16_28:13;
+		uint64_t status:3;
+		uint64_t length:10;
+		uint64_t reserved_42_47:6;
+		uint64_t tag:8;
+		uint64_t type:4;
+		uint64_t cmd:4;
+#endif
 	} s;
 	struct cvmx_sriox_int_info0_s cn63xx;
 	struct cvmx_sriox_int_info0_s cn63xxp1;
@@ -454,7 +751,11 @@ union cvmx_sriox_int_info0 {
 union cvmx_sriox_int_info1 {
 	uint64_t u64;
 	struct cvmx_sriox_int_info1_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t info1:64;
+#else
+		uint64_t info1:64;
+#endif
 	} s;
 	struct cvmx_sriox_int_info1_s cn63xx;
 	struct cvmx_sriox_int_info1_s cn63xxp1;
@@ -464,6 +765,7 @@ union cvmx_sriox_int_info1 {
 union cvmx_sriox_int_info2 {
 	uint64_t u64;
 	struct cvmx_sriox_int_info2_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t prio:2;
 		uint64_t tt:1;
 		uint64_t sis:1;
@@ -475,6 +777,19 @@ union cvmx_sriox_int_info2 {
 		uint64_t rsrvd:30;
 		uint64_t lns:1;
 		uint64_t intr:1;
+#else
+		uint64_t intr:1;
+		uint64_t lns:1;
+		uint64_t rsrvd:30;
+		uint64_t letter:2;
+		uint64_t mbox:2;
+		uint64_t xmbox:4;
+		uint64_t did:16;
+		uint64_t ssize:4;
+		uint64_t sis:1;
+		uint64_t tt:1;
+		uint64_t prio:2;
+#endif
 	} s;
 	struct cvmx_sriox_int_info2_s cn63xx;
 	struct cvmx_sriox_int_info2_s cn63xxp1;
@@ -484,11 +799,19 @@ union cvmx_sriox_int_info2 {
 union cvmx_sriox_int_info3 {
 	uint64_t u64;
 	struct cvmx_sriox_int_info3_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t prio:2;
 		uint64_t tt:2;
 		uint64_t type:4;
 		uint64_t other:48;
 		uint64_t reserved_0_7:8;
+#else
+		uint64_t reserved_0_7:8;
+		uint64_t other:48;
+		uint64_t type:4;
+		uint64_t tt:2;
+		uint64_t prio:2;
+#endif
 	} s;
 	struct cvmx_sriox_int_info3_s cn63xx;
 	struct cvmx_sriox_int_info3_s cn63xxp1;
@@ -498,6 +821,7 @@ union cvmx_sriox_int_info3 {
 union cvmx_sriox_int_reg {
 	uint64_t u64;
 	struct cvmx_sriox_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t int2_sum:1;
 		uint64_t reserved_27_30:4;
@@ -528,9 +852,42 @@ union cvmx_sriox_int_reg {
 		uint64_t rxbell:1;
 		uint64_t bell_err:1;
 		uint64_t txbell:1;
+#else
+		uint64_t txbell:1;
+		uint64_t bell_err:1;
+		uint64_t rxbell:1;
+		uint64_t maint_op:1;
+		uint64_t bar_err:1;
+		uint64_t deny_wr:1;
+		uint64_t sli_err:1;
+		uint64_t wr_done:1;
+		uint64_t mce_tx:1;
+		uint64_t mce_rx:1;
+		uint64_t soft_tx:1;
+		uint64_t soft_rx:1;
+		uint64_t log_erb:1;
+		uint64_t phy_erb:1;
+		uint64_t link_dwn:1;
+		uint64_t link_up:1;
+		uint64_t omsg0:1;
+		uint64_t omsg1:1;
+		uint64_t omsg_err:1;
+		uint64_t pko_err:1;
+		uint64_t rtry_err:1;
+		uint64_t f_error:1;
+		uint64_t mac_buf:1;
+		uint64_t degrad:1;
+		uint64_t fail:1;
+		uint64_t ttl_tout:1;
+		uint64_t zero_pkt:1;
+		uint64_t reserved_27_30:4;
+		uint64_t int2_sum:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_int_reg_s cn63xx;
 	struct cvmx_sriox_int_reg_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_22_63:42;
 		uint64_t f_error:1;
 		uint64_t rtry_err:1;
@@ -554,6 +911,31 @@ union cvmx_sriox_int_reg {
 		uint64_t rxbell:1;
 		uint64_t bell_err:1;
 		uint64_t txbell:1;
+#else
+		uint64_t txbell:1;
+		uint64_t bell_err:1;
+		uint64_t rxbell:1;
+		uint64_t maint_op:1;
+		uint64_t bar_err:1;
+		uint64_t deny_wr:1;
+		uint64_t sli_err:1;
+		uint64_t wr_done:1;
+		uint64_t mce_tx:1;
+		uint64_t mce_rx:1;
+		uint64_t soft_tx:1;
+		uint64_t soft_rx:1;
+		uint64_t log_erb:1;
+		uint64_t phy_erb:1;
+		uint64_t link_dwn:1;
+		uint64_t link_up:1;
+		uint64_t omsg0:1;
+		uint64_t omsg1:1;
+		uint64_t omsg_err:1;
+		uint64_t pko_err:1;
+		uint64_t rtry_err:1;
+		uint64_t f_error:1;
+		uint64_t reserved_22_63:42;
+#endif
 	} cn63xxp1;
 	struct cvmx_sriox_int_reg_s cn66xx;
 };
@@ -561,6 +943,7 @@ union cvmx_sriox_int_reg {
 union cvmx_sriox_ip_feature {
 	uint64_t u64;
 	struct cvmx_sriox_ip_feature_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t ops:32;
 		uint64_t reserved_15_31:17;
 		uint64_t no_vmin:1;
@@ -571,8 +954,21 @@ union cvmx_sriox_ip_feature {
 		uint64_t pt_width:2;
 		uint64_t tx_pol:4;
 		uint64_t rx_pol:4;
+#else
+		uint64_t rx_pol:4;
+		uint64_t tx_pol:4;
+		uint64_t pt_width:2;
+		uint64_t tx_flow:1;
+		uint64_t reserved_11_11:1;
+		uint64_t a50:1;
+		uint64_t a66:1;
+		uint64_t no_vmin:1;
+		uint64_t reserved_15_31:17;
+		uint64_t ops:32;
+#endif
 	} s;
 	struct cvmx_sriox_ip_feature_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t ops:32;
 		uint64_t reserved_14_31:18;
 		uint64_t a66:1;
@@ -582,6 +978,17 @@ union cvmx_sriox_ip_feature {
 		uint64_t pt_width:2;
 		uint64_t tx_pol:4;
 		uint64_t rx_pol:4;
+#else
+		uint64_t rx_pol:4;
+		uint64_t tx_pol:4;
+		uint64_t pt_width:2;
+		uint64_t tx_flow:1;
+		uint64_t reserved_11_11:1;
+		uint64_t a50:1;
+		uint64_t a66:1;
+		uint64_t reserved_14_31:18;
+		uint64_t ops:32;
+#endif
 	} cn63xx;
 	struct cvmx_sriox_ip_feature_cn63xx cn63xxp1;
 	struct cvmx_sriox_ip_feature_s cn66xx;
@@ -590,6 +997,7 @@ union cvmx_sriox_ip_feature {
 union cvmx_sriox_mac_buffers {
 	uint64_t u64;
 	struct cvmx_sriox_mac_buffers_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_56_63:8;
 		uint64_t tx_enb:8;
 		uint64_t reserved_44_47:4;
@@ -600,6 +1008,18 @@ union cvmx_sriox_mac_buffers {
 		uint64_t reserved_12_15:4;
 		uint64_t rx_inuse:4;
 		uint64_t rx_stat:8;
+#else
+		uint64_t rx_stat:8;
+		uint64_t rx_inuse:4;
+		uint64_t reserved_12_15:4;
+		uint64_t rx_enb:8;
+		uint64_t reserved_24_31:8;
+		uint64_t tx_stat:8;
+		uint64_t tx_inuse:4;
+		uint64_t reserved_44_47:4;
+		uint64_t tx_enb:8;
+		uint64_t reserved_56_63:8;
+#endif
 	} s;
 	struct cvmx_sriox_mac_buffers_s cn63xx;
 	struct cvmx_sriox_mac_buffers_s cn66xx;
@@ -608,12 +1028,21 @@ union cvmx_sriox_mac_buffers {
 union cvmx_sriox_maint_op {
 	uint64_t u64;
 	struct cvmx_sriox_maint_op_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t wr_data:32;
 		uint64_t reserved_27_31:5;
 		uint64_t fail:1;
 		uint64_t pending:1;
 		uint64_t op:1;
 		uint64_t addr:24;
+#else
+		uint64_t addr:24;
+		uint64_t op:1;
+		uint64_t pending:1;
+		uint64_t fail:1;
+		uint64_t reserved_27_31:5;
+		uint64_t wr_data:32;
+#endif
 	} s;
 	struct cvmx_sriox_maint_op_s cn63xx;
 	struct cvmx_sriox_maint_op_s cn63xxp1;
@@ -623,9 +1052,15 @@ union cvmx_sriox_maint_op {
 union cvmx_sriox_maint_rd_data {
 	uint64_t u64;
 	struct cvmx_sriox_maint_rd_data_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_33_63:31;
 		uint64_t valid:1;
 		uint64_t rd_data:32;
+#else
+		uint64_t rd_data:32;
+		uint64_t valid:1;
+		uint64_t reserved_33_63:31;
+#endif
 	} s;
 	struct cvmx_sriox_maint_rd_data_s cn63xx;
 	struct cvmx_sriox_maint_rd_data_s cn63xxp1;
@@ -635,8 +1070,13 @@ union cvmx_sriox_maint_rd_data {
 union cvmx_sriox_mce_tx_ctl {
 	uint64_t u64;
 	struct cvmx_sriox_mce_tx_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t mce:1;
+#else
+		uint64_t mce:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
 	struct cvmx_sriox_mce_tx_ctl_s cn63xx;
 	struct cvmx_sriox_mce_tx_ctl_s cn63xxp1;
@@ -646,6 +1086,7 @@ union cvmx_sriox_mce_tx_ctl {
 union cvmx_sriox_mem_op_ctrl {
 	uint64_t u64;
 	struct cvmx_sriox_mem_op_ctrl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t rr_ro:1;
 		uint64_t w_ro:1;
@@ -654,6 +1095,16 @@ union cvmx_sriox_mem_op_ctrl {
 		uint64_t rp0_sid:2;
 		uint64_t rp1_pid:1;
 		uint64_t rp0_pid:2;
+#else
+		uint64_t rp0_pid:2;
+		uint64_t rp1_pid:1;
+		uint64_t rp0_sid:2;
+		uint64_t rp1_sid:1;
+		uint64_t reserved_6_7:2;
+		uint64_t w_ro:1;
+		uint64_t rr_ro:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
 	struct cvmx_sriox_mem_op_ctrl_s cn63xx;
 	struct cvmx_sriox_mem_op_ctrl_s cn63xxp1;
@@ -663,6 +1114,7 @@ union cvmx_sriox_mem_op_ctrl {
 union cvmx_sriox_omsg_ctrlx {
 	uint64_t u64;
 	struct cvmx_sriox_omsg_ctrlx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t testmode:1;
 		uint64_t reserved_37_62:26;
 		uint64_t silo_max:5;
@@ -674,9 +1126,23 @@ union cvmx_sriox_omsg_ctrlx {
 		uint64_t idm_did:1;
 		uint64_t lttr_sp:4;
 		uint64_t lttr_mp:4;
+#else
+		uint64_t lttr_mp:4;
+		uint64_t lttr_sp:4;
+		uint64_t idm_did:1;
+		uint64_t idm_sis:1;
+		uint64_t idm_tt:1;
+		uint64_t reserved_11_14:4;
+		uint64_t rtry_en:1;
+		uint64_t rtry_thr:16;
+		uint64_t silo_max:5;
+		uint64_t reserved_37_62:26;
+		uint64_t testmode:1;
+#endif
 	} s;
 	struct cvmx_sriox_omsg_ctrlx_s cn63xx;
 	struct cvmx_sriox_omsg_ctrlx_cn63xxp1 {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t testmode:1;
 		uint64_t reserved_32_62:31;
 		uint64_t rtry_thr:16;
@@ -687,6 +1153,18 @@ union cvmx_sriox_omsg_ctrlx {
 		uint64_t idm_did:1;
 		uint64_t lttr_sp:4;
 		uint64_t lttr_mp:4;
+#else
+		uint64_t lttr_mp:4;
+		uint64_t lttr_sp:4;
+		uint64_t idm_did:1;
+		uint64_t idm_sis:1;
+		uint64_t idm_tt:1;
+		uint64_t reserved_11_14:4;
+		uint64_t rtry_en:1;
+		uint64_t rtry_thr:16;
+		uint64_t reserved_32_62:31;
+		uint64_t testmode:1;
+#endif
 	} cn63xxp1;
 	struct cvmx_sriox_omsg_ctrlx_s cn66xx;
 };
@@ -694,9 +1172,15 @@ union cvmx_sriox_omsg_ctrlx {
 union cvmx_sriox_omsg_done_countsx {
 	uint64_t u64;
 	struct cvmx_sriox_omsg_done_countsx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t bad:16;
 		uint64_t good:16;
+#else
+		uint64_t good:16;
+		uint64_t bad:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_omsg_done_countsx_s cn63xx;
 	struct cvmx_sriox_omsg_done_countsx_s cn66xx;
@@ -705,6 +1189,7 @@ union cvmx_sriox_omsg_done_countsx {
 union cvmx_sriox_omsg_fmp_mrx {
 	uint64_t u64;
 	struct cvmx_sriox_omsg_fmp_mrx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_15_63:49;
 		uint64_t ctlr_sp:1;
 		uint64_t ctlr_fmp:1;
@@ -721,6 +1206,24 @@ union cvmx_sriox_omsg_fmp_mrx {
 		uint64_t all_fmp:1;
 		uint64_t all_nmp:1;
 		uint64_t all_psd:1;
+#else
+		uint64_t all_psd:1;
+		uint64_t all_nmp:1;
+		uint64_t all_fmp:1;
+		uint64_t all_sp:1;
+		uint64_t mbox_psd:1;
+		uint64_t mbox_nmp:1;
+		uint64_t mbox_fmp:1;
+		uint64_t mbox_sp:1;
+		uint64_t id_psd:1;
+		uint64_t id_nmp:1;
+		uint64_t id_fmp:1;
+		uint64_t id_sp:1;
+		uint64_t ctlr_nmp:1;
+		uint64_t ctlr_fmp:1;
+		uint64_t ctlr_sp:1;
+		uint64_t reserved_15_63:49;
+#endif
 	} s;
 	struct cvmx_sriox_omsg_fmp_mrx_s cn63xx;
 	struct cvmx_sriox_omsg_fmp_mrx_s cn63xxp1;
@@ -730,6 +1233,7 @@ union cvmx_sriox_omsg_fmp_mrx {
 union cvmx_sriox_omsg_nmp_mrx {
 	uint64_t u64;
 	struct cvmx_sriox_omsg_nmp_mrx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_15_63:49;
 		uint64_t ctlr_sp:1;
 		uint64_t ctlr_fmp:1;
@@ -746,6 +1250,24 @@ union cvmx_sriox_omsg_nmp_mrx {
 		uint64_t all_fmp:1;
 		uint64_t all_nmp:1;
 		uint64_t reserved_0_0:1;
+#else
+		uint64_t reserved_0_0:1;
+		uint64_t all_nmp:1;
+		uint64_t all_fmp:1;
+		uint64_t all_sp:1;
+		uint64_t reserved_4_4:1;
+		uint64_t mbox_nmp:1;
+		uint64_t mbox_fmp:1;
+		uint64_t mbox_sp:1;
+		uint64_t reserved_8_8:1;
+		uint64_t id_nmp:1;
+		uint64_t id_fmp:1;
+		uint64_t id_sp:1;
+		uint64_t ctlr_nmp:1;
+		uint64_t ctlr_fmp:1;
+		uint64_t ctlr_sp:1;
+		uint64_t reserved_15_63:49;
+#endif
 	} s;
 	struct cvmx_sriox_omsg_nmp_mrx_s cn63xx;
 	struct cvmx_sriox_omsg_nmp_mrx_s cn63xxp1;
@@ -755,16 +1277,30 @@ union cvmx_sriox_omsg_nmp_mrx {
 union cvmx_sriox_omsg_portx {
 	uint64_t u64;
 	struct cvmx_sriox_omsg_portx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t enable:1;
 		uint64_t reserved_3_30:28;
 		uint64_t port:3;
+#else
+		uint64_t port:3;
+		uint64_t reserved_3_30:28;
+		uint64_t enable:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_omsg_portx_cn63xx {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t enable:1;
 		uint64_t reserved_2_30:29;
 		uint64_t port:2;
+#else
+		uint64_t port:2;
+		uint64_t reserved_2_30:29;
+		uint64_t enable:1;
+		uint64_t reserved_32_63:32;
+#endif
 	} cn63xx;
 	struct cvmx_sriox_omsg_portx_cn63xx cn63xxp1;
 	struct cvmx_sriox_omsg_portx_s cn66xx;
@@ -773,8 +1309,13 @@ union cvmx_sriox_omsg_portx {
 union cvmx_sriox_omsg_silo_thr {
 	uint64_t u64;
 	struct cvmx_sriox_omsg_silo_thr_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t tot_silo:5;
+#else
+		uint64_t tot_silo:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_sriox_omsg_silo_thr_s cn63xx;
 	struct cvmx_sriox_omsg_silo_thr_s cn66xx;
@@ -783,6 +1324,7 @@ union cvmx_sriox_omsg_silo_thr {
 union cvmx_sriox_omsg_sp_mrx {
 	uint64_t u64;
 	struct cvmx_sriox_omsg_sp_mrx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t xmbox_sp:1;
 		uint64_t ctlr_sp:1;
@@ -800,6 +1342,25 @@ union cvmx_sriox_omsg_sp_mrx {
 		uint64_t all_fmp:1;
 		uint64_t all_nmp:1;
 		uint64_t all_psd:1;
+#else
+		uint64_t all_psd:1;
+		uint64_t all_nmp:1;
+		uint64_t all_fmp:1;
+		uint64_t all_sp:1;
+		uint64_t mbox_psd:1;
+		uint64_t mbox_nmp:1;
+		uint64_t mbox_fmp:1;
+		uint64_t mbox_sp:1;
+		uint64_t id_psd:1;
+		uint64_t id_nmp:1;
+		uint64_t id_fmp:1;
+		uint64_t id_sp:1;
+		uint64_t ctlr_nmp:1;
+		uint64_t ctlr_fmp:1;
+		uint64_t ctlr_sp:1;
+		uint64_t xmbox_sp:1;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_sriox_omsg_sp_mrx_s cn63xx;
 	struct cvmx_sriox_omsg_sp_mrx_s cn63xxp1;
@@ -809,9 +1370,15 @@ union cvmx_sriox_omsg_sp_mrx {
 union cvmx_sriox_priox_in_use {
 	uint64_t u64;
 	struct cvmx_sriox_priox_in_use_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t end_cnt:16;
 		uint64_t start_cnt:16;
+#else
+		uint64_t start_cnt:16;
+		uint64_t end_cnt:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_priox_in_use_s cn63xx;
 	struct cvmx_sriox_priox_in_use_s cn66xx;
@@ -820,6 +1387,7 @@ union cvmx_sriox_priox_in_use {
 union cvmx_sriox_rx_bell {
 	uint64_t u64;
 	struct cvmx_sriox_rx_bell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t data:16;
 		uint64_t src_id:16;
@@ -829,6 +1397,17 @@ union cvmx_sriox_rx_bell {
 		uint64_t id16:1;
 		uint64_t reserved_2_2:1;
 		uint64_t priority:2;
+#else
+		uint64_t priority:2;
+		uint64_t reserved_2_2:1;
+		uint64_t id16:1;
+		uint64_t dest_id:1;
+		uint64_t reserved_5_7:3;
+		uint64_t count:8;
+		uint64_t src_id:16;
+		uint64_t data:16;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_sriox_rx_bell_s cn63xx;
 	struct cvmx_sriox_rx_bell_s cn63xxp1;
@@ -838,9 +1417,15 @@ union cvmx_sriox_rx_bell {
 union cvmx_sriox_rx_bell_seq {
 	uint64_t u64;
 	struct cvmx_sriox_rx_bell_seq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_40_63:24;
 		uint64_t count:8;
 		uint64_t seq:32;
+#else
+		uint64_t seq:32;
+		uint64_t count:8;
+		uint64_t reserved_40_63:24;
+#endif
 	} s;
 	struct cvmx_sriox_rx_bell_seq_s cn63xx;
 	struct cvmx_sriox_rx_bell_seq_s cn63xxp1;
@@ -850,6 +1435,7 @@ union cvmx_sriox_rx_bell_seq {
 union cvmx_sriox_rx_status {
 	uint64_t u64;
 	struct cvmx_sriox_rx_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t rtn_pr3:8;
 		uint64_t rtn_pr2:8;
 		uint64_t rtn_pr1:8;
@@ -859,6 +1445,17 @@ union cvmx_sriox_rx_status {
 		uint64_t reserved_13_15:3;
 		uint64_t n_post:5;
 		uint64_t post:8;
+#else
+		uint64_t post:8;
+		uint64_t n_post:5;
+		uint64_t reserved_13_15:3;
+		uint64_t comp:8;
+		uint64_t mbox:4;
+		uint64_t reserved_28_39:12;
+		uint64_t rtn_pr1:8;
+		uint64_t rtn_pr2:8;
+		uint64_t rtn_pr3:8;
+#endif
 	} s;
 	struct cvmx_sriox_rx_status_s cn63xx;
 	struct cvmx_sriox_rx_status_s cn63xxp1;
@@ -868,6 +1465,7 @@ union cvmx_sriox_rx_status {
 union cvmx_sriox_s2m_typex {
 	uint64_t u64;
 	struct cvmx_sriox_s2m_typex_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t wr_op:3;
 		uint64_t reserved_15_15:1;
@@ -879,6 +1477,19 @@ union cvmx_sriox_s2m_typex {
 		uint64_t id16:1;
 		uint64_t reserved_2_3:2;
 		uint64_t iaow_sel:2;
+#else
+		uint64_t iaow_sel:2;
+		uint64_t reserved_2_3:2;
+		uint64_t id16:1;
+		uint64_t src_id:1;
+		uint64_t reserved_6_7:2;
+		uint64_t rd_prior:2;
+		uint64_t wr_prior:2;
+		uint64_t rd_op:3;
+		uint64_t reserved_15_15:1;
+		uint64_t wr_op:3;
+		uint64_t reserved_19_63:45;
+#endif
 	} s;
 	struct cvmx_sriox_s2m_typex_s cn63xx;
 	struct cvmx_sriox_s2m_typex_s cn63xxp1;
@@ -888,8 +1499,13 @@ union cvmx_sriox_s2m_typex {
 union cvmx_sriox_seq {
 	uint64_t u64;
 	struct cvmx_sriox_seq_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t seq:32;
+#else
+		uint64_t seq:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_seq_s cn63xx;
 	struct cvmx_sriox_seq_s cn63xxp1;
@@ -899,9 +1515,15 @@ union cvmx_sriox_seq {
 union cvmx_sriox_status_reg {
 	uint64_t u64;
 	struct cvmx_sriox_status_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_2_63:62;
 		uint64_t access:1;
 		uint64_t srio:1;
+#else
+		uint64_t srio:1;
+		uint64_t access:1;
+		uint64_t reserved_2_63:62;
+#endif
 	} s;
 	struct cvmx_sriox_status_reg_s cn63xx;
 	struct cvmx_sriox_status_reg_s cn63xxp1;
@@ -911,12 +1533,21 @@ union cvmx_sriox_status_reg {
 union cvmx_sriox_tag_ctrl {
 	uint64_t u64;
 	struct cvmx_sriox_tag_ctrl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t o_clr:1;
 		uint64_t reserved_13_15:3;
 		uint64_t otag:5;
 		uint64_t reserved_5_7:3;
 		uint64_t itag:5;
+#else
+		uint64_t itag:5;
+		uint64_t reserved_5_7:3;
+		uint64_t otag:5;
+		uint64_t reserved_13_15:3;
+		uint64_t o_clr:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_sriox_tag_ctrl_s cn63xx;
 	struct cvmx_sriox_tag_ctrl_s cn63xxp1;
@@ -926,12 +1557,21 @@ union cvmx_sriox_tag_ctrl {
 union cvmx_sriox_tlp_credits {
 	uint64_t u64;
 	struct cvmx_sriox_tlp_credits_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_28_63:36;
 		uint64_t mbox:4;
 		uint64_t comp:8;
 		uint64_t reserved_13_15:3;
 		uint64_t n_post:5;
 		uint64_t post:8;
+#else
+		uint64_t post:8;
+		uint64_t n_post:5;
+		uint64_t reserved_13_15:3;
+		uint64_t comp:8;
+		uint64_t mbox:4;
+		uint64_t reserved_28_63:36;
+#endif
 	} s;
 	struct cvmx_sriox_tlp_credits_s cn63xx;
 	struct cvmx_sriox_tlp_credits_s cn63xxp1;
@@ -941,6 +1581,7 @@ union cvmx_sriox_tlp_credits {
 union cvmx_sriox_tx_bell {
 	uint64_t u64;
 	struct cvmx_sriox_tx_bell_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t data:16;
 		uint64_t dest_id:16;
@@ -951,6 +1592,18 @@ union cvmx_sriox_tx_bell {
 		uint64_t id16:1;
 		uint64_t reserved_2_2:1;
 		uint64_t priority:2;
+#else
+		uint64_t priority:2;
+		uint64_t reserved_2_2:1;
+		uint64_t id16:1;
+		uint64_t src_id:1;
+		uint64_t reserved_5_7:3;
+		uint64_t pending:1;
+		uint64_t reserved_9_15:7;
+		uint64_t dest_id:16;
+		uint64_t data:16;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_sriox_tx_bell_s cn63xx;
 	struct cvmx_sriox_tx_bell_s cn63xxp1;
@@ -960,6 +1613,7 @@ union cvmx_sriox_tx_bell {
 union cvmx_sriox_tx_bell_info {
 	uint64_t u64;
 	struct cvmx_sriox_tx_bell_info_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_48_63:16;
 		uint64_t data:16;
 		uint64_t dest_id:16;
@@ -971,6 +1625,19 @@ union cvmx_sriox_tx_bell_info {
 		uint64_t id16:1;
 		uint64_t reserved_2_2:1;
 		uint64_t priority:2;
+#else
+		uint64_t priority:2;
+		uint64_t reserved_2_2:1;
+		uint64_t id16:1;
+		uint64_t src_id:1;
+		uint64_t retry:1;
+		uint64_t error:1;
+		uint64_t timeout:1;
+		uint64_t reserved_8_15:8;
+		uint64_t dest_id:16;
+		uint64_t data:16;
+		uint64_t reserved_48_63:16;
+#endif
 	} s;
 	struct cvmx_sriox_tx_bell_info_s cn63xx;
 	struct cvmx_sriox_tx_bell_info_s cn63xxp1;
@@ -980,6 +1647,7 @@ union cvmx_sriox_tx_bell_info {
 union cvmx_sriox_tx_ctrl {
 	uint64_t u64;
 	struct cvmx_sriox_tx_ctrl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_53_63:11;
 		uint64_t tag_th2:5;
 		uint64_t reserved_45_47:3;
@@ -992,6 +1660,20 @@ union cvmx_sriox_tx_ctrl {
 		uint64_t tx_th1:4;
 		uint64_t reserved_4_7:4;
 		uint64_t tx_th0:4;
+#else
+		uint64_t tx_th0:4;
+		uint64_t reserved_4_7:4;
+		uint64_t tx_th1:4;
+		uint64_t reserved_12_15:4;
+		uint64_t tx_th2:4;
+		uint64_t reserved_20_31:12;
+		uint64_t tag_th0:5;
+		uint64_t reserved_37_39:3;
+		uint64_t tag_th1:5;
+		uint64_t reserved_45_47:3;
+		uint64_t tag_th2:5;
+		uint64_t reserved_53_63:11;
+#endif
 	} s;
 	struct cvmx_sriox_tx_ctrl_s cn63xx;
 	struct cvmx_sriox_tx_ctrl_s cn63xxp1;
@@ -1001,8 +1683,13 @@ union cvmx_sriox_tx_ctrl {
 union cvmx_sriox_tx_emphasis {
 	uint64_t u64;
 	struct cvmx_sriox_tx_emphasis_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t emph:4;
+#else
+		uint64_t emph:4;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_sriox_tx_emphasis_s cn63xx;
 	struct cvmx_sriox_tx_emphasis_s cn66xx;
@@ -1011,11 +1698,19 @@ union cvmx_sriox_tx_emphasis {
 union cvmx_sriox_tx_status {
 	uint64_t u64;
 	struct cvmx_sriox_tx_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t s2m_pr3:8;
 		uint64_t s2m_pr2:8;
 		uint64_t s2m_pr1:8;
 		uint64_t s2m_pr0:8;
+#else
+		uint64_t s2m_pr0:8;
+		uint64_t s2m_pr1:8;
+		uint64_t s2m_pr2:8;
+		uint64_t s2m_pr3:8;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_tx_status_s cn63xx;
 	struct cvmx_sriox_tx_status_s cn63xxp1;
@@ -1025,9 +1720,15 @@ union cvmx_sriox_tx_status {
 union cvmx_sriox_wr_done_counts {
 	uint64_t u64;
 	struct cvmx_sriox_wr_done_counts_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t bad:16;
 		uint64_t good:16;
+#else
+		uint64_t good:16;
+		uint64_t bad:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_sriox_wr_done_counts_s cn63xx;
 	struct cvmx_sriox_wr_done_counts_s cn66xx;
diff --git a/arch/mips/include/asm/octeon/cvmx-srxx-defs.h b/arch/mips/include/asm/octeon/cvmx-srxx-defs.h
index d82b366c279..c98e625cd4e 100644
--- a/arch/mips/include/asm/octeon/cvmx-srxx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-srxx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,27 +28,29 @@
 #ifndef __CVMX_SRXX_DEFS_H__
 #define __CVMX_SRXX_DEFS_H__
 
-#define CVMX_SRXX_COM_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000200ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SRXX_IGN_RX_FULL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000218ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SRXX_SPI4_CALX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000000ull + (((offset) & 31) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SRXX_SPI4_STAT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000208ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SRXX_SW_TICK_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000220ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_SRXX_SW_TICK_DAT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000228ull + (((block_id) & 1) * 0x8000000ull))
+#define CVMX_SRXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000200ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SRXX_IGN_RX_FULL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000218ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SRXX_SPI4_CALX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180090000000ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8)
+#define CVMX_SRXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000208ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SRXX_SW_TICK_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000220ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_SRXX_SW_TICK_DAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000228ull) + ((block_id) & 1) * 0x8000000ull)
 
 union cvmx_srxx_com_ctl {
 	uint64_t u64;
 	struct cvmx_srxx_com_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t prts:4;
 		uint64_t st_en:1;
 		uint64_t reserved_1_2:2;
 		uint64_t inf_en:1;
+#else
+		uint64_t inf_en:1;
+		uint64_t reserved_1_2:2;
+		uint64_t st_en:1;
+		uint64_t prts:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_srxx_com_ctl_s cn38xx;
 	struct cvmx_srxx_com_ctl_s cn38xxp2;
@@ -59,8 +61,13 @@ union cvmx_srxx_com_ctl {
 union cvmx_srxx_ign_rx_full {
 	uint64_t u64;
 	struct cvmx_srxx_ign_rx_full_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t ignore:16;
+#else
+		uint64_t ignore:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_srxx_ign_rx_full_s cn38xx;
 	struct cvmx_srxx_ign_rx_full_s cn38xxp2;
@@ -71,12 +78,21 @@ union cvmx_srxx_ign_rx_full {
 union cvmx_srxx_spi4_calx {
 	uint64_t u64;
 	struct cvmx_srxx_spi4_calx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t oddpar:1;
 		uint64_t prt3:4;
 		uint64_t prt2:4;
 		uint64_t prt1:4;
 		uint64_t prt0:4;
+#else
+		uint64_t prt0:4;
+		uint64_t prt1:4;
+		uint64_t prt2:4;
+		uint64_t prt3:4;
+		uint64_t oddpar:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_srxx_spi4_calx_s cn38xx;
 	struct cvmx_srxx_spi4_calx_s cn38xxp2;
@@ -87,10 +103,17 @@ union cvmx_srxx_spi4_calx {
 union cvmx_srxx_spi4_stat {
 	uint64_t u64;
 	struct cvmx_srxx_spi4_stat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t m:8;
 		uint64_t reserved_7_7:1;
 		uint64_t len:7;
+#else
+		uint64_t len:7;
+		uint64_t reserved_7_7:1;
+		uint64_t m:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_srxx_spi4_stat_s cn38xx;
 	struct cvmx_srxx_spi4_stat_s cn38xxp2;
@@ -101,12 +124,21 @@ union cvmx_srxx_spi4_stat {
 union cvmx_srxx_sw_tick_ctl {
 	uint64_t u64;
 	struct cvmx_srxx_sw_tick_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_14_63:50;
 		uint64_t eop:1;
 		uint64_t sop:1;
 		uint64_t mod:4;
 		uint64_t opc:4;
 		uint64_t adr:4;
+#else
+		uint64_t adr:4;
+		uint64_t opc:4;
+		uint64_t mod:4;
+		uint64_t sop:1;
+		uint64_t eop:1;
+		uint64_t reserved_14_63:50;
+#endif
 	} s;
 	struct cvmx_srxx_sw_tick_ctl_s cn38xx;
 	struct cvmx_srxx_sw_tick_ctl_s cn58xx;
@@ -116,7 +148,11 @@ union cvmx_srxx_sw_tick_ctl {
 union cvmx_srxx_sw_tick_dat {
 	uint64_t u64;
 	struct cvmx_srxx_sw_tick_dat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
+		uint64_t dat:64;
+#else
 		uint64_t dat:64;
+#endif
 	} s;
 	struct cvmx_srxx_sw_tick_dat_s cn38xx;
 	struct cvmx_srxx_sw_tick_dat_s cn58xx;
diff --git a/arch/mips/include/asm/octeon/cvmx-stxx-defs.h b/arch/mips/include/asm/octeon/cvmx-stxx-defs.h
index 4f209b62cae..146354005d3 100644
--- a/arch/mips/include/asm/octeon/cvmx-stxx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-stxx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2008 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -28,47 +28,39 @@
 #ifndef __CVMX_STXX_DEFS_H__
 #define __CVMX_STXX_DEFS_H__
 
-#define CVMX_STXX_ARB_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000608ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_BCKPRS_CNT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000688ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_COM_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000600ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_DIP_CNT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000690ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_IGN_CAL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000610ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_INT_MSK(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800900006A0ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_INT_REG(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000698ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_INT_SYNC(block_id) \
-	 CVMX_ADD_IO_SEG(0x00011800900006A8ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_MIN_BST(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000618ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_SPI4_CALX(offset, block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000400ull + (((offset) & 31) * 8) + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_SPI4_DAT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000628ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_SPI4_STAT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000630ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_STAT_BYTES_HI(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000648ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_STAT_BYTES_LO(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000680ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_STAT_CTL(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000638ull + (((block_id) & 1) * 0x8000000ull))
-#define CVMX_STXX_STAT_PKT_XMT(block_id) \
-	 CVMX_ADD_IO_SEG(0x0001180090000640ull + (((block_id) & 1) * 0x8000000ull))
+#define CVMX_STXX_ARB_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000608ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000688ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000600ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_DIP_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000690ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_IGN_CAL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000610ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_INT_MSK(block_id) (CVMX_ADD_IO_SEG(0x00011800900006A0ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x0001180090000698ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_INT_SYNC(block_id) (CVMX_ADD_IO_SEG(0x00011800900006A8ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_MIN_BST(block_id) (CVMX_ADD_IO_SEG(0x0001180090000618ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_SPI4_CALX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180090000400ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8)
+#define CVMX_STXX_SPI4_DAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000628ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000630ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_STAT_BYTES_HI(block_id) (CVMX_ADD_IO_SEG(0x0001180090000648ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_STAT_BYTES_LO(block_id) (CVMX_ADD_IO_SEG(0x0001180090000680ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_STAT_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000638ull) + ((block_id) & 1) * 0x8000000ull)
+#define CVMX_STXX_STAT_PKT_XMT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000640ull) + ((block_id) & 1) * 0x8000000ull)
 
 union cvmx_stxx_arb_ctl {
 	uint64_t u64;
 	struct cvmx_stxx_arb_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t mintrn:1;
 		uint64_t reserved_4_4:1;
 		uint64_t igntpa:1;
 		uint64_t reserved_0_2:3;
+#else
+		uint64_t reserved_0_2:3;
+		uint64_t igntpa:1;
+		uint64_t reserved_4_4:1;
+		uint64_t mintrn:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
 	struct cvmx_stxx_arb_ctl_s cn38xx;
 	struct cvmx_stxx_arb_ctl_s cn38xxp2;
@@ -79,8 +71,13 @@ union cvmx_stxx_arb_ctl {
 union cvmx_stxx_bckprs_cnt {
 	uint64_t u64;
 	struct cvmx_stxx_bckprs_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_stxx_bckprs_cnt_s cn38xx;
 	struct cvmx_stxx_bckprs_cnt_s cn38xxp2;
@@ -91,10 +88,17 @@ union cvmx_stxx_bckprs_cnt {
 union cvmx_stxx_com_ctl {
 	uint64_t u64;
 	struct cvmx_stxx_com_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_4_63:60;
 		uint64_t st_en:1;
 		uint64_t reserved_1_2:2;
 		uint64_t inf_en:1;
+#else
+		uint64_t inf_en:1;
+		uint64_t reserved_1_2:2;
+		uint64_t st_en:1;
+		uint64_t reserved_4_63:60;
+#endif
 	} s;
 	struct cvmx_stxx_com_ctl_s cn38xx;
 	struct cvmx_stxx_com_ctl_s cn38xxp2;
@@ -105,9 +109,15 @@ union cvmx_stxx_com_ctl {
 union cvmx_stxx_dip_cnt {
 	uint64_t u64;
 	struct cvmx_stxx_dip_cnt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t frmmax:4;
 		uint64_t dipmax:4;
+#else
+		uint64_t dipmax:4;
+		uint64_t frmmax:4;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_stxx_dip_cnt_s cn38xx;
 	struct cvmx_stxx_dip_cnt_s cn38xxp2;
@@ -118,8 +128,13 @@ union cvmx_stxx_dip_cnt {
 union cvmx_stxx_ign_cal {
 	uint64_t u64;
 	struct cvmx_stxx_ign_cal_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t igntpa:16;
+#else
+		uint64_t igntpa:16;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_stxx_ign_cal_s cn38xx;
 	struct cvmx_stxx_ign_cal_s cn38xxp2;
@@ -130,6 +145,7 @@ union cvmx_stxx_ign_cal {
 union cvmx_stxx_int_msk {
 	uint64_t u64;
 	struct cvmx_stxx_int_msk_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t frmerr:1;
 		uint64_t unxfrm:1;
@@ -139,6 +155,17 @@ union cvmx_stxx_int_msk {
 		uint64_t ovrbst:1;
 		uint64_t calpar1:1;
 		uint64_t calpar0:1;
+#else
+		uint64_t calpar0:1;
+		uint64_t calpar1:1;
+		uint64_t ovrbst:1;
+		uint64_t datovr:1;
+		uint64_t diperr:1;
+		uint64_t nosync:1;
+		uint64_t unxfrm:1;
+		uint64_t frmerr:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_stxx_int_msk_s cn38xx;
 	struct cvmx_stxx_int_msk_s cn38xxp2;
@@ -149,6 +176,7 @@ union cvmx_stxx_int_msk {
 union cvmx_stxx_int_reg {
 	uint64_t u64;
 	struct cvmx_stxx_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t syncerr:1;
 		uint64_t frmerr:1;
@@ -159,6 +187,18 @@ union cvmx_stxx_int_reg {
 		uint64_t ovrbst:1;
 		uint64_t calpar1:1;
 		uint64_t calpar0:1;
+#else
+		uint64_t calpar0:1;
+		uint64_t calpar1:1;
+		uint64_t ovrbst:1;
+		uint64_t datovr:1;
+		uint64_t diperr:1;
+		uint64_t nosync:1;
+		uint64_t unxfrm:1;
+		uint64_t frmerr:1;
+		uint64_t syncerr:1;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_stxx_int_reg_s cn38xx;
 	struct cvmx_stxx_int_reg_s cn38xxp2;
@@ -169,6 +209,7 @@ union cvmx_stxx_int_reg {
 union cvmx_stxx_int_sync {
 	uint64_t u64;
 	struct cvmx_stxx_int_sync_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t frmerr:1;
 		uint64_t unxfrm:1;
@@ -178,6 +219,17 @@ union cvmx_stxx_int_sync {
 		uint64_t ovrbst:1;
 		uint64_t calpar1:1;
 		uint64_t calpar0:1;
+#else
+		uint64_t calpar0:1;
+		uint64_t calpar1:1;
+		uint64_t ovrbst:1;
+		uint64_t datovr:1;
+		uint64_t diperr:1;
+		uint64_t nosync:1;
+		uint64_t unxfrm:1;
+		uint64_t frmerr:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
 	struct cvmx_stxx_int_sync_s cn38xx;
 	struct cvmx_stxx_int_sync_s cn38xxp2;
@@ -188,8 +240,13 @@ union cvmx_stxx_int_sync {
 union cvmx_stxx_min_bst {
 	uint64_t u64;
 	struct cvmx_stxx_min_bst_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_9_63:55;
 		uint64_t minb:9;
+#else
+		uint64_t minb:9;
+		uint64_t reserved_9_63:55;
+#endif
 	} s;
 	struct cvmx_stxx_min_bst_s cn38xx;
 	struct cvmx_stxx_min_bst_s cn38xxp2;
@@ -200,12 +257,21 @@ union cvmx_stxx_min_bst {
 union cvmx_stxx_spi4_calx {
 	uint64_t u64;
 	struct cvmx_stxx_spi4_calx_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_17_63:47;
 		uint64_t oddpar:1;
 		uint64_t prt3:4;
 		uint64_t prt2:4;
 		uint64_t prt1:4;
 		uint64_t prt0:4;
+#else
+		uint64_t prt0:4;
+		uint64_t prt1:4;
+		uint64_t prt2:4;
+		uint64_t prt3:4;
+		uint64_t oddpar:1;
+		uint64_t reserved_17_63:47;
+#endif
 	} s;
 	struct cvmx_stxx_spi4_calx_s cn38xx;
 	struct cvmx_stxx_spi4_calx_s cn38xxp2;
@@ -216,9 +282,15 @@ union cvmx_stxx_spi4_calx {
 union cvmx_stxx_spi4_dat {
 	uint64_t u64;
 	struct cvmx_stxx_spi4_dat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t alpha:16;
 		uint64_t max_t:16;
+#else
+		uint64_t max_t:16;
+		uint64_t alpha:16;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_stxx_spi4_dat_s cn38xx;
 	struct cvmx_stxx_spi4_dat_s cn38xxp2;
@@ -229,10 +301,17 @@ union cvmx_stxx_spi4_dat {
 union cvmx_stxx_spi4_stat {
 	uint64_t u64;
 	struct cvmx_stxx_spi4_stat_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_16_63:48;
 		uint64_t m:8;
 		uint64_t reserved_7_7:1;
 		uint64_t len:7;
+#else
+		uint64_t len:7;
+		uint64_t reserved_7_7:1;
+		uint64_t m:8;
+		uint64_t reserved_16_63:48;
+#endif
 	} s;
 	struct cvmx_stxx_spi4_stat_s cn38xx;
 	struct cvmx_stxx_spi4_stat_s cn38xxp2;
@@ -243,8 +322,13 @@ union cvmx_stxx_spi4_stat {
 union cvmx_stxx_stat_bytes_hi {
 	uint64_t u64;
 	struct cvmx_stxx_stat_bytes_hi_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_stxx_stat_bytes_hi_s cn38xx;
 	struct cvmx_stxx_stat_bytes_hi_s cn38xxp2;
@@ -255,8 +339,13 @@ union cvmx_stxx_stat_bytes_hi {
 union cvmx_stxx_stat_bytes_lo {
 	uint64_t u64;
 	struct cvmx_stxx_stat_bytes_lo_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_stxx_stat_bytes_lo_s cn38xx;
 	struct cvmx_stxx_stat_bytes_lo_s cn38xxp2;
@@ -267,9 +356,15 @@ union cvmx_stxx_stat_bytes_lo {
 union cvmx_stxx_stat_ctl {
 	uint64_t u64;
 	struct cvmx_stxx_stat_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t clr:1;
 		uint64_t bckprs:4;
+#else
+		uint64_t bckprs:4;
+		uint64_t clr:1;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
 	struct cvmx_stxx_stat_ctl_s cn38xx;
 	struct cvmx_stxx_stat_ctl_s cn38xxp2;
@@ -280,8 +375,13 @@ union cvmx_stxx_stat_ctl {
 union cvmx_stxx_stat_pkt_xmt {
 	uint64_t u64;
 	struct cvmx_stxx_stat_pkt_xmt_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t cnt:32;
+#else
+		uint64_t cnt:32;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
 	struct cvmx_stxx_stat_pkt_xmt_s cn38xx;
 	struct cvmx_stxx_stat_pkt_xmt_s cn38xxp2;
diff --git a/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h b/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h
index 594f1b68cd6..bc5b80c6bbe 100644
--- a/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h
+++ b/arch/mips/include/asm/octeon/cvmx-uctlx-defs.h
@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2012 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -25,8 +25,8 @@
  * Contact Cavium Networks for more information
  ***********************license end**************************************/
 
-#ifndef __CVMX_UCTLX_TYPEDEFS_H__
-#define __CVMX_UCTLX_TYPEDEFS_H__
+#ifndef __CVMX_UCTLX_DEFS_H__
+#define __CVMX_UCTLX_DEFS_H__
 
 #define CVMX_UCTLX_BIST_STATUS(block_id) (CVMX_ADD_IO_SEG(0x000118006F0000A0ull))
 #define CVMX_UCTLX_CLK_RST_CTL(block_id) (CVMX_ADD_IO_SEG(0x000118006F000000ull))
@@ -45,6 +45,7 @@
 union cvmx_uctlx_bist_status {
 	uint64_t u64;
 	struct cvmx_uctlx_bist_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t data_bis:1;
 		uint64_t desc_bis:1;
@@ -52,14 +53,29 @@ union cvmx_uctlx_bist_status {
 		uint64_t orbm_bis:1;
 		uint64_t wrbm_bis:1;
 		uint64_t ppaf_bis:1;
+#else
+		uint64_t ppaf_bis:1;
+		uint64_t wrbm_bis:1;
+		uint64_t orbm_bis:1;
+		uint64_t erbm_bis:1;
+		uint64_t desc_bis:1;
+		uint64_t data_bis:1;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
-	struct cvmx_uctlx_bist_status_s       cn63xx;
-	struct cvmx_uctlx_bist_status_s       cn63xxp1;
+	struct cvmx_uctlx_bist_status_s cn61xx;
+	struct cvmx_uctlx_bist_status_s cn63xx;
+	struct cvmx_uctlx_bist_status_s cn63xxp1;
+	struct cvmx_uctlx_bist_status_s cn66xx;
+	struct cvmx_uctlx_bist_status_s cn68xx;
+	struct cvmx_uctlx_bist_status_s cn68xxp1;
+	struct cvmx_uctlx_bist_status_s cnf71xx;
 };
 
 union cvmx_uctlx_clk_rst_ctl {
 	uint64_t u64;
 	struct cvmx_uctlx_clk_rst_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_25_63:39;
 		uint64_t clear_bist:1;
 		uint64_t start_bist:1;
@@ -81,14 +97,43 @@ union cvmx_uctlx_clk_rst_ctl {
 		uint64_t p_por:1;
 		uint64_t p_prst:1;
 		uint64_t hrst:1;
+#else
+		uint64_t hrst:1;
+		uint64_t p_prst:1;
+		uint64_t p_por:1;
+		uint64_t p_com_on:1;
+		uint64_t reserved_4_4:1;
+		uint64_t p_refclk_div:2;
+		uint64_t p_refclk_sel:2;
+		uint64_t h_div:4;
+		uint64_t o_clkdiv_en:1;
+		uint64_t h_clkdiv_en:1;
+		uint64_t h_clkdiv_rst:1;
+		uint64_t h_clkdiv_byp:1;
+		uint64_t o_clkdiv_rst:1;
+		uint64_t app_start_clk:1;
+		uint64_t ohci_susp_lgcy:1;
+		uint64_t ohci_sm:1;
+		uint64_t ohci_clkcktrst:1;
+		uint64_t ehci_sm:1;
+		uint64_t start_bist:1;
+		uint64_t clear_bist:1;
+		uint64_t reserved_25_63:39;
+#endif
 	} s;
-	struct cvmx_uctlx_clk_rst_ctl_s       cn63xx;
-	struct cvmx_uctlx_clk_rst_ctl_s       cn63xxp1;
+	struct cvmx_uctlx_clk_rst_ctl_s cn61xx;
+	struct cvmx_uctlx_clk_rst_ctl_s cn63xx;
+	struct cvmx_uctlx_clk_rst_ctl_s cn63xxp1;
+	struct cvmx_uctlx_clk_rst_ctl_s cn66xx;
+	struct cvmx_uctlx_clk_rst_ctl_s cn68xx;
+	struct cvmx_uctlx_clk_rst_ctl_s cn68xxp1;
+	struct cvmx_uctlx_clk_rst_ctl_s cnf71xx;
 };
 
 union cvmx_uctlx_ehci_ctl {
 	uint64_t u64;
 	struct cvmx_uctlx_ehci_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_20_63:44;
 		uint64_t desc_rbm:1;
 		uint64_t reg_nb:1;
@@ -101,45 +146,96 @@ union cvmx_uctlx_ehci_ctl {
 		uint64_t inv_reg_a2:1;
 		uint64_t ehci_64b_addr_en:1;
 		uint64_t l2c_addr_msb:8;
+#else
+		uint64_t l2c_addr_msb:8;
+		uint64_t ehci_64b_addr_en:1;
+		uint64_t inv_reg_a2:1;
+		uint64_t l2c_desc_emod:2;
+		uint64_t l2c_buff_emod:2;
+		uint64_t l2c_stt:1;
+		uint64_t l2c_0pag:1;
+		uint64_t l2c_bc:1;
+		uint64_t l2c_dc:1;
+		uint64_t reg_nb:1;
+		uint64_t desc_rbm:1;
+		uint64_t reserved_20_63:44;
+#endif
 	} s;
-	struct cvmx_uctlx_ehci_ctl_s          cn63xx;
-	struct cvmx_uctlx_ehci_ctl_s          cn63xxp1;
+	struct cvmx_uctlx_ehci_ctl_s cn61xx;
+	struct cvmx_uctlx_ehci_ctl_s cn63xx;
+	struct cvmx_uctlx_ehci_ctl_s cn63xxp1;
+	struct cvmx_uctlx_ehci_ctl_s cn66xx;
+	struct cvmx_uctlx_ehci_ctl_s cn68xx;
+	struct cvmx_uctlx_ehci_ctl_s cn68xxp1;
+	struct cvmx_uctlx_ehci_ctl_s cnf71xx;
 };
 
 union cvmx_uctlx_ehci_fla {
 	uint64_t u64;
 	struct cvmx_uctlx_ehci_fla_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_6_63:58;
 		uint64_t fla:6;
+#else
+		uint64_t fla:6;
+		uint64_t reserved_6_63:58;
+#endif
 	} s;
-	struct cvmx_uctlx_ehci_fla_s          cn63xx;
-	struct cvmx_uctlx_ehci_fla_s          cn63xxp1;
+	struct cvmx_uctlx_ehci_fla_s cn61xx;
+	struct cvmx_uctlx_ehci_fla_s cn63xx;
+	struct cvmx_uctlx_ehci_fla_s cn63xxp1;
+	struct cvmx_uctlx_ehci_fla_s cn66xx;
+	struct cvmx_uctlx_ehci_fla_s cn68xx;
+	struct cvmx_uctlx_ehci_fla_s cn68xxp1;
+	struct cvmx_uctlx_ehci_fla_s cnf71xx;
 };
 
 union cvmx_uctlx_erto_ctl {
 	uint64_t u64;
 	struct cvmx_uctlx_erto_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t to_val:27;
 		uint64_t reserved_0_4:5;
+#else
+		uint64_t reserved_0_4:5;
+		uint64_t to_val:27;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
-	struct cvmx_uctlx_erto_ctl_s          cn63xx;
-	struct cvmx_uctlx_erto_ctl_s          cn63xxp1;
+	struct cvmx_uctlx_erto_ctl_s cn61xx;
+	struct cvmx_uctlx_erto_ctl_s cn63xx;
+	struct cvmx_uctlx_erto_ctl_s cn63xxp1;
+	struct cvmx_uctlx_erto_ctl_s cn66xx;
+	struct cvmx_uctlx_erto_ctl_s cn68xx;
+	struct cvmx_uctlx_erto_ctl_s cn68xxp1;
+	struct cvmx_uctlx_erto_ctl_s cnf71xx;
 };
 
 union cvmx_uctlx_if_ena {
 	uint64_t u64;
 	struct cvmx_uctlx_if_ena_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_1_63:63;
 		uint64_t en:1;
+#else
+		uint64_t en:1;
+		uint64_t reserved_1_63:63;
+#endif
 	} s;
-	struct cvmx_uctlx_if_ena_s            cn63xx;
-	struct cvmx_uctlx_if_ena_s            cn63xxp1;
+	struct cvmx_uctlx_if_ena_s cn61xx;
+	struct cvmx_uctlx_if_ena_s cn63xx;
+	struct cvmx_uctlx_if_ena_s cn63xxp1;
+	struct cvmx_uctlx_if_ena_s cn66xx;
+	struct cvmx_uctlx_if_ena_s cn68xx;
+	struct cvmx_uctlx_if_ena_s cn68xxp1;
+	struct cvmx_uctlx_if_ena_s cnf71xx;
 };
 
 union cvmx_uctlx_int_ena {
 	uint64_t u64;
 	struct cvmx_uctlx_int_ena_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ec_ovf_e:1;
 		uint64_t oc_ovf_e:1;
@@ -149,14 +245,31 @@ union cvmx_uctlx_int_ena {
 		uint64_t or_psh_f:1;
 		uint64_t er_psh_f:1;
 		uint64_t pp_psh_f:1;
+#else
+		uint64_t pp_psh_f:1;
+		uint64_t er_psh_f:1;
+		uint64_t or_psh_f:1;
+		uint64_t cf_psh_f:1;
+		uint64_t wb_psh_f:1;
+		uint64_t wb_pop_e:1;
+		uint64_t oc_ovf_e:1;
+		uint64_t ec_ovf_e:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
-	struct cvmx_uctlx_int_ena_s           cn63xx;
-	struct cvmx_uctlx_int_ena_s           cn63xxp1;
+	struct cvmx_uctlx_int_ena_s cn61xx;
+	struct cvmx_uctlx_int_ena_s cn63xx;
+	struct cvmx_uctlx_int_ena_s cn63xxp1;
+	struct cvmx_uctlx_int_ena_s cn66xx;
+	struct cvmx_uctlx_int_ena_s cn68xx;
+	struct cvmx_uctlx_int_ena_s cn68xxp1;
+	struct cvmx_uctlx_int_ena_s cnf71xx;
 };
 
 union cvmx_uctlx_int_reg {
 	uint64_t u64;
 	struct cvmx_uctlx_int_reg_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_8_63:56;
 		uint64_t ec_ovf_e:1;
 		uint64_t oc_ovf_e:1;
@@ -166,14 +279,31 @@ union cvmx_uctlx_int_reg {
 		uint64_t or_psh_f:1;
 		uint64_t er_psh_f:1;
 		uint64_t pp_psh_f:1;
+#else
+		uint64_t pp_psh_f:1;
+		uint64_t er_psh_f:1;
+		uint64_t or_psh_f:1;
+		uint64_t cf_psh_f:1;
+		uint64_t wb_psh_f:1;
+		uint64_t wb_pop_e:1;
+		uint64_t oc_ovf_e:1;
+		uint64_t ec_ovf_e:1;
+		uint64_t reserved_8_63:56;
+#endif
 	} s;
-	struct cvmx_uctlx_int_reg_s           cn63xx;
-	struct cvmx_uctlx_int_reg_s           cn63xxp1;
+	struct cvmx_uctlx_int_reg_s cn61xx;
+	struct cvmx_uctlx_int_reg_s cn63xx;
+	struct cvmx_uctlx_int_reg_s cn63xxp1;
+	struct cvmx_uctlx_int_reg_s cn66xx;
+	struct cvmx_uctlx_int_reg_s cn68xx;
+	struct cvmx_uctlx_int_reg_s cn68xxp1;
+	struct cvmx_uctlx_int_reg_s cnf71xx;
 };
 
 union cvmx_uctlx_ohci_ctl {
 	uint64_t u64;
 	struct cvmx_uctlx_ohci_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_19_63:45;
 		uint64_t reg_nb:1;
 		uint64_t l2c_dc:1;
@@ -185,35 +315,73 @@ union cvmx_uctlx_ohci_ctl {
 		uint64_t inv_reg_a2:1;
 		uint64_t reserved_8_8:1;
 		uint64_t l2c_addr_msb:8;
+#else
+		uint64_t l2c_addr_msb:8;
+		uint64_t reserved_8_8:1;
+		uint64_t inv_reg_a2:1;
+		uint64_t l2c_desc_emod:2;
+		uint64_t l2c_buff_emod:2;
+		uint64_t l2c_stt:1;
+		uint64_t l2c_0pag:1;
+		uint64_t l2c_bc:1;
+		uint64_t l2c_dc:1;
+		uint64_t reg_nb:1;
+		uint64_t reserved_19_63:45;
+#endif
 	} s;
-	struct cvmx_uctlx_ohci_ctl_s          cn63xx;
-	struct cvmx_uctlx_ohci_ctl_s          cn63xxp1;
+	struct cvmx_uctlx_ohci_ctl_s cn61xx;
+	struct cvmx_uctlx_ohci_ctl_s cn63xx;
+	struct cvmx_uctlx_ohci_ctl_s cn63xxp1;
+	struct cvmx_uctlx_ohci_ctl_s cn66xx;
+	struct cvmx_uctlx_ohci_ctl_s cn68xx;
+	struct cvmx_uctlx_ohci_ctl_s cn68xxp1;
+	struct cvmx_uctlx_ohci_ctl_s cnf71xx;
 };
 
 union cvmx_uctlx_orto_ctl {
 	uint64_t u64;
 	struct cvmx_uctlx_orto_ctl_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_32_63:32;
 		uint64_t to_val:24;
 		uint64_t reserved_0_7:8;
+#else
+		uint64_t reserved_0_7:8;
+		uint64_t to_val:24;
+		uint64_t reserved_32_63:32;
+#endif
 	} s;
-	struct cvmx_uctlx_orto_ctl_s          cn63xx;
-	struct cvmx_uctlx_orto_ctl_s          cn63xxp1;
+	struct cvmx_uctlx_orto_ctl_s cn61xx;
+	struct cvmx_uctlx_orto_ctl_s cn63xx;
+	struct cvmx_uctlx_orto_ctl_s cn63xxp1;
+	struct cvmx_uctlx_orto_ctl_s cn66xx;
+	struct cvmx_uctlx_orto_ctl_s cn68xx;
+	struct cvmx_uctlx_orto_ctl_s cn68xxp1;
+	struct cvmx_uctlx_orto_ctl_s cnf71xx;
 };
 
 union cvmx_uctlx_ppaf_wm {
 	uint64_t u64;
 	struct cvmx_uctlx_ppaf_wm_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_5_63:59;
 		uint64_t wm:5;
+#else
+		uint64_t wm:5;
+		uint64_t reserved_5_63:59;
+#endif
 	} s;
-	struct cvmx_uctlx_ppaf_wm_s           cn63xx;
-	struct cvmx_uctlx_ppaf_wm_s           cn63xxp1;
+	struct cvmx_uctlx_ppaf_wm_s cn61xx;
+	struct cvmx_uctlx_ppaf_wm_s cn63xx;
+	struct cvmx_uctlx_ppaf_wm_s cn63xxp1;
+	struct cvmx_uctlx_ppaf_wm_s cn66xx;
+	struct cvmx_uctlx_ppaf_wm_s cnf71xx;
 };
 
 union cvmx_uctlx_uphy_ctl_status {
 	uint64_t u64;
 	struct cvmx_uctlx_uphy_ctl_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_10_63:54;
 		uint64_t bist_done:1;
 		uint64_t bist_err:1;
@@ -225,14 +393,33 @@ union cvmx_uctlx_uphy_ctl_status {
 		uint64_t uphy_bist:1;
 		uint64_t bist_en:1;
 		uint64_t ate_reset:1;
+#else
+		uint64_t ate_reset:1;
+		uint64_t bist_en:1;
+		uint64_t uphy_bist:1;
+		uint64_t vtest_en:1;
+		uint64_t siddq:1;
+		uint64_t lsbist:1;
+		uint64_t fsbist:1;
+		uint64_t hsbist:1;
+		uint64_t bist_err:1;
+		uint64_t bist_done:1;
+		uint64_t reserved_10_63:54;
+#endif
 	} s;
-	struct cvmx_uctlx_uphy_ctl_status_s   cn63xx;
-	struct cvmx_uctlx_uphy_ctl_status_s   cn63xxp1;
+	struct cvmx_uctlx_uphy_ctl_status_s cn61xx;
+	struct cvmx_uctlx_uphy_ctl_status_s cn63xx;
+	struct cvmx_uctlx_uphy_ctl_status_s cn63xxp1;
+	struct cvmx_uctlx_uphy_ctl_status_s cn66xx;
+	struct cvmx_uctlx_uphy_ctl_status_s cn68xx;
+	struct cvmx_uctlx_uphy_ctl_status_s cn68xxp1;
+	struct cvmx_uctlx_uphy_ctl_status_s cnf71xx;
 };
 
 union cvmx_uctlx_uphy_portx_ctl_status {
 	uint64_t u64;
 	struct cvmx_uctlx_uphy_portx_ctl_status_s {
+#ifdef __BIG_ENDIAN_BITFIELD
 		uint64_t reserved_43_63:21;
 		uint64_t tdata_out:4;
 		uint64_t txbiststuffenh:1;
@@ -253,9 +440,36 @@ union cvmx_uctlx_uphy_portx_ctl_status {
 		uint64_t tdata_sel:1;
 		uint64_t taddr_in:4;
 		uint64_t tdata_in:8;
+#else
+		uint64_t tdata_in:8;
+		uint64_t taddr_in:4;
+		uint64_t tdata_sel:1;
+		uint64_t tclk:1;
+		uint64_t loop_en:1;
+		uint64_t compdistune:3;
+		uint64_t sqrxtune:3;
+		uint64_t txfslstune:4;
+		uint64_t txpreemphasistune:1;
+		uint64_t txrisetune:1;
+		uint64_t txvreftune:4;
+		uint64_t txhsvxtune:2;
+		uint64_t portreset:1;
+		uint64_t vbusvldext:1;
+		uint64_t dppulldown:1;
+		uint64_t dmpulldown:1;
+		uint64_t txbiststuffen:1;
+		uint64_t txbiststuffenh:1;
+		uint64_t tdata_out:4;
+		uint64_t reserved_43_63:21;
+#endif
 	} s;
+	struct cvmx_uctlx_uphy_portx_ctl_status_s cn61xx;
 	struct cvmx_uctlx_uphy_portx_ctl_status_s cn63xx;
 	struct cvmx_uctlx_uphy_portx_ctl_status_s cn63xxp1;
+	struct cvmx_uctlx_uphy_portx_ctl_status_s cn66xx;
+	struct cvmx_uctlx_uphy_portx_ctl_status_s cn68xx;
+	struct cvmx_uctlx_uphy_portx_ctl_status_s cn68xxp1;
+	struct cvmx_uctlx_uphy_portx_ctl_status_s cnf71xx;
 };
 
 #endif
diff --git a/arch/mips/include/asm/octeon/octeon-model.h b/arch/mips/include/asm/octeon/octeon-model.h
index 23b895cb260..14dd11f4492 100644
--- a/arch/mips/include/asm/octeon/octeon-model.h
+++ b/arch/mips/include/asm/octeon/octeon-model.h
@@ -61,6 +61,16 @@
 #define OM_MATCH_5XXX_FAMILY_MODELS     0x20000000
 /* Match all cn6XXX Octeon models. */
 #define OM_MATCH_6XXX_FAMILY_MODELS     0x40000000
+/* Match all cnf7XXX Octeon models. */
+#define OM_MATCH_F7XXX_FAMILY_MODELS    0x80000000
+
+/*
+ * CNF7XXX models with new revision encoding
+ */
+#define OCTEON_CNF71XX_PASS1_0  0x000d9400
+
+#define OCTEON_CNF71XX          (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_REVISION)
+#define OCTEON_CNF71XX_PASS1_X  (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
 
 /*
  * CN6XXX models with new revision encoding
@@ -313,6 +323,14 @@ static inline int __octeon_is_model_runtime__(uint32_t model)
 const char *octeon_model_get_string(uint32_t chip_id);
 const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer);
 
+/*
+ * Return the octeon family, i.e., ProcessorID of the PrID register.
+ */
+static inline uint32_t cvmx_get_octeon_family(void)
+{
+	return cvmx_get_proc_id() & OCTEON_FAMILY_MASK;
+}
+
 #include <asm/octeon/octeon-feature.h>
 
 #endif /* __OCTEON_MODEL_H__ */
diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h
index c4a1b31966b..790939dd824 100644
--- a/arch/mips/include/asm/octeon/octeon.h
+++ b/arch/mips/include/asm/octeon/octeon.h
@@ -52,6 +52,7 @@ extern asmlinkage void octeon_cop2_restore(struct octeon_cop2_state *task);
 
 extern void octeon_init_cvmcount(void);
 extern void octeon_setup_delays(void);
+extern void octeon_io_clk_delay(unsigned long);
 
 #define OCTEON_ARGV_MAX_ARGS	64
 #define OCTOEN_SERIAL_LEN	20
@@ -254,4 +255,7 @@ extern uint64_t octeon_bootloader_entry_addr;
 
 extern void (*octeon_irq_setup_secondary)(void);
 
+typedef void (*octeon_irq_ip4_handler_t)(void);
+void octeon_irq_set_ip4_handler(octeon_irq_ip4_handler_t);
+
 #endif /* __ASM_OCTEON_OCTEON_H */
diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
index 55908fd56b1..c26e1825007 100644
--- a/arch/mips/include/asm/pgtable-64.h
+++ b/arch/mips/include/asm/pgtable-64.h
@@ -162,7 +162,6 @@ typedef struct { unsigned long pmd; } pmd_t;
 
 
 extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
-extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD];
 #endif
 
 /*
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index e9fe7e97ce4..da4ba49adcf 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -79,9 +79,9 @@
 /* implemented in software */
 #define _PAGE_PRESENT_SHIFT	(0)
 #define _PAGE_PRESENT		(1 << _PAGE_PRESENT_SHIFT)
-/* implemented in software, should be unused if kernel_uses_smartmips_rixi. */
-#define _PAGE_READ_SHIFT	(kernel_uses_smartmips_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1)
-#define _PAGE_READ ({if (kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_READ_SHIFT; })
+/* implemented in software, should be unused if cpu_has_rixi. */
+#define _PAGE_READ_SHIFT	(cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1)
+#define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; })
 /* implemented in software */
 #define _PAGE_WRITE_SHIFT	(_PAGE_READ_SHIFT + 1)
 #define _PAGE_WRITE		(1 << _PAGE_WRITE_SHIFT)
@@ -104,12 +104,12 @@
 #endif
 
 /* Page cannot be executed */
-#define _PAGE_NO_EXEC_SHIFT	(kernel_uses_smartmips_rixi ? _PAGE_HUGE_SHIFT + 1 : _PAGE_HUGE_SHIFT)
-#define _PAGE_NO_EXEC		({if (!kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_NO_EXEC_SHIFT; })
+#define _PAGE_NO_EXEC_SHIFT	(cpu_has_rixi ? _PAGE_HUGE_SHIFT + 1 : _PAGE_HUGE_SHIFT)
+#define _PAGE_NO_EXEC		({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_EXEC_SHIFT; })
 
 /* Page cannot be read */
-#define _PAGE_NO_READ_SHIFT	(kernel_uses_smartmips_rixi ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT)
-#define _PAGE_NO_READ		({if (!kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_NO_READ_SHIFT; })
+#define _PAGE_NO_READ_SHIFT	(cpu_has_rixi ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT)
+#define _PAGE_NO_READ		({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_READ_SHIFT; })
 
 #define _PAGE_GLOBAL_SHIFT	(_PAGE_NO_READ_SHIFT + 1)
 #define _PAGE_GLOBAL		(1 << _PAGE_GLOBAL_SHIFT)
@@ -155,7 +155,7 @@
  */
 static inline uint64_t pte_to_entrylo(unsigned long pte_val)
 {
-	if (kernel_uses_smartmips_rixi) {
+	if (cpu_has_rixi) {
 		int sa;
 #ifdef CONFIG_32BIT
 		sa = 31 - _PAGE_NO_READ_SHIFT;
@@ -220,7 +220,7 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
 
 #endif
 
-#define __READABLE	(_PAGE_SILENT_READ | _PAGE_ACCESSED | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ))
+#define __READABLE	(_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_rixi ? 0 : _PAGE_READ))
 #define __WRITEABLE	(_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
 
 #define _PAGE_CHG_MASK  (_PFN_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index b2202a68cf0..c02158be836 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -22,15 +22,15 @@ struct mm_struct;
 struct vm_area_struct;
 
 #define PAGE_NONE	__pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
-#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_WRITE | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \
+#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_WRITE | (cpu_has_rixi ? 0 : _PAGE_READ) | \
 				 _page_cachable_default)
-#define PAGE_COPY	__pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \
-				 (kernel_uses_smartmips_rixi ?  _PAGE_NO_EXEC : 0) | _page_cachable_default)
-#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \
+#define PAGE_COPY	__pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
+				 (cpu_has_rixi ?  _PAGE_NO_EXEC : 0) | _page_cachable_default)
+#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
 				 _page_cachable_default)
 #define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
 				 _PAGE_GLOBAL | _page_cachable_default)
-#define PAGE_USERIO	__pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \
+#define PAGE_USERIO	__pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \
 				 _page_cachable_default)
 #define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
 			__WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
@@ -299,7 +299,7 @@ static inline pte_t pte_mkdirty(pte_t pte)
 static inline pte_t pte_mkyoung(pte_t pte)
 {
 	pte_val(pte) |= _PAGE_ACCESSED;
-	if (kernel_uses_smartmips_rixi) {
+	if (cpu_has_rixi) {
 		if (!(pte_val(pte) & _PAGE_NO_READ))
 			pte_val(pte) |= _PAGE_SILENT_READ;
 	} else {
diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h b/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h
index a80801b094b..016fa9446ba 100644
--- a/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h
@@ -10,6 +10,7 @@
 
 #define cpu_has_mips16		1
 #define cpu_has_dsp		1
+/* #define cpu_has_dsp2		??? - do runtime detection */
 #define cpu_has_mipsmt		1
 #define cpu_has_fpu		0
 
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 4b7f5252d2f..4f5da948a77 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -9,115 +9,12 @@
 #ifndef _ASM_PTRACE_H
 #define _ASM_PTRACE_H
 
-/* 0 - 31 are integer registers, 32 - 63 are fp registers.  */
-#define FPR_BASE	32
-#define PC		64
-#define CAUSE		65
-#define BADVADDR	66
-#define MMHI		67
-#define MMLO		68
-#define FPC_CSR		69
-#define FPC_EIR		70
-#define DSP_BASE	71		/* 3 more hi / lo register pairs */
-#define DSP_CONTROL	77
-#define ACX		78
-
-/*
- * This struct defines the way the registers are stored on the stack during a
- * system call/exception. As usual the registers k0/k1 aren't being saved.
- */
-struct pt_regs {
-#ifdef CONFIG_32BIT
-	/* Pad bytes for argument save space on the stack. */
-	unsigned long pad0[6];
-#endif
-
-	/* Saved main processor registers. */
-	unsigned long regs[32];
-
-	/* Saved special registers. */
-	unsigned long cp0_status;
-	unsigned long hi;
-	unsigned long lo;
-#ifdef CONFIG_CPU_HAS_SMARTMIPS
-	unsigned long acx;
-#endif
-	unsigned long cp0_badvaddr;
-	unsigned long cp0_cause;
-	unsigned long cp0_epc;
-#ifdef CONFIG_MIPS_MT_SMTC
-	unsigned long cp0_tcstatus;
-#endif /* CONFIG_MIPS_MT_SMTC */
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
-	unsigned long long mpl[3];        /* MTM{0,1,2} */
-	unsigned long long mtp[3];        /* MTP{0,1,2} */
-#endif
-} __attribute__ ((aligned (8)));
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS		12
-#define PTRACE_SETREGS		13
-#define PTRACE_GETFPREGS		14
-#define PTRACE_SETFPREGS		15
-/* #define PTRACE_GETFPXREGS		18 */
-/* #define PTRACE_SETFPXREGS		19 */
-
-#define PTRACE_OLDSETOPTIONS	21
-
-#define PTRACE_GET_THREAD_AREA	25
-#define PTRACE_SET_THREAD_AREA	26
-
-/* Calls to trace a 64bit program from a 32bit program.  */
-#define PTRACE_PEEKTEXT_3264	0xc0
-#define PTRACE_PEEKDATA_3264	0xc1
-#define PTRACE_POKETEXT_3264	0xc2
-#define PTRACE_POKEDATA_3264	0xc3
-#define PTRACE_GET_THREAD_AREA_3264	0xc4
-
-/* Read and write watchpoint registers.  */
-enum pt_watch_style {
-	pt_watch_style_mips32,
-	pt_watch_style_mips64
-};
-struct mips32_watch_regs {
-	unsigned int watchlo[8];
-	/* Lower 16 bits of watchhi. */
-	unsigned short watchhi[8];
-	/* Valid mask and I R W bits.
-	 * bit 0 -- 1 if W bit is usable.
-	 * bit 1 -- 1 if R bit is usable.
-	 * bit 2 -- 1 if I bit is usable.
-	 * bits 3 - 11 -- Valid watchhi mask bits.
-	 */
-	unsigned short watch_masks[8];
-	/* The number of valid watch register pairs.  */
-	unsigned int num_valid;
-} __attribute__((aligned(8)));
-
-struct mips64_watch_regs {
-	unsigned long long watchlo[8];
-	unsigned short watchhi[8];
-	unsigned short watch_masks[8];
-	unsigned int num_valid;
-} __attribute__((aligned(8)));
-
-struct pt_watch_regs {
-	enum pt_watch_style style;
-	union {
-		struct mips32_watch_regs mips32;
-		struct mips64_watch_regs mips64;
-	};
-};
-
-#define PTRACE_GET_WATCH_REGS	0xd0
-#define PTRACE_SET_WATCH_REGS	0xd1
-
-#ifdef __KERNEL__
 
 #include <linux/compiler.h>
 #include <linux/linkage.h>
 #include <linux/types.h>
 #include <asm/isadep.h>
+#include <uapi/asm/ptrace.h>
 
 struct task_struct;
 
@@ -164,6 +61,4 @@ static inline void die_if_kernel(const char *str, struct pt_regs *regs)
 		die(str, regs);
 }
 
-#endif
-
 #endif /* _ASM_PTRACE_H */
diff --git a/arch/mips/include/asm/setup.h b/arch/mips/include/asm/setup.h
index 2560b6b6a7d..e26589ef36e 100644
--- a/arch/mips/include/asm/setup.h
+++ b/arch/mips/include/asm/setup.h
@@ -1,9 +1,8 @@
 #ifndef _MIPS_SETUP_H
 #define _MIPS_SETUP_H
 
-#define COMMAND_LINE_SIZE	4096
+#include <uapi/asm/setup.h>
 
-#ifdef  __KERNEL__
 extern void setup_early_printk(void);
 
 extern void set_handler(unsigned long offset, void *addr, unsigned long len);
@@ -17,6 +16,4 @@ extern unsigned long ebase;
 extern void per_cpu_trap_init(bool);
 extern void cpu_cache_init(void);
 
-#endif /* __KERNEL__ */
-
 #endif /* __SETUP_H */
diff --git a/arch/mips/include/asm/sigcontext.h b/arch/mips/include/asm/sigcontext.h
index 9e89cf99d4e..eeeb0f48c76 100644
--- a/arch/mips/include/asm/sigcontext.h
+++ b/arch/mips/include/asm/sigcontext.h
@@ -9,71 +9,10 @@
 #ifndef _ASM_SIGCONTEXT_H
 #define _ASM_SIGCONTEXT_H
 
-#include <linux/types.h>
-#include <asm/sgidefs.h>
-
-#if _MIPS_SIM == _MIPS_SIM_ABI32
-
-/*
- * Keep this struct definition in sync with the sigcontext fragment
- * in arch/mips/tools/offset.c
- */
-struct sigcontext {
-	unsigned int		sc_regmask;	/* Unused */
-	unsigned int		sc_status;	/* Unused */
-	unsigned long long	sc_pc;
-	unsigned long long	sc_regs[32];
-	unsigned long long	sc_fpregs[32];
-	unsigned int		sc_acx;		/* Was sc_ownedfp */
-	unsigned int		sc_fpc_csr;
-	unsigned int		sc_fpc_eir;	/* Unused */
-	unsigned int		sc_used_math;
-	unsigned int		sc_dsp;		/* dsp status, was sc_ssflags */
-	unsigned long long	sc_mdhi;
-	unsigned long long	sc_mdlo;
-	unsigned long		sc_hi1;		/* Was sc_cause */
-	unsigned long		sc_lo1;		/* Was sc_badvaddr */
-	unsigned long		sc_hi2;		/* Was sc_sigset[4] */
-	unsigned long		sc_lo2;
-	unsigned long		sc_hi3;
-	unsigned long		sc_lo3;
-};
-
-#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+#include <uapi/asm/sigcontext.h>
 
 #if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
 
-#include <linux/posix_types.h>
-/*
- * Keep this struct definition in sync with the sigcontext fragment
- * in arch/mips/tools/offset.c
- *
- * Warning: this structure illdefined with sc_badvaddr being just an unsigned
- * int so it was changed to unsigned long in 2.6.0-test1.  This may break
- * binary compatibility - no prisoners.
- * DSP ASE in 2.6.12-rc4.  Turn sc_mdhi and sc_mdlo into an array of four
- * entries, add sc_dsp and sc_reserved for padding.  No prisoners.
- */
-struct sigcontext {
-	__u64	sc_regs[32];
-	__u64	sc_fpregs[32];
-	__u64	sc_mdhi;
-	__u64	sc_hi1;
-	__u64	sc_hi2;
-	__u64	sc_hi3;
-	__u64	sc_mdlo;
-	__u64	sc_lo1;
-	__u64	sc_lo2;
-	__u64	sc_lo3;
-	__u64	sc_pc;
-	__u32	sc_fpc_csr;
-	__u32	sc_used_math;
-	__u32	sc_dsp;
-	__u32	sc_reserved;
-};
-
-#ifdef __KERNEL__
-
 struct sigcontext32 {
 	__u32		sc_regmask;	/* Unused */
 	__u32		sc_status;	/* Unused */
@@ -94,8 +33,5 @@ struct sigcontext32 {
 	__u32		sc_hi3;
 	__u32		sc_lo3;
 };
-#endif /* __KERNEL__ */
-
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
-
 #endif /* _ASM_SIGCONTEXT_H */
diff --git a/arch/mips/include/asm/siginfo.h b/arch/mips/include/asm/siginfo.h
index 20ebeb875ee..dd9a762646f 100644
--- a/arch/mips/include/asm/siginfo.h
+++ b/arch/mips/include/asm/siginfo.h
@@ -9,108 +9,8 @@
 #ifndef _ASM_SIGINFO_H
 #define _ASM_SIGINFO_H
 
+#include <uapi/asm/siginfo.h>
 
-#define __ARCH_SIGEV_PREAMBLE_SIZE (sizeof(long) + 2*sizeof(int))
-#undef __ARCH_SI_TRAPNO	/* exception code needs to fill this ...  */
-
-#define HAVE_ARCH_SIGINFO_T
-
-/*
- * We duplicate the generic versions - <asm-generic/siginfo.h> is just borked
- * by design ...
- */
-#define HAVE_ARCH_COPY_SIGINFO
-struct siginfo;
-
-/*
- * Careful to keep union _sifields from shifting ...
- */
-#ifdef CONFIG_32BIT
-#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int))
-#endif
-#ifdef CONFIG_64BIT
-#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
-#endif
-
-#include <asm-generic/siginfo.h>
-
-typedef struct siginfo {
-	int si_signo;
-	int si_code;
-	int si_errno;
-	int __pad0[SI_MAX_SIZE / sizeof(int) - SI_PAD_SIZE - 3];
-
-	union {
-		int _pad[SI_PAD_SIZE];
-
-		/* kill() */
-		struct {
-			pid_t _pid;		/* sender's pid */
-			__ARCH_SI_UID_T _uid;	/* sender's uid */
-		} _kill;
-
-		/* POSIX.1b timers */
-		struct {
-			timer_t _tid;		/* timer id */
-			int _overrun;		/* overrun count */
-			char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
-			sigval_t _sigval;	/* same as below */
-			int _sys_private;       /* not to be passed to user */
-		} _timer;
-
-		/* POSIX.1b signals */
-		struct {
-			pid_t _pid;		/* sender's pid */
-			__ARCH_SI_UID_T _uid;	/* sender's uid */
-			sigval_t _sigval;
-		} _rt;
-
-		/* SIGCHLD */
-		struct {
-			pid_t _pid;		/* which child */
-			__ARCH_SI_UID_T _uid;	/* sender's uid */
-			int _status;		/* exit code */
-			clock_t _utime;
-			clock_t _stime;
-		} _sigchld;
-
-		/* IRIX SIGCHLD */
-		struct {
-			pid_t _pid;		/* which child */
-			clock_t _utime;
-			int _status;		/* exit code */
-			clock_t _stime;
-		} _irix_sigchld;
-
-		/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
-		struct {
-			void __user *_addr; /* faulting insn/memory ref. */
-#ifdef __ARCH_SI_TRAPNO
-			int _trapno;	/* TRAP # which caused the signal */
-#endif
-			short _addr_lsb;
-		} _sigfault;
-
-		/* SIGPOLL, SIGXFSZ (To do ...)  */
-		struct {
-			__ARCH_SI_BAND_T _band;	/* POLL_IN, POLL_OUT, POLL_MSG */
-			int _fd;
-		} _sigpoll;
-	} _sifields;
-} siginfo_t;
-
-/*
- * si_code values
- * Again these have been chosen to be IRIX compatible.
- */
-#undef SI_ASYNCIO
-#undef SI_TIMER
-#undef SI_MESGQ
-#define SI_ASYNCIO	-2	/* sent by AIO completion */
-#define SI_TIMER __SI_CODE(__SI_TIMER, -3) /* sent by timer expiration */
-#define SI_MESGQ __SI_CODE(__SI_MESGQ, -4) /* sent by real time mesq state change */
-
-#ifdef __KERNEL__
 
 /*
  * Duplicated here because of <asm-generic/siginfo.h> braindamage ...
@@ -126,6 +26,4 @@ static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
 		memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld));
 }
 
-#endif
-
 #endif /* _ASM_SIGINFO_H */
diff --git a/arch/mips/include/asm/signal.h b/arch/mips/include/asm/signal.h
index c783f364938..880240dff8b 100644
--- a/arch/mips/include/asm/signal.h
+++ b/arch/mips/include/asm/signal.h
@@ -9,93 +9,8 @@
 #ifndef _ASM_SIGNAL_H
 #define _ASM_SIGNAL_H
 
-#include <linux/types.h>
+#include <uapi/asm/signal.h>
 
-#define _NSIG		128
-#define _NSIG_BPW	(sizeof(unsigned long) * 8)
-#define _NSIG_WORDS	(_NSIG / _NSIG_BPW)
-
-typedef struct {
-	unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-typedef unsigned long old_sigset_t;		/* at least 32 bits */
-
-#define SIGHUP		 1	/* Hangup (POSIX).  */
-#define SIGINT		 2	/* Interrupt (ANSI).  */
-#define SIGQUIT		 3	/* Quit (POSIX).  */
-#define SIGILL		 4	/* Illegal instruction (ANSI).  */
-#define SIGTRAP		 5	/* Trace trap (POSIX).  */
-#define SIGIOT		 6	/* IOT trap (4.2 BSD).  */
-#define SIGABRT		 SIGIOT	/* Abort (ANSI).  */
-#define SIGEMT		 7
-#define SIGFPE		 8	/* Floating-point exception (ANSI).  */
-#define SIGKILL		 9	/* Kill, unblockable (POSIX).  */
-#define SIGBUS		10	/* BUS error (4.2 BSD).  */
-#define SIGSEGV		11	/* Segmentation violation (ANSI).  */
-#define SIGSYS		12
-#define SIGPIPE		13	/* Broken pipe (POSIX).  */
-#define SIGALRM		14	/* Alarm clock (POSIX).  */
-#define SIGTERM		15	/* Termination (ANSI).  */
-#define SIGUSR1		16	/* User-defined signal 1 (POSIX).  */
-#define SIGUSR2		17	/* User-defined signal 2 (POSIX).  */
-#define SIGCHLD		18	/* Child status has changed (POSIX).  */
-#define SIGCLD		SIGCHLD	/* Same as SIGCHLD (System V).  */
-#define SIGPWR		19	/* Power failure restart (System V).  */
-#define SIGWINCH	20	/* Window size change (4.3 BSD, Sun).  */
-#define SIGURG		21	/* Urgent condition on socket (4.2 BSD).  */
-#define SIGIO		22	/* I/O now possible (4.2 BSD).  */
-#define SIGPOLL		SIGIO	/* Pollable event occurred (System V).  */
-#define SIGSTOP		23	/* Stop, unblockable (POSIX).  */
-#define SIGTSTP		24	/* Keyboard stop (POSIX).  */
-#define SIGCONT		25	/* Continue (POSIX).  */
-#define SIGTTIN		26	/* Background read from tty (POSIX).  */
-#define SIGTTOU		27	/* Background write to tty (POSIX).  */
-#define SIGVTALRM	28	/* Virtual alarm clock (4.2 BSD).  */
-#define SIGPROF		29	/* Profiling alarm clock (4.2 BSD).  */
-#define SIGXCPU		30	/* CPU limit exceeded (4.2 BSD).  */
-#define SIGXFSZ		31	/* File size limit exceeded (4.2 BSD).  */
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN	32
-#define SIGRTMAX	_NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_ONSTACK	0x08000000
-#define SA_RESETHAND	0x80000000
-#define SA_RESTART	0x10000000
-#define SA_SIGINFO	0x00000008
-#define SA_NODEFER	0x40000000
-#define SA_NOCLDWAIT	0x00010000
-#define SA_NOCLDSTOP	0x00000001
-
-#define SA_NOMASK	SA_NODEFER
-#define SA_ONESHOT	SA_RESETHAND
-
-#define SA_RESTORER	0x04000000	/* Only for o32 */
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK     1
-#define SS_DISABLE     2
-
-#define MINSIGSTKSZ    2048
-#define SIGSTKSZ       8192
-
-#ifdef __KERNEL__
 
 #ifdef CONFIG_TRAD_SIGNALS
 #define sig_uses_siginfo(ka)	((ka)->sa.sa_flags & SA_SIGINFO)
@@ -103,37 +18,9 @@ typedef unsigned long old_sigset_t;		/* at least 32 bits */
 #define sig_uses_siginfo(ka)	(1)
 #endif
 
-#endif /* __KERNEL__ */
-
-#define SIG_BLOCK	1	/* for blocking signals */
-#define SIG_UNBLOCK	2	/* for unblocking signals */
-#define SIG_SETMASK	3	/* for setting the signal mask */
-
-#include <asm-generic/signal-defs.h>
-
-struct sigaction {
-	unsigned int	sa_flags;
-	__sighandler_t	sa_handler;
-	sigset_t	sa_mask;
-};
-
-struct k_sigaction {
-	struct sigaction sa;
-};
-
-/* IRIX compatible stack_t  */
-typedef struct sigaltstack {
-	void __user *ss_sp;
-	size_t ss_size;
-	int ss_flags;
-} stack_t;
-
-#ifdef __KERNEL__
 #include <asm/sigcontext.h>
 #include <asm/siginfo.h>
 
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_SIGNAL_H */
diff --git a/arch/mips/include/asm/socket.h b/arch/mips/include/asm/socket.h
index a2ed6fdad4e..4724a563c5b 100644
--- a/arch/mips/include/asm/socket.h
+++ b/arch/mips/include/asm/socket.h
@@ -9,87 +9,8 @@
 #ifndef _ASM_SOCKET_H
 #define _ASM_SOCKET_H
 
-#include <asm/sockios.h>
+#include <uapi/asm/socket.h>
 
-/*
- * For setsockopt(2)
- *
- * This defines are ABI conformant as far as Linux supports these ...
- */
-#define SOL_SOCKET	0xffff
-
-#define SO_DEBUG	0x0001	/* Record debugging information.  */
-#define SO_REUSEADDR	0x0004	/* Allow reuse of local addresses.  */
-#define SO_KEEPALIVE	0x0008	/* Keep connections alive and send
-				   SIGPIPE when they die.  */
-#define SO_DONTROUTE	0x0010	/* Don't do local routing.  */
-#define SO_BROADCAST	0x0020	/* Allow transmission of
-				   broadcast messages.  */
-#define SO_LINGER	0x0080	/* Block on close of a reliable
-				   socket to transmit pending data.  */
-#define SO_OOBINLINE 0x0100	/* Receive out-of-band data in-band.  */
-#if 0
-To add: #define SO_REUSEPORT 0x0200	/* Allow local address and port reuse.  */
-#endif
-
-#define SO_TYPE		0x1008	/* Compatible name for SO_STYLE.  */
-#define SO_STYLE	SO_TYPE	/* Synonym */
-#define SO_ERROR	0x1007	/* get error status and clear */
-#define SO_SNDBUF	0x1001	/* Send buffer size. */
-#define SO_RCVBUF	0x1002	/* Receive buffer. */
-#define SO_SNDLOWAT	0x1003	/* send low-water mark */
-#define SO_RCVLOWAT	0x1004	/* receive low-water mark */
-#define SO_SNDTIMEO	0x1005	/* send timeout */
-#define SO_RCVTIMEO 	0x1006	/* receive timeout */
-#define SO_ACCEPTCONN	0x1009
-#define SO_PROTOCOL	0x1028	/* protocol type */
-#define SO_DOMAIN	0x1029	/* domain/socket family */
-
-/* linux-specific, might as well be the same as on i386 */
-#define SO_NO_CHECK	11
-#define SO_PRIORITY	12
-#define SO_BSDCOMPAT	14
-
-#define SO_PASSCRED	17
-#define SO_PEERCRED	18
-
-/* Security levels - as per NRL IPv6 - don't actually do anything */
-#define SO_SECURITY_AUTHENTICATION		22
-#define SO_SECURITY_ENCRYPTION_TRANSPORT	23
-#define SO_SECURITY_ENCRYPTION_NETWORK		24
-
-#define SO_BINDTODEVICE		25
-
-/* Socket filtering */
-#define SO_ATTACH_FILTER        26
-#define SO_DETACH_FILTER        27
-
-#define SO_PEERNAME             28
-#define SO_TIMESTAMP		29
-#define SCM_TIMESTAMP		SO_TIMESTAMP
-
-#define SO_PEERSEC		30
-#define SO_SNDBUFFORCE		31
-#define SO_RCVBUFFORCE		33
-#define SO_PASSSEC		34
-#define SO_TIMESTAMPNS		35
-#define SCM_TIMESTAMPNS		SO_TIMESTAMPNS
-
-#define SO_MARK			36
-
-#define SO_TIMESTAMPING		37
-#define SCM_TIMESTAMPING	SO_TIMESTAMPING
-
-#define SO_RXQ_OVFL             40
-
-#define SO_WIFI_STATUS		41
-#define SCM_WIFI_STATUS		SO_WIFI_STATUS
-#define SO_PEEK_OFF		42
-
-/* Instruct lower device to use last 4-bytes of skb data as FCS */
-#define SO_NOFCS		43
-
-#ifdef __KERNEL__
 
 /** sock_type - Socket types
  *
@@ -126,6 +47,4 @@ enum sock_type {
 
 #define ARCH_HAS_SOCKET_TYPES 1
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/mips/include/asm/termios.h b/arch/mips/include/asm/termios.h
index abdd87aaf60..6245b68a69a 100644
--- a/arch/mips/include/asm/termios.h
+++ b/arch/mips/include/asm/termios.h
@@ -9,58 +9,8 @@
 #ifndef _ASM_TERMIOS_H
 #define _ASM_TERMIOS_H
 
-#include <linux/errno.h>
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
-
-struct sgttyb {
-	char	sg_ispeed;
-	char	sg_ospeed;
-	char	sg_erase;
-	char	sg_kill;
-	int	sg_flags;	/* SGI special - int, not short */
-};
-
-struct tchars {
-	char	t_intrc;
-	char	t_quitc;
-	char	t_startc;
-	char	t_stopc;
-	char	t_eofc;
-	char	t_brkc;
-};
-
-struct ltchars {
-        char    t_suspc;        /* stop process signal */
-        char    t_dsuspc;       /* delayed stop process signal */
-        char    t_rprntc;       /* reprint line */
-        char    t_flushc;       /* flush output (toggles) */
-        char    t_werasc;       /* word erase */
-        char    t_lnextc;       /* literal next character */
-};
-
-/* TIOCGSIZE, TIOCSSIZE not defined yet.  Only needed for SunOS source
-   compatibility anyway ... */
-
-struct winsize {
-	unsigned short ws_row;
-	unsigned short ws_col;
-	unsigned short ws_xpixel;
-	unsigned short ws_ypixel;
-};
-
-#define NCC	8
-struct termio {
-	unsigned short c_iflag;		/* input mode flags */
-	unsigned short c_oflag;		/* output mode flags */
-	unsigned short c_cflag;		/* control mode flags */
-	unsigned short c_lflag;		/* local mode flags */
-	char c_line;			/* line discipline */
-	unsigned char c_cc[NCCS];	/* control characters */
-};
-
-#ifdef __KERNEL__
 #include <asm/uaccess.h>
+#include <uapi/asm/termios.h>
 
 /*
  *	intr=^C		quit=^\		erase=del	kill=^U
@@ -70,25 +20,6 @@ struct termio {
  *	eof=^D		eol=\0
  */
 #define INIT_C_CC "\003\034\177\025\1\0\0\0\021\023\032\0\022\017\027\026\004\0"
-#endif
-
-/* modem lines */
-#define TIOCM_LE	0x001		/* line enable */
-#define TIOCM_DTR	0x002		/* data terminal ready */
-#define TIOCM_RTS	0x004		/* request to send */
-#define TIOCM_ST	0x010		/* secondary transmit */
-#define TIOCM_SR	0x020		/* secondary receive */
-#define TIOCM_CTS	0x040		/* clear to send */
-#define TIOCM_CAR	0x100		/* carrier detect */
-#define TIOCM_CD	TIOCM_CAR
-#define TIOCM_RNG	0x200		/* ring */
-#define TIOCM_RI	TIOCM_RNG
-#define TIOCM_DSR	0x400		/* data set ready */
-#define TIOCM_OUT1	0x2000
-#define TIOCM_OUT2	0x4000
-#define TIOCM_LOOP	0x8000
-
-#ifdef __KERNEL__
 
 #include <linux/string.h>
 
@@ -171,6 +102,4 @@ static inline int kernel_termios_to_user_termios_1(struct termios __user *u,
 	return copy_to_user(u, k, sizeof(struct termios)) ? -EFAULT : 0;
 }
 
-#endif /* defined(__KERNEL__) */
-
 #endif /* _ASM_TERMIOS_H */
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index ca97e0ecb64..8debe9e9175 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -103,7 +103,6 @@ register struct thread_info *__current_thread_info __asm__("$28");
 #define TIF_NOTIFY_RESUME	5	/* callback before returning to user */
 #define TIF_RESTORE_SIGMASK	9	/* restore signal mask in do_signal() */
 #define TIF_USEDFPU		16	/* FPU was used by this task this quantum (SMP) */
-#define TIF_POLLING_NRFLAG	17	/* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE		18	/* is terminating due to OOM killer */
 #define TIF_FIXADE		20	/* Fix address errors in software */
 #define TIF_LOGADE		21	/* Log address errors to syslog */
@@ -125,9 +124,7 @@ register struct thread_info *__current_thread_info __asm__("$28");
 #define _TIF_SYSCALL_AUDIT	(1<<TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP		(1<<TIF_SECCOMP)
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
 #define _TIF_USEDFPU		(1<<TIF_USEDFPU)
-#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
 #define _TIF_FIXADE		(1<<TIF_FIXADE)
 #define _TIF_LOGADE		(1<<TIF_LOGADE)
 #define _TIF_32BIT_REGS		(1<<TIF_32BIT_REGS)
@@ -139,10 +136,10 @@ register struct thread_info *__current_thread_info __asm__("$28");
 #define _TIF_WORK_SYSCALL_EXIT	(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
 
 /* work to do on interrupt/exception return */
-#define _TIF_WORK_MASK		(0x0000ffef &				\
-					~(_TIF_SECCOMP | _TIF_SYSCALL_AUDIT))
+#define _TIF_WORK_MASK		\
+	(_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME)
 /* work to do on any return to u-space */
-#define _TIF_ALLWORK_MASK	(0x8000ffff & ~_TIF_SECCOMP)
+#define _TIF_ALLWORK_MASK	(_TIF_WORK_MASK | _TIF_WORK_SYSCALL_EXIT)
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/mips/include/asm/types.h b/arch/mips/include/asm/types.h
index 1228b25b290..a845aafedee 100644
--- a/arch/mips/include/asm/types.h
+++ b/arch/mips/include/asm/types.h
@@ -11,24 +11,12 @@
 #ifndef _ASM_TYPES_H
 #define _ASM_TYPES_H
 
-/*
- * We don't use int-l64.h for the kernel anymore but still use it for
- * userspace to avoid code changes.
- */
-#ifdef __KERNEL__
 # include <asm-generic/int-ll64.h>
-#else
-# if _MIPS_SZLONG == 64
-#  include <asm-generic/int-l64.h>
-# else
-#  include <asm-generic/int-ll64.h>
-# endif
-#endif
+#include <uapi/asm/types.h>
 
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
-#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 
 /*
@@ -42,6 +30,4 @@ typedef unsigned long phys_t;
 
 #endif /* __ASSEMBLY__ */
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_TYPES_H */
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index 3d9f75f7ffc..7e0bf17c932 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -90,6 +90,8 @@ Ip_u2u1u3(_dsrl);
 Ip_u2u1u3(_dsrl32);
 Ip_u3u1u2(_dsubu);
 Ip_0(_eret);
+Ip_u2u1msbu3(_ext);
+Ip_u2u1msbu3(_ins);
 Ip_u1(_j);
 Ip_u1(_jal);
 Ip_u1(_jr);
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h
index bebbde01be9..9e47cc11aa2 100644
--- a/arch/mips/include/asm/unistd.h
+++ b/arch/mips/include/asm/unistd.h
@@ -12,1024 +12,8 @@
 #ifndef _ASM_UNISTD_H
 #define _ASM_UNISTD_H
 
-#include <asm/sgidefs.h>
+#include <uapi/asm/unistd.h>
 
-#if _MIPS_SIM == _MIPS_SIM_ABI32
-
-/*
- * Linux o32 style syscalls are in the range from 4000 to 4999.
- */
-#define __NR_Linux			4000
-#define __NR_syscall			(__NR_Linux +   0)
-#define __NR_exit			(__NR_Linux +   1)
-#define __NR_fork			(__NR_Linux +   2)
-#define __NR_read			(__NR_Linux +   3)
-#define __NR_write			(__NR_Linux +   4)
-#define __NR_open			(__NR_Linux +   5)
-#define __NR_close			(__NR_Linux +   6)
-#define __NR_waitpid			(__NR_Linux +   7)
-#define __NR_creat			(__NR_Linux +   8)
-#define __NR_link			(__NR_Linux +   9)
-#define __NR_unlink			(__NR_Linux +  10)
-#define __NR_execve			(__NR_Linux +  11)
-#define __NR_chdir			(__NR_Linux +  12)
-#define __NR_time			(__NR_Linux +  13)
-#define __NR_mknod			(__NR_Linux +  14)
-#define __NR_chmod			(__NR_Linux +  15)
-#define __NR_lchown			(__NR_Linux +  16)
-#define __NR_break			(__NR_Linux +  17)
-#define __NR_unused18			(__NR_Linux +  18)
-#define __NR_lseek			(__NR_Linux +  19)
-#define __NR_getpid			(__NR_Linux +  20)
-#define __NR_mount			(__NR_Linux +  21)
-#define __NR_umount			(__NR_Linux +  22)
-#define __NR_setuid			(__NR_Linux +  23)
-#define __NR_getuid			(__NR_Linux +  24)
-#define __NR_stime			(__NR_Linux +  25)
-#define __NR_ptrace			(__NR_Linux +  26)
-#define __NR_alarm			(__NR_Linux +  27)
-#define __NR_unused28			(__NR_Linux +  28)
-#define __NR_pause			(__NR_Linux +  29)
-#define __NR_utime			(__NR_Linux +  30)
-#define __NR_stty			(__NR_Linux +  31)
-#define __NR_gtty			(__NR_Linux +  32)
-#define __NR_access			(__NR_Linux +  33)
-#define __NR_nice			(__NR_Linux +  34)
-#define __NR_ftime			(__NR_Linux +  35)
-#define __NR_sync			(__NR_Linux +  36)
-#define __NR_kill			(__NR_Linux +  37)
-#define __NR_rename			(__NR_Linux +  38)
-#define __NR_mkdir			(__NR_Linux +  39)
-#define __NR_rmdir			(__NR_Linux +  40)
-#define __NR_dup			(__NR_Linux +  41)
-#define __NR_pipe			(__NR_Linux +  42)
-#define __NR_times			(__NR_Linux +  43)
-#define __NR_prof			(__NR_Linux +  44)
-#define __NR_brk			(__NR_Linux +  45)
-#define __NR_setgid			(__NR_Linux +  46)
-#define __NR_getgid			(__NR_Linux +  47)
-#define __NR_signal			(__NR_Linux +  48)
-#define __NR_geteuid			(__NR_Linux +  49)
-#define __NR_getegid			(__NR_Linux +  50)
-#define __NR_acct			(__NR_Linux +  51)
-#define __NR_umount2			(__NR_Linux +  52)
-#define __NR_lock			(__NR_Linux +  53)
-#define __NR_ioctl			(__NR_Linux +  54)
-#define __NR_fcntl			(__NR_Linux +  55)
-#define __NR_mpx			(__NR_Linux +  56)
-#define __NR_setpgid			(__NR_Linux +  57)
-#define __NR_ulimit			(__NR_Linux +  58)
-#define __NR_unused59			(__NR_Linux +  59)
-#define __NR_umask			(__NR_Linux +  60)
-#define __NR_chroot			(__NR_Linux +  61)
-#define __NR_ustat			(__NR_Linux +  62)
-#define __NR_dup2			(__NR_Linux +  63)
-#define __NR_getppid			(__NR_Linux +  64)
-#define __NR_getpgrp			(__NR_Linux +  65)
-#define __NR_setsid			(__NR_Linux +  66)
-#define __NR_sigaction			(__NR_Linux +  67)
-#define __NR_sgetmask			(__NR_Linux +  68)
-#define __NR_ssetmask			(__NR_Linux +  69)
-#define __NR_setreuid			(__NR_Linux +  70)
-#define __NR_setregid			(__NR_Linux +  71)
-#define __NR_sigsuspend			(__NR_Linux +  72)
-#define __NR_sigpending			(__NR_Linux +  73)
-#define __NR_sethostname		(__NR_Linux +  74)
-#define __NR_setrlimit			(__NR_Linux +  75)
-#define __NR_getrlimit			(__NR_Linux +  76)
-#define __NR_getrusage			(__NR_Linux +  77)
-#define __NR_gettimeofday		(__NR_Linux +  78)
-#define __NR_settimeofday		(__NR_Linux +  79)
-#define __NR_getgroups			(__NR_Linux +  80)
-#define __NR_setgroups			(__NR_Linux +  81)
-#define __NR_reserved82			(__NR_Linux +  82)
-#define __NR_symlink			(__NR_Linux +  83)
-#define __NR_unused84			(__NR_Linux +  84)
-#define __NR_readlink			(__NR_Linux +  85)
-#define __NR_uselib			(__NR_Linux +  86)
-#define __NR_swapon			(__NR_Linux +  87)
-#define __NR_reboot			(__NR_Linux +  88)
-#define __NR_readdir			(__NR_Linux +  89)
-#define __NR_mmap			(__NR_Linux +  90)
-#define __NR_munmap			(__NR_Linux +  91)
-#define __NR_truncate			(__NR_Linux +  92)
-#define __NR_ftruncate			(__NR_Linux +  93)
-#define __NR_fchmod			(__NR_Linux +  94)
-#define __NR_fchown			(__NR_Linux +  95)
-#define __NR_getpriority		(__NR_Linux +  96)
-#define __NR_setpriority		(__NR_Linux +  97)
-#define __NR_profil			(__NR_Linux +  98)
-#define __NR_statfs			(__NR_Linux +  99)
-#define __NR_fstatfs			(__NR_Linux + 100)
-#define __NR_ioperm			(__NR_Linux + 101)
-#define __NR_socketcall			(__NR_Linux + 102)
-#define __NR_syslog			(__NR_Linux + 103)
-#define __NR_setitimer			(__NR_Linux + 104)
-#define __NR_getitimer			(__NR_Linux + 105)
-#define __NR_stat			(__NR_Linux + 106)
-#define __NR_lstat			(__NR_Linux + 107)
-#define __NR_fstat			(__NR_Linux + 108)
-#define __NR_unused109			(__NR_Linux + 109)
-#define __NR_iopl			(__NR_Linux + 110)
-#define __NR_vhangup			(__NR_Linux + 111)
-#define __NR_idle			(__NR_Linux + 112)
-#define __NR_vm86			(__NR_Linux + 113)
-#define __NR_wait4			(__NR_Linux + 114)
-#define __NR_swapoff			(__NR_Linux + 115)
-#define __NR_sysinfo			(__NR_Linux + 116)
-#define __NR_ipc			(__NR_Linux + 117)
-#define __NR_fsync			(__NR_Linux + 118)
-#define __NR_sigreturn			(__NR_Linux + 119)
-#define __NR_clone			(__NR_Linux + 120)
-#define __NR_setdomainname		(__NR_Linux + 121)
-#define __NR_uname			(__NR_Linux + 122)
-#define __NR_modify_ldt			(__NR_Linux + 123)
-#define __NR_adjtimex			(__NR_Linux + 124)
-#define __NR_mprotect			(__NR_Linux + 125)
-#define __NR_sigprocmask		(__NR_Linux + 126)
-#define __NR_create_module		(__NR_Linux + 127)
-#define __NR_init_module		(__NR_Linux + 128)
-#define __NR_delete_module		(__NR_Linux + 129)
-#define __NR_get_kernel_syms		(__NR_Linux + 130)
-#define __NR_quotactl			(__NR_Linux + 131)
-#define __NR_getpgid			(__NR_Linux + 132)
-#define __NR_fchdir			(__NR_Linux + 133)
-#define __NR_bdflush			(__NR_Linux + 134)
-#define __NR_sysfs			(__NR_Linux + 135)
-#define __NR_personality		(__NR_Linux + 136)
-#define __NR_afs_syscall		(__NR_Linux + 137) /* Syscall for Andrew File System */
-#define __NR_setfsuid			(__NR_Linux + 138)
-#define __NR_setfsgid			(__NR_Linux + 139)
-#define __NR__llseek			(__NR_Linux + 140)
-#define __NR_getdents			(__NR_Linux + 141)
-#define __NR__newselect			(__NR_Linux + 142)
-#define __NR_flock			(__NR_Linux + 143)
-#define __NR_msync			(__NR_Linux + 144)
-#define __NR_readv			(__NR_Linux + 145)
-#define __NR_writev			(__NR_Linux + 146)
-#define __NR_cacheflush			(__NR_Linux + 147)
-#define __NR_cachectl			(__NR_Linux + 148)
-#define __NR_sysmips			(__NR_Linux + 149)
-#define __NR_unused150			(__NR_Linux + 150)
-#define __NR_getsid			(__NR_Linux + 151)
-#define __NR_fdatasync			(__NR_Linux + 152)
-#define __NR__sysctl			(__NR_Linux + 153)
-#define __NR_mlock			(__NR_Linux + 154)
-#define __NR_munlock			(__NR_Linux + 155)
-#define __NR_mlockall			(__NR_Linux + 156)
-#define __NR_munlockall			(__NR_Linux + 157)
-#define __NR_sched_setparam		(__NR_Linux + 158)
-#define __NR_sched_getparam		(__NR_Linux + 159)
-#define __NR_sched_setscheduler		(__NR_Linux + 160)
-#define __NR_sched_getscheduler		(__NR_Linux + 161)
-#define __NR_sched_yield		(__NR_Linux + 162)
-#define __NR_sched_get_priority_max	(__NR_Linux + 163)
-#define __NR_sched_get_priority_min	(__NR_Linux + 164)
-#define __NR_sched_rr_get_interval	(__NR_Linux + 165)
-#define __NR_nanosleep			(__NR_Linux + 166)
-#define __NR_mremap			(__NR_Linux + 167)
-#define __NR_accept			(__NR_Linux + 168)
-#define __NR_bind			(__NR_Linux + 169)
-#define __NR_connect			(__NR_Linux + 170)
-#define __NR_getpeername		(__NR_Linux + 171)
-#define __NR_getsockname		(__NR_Linux + 172)
-#define __NR_getsockopt			(__NR_Linux + 173)
-#define __NR_listen			(__NR_Linux + 174)
-#define __NR_recv			(__NR_Linux + 175)
-#define __NR_recvfrom			(__NR_Linux + 176)
-#define __NR_recvmsg			(__NR_Linux + 177)
-#define __NR_send			(__NR_Linux + 178)
-#define __NR_sendmsg			(__NR_Linux + 179)
-#define __NR_sendto			(__NR_Linux + 180)
-#define __NR_setsockopt			(__NR_Linux + 181)
-#define __NR_shutdown			(__NR_Linux + 182)
-#define __NR_socket			(__NR_Linux + 183)
-#define __NR_socketpair			(__NR_Linux + 184)
-#define __NR_setresuid			(__NR_Linux + 185)
-#define __NR_getresuid			(__NR_Linux + 186)
-#define __NR_query_module		(__NR_Linux + 187)
-#define __NR_poll			(__NR_Linux + 188)
-#define __NR_nfsservctl			(__NR_Linux + 189)
-#define __NR_setresgid			(__NR_Linux + 190)
-#define __NR_getresgid			(__NR_Linux + 191)
-#define __NR_prctl			(__NR_Linux + 192)
-#define __NR_rt_sigreturn		(__NR_Linux + 193)
-#define __NR_rt_sigaction		(__NR_Linux + 194)
-#define __NR_rt_sigprocmask		(__NR_Linux + 195)
-#define __NR_rt_sigpending		(__NR_Linux + 196)
-#define __NR_rt_sigtimedwait		(__NR_Linux + 197)
-#define __NR_rt_sigqueueinfo		(__NR_Linux + 198)
-#define __NR_rt_sigsuspend		(__NR_Linux + 199)
-#define __NR_pread64			(__NR_Linux + 200)
-#define __NR_pwrite64			(__NR_Linux + 201)
-#define __NR_chown			(__NR_Linux + 202)
-#define __NR_getcwd			(__NR_Linux + 203)
-#define __NR_capget			(__NR_Linux + 204)
-#define __NR_capset			(__NR_Linux + 205)
-#define __NR_sigaltstack		(__NR_Linux + 206)
-#define __NR_sendfile			(__NR_Linux + 207)
-#define __NR_getpmsg			(__NR_Linux + 208)
-#define __NR_putpmsg			(__NR_Linux + 209)
-#define __NR_mmap2			(__NR_Linux + 210)
-#define __NR_truncate64			(__NR_Linux + 211)
-#define __NR_ftruncate64		(__NR_Linux + 212)
-#define __NR_stat64			(__NR_Linux + 213)
-#define __NR_lstat64			(__NR_Linux + 214)
-#define __NR_fstat64			(__NR_Linux + 215)
-#define __NR_pivot_root			(__NR_Linux + 216)
-#define __NR_mincore			(__NR_Linux + 217)
-#define __NR_madvise			(__NR_Linux + 218)
-#define __NR_getdents64			(__NR_Linux + 219)
-#define __NR_fcntl64			(__NR_Linux + 220)
-#define __NR_reserved221		(__NR_Linux + 221)
-#define __NR_gettid			(__NR_Linux + 222)
-#define __NR_readahead			(__NR_Linux + 223)
-#define __NR_setxattr			(__NR_Linux + 224)
-#define __NR_lsetxattr			(__NR_Linux + 225)
-#define __NR_fsetxattr			(__NR_Linux + 226)
-#define __NR_getxattr			(__NR_Linux + 227)
-#define __NR_lgetxattr			(__NR_Linux + 228)
-#define __NR_fgetxattr			(__NR_Linux + 229)
-#define __NR_listxattr			(__NR_Linux + 230)
-#define __NR_llistxattr			(__NR_Linux + 231)
-#define __NR_flistxattr			(__NR_Linux + 232)
-#define __NR_removexattr		(__NR_Linux + 233)
-#define __NR_lremovexattr		(__NR_Linux + 234)
-#define __NR_fremovexattr		(__NR_Linux + 235)
-#define __NR_tkill			(__NR_Linux + 236)
-#define __NR_sendfile64			(__NR_Linux + 237)
-#define __NR_futex			(__NR_Linux + 238)
-#define __NR_sched_setaffinity		(__NR_Linux + 239)
-#define __NR_sched_getaffinity		(__NR_Linux + 240)
-#define __NR_io_setup			(__NR_Linux + 241)
-#define __NR_io_destroy			(__NR_Linux + 242)
-#define __NR_io_getevents		(__NR_Linux + 243)
-#define __NR_io_submit			(__NR_Linux + 244)
-#define __NR_io_cancel			(__NR_Linux + 245)
-#define __NR_exit_group			(__NR_Linux + 246)
-#define __NR_lookup_dcookie		(__NR_Linux + 247)
-#define __NR_epoll_create		(__NR_Linux + 248)
-#define __NR_epoll_ctl			(__NR_Linux + 249)
-#define __NR_epoll_wait			(__NR_Linux + 250)
-#define __NR_remap_file_pages		(__NR_Linux + 251)
-#define __NR_set_tid_address		(__NR_Linux + 252)
-#define __NR_restart_syscall		(__NR_Linux + 253)
-#define __NR_fadvise64			(__NR_Linux + 254)
-#define __NR_statfs64			(__NR_Linux + 255)
-#define __NR_fstatfs64			(__NR_Linux + 256)
-#define __NR_timer_create		(__NR_Linux + 257)
-#define __NR_timer_settime		(__NR_Linux + 258)
-#define __NR_timer_gettime		(__NR_Linux + 259)
-#define __NR_timer_getoverrun		(__NR_Linux + 260)
-#define __NR_timer_delete		(__NR_Linux + 261)
-#define __NR_clock_settime		(__NR_Linux + 262)
-#define __NR_clock_gettime		(__NR_Linux + 263)
-#define __NR_clock_getres		(__NR_Linux + 264)
-#define __NR_clock_nanosleep		(__NR_Linux + 265)
-#define __NR_tgkill			(__NR_Linux + 266)
-#define __NR_utimes			(__NR_Linux + 267)
-#define __NR_mbind			(__NR_Linux + 268)
-#define __NR_get_mempolicy		(__NR_Linux + 269)
-#define __NR_set_mempolicy		(__NR_Linux + 270)
-#define __NR_mq_open			(__NR_Linux + 271)
-#define __NR_mq_unlink			(__NR_Linux + 272)
-#define __NR_mq_timedsend		(__NR_Linux + 273)
-#define __NR_mq_timedreceive		(__NR_Linux + 274)
-#define __NR_mq_notify			(__NR_Linux + 275)
-#define __NR_mq_getsetattr		(__NR_Linux + 276)
-#define __NR_vserver			(__NR_Linux + 277)
-#define __NR_waitid			(__NR_Linux + 278)
-/* #define __NR_sys_setaltroot		(__NR_Linux + 279) */
-#define __NR_add_key			(__NR_Linux + 280)
-#define __NR_request_key		(__NR_Linux + 281)
-#define __NR_keyctl			(__NR_Linux + 282)
-#define __NR_set_thread_area		(__NR_Linux + 283)
-#define __NR_inotify_init		(__NR_Linux + 284)
-#define __NR_inotify_add_watch		(__NR_Linux + 285)
-#define __NR_inotify_rm_watch		(__NR_Linux + 286)
-#define __NR_migrate_pages		(__NR_Linux + 287)
-#define __NR_openat			(__NR_Linux + 288)
-#define __NR_mkdirat			(__NR_Linux + 289)
-#define __NR_mknodat			(__NR_Linux + 290)
-#define __NR_fchownat			(__NR_Linux + 291)
-#define __NR_futimesat			(__NR_Linux + 292)
-#define __NR_fstatat64			(__NR_Linux + 293)
-#define __NR_unlinkat			(__NR_Linux + 294)
-#define __NR_renameat			(__NR_Linux + 295)
-#define __NR_linkat			(__NR_Linux + 296)
-#define __NR_symlinkat			(__NR_Linux + 297)
-#define __NR_readlinkat			(__NR_Linux + 298)
-#define __NR_fchmodat			(__NR_Linux + 299)
-#define __NR_faccessat			(__NR_Linux + 300)
-#define __NR_pselect6			(__NR_Linux + 301)
-#define __NR_ppoll			(__NR_Linux + 302)
-#define __NR_unshare			(__NR_Linux + 303)
-#define __NR_splice			(__NR_Linux + 304)
-#define __NR_sync_file_range		(__NR_Linux + 305)
-#define __NR_tee			(__NR_Linux + 306)
-#define __NR_vmsplice			(__NR_Linux + 307)
-#define __NR_move_pages			(__NR_Linux + 308)
-#define __NR_set_robust_list		(__NR_Linux + 309)
-#define __NR_get_robust_list		(__NR_Linux + 310)
-#define __NR_kexec_load			(__NR_Linux + 311)
-#define __NR_getcpu			(__NR_Linux + 312)
-#define __NR_epoll_pwait		(__NR_Linux + 313)
-#define __NR_ioprio_set			(__NR_Linux + 314)
-#define __NR_ioprio_get			(__NR_Linux + 315)
-#define __NR_utimensat			(__NR_Linux + 316)
-#define __NR_signalfd			(__NR_Linux + 317)
-#define __NR_timerfd			(__NR_Linux + 318)
-#define __NR_eventfd			(__NR_Linux + 319)
-#define __NR_fallocate			(__NR_Linux + 320)
-#define __NR_timerfd_create		(__NR_Linux + 321)
-#define __NR_timerfd_gettime		(__NR_Linux + 322)
-#define __NR_timerfd_settime		(__NR_Linux + 323)
-#define __NR_signalfd4			(__NR_Linux + 324)
-#define __NR_eventfd2			(__NR_Linux + 325)
-#define __NR_epoll_create1		(__NR_Linux + 326)
-#define __NR_dup3			(__NR_Linux + 327)
-#define __NR_pipe2			(__NR_Linux + 328)
-#define __NR_inotify_init1		(__NR_Linux + 329)
-#define __NR_preadv			(__NR_Linux + 330)
-#define __NR_pwritev			(__NR_Linux + 331)
-#define __NR_rt_tgsigqueueinfo		(__NR_Linux + 332)
-#define __NR_perf_event_open		(__NR_Linux + 333)
-#define __NR_accept4			(__NR_Linux + 334)
-#define __NR_recvmmsg			(__NR_Linux + 335)
-#define __NR_fanotify_init		(__NR_Linux + 336)
-#define __NR_fanotify_mark		(__NR_Linux + 337)
-#define __NR_prlimit64			(__NR_Linux + 338)
-#define __NR_name_to_handle_at		(__NR_Linux + 339)
-#define __NR_open_by_handle_at		(__NR_Linux + 340)
-#define __NR_clock_adjtime		(__NR_Linux + 341)
-#define __NR_syncfs			(__NR_Linux + 342)
-#define __NR_sendmmsg			(__NR_Linux + 343)
-#define __NR_setns			(__NR_Linux + 344)
-#define __NR_process_vm_readv		(__NR_Linux + 345)
-#define __NR_process_vm_writev		(__NR_Linux + 346)
-
-/*
- * Offset of the last Linux o32 flavoured syscall
- */
-#define __NR_Linux_syscalls		346
-
-#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
-
-#define __NR_O32_Linux			4000
-#define __NR_O32_Linux_syscalls		346
-
-#if _MIPS_SIM == _MIPS_SIM_ABI64
-
-/*
- * Linux 64-bit syscalls are in the range from 5000 to 5999.
- */
-#define __NR_Linux			5000
-#define __NR_read			(__NR_Linux +   0)
-#define __NR_write			(__NR_Linux +   1)
-#define __NR_open			(__NR_Linux +   2)
-#define __NR_close			(__NR_Linux +   3)
-#define __NR_stat			(__NR_Linux +   4)
-#define __NR_fstat			(__NR_Linux +   5)
-#define __NR_lstat			(__NR_Linux +   6)
-#define __NR_poll			(__NR_Linux +   7)
-#define __NR_lseek			(__NR_Linux +   8)
-#define __NR_mmap			(__NR_Linux +   9)
-#define __NR_mprotect			(__NR_Linux +  10)
-#define __NR_munmap			(__NR_Linux +  11)
-#define __NR_brk			(__NR_Linux +  12)
-#define __NR_rt_sigaction		(__NR_Linux +  13)
-#define __NR_rt_sigprocmask		(__NR_Linux +  14)
-#define __NR_ioctl			(__NR_Linux +  15)
-#define __NR_pread64			(__NR_Linux +  16)
-#define __NR_pwrite64			(__NR_Linux +  17)
-#define __NR_readv			(__NR_Linux +  18)
-#define __NR_writev			(__NR_Linux +  19)
-#define __NR_access			(__NR_Linux +  20)
-#define __NR_pipe			(__NR_Linux +  21)
-#define __NR__newselect			(__NR_Linux +  22)
-#define __NR_sched_yield		(__NR_Linux +  23)
-#define __NR_mremap			(__NR_Linux +  24)
-#define __NR_msync			(__NR_Linux +  25)
-#define __NR_mincore			(__NR_Linux +  26)
-#define __NR_madvise			(__NR_Linux +  27)
-#define __NR_shmget			(__NR_Linux +  28)
-#define __NR_shmat			(__NR_Linux +  29)
-#define __NR_shmctl			(__NR_Linux +  30)
-#define __NR_dup			(__NR_Linux +  31)
-#define __NR_dup2			(__NR_Linux +  32)
-#define __NR_pause			(__NR_Linux +  33)
-#define __NR_nanosleep			(__NR_Linux +  34)
-#define __NR_getitimer			(__NR_Linux +  35)
-#define __NR_setitimer			(__NR_Linux +  36)
-#define __NR_alarm			(__NR_Linux +  37)
-#define __NR_getpid			(__NR_Linux +  38)
-#define __NR_sendfile			(__NR_Linux +  39)
-#define __NR_socket			(__NR_Linux +  40)
-#define __NR_connect			(__NR_Linux +  41)
-#define __NR_accept			(__NR_Linux +  42)
-#define __NR_sendto			(__NR_Linux +  43)
-#define __NR_recvfrom			(__NR_Linux +  44)
-#define __NR_sendmsg			(__NR_Linux +  45)
-#define __NR_recvmsg			(__NR_Linux +  46)
-#define __NR_shutdown			(__NR_Linux +  47)
-#define __NR_bind			(__NR_Linux +  48)
-#define __NR_listen			(__NR_Linux +  49)
-#define __NR_getsockname		(__NR_Linux +  50)
-#define __NR_getpeername		(__NR_Linux +  51)
-#define __NR_socketpair			(__NR_Linux +  52)
-#define __NR_setsockopt			(__NR_Linux +  53)
-#define __NR_getsockopt			(__NR_Linux +  54)
-#define __NR_clone			(__NR_Linux +  55)
-#define __NR_fork			(__NR_Linux +  56)
-#define __NR_execve			(__NR_Linux +  57)
-#define __NR_exit			(__NR_Linux +  58)
-#define __NR_wait4			(__NR_Linux +  59)
-#define __NR_kill			(__NR_Linux +  60)
-#define __NR_uname			(__NR_Linux +  61)
-#define __NR_semget			(__NR_Linux +  62)
-#define __NR_semop			(__NR_Linux +  63)
-#define __NR_semctl			(__NR_Linux +  64)
-#define __NR_shmdt			(__NR_Linux +  65)
-#define __NR_msgget			(__NR_Linux +  66)
-#define __NR_msgsnd			(__NR_Linux +  67)
-#define __NR_msgrcv			(__NR_Linux +  68)
-#define __NR_msgctl			(__NR_Linux +  69)
-#define __NR_fcntl			(__NR_Linux +  70)
-#define __NR_flock			(__NR_Linux +  71)
-#define __NR_fsync			(__NR_Linux +  72)
-#define __NR_fdatasync			(__NR_Linux +  73)
-#define __NR_truncate			(__NR_Linux +  74)
-#define __NR_ftruncate			(__NR_Linux +  75)
-#define __NR_getdents			(__NR_Linux +  76)
-#define __NR_getcwd			(__NR_Linux +  77)
-#define __NR_chdir			(__NR_Linux +  78)
-#define __NR_fchdir			(__NR_Linux +  79)
-#define __NR_rename			(__NR_Linux +  80)
-#define __NR_mkdir			(__NR_Linux +  81)
-#define __NR_rmdir			(__NR_Linux +  82)
-#define __NR_creat			(__NR_Linux +  83)
-#define __NR_link			(__NR_Linux +  84)
-#define __NR_unlink			(__NR_Linux +  85)
-#define __NR_symlink			(__NR_Linux +  86)
-#define __NR_readlink			(__NR_Linux +  87)
-#define __NR_chmod			(__NR_Linux +  88)
-#define __NR_fchmod			(__NR_Linux +  89)
-#define __NR_chown			(__NR_Linux +  90)
-#define __NR_fchown			(__NR_Linux +  91)
-#define __NR_lchown			(__NR_Linux +  92)
-#define __NR_umask			(__NR_Linux +  93)
-#define __NR_gettimeofday		(__NR_Linux +  94)
-#define __NR_getrlimit			(__NR_Linux +  95)
-#define __NR_getrusage			(__NR_Linux +  96)
-#define __NR_sysinfo			(__NR_Linux +  97)
-#define __NR_times			(__NR_Linux +  98)
-#define __NR_ptrace			(__NR_Linux +  99)
-#define __NR_getuid			(__NR_Linux + 100)
-#define __NR_syslog			(__NR_Linux + 101)
-#define __NR_getgid			(__NR_Linux + 102)
-#define __NR_setuid			(__NR_Linux + 103)
-#define __NR_setgid			(__NR_Linux + 104)
-#define __NR_geteuid			(__NR_Linux + 105)
-#define __NR_getegid			(__NR_Linux + 106)
-#define __NR_setpgid			(__NR_Linux + 107)
-#define __NR_getppid			(__NR_Linux + 108)
-#define __NR_getpgrp			(__NR_Linux + 109)
-#define __NR_setsid			(__NR_Linux + 110)
-#define __NR_setreuid			(__NR_Linux + 111)
-#define __NR_setregid			(__NR_Linux + 112)
-#define __NR_getgroups			(__NR_Linux + 113)
-#define __NR_setgroups			(__NR_Linux + 114)
-#define __NR_setresuid			(__NR_Linux + 115)
-#define __NR_getresuid			(__NR_Linux + 116)
-#define __NR_setresgid			(__NR_Linux + 117)
-#define __NR_getresgid			(__NR_Linux + 118)
-#define __NR_getpgid			(__NR_Linux + 119)
-#define __NR_setfsuid			(__NR_Linux + 120)
-#define __NR_setfsgid			(__NR_Linux + 121)
-#define __NR_getsid			(__NR_Linux + 122)
-#define __NR_capget			(__NR_Linux + 123)
-#define __NR_capset			(__NR_Linux + 124)
-#define __NR_rt_sigpending		(__NR_Linux + 125)
-#define __NR_rt_sigtimedwait		(__NR_Linux + 126)
-#define __NR_rt_sigqueueinfo		(__NR_Linux + 127)
-#define __NR_rt_sigsuspend		(__NR_Linux + 128)
-#define __NR_sigaltstack		(__NR_Linux + 129)
-#define __NR_utime			(__NR_Linux + 130)
-#define __NR_mknod			(__NR_Linux + 131)
-#define __NR_personality		(__NR_Linux + 132)
-#define __NR_ustat			(__NR_Linux + 133)
-#define __NR_statfs			(__NR_Linux + 134)
-#define __NR_fstatfs			(__NR_Linux + 135)
-#define __NR_sysfs			(__NR_Linux + 136)
-#define __NR_getpriority		(__NR_Linux + 137)
-#define __NR_setpriority		(__NR_Linux + 138)
-#define __NR_sched_setparam		(__NR_Linux + 139)
-#define __NR_sched_getparam		(__NR_Linux + 140)
-#define __NR_sched_setscheduler		(__NR_Linux + 141)
-#define __NR_sched_getscheduler		(__NR_Linux + 142)
-#define __NR_sched_get_priority_max	(__NR_Linux + 143)
-#define __NR_sched_get_priority_min	(__NR_Linux + 144)
-#define __NR_sched_rr_get_interval	(__NR_Linux + 145)
-#define __NR_mlock			(__NR_Linux + 146)
-#define __NR_munlock			(__NR_Linux + 147)
-#define __NR_mlockall			(__NR_Linux + 148)
-#define __NR_munlockall			(__NR_Linux + 149)
-#define __NR_vhangup			(__NR_Linux + 150)
-#define __NR_pivot_root			(__NR_Linux + 151)
-#define __NR__sysctl			(__NR_Linux + 152)
-#define __NR_prctl			(__NR_Linux + 153)
-#define __NR_adjtimex			(__NR_Linux + 154)
-#define __NR_setrlimit			(__NR_Linux + 155)
-#define __NR_chroot			(__NR_Linux + 156)
-#define __NR_sync			(__NR_Linux + 157)
-#define __NR_acct			(__NR_Linux + 158)
-#define __NR_settimeofday		(__NR_Linux + 159)
-#define __NR_mount			(__NR_Linux + 160)
-#define __NR_umount2			(__NR_Linux + 161)
-#define __NR_swapon			(__NR_Linux + 162)
-#define __NR_swapoff			(__NR_Linux + 163)
-#define __NR_reboot			(__NR_Linux + 164)
-#define __NR_sethostname		(__NR_Linux + 165)
-#define __NR_setdomainname		(__NR_Linux + 166)
-#define __NR_create_module		(__NR_Linux + 167)
-#define __NR_init_module		(__NR_Linux + 168)
-#define __NR_delete_module		(__NR_Linux + 169)
-#define __NR_get_kernel_syms		(__NR_Linux + 170)
-#define __NR_query_module		(__NR_Linux + 171)
-#define __NR_quotactl			(__NR_Linux + 172)
-#define __NR_nfsservctl			(__NR_Linux + 173)
-#define __NR_getpmsg			(__NR_Linux + 174)
-#define __NR_putpmsg			(__NR_Linux + 175)
-#define __NR_afs_syscall		(__NR_Linux + 176)
-#define __NR_reserved177		(__NR_Linux + 177)
-#define __NR_gettid			(__NR_Linux + 178)
-#define __NR_readahead			(__NR_Linux + 179)
-#define __NR_setxattr			(__NR_Linux + 180)
-#define __NR_lsetxattr			(__NR_Linux + 181)
-#define __NR_fsetxattr			(__NR_Linux + 182)
-#define __NR_getxattr			(__NR_Linux + 183)
-#define __NR_lgetxattr			(__NR_Linux + 184)
-#define __NR_fgetxattr			(__NR_Linux + 185)
-#define __NR_listxattr			(__NR_Linux + 186)
-#define __NR_llistxattr			(__NR_Linux + 187)
-#define __NR_flistxattr			(__NR_Linux + 188)
-#define __NR_removexattr		(__NR_Linux + 189)
-#define __NR_lremovexattr		(__NR_Linux + 190)
-#define __NR_fremovexattr		(__NR_Linux + 191)
-#define __NR_tkill			(__NR_Linux + 192)
-#define __NR_reserved193		(__NR_Linux + 193)
-#define __NR_futex			(__NR_Linux + 194)
-#define __NR_sched_setaffinity		(__NR_Linux + 195)
-#define __NR_sched_getaffinity		(__NR_Linux + 196)
-#define __NR_cacheflush			(__NR_Linux + 197)
-#define __NR_cachectl			(__NR_Linux + 198)
-#define __NR_sysmips			(__NR_Linux + 199)
-#define __NR_io_setup			(__NR_Linux + 200)
-#define __NR_io_destroy			(__NR_Linux + 201)
-#define __NR_io_getevents		(__NR_Linux + 202)
-#define __NR_io_submit			(__NR_Linux + 203)
-#define __NR_io_cancel			(__NR_Linux + 204)
-#define __NR_exit_group			(__NR_Linux + 205)
-#define __NR_lookup_dcookie		(__NR_Linux + 206)
-#define __NR_epoll_create		(__NR_Linux + 207)
-#define __NR_epoll_ctl			(__NR_Linux + 208)
-#define __NR_epoll_wait			(__NR_Linux + 209)
-#define __NR_remap_file_pages		(__NR_Linux + 210)
-#define __NR_rt_sigreturn		(__NR_Linux + 211)
-#define __NR_set_tid_address		(__NR_Linux + 212)
-#define __NR_restart_syscall		(__NR_Linux + 213)
-#define __NR_semtimedop			(__NR_Linux + 214)
-#define __NR_fadvise64			(__NR_Linux + 215)
-#define __NR_timer_create		(__NR_Linux + 216)
-#define __NR_timer_settime		(__NR_Linux + 217)
-#define __NR_timer_gettime		(__NR_Linux + 218)
-#define __NR_timer_getoverrun		(__NR_Linux + 219)
-#define __NR_timer_delete		(__NR_Linux + 220)
-#define __NR_clock_settime		(__NR_Linux + 221)
-#define __NR_clock_gettime		(__NR_Linux + 222)
-#define __NR_clock_getres		(__NR_Linux + 223)
-#define __NR_clock_nanosleep		(__NR_Linux + 224)
-#define __NR_tgkill			(__NR_Linux + 225)
-#define __NR_utimes			(__NR_Linux + 226)
-#define __NR_mbind			(__NR_Linux + 227)
-#define __NR_get_mempolicy		(__NR_Linux + 228)
-#define __NR_set_mempolicy		(__NR_Linux + 229)
-#define __NR_mq_open			(__NR_Linux + 230)
-#define __NR_mq_unlink			(__NR_Linux + 231)
-#define __NR_mq_timedsend		(__NR_Linux + 232)
-#define __NR_mq_timedreceive		(__NR_Linux + 233)
-#define __NR_mq_notify			(__NR_Linux + 234)
-#define __NR_mq_getsetattr		(__NR_Linux + 235)
-#define __NR_vserver			(__NR_Linux + 236)
-#define __NR_waitid			(__NR_Linux + 237)
-/* #define __NR_sys_setaltroot		(__NR_Linux + 238) */
-#define __NR_add_key			(__NR_Linux + 239)
-#define __NR_request_key		(__NR_Linux + 240)
-#define __NR_keyctl			(__NR_Linux + 241)
-#define __NR_set_thread_area		(__NR_Linux + 242)
-#define __NR_inotify_init		(__NR_Linux + 243)
-#define __NR_inotify_add_watch		(__NR_Linux + 244)
-#define __NR_inotify_rm_watch		(__NR_Linux + 245)
-#define __NR_migrate_pages		(__NR_Linux + 246)
-#define __NR_openat			(__NR_Linux + 247)
-#define __NR_mkdirat			(__NR_Linux + 248)
-#define __NR_mknodat			(__NR_Linux + 249)
-#define __NR_fchownat			(__NR_Linux + 250)
-#define __NR_futimesat			(__NR_Linux + 251)
-#define __NR_newfstatat			(__NR_Linux + 252)
-#define __NR_unlinkat			(__NR_Linux + 253)
-#define __NR_renameat			(__NR_Linux + 254)
-#define __NR_linkat			(__NR_Linux + 255)
-#define __NR_symlinkat			(__NR_Linux + 256)
-#define __NR_readlinkat			(__NR_Linux + 257)
-#define __NR_fchmodat			(__NR_Linux + 258)
-#define __NR_faccessat			(__NR_Linux + 259)
-#define __NR_pselect6			(__NR_Linux + 260)
-#define __NR_ppoll			(__NR_Linux + 261)
-#define __NR_unshare			(__NR_Linux + 262)
-#define __NR_splice			(__NR_Linux + 263)
-#define __NR_sync_file_range		(__NR_Linux + 264)
-#define __NR_tee			(__NR_Linux + 265)
-#define __NR_vmsplice			(__NR_Linux + 266)
-#define __NR_move_pages			(__NR_Linux + 267)
-#define __NR_set_robust_list		(__NR_Linux + 268)
-#define __NR_get_robust_list		(__NR_Linux + 269)
-#define __NR_kexec_load			(__NR_Linux + 270)
-#define __NR_getcpu			(__NR_Linux + 271)
-#define __NR_epoll_pwait		(__NR_Linux + 272)
-#define __NR_ioprio_set			(__NR_Linux + 273)
-#define __NR_ioprio_get			(__NR_Linux + 274)
-#define __NR_utimensat			(__NR_Linux + 275)
-#define __NR_signalfd			(__NR_Linux + 276)
-#define __NR_timerfd			(__NR_Linux + 277)
-#define __NR_eventfd			(__NR_Linux + 278)
-#define __NR_fallocate			(__NR_Linux + 279)
-#define __NR_timerfd_create		(__NR_Linux + 280)
-#define __NR_timerfd_gettime		(__NR_Linux + 281)
-#define __NR_timerfd_settime		(__NR_Linux + 282)
-#define __NR_signalfd4			(__NR_Linux + 283)
-#define __NR_eventfd2			(__NR_Linux + 284)
-#define __NR_epoll_create1		(__NR_Linux + 285)
-#define __NR_dup3			(__NR_Linux + 286)
-#define __NR_pipe2			(__NR_Linux + 287)
-#define __NR_inotify_init1		(__NR_Linux + 288)
-#define __NR_preadv			(__NR_Linux + 289)
-#define __NR_pwritev			(__NR_Linux + 290)
-#define __NR_rt_tgsigqueueinfo		(__NR_Linux + 291)
-#define __NR_perf_event_open		(__NR_Linux + 292)
-#define __NR_accept4			(__NR_Linux + 293)
-#define __NR_recvmmsg			(__NR_Linux + 294)
-#define __NR_fanotify_init		(__NR_Linux + 295)
-#define __NR_fanotify_mark		(__NR_Linux + 296)
-#define __NR_prlimit64			(__NR_Linux + 297)
-#define __NR_name_to_handle_at		(__NR_Linux + 298)
-#define __NR_open_by_handle_at		(__NR_Linux + 299)
-#define __NR_clock_adjtime		(__NR_Linux + 300)
-#define __NR_syncfs			(__NR_Linux + 301)
-#define __NR_sendmmsg			(__NR_Linux + 302)
-#define __NR_setns			(__NR_Linux + 303)
-#define __NR_process_vm_readv		(__NR_Linux + 304)
-#define __NR_process_vm_writev		(__NR_Linux + 305)
-
-/*
- * Offset of the last Linux 64-bit flavoured syscall
- */
-#define __NR_Linux_syscalls		305
-
-#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
-
-#define __NR_64_Linux			5000
-#define __NR_64_Linux_syscalls		305
-
-#if _MIPS_SIM == _MIPS_SIM_NABI32
-
-/*
- * Linux N32 syscalls are in the range from 6000 to 6999.
- */
-#define __NR_Linux			6000
-#define __NR_read			(__NR_Linux +   0)
-#define __NR_write			(__NR_Linux +   1)
-#define __NR_open			(__NR_Linux +   2)
-#define __NR_close			(__NR_Linux +   3)
-#define __NR_stat			(__NR_Linux +   4)
-#define __NR_fstat			(__NR_Linux +   5)
-#define __NR_lstat			(__NR_Linux +   6)
-#define __NR_poll			(__NR_Linux +   7)
-#define __NR_lseek			(__NR_Linux +   8)
-#define __NR_mmap			(__NR_Linux +   9)
-#define __NR_mprotect			(__NR_Linux +  10)
-#define __NR_munmap			(__NR_Linux +  11)
-#define __NR_brk			(__NR_Linux +  12)
-#define __NR_rt_sigaction		(__NR_Linux +  13)
-#define __NR_rt_sigprocmask		(__NR_Linux +  14)
-#define __NR_ioctl			(__NR_Linux +  15)
-#define __NR_pread64			(__NR_Linux +  16)
-#define __NR_pwrite64			(__NR_Linux +  17)
-#define __NR_readv			(__NR_Linux +  18)
-#define __NR_writev			(__NR_Linux +  19)
-#define __NR_access			(__NR_Linux +  20)
-#define __NR_pipe			(__NR_Linux +  21)
-#define __NR__newselect			(__NR_Linux +  22)
-#define __NR_sched_yield		(__NR_Linux +  23)
-#define __NR_mremap			(__NR_Linux +  24)
-#define __NR_msync			(__NR_Linux +  25)
-#define __NR_mincore			(__NR_Linux +  26)
-#define __NR_madvise			(__NR_Linux +  27)
-#define __NR_shmget			(__NR_Linux +  28)
-#define __NR_shmat			(__NR_Linux +  29)
-#define __NR_shmctl			(__NR_Linux +  30)
-#define __NR_dup			(__NR_Linux +  31)
-#define __NR_dup2			(__NR_Linux +  32)
-#define __NR_pause			(__NR_Linux +  33)
-#define __NR_nanosleep			(__NR_Linux +  34)
-#define __NR_getitimer			(__NR_Linux +  35)
-#define __NR_setitimer			(__NR_Linux +  36)
-#define __NR_alarm			(__NR_Linux +  37)
-#define __NR_getpid			(__NR_Linux +  38)
-#define __NR_sendfile			(__NR_Linux +  39)
-#define __NR_socket			(__NR_Linux +  40)
-#define __NR_connect			(__NR_Linux +  41)
-#define __NR_accept			(__NR_Linux +  42)
-#define __NR_sendto			(__NR_Linux +  43)
-#define __NR_recvfrom			(__NR_Linux +  44)
-#define __NR_sendmsg			(__NR_Linux +  45)
-#define __NR_recvmsg			(__NR_Linux +  46)
-#define __NR_shutdown			(__NR_Linux +  47)
-#define __NR_bind			(__NR_Linux +  48)
-#define __NR_listen			(__NR_Linux +  49)
-#define __NR_getsockname		(__NR_Linux +  50)
-#define __NR_getpeername		(__NR_Linux +  51)
-#define __NR_socketpair			(__NR_Linux +  52)
-#define __NR_setsockopt			(__NR_Linux +  53)
-#define __NR_getsockopt			(__NR_Linux +  54)
-#define __NR_clone			(__NR_Linux +  55)
-#define __NR_fork			(__NR_Linux +  56)
-#define __NR_execve			(__NR_Linux +  57)
-#define __NR_exit			(__NR_Linux +  58)
-#define __NR_wait4			(__NR_Linux +  59)
-#define __NR_kill			(__NR_Linux +  60)
-#define __NR_uname			(__NR_Linux +  61)
-#define __NR_semget			(__NR_Linux +  62)
-#define __NR_semop			(__NR_Linux +  63)
-#define __NR_semctl			(__NR_Linux +  64)
-#define __NR_shmdt			(__NR_Linux +  65)
-#define __NR_msgget			(__NR_Linux +  66)
-#define __NR_msgsnd			(__NR_Linux +  67)
-#define __NR_msgrcv			(__NR_Linux +  68)
-#define __NR_msgctl			(__NR_Linux +  69)
-#define __NR_fcntl			(__NR_Linux +  70)
-#define __NR_flock			(__NR_Linux +  71)
-#define __NR_fsync			(__NR_Linux +  72)
-#define __NR_fdatasync			(__NR_Linux +  73)
-#define __NR_truncate			(__NR_Linux +  74)
-#define __NR_ftruncate			(__NR_Linux +  75)
-#define __NR_getdents			(__NR_Linux +  76)
-#define __NR_getcwd			(__NR_Linux +  77)
-#define __NR_chdir			(__NR_Linux +  78)
-#define __NR_fchdir			(__NR_Linux +  79)
-#define __NR_rename			(__NR_Linux +  80)
-#define __NR_mkdir			(__NR_Linux +  81)
-#define __NR_rmdir			(__NR_Linux +  82)
-#define __NR_creat			(__NR_Linux +  83)
-#define __NR_link			(__NR_Linux +  84)
-#define __NR_unlink			(__NR_Linux +  85)
-#define __NR_symlink			(__NR_Linux +  86)
-#define __NR_readlink			(__NR_Linux +  87)
-#define __NR_chmod			(__NR_Linux +  88)
-#define __NR_fchmod			(__NR_Linux +  89)
-#define __NR_chown			(__NR_Linux +  90)
-#define __NR_fchown			(__NR_Linux +  91)
-#define __NR_lchown			(__NR_Linux +  92)
-#define __NR_umask			(__NR_Linux +  93)
-#define __NR_gettimeofday		(__NR_Linux +  94)
-#define __NR_getrlimit			(__NR_Linux +  95)
-#define __NR_getrusage			(__NR_Linux +  96)
-#define __NR_sysinfo			(__NR_Linux +  97)
-#define __NR_times			(__NR_Linux +  98)
-#define __NR_ptrace			(__NR_Linux +  99)
-#define __NR_getuid			(__NR_Linux + 100)
-#define __NR_syslog			(__NR_Linux + 101)
-#define __NR_getgid			(__NR_Linux + 102)
-#define __NR_setuid			(__NR_Linux + 103)
-#define __NR_setgid			(__NR_Linux + 104)
-#define __NR_geteuid			(__NR_Linux + 105)
-#define __NR_getegid			(__NR_Linux + 106)
-#define __NR_setpgid			(__NR_Linux + 107)
-#define __NR_getppid			(__NR_Linux + 108)
-#define __NR_getpgrp			(__NR_Linux + 109)
-#define __NR_setsid			(__NR_Linux + 110)
-#define __NR_setreuid			(__NR_Linux + 111)
-#define __NR_setregid			(__NR_Linux + 112)
-#define __NR_getgroups			(__NR_Linux + 113)
-#define __NR_setgroups			(__NR_Linux + 114)
-#define __NR_setresuid			(__NR_Linux + 115)
-#define __NR_getresuid			(__NR_Linux + 116)
-#define __NR_setresgid			(__NR_Linux + 117)
-#define __NR_getresgid			(__NR_Linux + 118)
-#define __NR_getpgid			(__NR_Linux + 119)
-#define __NR_setfsuid			(__NR_Linux + 120)
-#define __NR_setfsgid			(__NR_Linux + 121)
-#define __NR_getsid			(__NR_Linux + 122)
-#define __NR_capget			(__NR_Linux + 123)
-#define __NR_capset			(__NR_Linux + 124)
-#define __NR_rt_sigpending		(__NR_Linux + 125)
-#define __NR_rt_sigtimedwait		(__NR_Linux + 126)
-#define __NR_rt_sigqueueinfo		(__NR_Linux + 127)
-#define __NR_rt_sigsuspend		(__NR_Linux + 128)
-#define __NR_sigaltstack		(__NR_Linux + 129)
-#define __NR_utime			(__NR_Linux + 130)
-#define __NR_mknod			(__NR_Linux + 131)
-#define __NR_personality		(__NR_Linux + 132)
-#define __NR_ustat			(__NR_Linux + 133)
-#define __NR_statfs			(__NR_Linux + 134)
-#define __NR_fstatfs			(__NR_Linux + 135)
-#define __NR_sysfs			(__NR_Linux + 136)
-#define __NR_getpriority		(__NR_Linux + 137)
-#define __NR_setpriority		(__NR_Linux + 138)
-#define __NR_sched_setparam		(__NR_Linux + 139)
-#define __NR_sched_getparam		(__NR_Linux + 140)
-#define __NR_sched_setscheduler		(__NR_Linux + 141)
-#define __NR_sched_getscheduler		(__NR_Linux + 142)
-#define __NR_sched_get_priority_max	(__NR_Linux + 143)
-#define __NR_sched_get_priority_min	(__NR_Linux + 144)
-#define __NR_sched_rr_get_interval	(__NR_Linux + 145)
-#define __NR_mlock			(__NR_Linux + 146)
-#define __NR_munlock			(__NR_Linux + 147)
-#define __NR_mlockall			(__NR_Linux + 148)
-#define __NR_munlockall			(__NR_Linux + 149)
-#define __NR_vhangup			(__NR_Linux + 150)
-#define __NR_pivot_root			(__NR_Linux + 151)
-#define __NR__sysctl			(__NR_Linux + 152)
-#define __NR_prctl			(__NR_Linux + 153)
-#define __NR_adjtimex			(__NR_Linux + 154)
-#define __NR_setrlimit			(__NR_Linux + 155)
-#define __NR_chroot			(__NR_Linux + 156)
-#define __NR_sync			(__NR_Linux + 157)
-#define __NR_acct			(__NR_Linux + 158)
-#define __NR_settimeofday		(__NR_Linux + 159)
-#define __NR_mount			(__NR_Linux + 160)
-#define __NR_umount2			(__NR_Linux + 161)
-#define __NR_swapon			(__NR_Linux + 162)
-#define __NR_swapoff			(__NR_Linux + 163)
-#define __NR_reboot			(__NR_Linux + 164)
-#define __NR_sethostname		(__NR_Linux + 165)
-#define __NR_setdomainname		(__NR_Linux + 166)
-#define __NR_create_module		(__NR_Linux + 167)
-#define __NR_init_module		(__NR_Linux + 168)
-#define __NR_delete_module		(__NR_Linux + 169)
-#define __NR_get_kernel_syms		(__NR_Linux + 170)
-#define __NR_query_module		(__NR_Linux + 171)
-#define __NR_quotactl			(__NR_Linux + 172)
-#define __NR_nfsservctl			(__NR_Linux + 173)
-#define __NR_getpmsg			(__NR_Linux + 174)
-#define __NR_putpmsg			(__NR_Linux + 175)
-#define __NR_afs_syscall		(__NR_Linux + 176)
-#define __NR_reserved177		(__NR_Linux + 177)
-#define __NR_gettid			(__NR_Linux + 178)
-#define __NR_readahead			(__NR_Linux + 179)
-#define __NR_setxattr			(__NR_Linux + 180)
-#define __NR_lsetxattr			(__NR_Linux + 181)
-#define __NR_fsetxattr			(__NR_Linux + 182)
-#define __NR_getxattr			(__NR_Linux + 183)
-#define __NR_lgetxattr			(__NR_Linux + 184)
-#define __NR_fgetxattr			(__NR_Linux + 185)
-#define __NR_listxattr			(__NR_Linux + 186)
-#define __NR_llistxattr			(__NR_Linux + 187)
-#define __NR_flistxattr			(__NR_Linux + 188)
-#define __NR_removexattr		(__NR_Linux + 189)
-#define __NR_lremovexattr		(__NR_Linux + 190)
-#define __NR_fremovexattr		(__NR_Linux + 191)
-#define __NR_tkill			(__NR_Linux + 192)
-#define __NR_reserved193		(__NR_Linux + 193)
-#define __NR_futex			(__NR_Linux + 194)
-#define __NR_sched_setaffinity		(__NR_Linux + 195)
-#define __NR_sched_getaffinity		(__NR_Linux + 196)
-#define __NR_cacheflush			(__NR_Linux + 197)
-#define __NR_cachectl			(__NR_Linux + 198)
-#define __NR_sysmips			(__NR_Linux + 199)
-#define __NR_io_setup			(__NR_Linux + 200)
-#define __NR_io_destroy			(__NR_Linux + 201)
-#define __NR_io_getevents		(__NR_Linux + 202)
-#define __NR_io_submit			(__NR_Linux + 203)
-#define __NR_io_cancel			(__NR_Linux + 204)
-#define __NR_exit_group			(__NR_Linux + 205)
-#define __NR_lookup_dcookie		(__NR_Linux + 206)
-#define __NR_epoll_create		(__NR_Linux + 207)
-#define __NR_epoll_ctl			(__NR_Linux + 208)
-#define __NR_epoll_wait			(__NR_Linux + 209)
-#define __NR_remap_file_pages		(__NR_Linux + 210)
-#define __NR_rt_sigreturn		(__NR_Linux + 211)
-#define __NR_fcntl64			(__NR_Linux + 212)
-#define __NR_set_tid_address		(__NR_Linux + 213)
-#define __NR_restart_syscall		(__NR_Linux + 214)
-#define __NR_semtimedop			(__NR_Linux + 215)
-#define __NR_fadvise64			(__NR_Linux + 216)
-#define __NR_statfs64			(__NR_Linux + 217)
-#define __NR_fstatfs64			(__NR_Linux + 218)
-#define __NR_sendfile64			(__NR_Linux + 219)
-#define __NR_timer_create		(__NR_Linux + 220)
-#define __NR_timer_settime		(__NR_Linux + 221)
-#define __NR_timer_gettime		(__NR_Linux + 222)
-#define __NR_timer_getoverrun		(__NR_Linux + 223)
-#define __NR_timer_delete		(__NR_Linux + 224)
-#define __NR_clock_settime		(__NR_Linux + 225)
-#define __NR_clock_gettime		(__NR_Linux + 226)
-#define __NR_clock_getres		(__NR_Linux + 227)
-#define __NR_clock_nanosleep		(__NR_Linux + 228)
-#define __NR_tgkill			(__NR_Linux + 229)
-#define __NR_utimes			(__NR_Linux + 230)
-#define __NR_mbind			(__NR_Linux + 231)
-#define __NR_get_mempolicy		(__NR_Linux + 232)
-#define __NR_set_mempolicy		(__NR_Linux + 233)
-#define __NR_mq_open			(__NR_Linux + 234)
-#define __NR_mq_unlink			(__NR_Linux + 235)
-#define __NR_mq_timedsend		(__NR_Linux + 236)
-#define __NR_mq_timedreceive		(__NR_Linux + 237)
-#define __NR_mq_notify			(__NR_Linux + 238)
-#define __NR_mq_getsetattr		(__NR_Linux + 239)
-#define __NR_vserver			(__NR_Linux + 240)
-#define __NR_waitid			(__NR_Linux + 241)
-/* #define __NR_sys_setaltroot		(__NR_Linux + 242) */
-#define __NR_add_key			(__NR_Linux + 243)
-#define __NR_request_key		(__NR_Linux + 244)
-#define __NR_keyctl			(__NR_Linux + 245)
-#define __NR_set_thread_area		(__NR_Linux + 246)
-#define __NR_inotify_init		(__NR_Linux + 247)
-#define __NR_inotify_add_watch		(__NR_Linux + 248)
-#define __NR_inotify_rm_watch		(__NR_Linux + 249)
-#define __NR_migrate_pages		(__NR_Linux + 250)
-#define __NR_openat			(__NR_Linux + 251)
-#define __NR_mkdirat			(__NR_Linux + 252)
-#define __NR_mknodat			(__NR_Linux + 253)
-#define __NR_fchownat			(__NR_Linux + 254)
-#define __NR_futimesat			(__NR_Linux + 255)
-#define __NR_newfstatat			(__NR_Linux + 256)
-#define __NR_unlinkat			(__NR_Linux + 257)
-#define __NR_renameat			(__NR_Linux + 258)
-#define __NR_linkat			(__NR_Linux + 259)
-#define __NR_symlinkat			(__NR_Linux + 260)
-#define __NR_readlinkat			(__NR_Linux + 261)
-#define __NR_fchmodat			(__NR_Linux + 262)
-#define __NR_faccessat			(__NR_Linux + 263)
-#define __NR_pselect6			(__NR_Linux + 264)
-#define __NR_ppoll			(__NR_Linux + 265)
-#define __NR_unshare			(__NR_Linux + 266)
-#define __NR_splice			(__NR_Linux + 267)
-#define __NR_sync_file_range		(__NR_Linux + 268)
-#define __NR_tee			(__NR_Linux + 269)
-#define __NR_vmsplice			(__NR_Linux + 270)
-#define __NR_move_pages			(__NR_Linux + 271)
-#define __NR_set_robust_list		(__NR_Linux + 272)
-#define __NR_get_robust_list		(__NR_Linux + 273)
-#define __NR_kexec_load			(__NR_Linux + 274)
-#define __NR_getcpu			(__NR_Linux + 275)
-#define __NR_epoll_pwait		(__NR_Linux + 276)
-#define __NR_ioprio_set			(__NR_Linux + 277)
-#define __NR_ioprio_get			(__NR_Linux + 278)
-#define __NR_utimensat			(__NR_Linux + 279)
-#define __NR_signalfd			(__NR_Linux + 280)
-#define __NR_timerfd			(__NR_Linux + 281)
-#define __NR_eventfd			(__NR_Linux + 282)
-#define __NR_fallocate			(__NR_Linux + 283)
-#define __NR_timerfd_create		(__NR_Linux + 284)
-#define __NR_timerfd_gettime		(__NR_Linux + 285)
-#define __NR_timerfd_settime		(__NR_Linux + 286)
-#define __NR_signalfd4			(__NR_Linux + 287)
-#define __NR_eventfd2			(__NR_Linux + 288)
-#define __NR_epoll_create1		(__NR_Linux + 289)
-#define __NR_dup3			(__NR_Linux + 290)
-#define __NR_pipe2			(__NR_Linux + 291)
-#define __NR_inotify_init1		(__NR_Linux + 292)
-#define __NR_preadv			(__NR_Linux + 293)
-#define __NR_pwritev			(__NR_Linux + 294)
-#define __NR_rt_tgsigqueueinfo		(__NR_Linux + 295)
-#define __NR_perf_event_open		(__NR_Linux + 296)
-#define __NR_accept4			(__NR_Linux + 297)
-#define __NR_recvmmsg			(__NR_Linux + 298)
-#define __NR_getdents64			(__NR_Linux + 299)
-#define __NR_fanotify_init		(__NR_Linux + 300)
-#define __NR_fanotify_mark		(__NR_Linux + 301)
-#define __NR_prlimit64			(__NR_Linux + 302)
-#define __NR_name_to_handle_at		(__NR_Linux + 303)
-#define __NR_open_by_handle_at		(__NR_Linux + 304)
-#define __NR_clock_adjtime		(__NR_Linux + 305)
-#define __NR_syncfs			(__NR_Linux + 306)
-#define __NR_sendmmsg			(__NR_Linux + 307)
-#define __NR_setns			(__NR_Linux + 308)
-#define __NR_process_vm_readv		(__NR_Linux + 309)
-#define __NR_process_vm_writev		(__NR_Linux + 310)
-
-/*
- * Offset of the last N32 flavoured syscall
- */
-#define __NR_Linux_syscalls		310
-
-#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
-
-#define __NR_N32_Linux			6000
-#define __NR_N32_Linux_syscalls		310
-
-#ifdef __KERNEL__
 
 #ifndef __ASSEMBLY__
 
@@ -1086,5 +70,4 @@
  */
 #define cond_syscall(x) asm(".weak\t" #x "\n" #x "\t=\tsys_ni_syscall")
 
-#endif /* __KERNEL__ */
 #endif /* _ASM_UNISTD_H */
diff --git a/arch/mips/include/uapi/asm/Kbuild b/arch/mips/include/uapi/asm/Kbuild
index baebb3da1d4..a1a0452ac18 100644
--- a/arch/mips/include/uapi/asm/Kbuild
+++ b/arch/mips/include/uapi/asm/Kbuild
@@ -1,3 +1,37 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += byteorder.h
+header-y += cachectl.h
+header-y += errno.h
+header-y += fcntl.h
+header-y += ioctl.h
+header-y += ioctls.h
+header-y += ipcbuf.h
+header-y += kvm_para.h
+header-y += mman.h
+header-y += msgbuf.h
+header-y += param.h
+header-y += poll.h
+header-y += posix_types.h
+header-y += ptrace.h
+header-y += resource.h
+header-y += sembuf.h
+header-y += setup.h
+header-y += sgidefs.h
+header-y += shmbuf.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += socket.h
+header-y += sockios.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += sysmips.h
+header-y += termbits.h
+header-y += termios.h
+header-y += types.h
+header-y += unistd.h
diff --git a/arch/mips/include/asm/auxvec.h b/arch/mips/include/uapi/asm/auxvec.h
index 7cf7f2d2194..7cf7f2d2194 100644
--- a/arch/mips/include/asm/auxvec.h
+++ b/arch/mips/include/uapi/asm/auxvec.h
diff --git a/arch/mips/include/asm/bitsperlong.h b/arch/mips/include/uapi/asm/bitsperlong.h
index 3e4c10a8e78..3e4c10a8e78 100644
--- a/arch/mips/include/asm/bitsperlong.h
+++ b/arch/mips/include/uapi/asm/bitsperlong.h
diff --git a/arch/mips/include/asm/byteorder.h b/arch/mips/include/uapi/asm/byteorder.h
index 9579051ff1c..9579051ff1c 100644
--- a/arch/mips/include/asm/byteorder.h
+++ b/arch/mips/include/uapi/asm/byteorder.h
diff --git a/arch/mips/include/asm/cachectl.h b/arch/mips/include/uapi/asm/cachectl.h
index f3ce721861d..f3ce721861d 100644
--- a/arch/mips/include/asm/cachectl.h
+++ b/arch/mips/include/uapi/asm/cachectl.h
diff --git a/arch/mips/include/uapi/asm/errno.h b/arch/mips/include/uapi/asm/errno.h
new file mode 100644
index 00000000000..bd67b15042e
--- /dev/null
+++ b/arch/mips/include/uapi/asm/errno.h
@@ -0,0 +1,129 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 1999, 2001, 2002 by Ralf Baechle
+ */
+#ifndef _UAPI_ASM_ERRNO_H
+#define _UAPI_ASM_ERRNO_H
+
+/*
+ * These error numbers are intended to be MIPS ABI compatible
+ */
+
+#include <asm-generic/errno-base.h>
+
+#define	ENOMSG		35	/* No message of desired type */
+#define	EIDRM		36	/* Identifier removed */
+#define	ECHRNG		37	/* Channel number out of range */
+#define	EL2NSYNC	38	/* Level 2 not synchronized */
+#define	EL3HLT		39	/* Level 3 halted */
+#define	EL3RST		40	/* Level 3 reset */
+#define	ELNRNG		41	/* Link number out of range */
+#define	EUNATCH		42	/* Protocol driver not attached */
+#define	ENOCSI		43	/* No CSI structure available */
+#define	EL2HLT		44	/* Level 2 halted */
+#define	EDEADLK		45	/* Resource deadlock would occur */
+#define	ENOLCK		46	/* No record locks available */
+#define	EBADE		50	/* Invalid exchange */
+#define	EBADR		51	/* Invalid request descriptor */
+#define	EXFULL		52	/* Exchange full */
+#define	ENOANO		53	/* No anode */
+#define	EBADRQC		54	/* Invalid request code */
+#define	EBADSLT		55	/* Invalid slot */
+#define	EDEADLOCK	56	/* File locking deadlock error */
+#define	EBFONT		59	/* Bad font file format */
+#define	ENOSTR		60	/* Device not a stream */
+#define	ENODATA		61	/* No data available */
+#define	ETIME		62	/* Timer expired */
+#define	ENOSR		63	/* Out of streams resources */
+#define	ENONET		64	/* Machine is not on the network */
+#define	ENOPKG		65	/* Package not installed */
+#define	EREMOTE		66	/* Object is remote */
+#define	ENOLINK		67	/* Link has been severed */
+#define	EADV		68	/* Advertise error */
+#define	ESRMNT		69	/* Srmount error */
+#define	ECOMM		70	/* Communication error on send */
+#define	EPROTO		71	/* Protocol error */
+#define	EDOTDOT		73	/* RFS specific error */
+#define	EMULTIHOP	74	/* Multihop attempted */
+#define	EBADMSG		77	/* Not a data message */
+#define	ENAMETOOLONG	78	/* File name too long */
+#define	EOVERFLOW	79	/* Value too large for defined data type */
+#define	ENOTUNIQ	80	/* Name not unique on network */
+#define	EBADFD		81	/* File descriptor in bad state */
+#define	EREMCHG		82	/* Remote address changed */
+#define	ELIBACC		83	/* Can not access a needed shared library */
+#define	ELIBBAD		84	/* Accessing a corrupted shared library */
+#define	ELIBSCN		85	/* .lib section in a.out corrupted */
+#define	ELIBMAX		86	/* Attempting to link in too many shared libraries */
+#define	ELIBEXEC	87	/* Cannot exec a shared library directly */
+#define	EILSEQ		88	/* Illegal byte sequence */
+#define	ENOSYS		89	/* Function not implemented */
+#define	ELOOP		90	/* Too many symbolic links encountered */
+#define	ERESTART	91	/* Interrupted system call should be restarted */
+#define	ESTRPIPE	92	/* Streams pipe error */
+#define	ENOTEMPTY	93	/* Directory not empty */
+#define	EUSERS		94	/* Too many users */
+#define	ENOTSOCK	95	/* Socket operation on non-socket */
+#define	EDESTADDRREQ	96	/* Destination address required */
+#define	EMSGSIZE	97	/* Message too long */
+#define	EPROTOTYPE	98	/* Protocol wrong type for socket */
+#define	ENOPROTOOPT	99	/* Protocol not available */
+#define	EPROTONOSUPPORT	120	/* Protocol not supported */
+#define	ESOCKTNOSUPPORT	121	/* Socket type not supported */
+#define	EOPNOTSUPP	122	/* Operation not supported on transport endpoint */
+#define	EPFNOSUPPORT	123	/* Protocol family not supported */
+#define	EAFNOSUPPORT	124	/* Address family not supported by protocol */
+#define	EADDRINUSE	125	/* Address already in use */
+#define	EADDRNOTAVAIL	126	/* Cannot assign requested address */
+#define	ENETDOWN	127	/* Network is down */
+#define	ENETUNREACH	128	/* Network is unreachable */
+#define	ENETRESET	129	/* Network dropped connection because of reset */
+#define	ECONNABORTED	130	/* Software caused connection abort */
+#define	ECONNRESET	131	/* Connection reset by peer */
+#define	ENOBUFS		132	/* No buffer space available */
+#define	EISCONN		133	/* Transport endpoint is already connected */
+#define	ENOTCONN	134	/* Transport endpoint is not connected */
+#define	EUCLEAN		135	/* Structure needs cleaning */
+#define	ENOTNAM		137	/* Not a XENIX named type file */
+#define	ENAVAIL		138	/* No XENIX semaphores available */
+#define	EISNAM		139	/* Is a named type file */
+#define	EREMOTEIO	140	/* Remote I/O error */
+#define EINIT		141	/* Reserved */
+#define EREMDEV		142	/* Error 142 */
+#define	ESHUTDOWN	143	/* Cannot send after transport endpoint shutdown */
+#define	ETOOMANYREFS	144	/* Too many references: cannot splice */
+#define	ETIMEDOUT	145	/* Connection timed out */
+#define	ECONNREFUSED	146	/* Connection refused */
+#define	EHOSTDOWN	147	/* Host is down */
+#define	EHOSTUNREACH	148	/* No route to host */
+#define	EWOULDBLOCK	EAGAIN	/* Operation would block */
+#define	EALREADY	149	/* Operation already in progress */
+#define	EINPROGRESS	150	/* Operation now in progress */
+#define	ESTALE		151	/* Stale NFS file handle */
+#define ECANCELED	158	/* AIO operation canceled */
+
+/*
+ * These error are Linux extensions.
+ */
+#define ENOMEDIUM	159	/* No medium found */
+#define EMEDIUMTYPE	160	/* Wrong medium type */
+#define	ENOKEY		161	/* Required key not available */
+#define	EKEYEXPIRED	162	/* Key has expired */
+#define	EKEYREVOKED	163	/* Key has been revoked */
+#define	EKEYREJECTED	164	/* Key was rejected by service */
+
+/* for robust mutexes */
+#define	EOWNERDEAD	165	/* Owner died */
+#define	ENOTRECOVERABLE	166	/* State not recoverable */
+
+#define	ERFKILL		167	/* Operation not possible due to RF-kill */
+
+#define EHWPOISON	168	/* Memory page has hardware error */
+
+#define EDQUOT		1133	/* Quota exceeded */
+
+
+#endif /* _UAPI_ASM_ERRNO_H */
diff --git a/arch/mips/include/asm/fcntl.h b/arch/mips/include/uapi/asm/fcntl.h
index 75eddedcfc3..75eddedcfc3 100644
--- a/arch/mips/include/asm/fcntl.h
+++ b/arch/mips/include/uapi/asm/fcntl.h
diff --git a/arch/mips/include/asm/ioctl.h b/arch/mips/include/uapi/asm/ioctl.h
index c515a1a4c47..c515a1a4c47 100644
--- a/arch/mips/include/asm/ioctl.h
+++ b/arch/mips/include/uapi/asm/ioctl.h
diff --git a/arch/mips/include/asm/ioctls.h b/arch/mips/include/uapi/asm/ioctls.h
index 92403c3d600..92403c3d600 100644
--- a/arch/mips/include/asm/ioctls.h
+++ b/arch/mips/include/uapi/asm/ioctls.h
diff --git a/arch/mips/include/asm/ipcbuf.h b/arch/mips/include/uapi/asm/ipcbuf.h
index 84c7e51cb6d..84c7e51cb6d 100644
--- a/arch/mips/include/asm/ipcbuf.h
+++ b/arch/mips/include/uapi/asm/ipcbuf.h
diff --git a/arch/mips/include/asm/kvm_para.h b/arch/mips/include/uapi/asm/kvm_para.h
index 14fab8f0b95..14fab8f0b95 100644
--- a/arch/mips/include/asm/kvm_para.h
+++ b/arch/mips/include/uapi/asm/kvm_para.h
diff --git a/arch/mips/include/asm/mman.h b/arch/mips/include/uapi/asm/mman.h
index 46d3da0d4b9..46d3da0d4b9 100644
--- a/arch/mips/include/asm/mman.h
+++ b/arch/mips/include/uapi/asm/mman.h
diff --git a/arch/mips/include/asm/msgbuf.h b/arch/mips/include/uapi/asm/msgbuf.h
index 0d6c7f14de3..0d6c7f14de3 100644
--- a/arch/mips/include/asm/msgbuf.h
+++ b/arch/mips/include/uapi/asm/msgbuf.h
diff --git a/arch/mips/include/asm/param.h b/arch/mips/include/uapi/asm/param.h
index da3920fce9a..da3920fce9a 100644
--- a/arch/mips/include/asm/param.h
+++ b/arch/mips/include/uapi/asm/param.h
diff --git a/arch/mips/include/asm/poll.h b/arch/mips/include/uapi/asm/poll.h
index 47b95208043..47b95208043 100644
--- a/arch/mips/include/asm/poll.h
+++ b/arch/mips/include/uapi/asm/poll.h
diff --git a/arch/mips/include/asm/posix_types.h b/arch/mips/include/uapi/asm/posix_types.h
index fa03ec3fbf8..fa03ec3fbf8 100644
--- a/arch/mips/include/asm/posix_types.h
+++ b/arch/mips/include/uapi/asm/posix_types.h
diff --git a/arch/mips/include/uapi/asm/ptrace.h b/arch/mips/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..1bc1f52f40d
--- /dev/null
+++ b/arch/mips/include/uapi/asm/ptrace.h
@@ -0,0 +1,116 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _UAPI_ASM_PTRACE_H
+#define _UAPI_ASM_PTRACE_H
+
+/* 0 - 31 are integer registers, 32 - 63 are fp registers.  */
+#define FPR_BASE	32
+#define PC		64
+#define CAUSE		65
+#define BADVADDR	66
+#define MMHI		67
+#define MMLO		68
+#define FPC_CSR		69
+#define FPC_EIR		70
+#define DSP_BASE	71		/* 3 more hi / lo register pairs */
+#define DSP_CONTROL	77
+#define ACX		78
+
+/*
+ * This struct defines the way the registers are stored on the stack during a
+ * system call/exception. As usual the registers k0/k1 aren't being saved.
+ */
+struct pt_regs {
+#ifdef CONFIG_32BIT
+	/* Pad bytes for argument save space on the stack. */
+	unsigned long pad0[6];
+#endif
+
+	/* Saved main processor registers. */
+	unsigned long regs[32];
+
+	/* Saved special registers. */
+	unsigned long cp0_status;
+	unsigned long hi;
+	unsigned long lo;
+#ifdef CONFIG_CPU_HAS_SMARTMIPS
+	unsigned long acx;
+#endif
+	unsigned long cp0_badvaddr;
+	unsigned long cp0_cause;
+	unsigned long cp0_epc;
+#ifdef CONFIG_MIPS_MT_SMTC
+	unsigned long cp0_tcstatus;
+#endif /* CONFIG_MIPS_MT_SMTC */
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+	unsigned long long mpl[3];        /* MTM{0,1,2} */
+	unsigned long long mtp[3];        /* MTP{0,1,2} */
+#endif
+} __attribute__ ((aligned (8)));
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS		12
+#define PTRACE_SETREGS		13
+#define PTRACE_GETFPREGS		14
+#define PTRACE_SETFPREGS		15
+/* #define PTRACE_GETFPXREGS		18 */
+/* #define PTRACE_SETFPXREGS		19 */
+
+#define PTRACE_OLDSETOPTIONS	21
+
+#define PTRACE_GET_THREAD_AREA	25
+#define PTRACE_SET_THREAD_AREA	26
+
+/* Calls to trace a 64bit program from a 32bit program.  */
+#define PTRACE_PEEKTEXT_3264	0xc0
+#define PTRACE_PEEKDATA_3264	0xc1
+#define PTRACE_POKETEXT_3264	0xc2
+#define PTRACE_POKEDATA_3264	0xc3
+#define PTRACE_GET_THREAD_AREA_3264	0xc4
+
+/* Read and write watchpoint registers.  */
+enum pt_watch_style {
+	pt_watch_style_mips32,
+	pt_watch_style_mips64
+};
+struct mips32_watch_regs {
+	unsigned int watchlo[8];
+	/* Lower 16 bits of watchhi. */
+	unsigned short watchhi[8];
+	/* Valid mask and I R W bits.
+	 * bit 0 -- 1 if W bit is usable.
+	 * bit 1 -- 1 if R bit is usable.
+	 * bit 2 -- 1 if I bit is usable.
+	 * bits 3 - 11 -- Valid watchhi mask bits.
+	 */
+	unsigned short watch_masks[8];
+	/* The number of valid watch register pairs.  */
+	unsigned int num_valid;
+} __attribute__((aligned(8)));
+
+struct mips64_watch_regs {
+	unsigned long long watchlo[8];
+	unsigned short watchhi[8];
+	unsigned short watch_masks[8];
+	unsigned int num_valid;
+} __attribute__((aligned(8)));
+
+struct pt_watch_regs {
+	enum pt_watch_style style;
+	union {
+		struct mips32_watch_regs mips32;
+		struct mips64_watch_regs mips64;
+	};
+};
+
+#define PTRACE_GET_WATCH_REGS	0xd0
+#define PTRACE_SET_WATCH_REGS	0xd1
+
+
+#endif /* _UAPI_ASM_PTRACE_H */
diff --git a/arch/mips/include/asm/resource.h b/arch/mips/include/uapi/asm/resource.h
index 87cb3085269..87cb3085269 100644
--- a/arch/mips/include/asm/resource.h
+++ b/arch/mips/include/uapi/asm/resource.h
diff --git a/arch/mips/include/asm/sembuf.h b/arch/mips/include/uapi/asm/sembuf.h
index 7281a4decaa..7281a4decaa 100644
--- a/arch/mips/include/asm/sembuf.h
+++ b/arch/mips/include/uapi/asm/sembuf.h
diff --git a/arch/mips/include/uapi/asm/setup.h b/arch/mips/include/uapi/asm/setup.h
new file mode 100644
index 00000000000..93f237bb135
--- /dev/null
+++ b/arch/mips/include/uapi/asm/setup.h
@@ -0,0 +1,7 @@
+#ifndef _UAPI_MIPS_SETUP_H
+#define _UAPI_MIPS_SETUP_H
+
+#define COMMAND_LINE_SIZE	4096
+
+
+#endif /* _UAPI_MIPS_SETUP_H */
diff --git a/arch/mips/include/asm/sgidefs.h b/arch/mips/include/uapi/asm/sgidefs.h
index 876442fcfb3..876442fcfb3 100644
--- a/arch/mips/include/asm/sgidefs.h
+++ b/arch/mips/include/uapi/asm/sgidefs.h
diff --git a/arch/mips/include/asm/shmbuf.h b/arch/mips/include/uapi/asm/shmbuf.h
index f994438277b..f994438277b 100644
--- a/arch/mips/include/asm/shmbuf.h
+++ b/arch/mips/include/uapi/asm/shmbuf.h
diff --git a/arch/mips/include/uapi/asm/sigcontext.h b/arch/mips/include/uapi/asm/sigcontext.h
new file mode 100644
index 00000000000..6c9906f59c6
--- /dev/null
+++ b/arch/mips/include/uapi/asm/sigcontext.h
@@ -0,0 +1,78 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1996, 1997, 1999 by Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#ifndef _UAPI_ASM_SIGCONTEXT_H
+#define _UAPI_ASM_SIGCONTEXT_H
+
+#include <linux/types.h>
+#include <asm/sgidefs.h>
+
+#if _MIPS_SIM == _MIPS_SIM_ABI32
+
+/*
+ * Keep this struct definition in sync with the sigcontext fragment
+ * in arch/mips/tools/offset.c
+ */
+struct sigcontext {
+	unsigned int		sc_regmask;	/* Unused */
+	unsigned int		sc_status;	/* Unused */
+	unsigned long long	sc_pc;
+	unsigned long long	sc_regs[32];
+	unsigned long long	sc_fpregs[32];
+	unsigned int		sc_acx;		/* Was sc_ownedfp */
+	unsigned int		sc_fpc_csr;
+	unsigned int		sc_fpc_eir;	/* Unused */
+	unsigned int		sc_used_math;
+	unsigned int		sc_dsp;		/* dsp status, was sc_ssflags */
+	unsigned long long	sc_mdhi;
+	unsigned long long	sc_mdlo;
+	unsigned long		sc_hi1;		/* Was sc_cause */
+	unsigned long		sc_lo1;		/* Was sc_badvaddr */
+	unsigned long		sc_hi2;		/* Was sc_sigset[4] */
+	unsigned long		sc_lo2;
+	unsigned long		sc_hi3;
+	unsigned long		sc_lo3;
+};
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
+
+#include <linux/posix_types.h>
+/*
+ * Keep this struct definition in sync with the sigcontext fragment
+ * in arch/mips/tools/offset.c
+ *
+ * Warning: this structure illdefined with sc_badvaddr being just an unsigned
+ * int so it was changed to unsigned long in 2.6.0-test1.  This may break
+ * binary compatibility - no prisoners.
+ * DSP ASE in 2.6.12-rc4.  Turn sc_mdhi and sc_mdlo into an array of four
+ * entries, add sc_dsp and sc_reserved for padding.  No prisoners.
+ */
+struct sigcontext {
+	__u64	sc_regs[32];
+	__u64	sc_fpregs[32];
+	__u64	sc_mdhi;
+	__u64	sc_hi1;
+	__u64	sc_hi2;
+	__u64	sc_hi3;
+	__u64	sc_mdlo;
+	__u64	sc_lo1;
+	__u64	sc_lo2;
+	__u64	sc_lo3;
+	__u64	sc_pc;
+	__u32	sc_fpc_csr;
+	__u32	sc_used_math;
+	__u32	sc_dsp;
+	__u32	sc_reserved;
+};
+
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
+
+#endif /* _UAPI_ASM_SIGCONTEXT_H */
diff --git a/arch/mips/include/uapi/asm/siginfo.h b/arch/mips/include/uapi/asm/siginfo.h
new file mode 100644
index 00000000000..73446508d84
--- /dev/null
+++ b/arch/mips/include/uapi/asm/siginfo.h
@@ -0,0 +1,114 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998, 1999, 2001, 2003 Ralf Baechle
+ * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
+ */
+#ifndef _UAPI_ASM_SIGINFO_H
+#define _UAPI_ASM_SIGINFO_H
+
+
+#define __ARCH_SIGEV_PREAMBLE_SIZE (sizeof(long) + 2*sizeof(int))
+#undef __ARCH_SI_TRAPNO	/* exception code needs to fill this ...  */
+
+#define HAVE_ARCH_SIGINFO_T
+
+/*
+ * We duplicate the generic versions - <asm-generic/siginfo.h> is just borked
+ * by design ...
+ */
+#define HAVE_ARCH_COPY_SIGINFO
+struct siginfo;
+
+/*
+ * Careful to keep union _sifields from shifting ...
+ */
+#ifdef CONFIG_32BIT
+#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int))
+#endif
+#ifdef CONFIG_64BIT
+#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
+#endif
+
+#include <asm-generic/siginfo.h>
+
+typedef struct siginfo {
+	int si_signo;
+	int si_code;
+	int si_errno;
+	int __pad0[SI_MAX_SIZE / sizeof(int) - SI_PAD_SIZE - 3];
+
+	union {
+		int _pad[SI_PAD_SIZE];
+
+		/* kill() */
+		struct {
+			pid_t _pid;		/* sender's pid */
+			__ARCH_SI_UID_T _uid;	/* sender's uid */
+		} _kill;
+
+		/* POSIX.1b timers */
+		struct {
+			timer_t _tid;		/* timer id */
+			int _overrun;		/* overrun count */
+			char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
+			sigval_t _sigval;	/* same as below */
+			int _sys_private;       /* not to be passed to user */
+		} _timer;
+
+		/* POSIX.1b signals */
+		struct {
+			pid_t _pid;		/* sender's pid */
+			__ARCH_SI_UID_T _uid;	/* sender's uid */
+			sigval_t _sigval;
+		} _rt;
+
+		/* SIGCHLD */
+		struct {
+			pid_t _pid;		/* which child */
+			__ARCH_SI_UID_T _uid;	/* sender's uid */
+			int _status;		/* exit code */
+			clock_t _utime;
+			clock_t _stime;
+		} _sigchld;
+
+		/* IRIX SIGCHLD */
+		struct {
+			pid_t _pid;		/* which child */
+			clock_t _utime;
+			int _status;		/* exit code */
+			clock_t _stime;
+		} _irix_sigchld;
+
+		/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
+		struct {
+			void __user *_addr; /* faulting insn/memory ref. */
+#ifdef __ARCH_SI_TRAPNO
+			int _trapno;	/* TRAP # which caused the signal */
+#endif
+			short _addr_lsb;
+		} _sigfault;
+
+		/* SIGPOLL, SIGXFSZ (To do ...)  */
+		struct {
+			__ARCH_SI_BAND_T _band;	/* POLL_IN, POLL_OUT, POLL_MSG */
+			int _fd;
+		} _sigpoll;
+	} _sifields;
+} siginfo_t;
+
+/*
+ * si_code values
+ * Again these have been chosen to be IRIX compatible.
+ */
+#undef SI_ASYNCIO
+#undef SI_TIMER
+#undef SI_MESGQ
+#define SI_ASYNCIO	-2	/* sent by AIO completion */
+#define SI_TIMER __SI_CODE(__SI_TIMER, -3) /* sent by timer expiration */
+#define SI_MESGQ __SI_CODE(__SI_MESGQ, -4) /* sent by real time mesq state change */
+
+
+#endif /* _UAPI_ASM_SIGINFO_H */
diff --git a/arch/mips/include/uapi/asm/signal.h b/arch/mips/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..3f1237c6c80
--- /dev/null
+++ b/arch/mips/include/uapi/asm/signal.h
@@ -0,0 +1,123 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 96, 97, 98, 99, 2003 by Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#ifndef _UAPI_ASM_SIGNAL_H
+#define _UAPI_ASM_SIGNAL_H
+
+#include <linux/types.h>
+
+#define _NSIG		128
+#define _NSIG_BPW	(sizeof(unsigned long) * 8)
+#define _NSIG_WORDS	(_NSIG / _NSIG_BPW)
+
+typedef struct {
+	unsigned long sig[_NSIG_WORDS];
+} sigset_t;
+
+typedef unsigned long old_sigset_t;		/* at least 32 bits */
+
+#define SIGHUP		 1	/* Hangup (POSIX).  */
+#define SIGINT		 2	/* Interrupt (ANSI).  */
+#define SIGQUIT		 3	/* Quit (POSIX).  */
+#define SIGILL		 4	/* Illegal instruction (ANSI).  */
+#define SIGTRAP		 5	/* Trace trap (POSIX).  */
+#define SIGIOT		 6	/* IOT trap (4.2 BSD).  */
+#define SIGABRT		 SIGIOT	/* Abort (ANSI).  */
+#define SIGEMT		 7
+#define SIGFPE		 8	/* Floating-point exception (ANSI).  */
+#define SIGKILL		 9	/* Kill, unblockable (POSIX).  */
+#define SIGBUS		10	/* BUS error (4.2 BSD).  */
+#define SIGSEGV		11	/* Segmentation violation (ANSI).  */
+#define SIGSYS		12
+#define SIGPIPE		13	/* Broken pipe (POSIX).  */
+#define SIGALRM		14	/* Alarm clock (POSIX).  */
+#define SIGTERM		15	/* Termination (ANSI).  */
+#define SIGUSR1		16	/* User-defined signal 1 (POSIX).  */
+#define SIGUSR2		17	/* User-defined signal 2 (POSIX).  */
+#define SIGCHLD		18	/* Child status has changed (POSIX).  */
+#define SIGCLD		SIGCHLD	/* Same as SIGCHLD (System V).  */
+#define SIGPWR		19	/* Power failure restart (System V).  */
+#define SIGWINCH	20	/* Window size change (4.3 BSD, Sun).  */
+#define SIGURG		21	/* Urgent condition on socket (4.2 BSD).  */
+#define SIGIO		22	/* I/O now possible (4.2 BSD).  */
+#define SIGPOLL		SIGIO	/* Pollable event occurred (System V).  */
+#define SIGSTOP		23	/* Stop, unblockable (POSIX).  */
+#define SIGTSTP		24	/* Keyboard stop (POSIX).  */
+#define SIGCONT		25	/* Continue (POSIX).  */
+#define SIGTTIN		26	/* Background read from tty (POSIX).  */
+#define SIGTTOU		27	/* Background write to tty (POSIX).  */
+#define SIGVTALRM	28	/* Virtual alarm clock (4.2 BSD).  */
+#define SIGPROF		29	/* Profiling alarm clock (4.2 BSD).  */
+#define SIGXCPU		30	/* CPU limit exceeded (4.2 BSD).  */
+#define SIGXFSZ		31	/* File size limit exceeded (4.2 BSD).  */
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN	32
+#define SIGRTMAX	_NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_ONSTACK	0x08000000
+#define SA_RESETHAND	0x80000000
+#define SA_RESTART	0x10000000
+#define SA_SIGINFO	0x00000008
+#define SA_NODEFER	0x40000000
+#define SA_NOCLDWAIT	0x00010000
+#define SA_NOCLDSTOP	0x00000001
+
+#define SA_NOMASK	SA_NODEFER
+#define SA_ONESHOT	SA_RESETHAND
+
+#define SA_RESTORER	0x04000000	/* Only for o32 */
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK     1
+#define SS_DISABLE     2
+
+#define MINSIGSTKSZ    2048
+#define SIGSTKSZ       8192
+
+
+#define SIG_BLOCK	1	/* for blocking signals */
+#define SIG_UNBLOCK	2	/* for unblocking signals */
+#define SIG_SETMASK	3	/* for setting the signal mask */
+
+#include <asm-generic/signal-defs.h>
+
+struct sigaction {
+	unsigned int	sa_flags;
+	__sighandler_t	sa_handler;
+	sigset_t	sa_mask;
+};
+
+struct k_sigaction {
+	struct sigaction sa;
+};
+
+/* IRIX compatible stack_t  */
+typedef struct sigaltstack {
+	void __user *ss_sp;
+	size_t ss_size;
+	int ss_flags;
+} stack_t;
+
+
+#endif /* _UAPI_ASM_SIGNAL_H */
diff --git a/arch/mips/include/uapi/asm/socket.h b/arch/mips/include/uapi/asm/socket.h
new file mode 100644
index 00000000000..c5ed59549cb
--- /dev/null
+++ b/arch/mips/include/uapi/asm/socket.h
@@ -0,0 +1,93 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1997, 1999, 2000, 2001 Ralf Baechle
+ * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
+ */
+#ifndef _UAPI_ASM_SOCKET_H
+#define _UAPI_ASM_SOCKET_H
+
+#include <asm/sockios.h>
+
+/*
+ * For setsockopt(2)
+ *
+ * This defines are ABI conformant as far as Linux supports these ...
+ */
+#define SOL_SOCKET	0xffff
+
+#define SO_DEBUG	0x0001	/* Record debugging information.  */
+#define SO_REUSEADDR	0x0004	/* Allow reuse of local addresses.  */
+#define SO_KEEPALIVE	0x0008	/* Keep connections alive and send
+				   SIGPIPE when they die.  */
+#define SO_DONTROUTE	0x0010	/* Don't do local routing.  */
+#define SO_BROADCAST	0x0020	/* Allow transmission of
+				   broadcast messages.  */
+#define SO_LINGER	0x0080	/* Block on close of a reliable
+				   socket to transmit pending data.  */
+#define SO_OOBINLINE 0x0100	/* Receive out-of-band data in-band.  */
+#if 0
+To add: #define SO_REUSEPORT 0x0200	/* Allow local address and port reuse.  */
+#endif
+
+#define SO_TYPE		0x1008	/* Compatible name for SO_STYLE.  */
+#define SO_STYLE	SO_TYPE	/* Synonym */
+#define SO_ERROR	0x1007	/* get error status and clear */
+#define SO_SNDBUF	0x1001	/* Send buffer size. */
+#define SO_RCVBUF	0x1002	/* Receive buffer. */
+#define SO_SNDLOWAT	0x1003	/* send low-water mark */
+#define SO_RCVLOWAT	0x1004	/* receive low-water mark */
+#define SO_SNDTIMEO	0x1005	/* send timeout */
+#define SO_RCVTIMEO 	0x1006	/* receive timeout */
+#define SO_ACCEPTCONN	0x1009
+#define SO_PROTOCOL	0x1028	/* protocol type */
+#define SO_DOMAIN	0x1029	/* domain/socket family */
+
+/* linux-specific, might as well be the same as on i386 */
+#define SO_NO_CHECK	11
+#define SO_PRIORITY	12
+#define SO_BSDCOMPAT	14
+
+#define SO_PASSCRED	17
+#define SO_PEERCRED	18
+
+/* Security levels - as per NRL IPv6 - don't actually do anything */
+#define SO_SECURITY_AUTHENTICATION		22
+#define SO_SECURITY_ENCRYPTION_TRANSPORT	23
+#define SO_SECURITY_ENCRYPTION_NETWORK		24
+
+#define SO_BINDTODEVICE		25
+
+/* Socket filtering */
+#define SO_ATTACH_FILTER        26
+#define SO_DETACH_FILTER        27
+
+#define SO_PEERNAME             28
+#define SO_TIMESTAMP		29
+#define SCM_TIMESTAMP		SO_TIMESTAMP
+
+#define SO_PEERSEC		30
+#define SO_SNDBUFFORCE		31
+#define SO_RCVBUFFORCE		33
+#define SO_PASSSEC		34
+#define SO_TIMESTAMPNS		35
+#define SCM_TIMESTAMPNS		SO_TIMESTAMPNS
+
+#define SO_MARK			36
+
+#define SO_TIMESTAMPING		37
+#define SCM_TIMESTAMPING	SO_TIMESTAMPING
+
+#define SO_RXQ_OVFL             40
+
+#define SO_WIFI_STATUS		41
+#define SCM_WIFI_STATUS		SO_WIFI_STATUS
+#define SO_PEEK_OFF		42
+
+/* Instruct lower device to use last 4-bytes of skb data as FCS */
+#define SO_NOFCS		43
+
+
+#endif /* _UAPI_ASM_SOCKET_H */
diff --git a/arch/mips/include/asm/sockios.h b/arch/mips/include/uapi/asm/sockios.h
index ed1a5f78d22..ed1a5f78d22 100644
--- a/arch/mips/include/asm/sockios.h
+++ b/arch/mips/include/uapi/asm/sockios.h
diff --git a/arch/mips/include/asm/stat.h b/arch/mips/include/uapi/asm/stat.h
index fe9a4c3ec5a..fe9a4c3ec5a 100644
--- a/arch/mips/include/asm/stat.h
+++ b/arch/mips/include/uapi/asm/stat.h
diff --git a/arch/mips/include/asm/statfs.h b/arch/mips/include/uapi/asm/statfs.h
index 0f805c7a42a..0f805c7a42a 100644
--- a/arch/mips/include/asm/statfs.h
+++ b/arch/mips/include/uapi/asm/statfs.h
diff --git a/arch/mips/include/asm/swab.h b/arch/mips/include/uapi/asm/swab.h
index 97c2f81b4b4..97c2f81b4b4 100644
--- a/arch/mips/include/asm/swab.h
+++ b/arch/mips/include/uapi/asm/swab.h
diff --git a/arch/mips/include/asm/sysmips.h b/arch/mips/include/uapi/asm/sysmips.h
index 4f47b7d6a5f..4f47b7d6a5f 100644
--- a/arch/mips/include/asm/sysmips.h
+++ b/arch/mips/include/uapi/asm/sysmips.h
diff --git a/arch/mips/include/asm/termbits.h b/arch/mips/include/uapi/asm/termbits.h
index 76630b396fa..76630b396fa 100644
--- a/arch/mips/include/asm/termbits.h
+++ b/arch/mips/include/uapi/asm/termbits.h
diff --git a/arch/mips/include/uapi/asm/termios.h b/arch/mips/include/uapi/asm/termios.h
new file mode 100644
index 00000000000..574fbdfb720
--- /dev/null
+++ b/arch/mips/include/uapi/asm/termios.h
@@ -0,0 +1,80 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 1996, 2000, 2001 by Ralf Baechle
+ * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
+ */
+#ifndef _UAPI_ASM_TERMIOS_H
+#define _UAPI_ASM_TERMIOS_H
+
+#include <linux/errno.h>
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct sgttyb {
+	char	sg_ispeed;
+	char	sg_ospeed;
+	char	sg_erase;
+	char	sg_kill;
+	int	sg_flags;	/* SGI special - int, not short */
+};
+
+struct tchars {
+	char	t_intrc;
+	char	t_quitc;
+	char	t_startc;
+	char	t_stopc;
+	char	t_eofc;
+	char	t_brkc;
+};
+
+struct ltchars {
+        char    t_suspc;        /* stop process signal */
+        char    t_dsuspc;       /* delayed stop process signal */
+        char    t_rprntc;       /* reprint line */
+        char    t_flushc;       /* flush output (toggles) */
+        char    t_werasc;       /* word erase */
+        char    t_lnextc;       /* literal next character */
+};
+
+/* TIOCGSIZE, TIOCSSIZE not defined yet.  Only needed for SunOS source
+   compatibility anyway ... */
+
+struct winsize {
+	unsigned short ws_row;
+	unsigned short ws_col;
+	unsigned short ws_xpixel;
+	unsigned short ws_ypixel;
+};
+
+#define NCC	8
+struct termio {
+	unsigned short c_iflag;		/* input mode flags */
+	unsigned short c_oflag;		/* output mode flags */
+	unsigned short c_cflag;		/* control mode flags */
+	unsigned short c_lflag;		/* local mode flags */
+	char c_line;			/* line discipline */
+	unsigned char c_cc[NCCS];	/* control characters */
+};
+
+
+/* modem lines */
+#define TIOCM_LE	0x001		/* line enable */
+#define TIOCM_DTR	0x002		/* data terminal ready */
+#define TIOCM_RTS	0x004		/* request to send */
+#define TIOCM_ST	0x010		/* secondary transmit */
+#define TIOCM_SR	0x020		/* secondary receive */
+#define TIOCM_CTS	0x040		/* clear to send */
+#define TIOCM_CAR	0x100		/* carrier detect */
+#define TIOCM_CD	TIOCM_CAR
+#define TIOCM_RNG	0x200		/* ring */
+#define TIOCM_RI	TIOCM_RNG
+#define TIOCM_DSR	0x400		/* data set ready */
+#define TIOCM_OUT1	0x2000
+#define TIOCM_OUT2	0x4000
+#define TIOCM_LOOP	0x8000
+
+
+#endif /* _UAPI_ASM_TERMIOS_H */
diff --git a/arch/mips/include/uapi/asm/types.h b/arch/mips/include/uapi/asm/types.h
new file mode 100644
index 00000000000..7ac9d0baad8
--- /dev/null
+++ b/arch/mips/include/uapi/asm/types.h
@@ -0,0 +1,27 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994, 1995, 1996, 1999 by Ralf Baechle
+ * Copyright (C) 2008 Wind River Systems,
+ *   written by Ralf Baechle
+ * Copyright (C) 1999 Silicon Graphics, Inc.
+ */
+#ifndef _UAPI_ASM_TYPES_H
+#define _UAPI_ASM_TYPES_H
+
+/*
+ * We don't use int-l64.h for the kernel anymore but still use it for
+ * userspace to avoid code changes.
+ */
+#ifndef __KERNEL__
+# if _MIPS_SZLONG == 64
+#  include <asm-generic/int-l64.h>
+# else
+#  include <asm-generic/int-ll64.h>
+# endif
+#endif
+
+
+#endif /* _UAPI_ASM_TYPES_H */
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..cc98a9dcb01
--- /dev/null
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -0,0 +1,1035 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1995, 96, 97, 98, 99, 2000 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ *
+ * Changed system calls macros _syscall5 - _syscall7 to push args 5 to 7 onto
+ * the stack. Robin Farine for ACN S.A, Copyright (C) 1996 by ACN S.A
+ */
+#ifndef _UAPI_ASM_UNISTD_H
+#define _UAPI_ASM_UNISTD_H
+
+#include <asm/sgidefs.h>
+
+#if _MIPS_SIM == _MIPS_SIM_ABI32
+
+/*
+ * Linux o32 style syscalls are in the range from 4000 to 4999.
+ */
+#define __NR_Linux			4000
+#define __NR_syscall			(__NR_Linux +   0)
+#define __NR_exit			(__NR_Linux +   1)
+#define __NR_fork			(__NR_Linux +   2)
+#define __NR_read			(__NR_Linux +   3)
+#define __NR_write			(__NR_Linux +   4)
+#define __NR_open			(__NR_Linux +   5)
+#define __NR_close			(__NR_Linux +   6)
+#define __NR_waitpid			(__NR_Linux +   7)
+#define __NR_creat			(__NR_Linux +   8)
+#define __NR_link			(__NR_Linux +   9)
+#define __NR_unlink			(__NR_Linux +  10)
+#define __NR_execve			(__NR_Linux +  11)
+#define __NR_chdir			(__NR_Linux +  12)
+#define __NR_time			(__NR_Linux +  13)
+#define __NR_mknod			(__NR_Linux +  14)
+#define __NR_chmod			(__NR_Linux +  15)
+#define __NR_lchown			(__NR_Linux +  16)
+#define __NR_break			(__NR_Linux +  17)
+#define __NR_unused18			(__NR_Linux +  18)
+#define __NR_lseek			(__NR_Linux +  19)
+#define __NR_getpid			(__NR_Linux +  20)
+#define __NR_mount			(__NR_Linux +  21)
+#define __NR_umount			(__NR_Linux +  22)
+#define __NR_setuid			(__NR_Linux +  23)
+#define __NR_getuid			(__NR_Linux +  24)
+#define __NR_stime			(__NR_Linux +  25)
+#define __NR_ptrace			(__NR_Linux +  26)
+#define __NR_alarm			(__NR_Linux +  27)
+#define __NR_unused28			(__NR_Linux +  28)
+#define __NR_pause			(__NR_Linux +  29)
+#define __NR_utime			(__NR_Linux +  30)
+#define __NR_stty			(__NR_Linux +  31)
+#define __NR_gtty			(__NR_Linux +  32)
+#define __NR_access			(__NR_Linux +  33)
+#define __NR_nice			(__NR_Linux +  34)
+#define __NR_ftime			(__NR_Linux +  35)
+#define __NR_sync			(__NR_Linux +  36)
+#define __NR_kill			(__NR_Linux +  37)
+#define __NR_rename			(__NR_Linux +  38)
+#define __NR_mkdir			(__NR_Linux +  39)
+#define __NR_rmdir			(__NR_Linux +  40)
+#define __NR_dup			(__NR_Linux +  41)
+#define __NR_pipe			(__NR_Linux +  42)
+#define __NR_times			(__NR_Linux +  43)
+#define __NR_prof			(__NR_Linux +  44)
+#define __NR_brk			(__NR_Linux +  45)
+#define __NR_setgid			(__NR_Linux +  46)
+#define __NR_getgid			(__NR_Linux +  47)
+#define __NR_signal			(__NR_Linux +  48)
+#define __NR_geteuid			(__NR_Linux +  49)
+#define __NR_getegid			(__NR_Linux +  50)
+#define __NR_acct			(__NR_Linux +  51)
+#define __NR_umount2			(__NR_Linux +  52)
+#define __NR_lock			(__NR_Linux +  53)
+#define __NR_ioctl			(__NR_Linux +  54)
+#define __NR_fcntl			(__NR_Linux +  55)
+#define __NR_mpx			(__NR_Linux +  56)
+#define __NR_setpgid			(__NR_Linux +  57)
+#define __NR_ulimit			(__NR_Linux +  58)
+#define __NR_unused59			(__NR_Linux +  59)
+#define __NR_umask			(__NR_Linux +  60)
+#define __NR_chroot			(__NR_Linux +  61)
+#define __NR_ustat			(__NR_Linux +  62)
+#define __NR_dup2			(__NR_Linux +  63)
+#define __NR_getppid			(__NR_Linux +  64)
+#define __NR_getpgrp			(__NR_Linux +  65)
+#define __NR_setsid			(__NR_Linux +  66)
+#define __NR_sigaction			(__NR_Linux +  67)
+#define __NR_sgetmask			(__NR_Linux +  68)
+#define __NR_ssetmask			(__NR_Linux +  69)
+#define __NR_setreuid			(__NR_Linux +  70)
+#define __NR_setregid			(__NR_Linux +  71)
+#define __NR_sigsuspend			(__NR_Linux +  72)
+#define __NR_sigpending			(__NR_Linux +  73)
+#define __NR_sethostname		(__NR_Linux +  74)
+#define __NR_setrlimit			(__NR_Linux +  75)
+#define __NR_getrlimit			(__NR_Linux +  76)
+#define __NR_getrusage			(__NR_Linux +  77)
+#define __NR_gettimeofday		(__NR_Linux +  78)
+#define __NR_settimeofday		(__NR_Linux +  79)
+#define __NR_getgroups			(__NR_Linux +  80)
+#define __NR_setgroups			(__NR_Linux +  81)
+#define __NR_reserved82			(__NR_Linux +  82)
+#define __NR_symlink			(__NR_Linux +  83)
+#define __NR_unused84			(__NR_Linux +  84)
+#define __NR_readlink			(__NR_Linux +  85)
+#define __NR_uselib			(__NR_Linux +  86)
+#define __NR_swapon			(__NR_Linux +  87)
+#define __NR_reboot			(__NR_Linux +  88)
+#define __NR_readdir			(__NR_Linux +  89)
+#define __NR_mmap			(__NR_Linux +  90)
+#define __NR_munmap			(__NR_Linux +  91)
+#define __NR_truncate			(__NR_Linux +  92)
+#define __NR_ftruncate			(__NR_Linux +  93)
+#define __NR_fchmod			(__NR_Linux +  94)
+#define __NR_fchown			(__NR_Linux +  95)
+#define __NR_getpriority		(__NR_Linux +  96)
+#define __NR_setpriority		(__NR_Linux +  97)
+#define __NR_profil			(__NR_Linux +  98)
+#define __NR_statfs			(__NR_Linux +  99)
+#define __NR_fstatfs			(__NR_Linux + 100)
+#define __NR_ioperm			(__NR_Linux + 101)
+#define __NR_socketcall			(__NR_Linux + 102)
+#define __NR_syslog			(__NR_Linux + 103)
+#define __NR_setitimer			(__NR_Linux + 104)
+#define __NR_getitimer			(__NR_Linux + 105)
+#define __NR_stat			(__NR_Linux + 106)
+#define __NR_lstat			(__NR_Linux + 107)
+#define __NR_fstat			(__NR_Linux + 108)
+#define __NR_unused109			(__NR_Linux + 109)
+#define __NR_iopl			(__NR_Linux + 110)
+#define __NR_vhangup			(__NR_Linux + 111)
+#define __NR_idle			(__NR_Linux + 112)
+#define __NR_vm86			(__NR_Linux + 113)
+#define __NR_wait4			(__NR_Linux + 114)
+#define __NR_swapoff			(__NR_Linux + 115)
+#define __NR_sysinfo			(__NR_Linux + 116)
+#define __NR_ipc			(__NR_Linux + 117)
+#define __NR_fsync			(__NR_Linux + 118)
+#define __NR_sigreturn			(__NR_Linux + 119)
+#define __NR_clone			(__NR_Linux + 120)
+#define __NR_setdomainname		(__NR_Linux + 121)
+#define __NR_uname			(__NR_Linux + 122)
+#define __NR_modify_ldt			(__NR_Linux + 123)
+#define __NR_adjtimex			(__NR_Linux + 124)
+#define __NR_mprotect			(__NR_Linux + 125)
+#define __NR_sigprocmask		(__NR_Linux + 126)
+#define __NR_create_module		(__NR_Linux + 127)
+#define __NR_init_module		(__NR_Linux + 128)
+#define __NR_delete_module		(__NR_Linux + 129)
+#define __NR_get_kernel_syms		(__NR_Linux + 130)
+#define __NR_quotactl			(__NR_Linux + 131)
+#define __NR_getpgid			(__NR_Linux + 132)
+#define __NR_fchdir			(__NR_Linux + 133)
+#define __NR_bdflush			(__NR_Linux + 134)
+#define __NR_sysfs			(__NR_Linux + 135)
+#define __NR_personality		(__NR_Linux + 136)
+#define __NR_afs_syscall		(__NR_Linux + 137) /* Syscall for Andrew File System */
+#define __NR_setfsuid			(__NR_Linux + 138)
+#define __NR_setfsgid			(__NR_Linux + 139)
+#define __NR__llseek			(__NR_Linux + 140)
+#define __NR_getdents			(__NR_Linux + 141)
+#define __NR__newselect			(__NR_Linux + 142)
+#define __NR_flock			(__NR_Linux + 143)
+#define __NR_msync			(__NR_Linux + 144)
+#define __NR_readv			(__NR_Linux + 145)
+#define __NR_writev			(__NR_Linux + 146)
+#define __NR_cacheflush			(__NR_Linux + 147)
+#define __NR_cachectl			(__NR_Linux + 148)
+#define __NR_sysmips			(__NR_Linux + 149)
+#define __NR_unused150			(__NR_Linux + 150)
+#define __NR_getsid			(__NR_Linux + 151)
+#define __NR_fdatasync			(__NR_Linux + 152)
+#define __NR__sysctl			(__NR_Linux + 153)
+#define __NR_mlock			(__NR_Linux + 154)
+#define __NR_munlock			(__NR_Linux + 155)
+#define __NR_mlockall			(__NR_Linux + 156)
+#define __NR_munlockall			(__NR_Linux + 157)
+#define __NR_sched_setparam		(__NR_Linux + 158)
+#define __NR_sched_getparam		(__NR_Linux + 159)
+#define __NR_sched_setscheduler		(__NR_Linux + 160)
+#define __NR_sched_getscheduler		(__NR_Linux + 161)
+#define __NR_sched_yield		(__NR_Linux + 162)
+#define __NR_sched_get_priority_max	(__NR_Linux + 163)
+#define __NR_sched_get_priority_min	(__NR_Linux + 164)
+#define __NR_sched_rr_get_interval	(__NR_Linux + 165)
+#define __NR_nanosleep			(__NR_Linux + 166)
+#define __NR_mremap			(__NR_Linux + 167)
+#define __NR_accept			(__NR_Linux + 168)
+#define __NR_bind			(__NR_Linux + 169)
+#define __NR_connect			(__NR_Linux + 170)
+#define __NR_getpeername		(__NR_Linux + 171)
+#define __NR_getsockname		(__NR_Linux + 172)
+#define __NR_getsockopt			(__NR_Linux + 173)
+#define __NR_listen			(__NR_Linux + 174)
+#define __NR_recv			(__NR_Linux + 175)
+#define __NR_recvfrom			(__NR_Linux + 176)
+#define __NR_recvmsg			(__NR_Linux + 177)
+#define __NR_send			(__NR_Linux + 178)
+#define __NR_sendmsg			(__NR_Linux + 179)
+#define __NR_sendto			(__NR_Linux + 180)
+#define __NR_setsockopt			(__NR_Linux + 181)
+#define __NR_shutdown			(__NR_Linux + 182)
+#define __NR_socket			(__NR_Linux + 183)
+#define __NR_socketpair			(__NR_Linux + 184)
+#define __NR_setresuid			(__NR_Linux + 185)
+#define __NR_getresuid			(__NR_Linux + 186)
+#define __NR_query_module		(__NR_Linux + 187)
+#define __NR_poll			(__NR_Linux + 188)
+#define __NR_nfsservctl			(__NR_Linux + 189)
+#define __NR_setresgid			(__NR_Linux + 190)
+#define __NR_getresgid			(__NR_Linux + 191)
+#define __NR_prctl			(__NR_Linux + 192)
+#define __NR_rt_sigreturn		(__NR_Linux + 193)
+#define __NR_rt_sigaction		(__NR_Linux + 194)
+#define __NR_rt_sigprocmask		(__NR_Linux + 195)
+#define __NR_rt_sigpending		(__NR_Linux + 196)
+#define __NR_rt_sigtimedwait		(__NR_Linux + 197)
+#define __NR_rt_sigqueueinfo		(__NR_Linux + 198)
+#define __NR_rt_sigsuspend		(__NR_Linux + 199)
+#define __NR_pread64			(__NR_Linux + 200)
+#define __NR_pwrite64			(__NR_Linux + 201)
+#define __NR_chown			(__NR_Linux + 202)
+#define __NR_getcwd			(__NR_Linux + 203)
+#define __NR_capget			(__NR_Linux + 204)
+#define __NR_capset			(__NR_Linux + 205)
+#define __NR_sigaltstack		(__NR_Linux + 206)
+#define __NR_sendfile			(__NR_Linux + 207)
+#define __NR_getpmsg			(__NR_Linux + 208)
+#define __NR_putpmsg			(__NR_Linux + 209)
+#define __NR_mmap2			(__NR_Linux + 210)
+#define __NR_truncate64			(__NR_Linux + 211)
+#define __NR_ftruncate64		(__NR_Linux + 212)
+#define __NR_stat64			(__NR_Linux + 213)
+#define __NR_lstat64			(__NR_Linux + 214)
+#define __NR_fstat64			(__NR_Linux + 215)
+#define __NR_pivot_root			(__NR_Linux + 216)
+#define __NR_mincore			(__NR_Linux + 217)
+#define __NR_madvise			(__NR_Linux + 218)
+#define __NR_getdents64			(__NR_Linux + 219)
+#define __NR_fcntl64			(__NR_Linux + 220)
+#define __NR_reserved221		(__NR_Linux + 221)
+#define __NR_gettid			(__NR_Linux + 222)
+#define __NR_readahead			(__NR_Linux + 223)
+#define __NR_setxattr			(__NR_Linux + 224)
+#define __NR_lsetxattr			(__NR_Linux + 225)
+#define __NR_fsetxattr			(__NR_Linux + 226)
+#define __NR_getxattr			(__NR_Linux + 227)
+#define __NR_lgetxattr			(__NR_Linux + 228)
+#define __NR_fgetxattr			(__NR_Linux + 229)
+#define __NR_listxattr			(__NR_Linux + 230)
+#define __NR_llistxattr			(__NR_Linux + 231)
+#define __NR_flistxattr			(__NR_Linux + 232)
+#define __NR_removexattr		(__NR_Linux + 233)
+#define __NR_lremovexattr		(__NR_Linux + 234)
+#define __NR_fremovexattr		(__NR_Linux + 235)
+#define __NR_tkill			(__NR_Linux + 236)
+#define __NR_sendfile64			(__NR_Linux + 237)
+#define __NR_futex			(__NR_Linux + 238)
+#define __NR_sched_setaffinity		(__NR_Linux + 239)
+#define __NR_sched_getaffinity		(__NR_Linux + 240)
+#define __NR_io_setup			(__NR_Linux + 241)
+#define __NR_io_destroy			(__NR_Linux + 242)
+#define __NR_io_getevents		(__NR_Linux + 243)
+#define __NR_io_submit			(__NR_Linux + 244)
+#define __NR_io_cancel			(__NR_Linux + 245)
+#define __NR_exit_group			(__NR_Linux + 246)
+#define __NR_lookup_dcookie		(__NR_Linux + 247)
+#define __NR_epoll_create		(__NR_Linux + 248)
+#define __NR_epoll_ctl			(__NR_Linux + 249)
+#define __NR_epoll_wait			(__NR_Linux + 250)
+#define __NR_remap_file_pages		(__NR_Linux + 251)
+#define __NR_set_tid_address		(__NR_Linux + 252)
+#define __NR_restart_syscall		(__NR_Linux + 253)
+#define __NR_fadvise64			(__NR_Linux + 254)
+#define __NR_statfs64			(__NR_Linux + 255)
+#define __NR_fstatfs64			(__NR_Linux + 256)
+#define __NR_timer_create		(__NR_Linux + 257)
+#define __NR_timer_settime		(__NR_Linux + 258)
+#define __NR_timer_gettime		(__NR_Linux + 259)
+#define __NR_timer_getoverrun		(__NR_Linux + 260)
+#define __NR_timer_delete		(__NR_Linux + 261)
+#define __NR_clock_settime		(__NR_Linux + 262)
+#define __NR_clock_gettime		(__NR_Linux + 263)
+#define __NR_clock_getres		(__NR_Linux + 264)
+#define __NR_clock_nanosleep		(__NR_Linux + 265)
+#define __NR_tgkill			(__NR_Linux + 266)
+#define __NR_utimes			(__NR_Linux + 267)
+#define __NR_mbind			(__NR_Linux + 268)
+#define __NR_get_mempolicy		(__NR_Linux + 269)
+#define __NR_set_mempolicy		(__NR_Linux + 270)
+#define __NR_mq_open			(__NR_Linux + 271)
+#define __NR_mq_unlink			(__NR_Linux + 272)
+#define __NR_mq_timedsend		(__NR_Linux + 273)
+#define __NR_mq_timedreceive		(__NR_Linux + 274)
+#define __NR_mq_notify			(__NR_Linux + 275)
+#define __NR_mq_getsetattr		(__NR_Linux + 276)
+#define __NR_vserver			(__NR_Linux + 277)
+#define __NR_waitid			(__NR_Linux + 278)
+/* #define __NR_sys_setaltroot		(__NR_Linux + 279) */
+#define __NR_add_key			(__NR_Linux + 280)
+#define __NR_request_key		(__NR_Linux + 281)
+#define __NR_keyctl			(__NR_Linux + 282)
+#define __NR_set_thread_area		(__NR_Linux + 283)
+#define __NR_inotify_init		(__NR_Linux + 284)
+#define __NR_inotify_add_watch		(__NR_Linux + 285)
+#define __NR_inotify_rm_watch		(__NR_Linux + 286)
+#define __NR_migrate_pages		(__NR_Linux + 287)
+#define __NR_openat			(__NR_Linux + 288)
+#define __NR_mkdirat			(__NR_Linux + 289)
+#define __NR_mknodat			(__NR_Linux + 290)
+#define __NR_fchownat			(__NR_Linux + 291)
+#define __NR_futimesat			(__NR_Linux + 292)
+#define __NR_fstatat64			(__NR_Linux + 293)
+#define __NR_unlinkat			(__NR_Linux + 294)
+#define __NR_renameat			(__NR_Linux + 295)
+#define __NR_linkat			(__NR_Linux + 296)
+#define __NR_symlinkat			(__NR_Linux + 297)
+#define __NR_readlinkat			(__NR_Linux + 298)
+#define __NR_fchmodat			(__NR_Linux + 299)
+#define __NR_faccessat			(__NR_Linux + 300)
+#define __NR_pselect6			(__NR_Linux + 301)
+#define __NR_ppoll			(__NR_Linux + 302)
+#define __NR_unshare			(__NR_Linux + 303)
+#define __NR_splice			(__NR_Linux + 304)
+#define __NR_sync_file_range		(__NR_Linux + 305)
+#define __NR_tee			(__NR_Linux + 306)
+#define __NR_vmsplice			(__NR_Linux + 307)
+#define __NR_move_pages			(__NR_Linux + 308)
+#define __NR_set_robust_list		(__NR_Linux + 309)
+#define __NR_get_robust_list		(__NR_Linux + 310)
+#define __NR_kexec_load			(__NR_Linux + 311)
+#define __NR_getcpu			(__NR_Linux + 312)
+#define __NR_epoll_pwait		(__NR_Linux + 313)
+#define __NR_ioprio_set			(__NR_Linux + 314)
+#define __NR_ioprio_get			(__NR_Linux + 315)
+#define __NR_utimensat			(__NR_Linux + 316)
+#define __NR_signalfd			(__NR_Linux + 317)
+#define __NR_timerfd			(__NR_Linux + 318)
+#define __NR_eventfd			(__NR_Linux + 319)
+#define __NR_fallocate			(__NR_Linux + 320)
+#define __NR_timerfd_create		(__NR_Linux + 321)
+#define __NR_timerfd_gettime		(__NR_Linux + 322)
+#define __NR_timerfd_settime		(__NR_Linux + 323)
+#define __NR_signalfd4			(__NR_Linux + 324)
+#define __NR_eventfd2			(__NR_Linux + 325)
+#define __NR_epoll_create1		(__NR_Linux + 326)
+#define __NR_dup3			(__NR_Linux + 327)
+#define __NR_pipe2			(__NR_Linux + 328)
+#define __NR_inotify_init1		(__NR_Linux + 329)
+#define __NR_preadv			(__NR_Linux + 330)
+#define __NR_pwritev			(__NR_Linux + 331)
+#define __NR_rt_tgsigqueueinfo		(__NR_Linux + 332)
+#define __NR_perf_event_open		(__NR_Linux + 333)
+#define __NR_accept4			(__NR_Linux + 334)
+#define __NR_recvmmsg			(__NR_Linux + 335)
+#define __NR_fanotify_init		(__NR_Linux + 336)
+#define __NR_fanotify_mark		(__NR_Linux + 337)
+#define __NR_prlimit64			(__NR_Linux + 338)
+#define __NR_name_to_handle_at		(__NR_Linux + 339)
+#define __NR_open_by_handle_at		(__NR_Linux + 340)
+#define __NR_clock_adjtime		(__NR_Linux + 341)
+#define __NR_syncfs			(__NR_Linux + 342)
+#define __NR_sendmmsg			(__NR_Linux + 343)
+#define __NR_setns			(__NR_Linux + 344)
+#define __NR_process_vm_readv		(__NR_Linux + 345)
+#define __NR_process_vm_writev		(__NR_Linux + 346)
+#define __NR_kcmp			(__NR_Linux + 347)
+
+/*
+ * Offset of the last Linux o32 flavoured syscall
+ */
+#define __NR_Linux_syscalls		347
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
+
+#define __NR_O32_Linux			4000
+#define __NR_O32_Linux_syscalls		347
+
+#if _MIPS_SIM == _MIPS_SIM_ABI64
+
+/*
+ * Linux 64-bit syscalls are in the range from 5000 to 5999.
+ */
+#define __NR_Linux			5000
+#define __NR_read			(__NR_Linux +   0)
+#define __NR_write			(__NR_Linux +   1)
+#define __NR_open			(__NR_Linux +   2)
+#define __NR_close			(__NR_Linux +   3)
+#define __NR_stat			(__NR_Linux +   4)
+#define __NR_fstat			(__NR_Linux +   5)
+#define __NR_lstat			(__NR_Linux +   6)
+#define __NR_poll			(__NR_Linux +   7)
+#define __NR_lseek			(__NR_Linux +   8)
+#define __NR_mmap			(__NR_Linux +   9)
+#define __NR_mprotect			(__NR_Linux +  10)
+#define __NR_munmap			(__NR_Linux +  11)
+#define __NR_brk			(__NR_Linux +  12)
+#define __NR_rt_sigaction		(__NR_Linux +  13)
+#define __NR_rt_sigprocmask		(__NR_Linux +  14)
+#define __NR_ioctl			(__NR_Linux +  15)
+#define __NR_pread64			(__NR_Linux +  16)
+#define __NR_pwrite64			(__NR_Linux +  17)
+#define __NR_readv			(__NR_Linux +  18)
+#define __NR_writev			(__NR_Linux +  19)
+#define __NR_access			(__NR_Linux +  20)
+#define __NR_pipe			(__NR_Linux +  21)
+#define __NR__newselect			(__NR_Linux +  22)
+#define __NR_sched_yield		(__NR_Linux +  23)
+#define __NR_mremap			(__NR_Linux +  24)
+#define __NR_msync			(__NR_Linux +  25)
+#define __NR_mincore			(__NR_Linux +  26)
+#define __NR_madvise			(__NR_Linux +  27)
+#define __NR_shmget			(__NR_Linux +  28)
+#define __NR_shmat			(__NR_Linux +  29)
+#define __NR_shmctl			(__NR_Linux +  30)
+#define __NR_dup			(__NR_Linux +  31)
+#define __NR_dup2			(__NR_Linux +  32)
+#define __NR_pause			(__NR_Linux +  33)
+#define __NR_nanosleep			(__NR_Linux +  34)
+#define __NR_getitimer			(__NR_Linux +  35)
+#define __NR_setitimer			(__NR_Linux +  36)
+#define __NR_alarm			(__NR_Linux +  37)
+#define __NR_getpid			(__NR_Linux +  38)
+#define __NR_sendfile			(__NR_Linux +  39)
+#define __NR_socket			(__NR_Linux +  40)
+#define __NR_connect			(__NR_Linux +  41)
+#define __NR_accept			(__NR_Linux +  42)
+#define __NR_sendto			(__NR_Linux +  43)
+#define __NR_recvfrom			(__NR_Linux +  44)
+#define __NR_sendmsg			(__NR_Linux +  45)
+#define __NR_recvmsg			(__NR_Linux +  46)
+#define __NR_shutdown			(__NR_Linux +  47)
+#define __NR_bind			(__NR_Linux +  48)
+#define __NR_listen			(__NR_Linux +  49)
+#define __NR_getsockname		(__NR_Linux +  50)
+#define __NR_getpeername		(__NR_Linux +  51)
+#define __NR_socketpair			(__NR_Linux +  52)
+#define __NR_setsockopt			(__NR_Linux +  53)
+#define __NR_getsockopt			(__NR_Linux +  54)
+#define __NR_clone			(__NR_Linux +  55)
+#define __NR_fork			(__NR_Linux +  56)
+#define __NR_execve			(__NR_Linux +  57)
+#define __NR_exit			(__NR_Linux +  58)
+#define __NR_wait4			(__NR_Linux +  59)
+#define __NR_kill			(__NR_Linux +  60)
+#define __NR_uname			(__NR_Linux +  61)
+#define __NR_semget			(__NR_Linux +  62)
+#define __NR_semop			(__NR_Linux +  63)
+#define __NR_semctl			(__NR_Linux +  64)
+#define __NR_shmdt			(__NR_Linux +  65)
+#define __NR_msgget			(__NR_Linux +  66)
+#define __NR_msgsnd			(__NR_Linux +  67)
+#define __NR_msgrcv			(__NR_Linux +  68)
+#define __NR_msgctl			(__NR_Linux +  69)
+#define __NR_fcntl			(__NR_Linux +  70)
+#define __NR_flock			(__NR_Linux +  71)
+#define __NR_fsync			(__NR_Linux +  72)
+#define __NR_fdatasync			(__NR_Linux +  73)
+#define __NR_truncate			(__NR_Linux +  74)
+#define __NR_ftruncate			(__NR_Linux +  75)
+#define __NR_getdents			(__NR_Linux +  76)
+#define __NR_getcwd			(__NR_Linux +  77)
+#define __NR_chdir			(__NR_Linux +  78)
+#define __NR_fchdir			(__NR_Linux +  79)
+#define __NR_rename			(__NR_Linux +  80)
+#define __NR_mkdir			(__NR_Linux +  81)
+#define __NR_rmdir			(__NR_Linux +  82)
+#define __NR_creat			(__NR_Linux +  83)
+#define __NR_link			(__NR_Linux +  84)
+#define __NR_unlink			(__NR_Linux +  85)
+#define __NR_symlink			(__NR_Linux +  86)
+#define __NR_readlink			(__NR_Linux +  87)
+#define __NR_chmod			(__NR_Linux +  88)
+#define __NR_fchmod			(__NR_Linux +  89)
+#define __NR_chown			(__NR_Linux +  90)
+#define __NR_fchown			(__NR_Linux +  91)
+#define __NR_lchown			(__NR_Linux +  92)
+#define __NR_umask			(__NR_Linux +  93)
+#define __NR_gettimeofday		(__NR_Linux +  94)
+#define __NR_getrlimit			(__NR_Linux +  95)
+#define __NR_getrusage			(__NR_Linux +  96)
+#define __NR_sysinfo			(__NR_Linux +  97)
+#define __NR_times			(__NR_Linux +  98)
+#define __NR_ptrace			(__NR_Linux +  99)
+#define __NR_getuid			(__NR_Linux + 100)
+#define __NR_syslog			(__NR_Linux + 101)
+#define __NR_getgid			(__NR_Linux + 102)
+#define __NR_setuid			(__NR_Linux + 103)
+#define __NR_setgid			(__NR_Linux + 104)
+#define __NR_geteuid			(__NR_Linux + 105)
+#define __NR_getegid			(__NR_Linux + 106)
+#define __NR_setpgid			(__NR_Linux + 107)
+#define __NR_getppid			(__NR_Linux + 108)
+#define __NR_getpgrp			(__NR_Linux + 109)
+#define __NR_setsid			(__NR_Linux + 110)
+#define __NR_setreuid			(__NR_Linux + 111)
+#define __NR_setregid			(__NR_Linux + 112)
+#define __NR_getgroups			(__NR_Linux + 113)
+#define __NR_setgroups			(__NR_Linux + 114)
+#define __NR_setresuid			(__NR_Linux + 115)
+#define __NR_getresuid			(__NR_Linux + 116)
+#define __NR_setresgid			(__NR_Linux + 117)
+#define __NR_getresgid			(__NR_Linux + 118)
+#define __NR_getpgid			(__NR_Linux + 119)
+#define __NR_setfsuid			(__NR_Linux + 120)
+#define __NR_setfsgid			(__NR_Linux + 121)
+#define __NR_getsid			(__NR_Linux + 122)
+#define __NR_capget			(__NR_Linux + 123)
+#define __NR_capset			(__NR_Linux + 124)
+#define __NR_rt_sigpending		(__NR_Linux + 125)
+#define __NR_rt_sigtimedwait		(__NR_Linux + 126)
+#define __NR_rt_sigqueueinfo		(__NR_Linux + 127)
+#define __NR_rt_sigsuspend		(__NR_Linux + 128)
+#define __NR_sigaltstack		(__NR_Linux + 129)
+#define __NR_utime			(__NR_Linux + 130)
+#define __NR_mknod			(__NR_Linux + 131)
+#define __NR_personality		(__NR_Linux + 132)
+#define __NR_ustat			(__NR_Linux + 133)
+#define __NR_statfs			(__NR_Linux + 134)
+#define __NR_fstatfs			(__NR_Linux + 135)
+#define __NR_sysfs			(__NR_Linux + 136)
+#define __NR_getpriority		(__NR_Linux + 137)
+#define __NR_setpriority		(__NR_Linux + 138)
+#define __NR_sched_setparam		(__NR_Linux + 139)
+#define __NR_sched_getparam		(__NR_Linux + 140)
+#define __NR_sched_setscheduler		(__NR_Linux + 141)
+#define __NR_sched_getscheduler		(__NR_Linux + 142)
+#define __NR_sched_get_priority_max	(__NR_Linux + 143)
+#define __NR_sched_get_priority_min	(__NR_Linux + 144)
+#define __NR_sched_rr_get_interval	(__NR_Linux + 145)
+#define __NR_mlock			(__NR_Linux + 146)
+#define __NR_munlock			(__NR_Linux + 147)
+#define __NR_mlockall			(__NR_Linux + 148)
+#define __NR_munlockall			(__NR_Linux + 149)
+#define __NR_vhangup			(__NR_Linux + 150)
+#define __NR_pivot_root			(__NR_Linux + 151)
+#define __NR__sysctl			(__NR_Linux + 152)
+#define __NR_prctl			(__NR_Linux + 153)
+#define __NR_adjtimex			(__NR_Linux + 154)
+#define __NR_setrlimit			(__NR_Linux + 155)
+#define __NR_chroot			(__NR_Linux + 156)
+#define __NR_sync			(__NR_Linux + 157)
+#define __NR_acct			(__NR_Linux + 158)
+#define __NR_settimeofday		(__NR_Linux + 159)
+#define __NR_mount			(__NR_Linux + 160)
+#define __NR_umount2			(__NR_Linux + 161)
+#define __NR_swapon			(__NR_Linux + 162)
+#define __NR_swapoff			(__NR_Linux + 163)
+#define __NR_reboot			(__NR_Linux + 164)
+#define __NR_sethostname		(__NR_Linux + 165)
+#define __NR_setdomainname		(__NR_Linux + 166)
+#define __NR_create_module		(__NR_Linux + 167)
+#define __NR_init_module		(__NR_Linux + 168)
+#define __NR_delete_module		(__NR_Linux + 169)
+#define __NR_get_kernel_syms		(__NR_Linux + 170)
+#define __NR_query_module		(__NR_Linux + 171)
+#define __NR_quotactl			(__NR_Linux + 172)
+#define __NR_nfsservctl			(__NR_Linux + 173)
+#define __NR_getpmsg			(__NR_Linux + 174)
+#define __NR_putpmsg			(__NR_Linux + 175)
+#define __NR_afs_syscall		(__NR_Linux + 176)
+#define __NR_reserved177		(__NR_Linux + 177)
+#define __NR_gettid			(__NR_Linux + 178)
+#define __NR_readahead			(__NR_Linux + 179)
+#define __NR_setxattr			(__NR_Linux + 180)
+#define __NR_lsetxattr			(__NR_Linux + 181)
+#define __NR_fsetxattr			(__NR_Linux + 182)
+#define __NR_getxattr			(__NR_Linux + 183)
+#define __NR_lgetxattr			(__NR_Linux + 184)
+#define __NR_fgetxattr			(__NR_Linux + 185)
+#define __NR_listxattr			(__NR_Linux + 186)
+#define __NR_llistxattr			(__NR_Linux + 187)
+#define __NR_flistxattr			(__NR_Linux + 188)
+#define __NR_removexattr		(__NR_Linux + 189)
+#define __NR_lremovexattr		(__NR_Linux + 190)
+#define __NR_fremovexattr		(__NR_Linux + 191)
+#define __NR_tkill			(__NR_Linux + 192)
+#define __NR_reserved193		(__NR_Linux + 193)
+#define __NR_futex			(__NR_Linux + 194)
+#define __NR_sched_setaffinity		(__NR_Linux + 195)
+#define __NR_sched_getaffinity		(__NR_Linux + 196)
+#define __NR_cacheflush			(__NR_Linux + 197)
+#define __NR_cachectl			(__NR_Linux + 198)
+#define __NR_sysmips			(__NR_Linux + 199)
+#define __NR_io_setup			(__NR_Linux + 200)
+#define __NR_io_destroy			(__NR_Linux + 201)
+#define __NR_io_getevents		(__NR_Linux + 202)
+#define __NR_io_submit			(__NR_Linux + 203)
+#define __NR_io_cancel			(__NR_Linux + 204)
+#define __NR_exit_group			(__NR_Linux + 205)
+#define __NR_lookup_dcookie		(__NR_Linux + 206)
+#define __NR_epoll_create		(__NR_Linux + 207)
+#define __NR_epoll_ctl			(__NR_Linux + 208)
+#define __NR_epoll_wait			(__NR_Linux + 209)
+#define __NR_remap_file_pages		(__NR_Linux + 210)
+#define __NR_rt_sigreturn		(__NR_Linux + 211)
+#define __NR_set_tid_address		(__NR_Linux + 212)
+#define __NR_restart_syscall		(__NR_Linux + 213)
+#define __NR_semtimedop			(__NR_Linux + 214)
+#define __NR_fadvise64			(__NR_Linux + 215)
+#define __NR_timer_create		(__NR_Linux + 216)
+#define __NR_timer_settime		(__NR_Linux + 217)
+#define __NR_timer_gettime		(__NR_Linux + 218)
+#define __NR_timer_getoverrun		(__NR_Linux + 219)
+#define __NR_timer_delete		(__NR_Linux + 220)
+#define __NR_clock_settime		(__NR_Linux + 221)
+#define __NR_clock_gettime		(__NR_Linux + 222)
+#define __NR_clock_getres		(__NR_Linux + 223)
+#define __NR_clock_nanosleep		(__NR_Linux + 224)
+#define __NR_tgkill			(__NR_Linux + 225)
+#define __NR_utimes			(__NR_Linux + 226)
+#define __NR_mbind			(__NR_Linux + 227)
+#define __NR_get_mempolicy		(__NR_Linux + 228)
+#define __NR_set_mempolicy		(__NR_Linux + 229)
+#define __NR_mq_open			(__NR_Linux + 230)
+#define __NR_mq_unlink			(__NR_Linux + 231)
+#define __NR_mq_timedsend		(__NR_Linux + 232)
+#define __NR_mq_timedreceive		(__NR_Linux + 233)
+#define __NR_mq_notify			(__NR_Linux + 234)
+#define __NR_mq_getsetattr		(__NR_Linux + 235)
+#define __NR_vserver			(__NR_Linux + 236)
+#define __NR_waitid			(__NR_Linux + 237)
+/* #define __NR_sys_setaltroot		(__NR_Linux + 238) */
+#define __NR_add_key			(__NR_Linux + 239)
+#define __NR_request_key		(__NR_Linux + 240)
+#define __NR_keyctl			(__NR_Linux + 241)
+#define __NR_set_thread_area		(__NR_Linux + 242)
+#define __NR_inotify_init		(__NR_Linux + 243)
+#define __NR_inotify_add_watch		(__NR_Linux + 244)
+#define __NR_inotify_rm_watch		(__NR_Linux + 245)
+#define __NR_migrate_pages		(__NR_Linux + 246)
+#define __NR_openat			(__NR_Linux + 247)
+#define __NR_mkdirat			(__NR_Linux + 248)
+#define __NR_mknodat			(__NR_Linux + 249)
+#define __NR_fchownat			(__NR_Linux + 250)
+#define __NR_futimesat			(__NR_Linux + 251)
+#define __NR_newfstatat			(__NR_Linux + 252)
+#define __NR_unlinkat			(__NR_Linux + 253)
+#define __NR_renameat			(__NR_Linux + 254)
+#define __NR_linkat			(__NR_Linux + 255)
+#define __NR_symlinkat			(__NR_Linux + 256)
+#define __NR_readlinkat			(__NR_Linux + 257)
+#define __NR_fchmodat			(__NR_Linux + 258)
+#define __NR_faccessat			(__NR_Linux + 259)
+#define __NR_pselect6			(__NR_Linux + 260)
+#define __NR_ppoll			(__NR_Linux + 261)
+#define __NR_unshare			(__NR_Linux + 262)
+#define __NR_splice			(__NR_Linux + 263)
+#define __NR_sync_file_range		(__NR_Linux + 264)
+#define __NR_tee			(__NR_Linux + 265)
+#define __NR_vmsplice			(__NR_Linux + 266)
+#define __NR_move_pages			(__NR_Linux + 267)
+#define __NR_set_robust_list		(__NR_Linux + 268)
+#define __NR_get_robust_list		(__NR_Linux + 269)
+#define __NR_kexec_load			(__NR_Linux + 270)
+#define __NR_getcpu			(__NR_Linux + 271)
+#define __NR_epoll_pwait		(__NR_Linux + 272)
+#define __NR_ioprio_set			(__NR_Linux + 273)
+#define __NR_ioprio_get			(__NR_Linux + 274)
+#define __NR_utimensat			(__NR_Linux + 275)
+#define __NR_signalfd			(__NR_Linux + 276)
+#define __NR_timerfd			(__NR_Linux + 277)
+#define __NR_eventfd			(__NR_Linux + 278)
+#define __NR_fallocate			(__NR_Linux + 279)
+#define __NR_timerfd_create		(__NR_Linux + 280)
+#define __NR_timerfd_gettime		(__NR_Linux + 281)
+#define __NR_timerfd_settime		(__NR_Linux + 282)
+#define __NR_signalfd4			(__NR_Linux + 283)
+#define __NR_eventfd2			(__NR_Linux + 284)
+#define __NR_epoll_create1		(__NR_Linux + 285)
+#define __NR_dup3			(__NR_Linux + 286)
+#define __NR_pipe2			(__NR_Linux + 287)
+#define __NR_inotify_init1		(__NR_Linux + 288)
+#define __NR_preadv			(__NR_Linux + 289)
+#define __NR_pwritev			(__NR_Linux + 290)
+#define __NR_rt_tgsigqueueinfo		(__NR_Linux + 291)
+#define __NR_perf_event_open		(__NR_Linux + 292)
+#define __NR_accept4			(__NR_Linux + 293)
+#define __NR_recvmmsg			(__NR_Linux + 294)
+#define __NR_fanotify_init		(__NR_Linux + 295)
+#define __NR_fanotify_mark		(__NR_Linux + 296)
+#define __NR_prlimit64			(__NR_Linux + 297)
+#define __NR_name_to_handle_at		(__NR_Linux + 298)
+#define __NR_open_by_handle_at		(__NR_Linux + 299)
+#define __NR_clock_adjtime		(__NR_Linux + 300)
+#define __NR_syncfs			(__NR_Linux + 301)
+#define __NR_sendmmsg			(__NR_Linux + 302)
+#define __NR_setns			(__NR_Linux + 303)
+#define __NR_process_vm_readv		(__NR_Linux + 304)
+#define __NR_process_vm_writev		(__NR_Linux + 305)
+#define __NR_kcmp			(__NR_Linux + 306)
+
+/*
+ * Offset of the last Linux 64-bit flavoured syscall
+ */
+#define __NR_Linux_syscalls		306
+
+#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
+
+#define __NR_64_Linux			5000
+#define __NR_64_Linux_syscalls		306
+
+#if _MIPS_SIM == _MIPS_SIM_NABI32
+
+/*
+ * Linux N32 syscalls are in the range from 6000 to 6999.
+ */
+#define __NR_Linux			6000
+#define __NR_read			(__NR_Linux +   0)
+#define __NR_write			(__NR_Linux +   1)
+#define __NR_open			(__NR_Linux +   2)
+#define __NR_close			(__NR_Linux +   3)
+#define __NR_stat			(__NR_Linux +   4)
+#define __NR_fstat			(__NR_Linux +   5)
+#define __NR_lstat			(__NR_Linux +   6)
+#define __NR_poll			(__NR_Linux +   7)
+#define __NR_lseek			(__NR_Linux +   8)
+#define __NR_mmap			(__NR_Linux +   9)
+#define __NR_mprotect			(__NR_Linux +  10)
+#define __NR_munmap			(__NR_Linux +  11)
+#define __NR_brk			(__NR_Linux +  12)
+#define __NR_rt_sigaction		(__NR_Linux +  13)
+#define __NR_rt_sigprocmask		(__NR_Linux +  14)
+#define __NR_ioctl			(__NR_Linux +  15)
+#define __NR_pread64			(__NR_Linux +  16)
+#define __NR_pwrite64			(__NR_Linux +  17)
+#define __NR_readv			(__NR_Linux +  18)
+#define __NR_writev			(__NR_Linux +  19)
+#define __NR_access			(__NR_Linux +  20)
+#define __NR_pipe			(__NR_Linux +  21)
+#define __NR__newselect			(__NR_Linux +  22)
+#define __NR_sched_yield		(__NR_Linux +  23)
+#define __NR_mremap			(__NR_Linux +  24)
+#define __NR_msync			(__NR_Linux +  25)
+#define __NR_mincore			(__NR_Linux +  26)
+#define __NR_madvise			(__NR_Linux +  27)
+#define __NR_shmget			(__NR_Linux +  28)
+#define __NR_shmat			(__NR_Linux +  29)
+#define __NR_shmctl			(__NR_Linux +  30)
+#define __NR_dup			(__NR_Linux +  31)
+#define __NR_dup2			(__NR_Linux +  32)
+#define __NR_pause			(__NR_Linux +  33)
+#define __NR_nanosleep			(__NR_Linux +  34)
+#define __NR_getitimer			(__NR_Linux +  35)
+#define __NR_setitimer			(__NR_Linux +  36)
+#define __NR_alarm			(__NR_Linux +  37)
+#define __NR_getpid			(__NR_Linux +  38)
+#define __NR_sendfile			(__NR_Linux +  39)
+#define __NR_socket			(__NR_Linux +  40)
+#define __NR_connect			(__NR_Linux +  41)
+#define __NR_accept			(__NR_Linux +  42)
+#define __NR_sendto			(__NR_Linux +  43)
+#define __NR_recvfrom			(__NR_Linux +  44)
+#define __NR_sendmsg			(__NR_Linux +  45)
+#define __NR_recvmsg			(__NR_Linux +  46)
+#define __NR_shutdown			(__NR_Linux +  47)
+#define __NR_bind			(__NR_Linux +  48)
+#define __NR_listen			(__NR_Linux +  49)
+#define __NR_getsockname		(__NR_Linux +  50)
+#define __NR_getpeername		(__NR_Linux +  51)
+#define __NR_socketpair			(__NR_Linux +  52)
+#define __NR_setsockopt			(__NR_Linux +  53)
+#define __NR_getsockopt			(__NR_Linux +  54)
+#define __NR_clone			(__NR_Linux +  55)
+#define __NR_fork			(__NR_Linux +  56)
+#define __NR_execve			(__NR_Linux +  57)
+#define __NR_exit			(__NR_Linux +  58)
+#define __NR_wait4			(__NR_Linux +  59)
+#define __NR_kill			(__NR_Linux +  60)
+#define __NR_uname			(__NR_Linux +  61)
+#define __NR_semget			(__NR_Linux +  62)
+#define __NR_semop			(__NR_Linux +  63)
+#define __NR_semctl			(__NR_Linux +  64)
+#define __NR_shmdt			(__NR_Linux +  65)
+#define __NR_msgget			(__NR_Linux +  66)
+#define __NR_msgsnd			(__NR_Linux +  67)
+#define __NR_msgrcv			(__NR_Linux +  68)
+#define __NR_msgctl			(__NR_Linux +  69)
+#define __NR_fcntl			(__NR_Linux +  70)
+#define __NR_flock			(__NR_Linux +  71)
+#define __NR_fsync			(__NR_Linux +  72)
+#define __NR_fdatasync			(__NR_Linux +  73)
+#define __NR_truncate			(__NR_Linux +  74)
+#define __NR_ftruncate			(__NR_Linux +  75)
+#define __NR_getdents			(__NR_Linux +  76)
+#define __NR_getcwd			(__NR_Linux +  77)
+#define __NR_chdir			(__NR_Linux +  78)
+#define __NR_fchdir			(__NR_Linux +  79)
+#define __NR_rename			(__NR_Linux +  80)
+#define __NR_mkdir			(__NR_Linux +  81)
+#define __NR_rmdir			(__NR_Linux +  82)
+#define __NR_creat			(__NR_Linux +  83)
+#define __NR_link			(__NR_Linux +  84)
+#define __NR_unlink			(__NR_Linux +  85)
+#define __NR_symlink			(__NR_Linux +  86)
+#define __NR_readlink			(__NR_Linux +  87)
+#define __NR_chmod			(__NR_Linux +  88)
+#define __NR_fchmod			(__NR_Linux +  89)
+#define __NR_chown			(__NR_Linux +  90)
+#define __NR_fchown			(__NR_Linux +  91)
+#define __NR_lchown			(__NR_Linux +  92)
+#define __NR_umask			(__NR_Linux +  93)
+#define __NR_gettimeofday		(__NR_Linux +  94)
+#define __NR_getrlimit			(__NR_Linux +  95)
+#define __NR_getrusage			(__NR_Linux +  96)
+#define __NR_sysinfo			(__NR_Linux +  97)
+#define __NR_times			(__NR_Linux +  98)
+#define __NR_ptrace			(__NR_Linux +  99)
+#define __NR_getuid			(__NR_Linux + 100)
+#define __NR_syslog			(__NR_Linux + 101)
+#define __NR_getgid			(__NR_Linux + 102)
+#define __NR_setuid			(__NR_Linux + 103)
+#define __NR_setgid			(__NR_Linux + 104)
+#define __NR_geteuid			(__NR_Linux + 105)
+#define __NR_getegid			(__NR_Linux + 106)
+#define __NR_setpgid			(__NR_Linux + 107)
+#define __NR_getppid			(__NR_Linux + 108)
+#define __NR_getpgrp			(__NR_Linux + 109)
+#define __NR_setsid			(__NR_Linux + 110)
+#define __NR_setreuid			(__NR_Linux + 111)
+#define __NR_setregid			(__NR_Linux + 112)
+#define __NR_getgroups			(__NR_Linux + 113)
+#define __NR_setgroups			(__NR_Linux + 114)
+#define __NR_setresuid			(__NR_Linux + 115)
+#define __NR_getresuid			(__NR_Linux + 116)
+#define __NR_setresgid			(__NR_Linux + 117)
+#define __NR_getresgid			(__NR_Linux + 118)
+#define __NR_getpgid			(__NR_Linux + 119)
+#define __NR_setfsuid			(__NR_Linux + 120)
+#define __NR_setfsgid			(__NR_Linux + 121)
+#define __NR_getsid			(__NR_Linux + 122)
+#define __NR_capget			(__NR_Linux + 123)
+#define __NR_capset			(__NR_Linux + 124)
+#define __NR_rt_sigpending		(__NR_Linux + 125)
+#define __NR_rt_sigtimedwait		(__NR_Linux + 126)
+#define __NR_rt_sigqueueinfo		(__NR_Linux + 127)
+#define __NR_rt_sigsuspend		(__NR_Linux + 128)
+#define __NR_sigaltstack		(__NR_Linux + 129)
+#define __NR_utime			(__NR_Linux + 130)
+#define __NR_mknod			(__NR_Linux + 131)
+#define __NR_personality		(__NR_Linux + 132)
+#define __NR_ustat			(__NR_Linux + 133)
+#define __NR_statfs			(__NR_Linux + 134)
+#define __NR_fstatfs			(__NR_Linux + 135)
+#define __NR_sysfs			(__NR_Linux + 136)
+#define __NR_getpriority		(__NR_Linux + 137)
+#define __NR_setpriority		(__NR_Linux + 138)
+#define __NR_sched_setparam		(__NR_Linux + 139)
+#define __NR_sched_getparam		(__NR_Linux + 140)
+#define __NR_sched_setscheduler		(__NR_Linux + 141)
+#define __NR_sched_getscheduler		(__NR_Linux + 142)
+#define __NR_sched_get_priority_max	(__NR_Linux + 143)
+#define __NR_sched_get_priority_min	(__NR_Linux + 144)
+#define __NR_sched_rr_get_interval	(__NR_Linux + 145)
+#define __NR_mlock			(__NR_Linux + 146)
+#define __NR_munlock			(__NR_Linux + 147)
+#define __NR_mlockall			(__NR_Linux + 148)
+#define __NR_munlockall			(__NR_Linux + 149)
+#define __NR_vhangup			(__NR_Linux + 150)
+#define __NR_pivot_root			(__NR_Linux + 151)
+#define __NR__sysctl			(__NR_Linux + 152)
+#define __NR_prctl			(__NR_Linux + 153)
+#define __NR_adjtimex			(__NR_Linux + 154)
+#define __NR_setrlimit			(__NR_Linux + 155)
+#define __NR_chroot			(__NR_Linux + 156)
+#define __NR_sync			(__NR_Linux + 157)
+#define __NR_acct			(__NR_Linux + 158)
+#define __NR_settimeofday		(__NR_Linux + 159)
+#define __NR_mount			(__NR_Linux + 160)
+#define __NR_umount2			(__NR_Linux + 161)
+#define __NR_swapon			(__NR_Linux + 162)
+#define __NR_swapoff			(__NR_Linux + 163)
+#define __NR_reboot			(__NR_Linux + 164)
+#define __NR_sethostname		(__NR_Linux + 165)
+#define __NR_setdomainname		(__NR_Linux + 166)
+#define __NR_create_module		(__NR_Linux + 167)
+#define __NR_init_module		(__NR_Linux + 168)
+#define __NR_delete_module		(__NR_Linux + 169)
+#define __NR_get_kernel_syms		(__NR_Linux + 170)
+#define __NR_query_module		(__NR_Linux + 171)
+#define __NR_quotactl			(__NR_Linux + 172)
+#define __NR_nfsservctl			(__NR_Linux + 173)
+#define __NR_getpmsg			(__NR_Linux + 174)
+#define __NR_putpmsg			(__NR_Linux + 175)
+#define __NR_afs_syscall		(__NR_Linux + 176)
+#define __NR_reserved177		(__NR_Linux + 177)
+#define __NR_gettid			(__NR_Linux + 178)
+#define __NR_readahead			(__NR_Linux + 179)
+#define __NR_setxattr			(__NR_Linux + 180)
+#define __NR_lsetxattr			(__NR_Linux + 181)
+#define __NR_fsetxattr			(__NR_Linux + 182)
+#define __NR_getxattr			(__NR_Linux + 183)
+#define __NR_lgetxattr			(__NR_Linux + 184)
+#define __NR_fgetxattr			(__NR_Linux + 185)
+#define __NR_listxattr			(__NR_Linux + 186)
+#define __NR_llistxattr			(__NR_Linux + 187)
+#define __NR_flistxattr			(__NR_Linux + 188)
+#define __NR_removexattr		(__NR_Linux + 189)
+#define __NR_lremovexattr		(__NR_Linux + 190)
+#define __NR_fremovexattr		(__NR_Linux + 191)
+#define __NR_tkill			(__NR_Linux + 192)
+#define __NR_reserved193		(__NR_Linux + 193)
+#define __NR_futex			(__NR_Linux + 194)
+#define __NR_sched_setaffinity		(__NR_Linux + 195)
+#define __NR_sched_getaffinity		(__NR_Linux + 196)
+#define __NR_cacheflush			(__NR_Linux + 197)
+#define __NR_cachectl			(__NR_Linux + 198)
+#define __NR_sysmips			(__NR_Linux + 199)
+#define __NR_io_setup			(__NR_Linux + 200)
+#define __NR_io_destroy			(__NR_Linux + 201)
+#define __NR_io_getevents		(__NR_Linux + 202)
+#define __NR_io_submit			(__NR_Linux + 203)
+#define __NR_io_cancel			(__NR_Linux + 204)
+#define __NR_exit_group			(__NR_Linux + 205)
+#define __NR_lookup_dcookie		(__NR_Linux + 206)
+#define __NR_epoll_create		(__NR_Linux + 207)
+#define __NR_epoll_ctl			(__NR_Linux + 208)
+#define __NR_epoll_wait			(__NR_Linux + 209)
+#define __NR_remap_file_pages		(__NR_Linux + 210)
+#define __NR_rt_sigreturn		(__NR_Linux + 211)
+#define __NR_fcntl64			(__NR_Linux + 212)
+#define __NR_set_tid_address		(__NR_Linux + 213)
+#define __NR_restart_syscall		(__NR_Linux + 214)
+#define __NR_semtimedop			(__NR_Linux + 215)
+#define __NR_fadvise64			(__NR_Linux + 216)
+#define __NR_statfs64			(__NR_Linux + 217)
+#define __NR_fstatfs64			(__NR_Linux + 218)
+#define __NR_sendfile64			(__NR_Linux + 219)
+#define __NR_timer_create		(__NR_Linux + 220)
+#define __NR_timer_settime		(__NR_Linux + 221)
+#define __NR_timer_gettime		(__NR_Linux + 222)
+#define __NR_timer_getoverrun		(__NR_Linux + 223)
+#define __NR_timer_delete		(__NR_Linux + 224)
+#define __NR_clock_settime		(__NR_Linux + 225)
+#define __NR_clock_gettime		(__NR_Linux + 226)
+#define __NR_clock_getres		(__NR_Linux + 227)
+#define __NR_clock_nanosleep		(__NR_Linux + 228)
+#define __NR_tgkill			(__NR_Linux + 229)
+#define __NR_utimes			(__NR_Linux + 230)
+#define __NR_mbind			(__NR_Linux + 231)
+#define __NR_get_mempolicy		(__NR_Linux + 232)
+#define __NR_set_mempolicy		(__NR_Linux + 233)
+#define __NR_mq_open			(__NR_Linux + 234)
+#define __NR_mq_unlink			(__NR_Linux + 235)
+#define __NR_mq_timedsend		(__NR_Linux + 236)
+#define __NR_mq_timedreceive		(__NR_Linux + 237)
+#define __NR_mq_notify			(__NR_Linux + 238)
+#define __NR_mq_getsetattr		(__NR_Linux + 239)
+#define __NR_vserver			(__NR_Linux + 240)
+#define __NR_waitid			(__NR_Linux + 241)
+/* #define __NR_sys_setaltroot		(__NR_Linux + 242) */
+#define __NR_add_key			(__NR_Linux + 243)
+#define __NR_request_key		(__NR_Linux + 244)
+#define __NR_keyctl			(__NR_Linux + 245)
+#define __NR_set_thread_area		(__NR_Linux + 246)
+#define __NR_inotify_init		(__NR_Linux + 247)
+#define __NR_inotify_add_watch		(__NR_Linux + 248)
+#define __NR_inotify_rm_watch		(__NR_Linux + 249)
+#define __NR_migrate_pages		(__NR_Linux + 250)
+#define __NR_openat			(__NR_Linux + 251)
+#define __NR_mkdirat			(__NR_Linux + 252)
+#define __NR_mknodat			(__NR_Linux + 253)
+#define __NR_fchownat			(__NR_Linux + 254)
+#define __NR_futimesat			(__NR_Linux + 255)
+#define __NR_newfstatat			(__NR_Linux + 256)
+#define __NR_unlinkat			(__NR_Linux + 257)
+#define __NR_renameat			(__NR_Linux + 258)
+#define __NR_linkat			(__NR_Linux + 259)
+#define __NR_symlinkat			(__NR_Linux + 260)
+#define __NR_readlinkat			(__NR_Linux + 261)
+#define __NR_fchmodat			(__NR_Linux + 262)
+#define __NR_faccessat			(__NR_Linux + 263)
+#define __NR_pselect6			(__NR_Linux + 264)
+#define __NR_ppoll			(__NR_Linux + 265)
+#define __NR_unshare			(__NR_Linux + 266)
+#define __NR_splice			(__NR_Linux + 267)
+#define __NR_sync_file_range		(__NR_Linux + 268)
+#define __NR_tee			(__NR_Linux + 269)
+#define __NR_vmsplice			(__NR_Linux + 270)
+#define __NR_move_pages			(__NR_Linux + 271)
+#define __NR_set_robust_list		(__NR_Linux + 272)
+#define __NR_get_robust_list		(__NR_Linux + 273)
+#define __NR_kexec_load			(__NR_Linux + 274)
+#define __NR_getcpu			(__NR_Linux + 275)
+#define __NR_epoll_pwait		(__NR_Linux + 276)
+#define __NR_ioprio_set			(__NR_Linux + 277)
+#define __NR_ioprio_get			(__NR_Linux + 278)
+#define __NR_utimensat			(__NR_Linux + 279)
+#define __NR_signalfd			(__NR_Linux + 280)
+#define __NR_timerfd			(__NR_Linux + 281)
+#define __NR_eventfd			(__NR_Linux + 282)
+#define __NR_fallocate			(__NR_Linux + 283)
+#define __NR_timerfd_create		(__NR_Linux + 284)
+#define __NR_timerfd_gettime		(__NR_Linux + 285)
+#define __NR_timerfd_settime		(__NR_Linux + 286)
+#define __NR_signalfd4			(__NR_Linux + 287)
+#define __NR_eventfd2			(__NR_Linux + 288)
+#define __NR_epoll_create1		(__NR_Linux + 289)
+#define __NR_dup3			(__NR_Linux + 290)
+#define __NR_pipe2			(__NR_Linux + 291)
+#define __NR_inotify_init1		(__NR_Linux + 292)
+#define __NR_preadv			(__NR_Linux + 293)
+#define __NR_pwritev			(__NR_Linux + 294)
+#define __NR_rt_tgsigqueueinfo		(__NR_Linux + 295)
+#define __NR_perf_event_open		(__NR_Linux + 296)
+#define __NR_accept4			(__NR_Linux + 297)
+#define __NR_recvmmsg			(__NR_Linux + 298)
+#define __NR_getdents64			(__NR_Linux + 299)
+#define __NR_fanotify_init		(__NR_Linux + 300)
+#define __NR_fanotify_mark		(__NR_Linux + 301)
+#define __NR_prlimit64			(__NR_Linux + 302)
+#define __NR_name_to_handle_at		(__NR_Linux + 303)
+#define __NR_open_by_handle_at		(__NR_Linux + 304)
+#define __NR_clock_adjtime		(__NR_Linux + 305)
+#define __NR_syncfs			(__NR_Linux + 306)
+#define __NR_sendmmsg			(__NR_Linux + 307)
+#define __NR_setns			(__NR_Linux + 308)
+#define __NR_process_vm_readv		(__NR_Linux + 309)
+#define __NR_process_vm_writev		(__NR_Linux + 310)
+#define __NR_kcmp			(__NR_Linux + 311)
+
+/*
+ * Offset of the last N32 flavoured syscall
+ */
+#define __NR_Linux_syscalls		311
+
+#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
+
+#define __NR_N32_Linux			6000
+#define __NR_N32_Linux_syscalls		311
+
+#endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig
index 3e7141f0746..46890305388 100644
--- a/arch/mips/jz4740/Kconfig
+++ b/arch/mips/jz4740/Kconfig
@@ -7,6 +7,3 @@ config JZ4740_QI_LB60
 	bool "Qi Hardware Ben NanoNote"
 
 endchoice
-
-config HAVE_PWM
-	bool
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
index e44abea9c20..63bad0e491d 100644
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -5,7 +5,7 @@
 # Object file lists.
 
 obj-y += prom.o irq.o time.o reset.o setup.o dma.o \
-	gpio.o clock.o platform.o timer.o pwm.o serial.o
+	gpio.o clock.o platform.o timer.o serial.o
 
 obj-$(CONFIG_DEBUG_FS) += clock-debugfs.o
 
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index 9a3d9de4d04..43d964d3628 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -437,6 +437,7 @@ static struct platform_device *jz_platform_devices[] __initdata = {
 	&jz4740_codec_device,
 	&jz4740_rtc_device,
 	&jz4740_adc_device,
+	&jz4740_pwm_device,
 	&qi_lb60_gpio_keys,
 	&qi_lb60_pwm_beeper,
 	&qi_lb60_charger_device,
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
index e342ed4cbd4..6d14dcdbd90 100644
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -323,3 +323,9 @@ struct platform_device jz4740_wdt_device = {
 	.num_resources = ARRAY_SIZE(jz4740_wdt_resources),
 	.resource      = jz4740_wdt_resources,
 };
+
+/* PWM */
+struct platform_device jz4740_pwm_device = {
+	.name = "jz4740-pwm",
+	.id   = -1,
+};
diff --git a/arch/mips/jz4740/pwm.c b/arch/mips/jz4740/pwm.c
deleted file mode 100644
index a26a6faec9a..00000000000
--- a/arch/mips/jz4740/pwm.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
- *  JZ4740 platform PWM support
- *
- *  This program is free software; you can redistribute it and/or modify it
- *  under  the terms of the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the License, or (at your
- *  option) any later version.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <linux/kernel.h>
-
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/pwm.h>
-#include <linux/gpio.h>
-
-#include <asm/mach-jz4740/gpio.h>
-#include "timer.h"
-
-static struct clk *jz4740_pwm_clk;
-
-DEFINE_MUTEX(jz4740_pwm_mutex);
-
-struct pwm_device {
-	unsigned int id;
-	unsigned int gpio;
-	bool used;
-};
-
-static struct pwm_device jz4740_pwm_list[] = {
-	{ 2, JZ_GPIO_PWM2, false },
-	{ 3, JZ_GPIO_PWM3, false },
-	{ 4, JZ_GPIO_PWM4, false },
-	{ 5, JZ_GPIO_PWM5, false },
-	{ 6, JZ_GPIO_PWM6, false },
-	{ 7, JZ_GPIO_PWM7, false },
-};
-
-struct pwm_device *pwm_request(int id, const char *label)
-{
-	int ret = 0;
-	struct pwm_device *pwm;
-
-	if (id < 2 || id > 7 || !jz4740_pwm_clk)
-		return ERR_PTR(-ENODEV);
-
-	mutex_lock(&jz4740_pwm_mutex);
-
-	pwm = &jz4740_pwm_list[id - 2];
-	if (pwm->used)
-		ret = -EBUSY;
-	else
-		pwm->used = true;
-
-	mutex_unlock(&jz4740_pwm_mutex);
-
-	if (ret)
-		return ERR_PTR(ret);
-
-	ret = gpio_request(pwm->gpio, label);
-
-	if (ret) {
-		printk(KERN_ERR "Failed to request pwm gpio: %d\n", ret);
-		pwm->used = false;
-		return ERR_PTR(ret);
-	}
-
-	jz_gpio_set_function(pwm->gpio, JZ_GPIO_FUNC_PWM);
-
-	jz4740_timer_start(id);
-
-	return pwm;
-}
-
-void pwm_free(struct pwm_device *pwm)
-{
-	pwm_disable(pwm);
-	jz4740_timer_set_ctrl(pwm->id, 0);
-
-	jz_gpio_set_function(pwm->gpio, JZ_GPIO_FUNC_NONE);
-	gpio_free(pwm->gpio);
-
-	jz4740_timer_stop(pwm->id);
-
-	pwm->used = false;
-}
-
-int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
-{
-	unsigned long long tmp;
-	unsigned long period, duty;
-	unsigned int prescaler = 0;
-	unsigned int id = pwm->id;
-	uint16_t ctrl;
-	bool is_enabled;
-
-	if (duty_ns < 0 || duty_ns > period_ns)
-		return -EINVAL;
-
-	tmp = (unsigned long long)clk_get_rate(jz4740_pwm_clk) * period_ns;
-	do_div(tmp, 1000000000);
-	period = tmp;
-
-	while (period > 0xffff && prescaler < 6) {
-		period >>= 2;
-		++prescaler;
-	}
-
-	if (prescaler == 6)
-		return -EINVAL;
-
-	tmp = (unsigned long long)period * duty_ns;
-	do_div(tmp, period_ns);
-	duty = period - tmp;
-
-	if (duty >= period)
-		duty = period - 1;
-
-	is_enabled = jz4740_timer_is_enabled(id);
-	if (is_enabled)
-		pwm_disable(pwm);
-
-	jz4740_timer_set_count(id, 0);
-	jz4740_timer_set_duty(id, duty);
-	jz4740_timer_set_period(id, period);
-
-	ctrl = JZ_TIMER_CTRL_PRESCALER(prescaler) | JZ_TIMER_CTRL_SRC_EXT |
-		JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN;
-
-	jz4740_timer_set_ctrl(id, ctrl);
-
-	if (is_enabled)
-		pwm_enable(pwm);
-
-	return 0;
-}
-
-int pwm_enable(struct pwm_device *pwm)
-{
-	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->id);
-
-	ctrl |= JZ_TIMER_CTRL_PWM_ENABLE;
-	jz4740_timer_set_ctrl(pwm->id, ctrl);
-	jz4740_timer_enable(pwm->id);
-
-	return 0;
-}
-
-void pwm_disable(struct pwm_device *pwm)
-{
-	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->id);
-
-	ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE;
-	jz4740_timer_disable(pwm->id);
-	jz4740_timer_set_ctrl(pwm->id, ctrl);
-}
-
-static int __init jz4740_pwm_init(void)
-{
-	int ret = 0;
-
-	jz4740_pwm_clk = clk_get(NULL, "ext");
-
-	if (IS_ERR(jz4740_pwm_clk)) {
-		ret = PTR_ERR(jz4740_pwm_clk);
-		jz4740_pwm_clk = NULL;
-	}
-
-	return ret;
-}
-subsys_initcall(jz4740_pwm_init);
diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c
index f83c2dd07a2..39bb4bbf43e 100644
--- a/arch/mips/jz4740/time.c
+++ b/arch/mips/jz4740/time.c
@@ -20,10 +20,10 @@
 #include <linux/clockchips.h>
 
 #include <asm/mach-jz4740/irq.h>
+#include <asm/mach-jz4740/timer.h>
 #include <asm/time.h>
 
 #include "clock.h"
-#include "timer.h"
 
 #define TIMER_CLOCKEVENT 0
 #define TIMER_CLOCKSOURCE 1
diff --git a/arch/mips/jz4740/timer.c b/arch/mips/jz4740/timer.c
index 654d5c3900b..22f11d73a17 100644
--- a/arch/mips/jz4740/timer.c
+++ b/arch/mips/jz4740/timer.c
@@ -17,11 +17,11 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 
-#include "timer.h"
-
 #include <asm/mach-jz4740/base.h>
+#include <asm/mach-jz4740/timer.h>
 
 void __iomem *jz4740_timer_base;
+EXPORT_SYMBOL_GPL(jz4740_timer_base);
 
 void jz4740_timer_enable_watchdog(void)
 {
diff --git a/arch/mips/jz4740/timer.h b/arch/mips/jz4740/timer.h
deleted file mode 100644
index fca3994f2e6..00000000000
--- a/arch/mips/jz4740/timer.h
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
- *  JZ4740 platform timer support
- *
- *  This program is free software; you can redistribute it and/or modify it
- *  under  the terms of the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the License, or (at your
- *  option) any later version.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#ifndef __MIPS_JZ4740_TIMER_H__
-#define __MIPS_JZ4740_TIMER_H__
-
-#include <linux/module.h>
-#include <linux/io.h>
-
-#define JZ_REG_TIMER_STOP		0x0C
-#define JZ_REG_TIMER_STOP_SET		0x1C
-#define JZ_REG_TIMER_STOP_CLEAR		0x2C
-#define JZ_REG_TIMER_ENABLE		0x00
-#define JZ_REG_TIMER_ENABLE_SET		0x04
-#define JZ_REG_TIMER_ENABLE_CLEAR	0x08
-#define JZ_REG_TIMER_FLAG		0x10
-#define JZ_REG_TIMER_FLAG_SET		0x14
-#define JZ_REG_TIMER_FLAG_CLEAR		0x18
-#define JZ_REG_TIMER_MASK		0x20
-#define JZ_REG_TIMER_MASK_SET		0x24
-#define JZ_REG_TIMER_MASK_CLEAR		0x28
-
-#define JZ_REG_TIMER_DFR(x) (((x) * 0x10) + 0x30)
-#define JZ_REG_TIMER_DHR(x) (((x) * 0x10) + 0x34)
-#define JZ_REG_TIMER_CNT(x) (((x) * 0x10) + 0x38)
-#define JZ_REG_TIMER_CTRL(x) (((x) * 0x10) + 0x3C)
-
-#define JZ_TIMER_IRQ_HALF(x) BIT((x) + 0x10)
-#define JZ_TIMER_IRQ_FULL(x) BIT(x)
-
-#define JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN	BIT(9)
-#define JZ_TIMER_CTRL_PWM_ACTIVE_LOW		BIT(8)
-#define JZ_TIMER_CTRL_PWM_ENABLE		BIT(7)
-#define JZ_TIMER_CTRL_PRESCALE_MASK		0x1c
-#define JZ_TIMER_CTRL_PRESCALE_OFFSET		0x3
-#define JZ_TIMER_CTRL_PRESCALE_1		(0 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_4		(1 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_16		(2 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_64		(3 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_256		(4 << 3)
-#define JZ_TIMER_CTRL_PRESCALE_1024		(5 << 3)
-
-#define JZ_TIMER_CTRL_PRESCALER(x) ((x) << JZ_TIMER_CTRL_PRESCALE_OFFSET)
-
-#define JZ_TIMER_CTRL_SRC_EXT		BIT(2)
-#define JZ_TIMER_CTRL_SRC_RTC		BIT(1)
-#define JZ_TIMER_CTRL_SRC_PCLK		BIT(0)
-
-extern void __iomem *jz4740_timer_base;
-void __init jz4740_timer_init(void);
-
-static inline void jz4740_timer_stop(unsigned int timer)
-{
-	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
-}
-
-static inline void jz4740_timer_start(unsigned int timer)
-{
-	writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
-}
-
-static inline bool jz4740_timer_is_enabled(unsigned int timer)
-{
-	return readb(jz4740_timer_base + JZ_REG_TIMER_ENABLE) & BIT(timer);
-}
-
-static inline void jz4740_timer_enable(unsigned int timer)
-{
-	writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
-}
-
-static inline void jz4740_timer_disable(unsigned int timer)
-{
-	writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);
-}
-
-
-static inline void jz4740_timer_set_period(unsigned int timer, uint16_t period)
-{
-	writew(period, jz4740_timer_base + JZ_REG_TIMER_DFR(timer));
-}
-
-static inline void jz4740_timer_set_duty(unsigned int timer, uint16_t duty)
-{
-	writew(duty, jz4740_timer_base + JZ_REG_TIMER_DHR(timer));
-}
-
-static inline void jz4740_timer_set_count(unsigned int timer, uint16_t count)
-{
-	writew(count, jz4740_timer_base + JZ_REG_TIMER_CNT(timer));
-}
-
-static inline uint16_t jz4740_timer_get_count(unsigned int timer)
-{
-	return readw(jz4740_timer_base + JZ_REG_TIMER_CNT(timer));
-}
-
-static inline void jz4740_timer_ack_full(unsigned int timer)
-{
-	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
-}
-
-static inline void jz4740_timer_irq_full_enable(unsigned int timer)
-{
-	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_FLAG_CLEAR);
-	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_CLEAR);
-}
-
-static inline void jz4740_timer_irq_full_disable(unsigned int timer)
-{
-	writel(JZ_TIMER_IRQ_FULL(timer), jz4740_timer_base + JZ_REG_TIMER_MASK_SET);
-}
-
-static inline void jz4740_timer_set_ctrl(unsigned int timer, uint16_t ctrl)
-{
-	writew(ctrl, jz4740_timer_base + JZ_REG_TIMER_CTRL(timer));
-}
-
-static inline uint16_t jz4740_timer_get_ctrl(unsigned int timer)
-{
-	return readw(jz4740_timer_base + JZ_REG_TIMER_CTRL(timer));
-}
-
-#endif
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index fdaf65e1a99..8b28bc4e14e 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -31,31 +31,15 @@ obj-$(CONFIG_SYNC_R4K)		+= sync-r4k.o
 
 obj-$(CONFIG_STACKTRACE)	+= stacktrace.o
 obj-$(CONFIG_MODULES)		+= mips_ksyms.o module.o
+obj-$(CONFIG_MODULES_USE_ELF_RELA) += module-rela.o
 
 obj-$(CONFIG_FUNCTION_TRACER)	+= mcount.o ftrace.o
 
-obj-$(CONFIG_CPU_LOONGSON2)	+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_MIPS32)	+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_MIPS64)	+= r4k_fpu.o r4k_switch.o
+obj-$(CONFIG_CPU_R4K_FPU)	+= r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_R3000)		+= r2300_fpu.o r2300_switch.o
-obj-$(CONFIG_CPU_R4300)		+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_R4X00)		+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_R5000)		+= r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_R6000)		+= r6000_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_R5432)		+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_R5500)		+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_R8000)		+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_RM7000)	+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_RM9000)	+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_NEVADA)	+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_R10000)	+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_SB1)		+= r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_TX39XX)	+= r2300_fpu.o r2300_switch.o
-obj-$(CONFIG_CPU_TX49XX)	+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_VR41XX)	+= r4k_fpu.o r4k_switch.o
 obj-$(CONFIG_CPU_CAVIUM_OCTEON)	+= octeon_switch.o
-obj-$(CONFIG_CPU_XLR)		+= r4k_fpu.o r4k_switch.o
-obj-$(CONFIG_CPU_XLP)		+= r4k_fpu.o r4k_switch.o
 
 obj-$(CONFIG_SMP)		+= smp.o
 obj-$(CONFIG_SMP_UP)		+= smp-up.o
@@ -70,7 +54,6 @@ obj-$(CONFIG_CPU_MIPSR2)	+= spram.o
 
 obj-$(CONFIG_MIPS_VPE_LOADER)	+= vpe.o
 obj-$(CONFIG_MIPS_VPE_APSP_API)	+= rtlx.o
-obj-$(CONFIG_MIPS_APSP_KSPD)	+= kspd.o
 
 obj-$(CONFIG_I8259)		+= i8259.o
 obj-$(CONFIG_IRQ_CPU)		+= irq_cpu.o
@@ -104,7 +87,7 @@ obj-$(CONFIG_MIPS_MACHINE)	+= mips_machine.o
 
 obj-$(CONFIG_OF)		+= prom.o
 
-CFLAGS_cpu-bugs64.o	= $(shell if $(CC) $(KBUILD_CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
+CFLAGS_cpu-bugs64.o	= $(shell if $(CC) $(KBUILD_CFLAGS) -Wa,-mdaddi -c -o /dev/null -x c /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
 
 obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT)	+= 8250-platform.o
 
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 6b30fb2caa6..0c4bce4882a 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -12,7 +12,6 @@
 #include <linux/types.h>
 #include <linux/sched.h>
 #include <linux/mm.h>
-#include <linux/interrupt.h>
 #include <linux/kbuild.h>
 #include <linux/suspend.h>
 #include <asm/ptrace.h>
@@ -292,15 +291,6 @@ void output_signal_defined(void)
 	BLANK();
 }
 
-void output_irq_cpustat_t_defines(void)
-{
-	COMMENT("Linux irq_cpustat_t offsets.");
-	DEFINE(IC_SOFTIRQ_PENDING,
-			offsetof(irq_cpustat_t, __softirq_pending));
-	DEFINE(IC_IRQ_CPUSTAT_T, sizeof(irq_cpustat_t));
-	BLANK();
-}
-
 #ifdef CONFIG_CPU_CAVIUM_OCTEON
 void output_octeon_cop2_state_defines(void)
 {
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 51095dd9599..75323925e53 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -15,6 +15,7 @@
 #include <asm/smtc_ipi.h>
 #include <asm/time.h>
 #include <asm/cevt-r4k.h>
+#include <asm/gic.h>
 
 /*
  * The SMTC Kernel for the 34K, 1004K, et. al. replaces several
@@ -98,6 +99,10 @@ void mips_event_handler(struct clock_event_device *dev)
  */
 static int c0_compare_int_pending(void)
 {
+#ifdef CONFIG_IRQ_GIC
+	if (cpu_has_veic)
+		return gic_get_timer_pending();
+#endif
 	return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP);
 }
 
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 1b51046191e..b1fb7af3c35 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -142,7 +142,7 @@ int __cpuinitdata mips_dsp_disabled;
 
 static int __init dsp_disable(char *s)
 {
-	cpu_data[0].ases &= ~MIPS_ASE_DSP;
+	cpu_data[0].ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P);
 	mips_dsp_disabled = 1;
 
 	return 1;
@@ -421,10 +421,16 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
 
 	config3 = read_c0_config3();
 
-	if (config3 & MIPS_CONF3_SM)
+	if (config3 & MIPS_CONF3_SM) {
 		c->ases |= MIPS_ASE_SMARTMIPS;
+		c->options |= MIPS_CPU_RIXI;
+	}
+	if (config3 & MIPS_CONF3_RXI)
+		c->options |= MIPS_CPU_RIXI;
 	if (config3 & MIPS_CONF3_DSP)
 		c->ases |= MIPS_ASE_DSP;
+	if (config3 & MIPS_CONF3_DSP2P)
+		c->ases |= MIPS_ASE_DSP2P;
 	if (config3 & MIPS_CONF3_VINT)
 		c->options |= MIPS_CPU_VINT;
 	if (config3 & MIPS_CONF3_VEIC)
@@ -857,6 +863,10 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
 		c->cputype = CPU_1004K;
 		__cpu_name[cpu] = "MIPS 1004Kc";
 		break;
+	case PRID_IMP_1074K:
+		c->cputype = CPU_74K;
+		__cpu_name[cpu] = "MIPS 1074Kc";
+		break;
 	}
 
 	spram_config();
@@ -1172,7 +1182,7 @@ __cpuinit void cpu_probe(void)
 		c->options &= ~MIPS_CPU_FPU;
 
 	if (mips_dsp_disabled)
-		c->ases &= ~MIPS_ASE_DSP;
+		c->ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P);
 
 	if (c->options & MIPS_CPU_FPU) {
 		c->fpu_id = cpu_get_fpu_id();
@@ -1186,8 +1196,11 @@ __cpuinit void cpu_probe(void)
 		}
 	}
 
-	if (cpu_has_mips_r2)
+	if (cpu_has_mips_r2) {
 		c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
+		/* R2 has Performance Counter Interrupt indicator */
+		c->options |= MIPS_CPU_PCI;
+	}
 	else
 		c->srsets = 1;
 
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 37acfa036d4..a6c13321200 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -77,7 +77,7 @@ FEXPORT(syscall_exit)
 	and	t0, a2, t0
 	bnez	t0, syscall_exit_work
 
-FEXPORT(restore_all)			# restore full frame
+restore_all:				# restore full frame
 #ifdef CONFIG_MIPS_MT_SMTC
 #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
 /* Re-arm any temporarily masked interrupts not explicitly "acked" */
@@ -117,7 +117,7 @@ FEXPORT(restore_all)			# restore full frame
 	RESTORE_TEMP
 	RESTORE_AT
 	RESTORE_STATIC
-FEXPORT(restore_partial)		# restore partial frame
+restore_partial:		# restore partial frame
 #ifdef CONFIG_TRACE_IRQFLAGS
 	SAVE_STATIC
 	SAVE_AT
@@ -164,9 +164,18 @@ work_notifysig:				# deal with pending signals and
 	jal	do_notify_resume	# a2 already loaded
 	j	resume_userspace
 
-FEXPORT(syscall_exit_work_partial)
+FEXPORT(syscall_exit_partial)
+	local_irq_disable		# make sure need_resched doesn't
+					# change between and return
+	LONG_L	a2, TI_FLAGS($28)	# current->work
+	li	t0, _TIF_ALLWORK_MASK
+	and	t0, a2
+	beqz	t0, restore_partial
 	SAVE_STATIC
 syscall_exit_work:
+	LONG_L	t0, PT_STATUS(sp)		# returning to kernel mode?
+	andi	t0, t0, KU_USER
+	beqz	t0, resume_kernel
 	li	t0, _TIF_WORK_SYSCALL_EXIT
 	and	t0, a2			# a2 is preloaded with TI_FLAGS
 	beqz	t0, work_pending	# trace bit set?
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c
index 0c527f65219..485e6a961b3 100644
--- a/arch/mips/kernel/irq-gic.c
+++ b/arch/mips/kernel/irq-gic.c
@@ -1,5 +1,11 @@
-#undef DEBUG
-
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2008 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
 #include <linux/bitmap.h>
 #include <linux/init.h>
 #include <linux/smp.h>
@@ -7,33 +13,80 @@
 
 #include <asm/io.h>
 #include <asm/gic.h>
+#include <asm/setup.h>
+#include <asm/traps.h>
 #include <asm/gcmpregs.h>
 #include <linux/hardirq.h>
 #include <asm-generic/bitops/find.h>
 
+unsigned long _gic_base;
+unsigned int gic_irq_base;
+unsigned int gic_irq_flags[GIC_NUM_INTRS];
 
-static unsigned long _gic_base;
-static unsigned int _irqbase;
-static unsigned int gic_irq_flags[GIC_NUM_INTRS];
-#define GIC_IRQ_FLAG_EDGE      0x0001
+/* The index into this array is the vector # of the interrupt. */
+struct gic_shared_intr_map gic_shared_intr_map[GIC_NUM_INTRS];
 
-struct gic_pcpu_mask pcpu_masks[NR_CPUS];
+static struct gic_pcpu_mask pcpu_masks[NR_CPUS];
 static struct gic_pending_regs pending_regs[NR_CPUS];
 static struct gic_intrmask_regs intrmask_regs[NR_CPUS];
 
+unsigned int gic_get_timer_pending(void)
+{
+	unsigned int vpe_pending;
+
+	GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0);
+	GICREAD(GIC_REG(VPE_OTHER, GIC_VPE_PEND), vpe_pending);
+	return (vpe_pending & GIC_VPE_PEND_TIMER_MSK);
+}
+
+void gic_bind_eic_interrupt(int irq, int set)
+{
+	/* Convert irq vector # to hw int # */
+	irq -= GIC_PIN_TO_VEC_OFFSET;
+
+	/* Set irq to use shadow set */
+	GICWRITE(GIC_REG_ADDR(VPE_LOCAL, GIC_VPE_EIC_SS(irq)), set);
+}
+
 void gic_send_ipi(unsigned int intr)
 {
-	pr_debug("CPU%d: %s status %08x\n", smp_processor_id(), __func__,
-		 read_c0_status());
 	GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), 0x80000000 | intr);
 }
 
-/* This is Malta specific and needs to be exported */
+static void gic_eic_irq_dispatch(void)
+{
+	unsigned int cause = read_c0_cause();
+	int irq;
+
+	irq = (cause & ST0_IM) >> STATUSB_IP2;
+	if (irq == 0)
+		irq = -1;
+
+	if (irq >= 0)
+		do_IRQ(gic_irq_base + irq);
+	else
+		spurious_interrupt();
+}
+
 static void __init vpe_local_setup(unsigned int numvpes)
 {
-	int i;
-	unsigned long timer_interrupt = 5, perf_interrupt = 5;
+	unsigned long timer_intr = GIC_INT_TMR;
+	unsigned long perf_intr = GIC_INT_PERFCTR;
 	unsigned int vpe_ctl;
+	int i;
+
+	if (cpu_has_veic) {
+		/*
+		 * GIC timer interrupt -> CPU HW Int X (vector X+2) ->
+		 * map to pin X+2-1 (since GIC adds 1)
+		 */
+		timer_intr += (GIC_CPU_TO_VEC_OFFSET - GIC_PIN_TO_VEC_OFFSET);
+		/*
+		 * GIC perfcnt interrupt -> CPU HW Int X (vector X+2) ->
+		 * map to pin X+2-1 (since GIC adds 1)
+		 */
+		perf_intr += (GIC_CPU_TO_VEC_OFFSET - GIC_PIN_TO_VEC_OFFSET);
+	}
 
 	/*
 	 * Setup the default performance counter timer interrupts
@@ -46,11 +99,20 @@ static void __init vpe_local_setup(unsigned int numvpes)
 		GICREAD(GIC_REG(VPE_OTHER, GIC_VPE_CTL), vpe_ctl);
 		if (vpe_ctl & GIC_VPE_CTL_TIMER_RTBL_MSK)
 			GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_TIMER_MAP),
-				 GIC_MAP_TO_PIN_MSK | timer_interrupt);
+				 GIC_MAP_TO_PIN_MSK | timer_intr);
+		if (cpu_has_veic) {
+			set_vi_handler(timer_intr + GIC_PIN_TO_VEC_OFFSET,
+				gic_eic_irq_dispatch);
+			gic_shared_intr_map[timer_intr + GIC_PIN_TO_VEC_OFFSET].local_intr_mask |= GIC_VPE_RMASK_TIMER_MSK;
+		}
 
 		if (vpe_ctl & GIC_VPE_CTL_PERFCNT_RTBL_MSK)
 			GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_PERFCTR_MAP),
-				 GIC_MAP_TO_PIN_MSK | perf_interrupt);
+				 GIC_MAP_TO_PIN_MSK | perf_intr);
+		if (cpu_has_veic) {
+			set_vi_handler(perf_intr + GIC_PIN_TO_VEC_OFFSET, gic_eic_irq_dispatch);
+			gic_shared_intr_map[perf_intr + GIC_PIN_TO_VEC_OFFSET].local_intr_mask |= GIC_VPE_RMASK_PERFCNT_MSK;
+		}
 	}
 }
 
@@ -80,51 +142,30 @@ unsigned int gic_get_int(void)
 	bitmap_and(pending, pending, intrmask, GIC_NUM_INTRS);
 	bitmap_and(pending, pending, pcpu_mask, GIC_NUM_INTRS);
 
-	i = find_first_bit(pending, GIC_NUM_INTRS);
-
-	pr_debug("CPU%d: %s pend=%d\n", smp_processor_id(), __func__, i);
-
-	return i;
-}
-
-static void gic_irq_ack(struct irq_data *d)
-{
-	unsigned int irq = d->irq - _irqbase;
-
-	pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
-	GIC_CLR_INTR_MASK(irq);
-
-	if (gic_irq_flags[irq] & GIC_IRQ_FLAG_EDGE)
-		GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq);
+	return find_first_bit(pending, GIC_NUM_INTRS);
 }
 
 static void gic_mask_irq(struct irq_data *d)
 {
-	unsigned int irq = d->irq - _irqbase;
-	pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
-	GIC_CLR_INTR_MASK(irq);
+	GIC_CLR_INTR_MASK(d->irq - gic_irq_base);
 }
 
 static void gic_unmask_irq(struct irq_data *d)
 {
-	unsigned int irq = d->irq - _irqbase;
-	pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq);
-	GIC_SET_INTR_MASK(irq);
+	GIC_SET_INTR_MASK(d->irq - gic_irq_base);
 }
 
 #ifdef CONFIG_SMP
-
 static DEFINE_SPINLOCK(gic_lock);
 
 static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
 			    bool force)
 {
-	unsigned int irq = d->irq - _irqbase;
+	unsigned int irq = (d->irq - gic_irq_base);
 	cpumask_t	tmp = CPU_MASK_NONE;
 	unsigned long	flags;
 	int		i;
 
-	pr_debug("%s(%d) called\n", __func__, irq);
 	cpumask_and(&tmp, cpumask, cpu_online_mask);
 	if (cpus_empty(tmp))
 		return -1;
@@ -154,7 +195,7 @@ static struct irq_chip gic_irq_controller = {
 	.irq_mask		=	gic_mask_irq,
 	.irq_mask_ack		=	gic_mask_irq,
 	.irq_unmask		=	gic_unmask_irq,
-	.irq_eoi		=	gic_unmask_irq,
+	.irq_eoi		=	gic_finish_irq,
 #ifdef CONFIG_SMP
 	.irq_set_affinity	=	gic_set_affinity,
 #endif
@@ -164,6 +205,8 @@ static void __init gic_setup_intr(unsigned int intr, unsigned int cpu,
 	unsigned int pin, unsigned int polarity, unsigned int trigtype,
 	unsigned int flags)
 {
+	struct gic_shared_intr_map *map_ptr;
+
 	/* Setup Intr to Pin mapping */
 	if (pin & GIC_MAP_TO_NMI_MSK) {
 		GICWRITE(GIC_REG_ADDR(SHARED, GIC_SH_MAP_TO_PIN(intr)), pin);
@@ -178,6 +221,14 @@ static void __init gic_setup_intr(unsigned int intr, unsigned int cpu,
 			 GIC_MAP_TO_PIN_MSK | pin);
 		/* Setup Intr to CPU mapping */
 		GIC_SH_MAP_TO_VPE_SMASK(intr, cpu);
+		if (cpu_has_veic) {
+			set_vi_handler(pin + GIC_PIN_TO_VEC_OFFSET,
+				gic_eic_irq_dispatch);
+			map_ptr = &gic_shared_intr_map[pin + GIC_PIN_TO_VEC_OFFSET];
+			if (map_ptr->num_shared_intr >= GIC_MAX_SHARED_INTR)
+				BUG();
+			map_ptr->intr_list[map_ptr->num_shared_intr++] = intr;
+		}
 	}
 
 	/* Setup Intr Polarity */
@@ -191,26 +242,39 @@ static void __init gic_setup_intr(unsigned int intr, unsigned int cpu,
 	/* Initialise per-cpu Interrupt software masks */
 	if (flags & GIC_FLAG_IPI)
 		set_bit(intr, pcpu_masks[cpu].pcpu_mask);
-	if (flags & GIC_FLAG_TRANSPARENT)
+	if ((flags & GIC_FLAG_TRANSPARENT) && (cpu_has_veic == 0))
 		GIC_SET_INTR_MASK(intr);
 	if (trigtype == GIC_TRIG_EDGE)
-		gic_irq_flags[intr] |= GIC_IRQ_FLAG_EDGE;
+		gic_irq_flags[intr] |= GIC_TRIG_EDGE;
 }
 
 static void __init gic_basic_init(int numintrs, int numvpes,
 			struct gic_intr_map *intrmap, int mapsize)
 {
 	unsigned int i, cpu;
+	unsigned int pin_offset = 0;
+
+	board_bind_eic_interrupt = &gic_bind_eic_interrupt;
 
 	/* Setup defaults */
 	for (i = 0; i < numintrs; i++) {
 		GIC_SET_POLARITY(i, GIC_POL_POS);
 		GIC_SET_TRIGGER(i, GIC_TRIG_LEVEL);
 		GIC_CLR_INTR_MASK(i);
-		if (i < GIC_NUM_INTRS)
+		if (i < GIC_NUM_INTRS) {
 			gic_irq_flags[i] = 0;
+			gic_shared_intr_map[i].num_shared_intr = 0;
+			gic_shared_intr_map[i].local_intr_mask = 0;
+		}
 	}
 
+	/*
+	 * In EIC mode, the HW_INT# is offset by (2-1). Need to subtract
+	 * one because the GIC will add one (since 0=no intr).
+	 */
+	if (cpu_has_veic)
+		pin_offset = (GIC_CPU_TO_VEC_OFFSET - GIC_PIN_TO_VEC_OFFSET);
+
 	/* Setup specifics */
 	for (i = 0; i < mapsize; i++) {
 		cpu = intrmap[i].cpunum;
@@ -220,16 +284,13 @@ static void __init gic_basic_init(int numintrs, int numvpes,
 			continue;
 		gic_setup_intr(i,
 			intrmap[i].cpunum,
-			intrmap[i].pin,
+			intrmap[i].pin + pin_offset,
 			intrmap[i].polarity,
 			intrmap[i].trigtype,
 			intrmap[i].flags);
 	}
 
 	vpe_local_setup(numvpes);
-
-	for (i = _irqbase; i < (_irqbase + numintrs); i++)
-		irq_set_chip(i, &gic_irq_controller);
 }
 
 void __init gic_init(unsigned long gic_base_addr,
@@ -242,7 +303,7 @@ void __init gic_init(unsigned long gic_base_addr,
 
 	_gic_base = (unsigned long) ioremap_nocache(gic_base_addr,
 						    gic_addrspace_size);
-	_irqbase = irqbase;
+	gic_irq_base = irqbase;
 
 	GICREAD(GIC_REG(SHARED, GIC_SH_CONFIG), gicconfig);
 	numintrs = (gicconfig & GIC_SH_CONFIG_NUMINTRS_MSK) >>
@@ -251,8 +312,9 @@ void __init gic_init(unsigned long gic_base_addr,
 
 	numvpes = (gicconfig & GIC_SH_CONFIG_NUMVPES_MSK) >>
 		  GIC_SH_CONFIG_NUMVPES_SHF;
-
-	pr_debug("%s called\n", __func__);
+	numvpes = numvpes + 1;
 
 	gic_basic_init(numintrs, numvpes, intr_map, intr_map_size);
+
+	gic_platform_init(numintrs, &gic_irq_controller);
 }
diff --git a/arch/mips/kernel/kgdb.c b/arch/mips/kernel/kgdb.c
index f4546e97c60..23817a6e32b 100644
--- a/arch/mips/kernel/kgdb.c
+++ b/arch/mips/kernel/kgdb.c
@@ -283,6 +283,15 @@ static int kgdb_mips_notify(struct notifier_block *self, unsigned long cmd,
 	struct pt_regs *regs = args->regs;
 	int trap = (regs->cp0_cause & 0x7c) >> 2;
 
+#ifdef CONFIG_KPROBES
+	/*
+	 * Return immediately if the kprobes fault notifier has set
+	 * DIE_PAGE_FAULT.
+	 */
+	if (cmd == DIE_PAGE_FAULT)
+		return NOTIFY_DONE;
+#endif /* CONFIG_KPROBES */
+
 	/* Userspace events, ignore. */
 	if (user_mode(regs))
 		return NOTIFY_DONE;
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
deleted file mode 100644
index b77f56bbb47..00000000000
--- a/arch/mips/kernel/kspd.c
+++ /dev/null
@@ -1,423 +0,0 @@
-/*
- * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/unistd.h>
-#include <linux/file.h>
-#include <linux/fdtable.h>
-#include <linux/fs.h>
-#include <linux/syscalls.h>
-#include <linux/workqueue.h>
-#include <linux/errno.h>
-#include <linux/list.h>
-
-#include <asm/vpe.h>
-#include <asm/rtlx.h>
-#include <asm/kspd.h>
-
-static struct workqueue_struct *workqueue;
-static struct work_struct work;
-
-extern unsigned long cpu_khz;
-
-struct mtsp_syscall {
-	int cmd;
-	unsigned char abi;
-	unsigned char size;
-};
-
-struct mtsp_syscall_ret {
-	int retval;
-	int errno;
-};
-
-struct mtsp_syscall_generic {
-	int arg0;
-	int arg1;
-	int arg2;
-	int arg3;
-	int arg4;
-	int arg5;
-	int arg6;
-};
-
-static struct list_head kspd_notifylist;
-static int sp_stopping;
-
-/* these should match with those in the SDE kit */
-#define MTSP_SYSCALL_BASE	0
-#define MTSP_SYSCALL_EXIT	(MTSP_SYSCALL_BASE + 0)
-#define MTSP_SYSCALL_OPEN	(MTSP_SYSCALL_BASE + 1)
-#define MTSP_SYSCALL_READ	(MTSP_SYSCALL_BASE + 2)
-#define MTSP_SYSCALL_WRITE	(MTSP_SYSCALL_BASE + 3)
-#define MTSP_SYSCALL_CLOSE	(MTSP_SYSCALL_BASE + 4)
-#define MTSP_SYSCALL_LSEEK32	(MTSP_SYSCALL_BASE + 5)
-#define MTSP_SYSCALL_ISATTY	(MTSP_SYSCALL_BASE + 6)
-#define MTSP_SYSCALL_GETTIME	(MTSP_SYSCALL_BASE + 7)
-#define MTSP_SYSCALL_PIPEFREQ	(MTSP_SYSCALL_BASE + 8)
-#define MTSP_SYSCALL_GETTOD	(MTSP_SYSCALL_BASE + 9)
-#define MTSP_SYSCALL_IOCTL     (MTSP_SYSCALL_BASE + 10)
-
-#define MTSP_O_RDONLY		0x0000
-#define MTSP_O_WRONLY		0x0001
-#define MTSP_O_RDWR		0x0002
-#define MTSP_O_NONBLOCK		0x0004
-#define MTSP_O_APPEND		0x0008
-#define MTSP_O_SHLOCK		0x0010
-#define MTSP_O_EXLOCK		0x0020
-#define MTSP_O_ASYNC		0x0040
-/* XXX: check which of these is actually O_SYNC vs O_DSYNC */
-#define MTSP_O_FSYNC		O_SYNC
-#define MTSP_O_NOFOLLOW		0x0100
-#define MTSP_O_SYNC		0x0080
-#define MTSP_O_CREAT		0x0200
-#define MTSP_O_TRUNC		0x0400
-#define MTSP_O_EXCL		0x0800
-#define MTSP_O_BINARY		0x8000
-
-extern int tclimit;
-
-struct apsp_table  {
-	int sp;
-	int ap;
-};
-
-/* we might want to do the mode flags too */
-struct apsp_table open_flags_table[] = {
-	{ MTSP_O_RDWR, O_RDWR },
-	{ MTSP_O_WRONLY, O_WRONLY },
-	{ MTSP_O_CREAT, O_CREAT },
-	{ MTSP_O_TRUNC, O_TRUNC },
-	{ MTSP_O_NONBLOCK, O_NONBLOCK },
-	{ MTSP_O_APPEND, O_APPEND },
-	{ MTSP_O_NOFOLLOW, O_NOFOLLOW }
-};
-
-struct apsp_table syscall_command_table[] = {
-	{ MTSP_SYSCALL_OPEN, __NR_open },
-	{ MTSP_SYSCALL_CLOSE, __NR_close },
-	{ MTSP_SYSCALL_READ, __NR_read },
-	{ MTSP_SYSCALL_WRITE, __NR_write },
-	{ MTSP_SYSCALL_LSEEK32, __NR_lseek },
-	{ MTSP_SYSCALL_IOCTL, __NR_ioctl }
-};
-
-static int sp_syscall(int num, int arg0, int arg1, int arg2, int arg3)
-{
-	register long int _num  __asm__("$2") = num;
-	register long int _arg0  __asm__("$4") = arg0;
-	register long int _arg1  __asm__("$5") = arg1;
-	register long int _arg2  __asm__("$6") = arg2;
-	register long int _arg3  __asm__("$7") = arg3;
-
-	mm_segment_t old_fs;
-
-	old_fs = get_fs();
- 	set_fs(KERNEL_DS);
-
-  	__asm__ __volatile__ (
- 	"	syscall					\n"
- 	: "=r" (_num), "=r" (_arg3)
- 	: "r" (_num), "r" (_arg0), "r" (_arg1), "r" (_arg2), "r" (_arg3));
-
-	set_fs(old_fs);
-
-	/* $a3 is error flag */
-	if (_arg3)
-		return -_num;
-
-	return _num;
-}
-
-static int translate_syscall_command(int cmd)
-{
-	int i;
-	int ret = -1;
-
-	for (i = 0; i < ARRAY_SIZE(syscall_command_table); i++) {
-		if ((cmd == syscall_command_table[i].sp))
-			return syscall_command_table[i].ap;
-	}
-
-	return ret;
-}
-
-static unsigned int translate_open_flags(int flags)
-{
-	int i;
-	unsigned int ret = 0;
-
-	for (i = 0; i < ARRAY_SIZE(open_flags_table); i++) {
-		if( (flags & open_flags_table[i].sp) ) {
-			ret |= open_flags_table[i].ap;
-		}
-	}
-
-	return ret;
-}
-
-
-static int sp_setfsuidgid(uid_t uid, gid_t gid)
-{
-	struct cred *new;
-
-	new = prepare_creds();
-	if (!new)
-		return -ENOMEM;
-
-	new->fsuid = uid;
-	new->fsgid = gid;
-
-	commit_creds(new);
-
-	return 0;
-}
-
-/*
- * Expects a request to be on the sysio channel. Reads it.  Decides whether
- * its a linux syscall and runs it, or whatever.  Puts the return code back
- * into the request and sends the whole thing back.
- */
-void sp_work_handle_request(void)
-{
-	struct mtsp_syscall sc;
-	struct mtsp_syscall_generic generic;
-	struct mtsp_syscall_ret ret;
-	struct kspd_notifications *n;
-	unsigned long written;
-	mm_segment_t old_fs;
-	struct timeval tv;
-	struct timezone tz;
-	int err, cmd;
-
-	char *vcwd;
-	int size;
-
-	ret.retval = -1;
-
-	old_fs = get_fs();
-	set_fs(KERNEL_DS);
-
-	if (!rtlx_read(RTLX_CHANNEL_SYSIO, &sc, sizeof(struct mtsp_syscall))) {
-		set_fs(old_fs);
-		printk(KERN_ERR "Expected request but nothing to read\n");
-		return;
-	}
-
-	size = sc.size;
-
-	if (size) {
-		if (!rtlx_read(RTLX_CHANNEL_SYSIO, &generic, size)) {
-			set_fs(old_fs);
-			printk(KERN_ERR "Expected request but nothing to read\n");
-			return;
-		}
-	}
-
-	/* Run the syscall at the privilege of the user who loaded the
-	   SP program */
-
-	if (vpe_getuid(tclimit)) {
-		err = sp_setfsuidgid(vpe_getuid(tclimit), vpe_getgid(tclimit));
-		if (!err)
-			pr_err("Change of creds failed\n");
-	}
-
-	switch (sc.cmd) {
-	/* needs the flags argument translating from SDE kit to
-	   linux */
- 	case MTSP_SYSCALL_PIPEFREQ:
- 		ret.retval = cpu_khz * 1000;
- 		ret.errno = 0;
- 		break;
-
- 	case MTSP_SYSCALL_GETTOD:
- 		memset(&tz, 0, sizeof(tz));
- 		if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv,
-					     (int)&tz, 0, 0)) == 0)
-			ret.retval = tv.tv_sec;
-		break;
-
- 	case MTSP_SYSCALL_EXIT:
-		list_for_each_entry(n, &kspd_notifylist, list)
-			n->kspd_sp_exit(tclimit);
-		sp_stopping = 1;
-
-		printk(KERN_DEBUG "KSPD got exit syscall from SP exitcode %d\n",
-		       generic.arg0);
- 		break;
-
- 	case MTSP_SYSCALL_OPEN:
- 		generic.arg1 = translate_open_flags(generic.arg1);
-
-		vcwd = vpe_getcwd(tclimit);
-
-		/* change to cwd of the process that loaded the SP program */
-		old_fs = get_fs();
-		set_fs(KERNEL_DS);
-		sys_chdir(vcwd);
-		set_fs(old_fs);
-
- 		sc.cmd = __NR_open;
-
-		/* fall through */
-
-  	default:
- 		if ((sc.cmd >= __NR_Linux) &&
-		    (sc.cmd <= (__NR_Linux +  __NR_Linux_syscalls)) )
-			cmd = sc.cmd;
-		else
-			cmd = translate_syscall_command(sc.cmd);
-
-		if (cmd >= 0) {
-			ret.retval = sp_syscall(cmd, generic.arg0, generic.arg1,
-			                        generic.arg2, generic.arg3);
-		} else
- 			printk(KERN_WARNING
-			       "KSPD: Unknown SP syscall number %d\n", sc.cmd);
-		break;
- 	} /* switch */
-
-	if (vpe_getuid(tclimit)) {
-		err = sp_setfsuidgid(0, 0);
-		if (!err)
-			pr_err("restoring old creds failed\n");
-	}
-
-	old_fs = get_fs();
-	set_fs(KERNEL_DS);
-	written = rtlx_write(RTLX_CHANNEL_SYSIO, &ret, sizeof(ret));
-	set_fs(old_fs);
-	if (written < sizeof(ret))
-		printk("KSPD: sp_work_handle_request failed to send to SP\n");
-}
-
-static void sp_cleanup(void)
-{
-	struct files_struct *files = current->files;
-	int i, j;
-	struct fdtable *fdt;
-
-	j = 0;
-
-	/*
-	 * It is safe to dereference the fd table without RCU or
-	 * ->file_lock
-	 */
-	fdt = files_fdtable(files);
-	for (;;) {
-		unsigned long set;
-		i = j * BITS_PER_LONG;
-		if (i >= fdt->max_fds)
-			break;
-		set = fdt->open_fds[j++];
-		while (set) {
-			if (set & 1) {
-				struct file * file = xchg(&fdt->fd[i], NULL);
-				if (file)
-					filp_close(file, files);
-			}
-			i++;
-			set >>= 1;
-		}
-	}
-
-	/* Put daemon cwd back to root to avoid umount problems */
-	sys_chdir("/");
-}
-
-static int channel_open;
-
-/* the work handler */
-static void sp_work(struct work_struct *unused)
-{
-	if (!channel_open) {
-		if( rtlx_open(RTLX_CHANNEL_SYSIO, 1) != 0) {
-			printk("KSPD: unable to open sp channel\n");
-			sp_stopping = 1;
-		} else {
-			channel_open++;
-			printk(KERN_DEBUG "KSPD: SP channel opened\n");
-		}
-	} else {
-		/* wait for some data, allow it to sleep */
-		rtlx_read_poll(RTLX_CHANNEL_SYSIO, 1);
-
-		/* Check we haven't been woken because we are stopping */
-		if (!sp_stopping)
-			sp_work_handle_request();
-	}
-
-	if (!sp_stopping)
-		queue_work(workqueue, &work);
-	else
-		sp_cleanup();
-}
-
-static void startwork(int vpe)
-{
-	sp_stopping = channel_open = 0;
-
-	if (workqueue == NULL) {
-		if ((workqueue = create_singlethread_workqueue("kspd")) == NULL) {
-			printk(KERN_ERR "unable to start kspd\n");
-			return;
-		}
-
-		INIT_WORK(&work, sp_work);
-	}
-
-	queue_work(workqueue, &work);
-}
-
-static void stopwork(int vpe)
-{
-	sp_stopping = 1;
-
-	printk(KERN_DEBUG "KSPD: SP stopping\n");
-}
-
-void kspd_notify(struct kspd_notifications *notify)
-{
-	list_add(&notify->list, &kspd_notifylist);
-}
-
-static struct vpe_notifications notify;
-static int kspd_module_init(void)
-{
-	INIT_LIST_HEAD(&kspd_notifylist);
-
-	notify.start = startwork;
-	notify.stop = stopwork;
-	vpe_notify(tclimit, &notify);
-
-	return 0;
-}
-
-static void kspd_module_exit(void)
-{
-
-}
-
-module_init(kspd_module_init);
-module_exit(kspd_module_exit);
-
-MODULE_DESCRIPTION("MIPS KSPD");
-MODULE_AUTHOR("Elizabeth Oldham, MIPS Technologies, Inc.");
-MODULE_LICENSE("GPL");
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 922a554cd10..3a21acedf88 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -83,13 +83,13 @@ out:
 asmlinkage int sys32_execve(nabi_no_regargs struct pt_regs regs)
 {
 	int error;
-	char * filename;
+	struct filename *filename;
 
 	filename = getname(compat_ptr(regs.regs[4]));
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = compat_do_execve(filename, compat_ptr(regs.regs[5]),
+	error = compat_do_execve(filename->name, compat_ptr(regs.regs[5]),
 				 compat_ptr(regs.regs[6]), &regs);
 	putname(filename);
 
diff --git a/arch/mips/kernel/module-rela.c b/arch/mips/kernel/module-rela.c
new file mode 100644
index 00000000000..61d60028b88
--- /dev/null
+++ b/arch/mips/kernel/module-rela.c
@@ -0,0 +1,145 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *  Copyright (C) 2001 Rusty Russell.
+ *  Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
+ *  Copyright (C) 2005 Thiemo Seufer
+ */
+
+#include <linux/elf.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/moduleloader.h>
+
+extern int apply_r_mips_none(struct module *me, u32 *location, Elf_Addr v);
+
+static int apply_r_mips_32_rela(struct module *me, u32 *location, Elf_Addr v)
+{
+	*location = v;
+
+	return 0;
+}
+
+static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v)
+{
+	if (v % 4) {
+		pr_err("module %s: dangerous R_MIPS_26 RELArelocation\n",
+		       me->name);
+		return -ENOEXEC;
+	}
+
+	if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
+		printk(KERN_ERR
+		       "module %s: relocation overflow\n",
+		       me->name);
+		return -ENOEXEC;
+	}
+
+	*location = (*location & ~0x03ffffff) | ((v >> 2) & 0x03ffffff);
+
+	return 0;
+}
+
+static int apply_r_mips_hi16_rela(struct module *me, u32 *location, Elf_Addr v)
+{
+	*location = (*location & 0xffff0000) |
+	            ((((long long) v + 0x8000LL) >> 16) & 0xffff);
+
+	return 0;
+}
+
+static int apply_r_mips_lo16_rela(struct module *me, u32 *location, Elf_Addr v)
+{
+	*location = (*location & 0xffff0000) | (v & 0xffff);
+
+	return 0;
+}
+
+static int apply_r_mips_64_rela(struct module *me, u32 *location, Elf_Addr v)
+{
+	*(Elf_Addr *)location = v;
+
+	return 0;
+}
+
+static int apply_r_mips_higher_rela(struct module *me, u32 *location,
+				    Elf_Addr v)
+{
+	*location = (*location & 0xffff0000) |
+	            ((((long long) v + 0x80008000LL) >> 32) & 0xffff);
+
+	return 0;
+}
+
+static int apply_r_mips_highest_rela(struct module *me, u32 *location,
+				     Elf_Addr v)
+{
+	*location = (*location & 0xffff0000) |
+	            ((((long long) v + 0x800080008000LL) >> 48) & 0xffff);
+
+	return 0;
+}
+
+static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
+				Elf_Addr v) = {
+	[R_MIPS_NONE]		= apply_r_mips_none,
+	[R_MIPS_32]		= apply_r_mips_32_rela,
+	[R_MIPS_26]		= apply_r_mips_26_rela,
+	[R_MIPS_HI16]		= apply_r_mips_hi16_rela,
+	[R_MIPS_LO16]		= apply_r_mips_lo16_rela,
+	[R_MIPS_64]		= apply_r_mips_64_rela,
+	[R_MIPS_HIGHER]		= apply_r_mips_higher_rela,
+	[R_MIPS_HIGHEST]	= apply_r_mips_highest_rela
+};
+
+int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
+		       unsigned int symindex, unsigned int relsec,
+		       struct module *me)
+{
+	Elf_Mips_Rela *rel = (void *) sechdrs[relsec].sh_addr;
+	Elf_Sym *sym;
+	u32 *location;
+	unsigned int i;
+	Elf_Addr v;
+	int res;
+
+	pr_debug("Applying relocate section %u to %u\n", relsec,
+	       sechdrs[relsec].sh_info);
+
+	for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
+		/* This is where to make the change */
+		location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
+			+ rel[i].r_offset;
+		/* This is the symbol it is referring to */
+		sym = (Elf_Sym *)sechdrs[symindex].sh_addr
+			+ ELF_MIPS_R_SYM(rel[i]);
+		if (IS_ERR_VALUE(sym->st_value)) {
+			/* Ignore unresolved weak symbol */
+			if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
+				continue;
+			printk(KERN_WARNING "%s: Unknown symbol %s\n",
+			       me->name, strtab + sym->st_name);
+			return -ENOENT;
+		}
+
+		v = sym->st_value + rel[i].r_addend;
+
+		res = reloc_handlers_rela[ELF_MIPS_R_TYPE(rel[i])](me, location, v);
+		if (res)
+			return res;
+	}
+
+	return 0;
+}
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index 4f8c3cba8c0..07ff5812ffa 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -51,7 +51,7 @@ void *module_alloc(unsigned long size)
 }
 #endif
 
-static int apply_r_mips_none(struct module *me, u32 *location, Elf_Addr v)
+int apply_r_mips_none(struct module *me, u32 *location, Elf_Addr v)
 {
 	return 0;
 }
@@ -63,13 +63,6 @@ static int apply_r_mips_32_rel(struct module *me, u32 *location, Elf_Addr v)
 	return 0;
 }
 
-static int apply_r_mips_32_rela(struct module *me, u32 *location, Elf_Addr v)
-{
-	*location = v;
-
-	return 0;
-}
-
 static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v)
 {
 	if (v % 4) {
@@ -91,26 +84,6 @@ static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v)
 	return 0;
 }
 
-static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v)
-{
-	if (v % 4) {
-		pr_err("module %s: dangerous R_MIPS_26 RELArelocation\n",
-		       me->name);
-		return -ENOEXEC;
-	}
-
-	if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
-		printk(KERN_ERR
-		       "module %s: relocation overflow\n",
-		       me->name);
-		return -ENOEXEC;
-	}
-
-	*location = (*location & ~0x03ffffff) | ((v >> 2) & 0x03ffffff);
-
-	return 0;
-}
-
 static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v)
 {
 	struct mips_hi16 *n;
@@ -132,14 +105,6 @@ static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v)
 	return 0;
 }
 
-static int apply_r_mips_hi16_rela(struct module *me, u32 *location, Elf_Addr v)
-{
-	*location = (*location & 0xffff0000) |
-	            ((((long long) v + 0x8000LL) >> 16) & 0xffff);
-
-	return 0;
-}
-
 static void free_relocation_chain(struct mips_hi16 *l)
 {
 	struct mips_hi16 *next;
@@ -217,38 +182,6 @@ out_danger:
 	return -ENOEXEC;
 }
 
-static int apply_r_mips_lo16_rela(struct module *me, u32 *location, Elf_Addr v)
-{
-	*location = (*location & 0xffff0000) | (v & 0xffff);
-
-	return 0;
-}
-
-static int apply_r_mips_64_rela(struct module *me, u32 *location, Elf_Addr v)
-{
-	*(Elf_Addr *)location = v;
-
-	return 0;
-}
-
-static int apply_r_mips_higher_rela(struct module *me, u32 *location,
-				    Elf_Addr v)
-{
-	*location = (*location & 0xffff0000) |
-	            ((((long long) v + 0x80008000LL) >> 32) & 0xffff);
-
-	return 0;
-}
-
-static int apply_r_mips_highest_rela(struct module *me, u32 *location,
-				     Elf_Addr v)
-{
-	*location = (*location & 0xffff0000) |
-	            ((((long long) v + 0x800080008000LL) >> 48) & 0xffff);
-
-	return 0;
-}
-
 static int (*reloc_handlers_rel[]) (struct module *me, u32 *location,
 				Elf_Addr v) = {
 	[R_MIPS_NONE]		= apply_r_mips_none,
@@ -258,18 +191,6 @@ static int (*reloc_handlers_rel[]) (struct module *me, u32 *location,
 	[R_MIPS_LO16]		= apply_r_mips_lo16_rel
 };
 
-static int (*reloc_handlers_rela[]) (struct module *me, u32 *location,
-				Elf_Addr v) = {
-	[R_MIPS_NONE]		= apply_r_mips_none,
-	[R_MIPS_32]		= apply_r_mips_32_rela,
-	[R_MIPS_26]		= apply_r_mips_26_rela,
-	[R_MIPS_HI16]		= apply_r_mips_hi16_rela,
-	[R_MIPS_LO16]		= apply_r_mips_lo16_rela,
-	[R_MIPS_64]		= apply_r_mips_64_rela,
-	[R_MIPS_HIGHER]		= apply_r_mips_higher_rela,
-	[R_MIPS_HIGHEST]	= apply_r_mips_highest_rela
-};
-
 int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
 		   unsigned int symindex, unsigned int relsec,
 		   struct module *me)
@@ -324,46 +245,6 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
 	return 0;
 }
 
-int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
-		       unsigned int symindex, unsigned int relsec,
-		       struct module *me)
-{
-	Elf_Mips_Rela *rel = (void *) sechdrs[relsec].sh_addr;
-	Elf_Sym *sym;
-	u32 *location;
-	unsigned int i;
-	Elf_Addr v;
-	int res;
-
-	pr_debug("Applying relocate section %u to %u\n", relsec,
-	       sechdrs[relsec].sh_info);
-
-	for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
-		/* This is where to make the change */
-		location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
-			+ rel[i].r_offset;
-		/* This is the symbol it is referring to */
-		sym = (Elf_Sym *)sechdrs[symindex].sh_addr
-			+ ELF_MIPS_R_SYM(rel[i]);
-		if (IS_ERR_VALUE(sym->st_value)) {
-			/* Ignore unresolved weak symbol */
-			if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
-				continue;
-			printk(KERN_WARNING "%s: Unknown symbol %s\n",
-			       me->name, strtab + sym->st_name);
-			return -ENOENT;
-		}
-
-		v = sym->st_value + rel[i].r_addend;
-
-		res = reloc_handlers_rela[ELF_MIPS_R_TYPE(rel[i])](me, location, v);
-		if (res)
-			return res;
-	}
-
-	return 0;
-}
-
 /* Given an address, look for it in the module exception tables. */
 const struct exception_table_entry *search_module_dbetables(unsigned long addr)
 {
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index 2f28d3b5568..a9b995dcf69 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -28,6 +28,8 @@
 #include <asm/time.h> /* For perf_irq */
 
 #define MIPS_MAX_HWEVENTS 4
+#define MIPS_TCS_PER_COUNTER 2
+#define MIPS_CPUID_TO_COUNTER_MASK (MIPS_TCS_PER_COUNTER - 1)
 
 struct cpu_hw_events {
 	/* Array of events on this cpu. */
@@ -78,7 +80,6 @@ struct mips_perf_event {
 static struct mips_perf_event raw_event;
 static DEFINE_MUTEX(raw_event_mutex);
 
-#define UNSUPPORTED_PERF_EVENT_ID 0xffffffff
 #define C(x) PERF_COUNT_HW_CACHE_##x
 
 struct mips_pmu {
@@ -109,13 +110,20 @@ static struct mips_pmu mipspmu;
 #define M_PERFCTL_INTERRUPT_ENABLE	(1      <<  4)
 #define M_PERFCTL_EVENT(event)		(((event) & 0x3ff)  << 5)
 #define M_PERFCTL_VPEID(vpe)		((vpe)    << 16)
+
+#ifdef CONFIG_CPU_BMIPS5000
+#define M_PERFCTL_MT_EN(filter)		0
+#else /* !CONFIG_CPU_BMIPS5000 */
 #define M_PERFCTL_MT_EN(filter)		((filter) << 20)
+#endif /* CONFIG_CPU_BMIPS5000 */
+
 #define    M_TC_EN_ALL			M_PERFCTL_MT_EN(0)
 #define    M_TC_EN_VPE			M_PERFCTL_MT_EN(1)
 #define    M_TC_EN_TC			M_PERFCTL_MT_EN(2)
 #define M_PERFCTL_TCID(tcid)		((tcid)   << 22)
 #define M_PERFCTL_WIDE			(1      << 30)
 #define M_PERFCTL_MORE			(1      << 31)
+#define M_PERFCTL_TC			(1      << 30)
 
 #define M_PERFCTL_COUNT_EVENT_WHENEVER	(M_PERFCTL_EXL |		\
 					M_PERFCTL_KERNEL |		\
@@ -131,21 +139,21 @@ static struct mips_pmu mipspmu;
 #define M_PERFCTL_EVENT_MASK		0xfe0
 
 
-#ifdef CONFIG_MIPS_MT_SMP
+#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
 static int cpu_has_mipsmt_pertccounters;
 
 static DEFINE_RWLOCK(pmuint_rwlock);
 
+#if defined(CONFIG_CPU_BMIPS5000)
+#define vpe_id()	(cpu_has_mipsmt_pertccounters ? \
+			 0 : (smp_processor_id() & MIPS_CPUID_TO_COUNTER_MASK))
+#else
 /*
  * FIXME: For VSMP, vpe_id() is redefined for Perf-events, because
  * cpu_data[cpuid].vpe_id reports 0 for _both_ CPUs.
  */
-#if defined(CONFIG_HW_PERF_EVENTS)
-#define vpe_id()	(cpu_has_mipsmt_pertccounters ? \
-			0 : smp_processor_id())
-#else
 #define vpe_id()	(cpu_has_mipsmt_pertccounters ? \
-			0 : cpu_data[smp_processor_id()].vpe_id)
+			 0 : smp_processor_id())
 #endif
 
 /* Copied from op_model_mipsxx.c */
@@ -162,10 +170,10 @@ static unsigned int counters_total_to_per_cpu(unsigned int counters)
 	return counters >> vpe_shift();
 }
 
-#else /* !CONFIG_MIPS_MT_SMP */
+#else /* !CONFIG_MIPS_PERF_SHARED_TC_COUNTERS */
 #define vpe_id()	0
 
-#endif /* CONFIG_MIPS_MT_SMP */
+#endif /* CONFIG_MIPS_PERF_SHARED_TC_COUNTERS */
 
 static void resume_local_counters(void);
 static void pause_local_counters(void);
@@ -340,6 +348,11 @@ static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
 		(evt->config_base & M_PERFCTL_CONFIG_MASK) |
 		/* Make sure interrupt enabled. */
 		M_PERFCTL_INTERRUPT_ENABLE;
+	if (IS_ENABLED(CONFIG_CPU_BMIPS5000))
+		/* enable the counter for the calling thread */
+		cpuc->saved_ctrl[idx] |=
+			(1 << (12 + vpe_id())) | M_PERFCTL_TC;
+
 	/*
 	 * We do not actually let the counter run. Leave it until start().
 	 */
@@ -509,7 +522,7 @@ static void mipspmu_read(struct perf_event *event)
 
 static void mipspmu_enable(struct pmu *pmu)
 {
-#ifdef CONFIG_MIPS_MT_SMP
+#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
 	write_unlock(&pmuint_rwlock);
 #endif
 	resume_local_counters();
@@ -529,7 +542,7 @@ static void mipspmu_enable(struct pmu *pmu)
 static void mipspmu_disable(struct pmu *pmu)
 {
 	pause_local_counters();
-#ifdef CONFIG_MIPS_MT_SMP
+#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
 	write_lock(&pmuint_rwlock);
 #endif
 }
@@ -664,13 +677,10 @@ static unsigned int mipspmu_perf_event_encode(const struct mips_perf_event *pev)
 
 static const struct mips_perf_event *mipspmu_map_general_event(int idx)
 {
-	const struct mips_perf_event *pev;
-
-	pev = ((*mipspmu.general_event_map)[idx].event_id ==
-		UNSUPPORTED_PERF_EVENT_ID ? ERR_PTR(-EOPNOTSUPP) :
-		&(*mipspmu.general_event_map)[idx]);
 
-	return pev;
+	if ((*mipspmu.general_event_map)[idx].cntr_mask == 0)
+		return ERR_PTR(-EOPNOTSUPP);
+	return &(*mipspmu.general_event_map)[idx];
 }
 
 static const struct mips_perf_event *mipspmu_map_cache_event(u64 config)
@@ -695,7 +705,7 @@ static const struct mips_perf_event *mipspmu_map_cache_event(u64 config)
 					[cache_op]
 					[cache_result]);
 
-	if (pev->event_id == UNSUPPORTED_PERF_EVENT_ID)
+	if (pev->cntr_mask == 0)
 		return ERR_PTR(-EOPNOTSUPP);
 
 	return pev;
@@ -800,11 +810,8 @@ static const struct mips_perf_event mipsxxcore_event_map
 				[PERF_COUNT_HW_MAX] = {
 	[PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
 	[PERF_COUNT_HW_INSTRUCTIONS] = { 0x01, CNTR_EVEN | CNTR_ODD, T },
-	[PERF_COUNT_HW_CACHE_REFERENCES] = { UNSUPPORTED_PERF_EVENT_ID },
-	[PERF_COUNT_HW_CACHE_MISSES] = { UNSUPPORTED_PERF_EVENT_ID },
 	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x02, CNTR_EVEN, T },
 	[PERF_COUNT_HW_BRANCH_MISSES] = { 0x02, CNTR_ODD, T },
-	[PERF_COUNT_HW_BUS_CYCLES] = { UNSUPPORTED_PERF_EVENT_ID },
 };
 
 /* 74K core has different branch event code. */
@@ -812,11 +819,8 @@ static const struct mips_perf_event mipsxx74Kcore_event_map
 				[PERF_COUNT_HW_MAX] = {
 	[PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, P },
 	[PERF_COUNT_HW_INSTRUCTIONS] = { 0x01, CNTR_EVEN | CNTR_ODD, T },
-	[PERF_COUNT_HW_CACHE_REFERENCES] = { UNSUPPORTED_PERF_EVENT_ID },
-	[PERF_COUNT_HW_CACHE_MISSES] = { UNSUPPORTED_PERF_EVENT_ID },
 	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = { 0x27, CNTR_EVEN, T },
 	[PERF_COUNT_HW_BRANCH_MISSES] = { 0x27, CNTR_ODD, T },
-	[PERF_COUNT_HW_BUS_CYCLES] = { UNSUPPORTED_PERF_EVENT_ID },
 };
 
 static const struct mips_perf_event octeon_event_map[PERF_COUNT_HW_MAX] = {
@@ -829,6 +833,13 @@ static const struct mips_perf_event octeon_event_map[PERF_COUNT_HW_MAX] = {
 	[PERF_COUNT_HW_BUS_CYCLES] = { 0x25, CNTR_ALL },
 };
 
+static const struct mips_perf_event bmips5000_event_map
+				[PERF_COUNT_HW_MAX] = {
+	[PERF_COUNT_HW_CPU_CYCLES] = { 0x00, CNTR_EVEN | CNTR_ODD, T },
+	[PERF_COUNT_HW_INSTRUCTIONS] = { 0x01, CNTR_EVEN | CNTR_ODD, T },
+	[PERF_COUNT_HW_BRANCH_MISSES] = { 0x02, CNTR_ODD, T },
+};
+
 /* 24K/34K/1004K cores can share the same cache event map. */
 static const struct mips_perf_event mipsxxcore_cache_map
 				[PERF_COUNT_HW_CACHE_MAX]
@@ -849,10 +860,6 @@ static const struct mips_perf_event mipsxxcore_cache_map
 		[C(RESULT_ACCESS)]	= { 0x0a, CNTR_EVEN, T },
 		[C(RESULT_MISS)]	= { 0x0b, CNTR_EVEN | CNTR_ODD, T },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 [C(L1I)] = {
 	[C(OP_READ)] = {
@@ -869,7 +876,6 @@ static const struct mips_perf_event mipsxxcore_cache_map
 		 * Note that MIPS has only "hit" events countable for
 		 * the prefetch operation.
 		 */
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
 	},
 },
 [C(LL)] = {
@@ -881,10 +887,6 @@ static const struct mips_perf_event mipsxxcore_cache_map
 		[C(RESULT_ACCESS)]	= { 0x15, CNTR_ODD, P },
 		[C(RESULT_MISS)]	= { 0x16, CNTR_EVEN, P },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 [C(DTLB)] = {
 	[C(OP_READ)] = {
@@ -895,10 +897,6 @@ static const struct mips_perf_event mipsxxcore_cache_map
 		[C(RESULT_ACCESS)]	= { 0x06, CNTR_EVEN, T },
 		[C(RESULT_MISS)]	= { 0x06, CNTR_ODD, T },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 [C(ITLB)] = {
 	[C(OP_READ)] = {
@@ -909,10 +907,6 @@ static const struct mips_perf_event mipsxxcore_cache_map
 		[C(RESULT_ACCESS)]	= { 0x05, CNTR_EVEN, T },
 		[C(RESULT_MISS)]	= { 0x05, CNTR_ODD, T },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 [C(BPU)] = {
 	/* Using the same code for *HW_BRANCH* */
@@ -924,24 +918,6 @@ static const struct mips_perf_event mipsxxcore_cache_map
 		[C(RESULT_ACCESS)]	= { 0x02, CNTR_EVEN, T },
 		[C(RESULT_MISS)]	= { 0x02, CNTR_ODD, T },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-},
-[C(NODE)] = {
-	[C(OP_READ)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_WRITE)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 };
 
@@ -965,10 +941,6 @@ static const struct mips_perf_event mipsxx74Kcore_cache_map
 		[C(RESULT_ACCESS)]	= { 0x17, CNTR_ODD, T },
 		[C(RESULT_MISS)]	= { 0x18, CNTR_ODD, T },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 [C(L1I)] = {
 	[C(OP_READ)] = {
@@ -985,7 +957,6 @@ static const struct mips_perf_event mipsxx74Kcore_cache_map
 		 * Note that MIPS has only "hit" events countable for
 		 * the prefetch operation.
 		 */
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
 	},
 },
 [C(LL)] = {
@@ -997,25 +968,6 @@ static const struct mips_perf_event mipsxx74Kcore_cache_map
 		[C(RESULT_ACCESS)]	= { 0x1c, CNTR_ODD, P },
 		[C(RESULT_MISS)]	= { 0x1d, CNTR_EVEN | CNTR_ODD, P },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-},
-[C(DTLB)] = {
-	/* 74K core does not have specific DTLB events. */
-	[C(OP_READ)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_WRITE)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 [C(ITLB)] = {
 	[C(OP_READ)] = {
@@ -1026,10 +978,6 @@ static const struct mips_perf_event mipsxx74Kcore_cache_map
 		[C(RESULT_ACCESS)]	= { 0x04, CNTR_EVEN, T },
 		[C(RESULT_MISS)]	= { 0x04, CNTR_ODD, T },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 [C(BPU)] = {
 	/* Using the same code for *HW_BRANCH* */
@@ -1041,23 +989,64 @@ static const struct mips_perf_event mipsxx74Kcore_cache_map
 		[C(RESULT_ACCESS)]	= { 0x27, CNTR_EVEN, T },
 		[C(RESULT_MISS)]	= { 0x27, CNTR_ODD, T },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
+},
+};
+
+/* BMIPS5000 */
+static const struct mips_perf_event bmips5000_cache_map
+				[PERF_COUNT_HW_CACHE_MAX]
+				[PERF_COUNT_HW_CACHE_OP_MAX]
+				[PERF_COUNT_HW_CACHE_RESULT_MAX] = {
+[C(L1D)] = {
+	/*
+	 * Like some other architectures (e.g. ARM), the performance
+	 * counters don't differentiate between read and write
+	 * accesses/misses, so this isn't strictly correct, but it's the
+	 * best we can do. Writes and reads get combined.
+	 */
+	[C(OP_READ)] = {
+		[C(RESULT_ACCESS)]	= { 12, CNTR_EVEN, T },
+		[C(RESULT_MISS)]	= { 12, CNTR_ODD, T },
+	},
+	[C(OP_WRITE)] = {
+		[C(RESULT_ACCESS)]	= { 12, CNTR_EVEN, T },
+		[C(RESULT_MISS)]	= { 12, CNTR_ODD, T },
 	},
 },
-[C(NODE)] = {
+[C(L1I)] = {
 	[C(OP_READ)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
+		[C(RESULT_ACCESS)]	= { 10, CNTR_EVEN, T },
+		[C(RESULT_MISS)]	= { 10, CNTR_ODD, T },
 	},
 	[C(OP_WRITE)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
+		[C(RESULT_ACCESS)]	= { 10, CNTR_EVEN, T },
+		[C(RESULT_MISS)]	= { 10, CNTR_ODD, T },
 	},
 	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
+		[C(RESULT_ACCESS)]	= { 23, CNTR_EVEN, T },
+		/*
+		 * Note that MIPS has only "hit" events countable for
+		 * the prefetch operation.
+		 */
+	},
+},
+[C(LL)] = {
+	[C(OP_READ)] = {
+		[C(RESULT_ACCESS)]	= { 28, CNTR_EVEN, P },
+		[C(RESULT_MISS)]	= { 28, CNTR_ODD, P },
+	},
+	[C(OP_WRITE)] = {
+		[C(RESULT_ACCESS)]	= { 28, CNTR_EVEN, P },
+		[C(RESULT_MISS)]	= { 28, CNTR_ODD, P },
+	},
+},
+[C(BPU)] = {
+	/* Using the same code for *HW_BRANCH* */
+	[C(OP_READ)] = {
+		[C(RESULT_MISS)]	= { 0x02, CNTR_ODD, T },
+	},
+	[C(OP_WRITE)] = {
+		[C(RESULT_MISS)]	= { 0x02, CNTR_ODD, T },
 	},
 },
 };
@@ -1074,39 +1063,14 @@ static const struct mips_perf_event octeon_cache_map
 	},
 	[C(OP_WRITE)] = {
 		[C(RESULT_ACCESS)]	= { 0x30, CNTR_ALL },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
 	},
 },
 [C(L1I)] = {
 	[C(OP_READ)] = {
 		[C(RESULT_ACCESS)]	= { 0x18, CNTR_ALL },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_WRITE)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
 	},
 	[C(OP_PREFETCH)] = {
 		[C(RESULT_ACCESS)]	= { 0x19, CNTR_ALL },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-},
-[C(LL)] = {
-	[C(OP_READ)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_WRITE)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
 	},
 },
 [C(DTLB)] = {
@@ -1115,46 +1079,16 @@ static const struct mips_perf_event octeon_cache_map
 	 * read and write.
 	 */
 	[C(OP_READ)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
 		[C(RESULT_MISS)]	= { 0x35, CNTR_ALL },
 	},
 	[C(OP_WRITE)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
 		[C(RESULT_MISS)]	= { 0x35, CNTR_ALL },
 	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 [C(ITLB)] = {
 	[C(OP_READ)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
 		[C(RESULT_MISS)]	= { 0x37, CNTR_ALL },
 	},
-	[C(OP_WRITE)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-},
-[C(BPU)] = {
-	/* Using the same code for *HW_BRANCH* */
-	[C(OP_READ)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_WRITE)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
-	[C(OP_PREFETCH)] = {
-		[C(RESULT_ACCESS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-		[C(RESULT_MISS)]	= { UNSUPPORTED_PERF_EVENT_ID },
-	},
 },
 };
 
@@ -1304,7 +1238,7 @@ static int mipsxx_pmu_handle_shared_irq(void)
 	int handled = IRQ_NONE;
 	struct pt_regs *regs;
 
-	if (cpu_has_mips_r2 && !(read_c0_cause() & (1 << 26)))
+	if (cpu_has_perf_cntr_intr_bit && !(read_c0_cause() & CAUSEF_PCI))
 		return handled;
 	/*
 	 * First we pause the local counters, so that when we are locked
@@ -1314,7 +1248,7 @@ static int mipsxx_pmu_handle_shared_irq(void)
 	 * See also mipsxx_pmu_start().
 	 */
 	pause_local_counters();
-#ifdef CONFIG_MIPS_MT_SMP
+#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
 	read_lock(&pmuint_rwlock);
 #endif
 
@@ -1346,7 +1280,7 @@ static int mipsxx_pmu_handle_shared_irq(void)
 	if (handled == IRQ_HANDLED)
 		irq_work_run();
 
-#ifdef CONFIG_MIPS_MT_SMP
+#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
 	read_unlock(&pmuint_rwlock);
 #endif
 	resume_local_counters();
@@ -1391,6 +1325,11 @@ static irqreturn_t mipsxx_pmu_handle_irq(int irq, void *dev)
 #define IS_RANGE_V_1004K_EVENT(r)	((r) == 47)
 #endif
 
+/* BMIPS5000 */
+#define IS_BOTH_COUNTERS_BMIPS5000_EVENT(b)				\
+	((b) == 0 || (b) == 1)
+
+
 /*
  * User can use 0-255 raw events, where 0-127 for the events of even
  * counters, and 128-255 for odd counters. Note that bit 7 is used to
@@ -1461,6 +1400,12 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config)
 			raw_event.range = T;
 #endif
 		break;
+	case CPU_BMIPS5000:
+		if (IS_BOTH_COUNTERS_BMIPS5000_EVENT(base_id))
+			raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD;
+		else
+			raw_event.cntr_mask =
+				raw_id > 127 ? CNTR_ODD : CNTR_EVEN;
 	}
 
 	return &raw_event;
@@ -1513,7 +1458,7 @@ init_hw_perf_events(void)
 		return -ENODEV;
 	}
 
-#ifdef CONFIG_MIPS_MT_SMP
+#ifdef CONFIG_MIPS_PERF_SHARED_TC_COUNTERS
 	cpu_has_mipsmt_pertccounters = read_c0_config7() & (1<<19);
 	if (!cpu_has_mipsmt_pertccounters)
 		counters = counters_total_to_per_cpu(counters);
@@ -1572,6 +1517,11 @@ init_hw_perf_events(void)
 		mipspmu.cache_event_map = &octeon_cache_map;
 		mipspmu.map_raw_event = octeon_pmu_map_raw_event;
 		break;
+	case CPU_BMIPS5000:
+		mipspmu.name = "BMIPS5000";
+		mipspmu.general_event_map = &bmips5000_event_map;
+		mipspmu.cache_event_map = &bmips5000_cache_map;
+		break;
 	default:
 		pr_cont("Either hardware does not support performance "
 			"counters, or not yet implemented.\n");
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 5542817c1b4..07dff54f2ce 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -64,14 +64,17 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 				cpu_data[n].watch_reg_masks[i]);
 		seq_printf(m, "]\n");
 	}
-	seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
-		      cpu_has_mips16 ? " mips16" : "",
-		      cpu_has_mdmx ? " mdmx" : "",
-		      cpu_has_mips3d ? " mips3d" : "",
-		      cpu_has_smartmips ? " smartmips" : "",
-		      cpu_has_dsp ? " dsp" : "",
-		      cpu_has_mipsmt ? " mt" : ""
-		);
+
+	seq_printf(m, "ASEs implemented\t:");
+	if (cpu_has_mips16)	seq_printf(m, "%s", " mips16");
+	if (cpu_has_mdmx)	seq_printf(m, "%s", " mdmx");
+	if (cpu_has_mips3d)	seq_printf(m, "%s", " mips3d");
+	if (cpu_has_smartmips)	seq_printf(m, "%s", " smartmips");
+	if (cpu_has_dsp)	seq_printf(m, "%s", " dsp");
+	if (cpu_has_dsp2)	seq_printf(m, "%s", " dsp2");
+	if (cpu_has_mipsmt)	seq_printf(m, "%s", " mt");
+	seq_printf(m, "\n");
+
 	seq_printf(m, "shadow register sets\t: %d\n",
 		      cpu_data[n].srsets);
 	seq_printf(m, "kscratch registers\t: %d\n",
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index a632bc144ef..374f66e05f3 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -69,18 +69,7 @@ stack_done:
 1:	sw	v0, PT_R2(sp)		# result
 
 o32_syscall_exit:
-	local_irq_disable		# make sure need_resched and
-					# signals dont change between
-					# sampling and return
-	lw	a2, TI_FLAGS($28)	# current->work
-	li	t0, _TIF_ALLWORK_MASK
-	and	t0, a2
-	bnez	t0, o32_syscall_exit_work
-
-	j	restore_partial
-
-o32_syscall_exit_work:
-	j	syscall_exit_work_partial
+	j	syscall_exit_partial
 
 /* ------------------------------------------------------------------------ */
 
@@ -593,6 +582,7 @@ einval:	li	v0, -ENOSYS
 	sys	sys_setns		2
 	sys	sys_process_vm_readv	6	/* 4345 */
 	sys	sys_process_vm_writev	6
+	sys	sys_kcmp		5
 	.endm
 
 	/* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 3b5a5e9ae49..169de6a6d91 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -72,18 +72,7 @@ NESTED(handle_sys64, PT_SIZE, sp)
 1:	sd	v0, PT_R2(sp)		# result
 
 n64_syscall_exit:
-	local_irq_disable		# make sure need_resched and
-					# signals dont change between
-					# sampling and return
-	LONG_L	a2, TI_FLAGS($28)	# current->work
-	li	t0, _TIF_ALLWORK_MASK
-	and	t0, a2, t0
-	bnez	t0, n64_syscall_exit_work
-
-	j	restore_partial
-
-n64_syscall_exit_work:
-	j	syscall_exit_work_partial
+	j	syscall_exit_partial
 
 /* ------------------------------------------------------------------------ */
 
@@ -432,4 +421,5 @@ sys_call_table:
 	PTR	sys_setns
 	PTR	sys_process_vm_readv
 	PTR	sys_process_vm_writev		/* 5305 */
+	PTR	sys_kcmp
 	.size	sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 6be6f702092..f6ba8381ee0 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -70,18 +70,7 @@ NESTED(handle_sysn32, PT_SIZE, sp)
 	sd	t1, PT_R0(sp)		# save it for syscall restarting
 1:	sd	v0, PT_R2(sp)		# result
 
-	local_irq_disable		# make sure need_resched and
-					# signals dont change between
-					# sampling and return
-	LONG_L  a2, TI_FLAGS($28)	# current->work
-	li	t0, _TIF_ALLWORK_MASK
-	and	t0, a2, t0
-	bnez	t0, n32_syscall_exit_work
-
-	j	restore_partial
-
-n32_syscall_exit_work:
-	j	syscall_exit_work_partial
+	j	syscall_exit_partial
 
 /* ------------------------------------------------------------------------ */
 
@@ -432,4 +421,5 @@ EXPORT(sysn32_call_table)
 	PTR	sys_setns
 	PTR	compat_sys_process_vm_readv
 	PTR	compat_sys_process_vm_writev	/* 6310 */
+	PTR	sys_kcmp
 	.size	sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 54228553691..53c2d724576 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -99,18 +99,7 @@ NESTED(handle_sys, PT_SIZE, sp)
 1:	sd	v0, PT_R2(sp)		# result
 
 o32_syscall_exit:
-	local_irq_disable		# make need_resched and
-					# signals dont change between
-					# sampling and return
-	LONG_L	a2, TI_FLAGS($28)
-	li	t0, _TIF_ALLWORK_MASK
-	and	t0, a2, t0
-	bnez	t0, o32_syscall_exit_work
-
-	j	restore_partial
-
-o32_syscall_exit_work:
-	j	syscall_exit_work_partial
+	j	syscall_exit_partial
 
 /* ------------------------------------------------------------------------ */
 
@@ -550,4 +539,5 @@ sys_call_table:
 	PTR	sys_setns
 	PTR	compat_sys_process_vm_readv	/* 4345 */
 	PTR	compat_sys_process_vm_writev
+	PTR	sys_kcmp
 	.size	sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index f2c09cfc60a..0e1a5b8ae81 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -560,14 +560,6 @@ static void do_signal(struct pt_regs *regs)
 	siginfo_t info;
 	int signr;
 
-	/*
-	 * We want the common case to go fast, which is why we may in certain
-	 * cases get here from kernel mode. Just return without doing anything
-	 * if so.
-	 */
-	if (!user_mode(regs))
-		return;
-
 	signr = get_signal_to_deliver(&info, &ka, regs, NULL);
 	if (signr > 0) {
 		/* Whee!  Actually deliver the signal.  */
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index ff17868734c..2defa2bbdaa 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -150,6 +150,7 @@ static void vsmp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
 
 static void __cpuinit vsmp_init_secondary(void)
 {
+#ifdef CONFIG_IRQ_GIC
 	extern int gic_present;
 
 	/* This is Malta specific: IPI,performance and timer interrupts */
@@ -157,6 +158,7 @@ static void __cpuinit vsmp_init_secondary(void)
 		change_c0_status(ST0_IM, STATUSF_IP3 | STATUSF_IP4 |
 					 STATUSF_IP6 | STATUSF_IP7);
 	else
+#endif
 		change_c0_status(ST0_IM, STATUSF_IP0 | STATUSF_IP1 |
 					 STATUSF_IP6 | STATUSF_IP7);
 }
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index b08220c8211..2bd561bc05a 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -133,13 +133,13 @@ _sys_clone(nabi_no_regargs struct pt_regs regs)
 asmlinkage int sys_execve(nabi_no_regargs struct pt_regs regs)
 {
 	int error;
-	char * filename;
+	struct filename *filename;
 
 	filename = getname((const char __user *) (long)regs.regs[4]);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = do_execve(filename,
+	error = do_execve(filename->name,
 			  (const char __user *const __user *) (long)regs.regs[5],
 	                  (const char __user *const __user *) (long)regs.regs[6],
 			  &regs);
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index df243a64f43..007ccbe1e26 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -1,6 +1,13 @@
 #include <asm/asm-offsets.h>
 #include <asm/page.h>
 #include <asm/thread_info.h>
+
+/*
+ * Put .bss..swapper_pg_dir as the first thing in .bss. This will
+ * ensure that it has .bss alignment (64K).
+ */
+#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
+
 #include <asm-generic/vmlinux.lds.h>
 
 #undef mips
@@ -119,11 +126,21 @@ SECTIONS
 	}
 
 	PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
-	. = ALIGN(PAGE_SIZE);
+	/*
+	 * Align to 64K in attempt to eliminate holes before the
+	 * .bss..swapper_pg_dir section at the start of .bss.  This
+	 * also satisfies PAGE_SIZE alignment as the largest page size
+	 * allowed is 64K.
+	 */
+	. = ALIGN(0x10000);
 	__init_end = .;
 	/* freed after init ends here */
 
-	BSS_SECTION(0, 0, 0)
+	/*
+	 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
+	 * gets that alignment.  .sbss should be empty, so there will be
+	 * no holes after __init_end. */
+	BSS_SECTION(0, 0x10000, 0)
 
 	_end = . ;
 
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index f6f91523cb1..eec690af658 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -50,7 +50,6 @@
 #include <asm/mips_mt.h>
 #include <asm/processor.h>
 #include <asm/vpe.h>
-#include <asm/kspd.h>
 
 typedef void *vpe_handle;
 
@@ -69,11 +68,6 @@ static char module_name[] = "vpe";
 static int major;
 static const int minor = 1;	/* fixed for now  */
 
-#ifdef CONFIG_MIPS_APSP_KSPD
-static struct kspd_notifications kspd_events;
-static int kspd_events_reqd;
-#endif
-
 /* grab the likely amount of memory we will need. */
 #ifdef CONFIG_MIPS_VPE_LOADER_TOM
 #define P_SIZE (2 * 1024 * 1024)
@@ -1101,14 +1095,6 @@ static int vpe_open(struct inode *inode, struct file *filp)
 	v->uid = filp->f_cred->fsuid;
 	v->gid = filp->f_cred->fsgid;
 
-#ifdef CONFIG_MIPS_APSP_KSPD
-	/* get kspd to tell us when a syscall_exit happens */
-	if (!kspd_events_reqd) {
-		kspd_notify(&kspd_events);
-		kspd_events_reqd++;
-	}
-#endif
-
 	v->cwd[0] = 0;
 	ret = getcwd(v->cwd, VPE_PATH_MAX);
 	if (ret < 0)
@@ -1341,13 +1327,6 @@ char *vpe_getcwd(int index)
 
 EXPORT_SYMBOL(vpe_getcwd);
 
-#ifdef CONFIG_MIPS_APSP_KSPD
-static void kspd_sp_exit( int sp_id)
-{
-	cleanup_tc(get_tc(sp_id));
-}
-#endif
-
 static ssize_t store_kill(struct device *dev, struct device_attribute *attr,
 			  const char *buf, size_t len)
 {
@@ -1585,9 +1564,6 @@ out_reenable:
 	emt(mtflags);
 	local_irq_restore(flags);
 
-#ifdef CONFIG_MIPS_APSP_KSPD
-	kspd_events.kspd_sp_exit = kspd_sp_exit;
-#endif
 	return 0;
 
 out_class:
diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig
index 20bdf40b3ef..d84f361f1e4 100644
--- a/arch/mips/lantiq/Kconfig
+++ b/arch/mips/lantiq/Kconfig
@@ -2,6 +2,7 @@ if LANTIQ
 
 config SOC_TYPE_XWAY
 	bool
+	select PINCTRL_XWAY
 	default n
 
 choice
@@ -19,6 +20,7 @@ config SOC_XWAY
 
 config SOC_FALCON
 	bool "FALCON"
+	select PINCTRL_FALCON
 
 endchoice
 
diff --git a/arch/mips/lantiq/falcon/prom.c b/arch/mips/lantiq/falcon/prom.c
index c1d278f05a3..aa949794785 100644
--- a/arch/mips/lantiq/falcon/prom.c
+++ b/arch/mips/lantiq/falcon/prom.c
@@ -8,6 +8,8 @@
  */
 
 #include <linux/kernel.h>
+#include <asm/cacheflush.h>
+#include <asm/traps.h>
 #include <asm/io.h>
 
 #include <lantiq_soc.h>
@@ -84,4 +86,7 @@ void __init ltq_soc_detect(struct ltq_soc_info *i)
 		unreachable();
 		break;
 	}
+
+	board_nmi_handler_setup = ltq_soc_nmi_setup;
+	board_ejtag_handler_setup = ltq_soc_ejtag_setup;
 }
diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c
index ba0123d13d4..2d4ced332b3 100644
--- a/arch/mips/lantiq/falcon/sysctrl.c
+++ b/arch/mips/lantiq/falcon/sysctrl.c
@@ -171,6 +171,7 @@ static inline void clkdev_add_sys(const char *dev, unsigned int module,
 	clk->cl.con_id = NULL;
 	clk->cl.clk = clk;
 	clk->module = module;
+	clk->bits = bits;
 	clk->activate = sysctl_activate;
 	clk->deactivate = sysctl_deactivate;
 	clk->enable = sysctl_clken;
diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
index 57c1a4e5140..f36acd1b380 100644
--- a/arch/mips/lantiq/irq.c
+++ b/arch/mips/lantiq/irq.c
@@ -55,8 +55,8 @@
  */
 #define LTQ_ICU_EBU_IRQ		22
 
-#define ltq_icu_w32(x, y)	ltq_w32((x), ltq_icu_membase + (y))
-#define ltq_icu_r32(x)		ltq_r32(ltq_icu_membase + (x))
+#define ltq_icu_w32(m, x, y)	ltq_w32((x), ltq_icu_membase[m] + (y))
+#define ltq_icu_r32(m, x)	ltq_r32(ltq_icu_membase[m] + (x))
 
 #define ltq_eiu_w32(x, y)	ltq_w32((x), ltq_eiu_membase + (y))
 #define ltq_eiu_r32(x)		ltq_r32(ltq_eiu_membase + (x))
@@ -82,17 +82,18 @@ static unsigned short ltq_eiu_irq[MAX_EIU] = {
 };
 
 static int exin_avail;
-static void __iomem *ltq_icu_membase;
+static void __iomem *ltq_icu_membase[MAX_IM];
 static void __iomem *ltq_eiu_membase;
+static struct irq_domain *ltq_domain;
 
 void ltq_disable_irq(struct irq_data *d)
 {
 	u32 ier = LTQ_ICU_IM0_IER;
 	int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
+	int im = offset / INT_NUM_IM_OFFSET;
 
-	ier += LTQ_ICU_OFFSET * (offset / INT_NUM_IM_OFFSET);
 	offset %= INT_NUM_IM_OFFSET;
-	ltq_icu_w32(ltq_icu_r32(ier) & ~BIT(offset), ier);
+	ltq_icu_w32(im, ltq_icu_r32(im, ier) & ~BIT(offset), ier);
 }
 
 void ltq_mask_and_ack_irq(struct irq_data *d)
@@ -100,32 +101,31 @@ void ltq_mask_and_ack_irq(struct irq_data *d)
 	u32 ier = LTQ_ICU_IM0_IER;
 	u32 isr = LTQ_ICU_IM0_ISR;
 	int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
+	int im = offset / INT_NUM_IM_OFFSET;
 
-	ier += LTQ_ICU_OFFSET * (offset / INT_NUM_IM_OFFSET);
-	isr += LTQ_ICU_OFFSET * (offset / INT_NUM_IM_OFFSET);
 	offset %= INT_NUM_IM_OFFSET;
-	ltq_icu_w32(ltq_icu_r32(ier) & ~BIT(offset), ier);
-	ltq_icu_w32(BIT(offset), isr);
+	ltq_icu_w32(im, ltq_icu_r32(im, ier) & ~BIT(offset), ier);
+	ltq_icu_w32(im, BIT(offset), isr);
 }
 
 static void ltq_ack_irq(struct irq_data *d)
 {
 	u32 isr = LTQ_ICU_IM0_ISR;
 	int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
+	int im = offset / INT_NUM_IM_OFFSET;
 
-	isr += LTQ_ICU_OFFSET * (offset / INT_NUM_IM_OFFSET);
 	offset %= INT_NUM_IM_OFFSET;
-	ltq_icu_w32(BIT(offset), isr);
+	ltq_icu_w32(im, BIT(offset), isr);
 }
 
 void ltq_enable_irq(struct irq_data *d)
 {
 	u32 ier = LTQ_ICU_IM0_IER;
 	int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE;
+	int im = offset / INT_NUM_IM_OFFSET;
 
-	ier += LTQ_ICU_OFFSET  * (offset / INT_NUM_IM_OFFSET);
 	offset %= INT_NUM_IM_OFFSET;
-	ltq_icu_w32(ltq_icu_r32(ier) | BIT(offset), ier);
+	ltq_icu_w32(im, ltq_icu_r32(im, ier) | BIT(offset), ier);
 }
 
 static unsigned int ltq_startup_eiu_irq(struct irq_data *d)
@@ -192,7 +192,7 @@ static void ltq_hw_irqdispatch(int module)
 {
 	u32 irq;
 
-	irq = ltq_icu_r32(LTQ_ICU_IM0_IOSR + (module * LTQ_ICU_OFFSET));
+	irq = ltq_icu_r32(module, LTQ_ICU_IM0_IOSR);
 	if (irq == 0)
 		return;
 
@@ -220,10 +220,14 @@ DEFINE_HWx_IRQDISPATCH(2)
 DEFINE_HWx_IRQDISPATCH(3)
 DEFINE_HWx_IRQDISPATCH(4)
 
+#if MIPS_CPU_TIMER_IRQ == 7
 static void ltq_hw5_irqdispatch(void)
 {
 	do_IRQ(MIPS_CPU_TIMER_IRQ);
 }
+#else
+DEFINE_HWx_IRQDISPATCH(5)
+#endif
 
 #ifdef CONFIG_MIPS_MT_SMP
 void __init arch_init_ipiirq(int irq, struct irqaction *action)
@@ -271,11 +275,11 @@ asmlinkage void plat_irq_dispatch(void)
 	unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
 	unsigned int i;
 
-	if (pending & CAUSEF_IP7) {
+	if ((MIPS_CPU_TIMER_IRQ == 7) && (pending & CAUSEF_IP7)) {
 		do_IRQ(MIPS_CPU_TIMER_IRQ);
 		goto out;
 	} else {
-		for (i = 0; i < 5; i++) {
+		for (i = 0; i < MAX_IM; i++) {
 			if (pending & (CAUSEF_IP2 << i)) {
 				ltq_hw_irqdispatch(i);
 				goto out;
@@ -293,6 +297,9 @@ static int icu_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
 	struct irq_chip *chip = &ltq_irq_type;
 	int i;
 
+	if (hw < MIPS_CPU_IRQ_CASCADE)
+		return 0;
+
 	for (i = 0; i < exin_avail; i++)
 		if (hw == ltq_eiu_irq[i])
 			chip = &ltq_eiu_type;
@@ -318,19 +325,23 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
 	struct resource res;
 	int i;
 
-	if (of_address_to_resource(node, 0, &res))
-		panic("Failed to get icu memory range");
+	for (i = 0; i < MAX_IM; i++) {
+		if (of_address_to_resource(node, i, &res))
+			panic("Failed to get icu memory range");
 
-	if (request_mem_region(res.start, resource_size(&res), res.name) < 0)
-		pr_err("Failed to request icu memory");
+		if (request_mem_region(res.start, resource_size(&res),
+					res.name) < 0)
+			pr_err("Failed to request icu memory");
 
-	ltq_icu_membase = ioremap_nocache(res.start, resource_size(&res));
-	if (!ltq_icu_membase)
-		panic("Failed to remap icu memory");
+		ltq_icu_membase[i] = ioremap_nocache(res.start,
+					resource_size(&res));
+		if (!ltq_icu_membase[i])
+			panic("Failed to remap icu memory");
+	}
 
 	/* the external interrupts are optional and xway only */
 	eiu_node = of_find_compatible_node(NULL, NULL, "lantiq,eiu");
-	if (eiu_node && of_address_to_resource(eiu_node, 0, &res)) {
+	if (eiu_node && !of_address_to_resource(eiu_node, 0, &res)) {
 		/* find out how many external irq sources we have */
 		const __be32 *count = of_get_property(node,
 							"lantiq,count",	NULL);
@@ -351,17 +362,17 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
 	}
 
 	/* turn off all irqs by default */
-	for (i = 0; i < 5; i++) {
+	for (i = 0; i < MAX_IM; i++) {
 		/* make sure all irqs are turned off by default */
-		ltq_icu_w32(0, LTQ_ICU_IM0_IER + (i * LTQ_ICU_OFFSET));
+		ltq_icu_w32(i, 0, LTQ_ICU_IM0_IER);
 		/* clear all possibly pending interrupts */
-		ltq_icu_w32(~0, LTQ_ICU_IM0_ISR + (i * LTQ_ICU_OFFSET));
+		ltq_icu_w32(i, ~0, LTQ_ICU_IM0_ISR);
 	}
 
 	mips_cpu_irq_init();
 
-	for (i = 2; i <= 6; i++)
-		setup_irq(i, &cascade);
+	for (i = 0; i < MAX_IM; i++)
+		setup_irq(i + 2, &cascade);
 
 	if (cpu_has_vint) {
 		pr_info("Setting up vectored interrupts\n");
@@ -373,7 +384,8 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
 		set_vi_handler(7, ltq_hw5_irqdispatch);
 	}
 
-	irq_domain_add_linear(node, 6 * INT_NUM_IM_OFFSET,
+	ltq_domain = irq_domain_add_linear(node,
+		(MAX_IM * INT_NUM_IM_OFFSET) + MIPS_CPU_IRQ_CASCADE,
 		&irq_domain_ops, 0);
 
 #if defined(CONFIG_MIPS_MT_SMP)
@@ -397,12 +409,20 @@ int __init icu_of_init(struct device_node *node, struct device_node *parent)
 
 	/* tell oprofile which irq to use */
 	cp0_perfcount_irq = LTQ_PERF_IRQ;
+
+	/*
+	 * if the timer irq is not one of the mips irqs we need to
+	 * create a mapping
+	 */
+	if (MIPS_CPU_TIMER_IRQ != 7)
+		irq_create_mapping(ltq_domain, MIPS_CPU_TIMER_IRQ);
+
 	return 0;
 }
 
 unsigned int __cpuinit get_c0_compare_int(void)
 {
-	return CP0_LEGACY_COMPARE_IRQ;
+	return MIPS_CPU_TIMER_IRQ;
 }
 
 static struct of_device_id __initdata of_irq_ids[] = {
diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile
index dc3194f6ee4..70a58c747bd 100644
--- a/arch/mips/lantiq/xway/Makefile
+++ b/arch/mips/lantiq/xway/Makefile
@@ -1 +1 @@
-obj-y := prom.o sysctrl.o clk.o reset.o gpio.o dma.o
+obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o
diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
deleted file mode 100644
index 2ab39e93d9b..00000000000
--- a/arch/mips/lantiq/xway/gpio.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- *  This program is free software; you can redistribute it and/or modify it
- *  under the terms of the GNU General Public License version 2 as published
- *  by the Free Software Foundation.
- *
- *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
- */
-
-#include <linux/slab.h>
-#include <linux/export.h>
-#include <linux/platform_device.h>
-#include <linux/gpio.h>
-#include <linux/ioport.h>
-#include <linux/io.h>
-
-#include <lantiq_soc.h>
-
-#define LTQ_GPIO_OUT		0x00
-#define LTQ_GPIO_IN		0x04
-#define LTQ_GPIO_DIR		0x08
-#define LTQ_GPIO_ALTSEL0	0x0C
-#define LTQ_GPIO_ALTSEL1	0x10
-#define LTQ_GPIO_OD		0x14
-
-#define PINS_PER_PORT		16
-#define MAX_PORTS		3
-
-#define ltq_gpio_getbit(m, r, p)	(!!(ltq_r32(m + r) & (1 << p)))
-#define ltq_gpio_setbit(m, r, p)	ltq_w32_mask(0, (1 << p), m + r)
-#define ltq_gpio_clearbit(m, r, p)	ltq_w32_mask((1 << p), 0, m + r)
-
-struct ltq_gpio {
-	void __iomem *membase;
-	struct gpio_chip chip;
-};
-
-static struct ltq_gpio ltq_gpio_port[MAX_PORTS];
-
-int ltq_gpio_request(unsigned int pin, unsigned int alt0,
-	unsigned int alt1, unsigned int dir, const char *name)
-{
-	int id = 0;
-
-	if (pin >= (MAX_PORTS * PINS_PER_PORT))
-		return -EINVAL;
-	if (gpio_request(pin, name)) {
-		pr_err("failed to setup lantiq gpio: %s\n", name);
-		return -EBUSY;
-	}
-	if (dir)
-		gpio_direction_output(pin, 1);
-	else
-		gpio_direction_input(pin);
-	while (pin >= PINS_PER_PORT) {
-		pin -= PINS_PER_PORT;
-		id++;
-	}
-	if (alt0)
-		ltq_gpio_setbit(ltq_gpio_port[id].membase,
-			LTQ_GPIO_ALTSEL0, pin);
-	else
-		ltq_gpio_clearbit(ltq_gpio_port[id].membase,
-			LTQ_GPIO_ALTSEL0, pin);
-	if (alt1)
-		ltq_gpio_setbit(ltq_gpio_port[id].membase,
-			LTQ_GPIO_ALTSEL1, pin);
-	else
-		ltq_gpio_clearbit(ltq_gpio_port[id].membase,
-			LTQ_GPIO_ALTSEL1, pin);
-	return 0;
-}
-EXPORT_SYMBOL(ltq_gpio_request);
-
-static void ltq_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
-{
-	struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
-
-	if (value)
-		ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OUT, offset);
-	else
-		ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OUT, offset);
-}
-
-static int ltq_gpio_get(struct gpio_chip *chip, unsigned int offset)
-{
-	struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
-
-	return ltq_gpio_getbit(ltq_gpio->membase, LTQ_GPIO_IN, offset);
-}
-
-static int ltq_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
-{
-	struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
-
-	ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
-	ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
-
-	return 0;
-}
-
-static int ltq_gpio_direction_output(struct gpio_chip *chip,
-	unsigned int offset, int value)
-{
-	struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
-
-	ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
-	ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
-	ltq_gpio_set(chip, offset, value);
-
-	return 0;
-}
-
-static int ltq_gpio_req(struct gpio_chip *chip, unsigned offset)
-{
-	struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip);
-
-	ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_ALTSEL0, offset);
-	ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_ALTSEL1, offset);
-	return 0;
-}
-
-static int ltq_gpio_probe(struct platform_device *pdev)
-{
-	struct resource *res;
-
-	if (pdev->id >= MAX_PORTS) {
-		dev_err(&pdev->dev, "invalid gpio port %d\n",
-			pdev->id);
-		return -EINVAL;
-	}
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (!res) {
-		dev_err(&pdev->dev, "failed to get memory for gpio port %d\n",
-			pdev->id);
-		return -ENOENT;
-	}
-	res = devm_request_mem_region(&pdev->dev, res->start,
-		resource_size(res), dev_name(&pdev->dev));
-	if (!res) {
-		dev_err(&pdev->dev,
-			"failed to request memory for gpio port %d\n",
-			pdev->id);
-		return -EBUSY;
-	}
-	ltq_gpio_port[pdev->id].membase = devm_ioremap_nocache(&pdev->dev,
-		res->start, resource_size(res));
-	if (!ltq_gpio_port[pdev->id].membase) {
-		dev_err(&pdev->dev, "failed to remap memory for gpio port %d\n",
-			pdev->id);
-		return -ENOMEM;
-	}
-	ltq_gpio_port[pdev->id].chip.label = "ltq_gpio";
-	ltq_gpio_port[pdev->id].chip.direction_input = ltq_gpio_direction_input;
-	ltq_gpio_port[pdev->id].chip.direction_output =
-		ltq_gpio_direction_output;
-	ltq_gpio_port[pdev->id].chip.get = ltq_gpio_get;
-	ltq_gpio_port[pdev->id].chip.set = ltq_gpio_set;
-	ltq_gpio_port[pdev->id].chip.request = ltq_gpio_req;
-	ltq_gpio_port[pdev->id].chip.base = PINS_PER_PORT * pdev->id;
-	ltq_gpio_port[pdev->id].chip.ngpio = PINS_PER_PORT;
-	platform_set_drvdata(pdev, &ltq_gpio_port[pdev->id]);
-	return gpiochip_add(&ltq_gpio_port[pdev->id].chip);
-}
-
-static struct platform_driver
-ltq_gpio_driver = {
-	.probe = ltq_gpio_probe,
-	.driver = {
-		.name = "ltq_gpio",
-		.owner = THIS_MODULE,
-	},
-};
-
-int __init ltq_gpio_init(void)
-{
-	int ret = platform_driver_register(&ltq_gpio_driver);
-
-	if (ret)
-		pr_info("ltq_gpio : Error registering platform driver!");
-	return ret;
-}
-
-postcore_initcall(ltq_gpio_init);
diff --git a/arch/mips/lantiq/xway/gptu.c b/arch/mips/lantiq/xway/gptu.c
new file mode 100644
index 00000000000..cbb56fc022b
--- /dev/null
+++ b/arch/mips/lantiq/xway/gptu.c
@@ -0,0 +1,214 @@
+/*
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ *
+ *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
+ *  Copyright (C) 2012 Lantiq GmbH
+ */
+
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/of_irq.h>
+
+#include <lantiq_soc.h>
+#include "../clk.h"
+
+/* the magic ID byte of the core */
+#define GPTU_MAGIC	0x59
+/* clock control register */
+#define GPTU_CLC	0x00
+/* id register */
+#define GPTU_ID		0x08
+/* interrupt node enable */
+#define GPTU_IRNEN	0xf4
+/* interrupt control register */
+#define GPTU_IRCR	0xf8
+/* interrupt capture register */
+#define GPTU_IRNCR	0xfc
+/* there are 3 identical blocks of 2 timers. calculate register offsets */
+#define GPTU_SHIFT(x)	(x % 2 ? 4 : 0)
+#define GPTU_BASE(x)	(((x >> 1) * 0x20) + 0x10)
+/* timer control register */
+#define GPTU_CON(x)	(GPTU_BASE(x) + GPTU_SHIFT(x) + 0x00)
+/* timer auto reload register */
+#define GPTU_RUN(x)	(GPTU_BASE(x) + GPTU_SHIFT(x) + 0x08)
+/* timer manual reload register */
+#define GPTU_RLD(x)	(GPTU_BASE(x) + GPTU_SHIFT(x) + 0x10)
+/* timer count register */
+#define GPTU_CNT(x)	(GPTU_BASE(x) + GPTU_SHIFT(x) + 0x18)
+
+/* GPTU_CON(x) */
+#define CON_CNT		BIT(2)
+#define CON_EDGE_ANY	(BIT(7) | BIT(6))
+#define CON_SYNC	BIT(8)
+#define CON_CLK_INT	BIT(10)
+
+/* GPTU_RUN(x) */
+#define RUN_SEN		BIT(0)
+#define RUN_RL		BIT(2)
+
+/* set clock to runmode */
+#define CLC_RMC		BIT(8)
+/* bring core out of suspend */
+#define CLC_SUSPEND	BIT(4)
+/* the disable bit */
+#define CLC_DISABLE	BIT(0)
+
+#define gptu_w32(x, y)	ltq_w32((x), gptu_membase + (y))
+#define gptu_r32(x)	ltq_r32(gptu_membase + (x))
+
+enum gptu_timer {
+	TIMER1A = 0,
+	TIMER1B,
+	TIMER2A,
+	TIMER2B,
+	TIMER3A,
+	TIMER3B
+};
+
+static void __iomem *gptu_membase;
+static struct resource irqres[6];
+
+static irqreturn_t timer_irq_handler(int irq, void *priv)
+{
+	int timer = irq - irqres[0].start;
+	gptu_w32(1 << timer, GPTU_IRNCR);
+	return IRQ_HANDLED;
+}
+
+static void gptu_hwinit(void)
+{
+	gptu_w32(0x00, GPTU_IRNEN);
+	gptu_w32(0xff, GPTU_IRNCR);
+	gptu_w32(CLC_RMC | CLC_SUSPEND, GPTU_CLC);
+}
+
+static void gptu_hwexit(void)
+{
+	gptu_w32(0x00, GPTU_IRNEN);
+	gptu_w32(0xff, GPTU_IRNCR);
+	gptu_w32(CLC_DISABLE, GPTU_CLC);
+}
+
+static int gptu_enable(struct clk *clk)
+{
+	int ret = request_irq(irqres[clk->bits].start, timer_irq_handler,
+		IRQF_TIMER, "gtpu", NULL);
+	if (ret) {
+		pr_err("gptu: failed to request irq\n");
+		return ret;
+	}
+
+	gptu_w32(CON_CNT | CON_EDGE_ANY | CON_SYNC | CON_CLK_INT,
+		GPTU_CON(clk->bits));
+	gptu_w32(1, GPTU_RLD(clk->bits));
+	gptu_w32(gptu_r32(GPTU_IRNEN) | BIT(clk->bits), GPTU_IRNEN);
+	gptu_w32(RUN_SEN | RUN_RL, GPTU_RUN(clk->bits));
+	return 0;
+}
+
+static void gptu_disable(struct clk *clk)
+{
+	gptu_w32(0, GPTU_RUN(clk->bits));
+	gptu_w32(0, GPTU_CON(clk->bits));
+	gptu_w32(0, GPTU_RLD(clk->bits));
+	gptu_w32(gptu_r32(GPTU_IRNEN) & ~BIT(clk->bits), GPTU_IRNEN);
+	free_irq(irqres[clk->bits].start, NULL);
+}
+
+static inline void clkdev_add_gptu(struct device *dev, const char *con,
+							unsigned int timer)
+{
+	struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
+
+	clk->cl.dev_id = dev_name(dev);
+	clk->cl.con_id = con;
+	clk->cl.clk = clk;
+	clk->enable = gptu_enable;
+	clk->disable = gptu_disable;
+	clk->bits = timer;
+	clkdev_add(&clk->cl);
+}
+
+static int __devinit gptu_probe(struct platform_device *pdev)
+{
+	struct clk *clk;
+	struct resource *res;
+
+	if (of_irq_to_resource_table(pdev->dev.of_node, irqres, 6) != 6) {
+		dev_err(&pdev->dev, "Failed to get IRQ list\n");
+		return -EINVAL;
+	}
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_err(&pdev->dev, "Failed to get resource\n");
+		return -ENOMEM;
+	}
+
+	/* remap gptu register range */
+	gptu_membase = devm_request_and_ioremap(&pdev->dev, res);
+	if (!gptu_membase) {
+		dev_err(&pdev->dev, "Failed to remap resource\n");
+		return -ENOMEM;
+	}
+
+	/* enable our clock */
+	clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(clk)) {
+		dev_err(&pdev->dev, "Failed to get clock\n");
+		return -ENOENT;
+	}
+	clk_enable(clk);
+
+	/* power up the core */
+	gptu_hwinit();
+
+	/* the gptu has a ID register */
+	if (((gptu_r32(GPTU_ID) >> 8) & 0xff) != GPTU_MAGIC) {
+		dev_err(&pdev->dev, "Failed to find magic\n");
+		gptu_hwexit();
+		return -ENAVAIL;
+	}
+
+	/* register the clocks */
+	clkdev_add_gptu(&pdev->dev, "timer1a", TIMER1A);
+	clkdev_add_gptu(&pdev->dev, "timer1b", TIMER1B);
+	clkdev_add_gptu(&pdev->dev, "timer2a", TIMER2A);
+	clkdev_add_gptu(&pdev->dev, "timer2b", TIMER2B);
+	clkdev_add_gptu(&pdev->dev, "timer3a", TIMER3A);
+	clkdev_add_gptu(&pdev->dev, "timer3b", TIMER3B);
+
+	dev_info(&pdev->dev, "gptu: 6 timers loaded\n");
+
+	return 0;
+}
+
+static const struct of_device_id gptu_match[] = {
+	{ .compatible = "lantiq,gptu-xway" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, dma_match);
+
+static struct platform_driver dma_driver = {
+	.probe = gptu_probe,
+	.driver = {
+		.name = "gptu-xway",
+		.owner = THIS_MODULE,
+		.of_match_table = gptu_match,
+	},
+};
+
+int __init gptu_init(void)
+{
+	int ret = platform_driver_register(&dma_driver);
+
+	if (ret)
+		pr_info("gptu: Error registering platform driver\n");
+	return ret;
+}
+
+arch_initcall(gptu_init);
diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
index befbb760ab7..2917b56b6b2 100644
--- a/arch/mips/lantiq/xway/sysctrl.c
+++ b/arch/mips/lantiq/xway/sysctrl.c
@@ -145,7 +145,8 @@ static int pci_enable(struct clk *clk)
 {
 	unsigned int val = ltq_cgu_r32(ifccr);
 	/* set bus clock speed */
-	if (of_machine_is_compatible("lantiq,ar9")) {
+	if (of_machine_is_compatible("lantiq,ar9") ||
+			of_machine_is_compatible("lantiq,vr9")) {
 		val &= ~0x1f00000;
 		if (clk->rate == CLOCK_33M)
 			val |= 0xe00000;
@@ -187,10 +188,12 @@ static int clkout_enable(struct clk *clk)
 	for (i = 0; i < 4; i++) {
 		if (clk->rates[i] == clk->rate) {
 			int shift = 14 - (2 * clk->module);
+			int enable = 7 - clk->module;
 			unsigned int val = ltq_cgu_r32(ifccr);
 
 			val &= ~(3 << shift);
 			val |= i << shift;
+			val |= enable;
 			ltq_cgu_w32(val, ifccr);
 			return 0;
 		}
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 399a50a541d..c4a82e841c7 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -8,28 +8,9 @@ lib-y	+= csum_partial.o delay.o memcpy.o memset.o \
 obj-y			+= iomap.o
 obj-$(CONFIG_PCI)	+= iomap-pci.o
 
-obj-$(CONFIG_CPU_LOONGSON2)	+= dump_tlb.o
-obj-$(CONFIG_CPU_MIPS32)	+= dump_tlb.o
-obj-$(CONFIG_CPU_MIPS64)	+= dump_tlb.o
-obj-$(CONFIG_CPU_NEVADA)	+= dump_tlb.o
-obj-$(CONFIG_CPU_R10000)	+= dump_tlb.o
+obj-$(CONFIG_CPU_GENERIC_DUMP_TLB) += dump_tlb.o
 obj-$(CONFIG_CPU_R3000)		+= r3k_dump_tlb.o
-obj-$(CONFIG_CPU_R4300)		+= dump_tlb.o
-obj-$(CONFIG_CPU_R4X00)		+= dump_tlb.o
-obj-$(CONFIG_CPU_R5000)		+= dump_tlb.o
-obj-$(CONFIG_CPU_R5432)		+= dump_tlb.o
-obj-$(CONFIG_CPU_R5500)		+= dump_tlb.o
-obj-$(CONFIG_CPU_R6000)		+=
-obj-$(CONFIG_CPU_R8000)		+=
-obj-$(CONFIG_CPU_RM7000)	+= dump_tlb.o
-obj-$(CONFIG_CPU_RM9000)	+= dump_tlb.o
-obj-$(CONFIG_CPU_SB1)		+= dump_tlb.o
 obj-$(CONFIG_CPU_TX39XX)	+= r3k_dump_tlb.o
-obj-$(CONFIG_CPU_TX49XX)	+= dump_tlb.o
-obj-$(CONFIG_CPU_VR41XX)	+= dump_tlb.o
-obj-$(CONFIG_CPU_CAVIUM_OCTEON)	+= dump_tlb.o
-obj-$(CONFIG_CPU_XLR)		+= dump_tlb.o
-obj-$(CONFIG_CPU_XLP)		+= dump_tlb.o
 
 # libgcc-style stuff needed in the kernel
 obj-y += ashldi3.o ashrdi3.o cmpdi2.o lshrdi3.o ucmpdi2.o
diff --git a/arch/mips/mipssim/Makefile b/arch/mips/mipssim/Makefile
deleted file mode 100644
index 01410a3f172..00000000000
--- a/arch/mips/mipssim/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
-# Copyright (C) 2007 MIPS Technologies, Inc.
-#   written by Ralf Baechle (ralf@linux-mips.org)
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-
-obj-y := sim_platform.o sim_setup.o sim_mem.o sim_time.o sim_int.o
-
-obj-$(CONFIG_EARLY_PRINTK) += sim_console.o
-obj-$(CONFIG_MIPS_MT_SMTC) += sim_smtc.o
diff --git a/arch/mips/mipssim/Platform b/arch/mips/mipssim/Platform
deleted file mode 100644
index 3df60b8a12e..00000000000
--- a/arch/mips/mipssim/Platform
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# MIPS SIM
-#
-platform-$(CONFIG_MIPS_SIM)	+= mipssim/
-cflags-$(CONFIG_MIPS_SIM)	+= -I$(srctree)/arch/mips/include/asm/mach-mipssim
-load-$(CONFIG_MIPS_SIM)		+= 0x80100000
diff --git a/arch/mips/mipssim/sim_console.c b/arch/mips/mipssim/sim_console.c
deleted file mode 100644
index a2f41672cd5..00000000000
--- a/arch/mips/mipssim/sim_console.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
- * Copyright (C) 2007 MIPS Technologies, Inc.
- *   written by Ralf Baechle
- */
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/serial_reg.h>
-
-static inline unsigned int serial_in(int offset)
-{
-	return inb(0x3f8 + offset);
-}
-
-static inline void serial_out(int offset, int value)
-{
-	outb(value, 0x3f8 + offset);
-}
-
-void __init prom_putchar(char c)
-{
-	while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
-		;
-
-	serial_out(UART_TX, c);
-}
diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c
deleted file mode 100644
index 5c779be6f08..00000000000
--- a/arch/mips/mipssim/sim_int.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * Copyright (C) 1999, 2005 MIPS Technologies, Inc.  All rights reserved.
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- */
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <asm/mips-boards/simint.h>
-#include <asm/irq_cpu.h>
-
-static inline int clz(unsigned long x)
-{
-	__asm__(
-	"	.set	push					\n"
-	"	.set	mips32					\n"
-	"	clz	%0, %1					\n"
-	"	.set	pop					\n"
-	: "=r" (x)
-	: "r" (x));
-
-	return x;
-}
-
-/*
- * Version of ffs that only looks at bits 12..15.
- */
-static inline unsigned int irq_ffs(unsigned int pending)
-{
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
-	return -clz(pending) + 31 - CAUSEB_IP;
-#else
-	unsigned int a0 = 7;
-	unsigned int t0;
-
-	t0 = s0 & 0xf000;
-	t0 = t0 < 1;
-	t0 = t0 << 2;
-	a0 = a0 - t0;
-	s0 = s0 << t0;
-
-	t0 = s0 & 0xc000;
-	t0 = t0 < 1;
-	t0 = t0 << 1;
-	a0 = a0 - t0;
-	s0 = s0 << t0;
-
-	t0 = s0 & 0x8000;
-	t0 = t0 < 1;
-	/* t0 = t0 << 2; */
-	a0 = a0 - t0;
-	/* s0 = s0 << t0; */
-
-	return a0;
-#endif
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
-	unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
-	int irq;
-
-	irq = irq_ffs(pending);
-
-	if (irq > 0)
-		do_IRQ(MIPS_CPU_IRQ_BASE + irq);
-	else
-		spurious_interrupt();
-}
-
-void __init arch_init_irq(void)
-{
-	mips_cpu_irq_init();
-}
diff --git a/arch/mips/mipssim/sim_mem.c b/arch/mips/mipssim/sim_mem.c
deleted file mode 100644
index 953d836a771..00000000000
--- a/arch/mips/mipssim/sim_mem.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- */
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/pfn.h>
-
-#include <asm/bootinfo.h>
-#include <asm/page.h>
-#include <asm/sections.h>
-
-#include <asm/mips-boards/prom.h>
-
-/*#define DEBUG*/
-
-enum simmem_memtypes {
-	simmem_reserved = 0,
-	simmem_free,
-};
-struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
-
-#ifdef DEBUG
-static char *mtypes[3] = {
-	"SIM reserved memory",
-	"SIM free memory",
-};
-#endif
-
-struct prom_pmemblock * __init prom_getmdesc(void)
-{
-	unsigned int memsize;
-
-	memsize = 0x02000000;
-	pr_info("Setting default memory size 0x%08x\n", memsize);
-
-	memset(mdesc, 0, sizeof(mdesc));
-
-	mdesc[0].type = simmem_reserved;
-	mdesc[0].base = 0x00000000;
-	mdesc[0].size = 0x00001000;
-
-	mdesc[1].type = simmem_free;
-	mdesc[1].base = 0x00001000;
-	mdesc[1].size = 0x000ff000;
-
-	mdesc[2].type = simmem_reserved;
-	mdesc[2].base = 0x00100000;
-	mdesc[2].size = CPHYSADDR(PFN_ALIGN(&_end)) - mdesc[2].base;
-
-	mdesc[3].type = simmem_free;
-	mdesc[3].base = CPHYSADDR(PFN_ALIGN(&_end));
-	mdesc[3].size = memsize - mdesc[3].base;
-
-	return &mdesc[0];
-}
-
-static int __init prom_memtype_classify(unsigned int type)
-{
-	switch (type) {
-	case simmem_free:
-		return BOOT_MEM_RAM;
-	case simmem_reserved:
-	default:
-		return BOOT_MEM_RESERVED;
-	}
-}
-
-void __init prom_meminit(void)
-{
-	struct prom_pmemblock *p;
-
-	p = prom_getmdesc();
-
-	while (p->size) {
-		long type;
-		unsigned long base, size;
-
-		type = prom_memtype_classify(p->type);
-		base = p->base;
-		size = p->size;
-
-		add_memory_region(base, size, type);
-		p++;
-	}
-}
-
-void __init prom_free_prom_memory(void)
-{
-	int i;
-	unsigned long addr;
-
-	for (i = 0; i < boot_mem_map.nr_map; i++) {
-		if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
-			continue;
-
-		addr = boot_mem_map.map[i].addr;
-		free_init_pages("prom memory",
-				addr, addr + boot_mem_map.map[i].size);
-	}
-}
diff --git a/arch/mips/mipssim/sim_platform.c b/arch/mips/mipssim/sim_platform.c
deleted file mode 100644
index 53210a8c5de..00000000000
--- a/arch/mips/mipssim/sim_platform.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2007 by Ralf Baechle (ralf@linux-mips.org)
- */
-#include <linux/init.h>
-#include <linux/if_ether.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-
-static char mipsnet_string[] = "mipsnet";
-
-static struct platform_device eth1_device = {
-	.name		= mipsnet_string,
-	.id		= 0,
-};
-
-/*
- * Create a platform device for the GPI port that receives the
- * image data from the embedded camera.
- */
-static int __init mipsnet_devinit(void)
-{
-	int err;
-
-	err = platform_device_register(&eth1_device);
-	if (err)
-		printk(KERN_ERR "%s: registration failed\n", mipsnet_string);
-
-	return err;
-}
-
-device_initcall(mipsnet_devinit);
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c
deleted file mode 100644
index 256e0cdaa49..00000000000
--- a/arch/mips/mipssim/sim_setup.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- */
-
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/ioport.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-#include <asm/time.h>
-#include <asm/mips-boards/sim.h>
-#include <asm/mips-boards/simint.h>
-#include <asm/smp-ops.h>
-
-
-static void __init serial_init(void);
-unsigned int _isbonito;
-
-const char *get_system_type(void)
-{
-	return "MIPSsim";
-}
-
-void __init plat_mem_setup(void)
-{
-	set_io_port_base(0xbfd00000);
-
-	serial_init();
-}
-
-extern struct plat_smp_ops ssmtc_smp_ops;
-
-void __init prom_init(void)
-{
-	set_io_port_base(0xbfd00000);
-
-	prom_meminit();
-
-	if (cpu_has_mipsmt) {
-		if (!register_vsmp_smp_ops())
-			return;
-
-#ifdef CONFIG_MIPS_MT_SMTC
-		register_smp_ops(&ssmtc_smp_ops);
-			return;
-#endif
-	}
-
-	register_up_smp_ops();
-}
-
-static void __init serial_init(void)
-{
-#ifdef CONFIG_SERIAL_8250
-	struct uart_port s;
-
-	memset(&s, 0, sizeof(s));
-
-	s.iobase = 0x3f8;
-
-	/* hardware int 4 - the serial int, is CPU int 6
-	 but poll for now */
-	s.irq =  0;
-	s.uartclk = 1843200;
-	s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
-	s.iotype = UPIO_PORT;
-	s.regshift = 0;
-	s.timeout = 4;
-
-	if (early_serial_setup(&s) != 0) {
-		printk(KERN_ERR "Serial setup failed!\n");
-	}
-
-#endif
-}
diff --git a/arch/mips/mipssim/sim_smtc.c b/arch/mips/mipssim/sim_smtc.c
deleted file mode 100644
index 3c104abd8aa..00000000000
--- a/arch/mips/mipssim/sim_smtc.c
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Copyright (C) 2005 MIPS Technologies, Inc.  All rights reserved.
- *
- *  This program is free software; you can distribute it and/or modify it
- *  under the terms of the GNU General Public License (Version 2) as
- *  published by the Free Software Foundation.
- *
- *  This program is distributed in the hope it will be useful, but WITHOUT
- *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
- *  for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- */
-/*
- * Simulator Platform-specific hooks for SMTC operation
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/cpumask.h>
-#include <linux/interrupt.h>
-#include <linux/smp.h>
-
-#include <linux/atomic.h>
-#include <asm/cpu.h>
-#include <asm/processor.h>
-#include <asm/smtc.h>
-#include <asm/mmu_context.h>
-#include <asm/smtc_ipi.h>
-
-/* VPE/SMP Prototype implements platform interfaces directly */
-
-/*
- * Cause the specified action to be performed on a targeted "CPU"
- */
-
-static void ssmtc_send_ipi_single(int cpu, unsigned int action)
-{
-	smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
-	/* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
-}
-
-static inline void ssmtc_send_ipi_mask(const struct cpumask *mask,
-				       unsigned int action)
-{
-	unsigned int i;
-
-	for_each_cpu(i, mask)
-		ssmtc_send_ipi_single(i, action);
-}
-
-/*
- * Post-config but pre-boot cleanup entry point
- */
-static void __cpuinit ssmtc_init_secondary(void)
-{
-	smtc_init_secondary();
-}
-
-/*
- * SMP initialization finalization entry point
- */
-static void __cpuinit ssmtc_smp_finish(void)
-{
-	smtc_smp_finish();
-}
-
-/*
- * Hook for after all CPUs are online
- */
-static void ssmtc_cpus_done(void)
-{
-}
-
-/*
- * Platform "CPU" startup hook
- */
-static void __cpuinit ssmtc_boot_secondary(int cpu, struct task_struct *idle)
-{
-	smtc_boot_secondary(cpu, idle);
-}
-
-static void __init ssmtc_smp_setup(void)
-{
-	if (read_c0_config3() & (1 << 2))
-		mipsmt_build_cpu_map(0);
-}
-
-/*
- * Platform SMP pre-initialization
- */
-static void ssmtc_prepare_cpus(unsigned int max_cpus)
-{
-	/*
-	 * As noted above, we can assume a single CPU for now
-	 * but it may be multithreaded.
-	 */
-
-	if (read_c0_config3() & (1 << 2)) {
-		mipsmt_prepare_cpus();
-	}
-}
-
-struct plat_smp_ops ssmtc_smp_ops = {
-	.send_ipi_single	= ssmtc_send_ipi_single,
-	.send_ipi_mask		= ssmtc_send_ipi_mask,
-	.init_secondary		= ssmtc_init_secondary,
-	.smp_finish		= ssmtc_smp_finish,
-	.cpus_done		= ssmtc_cpus_done,
-	.boot_secondary		= ssmtc_boot_secondary,
-	.smp_setup		= ssmtc_smp_setup,
-	.prepare_cpus		= ssmtc_prepare_cpus,
-};
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c
deleted file mode 100644
index 77bad3c0428..00000000000
--- a/arch/mips/mipssim/sim_time.c
+++ /dev/null
@@ -1,117 +0,0 @@
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/mc146818rtc.h>
-#include <linux/smp.h>
-#include <linux/timex.h>
-
-#include <asm/hardirq.h>
-#include <asm/div64.h>
-#include <asm/cpu.h>
-#include <asm/setup.h>
-#include <asm/time.h>
-#include <asm/irq.h>
-#include <asm/mc146818-time.h>
-#include <asm/msc01_ic.h>
-
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-#include <asm/mips-boards/simint.h>
-
-
-unsigned long cpu_khz;
-
-/*
- * Estimate CPU frequency.  Sets mips_hpt_frequency as a side-effect
- */
-static unsigned int __init estimate_cpu_frequency(void)
-{
-	unsigned int prid = read_c0_prid() & 0xffff00;
-	unsigned int count;
-
-#if 1
-	/*
-	 * hardwire the board frequency to 12MHz.
-	 */
-
-	if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||
-	    (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))
-		count = 12000000;
-	else
-		count =  6000000;
-#else
-	unsigned int flags;
-
-	local_irq_save(flags);
-
-	/* Start counter exactly on falling edge of update flag */
-	while (CMOS_READ(RTC_REG_A) & RTC_UIP);
-	while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
-
-	/* Start r4k counter. */
-	write_c0_count(0);
-
-	/* Read counter exactly on falling edge of update flag */
-	while (CMOS_READ(RTC_REG_A) & RTC_UIP);
-	while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
-
-	count = read_c0_count();
-
-	/* restore interrupts */
-	local_irq_restore(flags);
-#endif
-
-	mips_hpt_frequency = count;
-
-	if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
-	    (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
-		count *= 2;
-
-	count += 5000;    /* round */
-	count -= count%10000;
-
-	return count;
-}
-
-static int mips_cpu_timer_irq;
-
-static void mips_timer_dispatch(void)
-{
-	do_IRQ(mips_cpu_timer_irq);
-}
-
-
-unsigned __cpuinit get_c0_compare_int(void)
-{
-#ifdef MSC01E_INT_BASE
-	if (cpu_has_veic) {
-		set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
-		mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
-
-		return mips_cpu_timer_irq;
-	}
-#endif
-	if (cpu_has_vint)
-		set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
-	mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
-
-	return mips_cpu_timer_irq;
-}
-
-void __init plat_time_init(void)
-{
-	unsigned int est_freq;
-
-	/* Set Data mode - binary. */
-	CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
-
-	est_freq = estimate_cpu_frequency();
-
-	printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000,
-	       (est_freq % 1000000) * 100 / 1000000);
-
-	cpu_khz = est_freq / 1000;
-}
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index fd6203f14f1..90ceb963aaf 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -11,27 +11,12 @@ obj-$(CONFIG_64BIT)		+= pgtable-64.o
 obj-$(CONFIG_HIGHMEM)		+= highmem.o
 obj-$(CONFIG_HUGETLB_PAGE)	+= hugetlbpage.o
 
-obj-$(CONFIG_CPU_LOONGSON2)	+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_MIPS32)	+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_MIPS64)	+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_NEVADA)	+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_R10000)	+= c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_R4K_CACHE_TLB) += c-r4k.o cex-gen.o tlb-r4k.o
 obj-$(CONFIG_CPU_R3000)		+= c-r3k.o tlb-r3k.o
-obj-$(CONFIG_CPU_R4300)		+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_R4X00)		+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_R5000)		+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_R5432)		+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_R5500)		+= c-r4k.o cex-gen.o tlb-r4k.o
 obj-$(CONFIG_CPU_R8000)		+= c-r4k.o cex-gen.o tlb-r8k.o
-obj-$(CONFIG_CPU_RM7000)	+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_RM9000)	+= c-r4k.o cex-gen.o tlb-r4k.o
 obj-$(CONFIG_CPU_SB1)		+= c-r4k.o cerr-sb1.o cex-sb1.o tlb-r4k.o
 obj-$(CONFIG_CPU_TX39XX)	+= c-tx39.o tlb-r3k.o
-obj-$(CONFIG_CPU_TX49XX)	+= c-r4k.o cex-gen.o tlb-r4k.o
-obj-$(CONFIG_CPU_VR41XX)	+= c-r4k.o cex-gen.o tlb-r4k.o
 obj-$(CONFIG_CPU_CAVIUM_OCTEON)	+= c-octeon.o cex-oct.o tlb-r4k.o
-obj-$(CONFIG_CPU_XLR)		+= c-r4k.o tlb-r4k.o cex-gen.o
-obj-$(CONFIG_CPU_XLP)		+= c-r4k.o tlb-r4k.o cex-gen.o
 
 obj-$(CONFIG_IP22_CPU_SCACHE)	+= sc-ip22.o
 obj-$(CONFIG_R5000_CPU_SCACHE)  += sc-r5k.o
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index f092c265dc6..4c32ede464b 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -786,6 +786,25 @@ static inline void rm7k_erratum31(void)
 	}
 }
 
+static inline void alias_74k_erratum(struct cpuinfo_mips *c)
+{
+	/*
+	 * Early versions of the 74K do not update the cache tags on a
+	 * vtag miss/ptag hit which can occur in the case of KSEG0/KUSEG
+	 * aliases. In this case it is better to treat the cache as always
+	 * having aliases.
+	 */
+	if ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(2, 4, 0))
+		c->dcache.flags |= MIPS_CACHE_VTAG;
+	if ((c->processor_id & 0xff) == PRID_REV_ENCODE_332(2, 4, 0))
+		write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
+	if (((c->processor_id & 0xff00) == PRID_IMP_1074K) &&
+	    ((c->processor_id & 0xff) <= PRID_REV_ENCODE_332(1, 1, 0))) {
+		c->dcache.flags |= MIPS_CACHE_VTAG;
+		write_c0_config6(read_c0_config6() | MIPS_CONF6_SYND);
+	}
+}
+
 static char *way_string[] __cpuinitdata = { NULL, "direct mapped", "2-way",
 	"3-way", "4-way", "5-way", "6-way", "7-way", "8-way"
 };
@@ -1056,6 +1075,8 @@ static void __cpuinit probe_pcache(void)
 	case CPU_34K:
 	case CPU_74K:
 	case CPU_1004K:
+		if (c->cputype == CPU_74K)
+			alias_74k_erratum(c);
 		if ((read_c0_config7() & (1 << 16))) {
 			/* effectively physically indexed dcache,
 			   thus no virtual aliases. */
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 829320c7b17..07cec4407b0 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -142,7 +142,7 @@ EXPORT_SYMBOL(_page_cachable_default);
 
 static inline void setup_protection_map(void)
 {
-	if (kernel_uses_smartmips_rixi) {
+	if (cpu_has_rixi) {
 		protection_map[0]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
 		protection_map[1]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
 		protection_map[2]  = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index c14f6dfed99..ddcec1e1a0c 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -114,7 +114,7 @@ good_area:
 		if (!(vma->vm_flags & VM_WRITE))
 			goto bad_area;
 	} else {
-		if (kernel_uses_smartmips_rixi) {
+		if (cpu_has_rixi) {
 			if (address == regs->cp0_epc && !(vma->vm_flags & VM_EXEC)) {
 #if 0
 				pr_notice("Cpu%d[%s:%d:%0*lx:%ld:%0*lx] XI violation\n",
@@ -171,6 +171,7 @@ good_area:
 		}
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			/*
 			 * No need to up_read(&mm->mmap_sem) as we would
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 1a85ba92eb5..be9acb2b959 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -469,19 +469,20 @@ void __init_refok free_initmem(void)
 #ifndef CONFIG_MIPS_PGD_C0_CONTEXT
 unsigned long pgd_current[NR_CPUS];
 #endif
-/*
- * On 64-bit we've got three-level pagetables with a slightly
- * different layout ...
- */
-#define __page_aligned(order) __attribute__((__aligned__(PAGE_SIZE<<order)))
 
 /*
  * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER
  * are constants.  So we use the variants from asm-offset.h until that gcc
  * will officially be retired.
+ *
+ * Align swapper_pg_dir in to 64K, allows its address to be loaded
+ * with a single LUI instruction in the TLB handlers.  If we used
+ * __aligned(64K), its size would get rounded up to the alignment
+ * size, and waste space.  So we place it in its own section and align
+ * it in the linker script.
  */
-pgd_t swapper_pg_dir[_PTRS_PER_PGD] __page_aligned(_PGD_ORDER);
+pgd_t swapper_pg_dir[_PTRS_PER_PGD] __section(.bss..swapper_pg_dir);
 #ifndef __PAGETABLE_PMD_FOLDED
-pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER);
+pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss;
 #endif
-pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER);
+pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss;
diff --git a/arch/mips/mm/pgtable-64.c b/arch/mips/mm/pgtable-64.c
index cda4e300eb0..25407794edb 100644
--- a/arch/mips/mm/pgtable-64.c
+++ b/arch/mips/mm/pgtable-64.c
@@ -26,17 +26,17 @@ void pgd_init(unsigned long page)
  	p = (unsigned long *) page;
 	end = p + PTRS_PER_PGD;
 
-	while (p < end) {
+	do {
 		p[0] = entry;
 		p[1] = entry;
 		p[2] = entry;
 		p[3] = entry;
 		p[4] = entry;
-		p[5] = entry;
-		p[6] = entry;
-		p[7] = entry;
 		p += 8;
-	}
+		p[-3] = entry;
+		p[-2] = entry;
+		p[-1] = entry;
+	} while (p != end);
 }
 
 #ifndef __PAGETABLE_PMD_FOLDED
@@ -47,17 +47,17 @@ void pmd_init(unsigned long addr, unsigned long pagetable)
  	p = (unsigned long *) addr;
 	end = p + PTRS_PER_PMD;
 
-	while (p < end) {
+	do {
 		p[0] = pagetable;
 		p[1] = pagetable;
 		p[2] = pagetable;
 		p[3] = pagetable;
 		p[4] = pagetable;
-		p[5] = pagetable;
-		p[6] = pagetable;
-		p[7] = pagetable;
 		p += 8;
-	}
+		p[-3] = pagetable;
+		p[-2] = pagetable;
+		p[-1] = pagetable;
+	} while (p != end);
 }
 #endif
 
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index d2572cb232d..87b9cfcc30f 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -401,7 +401,7 @@ void __cpuinit tlb_init(void)
 	    current_cpu_type() == CPU_R14000)
 		write_c0_framemask(0);
 
-	if (kernel_uses_smartmips_rixi) {
+	if (cpu_has_rixi) {
 		/*
 		 * Enable the no read, no exec bits, and enable large virtual
 		 * address.
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 03eb0ef9158..658a520364c 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -449,8 +449,20 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
 	}
 
 	if (cpu_has_mips_r2) {
-		if (cpu_has_mips_r2_exec_hazard)
+		/*
+		 * The architecture spec says an ehb is required here,
+		 * but a number of cores do not have the hazard and
+		 * using an ehb causes an expensive pipeline stall.
+		 */
+		switch (current_cpu_type()) {
+		case CPU_M14KC:
+		case CPU_74K:
+			break;
+
+		default:
 			uasm_i_ehb(p);
+			break;
+		}
 		tlbw(p);
 		return;
 	}
@@ -586,9 +598,8 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
 static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
 								  unsigned int reg)
 {
-	if (kernel_uses_smartmips_rixi) {
-		UASM_i_SRL(p, reg, reg, ilog2(_PAGE_NO_EXEC));
-		UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+	if (cpu_has_rixi) {
+		UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL));
 	} else {
 #ifdef CONFIG_64BIT_PHYS_ADDR
 		uasm_i_dsrl_safe(p, reg, reg, ilog2(_PAGE_GLOBAL));
@@ -921,6 +932,13 @@ build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr)
 #endif
 	uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */
 	uasm_i_lw(p, ptr, uasm_rel_lo(pgdc), ptr);
+
+	if (cpu_has_mips_r2) {
+		uasm_i_ext(p, tmp, tmp, PGDIR_SHIFT, (32 - PGDIR_SHIFT));
+		uasm_i_ins(p, ptr, tmp, PGD_T_LOG2, (32 - PGDIR_SHIFT));
+		return;
+	}
+
 	uasm_i_srl(p, tmp, tmp, PGDIR_SHIFT); /* get pgd only bits */
 	uasm_i_sll(p, tmp, tmp, PGD_T_LOG2);
 	uasm_i_addu(p, ptr, ptr, tmp); /* add in pgd offset */
@@ -956,6 +974,15 @@ static void __cpuinit build_adjust_context(u32 **p, unsigned int ctx)
 
 static void __cpuinit build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr)
 {
+	if (cpu_has_mips_r2) {
+		/* PTE ptr offset is obtained from BadVAddr */
+		UASM_i_MFC0(p, tmp, C0_BADVADDR);
+		UASM_i_LW(p, ptr, 0, ptr);
+		uasm_i_ext(p, tmp, tmp, PAGE_SHIFT+1, PGDIR_SHIFT-PAGE_SHIFT-1);
+		uasm_i_ins(p, ptr, tmp, PTE_T_LOG2+1, PGDIR_SHIFT-PAGE_SHIFT-1);
+		return;
+	}
+
 	/*
 	 * Bug workaround for the Nevada. It seems as if under certain
 	 * circumstances the move from cp0_context might produce a
@@ -990,12 +1017,10 @@ static void __cpuinit build_update_entries(u32 **p, unsigned int tmp,
 	if (cpu_has_64bits) {
 		uasm_i_ld(p, tmp, 0, ptep); /* get even pte */
 		uasm_i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
-		if (kernel_uses_smartmips_rixi) {
-			UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC));
-			UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC));
-			UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+		if (cpu_has_rixi) {
+			UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL));
 			UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
-			UASM_i_ROTR(p, ptep, ptep, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+			UASM_i_ROTR(p, ptep, ptep, ilog2(_PAGE_GLOBAL));
 		} else {
 			uasm_i_dsrl_safe(p, tmp, tmp, ilog2(_PAGE_GLOBAL)); /* convert to entrylo0 */
 			UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
@@ -1017,14 +1042,12 @@ static void __cpuinit build_update_entries(u32 **p, unsigned int tmp,
 	UASM_i_LW(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
 	if (r45k_bvahwbug())
 		build_tlb_probe_entry(p);
-	if (kernel_uses_smartmips_rixi) {
-		UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC));
-		UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC));
-		UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+	if (cpu_has_rixi) {
+		UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL));
 		if (r4k_250MHZhwbug())
 			UASM_i_MTC0(p, 0, C0_ENTRYLO0);
 		UASM_i_MTC0(p, tmp, C0_ENTRYLO0); /* load it */
-		UASM_i_ROTR(p, ptep, ptep, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+		UASM_i_ROTR(p, ptep, ptep, ilog2(_PAGE_GLOBAL));
 	} else {
 		UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_GLOBAL)); /* convert to entrylo0 */
 		if (r4k_250MHZhwbug())
@@ -1183,14 +1206,10 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
 		UASM_i_LW(p, even, 0, ptr); /* get even pte */
 		UASM_i_LW(p, odd, sizeof(pte_t), ptr); /* get odd pte */
 	}
-	if (kernel_uses_smartmips_rixi) {
-		uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_NO_EXEC));
-		uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_NO_EXEC));
-		uasm_i_drotr(p, even, even,
-			     ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+	if (cpu_has_rixi) {
+		uasm_i_drotr(p, even, even, ilog2(_PAGE_GLOBAL));
 		UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */
-		uasm_i_drotr(p, odd, odd,
-			     ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
+		uasm_i_drotr(p, odd, odd, ilog2(_PAGE_GLOBAL));
 	} else {
 		uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_GLOBAL));
 		UASM_i_MTC0(p, even, C0_ENTRYLO0); /* load it */
@@ -1545,7 +1564,7 @@ build_pte_present(u32 **p, struct uasm_reloc **r,
 {
 	int t = scratch >= 0 ? scratch : pte;
 
-	if (kernel_uses_smartmips_rixi) {
+	if (cpu_has_rixi) {
 		if (use_bbit_insns()) {
 			uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
 			uasm_i_nop(p);
@@ -1875,7 +1894,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
 	if (m4kc_tlbp_war())
 		build_tlb_probe_entry(&p);
 
-	if (kernel_uses_smartmips_rixi) {
+	if (cpu_has_rixi) {
 		/*
 		 * If the page is not _PAGE_VALID, RI or XI could not
 		 * have triggered it.  Skip the expensive test..
@@ -1929,7 +1948,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
 	build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
 	build_tlb_probe_entry(&p);
 
-	if (kernel_uses_smartmips_rixi) {
+	if (cpu_has_rixi) {
 		/*
 		 * If the page is not _PAGE_VALID, RI or XI could not
 		 * have triggered it.  Skip the expensive test..
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 64a28e81906..39b89105622 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -63,11 +63,12 @@ enum opcode {
 	insn_bne, insn_cache, insn_daddiu, insn_daddu, insn_dins, insn_dinsm,
 	insn_dmfc0, insn_dmtc0, insn_drotr, insn_drotr32, insn_dsll,
 	insn_dsll32, insn_dsra, insn_dsrl, insn_dsrl32, insn_dsubu, insn_eret,
-	insn_j, insn_jal, insn_jr, insn_ld, insn_ldx, insn_ll, insn_lld,
-	insn_lui, insn_lw, insn_lwx, insn_mfc0, insn_mtc0, insn_or, insn_ori,
-	insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd, insn_sd, insn_sll,
-	insn_sra, insn_srl, insn_subu, insn_sw, insn_syscall, insn_tlbp,
-	insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
+	insn_ext, insn_ins, insn_j, insn_jal, insn_jr, insn_ld, insn_ldx,
+	insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0, insn_mtc0,
+	insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd,
+	insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw,
+	insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor,
+	insn_xori,
 };
 
 struct insn {
@@ -115,6 +116,9 @@ static struct insn insn_table[] __uasminitdata = {
 	{ insn_dsrl, M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE },
 	{ insn_dsubu, M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD },
 	{ insn_eret,  M(cop0_op, cop_op, 0, 0, 0, eret_op),  0 },
+	{ insn_ext, M(spec3_op, 0, 0, 0, 0, ext_op), RS | RT | RD | RE },
+	{ insn_ins, M(spec3_op, 0, 0, 0, 0, ins_op), RS | RT | RD | RE },
+	{ insn_j,  M(j_op, 0, 0, 0, 0, 0),  JIMM },
 	{ insn_jal,  M(jal_op, 0, 0, 0, 0, 0),  JIMM },
 	{ insn_j,  M(j_op, 0, 0, 0, 0, 0),  JIMM },
 	{ insn_jr,  M(spec_op, 0, 0, 0, 0, jr_op),  RS },
@@ -341,6 +345,13 @@ Ip_u2u1msbu3(op)					\
 }							\
 UASM_EXPORT_SYMBOL(uasm_i##op);
 
+#define I_u2u1msbdu3(op) 				\
+Ip_u2u1msbu3(op)					\
+{							\
+	build_insn(buf, insn##op, b, a, d-1, c);	\
+}							\
+UASM_EXPORT_SYMBOL(uasm_i##op);
+
 #define I_u1u2(op)					\
 Ip_u1u2(op)						\
 {							\
@@ -394,6 +405,8 @@ I_u2u1u3(_drotr)
 I_u2u1u3(_drotr32)
 I_u3u1u2(_dsubu)
 I_0(_eret)
+I_u2u1msbdu3(_ext)
+I_u2u1msbu3(_ins)
 I_u1(_j)
 I_u1(_jal)
 I_u1(_jr)
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index fea823f1847..647b8638318 100644
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -750,3 +750,37 @@ int malta_be_handler(struct pt_regs *regs, int is_fixup)
 
 	return retval;
 }
+
+void gic_enable_interrupt(int irq_vec)
+{
+	GIC_SET_INTR_MASK(irq_vec);
+}
+
+void gic_disable_interrupt(int irq_vec)
+{
+	GIC_CLR_INTR_MASK(irq_vec);
+}
+
+void gic_irq_ack(struct irq_data *d)
+{
+	int irq = (d->irq - gic_irq_base);
+
+	GIC_CLR_INTR_MASK(irq);
+
+	if (gic_irq_flags[irq] & GIC_TRIG_EDGE)
+		GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq);
+}
+
+void gic_finish_irq(struct irq_data *d)
+{
+	/* Enable interrupts. */
+	GIC_SET_INTR_MASK(d->irq - gic_irq_base);
+}
+
+void __init gic_platform_init(int irqs, struct irq_chip *irq_controller)
+{
+	int i;
+
+	for (i = gic_irq_base; i < (gic_irq_base + irqs); i++)
+		irq_set_chip(i, irq_controller);
+}
diff --git a/arch/mips/mti-sead3/Makefile b/arch/mips/mti-sead3/Makefile
new file mode 100644
index 00000000000..626afeac438
--- /dev/null
+++ b/arch/mips/mti-sead3/Makefile
@@ -0,0 +1,19 @@
+#
+# Carsten Langgaard, carstenl@mips.com
+# Copyright (C) 1999,2000 MIPS Technologies, Inc.  All rights reserved.
+#
+# Copyright (C) 2008 Wind River Systems, Inc.
+#   written by Ralf Baechle <ralf@linux-mips.org>
+#
+obj-y				:= sead3-lcd.o sead3-cmdline.o \
+				   sead3-display.o sead3-init.o sead3-int.o \
+				   sead3-mtd.o sead3-net.o \
+				   sead3-memory.o sead3-platform.o \
+				   sead3-reset.o sead3-setup.o sead3-time.o
+
+obj-y				+= sead3-i2c-dev.o sead3-i2c.o \
+				   sead3-pic32-i2c-drv.o sead3-pic32-bus.o \
+				   leds-sead3.o sead3-leds.o
+
+obj-$(CONFIG_EARLY_PRINTK)	+= sead3-console.o
+obj-$(CONFIG_USB_EHCI_HCD)	+= sead3-ehci.o
diff --git a/arch/mips/mti-sead3/Platform b/arch/mips/mti-sead3/Platform
new file mode 100644
index 00000000000..38709242714
--- /dev/null
+++ b/arch/mips/mti-sead3/Platform
@@ -0,0 +1,7 @@
+#
+# MIPS SEAD-3 board
+#
+platform-$(CONFIG_MIPS_SEAD3)	+= mti-sead3/
+cflags-$(CONFIG_MIPS_SEAD3)	+= -I$(srctree)/arch/mips/include/asm/mach-sead3
+load-$(CONFIG_MIPS_SEAD3)	+= 0xffffffff80100000
+all-$(CONFIG_MIPS_SEAD3)	:= $(COMPRESSION_FNAME).srec
diff --git a/arch/mips/mti-sead3/leds-sead3.c b/arch/mips/mti-sead3/leds-sead3.c
new file mode 100644
index 00000000000..a95ac598520
--- /dev/null
+++ b/arch/mips/mti-sead3/leds-sead3.c
@@ -0,0 +1,128 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#define DRVNAME "sead3-led"
+
+static struct platform_device *pdev;
+
+static void sead3_pled_set(struct led_classdev *led_cdev,
+		enum led_brightness value)
+{
+	pr_debug("sead3_pled_set\n");
+	writel(value, (void __iomem *)0xBF000210);	/* FIXME */
+}
+
+static void sead3_fled_set(struct led_classdev *led_cdev,
+		enum led_brightness value)
+{
+	pr_debug("sead3_fled_set\n");
+	writel(value, (void __iomem *)0xBF000218);	/* FIXME */
+}
+
+static struct led_classdev sead3_pled = {
+	.name		= "sead3::pled",
+	.brightness_set	= sead3_pled_set,
+};
+
+static struct led_classdev sead3_fled = {
+	.name		= "sead3::fled",
+	.brightness_set	= sead3_fled_set,
+};
+
+#ifdef CONFIG_PM
+static int sead3_led_suspend(struct platform_device *dev,
+		pm_message_t state)
+{
+	led_classdev_suspend(&sead3_pled);
+	led_classdev_suspend(&sead3_fled);
+	return 0;
+}
+
+static int sead3_led_resume(struct platform_device *dev)
+{
+	led_classdev_resume(&sead3_pled);
+	led_classdev_resume(&sead3_fled);
+	return 0;
+}
+#else
+#define sead3_led_suspend NULL
+#define sead3_led_resume NULL
+#endif
+
+static int sead3_led_probe(struct platform_device *pdev)
+{
+	int ret;
+
+	ret = led_classdev_register(&pdev->dev, &sead3_pled);
+	if (ret < 0)
+		return ret;
+
+	ret = led_classdev_register(&pdev->dev, &sead3_fled);
+	if (ret < 0)
+		led_classdev_unregister(&sead3_pled);
+
+	return ret;
+}
+
+static int sead3_led_remove(struct platform_device *pdev)
+{
+	led_classdev_unregister(&sead3_pled);
+	led_classdev_unregister(&sead3_fled);
+	return 0;
+}
+
+static struct platform_driver sead3_led_driver = {
+	.probe		= sead3_led_probe,
+	.remove		= sead3_led_remove,
+	.suspend	= sead3_led_suspend,
+	.resume		= sead3_led_resume,
+	.driver		= {
+		.name		= DRVNAME,
+		.owner		= THIS_MODULE,
+	},
+};
+
+static int __init sead3_led_init(void)
+{
+	int ret;
+
+	ret = platform_driver_register(&sead3_led_driver);
+	if (ret < 0)
+		goto out;
+
+	pdev = platform_device_register_simple(DRVNAME, -1, NULL, 0);
+	if (IS_ERR(pdev)) {
+		ret = PTR_ERR(pdev);
+		platform_driver_unregister(&sead3_led_driver);
+		goto out;
+	}
+
+out:
+	return ret;
+}
+
+static void __exit sead3_led_exit(void)
+{
+	platform_device_unregister(pdev);
+	platform_driver_unregister(&sead3_led_driver);
+}
+
+module_init(sead3_led_init);
+module_exit(sead3_led_exit);
+
+MODULE_AUTHOR("Kristian Kielhofner <kris@krisk.org>");
+MODULE_DESCRIPTION("SEAD3 LED driver");
+MODULE_LICENSE("GPL");
+
diff --git a/arch/mips/mti-sead3/sead3-cmdline.c b/arch/mips/mti-sead3/sead3-cmdline.c
new file mode 100644
index 00000000000..a2e6cec67f5
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-cmdline.c
@@ -0,0 +1,46 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+
+extern int prom_argc;
+extern int *_prom_argv;
+
+/*
+ * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
+ * This macro take care of sign extension.
+ */
+#define prom_argv(index) ((char *)(long)_prom_argv[(index)])
+
+char * __init prom_getcmdline(void)
+{
+	return &(arcs_cmdline[0]);
+}
+
+void  __init prom_init_cmdline(void)
+{
+	char *cp;
+	int actr;
+
+	actr = 1; /* Always ignore argv[0] */
+
+	cp = &(arcs_cmdline[0]);
+	while (actr < prom_argc) {
+		strcpy(cp, prom_argv(actr));
+		cp += strlen(prom_argv(actr));
+		*cp++ = ' ';
+		actr++;
+	}
+	if (cp != &(arcs_cmdline[0])) {
+		/* get rid of trailing space */
+		--cp;
+		*cp = '\0';
+	}
+}
diff --git a/arch/mips/mti-sead3/sead3-console.c b/arch/mips/mti-sead3/sead3-console.c
new file mode 100644
index 00000000000..b36739108a0
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-console.c
@@ -0,0 +1,46 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/console.h>
+#include <linux/serial_reg.h>
+#include <linux/io.h>
+
+#define SEAD_UART1_REGS_BASE    0xbf000800   /* ttyS1 = DB9 port */
+#define SEAD_UART0_REGS_BASE    0xbf000900   /* ttyS0 = USB port   */
+#define PORT(base_addr, offset) ((unsigned int __iomem *)(base_addr+(offset)*4))
+
+static char console_port = 1;
+
+static inline unsigned int serial_in(int offset, unsigned int base_addr)
+{
+	return __raw_readl(PORT(base_addr, offset)) & 0xff;
+}
+
+static inline void serial_out(int offset, int value, unsigned int base_addr)
+{
+	__raw_writel(value, PORT(base_addr, offset));
+}
+
+void __init prom_init_early_console(char port)
+{
+	console_port = port;
+}
+
+int prom_putchar(char c)
+{
+	unsigned int base_addr;
+
+	base_addr = console_port ? SEAD_UART1_REGS_BASE : SEAD_UART0_REGS_BASE;
+
+	while ((serial_in(UART_LSR, base_addr) & UART_LSR_THRE) == 0)
+		;
+
+	serial_out(UART_TX, c, base_addr);
+
+	return 1;
+}
diff --git a/arch/mips/mti-sead3/sead3-display.c b/arch/mips/mti-sead3/sead3-display.c
new file mode 100644
index 00000000000..8308c7fc188
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-display.c
@@ -0,0 +1,78 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/timer.h>
+#include <linux/io.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+
+static unsigned int display_count;
+static unsigned int max_display_count;
+
+#define LCD_DISPLAY_POS_BASE		0x1f000400
+#define DISPLAY_LCDINSTRUCTION		(0*2)
+#define DISPLAY_LCDDATA			(1*2)
+#define DISPLAY_CPLDSTATUS		(2*2)
+#define DISPLAY_CPLDDATA		(3*2)
+#define LCD_SETDDRAM			0x80
+#define LCD_IR_BF			0x80
+
+const char display_string[] = "               LINUX ON SEAD3               ";
+
+static void scroll_display_message(unsigned long data);
+static DEFINE_TIMER(mips_scroll_timer, scroll_display_message, HZ, 0);
+
+static void lcd_wait(unsigned int __iomem *display)
+{
+	/* Wait for CPLD state machine to become idle. */
+	do { } while (__raw_readl(display + DISPLAY_CPLDSTATUS) & 1);
+
+	do {
+		__raw_readl(display + DISPLAY_LCDINSTRUCTION);
+
+		/* Wait for CPLD state machine to become idle. */
+		do { } while (__raw_readl(display + DISPLAY_CPLDSTATUS) & 1);
+	} while (__raw_readl(display + DISPLAY_CPLDDATA) & LCD_IR_BF);
+}
+
+void mips_display_message(const char *str)
+{
+	static unsigned int __iomem *display;
+	char ch;
+	int i;
+
+	if (unlikely(display == NULL))
+		display = ioremap_nocache(LCD_DISPLAY_POS_BASE,
+			(8 * sizeof(int)));
+
+	for (i = 0; i < 16; i++) {
+		if (*str)
+			ch = *str++;
+		else
+			ch = ' ';
+		lcd_wait(display);
+		__raw_writel((LCD_SETDDRAM | i),
+			(display + DISPLAY_LCDINSTRUCTION));
+		lcd_wait(display);
+		__raw_writel(ch, display + DISPLAY_LCDDATA);
+	}
+}
+
+static void scroll_display_message(unsigned long data)
+{
+	mips_display_message(&display_string[display_count++]);
+	if (display_count == max_display_count)
+		display_count = 0;
+	mod_timer(&mips_scroll_timer, jiffies + HZ);
+}
+
+void mips_scroll_message(void)
+{
+	del_timer_sync(&mips_scroll_timer);
+	max_display_count = strlen(display_string) + 1 - 16;
+	mod_timer(&mips_scroll_timer, jiffies + 1);
+}
diff --git a/arch/mips/mti-sead3/sead3-ehci.c b/arch/mips/mti-sead3/sead3-ehci.c
new file mode 100644
index 00000000000..772fc056a92
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-ehci.c
@@ -0,0 +1,47 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/module.h>
+#include <linux/irq.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+
+struct resource ehci_resources[] = {
+	{
+		.start			= 0x1b200000,
+		.end			= 0x1b200fff,
+		.flags			= IORESOURCE_MEM
+	},
+	{
+		.start			= MIPS_CPU_IRQ_BASE + 2,
+		.flags			= IORESOURCE_IRQ
+	}
+};
+
+u64 sead3_usbdev_dma_mask = DMA_BIT_MASK(32);
+
+static struct platform_device ehci_device = {
+	.name		= "sead3-ehci",
+	.id		= 0,
+	.dev		= {
+		.dma_mask		= &sead3_usbdev_dma_mask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32)
+	},
+	.num_resources	= ARRAY_SIZE(ehci_resources),
+	.resource	= ehci_resources
+};
+
+static int __init ehci_init(void)
+{
+	return platform_device_register(&ehci_device);
+}
+
+module_init(ehci_init);
+
+MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("EHCI probe driver for SEAD3");
diff --git a/arch/mips/mti-sead3/sead3-i2c-dev.c b/arch/mips/mti-sead3/sead3-i2c-dev.c
new file mode 100644
index 00000000000..eca0b53a71d
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-i2c-dev.c
@@ -0,0 +1,33 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/i2c.h>
+
+static struct i2c_board_info __initdata sead3_i2c_devices[] = {
+	{
+		I2C_BOARD_INFO("adt7476", 0x2c),
+		.irq = 0,
+	},
+	{
+		I2C_BOARD_INFO("m41t80", 0x68),
+		.irq = 0,
+	},
+};
+
+static int __init sead3_i2c_init(void)
+{
+	int err;
+
+	err = i2c_register_board_info(0, sead3_i2c_devices,
+					ARRAY_SIZE(sead3_i2c_devices));
+	if (err < 0)
+		pr_err("sead3-i2c-dev: cannot register board I2C devices\n");
+	return err;
+}
+
+arch_initcall(sead3_i2c_init);
diff --git a/arch/mips/mti-sead3/sead3-i2c-drv.c b/arch/mips/mti-sead3/sead3-i2c-drv.c
new file mode 100644
index 00000000000..0375ee66bca
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-i2c-drv.c
@@ -0,0 +1,405 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+
+#define PIC32_I2CxCON		0x0000
+#define  PIC32_I2CCON_ON	(1<<15)
+#define  PIC32_I2CCON_ACKDT	(1<<5)
+#define  PIC32_I2CCON_ACKEN	(1<<4)
+#define  PIC32_I2CCON_RCEN	(1<<3)
+#define  PIC32_I2CCON_PEN	(1<<2)
+#define  PIC32_I2CCON_RSEN	(1<<1)
+#define  PIC32_I2CCON_SEN	(1<<0)
+#define PIC32_I2CxCONCLR	0x0004
+#define PIC32_I2CxCONSET	0x0008
+#define PIC32_I2CxSTAT		0x0010
+#define PIC32_I2CxSTATCLR	0x0014
+#define  PIC32_I2CSTAT_ACKSTAT	(1<<15)
+#define  PIC32_I2CSTAT_TRSTAT	(1<<14)
+#define  PIC32_I2CSTAT_BCL	(1<<10)
+#define  PIC32_I2CSTAT_IWCOL	(1<<7)
+#define  PIC32_I2CSTAT_I2COV	(1<<6)
+#define PIC32_I2CxBRG		0x0040
+#define PIC32_I2CxTRN		0x0050
+#define PIC32_I2CxRCV		0x0060
+
+static DEFINE_SPINLOCK(pic32_bus_lock);
+
+static void __iomem *bus_xfer   = (void __iomem *)0xbf000600;
+static void __iomem *bus_status = (void __iomem *)0xbf000060;
+
+#define DELAY()	udelay(100)
+
+static inline unsigned int ioready(void)
+{
+	return readl(bus_status) & 1;
+}
+
+static inline void wait_ioready(void)
+{
+	do { } while (!ioready());
+}
+
+static inline void wait_ioclear(void)
+{
+	do { } while (ioready());
+}
+
+static inline void check_ioclear(void)
+{
+	if (ioready()) {
+		do {
+			(void) readl(bus_xfer);
+			DELAY();
+		} while (ioready());
+	}
+}
+
+static u32 pic32_bus_readl(u32 reg)
+{
+	unsigned long flags;
+	u32 status, val;
+
+	spin_lock_irqsave(&pic32_bus_lock, flags);
+
+	check_ioclear();
+	writel((0x01 << 24) | (reg & 0x00ffffff), bus_xfer);
+	DELAY();
+	wait_ioready();
+	status = readl(bus_xfer);
+	DELAY();
+	val = readl(bus_xfer);
+	wait_ioclear();
+
+	spin_unlock_irqrestore(&pic32_bus_lock, flags);
+
+	return val;
+}
+
+static void pic32_bus_writel(u32 val, u32 reg)
+{
+	unsigned long flags;
+	u32 status;
+
+	spin_lock_irqsave(&pic32_bus_lock, flags);
+
+	check_ioclear();
+	writel((0x10 << 24) | (reg & 0x00ffffff), bus_xfer);
+	DELAY();
+	writel(val, bus_xfer);
+	DELAY();
+	wait_ioready();
+	status = readl(bus_xfer);
+	wait_ioclear();
+
+	spin_unlock_irqrestore(&pic32_bus_lock, flags);
+}
+
+struct pic32_i2c_platform_data {
+	u32	base;
+	struct i2c_adapter adap;
+	u32	xfer_timeout;
+	u32	ack_timeout;
+	u32	ctl_timeout;
+};
+
+static inline void pic32_i2c_start(struct pic32_i2c_platform_data *adap)
+{
+	pic32_bus_writel(PIC32_I2CCON_SEN, adap->base + PIC32_I2CxCONSET);
+}
+
+static inline void pic32_i2c_stop(struct pic32_i2c_platform_data *adap)
+{
+	pic32_bus_writel(PIC32_I2CCON_PEN, adap->base + PIC32_I2CxCONSET);
+}
+
+static inline void pic32_i2c_ack(struct pic32_i2c_platform_data *adap)
+{
+	pic32_bus_writel(PIC32_I2CCON_ACKDT, adap->base + PIC32_I2CxCONCLR);
+	pic32_bus_writel(PIC32_I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
+}
+
+static inline void pic32_i2c_nack(struct pic32_i2c_platform_data *adap)
+{
+	pic32_bus_writel(PIC32_I2CCON_ACKDT, adap->base + PIC32_I2CxCONSET);
+	pic32_bus_writel(PIC32_I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
+}
+
+static inline int pic32_i2c_idle(struct pic32_i2c_platform_data *adap)
+{
+	int i;
+
+	for (i = 0; i < adap->ctl_timeout; i++) {
+		if (((pic32_bus_readl(adap->base + PIC32_I2CxCON) &
+		      (PIC32_I2CCON_ACKEN | PIC32_I2CCON_RCEN |
+		       PIC32_I2CCON_PEN | PIC32_I2CCON_RSEN |
+		       PIC32_I2CCON_SEN)) == 0) &&
+		    ((pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
+		      (PIC32_I2CSTAT_TRSTAT)) == 0))
+			return 0;
+		udelay(1);
+	}
+	return -ETIMEDOUT;
+}
+
+static inline u32 pic32_i2c_master_write(struct pic32_i2c_platform_data *adap,
+		u32 byte)
+{
+	pic32_bus_writel(byte, adap->base + PIC32_I2CxTRN);
+	return pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
+			PIC32_I2CSTAT_IWCOL;
+}
+
+static inline u32 pic32_i2c_master_read(struct pic32_i2c_platform_data *adap)
+{
+	pic32_bus_writel(PIC32_I2CCON_RCEN, adap->base + PIC32_I2CxCONSET);
+	while (pic32_bus_readl(adap->base + PIC32_I2CxCON) & PIC32_I2CCON_RCEN)
+		;
+	pic32_bus_writel(PIC32_I2CSTAT_I2COV, adap->base + PIC32_I2CxSTATCLR);
+	return pic32_bus_readl(adap->base + PIC32_I2CxRCV);
+}
+
+static int pic32_i2c_address(struct pic32_i2c_platform_data *adap,
+		unsigned int addr, int rd)
+{
+	pic32_i2c_idle(adap);
+	pic32_i2c_start(adap);
+	pic32_i2c_idle(adap);
+
+	addr <<= 1;
+	if (rd)
+		addr |= 1;
+
+	if (pic32_i2c_master_write(adap, addr))
+		return -EIO;
+	pic32_i2c_idle(adap);
+	if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
+			PIC32_I2CSTAT_ACKSTAT)
+		return -EIO;
+	return 0;
+}
+
+static int sead3_i2c_read(struct pic32_i2c_platform_data *adap,
+		unsigned char *buf, unsigned int len)
+{
+	u32 data;
+	int i;
+
+	i = 0;
+	while (i < len) {
+		data = pic32_i2c_master_read(adap);
+		buf[i++] = data;
+		if (i < len)
+			pic32_i2c_ack(adap);
+		else
+			pic32_i2c_nack(adap);
+	}
+
+	pic32_i2c_stop(adap);
+	pic32_i2c_idle(adap);
+	return 0;
+}
+
+static int sead3_i2c_write(struct pic32_i2c_platform_data *adap,
+		unsigned char *buf, unsigned int len)
+{
+	int i;
+	u32 data;
+
+	i = 0;
+	while (i < len) {
+		data = buf[i];
+		if (pic32_i2c_master_write(adap, data))
+			return -EIO;
+		pic32_i2c_idle(adap);
+		if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
+					PIC32_I2CSTAT_ACKSTAT)
+			return -EIO;
+		i++;
+	}
+
+	pic32_i2c_stop(adap);
+	pic32_i2c_idle(adap);
+	return 0;
+}
+
+static int sead3_pic32_platform_xfer(struct i2c_adapter *i2c_adap,
+		struct i2c_msg *msgs, int num)
+{
+	struct pic32_i2c_platform_data *adap = i2c_adap->algo_data;
+	struct i2c_msg *p;
+	int i, err = 0;
+
+	for (i = 0; i < num; i++) {
+#define __BUFSIZE 80
+		int ii;
+		static char buf[__BUFSIZE];
+		char *b = buf;
+
+		p = &msgs[i];
+		b += sprintf(buf, " [%d bytes]", p->len);
+		if ((p->flags & I2C_M_RD) == 0) {
+			for (ii = 0; ii < p->len; ii++) {
+				if (b < &buf[__BUFSIZE-4]) {
+					b += sprintf(b, " %02x", p->buf[ii]);
+				} else {
+					strcat(b, "...");
+					break;
+				}
+			}
+		}
+	}
+
+	for (i = 0; !err && i < num; i++) {
+		p = &msgs[i];
+		err = pic32_i2c_address(adap, p->addr, p->flags & I2C_M_RD);
+		if (err || !p->len)
+			continue;
+		if (p->flags & I2C_M_RD)
+			err = sead3_i2c_read(adap, p->buf, p->len);
+		else
+			err = sead3_i2c_write(adap, p->buf, p->len);
+	}
+
+	/* Return the number of messages processed, or the error code. */
+	if (err == 0)
+		err = num;
+
+	return err;
+}
+
+static u32 sead3_pic32_platform_func(struct i2c_adapter *adap)
+{
+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm sead3_platform_algo = {
+	.master_xfer	= sead3_pic32_platform_xfer,
+	.functionality	= sead3_pic32_platform_func,
+};
+
+static void sead3_i2c_platform_setup(struct pic32_i2c_platform_data *priv)
+{
+	pic32_bus_writel(500, priv->base + PIC32_I2CxBRG);
+	pic32_bus_writel(PIC32_I2CCON_ON, priv->base + PIC32_I2CxCONCLR);
+	pic32_bus_writel(PIC32_I2CCON_ON, priv->base + PIC32_I2CxCONSET);
+	pic32_bus_writel(PIC32_I2CSTAT_BCL | PIC32_I2CSTAT_IWCOL,
+		priv->base + PIC32_I2CxSTATCLR);
+}
+
+static int __devinit sead3_i2c_platform_probe(struct platform_device *pdev)
+{
+	struct pic32_i2c_platform_data *priv;
+	struct resource *r;
+	int ret;
+
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!r) {
+		ret = -ENODEV;
+		goto out;
+	}
+
+	priv = kzalloc(sizeof(struct pic32_i2c_platform_data), GFP_KERNEL);
+	if (!priv) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	priv->base = r->start;
+	if (!priv->base) {
+		ret = -EBUSY;
+		goto out_mem;
+	}
+
+	priv->xfer_timeout = 200;
+	priv->ack_timeout = 200;
+	priv->ctl_timeout = 200;
+
+	priv->adap.nr = pdev->id;
+	priv->adap.algo = &sead3_platform_algo;
+	priv->adap.algo_data = priv;
+	priv->adap.dev.parent = &pdev->dev;
+	strlcpy(priv->adap.name, "SEAD3 PIC32", sizeof(priv->adap.name));
+
+	sead3_i2c_platform_setup(priv);
+
+	ret = i2c_add_numbered_adapter(&priv->adap);
+	if (ret == 0) {
+		platform_set_drvdata(pdev, priv);
+		return 0;
+	}
+
+out_mem:
+	kfree(priv);
+out:
+	return ret;
+}
+
+static int __devexit sead3_i2c_platform_remove(struct platform_device *pdev)
+{
+	struct pic32_i2c_platform_data *priv = platform_get_drvdata(pdev);
+
+	platform_set_drvdata(pdev, NULL);
+	i2c_del_adapter(&priv->adap);
+	kfree(priv);
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int sead3_i2c_platform_suspend(struct platform_device *pdev,
+		pm_message_t state)
+{
+	dev_dbg(&pdev->dev, "i2c_platform_disable\n");
+	return 0;
+}
+
+static int sead3_i2c_platform_resume(struct platform_device *pdev)
+{
+	struct pic32_i2c_platform_data *priv = platform_get_drvdata(pdev);
+
+	dev_dbg(&pdev->dev, "sead3_i2c_platform_setup\n");
+	sead3_i2c_platform_setup(priv);
+
+	return 0;
+}
+#else
+#define sead3_i2c_platform_suspend	NULL
+#define sead3_i2c_platform_resume	NULL
+#endif
+
+static struct platform_driver sead3_i2c_platform_driver = {
+	.driver = {
+		.name	= "sead3-i2c",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= sead3_i2c_platform_probe,
+	.remove		= __devexit_p(sead3_i2c_platform_remove),
+	.suspend	= sead3_i2c_platform_suspend,
+	.resume		= sead3_i2c_platform_resume,
+};
+
+static int __init sead3_i2c_platform_init(void)
+{
+	return platform_driver_register(&sead3_i2c_platform_driver);
+}
+module_init(sead3_i2c_platform_init);
+
+static void __exit sead3_i2c_platform_exit(void)
+{
+	platform_driver_unregister(&sead3_i2c_platform_driver);
+}
+module_exit(sead3_i2c_platform_exit);
+
+MODULE_AUTHOR("Chris Dearman, MIPS Technologies INC.");
+MODULE_DESCRIPTION("SEAD3 PIC32 I2C driver");
+MODULE_LICENSE("GPL");
diff --git a/arch/mips/mti-sead3/sead3-i2c.c b/arch/mips/mti-sead3/sead3-i2c.c
new file mode 100644
index 00000000000..f70d5fc58ef
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-i2c.c
@@ -0,0 +1,37 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <irq.h>
+
+struct resource sead3_i2c_resources[] = {
+	{
+		.start	= 0x805200,
+		.end	= 0x8053ff,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+static struct platform_device sead3_i2c_device = {
+	.name		= "sead3-i2c",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(sead3_i2c_resources),
+	.resource	= sead3_i2c_resources,
+};
+
+static int __init sead3_i2c_init(void)
+{
+	return platform_device_register(&sead3_i2c_device);
+}
+
+module_init(sead3_i2c_init);
+
+MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("I2C probe driver for SEAD3");
diff --git a/arch/mips/mti-sead3/sead3-init.c b/arch/mips/mti-sead3/sead3-init.c
new file mode 100644
index 00000000000..a958cad6fff
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-init.c
@@ -0,0 +1,91 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/bootinfo.h>
+#include <asm/cacheflush.h>
+#include <asm/traps.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+
+extern void prom_init_early_console(char port);
+
+extern char except_vec_nmi;
+extern char except_vec_ejtag_debug;
+
+int prom_argc;
+int *_prom_argv, *_prom_envp;
+
+#define prom_envp(index) ((char *)(long)_prom_envp[(index)])
+
+char *prom_getenv(char *envname)
+{
+	/*
+	 * Return a pointer to the given environment variable.
+	 * In 64-bit mode: we're using 64-bit pointers, but all pointers
+	 * in the PROM structures are only 32-bit, so we need some
+	 * workarounds, if we are running in 64-bit mode.
+	 */
+	int i, index = 0;
+
+	i = strlen(envname);
+
+	while (prom_envp(index)) {
+		if (strncmp(envname, prom_envp(index), i) == 0)
+			return prom_envp(index+1);
+		index += 2;
+	}
+
+	return NULL;
+}
+
+static void __init mips_nmi_setup(void)
+{
+	void *base;
+
+	base = cpu_has_veic ?
+		(void *)(CAC_BASE + 0xa80) :
+		(void *)(CAC_BASE + 0x380);
+	memcpy(base, &except_vec_nmi, 0x80);
+	flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
+}
+
+static void __init mips_ejtag_setup(void)
+{
+	void *base;
+
+	base = cpu_has_veic ?
+		(void *)(CAC_BASE + 0xa00) :
+		(void *)(CAC_BASE + 0x300);
+	memcpy(base, &except_vec_ejtag_debug, 0x80);
+	flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
+}
+
+void __init prom_init(void)
+{
+	prom_argc = fw_arg0;
+	_prom_argv = (int *) fw_arg1;
+	_prom_envp = (int *) fw_arg2;
+
+	board_nmi_handler_setup = mips_nmi_setup;
+	board_ejtag_handler_setup = mips_ejtag_setup;
+
+	prom_init_cmdline();
+	prom_meminit();
+#ifdef CONFIG_EARLY_PRINTK
+	if ((strstr(prom_getcmdline(), "console=ttyS0")) != NULL)
+		prom_init_early_console(0);
+	else if ((strstr(prom_getcmdline(), "console=ttyS1")) != NULL)
+		prom_init_early_console(1);
+#endif
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+	if ((strstr(prom_getcmdline(), "console=")) == NULL)
+		strcat(prom_getcmdline(), " console=ttyS0,38400n8r");
+#endif
+}
diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c
new file mode 100644
index 00000000000..e26e08274fc
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-int.c
@@ -0,0 +1,158 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+
+#include <asm/gic.h>
+#include <asm/irq_cpu.h>
+#include <asm/setup.h>
+
+#include <asm/mips-boards/sead3int.h>
+
+#define SEAD_CONFIG_GIC_PRESENT_SHF	1
+#define SEAD_CONFIG_GIC_PRESENT_MSK	(1 << SEAD_CONFIG_GIC_PRESENT_SHF)
+#define SEAD_CONFIG_BASE		0x1b100110
+#define SEAD_CONFIG_SIZE		4
+
+int gic_present;
+static unsigned long sead3_config_reg;
+
+/*
+ * This table defines the setup for each external GIC interrupt. It is
+ * indexed by interrupt number.
+ */
+#define GIC_CPU_NMI GIC_MAP_TO_NMI_MSK
+static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = {
+	{ 0, GIC_CPU_INT4, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT },
+	{ 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT },
+	{ 0, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT },
+	{ 0, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT },
+	{ 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT },
+	{ 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT },
+	{ 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT },
+	{ 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT },
+	{ 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, GIC_FLAG_TRANSPARENT },
+	{ GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED },
+	{ GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED },
+	{ GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED },
+	{ GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED },
+	{ GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED },
+	{ GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED },
+	{ GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED, GIC_UNUSED },
+};
+
+asmlinkage void plat_irq_dispatch(void)
+{
+	unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
+	int irq;
+
+	irq = (fls(pending) - CAUSEB_IP - 1);
+	if (irq >= 0)
+		do_IRQ(MIPS_CPU_IRQ_BASE + irq);
+	else
+		spurious_interrupt();
+}
+
+void __init arch_init_irq(void)
+{
+	int i;
+
+	if (!cpu_has_veic) {
+		mips_cpu_irq_init();
+
+		if (cpu_has_vint) {
+			/* install generic handler */
+			for (i = 0; i < 8; i++)
+				set_vi_handler(i, plat_irq_dispatch);
+		}
+	}
+
+	sead3_config_reg = (unsigned long)ioremap_nocache(SEAD_CONFIG_BASE,
+		SEAD_CONFIG_SIZE);
+	gic_present = (REG32(sead3_config_reg) & SEAD_CONFIG_GIC_PRESENT_MSK) >>
+		SEAD_CONFIG_GIC_PRESENT_SHF;
+	pr_info("GIC: %spresent\n", (gic_present) ? "" : "not ");
+	pr_info("EIC: %s\n",
+		(current_cpu_data.options & MIPS_CPU_VEIC) ?  "on" : "off");
+
+	if (gic_present)
+		gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map,
+			ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
+}
+
+void gic_enable_interrupt(int irq_vec)
+{
+	unsigned int i, irq_source;
+
+	/* enable all the interrupts associated with this vector */
+	for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) {
+		irq_source = gic_shared_intr_map[irq_vec].intr_list[i];
+		GIC_SET_INTR_MASK(irq_source);
+	}
+	/* enable all local interrupts associated with this vector */
+	if (gic_shared_intr_map[irq_vec].local_intr_mask) {
+		GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0);
+		GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_SMASK),
+			gic_shared_intr_map[irq_vec].local_intr_mask);
+	}
+}
+
+void gic_disable_interrupt(int irq_vec)
+{
+	unsigned int i, irq_source;
+
+	/* disable all the interrupts associated with this vector */
+	for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) {
+		irq_source = gic_shared_intr_map[irq_vec].intr_list[i];
+		GIC_CLR_INTR_MASK(irq_source);
+	}
+	/* disable all local interrupts associated with this vector */
+	if (gic_shared_intr_map[irq_vec].local_intr_mask) {
+		GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0);
+		GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_RMASK),
+			gic_shared_intr_map[irq_vec].local_intr_mask);
+	}
+}
+
+void gic_irq_ack(struct irq_data *d)
+{
+	GIC_CLR_INTR_MASK(d->irq - gic_irq_base);
+}
+
+void gic_finish_irq(struct irq_data *d)
+{
+	unsigned int irq = (d->irq - gic_irq_base);
+	unsigned int i, irq_source;
+
+	/* Clear edge detectors. */
+	for (i = 0; i < gic_shared_intr_map[irq].num_shared_intr; i++) {
+		irq_source = gic_shared_intr_map[irq].intr_list[i];
+		if (gic_irq_flags[irq_source] & GIC_TRIG_EDGE)
+			GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq_source);
+	}
+
+	/* Enable interrupts. */
+	GIC_SET_INTR_MASK(irq);
+}
+
+void __init gic_platform_init(int irqs, struct irq_chip *irq_controller)
+{
+	int i;
+
+	/*
+	 * For non-EIC mode, we want to setup the GIC in pass-through
+	 * mode, as if the GIC didn't exist. Do not map any interrupts
+	 * for an external interrupt controller.
+	 */
+	if (!cpu_has_veic)
+		return;
+
+	for (i = gic_irq_base; i < (gic_irq_base + irqs); i++)
+		irq_set_chip_and_handler(i, irq_controller, handle_percpu_irq);
+}
diff --git a/arch/mips/mti-sead3/sead3-lcd.c b/arch/mips/mti-sead3/sead3-lcd.c
new file mode 100644
index 00000000000..10b10ed21f7
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-lcd.c
@@ -0,0 +1,43 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+static struct resource __initdata sead3_lcd_resource = {
+		.start	= 0x1f000400,
+		.end	= 0x1f00041f,
+		.flags	= IORESOURCE_MEM,
+};
+
+static __init int sead3_lcd_add(void)
+{
+	struct platform_device *pdev;
+	int retval;
+
+	/* SEAD-3 and Cobalt platforms use same display type. */
+	pdev = platform_device_alloc("cobalt-lcd", -1);
+	if (!pdev)
+		return -ENOMEM;
+
+	retval = platform_device_add_resources(pdev, &sead3_lcd_resource, 1);
+	if (retval)
+		goto err_free_device;
+
+	retval = platform_device_add(pdev);
+	if (retval)
+		goto err_free_device;
+
+	return 0;
+
+err_free_device:
+	platform_device_put(pdev);
+
+	return retval;
+}
+
+device_initcall(sead3_lcd_add);
diff --git a/arch/mips/mti-sead3/sead3-leds.c b/arch/mips/mti-sead3/sead3-leds.c
new file mode 100644
index 00000000000..20102a6d414
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-leds.c
@@ -0,0 +1,83 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/module.h>
+#include <linux/leds.h>
+#include <linux/platform_device.h>
+
+#define LEDFLAGS(bits, shift)		\
+	((bits << 8) | (shift << 8))
+
+#define LEDBITS(id, shift, bits)	\
+	.name = id #shift,		\
+	.flags = LEDFLAGS(bits, shift)
+
+struct led_info led_data_info[] = {
+	{ LEDBITS("bit", 0, 1) },
+	{ LEDBITS("bit", 1, 1) },
+	{ LEDBITS("bit", 2, 1) },
+	{ LEDBITS("bit", 3, 1) },
+	{ LEDBITS("bit", 4, 1) },
+	{ LEDBITS("bit", 5, 1) },
+	{ LEDBITS("bit", 6, 1) },
+	{ LEDBITS("bit", 7, 1) },
+	{ LEDBITS("all", 0, 8) },
+};
+
+static struct led_platform_data led_data = {
+	.num_leds	= ARRAY_SIZE(led_data_info),
+	.leds		= led_data_info
+};
+
+static struct resource pled_resources[] = {
+	{
+		.start	= 0x1f000210,
+		.end	= 0x1f000217,
+		.flags	= IORESOURCE_MEM
+	}
+};
+
+static struct platform_device pled_device = {
+	.name			= "sead3::pled",
+	.id			= 0,
+	.dev			= {
+		.platform_data	= &led_data,
+	},
+	.num_resources		= ARRAY_SIZE(pled_resources),
+	.resource		= pled_resources
+};
+
+
+static struct resource fled_resources[] = {
+	{
+		.start			= 0x1f000218,
+		.end			= 0x1f00021f,
+		.flags			= IORESOURCE_MEM
+	}
+};
+
+static struct platform_device fled_device = {
+	.name			= "sead3::fled",
+	.id			= 0,
+	.dev			= {
+		.platform_data	= &led_data,
+	},
+	.num_resources		= ARRAY_SIZE(fled_resources),
+	.resource		= fled_resources
+};
+
+static int __init led_init(void)
+{
+	platform_device_register(&pled_device);
+	return platform_device_register(&fled_device);
+}
+
+module_init(led_init);
+
+MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("LED probe driver for SEAD-3");
diff --git a/arch/mips/mti-sead3/sead3-memory.c b/arch/mips/mti-sead3/sead3-memory.c
new file mode 100644
index 00000000000..da9244106f8
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-memory.c
@@ -0,0 +1,138 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/bootmem.h>
+
+#include <asm/bootinfo.h>
+#include <asm/sections.h>
+#include <asm/mips-boards/prom.h>
+
+enum yamon_memtypes {
+	yamon_dontuse,
+	yamon_prom,
+	yamon_free,
+};
+
+static struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
+
+/* determined physical memory size, not overridden by command line args  */
+unsigned long physical_memsize = 0L;
+
+struct prom_pmemblock * __init prom_getmdesc(void)
+{
+	char *memsize_str, *ptr;
+	unsigned int memsize;
+	static char cmdline[COMMAND_LINE_SIZE] __initdata;
+	long val;
+	int tmp;
+
+	/* otherwise look in the environment */
+	memsize_str = prom_getenv("memsize");
+	if (!memsize_str) {
+		pr_warn("memsize not set in boot prom, set to default 32Mb\n");
+		physical_memsize = 0x02000000;
+	} else {
+		tmp = kstrtol(memsize_str, 0, &val);
+		physical_memsize = (unsigned long)val;
+	}
+
+#ifdef CONFIG_CPU_BIG_ENDIAN
+	/* SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last
+	   word of physical memory */
+	physical_memsize -= PAGE_SIZE;
+#endif
+
+	/* Check the command line for a memsize directive that overrides
+	   the physical/default amount */
+	strcpy(cmdline, arcs_cmdline);
+	ptr = strstr(cmdline, "memsize=");
+	if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
+		ptr = strstr(ptr, " memsize=");
+
+	if (ptr)
+		memsize = memparse(ptr + 8, &ptr);
+	else
+		memsize = physical_memsize;
+
+	memset(mdesc, 0, sizeof(mdesc));
+
+	mdesc[0].type = yamon_dontuse;
+	mdesc[0].base = 0x00000000;
+	mdesc[0].size = 0x00001000;
+
+	mdesc[1].type = yamon_prom;
+	mdesc[1].base = 0x00001000;
+	mdesc[1].size = 0x000ef000;
+
+	/*
+	 * The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
+	 * south bridge and PCI access always forwarded to the ISA Bus and
+	 * BIOSCS# is always generated.
+	 * This mean that this area can't be used as DMA memory for PCI
+	 * devices.
+	 */
+	mdesc[2].type = yamon_dontuse;
+	mdesc[2].base = 0x000f0000;
+	mdesc[2].size = 0x00010000;
+
+	mdesc[3].type = yamon_dontuse;
+	mdesc[3].base = 0x00100000;
+	mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) -
+		mdesc[3].base;
+
+	mdesc[4].type = yamon_free;
+	mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end));
+	mdesc[4].size = memsize - mdesc[4].base;
+
+	return &mdesc[0];
+}
+
+static int __init prom_memtype_classify(unsigned int type)
+{
+	switch (type) {
+	case yamon_free:
+		return BOOT_MEM_RAM;
+	case yamon_prom:
+		return BOOT_MEM_ROM_DATA;
+	default:
+		return BOOT_MEM_RESERVED;
+	}
+}
+
+void __init prom_meminit(void)
+{
+	struct prom_pmemblock *p;
+
+	p = prom_getmdesc();
+
+	while (p->size) {
+		long type;
+		unsigned long base, size;
+
+		type = prom_memtype_classify(p->type);
+		base = p->base;
+		size = p->size;
+
+		add_memory_region(base, size, type);
+		p++;
+	}
+}
+
+void __init prom_free_prom_memory(void)
+{
+	unsigned long addr;
+	int i;
+
+	for (i = 0; i < boot_mem_map.nr_map; i++) {
+		if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
+			continue;
+
+		addr = boot_mem_map.map[i].addr;
+		free_init_pages("prom memory",
+				addr, addr + boot_mem_map.map[i].size);
+	}
+}
diff --git a/arch/mips/mti-sead3/sead3-mtd.c b/arch/mips/mti-sead3/sead3-mtd.c
new file mode 100644
index 00000000000..ffa35f50978
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-mtd.c
@@ -0,0 +1,54 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+
+static struct mtd_partition sead3_mtd_partitions[] = {
+	{
+		.name =		"User FS",
+		.offset =	0x00000000,
+		.size =		0x01fc0000,
+	}, {
+		.name =		"Board Config",
+		.offset =	0x01fc0000,
+		.size =		0x00040000,
+		.mask_flags =	MTD_WRITEABLE
+	},
+};
+
+static struct physmap_flash_data sead3_flash_data = {
+	.width		= 4,
+	.nr_parts	= ARRAY_SIZE(sead3_mtd_partitions),
+	.parts		= sead3_mtd_partitions
+};
+
+static struct resource sead3_flash_resource = {
+	.start		= 0x1c000000,
+	.end		= 0x1dffffff,
+	.flags		= IORESOURCE_MEM
+};
+
+static struct platform_device sead3_flash = {
+	.name		= "physmap-flash",
+	.id		= 0,
+	.dev		= {
+		.platform_data	= &sead3_flash_data,
+	},
+	.num_resources	= 1,
+	.resource	= &sead3_flash_resource,
+};
+
+static int __init sead3_mtd_init(void)
+{
+	platform_device_register(&sead3_flash);
+
+	return 0;
+}
+
+module_init(sead3_mtd_init)
diff --git a/arch/mips/mti-sead3/sead3-net.c b/arch/mips/mti-sead3/sead3-net.c
new file mode 100644
index 00000000000..04d704df609
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-net.c
@@ -0,0 +1,51 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/module.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/smsc911x.h>
+
+static struct smsc911x_platform_config sead3_smsc911x_data = {
+	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
+	.flags	= SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
+	.phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
+struct resource sead3_net_resourcess[] = {
+	{
+		.start                  = 0x1f010000,
+		.end                    = 0x1f01ffff,
+		.flags			= IORESOURCE_MEM
+	},
+	{
+		.start			= MIPS_CPU_IRQ_BASE + 6,
+		.flags			= IORESOURCE_IRQ
+	}
+};
+
+static struct platform_device sead3_net_device = {
+	.name			= "smsc911x",
+	.id			= 0,
+	.dev			= {
+		.platform_data	= &sead3_smsc911x_data,
+	},
+	.num_resources		= ARRAY_SIZE(sead3_net_resourcess),
+	.resource		= sead3_net_resourcess
+};
+
+static int __init sead3_net_init(void)
+{
+	return platform_device_register(&sead3_net_device);
+}
+
+module_init(sead3_net_init);
+
+MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Network probe driver for SEAD-3");
diff --git a/arch/mips/mti-sead3/sead3-pic32-bus.c b/arch/mips/mti-sead3/sead3-pic32-bus.c
new file mode 100644
index 00000000000..9f0d89bc800
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-pic32-bus.c
@@ -0,0 +1,103 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/spinlock.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+
+#define PIC32_NULL	0x00
+#define PIC32_RD	0x01
+#define PIC32_SYSRD	0x02
+#define PIC32_WR	0x10
+#define PIC32_SYSWR	0x20
+#define PIC32_IRQ_CLR   0x40
+#define PIC32_STATUS	0x80
+
+#define DELAY()	udelay(100)	/* FIXME: needed? */
+
+/* spinlock to ensure atomic access to PIC32 */
+static DEFINE_SPINLOCK(pic32_bus_lock);
+
+/* FIXME: io_remap these */
+static void __iomem *bus_xfer   = (void __iomem *)0xbf000600;
+static void __iomem *bus_status = (void __iomem *)0xbf000060;
+
+static inline unsigned int ioready(void)
+{
+	return readl(bus_status) & 1;
+}
+
+static inline void wait_ioready(void)
+{
+	do { } while (!ioready());
+}
+
+static inline void wait_ioclear(void)
+{
+	do { } while (ioready());
+}
+
+static inline void check_ioclear(void)
+{
+	if (ioready()) {
+		pr_debug("ioclear: initially busy\n");
+		do {
+			(void) readl(bus_xfer);
+			DELAY();
+		} while (ioready());
+		pr_debug("ioclear: cleared busy\n");
+	}
+}
+
+u32 pic32_bus_readl(u32 reg)
+{
+	unsigned long flags;
+	u32 status, val;
+
+	spin_lock_irqsave(&pic32_bus_lock, flags);
+
+	check_ioclear();
+
+	writel((PIC32_RD << 24) | (reg & 0x00ffffff), bus_xfer);
+	DELAY();
+	wait_ioready();
+	status = readl(bus_xfer);
+	DELAY();
+	val = readl(bus_xfer);
+	wait_ioclear();
+
+	pr_debug("pic32_bus_readl: *%x -> %x (status=%x)\n", reg, val, status);
+
+	spin_unlock_irqrestore(&pic32_bus_lock, flags);
+
+	return val;
+}
+
+void pic32_bus_writel(u32 val, u32 reg)
+{
+	unsigned long flags;
+	u32 status;
+
+	spin_lock_irqsave(&pic32_bus_lock, flags);
+
+	check_ioclear();
+
+	writel((PIC32_WR << 24) | (reg & 0x00ffffff), bus_xfer);
+	DELAY();
+	writel(val, bus_xfer);
+	DELAY();
+	wait_ioready();
+	status = readl(bus_xfer);
+	wait_ioclear();
+
+	pr_debug("pic32_bus_writel: *%x <- %x (status=%x)\n", reg, val, status);
+
+	spin_unlock_irqrestore(&pic32_bus_lock, flags);
+}
diff --git a/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c b/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c
new file mode 100644
index 00000000000..46509b0a620
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-pic32-i2c-drv.c
@@ -0,0 +1,435 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+
+#define PIC32_I2CxCON		0x0000
+#define PIC32_I2CxCONCLR	0x0004
+#define PIC32_I2CxCONSET	0x0008
+#define PIC32_I2CxCONINV	0x000C
+#define  I2CCON_ON		(1<<15)
+#define  I2CCON_FRZ		(1<<14)
+#define  I2CCON_SIDL		(1<<13)
+#define  I2CCON_SCLREL		(1<<12)
+#define  I2CCON_STRICT		(1<<11)
+#define  I2CCON_A10M		(1<<10)
+#define  I2CCON_DISSLW		(1<<9)
+#define  I2CCON_SMEN		(1<<8)
+#define  I2CCON_GCEN		(1<<7)
+#define  I2CCON_STREN		(1<<6)
+#define  I2CCON_ACKDT		(1<<5)
+#define  I2CCON_ACKEN		(1<<4)
+#define  I2CCON_RCEN		(1<<3)
+#define  I2CCON_PEN		(1<<2)
+#define  I2CCON_RSEN		(1<<1)
+#define  I2CCON_SEN		(1<<0)
+
+#define PIC32_I2CxSTAT		0x0010
+#define PIC32_I2CxSTATCLR	0x0014
+#define PIC32_I2CxSTATSET	0x0018
+#define PIC32_I2CxSTATINV	0x001C
+#define  I2CSTAT_ACKSTAT	(1<<15)
+#define  I2CSTAT_TRSTAT		(1<<14)
+#define  I2CSTAT_BCL		(1<<10)
+#define  I2CSTAT_GCSTAT		(1<<9)
+#define  I2CSTAT_ADD10		(1<<8)
+#define  I2CSTAT_IWCOL		(1<<7)
+#define  I2CSTAT_I2COV		(1<<6)
+#define  I2CSTAT_DA		(1<<5)
+#define  I2CSTAT_P		(1<<4)
+#define  I2CSTAT_S		(1<<3)
+#define  I2CSTAT_RW		(1<<2)
+#define  I2CSTAT_RBF		(1<<1)
+#define  I2CSTAT_TBF		(1<<0)
+
+#define PIC32_I2CxADD		0x0020
+#define PIC32_I2CxADDCLR	0x0024
+#define PIC32_I2CxADDSET	0x0028
+#define PIC32_I2CxADDINV	0x002C
+#define PIC32_I2CxMSK		0x0030
+#define PIC32_I2CxMSKCLR	0x0034
+#define PIC32_I2CxMSKSET	0x0038
+#define PIC32_I2CxMSKINV	0x003C
+#define PIC32_I2CxBRG		0x0040
+#define PIC32_I2CxBRGCLR	0x0044
+#define PIC32_I2CxBRGSET	0x0048
+#define PIC32_I2CxBRGINV	0x004C
+#define PIC32_I2CxTRN		0x0050
+#define PIC32_I2CxTRNCLR	0x0054
+#define PIC32_I2CxTRNSET	0x0058
+#define PIC32_I2CxTRNINV	0x005C
+#define PIC32_I2CxRCV		0x0060
+
+struct i2c_platform_data {
+	u32	base;
+	struct i2c_adapter adap;
+	u32	xfer_timeout;
+	u32	ack_timeout;
+	u32	ctl_timeout;
+};
+
+extern u32 pic32_bus_readl(u32 reg);
+extern void pic32_bus_writel(u32 val, u32 reg);
+
+static inline void
+StartI2C(struct i2c_platform_data *adap)
+{
+	pr_debug("StartI2C\n");
+	pic32_bus_writel(I2CCON_SEN, adap->base + PIC32_I2CxCONSET);
+}
+
+static inline void
+StopI2C(struct i2c_platform_data *adap)
+{
+	pr_debug("StopI2C\n");
+	pic32_bus_writel(I2CCON_PEN, adap->base + PIC32_I2CxCONSET);
+}
+
+static inline void
+AckI2C(struct i2c_platform_data *adap)
+{
+	pr_debug("AckI2C\n");
+	pic32_bus_writel(I2CCON_ACKDT, adap->base + PIC32_I2CxCONCLR);
+	pic32_bus_writel(I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
+}
+
+static inline void
+NotAckI2C(struct i2c_platform_data *adap)
+{
+	pr_debug("NakI2C\n");
+	pic32_bus_writel(I2CCON_ACKDT, adap->base + PIC32_I2CxCONSET);
+	pic32_bus_writel(I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
+}
+
+static inline int
+IdleI2C(struct i2c_platform_data *adap)
+{
+	int i;
+
+	pr_debug("IdleI2C\n");
+	for (i = 0; i < adap->ctl_timeout; i++) {
+		if (((pic32_bus_readl(adap->base + PIC32_I2CxCON) &
+		     (I2CCON_ACKEN | I2CCON_RCEN | I2CCON_PEN | I2CCON_RSEN |
+		      I2CCON_SEN)) == 0) &&
+		    ((pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
+		     (I2CSTAT_TRSTAT)) == 0))
+			return 0;
+		udelay(1);
+	}
+	return -ETIMEDOUT;
+}
+
+static inline u32
+MasterWriteI2C(struct i2c_platform_data *adap, u32 byte)
+{
+	pr_debug("MasterWriteI2C\n");
+
+	pic32_bus_writel(byte, adap->base + PIC32_I2CxTRN);
+
+	return pic32_bus_readl(adap->base + PIC32_I2CxSTAT) & I2CSTAT_IWCOL;
+}
+
+static inline u32
+MasterReadI2C(struct i2c_platform_data *adap)
+{
+	pr_debug("MasterReadI2C\n");
+
+	pic32_bus_writel(I2CCON_RCEN, adap->base + PIC32_I2CxCONSET);
+
+	while (pic32_bus_readl(adap->base + PIC32_I2CxCON) & I2CCON_RCEN)
+		;
+
+	pic32_bus_writel(I2CSTAT_I2COV, adap->base + PIC32_I2CxSTATCLR);
+
+	return pic32_bus_readl(adap->base + PIC32_I2CxRCV);
+}
+
+static int
+do_address(struct i2c_platform_data *adap, unsigned int addr, int rd)
+{
+	pr_debug("doaddress\n");
+
+	IdleI2C(adap);
+	StartI2C(adap);
+	IdleI2C(adap);
+
+	addr <<= 1;
+	if (rd)
+		addr |= 1;
+
+	if (MasterWriteI2C(adap, addr))
+		return -EIO;
+	IdleI2C(adap);
+	if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) & I2CSTAT_ACKSTAT)
+		return -EIO;
+	return 0;
+}
+
+static int
+i2c_read(struct i2c_platform_data *adap, unsigned char *buf,
+		    unsigned int len)
+{
+	int	i;
+	u32	data;
+
+	pr_debug("i2c_read\n");
+
+	i = 0;
+	while (i < len) {
+		data = MasterReadI2C(adap);
+		buf[i++] = data;
+		if (i < len)
+			AckI2C(adap);
+		else
+			NotAckI2C(adap);
+	}
+
+	StopI2C(adap);
+	IdleI2C(adap);
+	return 0;
+}
+
+static int
+i2c_write(struct i2c_platform_data *adap, unsigned char *buf,
+		     unsigned int len)
+{
+	int	i;
+	u32	data;
+
+	pr_debug("i2c_write\n");
+
+	i = 0;
+	while (i < len) {
+		data = buf[i];
+		if (MasterWriteI2C(adap, data))
+			return -EIO;
+		IdleI2C(adap);
+		if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
+		    I2CSTAT_ACKSTAT)
+			return -EIO;
+		i++;
+	}
+
+	StopI2C(adap);
+	IdleI2C(adap);
+	return 0;
+}
+
+static int
+platform_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
+{
+	struct i2c_platform_data *adap = i2c_adap->algo_data;
+	struct i2c_msg *p;
+	int i, err = 0;
+
+	pr_debug("platform_xfer\n");
+	for (i = 0; i < num; i++) {
+#define __BUFSIZE 80
+		int ii;
+		static char buf[__BUFSIZE];
+		char *b = buf;
+
+		p = &msgs[i];
+		b += sprintf(buf, " [%d bytes]", p->len);
+		if ((p->flags & I2C_M_RD) == 0) {
+			for (ii = 0; ii < p->len; ii++) {
+				if (b < &buf[__BUFSIZE-4]) {
+					b += sprintf(b, " %02x", p->buf[ii]);
+				} else {
+					strcat(b, "...");
+					break;
+				}
+			}
+		}
+		pr_debug("xfer%d: DevAddr: %04x Op:%s Data:%s\n", i, p->addr,
+			 (p->flags & I2C_M_RD) ? "Rd" : "Wr", buf);
+	}
+
+
+	for (i = 0; !err && i < num; i++) {
+		p = &msgs[i];
+		err = do_address(adap, p->addr, p->flags & I2C_M_RD);
+		if (err || !p->len)
+			continue;
+		if (p->flags & I2C_M_RD)
+			err = i2c_read(adap, p->buf, p->len);
+		else
+			err = i2c_write(adap, p->buf, p->len);
+	}
+
+	/* Return the number of messages processed, or the error code. */
+	if (err == 0)
+		err = num;
+
+	return err;
+}
+
+static u32
+platform_func(struct i2c_adapter *adap)
+{
+	pr_debug("platform_algo\n");
+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm platform_algo = {
+	.master_xfer	= platform_xfer,
+	.functionality	= platform_func,
+};
+
+static void i2c_platform_setup(struct i2c_platform_data *priv)
+{
+	pr_debug("i2c_platform_setup\n");
+
+	pic32_bus_writel(500, priv->base + PIC32_I2CxBRG);
+	pic32_bus_writel(I2CCON_ON, priv->base + PIC32_I2CxCONCLR);
+	pic32_bus_writel(I2CCON_ON, priv->base + PIC32_I2CxCONSET);
+	pic32_bus_writel((I2CSTAT_BCL | I2CSTAT_IWCOL),
+		(priv->base + PIC32_I2CxSTATCLR));
+}
+
+static void i2c_platform_disable(struct i2c_platform_data *priv)
+{
+	pr_debug("i2c_platform_disable\n");
+}
+
+static int __devinit
+i2c_platform_probe(struct platform_device *pdev)
+{
+	struct i2c_platform_data *priv;
+	struct resource *r;
+	int ret;
+
+	pr_debug("i2c_platform_probe\n");
+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!r) {
+		ret = -ENODEV;
+		goto out;
+	}
+
+	priv = kzalloc(sizeof(struct i2c_platform_data), GFP_KERNEL);
+	if (!priv) {
+		ret = -ENOMEM;
+		goto out;
+	}
+
+	/* FIXME: need to allocate resource in PIC32 space */
+#if 0
+	priv->base = bus_request_region(r->start, resource_size(r),
+					  pdev->name);
+#else
+	priv->base = r->start;
+#endif
+	if (!priv->base) {
+		ret = -EBUSY;
+		goto out_mem;
+	}
+
+	priv->xfer_timeout = 200;
+	priv->ack_timeout = 200;
+	priv->ctl_timeout = 200;
+
+	priv->adap.nr = pdev->id;
+	priv->adap.algo = &platform_algo;
+	priv->adap.algo_data = priv;
+	priv->adap.dev.parent = &pdev->dev;
+	strlcpy(priv->adap.name, "PIC32 I2C", sizeof(priv->adap.name));
+
+	i2c_platform_setup(priv);
+
+	ret = i2c_add_numbered_adapter(&priv->adap);
+	if (ret == 0) {
+		platform_set_drvdata(pdev, priv);
+		return 0;
+	}
+
+	i2c_platform_disable(priv);
+
+out_mem:
+	kfree(priv);
+out:
+	return ret;
+}
+
+static int __devexit
+i2c_platform_remove(struct platform_device *pdev)
+{
+	struct i2c_platform_data *priv = platform_get_drvdata(pdev);
+
+	pr_debug("i2c_platform_remove\n");
+	platform_set_drvdata(pdev, NULL);
+	i2c_del_adapter(&priv->adap);
+	i2c_platform_disable(priv);
+	kfree(priv);
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int
+i2c_platform_suspend(struct platform_device *pdev, pm_message_t state)
+{
+	struct i2c_platform_data *priv = platform_get_drvdata(pdev);
+
+	dev_dbg(&pdev->dev, "i2c_platform_disable\n");
+	i2c_platform_disable(priv);
+
+	return 0;
+}
+
+static int
+i2c_platform_resume(struct platform_device *pdev)
+{
+	struct i2c_platform_data *priv = platform_get_drvdata(pdev);
+
+	dev_dbg(&pdev->dev, "i2c_platform_setup\n");
+	i2c_platform_setup(priv);
+
+	return 0;
+}
+#else
+#define i2c_platform_suspend	NULL
+#define i2c_platform_resume	NULL
+#endif
+
+static struct platform_driver i2c_platform_driver = {
+	.driver = {
+		.name	= "i2c_pic32",
+		.owner	= THIS_MODULE,
+	},
+	.probe		= i2c_platform_probe,
+	.remove		= __devexit_p(i2c_platform_remove),
+	.suspend	= i2c_platform_suspend,
+	.resume		= i2c_platform_resume,
+};
+
+static int __init
+i2c_platform_init(void)
+{
+	pr_debug("i2c_platform_init\n");
+	return platform_driver_register(&i2c_platform_driver);
+}
+
+static void __exit
+i2c_platform_exit(void)
+{
+	pr_debug("i2c_platform_exit\n");
+	platform_driver_unregister(&i2c_platform_driver);
+}
+
+MODULE_AUTHOR("Chris Dearman, MIPS Technologies INC.");
+MODULE_DESCRIPTION("PIC32 I2C driver");
+MODULE_LICENSE("GPL");
+
+module_init(i2c_platform_init);
+module_exit(i2c_platform_exit);
diff --git a/arch/mips/mti-sead3/sead3-platform.c b/arch/mips/mti-sead3/sead3-platform.c
new file mode 100644
index 00000000000..6c3b33dbed1
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-platform.c
@@ -0,0 +1,45 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/serial_8250.h>
+
+#define UART(base, int)							\
+{									\
+	.mapbase	= base,						\
+	.irq		= int,						\
+	.uartclk	= 14745600,					\
+	.iotype		= UPIO_MEM32,					\
+	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, \
+	.regshift	= 2,						\
+}
+
+static struct plat_serial8250_port uart8250_data[] = {
+	UART(0x1f000900, MIPS_CPU_IRQ_BASE + 4),   /* ttyS0 = USB   */
+	UART(0x1f000800, MIPS_CPU_IRQ_BASE + 4),   /* ttyS1 = RS232 */
+	{ },
+};
+
+static struct platform_device uart8250_device = {
+	.name			= "serial8250",
+	.id			= PLAT8250_DEV_PLATFORM2,
+	.dev			= {
+		.platform_data	= uart8250_data,
+	},
+};
+
+static int __init uart8250_init(void)
+{
+	return platform_device_register(&uart8250_device);
+}
+
+module_init(uart8250_init);
+
+MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("8250 UART probe driver for SEAD3");
diff --git a/arch/mips/mti-sead3/sead3-reset.c b/arch/mips/mti-sead3/sead3-reset.c
new file mode 100644
index 00000000000..20475c5e7b9
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-reset.c
@@ -0,0 +1,39 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/io.h>
+#include <linux/pm.h>
+
+#include <asm/reboot.h>
+#include <asm/mips-boards/generic.h>
+
+static void mips_machine_restart(char *command)
+{
+	unsigned int __iomem *softres_reg =
+		ioremap(SOFTRES_REG, sizeof(unsigned int));
+
+	__raw_writel(GORESET, softres_reg);
+}
+
+static void mips_machine_halt(void)
+{
+	unsigned int __iomem *softres_reg =
+		ioremap(SOFTRES_REG, sizeof(unsigned int));
+
+	__raw_writel(GORESET, softres_reg);
+}
+
+static int __init mips_reboot_setup(void)
+{
+	_machine_restart = mips_machine_restart;
+	_machine_halt = mips_machine_halt;
+	pm_power_off = mips_machine_halt;
+
+	return 0;
+}
+
+arch_initcall(mips_reboot_setup);
diff --git a/arch/mips/mti-sead3/sead3-serial.c b/arch/mips/mti-sead3/sead3-serial.c
new file mode 100644
index 00000000000..bc52705bbee
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-serial.c
@@ -0,0 +1,45 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/serial_8250.h>
+
+#define UART(base, int)							\
+{									\
+	.mapbase	= base,						\
+	.irq		= int,						\
+	.uartclk	= 14745600,					\
+	.iotype		= UPIO_MEM32,					\
+	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, \
+	.regshift	= 2,						\
+}
+
+static struct plat_serial8250_port uart8250_data[] = {
+	UART(0x1f000900, MIPS_CPU_IRQ_BASE + 4),   /* ttyS0 = USB   */
+	UART(0x1f000800, MIPS_CPU_IRQ_BASE + 4),   /* ttyS1 = RS232 */
+	{ },
+};
+
+static struct platform_device uart8250_device = {
+	.name			= "serial8250",
+	.id			= PLAT8250_DEV_PLATFORM,
+	.dev			= {
+		.platform_data	= uart8250_data,
+	},
+};
+
+static int __init uart8250_init(void)
+{
+	return platform_device_register(&uart8250_device);
+}
+
+module_init(uart8250_init);
+
+MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("8250 UART probe driver for the SEAD-3 platform");
diff --git a/arch/mips/mti-sead3/sead3-setup.c b/arch/mips/mti-sead3/sead3-setup.c
new file mode 100644
index 00000000000..8ad46ad31b4
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-setup.c
@@ -0,0 +1,20 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+
+int coherentio;		/* 0 => no DMA cache coherency (may be set by user) */
+int hw_coherentio;	/* 0 => no HW DMA cache coherency (reflects real HW) */
+
+const char *get_system_type(void)
+{
+	return "MIPS SEAD3";
+}
+
+void __init plat_mem_setup(void)
+{
+}
diff --git a/arch/mips/mti-sead3/sead3-time.c b/arch/mips/mti-sead3/sead3-time.c
new file mode 100644
index 00000000000..048e781a17a
--- /dev/null
+++ b/arch/mips/mti-sead3/sead3-time.c
@@ -0,0 +1,117 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
+ */
+#include <linux/init.h>
+
+#include <asm/setup.h>
+#include <asm/time.h>
+#include <asm/irq.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+
+unsigned long cpu_khz;
+
+static int mips_cpu_timer_irq;
+static int mips_cpu_perf_irq;
+
+static void mips_timer_dispatch(void)
+{
+	do_IRQ(mips_cpu_timer_irq);
+}
+
+static void mips_perf_dispatch(void)
+{
+	do_IRQ(mips_cpu_perf_irq);
+}
+
+static void __iomem *status_reg = (void __iomem *)0xbf000410;
+
+/*
+ * Estimate CPU frequency.  Sets mips_hpt_frequency as a side-effect.
+ */
+static unsigned int __init estimate_cpu_frequency(void)
+{
+	unsigned int prid = read_c0_prid() & 0xffff00;
+	unsigned int tick = 0;
+	unsigned int freq;
+	unsigned int orig;
+	unsigned long flags;
+
+	local_irq_save(flags);
+
+	orig = readl(status_reg) & 0x2;               /* get original sample */
+	/* wait for transition */
+	while ((readl(status_reg) & 0x2) == orig)
+		;
+	orig = orig ^ 0x2;                            /* flip the bit */
+
+	write_c0_count(0);
+
+	/* wait 1 second (the sampling clock transitions every 10ms) */
+	while (tick < 100) {
+		/* wait for transition */
+		while ((readl(status_reg) & 0x2) == orig)
+			;
+		orig = orig ^ 0x2;                            /* flip the bit */
+		tick++;
+	}
+
+	freq = read_c0_count();
+
+	local_irq_restore(flags);
+
+	mips_hpt_frequency = freq;
+
+	/* Adjust for processor */
+	if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
+		(prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
+		freq *= 2;
+
+	freq += 5000;        /* rounding */
+	freq -= freq%10000;
+
+	return freq ;
+}
+
+void read_persistent_clock(struct timespec *ts)
+{
+	ts->tv_sec = 0;
+	ts->tv_nsec = 0;
+}
+
+static void __init plat_perf_setup(void)
+{
+	if (cp0_perfcount_irq >= 0) {
+		if (cpu_has_vint)
+			set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
+		mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
+	}
+}
+
+unsigned int __cpuinit get_c0_compare_int(void)
+{
+	if (cpu_has_vint)
+		set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
+	mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
+	return mips_cpu_timer_irq;
+}
+
+void __init plat_time_init(void)
+{
+	unsigned int est_freq;
+
+	est_freq = estimate_cpu_frequency();
+
+	pr_debug("CPU frequency %d.%02d MHz\n", (est_freq / 1000000),
+		(est_freq % 1000000) * 100 / 1000000);
+
+	cpu_khz = est_freq / 1000;
+
+	mips_scroll_message();
+
+	plat_perf_setup();
+}
diff --git a/arch/mips/netlogic/Kconfig b/arch/mips/netlogic/Kconfig
index 75bec44b585..8059eb76f8e 100644
--- a/arch/mips/netlogic/Kconfig
+++ b/arch/mips/netlogic/Kconfig
@@ -1,2 +1,17 @@
+if NLM_XLP_BOARD || NLM_XLR_BOARD
+
+if NLM_XLP_BOARD
+config DT_XLP_EVP
+	bool "Built-in device tree for XLP EVP/SVP boards"
+	default y
+	help
+	  Add an FDT blob for XLP EVP and SVP boards into the kernel.
+	  This DTB will be used if the firmware does not pass in a DTB
+          pointer to the kernel.  The corresponding DTS file is at
+          arch/mips/netlogic/dts/xlp_evp.dts
+endif
+
 config NLM_COMMON
 	bool
+
+endif
diff --git a/arch/mips/netlogic/Makefile b/arch/mips/netlogic/Makefile
index 36d169b2ca6..7602d138661 100644
--- a/arch/mips/netlogic/Makefile
+++ b/arch/mips/netlogic/Makefile
@@ -1,3 +1,4 @@
 obj-$(CONFIG_NLM_COMMON)	+=	common/
 obj-$(CONFIG_CPU_XLR)		+=	xlr/
 obj-$(CONFIG_CPU_XLP)		+=	xlp/
+obj-$(CONFIG_CPU_XLP)		+=	dts/
diff --git a/arch/mips/netlogic/dts/Makefile b/arch/mips/netlogic/dts/Makefile
new file mode 100644
index 00000000000..67ae3fe296f
--- /dev/null
+++ b/arch/mips/netlogic/dts/Makefile
@@ -0,0 +1,4 @@
+obj-$(CONFIG_DT_XLP_EVP) := xlp_evp.dtb.o
+
+$(obj)/%.dtb: $(obj)/%.dts
+	$(call if_changed,dtc)
diff --git a/arch/mips/netlogic/dts/xlp_evp.dts b/arch/mips/netlogic/dts/xlp_evp.dts
new file mode 100644
index 00000000000..e14f4230806
--- /dev/null
+++ b/arch/mips/netlogic/dts/xlp_evp.dts
@@ -0,0 +1,124 @@
+/*
+ * XLP8XX Device Tree Source for EVP boards
+ */
+
+/dts-v1/;
+/ {
+	model = "netlogic,XLP-EVP";
+	compatible = "netlogic,xlp";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	memory {
+		device_type = "memory";
+		reg =  <0 0x00100000 0 0x0FF00000	// 255M at 1M
+			0 0x20000000 0 0xa0000000	// 2560M at 512M
+			0 0xe0000000 1 0x00000000>;
+	};
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		ranges = <0 0  0 0x18000000  0x04000000   // PCIe CFG
+			  1 0  0 0x16000000  0x01000000>; // GBU chipselects
+
+		serial0: serial@30000 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0 0x30100 0xa00>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <133333333>;
+			interrupt-parent = <&pic>;
+			interrupts = <17>;
+		};
+		serial1: serial@31000 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0 0x31100 0xa00>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <133333333>;
+			interrupt-parent = <&pic>;
+			interrupts = <18>;
+		};
+		i2c0: ocores@32000 {
+			compatible = "opencores,i2c-ocores";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0 0x32100 0xa00>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <32000000>;
+			interrupt-parent = <&pic>;
+			interrupts = <30>;
+		};
+		i2c1: ocores@33000 {
+			compatible = "opencores,i2c-ocores";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0 0x33100 0xa00>;
+			reg-shift = <2>;
+			reg-io-width = <4>;
+			clock-frequency = <32000000>;
+			interrupt-parent = <&pic>;
+			interrupts = <31>;
+
+			rtc@68 {
+				compatible = "dallas,ds1374";
+				reg = <0x68>;
+			};
+
+			dtt@4c {
+				compatible = "national,lm90";
+				reg = <0x4c>;
+			};
+		};
+		pic: pic@4000 {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <1>;
+			reg = <0 0x4000 0x200>;
+		};
+
+		nor_flash@1,0 {
+			compatible = "cfi-flash";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			bank-width = <2>;
+			reg = <1 0 0x1000000>;
+
+			partition@0 {
+				label = "x-loader";
+				reg = <0x0 0x100000>; /* 1M */
+				read-only;
+			};
+
+			partition@100000 {
+				label = "u-boot";
+				reg = <0x100000 0x100000>; /* 1M */
+			};
+
+			partition@200000 {
+				label = "kernel";
+				reg = <0x200000 0x500000>; /* 5M */
+			};
+
+			partition@700000 {
+				label = "rootfs";
+				reg = <0x700000 0x800000>; /* 8M */
+			};
+
+			partition@f00000 {
+				label = "env";
+				reg = <0xf00000 0x100000>; /* 1M */
+				read-only;
+			};
+		};
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
+	};
+};
diff --git a/arch/mips/netlogic/xlp/Makefile b/arch/mips/netlogic/xlp/Makefile
index 6b4b972218f..a84d6ed3746 100644
--- a/arch/mips/netlogic/xlp/Makefile
+++ b/arch/mips/netlogic/xlp/Makefile
@@ -1,4 +1,3 @@
-obj-y				+= setup.o platform.o nlm_hal.o
-obj-$(CONFIG_OF)		+= of.o
+obj-y				+= setup.o nlm_hal.o
 obj-$(CONFIG_SMP)		+= wakeup.o
 obj-$(CONFIG_USB)		+= usb-init.o
diff --git a/arch/mips/netlogic/xlp/of.c b/arch/mips/netlogic/xlp/of.c
deleted file mode 100644
index 8e3921c0c20..00000000000
--- a/arch/mips/netlogic/xlp/of.c
+++ /dev/null
@@ -1,34 +0,0 @@
-#include <linux/bootmem.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/of_fdt.h>
-#include <asm/byteorder.h>
-
-static int __init reserve_mem_mach(unsigned long addr, unsigned long size)
-{
-	return reserve_bootmem(addr, size, BOOTMEM_DEFAULT);
-}
-
-void __init free_mem_mach(unsigned long addr, unsigned long size)
-{
-	return free_bootmem(addr, size);
-}
-
-void __init device_tree_init(void)
-{
-	unsigned long base, size;
-
-	if (!initial_boot_params)
-		return;
-
-	base = virt_to_phys((void *)initial_boot_params);
-	size = be32_to_cpu(initial_boot_params->totalsize);
-
-	/* Before we do anything, lets reserve the dt blob */
-	reserve_mem_mach(base, size);
-
-	unflatten_device_tree();
-
-	/* free the space reserved for the dt blob */
-	free_mem_mach(base, size);
-}
diff --git a/arch/mips/netlogic/xlp/platform.c b/arch/mips/netlogic/xlp/platform.c
deleted file mode 100644
index 2c510d58544..00000000000
--- a/arch/mips/netlogic/xlp/platform.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
- * reserved.
- *
- * This software is available to you under a choice of one of two
- * licenses.  You may choose to be licensed under the terms of the GNU
- * General Public License (GPL) Version 2, available from the file
- * COPYING in the main directory of this source tree, or the NetLogic
- * license below:
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
- * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
- * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
- * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
- * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <linux/dma-mapping.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/serial.h>
-#include <linux/serial_8250.h>
-#include <linux/pci.h>
-#include <linux/serial_reg.h>
-#include <linux/spinlock.h>
-
-#include <asm/time.h>
-#include <asm/addrspace.h>
-#include <asm/netlogic/haldefs.h>
-#include <asm/netlogic/xlp-hal/iomap.h>
-#include <asm/netlogic/xlp-hal/xlp.h>
-#include <asm/netlogic/xlp-hal/pic.h>
-#include <asm/netlogic/xlp-hal/uart.h>
-
-static unsigned int nlm_xlp_uart_in(struct uart_port *p, int offset)
-{
-	return nlm_read_reg(p->iobase, offset);
-}
-
-static void nlm_xlp_uart_out(struct uart_port *p, int offset, int value)
-{
-	nlm_write_reg(p->iobase, offset, value);
-}
-
-#define PORT(_irq)					\
-	{						\
-		.irq		= _irq,			\
-		.regshift	= 2,			\
-		.iotype		= UPIO_MEM32,		\
-		.flags		= (UPF_SKIP_TEST|UPF_FIXED_TYPE|\
-					UPF_BOOT_AUTOCONF),	\
-		.uartclk	= XLP_IO_CLK,		\
-		.type		= PORT_16550A,		\
-		.serial_in	= nlm_xlp_uart_in,	\
-		.serial_out	= nlm_xlp_uart_out,	\
-	}
-
-static struct plat_serial8250_port xlp_uart_data[] = {
-	PORT(PIC_UART_0_IRQ),
-	PORT(PIC_UART_1_IRQ),
-	{},
-};
-
-static struct platform_device uart_device = {
-	.name		= "serial8250",
-	.id		= PLAT8250_DEV_PLATFORM,
-	.dev = {
-		.platform_data = xlp_uart_data,
-	},
-};
-
-static int __init nlm_platform_uart_init(void)
-{
-	unsigned long mmio;
-
-	mmio = (unsigned long)nlm_get_uart_regbase(0, 0);
-	xlp_uart_data[0].iobase = mmio;
-	xlp_uart_data[0].membase = (void __iomem *)mmio;
-	xlp_uart_data[0].mapbase = mmio;
-
-	mmio = (unsigned long)nlm_get_uart_regbase(0, 1);
-	xlp_uart_data[1].iobase = mmio;
-	xlp_uart_data[1].membase = (void __iomem *)mmio;
-	xlp_uart_data[1].mapbase = mmio;
-
-	return platform_device_register(&uart_device);
-}
-
-arch_initcall(nlm_platform_uart_init);
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c
index 3dec9f28b65..d8997098def 100644
--- a/arch/mips/netlogic/xlp/setup.c
+++ b/arch/mips/netlogic/xlp/setup.c
@@ -35,6 +35,7 @@
 #include <linux/kernel.h>
 #include <linux/serial_8250.h>
 #include <linux/pm.h>
+#include <linux/bootmem.h>
 
 #include <asm/reboot.h>
 #include <asm/time.h>
@@ -56,6 +57,7 @@ unsigned long nlm_common_ebase = 0x0;
 /* default to uniprocessor */
 uint32_t nlm_coremask = 1, nlm_cpumask  = 1;
 int  nlm_threads_per_core = 1;
+extern u32 __dtb_start[];
 
 static void nlm_linux_exit(void)
 {
@@ -96,9 +98,18 @@ void __init prom_init(void)
 {
 	void *fdtp;
 
-	fdtp = (void *)(long)fw_arg0;
 	xlp_mmu_init();
 	nlm_hal_init();
+
+	/*
+	 * If no FDT pointer is passed in, use the built-in FDT.
+	 * device_tree_init() does not handle CKSEG0 pointers in
+	 * 64-bit, so convert pointer.
+	 */
+	fdtp = (void *)(long)fw_arg0;
+	if (!fdtp)
+		fdtp = __dtb_start;
+	fdtp = phys_to_virt(__pa(fdtp));
 	early_init_devtree(fdtp);
 
 	nlm_common_ebase = read_c0_ebase() & (~((1 << 12) - 1));
@@ -112,6 +123,25 @@ void __init prom_init(void)
 #endif
 }
 
+void __init device_tree_init(void)
+{
+	unsigned long base, size;
+
+	if (!initial_boot_params)
+		return;
+
+	base = virt_to_phys((void *)initial_boot_params);
+	size = be32_to_cpu(initial_boot_params->totalsize);
+
+	/* Before we do anything, lets reserve the dt blob */
+	reserve_bootmem(base, size, BOOTMEM_DEFAULT);
+
+	unflatten_device_tree();
+
+	/* free the space reserved for the dt blob */
+	free_bootmem(base, size);
+}
+
 static struct of_device_id __initdata xlp_ids[] = {
 	{ .compatible = "simple-bus", },
 	{},
diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c
index 819622f93e9..9a1a2244522 100644
--- a/arch/mips/pci/fixup-malta.c
+++ b/arch/mips/pci/fixup-malta.c
@@ -8,7 +8,8 @@
 #define PCID		4
 
 /* This table is filled in by interrogating the PIIX4 chip */
-static char pci_irq[5] __initdata;
+static char pci_irq[5] __devinitdata = {
+};
 
 static char irq_tab[][5] __initdata = {
 	/*      INTA    INTB    INTC    INTD */
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index b2d4f492d78..9cb9d43a3a0 100644
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -118,26 +118,6 @@ static struct resource sc26xx_rsrc[] = {
 	}
 };
 
-static unsigned int sc26xx_data[2] = {
-	/* DTR   |   RTS    |   DSR    |   CTS     |   DCD     |   RI    */
-	(8 << 0) | (4 << 4) | (6 << 8) | (0 << 12) | (6 << 16) | (0 << 20),
-	(3 << 0) | (2 << 4) | (1 << 8) | (2 << 12) | (3 << 16) | (4 << 20)
-};
-
-static struct platform_device sc26xx_pdev = {
-	.name           = "SC26xx",
-	.num_resources  = ARRAY_SIZE(sc26xx_rsrc),
-	.resource       = sc26xx_rsrc,
-	.dev			= {
-		.platform_data	= sc26xx_data,
-	}
-};
-
-#warning "Please try migrate to use new driver SCCNXP and report the status" \
-	 "in the linux-serial mailing list."
-
-/* The code bellow is a replacement of SC26XX to SCCNXP */
-#if 0
 #include <linux/platform_data/sccnxp.h>
 
 static struct sccnxp_pdata sccnxp_data = {
@@ -155,15 +135,14 @@ static struct sccnxp_pdata sccnxp_data = {
 			  MCTRL_SIG(RNG_IP, LINE_IP3),
 };
 
-static struct platform_device sc2681_pdev = {
+static struct platform_device sc26xx_pdev = {
 	.name		= "sc2681",
-	.resource	= sc2xxx_rsrc,
-	.num_resources	= ARRAY_SIZE(sc2xxx_rsrc),
+	.resource	= sc26xx_rsrc,
+	.num_resources	= ARRAY_SIZE(sc26xx_rsrc),
 	.dev	= {
 		.platform_data	= &sccnxp_data,
 	},
 };
-#endif
 
 static u32 a20r_ack_hwint(void)
 {
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 5cfb086b390..04669fac117 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -8,6 +8,8 @@ config MN10300
 	select HAVE_ARCH_KGDB
 	select HAVE_NMI_WATCHDOG if MN10300_WD_TIMER
 	select GENERIC_CLOCKEVENTS
+	select GENERIC_KERNEL_THREAD
+	select MODULES_USE_ELF_RELA
 
 config AM33_2
 	def_bool n
diff --git a/arch/mn10300/include/asm/Kbuild b/arch/mn10300/include/asm/Kbuild
index c68e1680da0..4a159da2363 100644
--- a/arch/mn10300/include/asm/Kbuild
+++ b/arch/mn10300/include/asm/Kbuild
@@ -1 +1,3 @@
-include include/asm-generic/Kbuild.asm
+
+generic-y += clkdev.h
+generic-y += exec.h
diff --git a/arch/mn10300/include/asm/frame.inc b/arch/mn10300/include/asm/frame.inc
index 2ee58e3eb6b..1c3eb4fda95 100644
--- a/arch/mn10300/include/asm/frame.inc
+++ b/arch/mn10300/include/asm/frame.inc
@@ -61,7 +61,7 @@
 ###############################################################################
 .macro RESTORE_ALL
 	# peel back the stack to the calling frame
-	# - this permits execve() to discard extra frames due to kernel syscalls
+	# - we need that when returning from interrupts to kernel mode
 	GET_THREAD_INFO a0
 	mov	(TI_frame,a0),fp
 	mov	fp,sp
diff --git a/arch/mn10300/include/asm/module.h b/arch/mn10300/include/asm/module.h
index 5d7057d0149..6571103b051 100644
--- a/arch/mn10300/include/asm/module.h
+++ b/arch/mn10300/include/asm/module.h
@@ -12,12 +12,7 @@
 #ifndef _ASM_MODULE_H
 #define _ASM_MODULE_H
 
-struct mod_arch_specific {
-};
-
-#define Elf_Shdr	Elf32_Shdr
-#define Elf_Sym		Elf32_Sym
-#define Elf_Ehdr	Elf32_Ehdr
+#include <asm-generic/module.h>
 
 /*
  * Include the MN10300 architecture version.
diff --git a/arch/mn10300/include/asm/processor.h b/arch/mn10300/include/asm/processor.h
index 247928c9f54..8b80b19d0c8 100644
--- a/arch/mn10300/include/asm/processor.h
+++ b/arch/mn10300/include/asm/processor.h
@@ -119,20 +119,13 @@ struct thread_struct {
 
 /*
  * do necessary setup to start up a newly executed thread
- * - need to discard the frame stacked by the kernel thread invoking the execve
- *   syscall (see RESTORE_ALL macro)
  */
 static inline void start_thread(struct pt_regs *regs,
 				unsigned long new_pc, unsigned long new_sp)
 {
-	struct thread_info *ti = current_thread_info();
-	struct pt_regs *frame0;
-
-	frame0 = thread_info_to_uregs(ti);
-	frame0->epsw = EPSW_nSL | EPSW_IE | EPSW_IM;
-	frame0->pc = new_pc;
-	frame0->sp = new_sp;
-	ti->frame = frame0;
+	regs->epsw = EPSW_nSL | EPSW_IE | EPSW_IM;
+	regs->pc = new_pc;
+	regs->sp = new_sp;
 }
 
 
@@ -140,11 +133,6 @@ static inline void start_thread(struct pt_regs *regs,
 extern void release_thread(struct task_struct *);
 
 /*
- * create a kernel thread without removing it from tasklists
- */
-extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
-
-/*
  * Return saved PC of a blocked thread.
  */
 extern unsigned long thread_saved_pc(struct task_struct *tsk);
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
index 44251b974f1..838a3830010 100644
--- a/arch/mn10300/include/asm/ptrace.h
+++ b/arch/mn10300/include/asm/ptrace.h
@@ -11,85 +11,16 @@
 #ifndef _ASM_PTRACE_H
 #define _ASM_PTRACE_H
 
-#define PT_A3		0
-#define PT_A2		1
-#define PT_D3		2
-#define	PT_D2		3
-#define PT_MCVF		4
-#define	PT_MCRL		5
-#define PT_MCRH		6
-#define	PT_MDRQ		7
-#define	PT_E1		8
-#define	PT_E0		9
-#define	PT_E7		10
-#define	PT_E6		11
-#define	PT_E5		12
-#define	PT_E4		13
-#define	PT_E3		14
-#define	PT_E2		15
-#define	PT_SP		16
-#define	PT_LAR		17
-#define	PT_LIR		18
-#define	PT_MDR		19
-#define	PT_A1		20
-#define	PT_A0		21
-#define	PT_D1		22
-#define	PT_D0		23
-#define PT_ORIG_D0	24
-#define	PT_EPSW		25
-#define	PT_PC		26
-#define NR_PTREGS	27
+#include <uapi/asm/ptrace.h>
 
-/*
- * This defines the way registers are stored in the event of an exception
- * - the strange order is due to the MOVM instruction
- */
-struct pt_regs {
-	unsigned long		a3;		/* syscall arg 3 */
-	unsigned long		a2;		/* syscall arg 4 */
-	unsigned long		d3;		/* syscall arg 5 */
-	unsigned long		d2;		/* syscall arg 6 */
-	unsigned long		mcvf;
-	unsigned long		mcrl;
-	unsigned long		mcrh;
-	unsigned long		mdrq;
-	unsigned long		e1;
-	unsigned long		e0;
-	unsigned long		e7;
-	unsigned long		e6;
-	unsigned long		e5;
-	unsigned long		e4;
-	unsigned long		e3;
-	unsigned long		e2;
-	unsigned long		sp;
-	unsigned long		lar;
-	unsigned long		lir;
-	unsigned long		mdr;
-	unsigned long		a1;
-	unsigned long		a0;		/* syscall arg 1 */
-	unsigned long		d1;		/* syscall arg 2 */
-	unsigned long		d0;		/* syscall ret */
-	struct pt_regs		*next;		/* next frame pointer */
-	unsigned long		orig_d0;	/* syscall number */
-	unsigned long		epsw;
-	unsigned long		pc;
-};
-
-/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-#define PTRACE_GETFPREGS          14
-#define PTRACE_SETFPREGS          15
-
-#ifdef __KERNEL__
 
 #define user_mode(regs)			(((regs)->epsw & EPSW_nSL) == EPSW_nSL)
 #define instruction_pointer(regs)	((regs)->pc)
 #define user_stack_pointer(regs)	((regs)->sp)
+#define current_pt_regs()		current_frame()
 
 #define arch_has_single_step()	(1)
 
 #define profile_pc(regs) ((regs)->pc)
 
-#endif /* __KERNEL__  */
 #endif /* _ASM_PTRACE_H */
diff --git a/arch/mn10300/include/asm/setup.h b/arch/mn10300/include/asm/setup.h
index c229d1e3f99..fb024555d2a 100644
--- a/arch/mn10300/include/asm/setup.h
+++ b/arch/mn10300/include/asm/setup.h
@@ -11,8 +11,8 @@
 #ifndef _ASM_SETUP_H
 #define _ASM_SETUP_H
 
-#ifdef __KERNEL__
+#include <uapi/asm/setup.h>
+
 extern void __init unit_setup(void);
 extern void __init unit_init_IRQ(void);
-#endif
 #endif /* _ASM_SETUP_H */
diff --git a/arch/mn10300/include/asm/signal.h b/arch/mn10300/include/asm/signal.h
index 1865d72a86f..f9668ec3040 100644
--- a/arch/mn10300/include/asm/signal.h
+++ b/arch/mn10300/include/asm/signal.h
@@ -11,12 +11,8 @@
 #ifndef _ASM_SIGNAL_H
 #define _ASM_SIGNAL_H
 
-#include <linux/types.h>
+#include <uapi/asm/signal.h>
 
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-
-#ifdef __KERNEL__
 /* Most things should be clean enough to redefine this at will, if care
    is taken to make libc match.  */
 
@@ -30,94 +26,6 @@ typedef struct {
 	unsigned long	sig[_NSIG_WORDS];
 } sigset_t;
 
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-#define NSIG		32
-typedef unsigned long sigset_t;
-
-#endif /* __KERNEL__ */
-
-#define SIGHUP		 1
-#define SIGINT		 2
-#define SIGQUIT		 3
-#define SIGILL		 4
-#define SIGTRAP		 5
-#define SIGABRT		 6
-#define SIGIOT		 6
-#define SIGBUS		 7
-#define SIGFPE		 8
-#define SIGKILL		 9
-#define SIGUSR1		10
-#define SIGSEGV		11
-#define SIGUSR2		12
-#define SIGPIPE		13
-#define SIGALRM		14
-#define SIGTERM		15
-#define SIGSTKFLT	16
-#define SIGCHLD		17
-#define SIGCONT		18
-#define SIGSTOP		19
-#define SIGTSTP		20
-#define SIGTTIN		21
-#define SIGTTOU		22
-#define SIGURG		23
-#define SIGXCPU		24
-#define SIGXFSZ		25
-#define SIGVTALRM	26
-#define SIGPROF		27
-#define SIGWINCH	28
-#define SIGIO		29
-#define SIGPOLL		SIGIO
-/*
-#define SIGLOST		29
-*/
-#define SIGPWR		30
-#define SIGSYS		31
-#define	SIGUNUSED	31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN	32
-#define SIGRTMAX	_NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP	0x00000001U
-#define SA_NOCLDWAIT	0x00000002U
-#define SA_SIGINFO	0x00000004U
-#define SA_ONSTACK	0x08000000U
-#define SA_RESTART	0x10000000U
-#define SA_NODEFER	0x40000000U
-#define SA_RESETHAND	0x80000000U
-
-#define SA_NOMASK	SA_NODEFER
-#define SA_ONESHOT	SA_RESETHAND
-
-#define SA_RESTORER	0x04000000
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK	1
-#define SS_DISABLE	2
-
-#define MINSIGSTKSZ	2048
-#define SIGSTKSZ	8192
-
-#include <asm-generic/signal-defs.h>
-
-#ifdef __KERNEL__
 struct old_sigaction {
 	__sighandler_t sa_handler;
 	old_sigset_t sa_mask;
@@ -135,37 +43,10 @@ struct sigaction {
 struct k_sigaction {
 	struct sigaction sa;
 };
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-struct sigaction {
-	union {
-	  __sighandler_t _sa_handler;
-	  void (*_sa_sigaction)(int, struct siginfo *, void *);
-	} _u;
-	sigset_t sa_mask;
-	unsigned long sa_flags;
-	void (*sa_restorer)(void);
-};
-
-#define sa_handler	_u._sa_handler
-#define sa_sigaction	_u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
-typedef struct sigaltstack {
-	void __user	*ss_sp;
-	int		ss_flags;
-	size_t		ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
 #include <asm/sigcontext.h>
 
 
 struct pt_regs;
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_SIGNAL_H */
diff --git a/arch/mn10300/include/asm/termios.h b/arch/mn10300/include/asm/termios.h
index dd7cf617e11..c2e29c75dfa 100644
--- a/arch/mn10300/include/asm/termios.h
+++ b/arch/mn10300/include/asm/termios.h
@@ -1,27 +1,8 @@
 #ifndef _ASM_TERMIOS_H
 #define _ASM_TERMIOS_H
 
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
+#include <uapi/asm/termios.h>
 
-struct winsize {
-	unsigned short ws_row;
-	unsigned short ws_col;
-	unsigned short ws_xpixel;
-	unsigned short ws_ypixel;
-};
-
-#define NCC 8
-struct termio {
-	unsigned short c_iflag;		/* input mode flags */
-	unsigned short c_oflag;		/* output mode flags */
-	unsigned short c_cflag;		/* control mode flags */
-	unsigned short c_lflag;		/* local mode flags */
-	unsigned char c_line;		/* line discipline */
-	unsigned char c_cc[NCC];	/* control characters */
-};
-
-#ifdef __KERNEL__
 /*	intr=^C		quit=^|		erase=del	kill=^U
 	eof=^D		vtime=\0	vmin=\1		sxtc=\0
 	start=^Q	stop=^S		susp=^Z		eol=\0
@@ -29,64 +10,4 @@ struct termio {
 	eol2=\0
 */
 #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
-#endif
-
-/* modem lines */
-#define TIOCM_LE	0x001
-#define TIOCM_DTR	0x002
-#define TIOCM_RTS	0x004
-#define TIOCM_ST	0x008
-#define TIOCM_SR	0x010
-#define TIOCM_CTS	0x020
-#define TIOCM_CAR	0x040
-#define TIOCM_RNG	0x080
-#define TIOCM_DSR	0x100
-#define TIOCM_CD	TIOCM_CAR
-#define TIOCM_RI	TIOCM_RNG
-#define TIOCM_OUT1	0x2000
-#define TIOCM_OUT2	0x4000
-#define TIOCM_LOOP	0x8000
-
-#define TIOCM_MODEM_BITS       TIOCM_OUT2      /* IRDA support */
-
-/*
- * Translate a "termio" structure into a "termios". Ugh.
- */
-#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
-	unsigned short __tmp; \
-	get_user(__tmp, &(termio)->x); \
-	*(unsigned short *) &(termios)->x = __tmp; \
-}
-
-#define user_termio_to_kernel_termios(termios, termio) \
-({ \
-	SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
-	SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
-	SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
-	SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
-	copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
-})
-
-/*
- * Translate a "termios" structure into a "termio". Ugh.
- */
-#define kernel_termios_to_user_termio(termio, termios) \
-({ \
-	put_user((termios)->c_iflag, &(termio)->c_iflag); \
-	put_user((termios)->c_oflag, &(termio)->c_oflag); \
-	put_user((termios)->c_cflag, &(termio)->c_cflag); \
-	put_user((termios)->c_lflag, &(termio)->c_lflag); \
-	put_user((termios)->c_line,  &(termio)->c_line); \
-	copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
-})
-
-#define user_termios_to_kernel_termios(k, u) \
-	copy_from_user(k, u, sizeof(struct termios2))
-#define kernel_termios_to_user_termios(u, k) \
-	copy_to_user(u, k, sizeof(struct termios2))
-#define user_termios_to_kernel_termios_1(k, u) \
-	copy_from_user(k, u, sizeof(struct termios))
-#define kernel_termios_to_user_termios_1(u, k) \
-	copy_to_user(u, k, sizeof(struct termios))
-
 #endif	/* _ASM_TERMIOS_H */
diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h
index ac519bbd42f..f90062b0622 100644
--- a/arch/mn10300/include/asm/thread_info.h
+++ b/arch/mn10300/include/asm/thread_info.h
@@ -160,12 +160,13 @@ void arch_release_thread_info(struct thread_info *ti);
 #define _TIF_SIGPENDING		+(1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	+(1 << TIF_NEED_RESCHED)
 #define _TIF_SINGLESTEP		+(1 << TIF_SINGLESTEP)
-#define _TIF_RESTORE_SIGMASK	+(1 << TIF_RESTORE_SIGMASK)
 #define _TIF_POLLING_NRFLAG	+(1 << TIF_POLLING_NRFLAG)
 
 #define _TIF_WORK_MASK		0x0000FFFE	/* work to do on interrupt/exception return */
 #define _TIF_ALLWORK_MASK	0x0000FFFF	/* work to do on any return to u-space */
 
+#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
+
 #endif /* __KERNEL__ */
 
 #endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/mn10300/include/asm/types.h b/arch/mn10300/include/asm/types.h
index 713d4ba108a..3d6e48311be 100644
--- a/arch/mn10300/include/asm/types.h
+++ b/arch/mn10300/include/asm/types.h
@@ -11,15 +11,12 @@
 #ifndef _ASM_TYPES_H
 #define _ASM_TYPES_H
 
-#include <asm-generic/int-ll64.h>
+#include <uapi/asm/types.h>
 
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
-#ifdef __KERNEL__
 
 #define BITS_PER_LONG 32
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_TYPES_H */
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
index 866eb14749d..55bbec1887e 100644
--- a/arch/mn10300/include/asm/unistd.h
+++ b/arch/mn10300/include/asm/unistd.h
@@ -11,347 +11,8 @@
 #ifndef _ASM_UNISTD_H
 #define _ASM_UNISTD_H
 
-#define __NR_restart_syscall      0
-#define __NR_exit		  1
-#define __NR_fork		  2
-#define __NR_read		  3
-#define __NR_write		  4
-#define __NR_open		  5
-#define __NR_close		  6
-#define __NR_waitpid		  7
-#define __NR_creat		  8
-#define __NR_link		  9
-#define __NR_unlink		 10
-#define __NR_execve		 11
-#define __NR_chdir		 12
-#define __NR_time		 13
-#define __NR_mknod		 14
-#define __NR_chmod		 15
-#define __NR_lchown		 16
-#define __NR_break		 17
-#define __NR_oldstat		 18
-#define __NR_lseek		 19
-#define __NR_getpid		 20
-#define __NR_mount		 21
-#define __NR_umount		 22
-#define __NR_setuid		 23
-#define __NR_getuid		 24
-#define __NR_stime		 25
-#define __NR_ptrace		 26
-#define __NR_alarm		 27
-#define __NR_oldfstat		 28
-#define __NR_pause		 29
-#define __NR_utime		 30
-#define __NR_stty		 31
-#define __NR_gtty		 32
-#define __NR_access		 33
-#define __NR_nice		 34
-#define __NR_ftime		 35
-#define __NR_sync		 36
-#define __NR_kill		 37
-#define __NR_rename		 38
-#define __NR_mkdir		 39
-#define __NR_rmdir		 40
-#define __NR_dup		 41
-#define __NR_pipe		 42
-#define __NR_times		 43
-#define __NR_prof		 44
-#define __NR_brk		 45
-#define __NR_setgid		 46
-#define __NR_getgid		 47
-#define __NR_signal		 48
-#define __NR_geteuid		 49
-#define __NR_getegid		 50
-#define __NR_acct		 51
-#define __NR_umount2		 52
-#define __NR_lock		 53
-#define __NR_ioctl		 54
-#define __NR_fcntl		 55
-#define __NR_mpx		 56
-#define __NR_setpgid		 57
-#define __NR_ulimit		 58
-#define __NR_oldolduname	 59
-#define __NR_umask		 60
-#define __NR_chroot		 61
-#define __NR_ustat		 62
-#define __NR_dup2		 63
-#define __NR_getppid		 64
-#define __NR_getpgrp		 65
-#define __NR_setsid		 66
-#define __NR_sigaction		 67
-#define __NR_sgetmask		 68
-#define __NR_ssetmask		 69
-#define __NR_setreuid		 70
-#define __NR_setregid		 71
-#define __NR_sigsuspend		 72
-#define __NR_sigpending		 73
-#define __NR_sethostname	 74
-#define __NR_setrlimit		 75
-#define __NR_getrlimit		 76	/* Back compatible 2Gig limited rlimit */
-#define __NR_getrusage		 77
-#define __NR_gettimeofday	 78
-#define __NR_settimeofday	 79
-#define __NR_getgroups		 80
-#define __NR_setgroups		 81
-#define __NR_select		 82
-#define __NR_symlink		 83
-#define __NR_oldlstat		 84
-#define __NR_readlink		 85
-#define __NR_uselib		 86
-#define __NR_swapon		 87
-#define __NR_reboot		 88
-#define __NR_readdir		 89
-#define __NR_mmap		 90
-#define __NR_munmap		 91
-#define __NR_truncate		 92
-#define __NR_ftruncate		 93
-#define __NR_fchmod		 94
-#define __NR_fchown		 95
-#define __NR_getpriority	 96
-#define __NR_setpriority	 97
-#define __NR_profil		 98
-#define __NR_statfs		 99
-#define __NR_fstatfs		100
-#define __NR_ioperm		101
-#define __NR_socketcall		102
-#define __NR_syslog		103
-#define __NR_setitimer		104
-#define __NR_getitimer		105
-#define __NR_stat		106
-#define __NR_lstat		107
-#define __NR_fstat		108
-#define __NR_olduname		109
-#define __NR_iopl		110
-#define __NR_vhangup		111
-#define __NR_idle		112
-#define __NR_vm86old		113
-#define __NR_wait4		114
-#define __NR_swapoff		115
-#define __NR_sysinfo		116
-#define __NR_ipc		117
-#define __NR_fsync		118
-#define __NR_sigreturn		119
-#define __NR_clone		120
-#define __NR_setdomainname	121
-#define __NR_uname		122
-#define __NR_modify_ldt		123
-#define __NR_adjtimex		124
-#define __NR_mprotect		125
-#define __NR_sigprocmask	126
-#define __NR_create_module	127
-#define __NR_init_module	128
-#define __NR_delete_module	129
-#define __NR_get_kernel_syms	130
-#define __NR_quotactl		131
-#define __NR_getpgid		132
-#define __NR_fchdir		133
-#define __NR_bdflush		134
-#define __NR_sysfs		135
-#define __NR_personality	136
-#define __NR_afs_syscall	137 /* Syscall for Andrew File System */
-#define __NR_setfsuid		138
-#define __NR_setfsgid		139
-#define __NR__llseek		140
-#define __NR_getdents		141
-#define __NR__newselect		142
-#define __NR_flock		143
-#define __NR_msync		144
-#define __NR_readv		145
-#define __NR_writev		146
-#define __NR_getsid		147
-#define __NR_fdatasync		148
-#define __NR__sysctl		149
-#define __NR_mlock		150
-#define __NR_munlock		151
-#define __NR_mlockall		152
-#define __NR_munlockall		153
-#define __NR_sched_setparam		154
-#define __NR_sched_getparam		155
-#define __NR_sched_setscheduler		156
-#define __NR_sched_getscheduler		157
-#define __NR_sched_yield		158
-#define __NR_sched_get_priority_max	159
-#define __NR_sched_get_priority_min	160
-#define __NR_sched_rr_get_interval	161
-#define __NR_nanosleep		162
-#define __NR_mremap		163
-#define __NR_setresuid		164
-#define __NR_getresuid		165
-#define __NR_vm86		166
-#define __NR_query_module	167
-#define __NR_poll		168
-#define __NR_nfsservctl		169
-#define __NR_setresgid		170
-#define __NR_getresgid		171
-#define __NR_prctl              172
-#define __NR_rt_sigreturn	173
-#define __NR_rt_sigaction	174
-#define __NR_rt_sigprocmask	175
-#define __NR_rt_sigpending	176
-#define __NR_rt_sigtimedwait	177
-#define __NR_rt_sigqueueinfo	178
-#define __NR_rt_sigsuspend	179
-#define __NR_pread64		180
-#define __NR_pwrite64		181
-#define __NR_chown		182
-#define __NR_getcwd		183
-#define __NR_capget		184
-#define __NR_capset		185
-#define __NR_sigaltstack	186
-#define __NR_sendfile		187
-#define __NR_getpmsg		188	/* some people actually want streams */
-#define __NR_putpmsg		189	/* some people actually want streams */
-#define __NR_vfork		190
-#define __NR_ugetrlimit		191	/* SuS compliant getrlimit */
-#define __NR_mmap2		192
-#define __NR_truncate64		193
-#define __NR_ftruncate64	194
-#define __NR_stat64		195
-#define __NR_lstat64		196
-#define __NR_fstat64		197
-#define __NR_lchown32		198
-#define __NR_getuid32		199
-#define __NR_getgid32		200
-#define __NR_geteuid32		201
-#define __NR_getegid32		202
-#define __NR_setreuid32		203
-#define __NR_setregid32		204
-#define __NR_getgroups32	205
-#define __NR_setgroups32	206
-#define __NR_fchown32		207
-#define __NR_setresuid32	208
-#define __NR_getresuid32	209
-#define __NR_setresgid32	210
-#define __NR_getresgid32	211
-#define __NR_chown32		212
-#define __NR_setuid32		213
-#define __NR_setgid32		214
-#define __NR_setfsuid32		215
-#define __NR_setfsgid32		216
-#define __NR_pivot_root		217
-#define __NR_mincore		218
-#define __NR_madvise		219
-#define __NR_madvise1		219	/* delete when C lib stub is removed */
-#define __NR_getdents64		220
-#define __NR_fcntl64		221
-/* 223 is unused */
-#define __NR_gettid		224
-#define __NR_readahead		225
-#define __NR_setxattr		226
-#define __NR_lsetxattr		227
-#define __NR_fsetxattr		228
-#define __NR_getxattr		229
-#define __NR_lgetxattr		230
-#define __NR_fgetxattr		231
-#define __NR_listxattr		232
-#define __NR_llistxattr		233
-#define __NR_flistxattr		234
-#define __NR_removexattr	235
-#define __NR_lremovexattr	236
-#define __NR_fremovexattr	237
-#define __NR_tkill		238
-#define __NR_sendfile64		239
-#define __NR_futex		240
-#define __NR_sched_setaffinity	241
-#define __NR_sched_getaffinity	242
-#define __NR_set_thread_area	243
-#define __NR_get_thread_area	244
-#define __NR_io_setup		245
-#define __NR_io_destroy		246
-#define __NR_io_getevents	247
-#define __NR_io_submit		248
-#define __NR_io_cancel		249
-#define __NR_fadvise64		250
+#include <uapi/asm/unistd.h>
 
-#define __NR_exit_group		252
-#define __NR_lookup_dcookie	253
-#define __NR_epoll_create	254
-#define __NR_epoll_ctl		255
-#define __NR_epoll_wait		256
-#define __NR_remap_file_pages	257
-#define __NR_set_tid_address	258
-#define __NR_timer_create	259
-#define __NR_timer_settime	(__NR_timer_create+1)
-#define __NR_timer_gettime	(__NR_timer_create+2)
-#define __NR_timer_getoverrun	(__NR_timer_create+3)
-#define __NR_timer_delete	(__NR_timer_create+4)
-#define __NR_clock_settime	(__NR_timer_create+5)
-#define __NR_clock_gettime	(__NR_timer_create+6)
-#define __NR_clock_getres	(__NR_timer_create+7)
-#define __NR_clock_nanosleep	(__NR_timer_create+8)
-#define __NR_statfs64		268
-#define __NR_fstatfs64		269
-#define __NR_tgkill		270
-#define __NR_utimes		271
-#define __NR_fadvise64_64	272
-#define __NR_vserver		273
-#define __NR_mbind		274
-#define __NR_get_mempolicy	275
-#define __NR_set_mempolicy	276
-#define __NR_mq_open 		277
-#define __NR_mq_unlink		(__NR_mq_open+1)
-#define __NR_mq_timedsend	(__NR_mq_open+2)
-#define __NR_mq_timedreceive	(__NR_mq_open+3)
-#define __NR_mq_notify		(__NR_mq_open+4)
-#define __NR_mq_getsetattr	(__NR_mq_open+5)
-#define __NR_kexec_load		283
-#define __NR_waitid		284
-#define __NR_add_key		286
-#define __NR_request_key	287
-#define __NR_keyctl		288
-#define __NR_cacheflush		289
-#define __NR_ioprio_set		290
-#define __NR_ioprio_get		291
-#define __NR_inotify_init	292
-#define __NR_inotify_add_watch	293
-#define __NR_inotify_rm_watch	294
-#define __NR_migrate_pages	295
-#define __NR_openat		296
-#define __NR_mkdirat		297
-#define __NR_mknodat		298
-#define __NR_fchownat		299
-#define __NR_futimesat		300
-#define __NR_fstatat64		301
-#define __NR_unlinkat		302
-#define __NR_renameat		303
-#define __NR_linkat		304
-#define __NR_symlinkat		305
-#define __NR_readlinkat		306
-#define __NR_fchmodat		307
-#define __NR_faccessat		308
-#define __NR_pselect6		309
-#define __NR_ppoll		310
-#define __NR_unshare		311
-#define __NR_set_robust_list	312
-#define __NR_get_robust_list	313
-#define __NR_splice		314
-#define __NR_sync_file_range	315
-#define __NR_tee		316
-#define __NR_vmsplice		317
-#define __NR_move_pages		318
-#define __NR_getcpu		319
-#define __NR_epoll_pwait	320
-#define __NR_utimensat		321
-#define __NR_signalfd		322
-#define __NR_timerfd_create	323
-#define __NR_eventfd		324
-#define __NR_fallocate		325
-#define __NR_timerfd_settime	326
-#define __NR_timerfd_gettime	327
-#define __NR_signalfd4		328
-#define __NR_eventfd2		329
-#define __NR_epoll_create1	330
-#define __NR_dup3		331
-#define __NR_pipe2		332
-#define __NR_inotify_init1	333
-#define __NR_preadv		334
-#define __NR_pwritev		335
-#define __NR_rt_tgsigqueueinfo	336
-#define __NR_perf_event_open	337
-#define __NR_recvmmsg		338
-#define __NR_setns		339
-
-#ifdef __KERNEL__
 
 #define NR_syscalls 340
 
@@ -382,6 +43,8 @@
 #define __ARCH_WANT_SYS_SIGPROCMASK
 #define __ARCH_WANT_SYS_RT_SIGACTION
 #define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_SYS_EXECVE
+#define __ARCH_WANT_KERNEL_EXECVE
 
 /*
  * "Conditional" syscalls
@@ -393,5 +56,4 @@
 #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
 #endif
 
-#endif /* __KERNEL__ */
 #endif /* _ASM_UNISTD_H */
diff --git a/arch/mn10300/include/uapi/asm/Kbuild b/arch/mn10300/include/uapi/asm/Kbuild
index baebb3da1d4..040178cdb3e 100644
--- a/arch/mn10300/include/uapi/asm/Kbuild
+++ b/arch/mn10300/include/uapi/asm/Kbuild
@@ -1,3 +1,34 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += byteorder.h
+header-y += errno.h
+header-y += fcntl.h
+header-y += ioctl.h
+header-y += ioctls.h
+header-y += ipcbuf.h
+header-y += kvm_para.h
+header-y += mman.h
+header-y += msgbuf.h
+header-y += param.h
+header-y += poll.h
+header-y += posix_types.h
+header-y += ptrace.h
+header-y += resource.h
+header-y += sembuf.h
+header-y += setup.h
+header-y += shmbuf.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += socket.h
+header-y += sockios.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += termbits.h
+header-y += termios.h
+header-y += types.h
+header-y += unistd.h
diff --git a/arch/mn10300/include/asm/auxvec.h b/arch/mn10300/include/uapi/asm/auxvec.h
index 4fdb60b2ae3..4fdb60b2ae3 100644
--- a/arch/mn10300/include/asm/auxvec.h
+++ b/arch/mn10300/include/uapi/asm/auxvec.h
diff --git a/arch/mn10300/include/asm/bitsperlong.h b/arch/mn10300/include/uapi/asm/bitsperlong.h
index 6dc0bb0c13b..6dc0bb0c13b 100644
--- a/arch/mn10300/include/asm/bitsperlong.h
+++ b/arch/mn10300/include/uapi/asm/bitsperlong.h
diff --git a/arch/mn10300/include/asm/byteorder.h b/arch/mn10300/include/uapi/asm/byteorder.h
index 5dd0bdd9fee..5dd0bdd9fee 100644
--- a/arch/mn10300/include/asm/byteorder.h
+++ b/arch/mn10300/include/uapi/asm/byteorder.h
diff --git a/arch/mn10300/include/asm/errno.h b/arch/mn10300/include/uapi/asm/errno.h
index 4c82b503d92..4c82b503d92 100644
--- a/arch/mn10300/include/asm/errno.h
+++ b/arch/mn10300/include/uapi/asm/errno.h
diff --git a/arch/mn10300/include/asm/fcntl.h b/arch/mn10300/include/uapi/asm/fcntl.h
index 46ab12db573..46ab12db573 100644
--- a/arch/mn10300/include/asm/fcntl.h
+++ b/arch/mn10300/include/uapi/asm/fcntl.h
diff --git a/arch/mn10300/include/asm/ioctl.h b/arch/mn10300/include/uapi/asm/ioctl.h
index b279fe06dfe..b279fe06dfe 100644
--- a/arch/mn10300/include/asm/ioctl.h
+++ b/arch/mn10300/include/uapi/asm/ioctl.h
diff --git a/arch/mn10300/include/asm/ioctls.h b/arch/mn10300/include/uapi/asm/ioctls.h
index 0212f4b2255..0212f4b2255 100644
--- a/arch/mn10300/include/asm/ioctls.h
+++ b/arch/mn10300/include/uapi/asm/ioctls.h
diff --git a/arch/mn10300/include/asm/ipcbuf.h b/arch/mn10300/include/uapi/asm/ipcbuf.h
index 84c7e51cb6d..84c7e51cb6d 100644
--- a/arch/mn10300/include/asm/ipcbuf.h
+++ b/arch/mn10300/include/uapi/asm/ipcbuf.h
diff --git a/arch/mn10300/include/asm/kvm_para.h b/arch/mn10300/include/uapi/asm/kvm_para.h
index 14fab8f0b95..14fab8f0b95 100644
--- a/arch/mn10300/include/asm/kvm_para.h
+++ b/arch/mn10300/include/uapi/asm/kvm_para.h
diff --git a/arch/mn10300/include/asm/mman.h b/arch/mn10300/include/uapi/asm/mman.h
index db5c53da73c..db5c53da73c 100644
--- a/arch/mn10300/include/asm/mman.h
+++ b/arch/mn10300/include/uapi/asm/mman.h
diff --git a/arch/mn10300/include/asm/msgbuf.h b/arch/mn10300/include/uapi/asm/msgbuf.h
index 8b602450cc4..8b602450cc4 100644
--- a/arch/mn10300/include/asm/msgbuf.h
+++ b/arch/mn10300/include/uapi/asm/msgbuf.h
diff --git a/arch/mn10300/include/asm/param.h b/arch/mn10300/include/uapi/asm/param.h
index 02a0ca6f13c..02a0ca6f13c 100644
--- a/arch/mn10300/include/asm/param.h
+++ b/arch/mn10300/include/uapi/asm/param.h
diff --git a/arch/mn10300/include/asm/poll.h b/arch/mn10300/include/uapi/asm/poll.h
index c98509d3149..c98509d3149 100644
--- a/arch/mn10300/include/asm/poll.h
+++ b/arch/mn10300/include/uapi/asm/poll.h
diff --git a/arch/mn10300/include/asm/posix_types.h b/arch/mn10300/include/uapi/asm/posix_types.h
index d31eeea480c..d31eeea480c 100644
--- a/arch/mn10300/include/asm/posix_types.h
+++ b/arch/mn10300/include/uapi/asm/posix_types.h
diff --git a/arch/mn10300/include/uapi/asm/ptrace.h b/arch/mn10300/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..71b2251b7bf
--- /dev/null
+++ b/arch/mn10300/include/uapi/asm/ptrace.h
@@ -0,0 +1,84 @@
+/* MN10300 Exception frame layout and ptrace constants
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_PTRACE_H
+#define _UAPI_ASM_PTRACE_H
+
+#define PT_A3		0
+#define PT_A2		1
+#define PT_D3		2
+#define	PT_D2		3
+#define PT_MCVF		4
+#define	PT_MCRL		5
+#define PT_MCRH		6
+#define	PT_MDRQ		7
+#define	PT_E1		8
+#define	PT_E0		9
+#define	PT_E7		10
+#define	PT_E6		11
+#define	PT_E5		12
+#define	PT_E4		13
+#define	PT_E3		14
+#define	PT_E2		15
+#define	PT_SP		16
+#define	PT_LAR		17
+#define	PT_LIR		18
+#define	PT_MDR		19
+#define	PT_A1		20
+#define	PT_A0		21
+#define	PT_D1		22
+#define	PT_D0		23
+#define PT_ORIG_D0	24
+#define	PT_EPSW		25
+#define	PT_PC		26
+#define NR_PTREGS	27
+
+/*
+ * This defines the way registers are stored in the event of an exception
+ * - the strange order is due to the MOVM instruction
+ */
+struct pt_regs {
+	unsigned long		a3;		/* syscall arg 3 */
+	unsigned long		a2;		/* syscall arg 4 */
+	unsigned long		d3;		/* syscall arg 5 */
+	unsigned long		d2;		/* syscall arg 6 */
+	unsigned long		mcvf;
+	unsigned long		mcrl;
+	unsigned long		mcrh;
+	unsigned long		mdrq;
+	unsigned long		e1;
+	unsigned long		e0;
+	unsigned long		e7;
+	unsigned long		e6;
+	unsigned long		e5;
+	unsigned long		e4;
+	unsigned long		e3;
+	unsigned long		e2;
+	unsigned long		sp;
+	unsigned long		lar;
+	unsigned long		lir;
+	unsigned long		mdr;
+	unsigned long		a1;
+	unsigned long		a0;		/* syscall arg 1 */
+	unsigned long		d1;		/* syscall arg 2 */
+	unsigned long		d0;		/* syscall ret */
+	struct pt_regs		*next;		/* next frame pointer */
+	unsigned long		orig_d0;	/* syscall number */
+	unsigned long		epsw;
+	unsigned long		pc;
+};
+
+/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13
+#define PTRACE_GETFPREGS          14
+#define PTRACE_SETFPREGS          15
+
+#endif /* _UAPI_ASM_PTRACE_H */
diff --git a/arch/mn10300/include/asm/resource.h b/arch/mn10300/include/uapi/asm/resource.h
index 04bc4db8921..04bc4db8921 100644
--- a/arch/mn10300/include/asm/resource.h
+++ b/arch/mn10300/include/uapi/asm/resource.h
diff --git a/arch/mn10300/include/asm/sembuf.h b/arch/mn10300/include/uapi/asm/sembuf.h
index 301f3f9d8aa..301f3f9d8aa 100644
--- a/arch/mn10300/include/asm/sembuf.h
+++ b/arch/mn10300/include/uapi/asm/sembuf.h
diff --git a/arch/mn10300/include/uapi/asm/setup.h b/arch/mn10300/include/uapi/asm/setup.h
new file mode 100644
index 00000000000..e69de29bb2d
--- /dev/null
+++ b/arch/mn10300/include/uapi/asm/setup.h
diff --git a/arch/mn10300/include/asm/shmbuf.h b/arch/mn10300/include/uapi/asm/shmbuf.h
index 8f300cc35d6..8f300cc35d6 100644
--- a/arch/mn10300/include/asm/shmbuf.h
+++ b/arch/mn10300/include/uapi/asm/shmbuf.h
diff --git a/arch/mn10300/include/asm/sigcontext.h b/arch/mn10300/include/uapi/asm/sigcontext.h
index 4de3afff4ad..4de3afff4ad 100644
--- a/arch/mn10300/include/asm/sigcontext.h
+++ b/arch/mn10300/include/uapi/asm/sigcontext.h
diff --git a/arch/mn10300/include/asm/siginfo.h b/arch/mn10300/include/uapi/asm/siginfo.h
index 0815d29d82e..0815d29d82e 100644
--- a/arch/mn10300/include/asm/siginfo.h
+++ b/arch/mn10300/include/uapi/asm/siginfo.h
diff --git a/arch/mn10300/include/uapi/asm/signal.h b/arch/mn10300/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..08dcd6a8561
--- /dev/null
+++ b/arch/mn10300/include/uapi/asm/signal.h
@@ -0,0 +1,131 @@
+/* MN10300 Signal definitions
+ *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_SIGNAL_H
+#define _UAPI_ASM_SIGNAL_H
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG		32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP		 1
+#define SIGINT		 2
+#define SIGQUIT		 3
+#define SIGILL		 4
+#define SIGTRAP		 5
+#define SIGABRT		 6
+#define SIGIOT		 6
+#define SIGBUS		 7
+#define SIGFPE		 8
+#define SIGKILL		 9
+#define SIGUSR1		10
+#define SIGSEGV		11
+#define SIGUSR2		12
+#define SIGPIPE		13
+#define SIGALRM		14
+#define SIGTERM		15
+#define SIGSTKFLT	16
+#define SIGCHLD		17
+#define SIGCONT		18
+#define SIGSTOP		19
+#define SIGTSTP		20
+#define SIGTTIN		21
+#define SIGTTOU		22
+#define SIGURG		23
+#define SIGXCPU		24
+#define SIGXFSZ		25
+#define SIGVTALRM	26
+#define SIGPROF		27
+#define SIGWINCH	28
+#define SIGIO		29
+#define SIGPOLL		SIGIO
+/*
+#define SIGLOST		29
+*/
+#define SIGPWR		30
+#define SIGSYS		31
+#define	SIGUNUSED	31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN	32
+#define SIGRTMAX	_NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP	0x00000001U
+#define SA_NOCLDWAIT	0x00000002U
+#define SA_SIGINFO	0x00000004U
+#define SA_ONSTACK	0x08000000U
+#define SA_RESTART	0x10000000U
+#define SA_NODEFER	0x40000000U
+#define SA_RESETHAND	0x80000000U
+
+#define SA_NOMASK	SA_NODEFER
+#define SA_ONESHOT	SA_RESETHAND
+
+#define SA_RESTORER	0x04000000
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK	1
+#define SS_DISABLE	2
+
+#define MINSIGSTKSZ	2048
+#define SIGSTKSZ	8192
+
+#include <asm-generic/signal-defs.h>
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+	union {
+	  __sighandler_t _sa_handler;
+	  void (*_sa_sigaction)(int, struct siginfo *, void *);
+	} _u;
+	sigset_t sa_mask;
+	unsigned long sa_flags;
+	void (*sa_restorer)(void);
+};
+
+#define sa_handler	_u._sa_handler
+#define sa_sigaction	_u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+	void __user	*ss_sp;
+	int		ss_flags;
+	size_t		ss_size;
+} stack_t;
+
+
+#endif /* _UAPI_ASM_SIGNAL_H */
diff --git a/arch/mn10300/include/asm/socket.h b/arch/mn10300/include/uapi/asm/socket.h
index 820463a484b..820463a484b 100644
--- a/arch/mn10300/include/asm/socket.h
+++ b/arch/mn10300/include/uapi/asm/socket.h
diff --git a/arch/mn10300/include/asm/sockios.h b/arch/mn10300/include/uapi/asm/sockios.h
index b03043a1c56..b03043a1c56 100644
--- a/arch/mn10300/include/asm/sockios.h
+++ b/arch/mn10300/include/uapi/asm/sockios.h
diff --git a/arch/mn10300/include/asm/stat.h b/arch/mn10300/include/uapi/asm/stat.h
index 63ff8371cf2..63ff8371cf2 100644
--- a/arch/mn10300/include/asm/stat.h
+++ b/arch/mn10300/include/uapi/asm/stat.h
diff --git a/arch/mn10300/include/asm/statfs.h b/arch/mn10300/include/uapi/asm/statfs.h
index 0b91fe198c2..0b91fe198c2 100644
--- a/arch/mn10300/include/asm/statfs.h
+++ b/arch/mn10300/include/uapi/asm/statfs.h
diff --git a/arch/mn10300/include/asm/swab.h b/arch/mn10300/include/uapi/asm/swab.h
index bd818a820ca..bd818a820ca 100644
--- a/arch/mn10300/include/asm/swab.h
+++ b/arch/mn10300/include/uapi/asm/swab.h
diff --git a/arch/mn10300/include/asm/termbits.h b/arch/mn10300/include/uapi/asm/termbits.h
index 130d4249597..130d4249597 100644
--- a/arch/mn10300/include/asm/termbits.h
+++ b/arch/mn10300/include/uapi/asm/termbits.h
diff --git a/arch/mn10300/include/uapi/asm/termios.h b/arch/mn10300/include/uapi/asm/termios.h
new file mode 100644
index 00000000000..11d3cc9d316
--- /dev/null
+++ b/arch/mn10300/include/uapi/asm/termios.h
@@ -0,0 +1,83 @@
+#ifndef _UAPI_ASM_TERMIOS_H
+#define _UAPI_ASM_TERMIOS_H
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+	unsigned short ws_row;
+	unsigned short ws_col;
+	unsigned short ws_xpixel;
+	unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+	unsigned short c_iflag;		/* input mode flags */
+	unsigned short c_oflag;		/* output mode flags */
+	unsigned short c_cflag;		/* control mode flags */
+	unsigned short c_lflag;		/* local mode flags */
+	unsigned char c_line;		/* line discipline */
+	unsigned char c_cc[NCC];	/* control characters */
+};
+
+
+/* modem lines */
+#define TIOCM_LE	0x001
+#define TIOCM_DTR	0x002
+#define TIOCM_RTS	0x004
+#define TIOCM_ST	0x008
+#define TIOCM_SR	0x010
+#define TIOCM_CTS	0x020
+#define TIOCM_CAR	0x040
+#define TIOCM_RNG	0x080
+#define TIOCM_DSR	0x100
+#define TIOCM_CD	TIOCM_CAR
+#define TIOCM_RI	TIOCM_RNG
+#define TIOCM_OUT1	0x2000
+#define TIOCM_OUT2	0x4000
+#define TIOCM_LOOP	0x8000
+
+#define TIOCM_MODEM_BITS       TIOCM_OUT2      /* IRDA support */
+
+/*
+ * Translate a "termio" structure into a "termios". Ugh.
+ */
+#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
+	unsigned short __tmp; \
+	get_user(__tmp, &(termio)->x); \
+	*(unsigned short *) &(termios)->x = __tmp; \
+}
+
+#define user_termio_to_kernel_termios(termios, termio) \
+({ \
+	SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
+	SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
+	SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
+	SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
+	copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
+})
+
+/*
+ * Translate a "termios" structure into a "termio". Ugh.
+ */
+#define kernel_termios_to_user_termio(termio, termios) \
+({ \
+	put_user((termios)->c_iflag, &(termio)->c_iflag); \
+	put_user((termios)->c_oflag, &(termio)->c_oflag); \
+	put_user((termios)->c_cflag, &(termio)->c_cflag); \
+	put_user((termios)->c_lflag, &(termio)->c_lflag); \
+	put_user((termios)->c_line,  &(termio)->c_line); \
+	copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
+})
+
+#define user_termios_to_kernel_termios(k, u) \
+	copy_from_user(k, u, sizeof(struct termios2))
+#define kernel_termios_to_user_termios(u, k) \
+	copy_to_user(u, k, sizeof(struct termios2))
+#define user_termios_to_kernel_termios_1(k, u) \
+	copy_from_user(k, u, sizeof(struct termios))
+#define kernel_termios_to_user_termios_1(u, k) \
+	copy_to_user(u, k, sizeof(struct termios))
+
+#endif /* _UAPI_ASM_TERMIOS_H */
diff --git a/arch/mn10300/include/asm/exec.h b/arch/mn10300/include/uapi/asm/types.h
index c74e367f4b9..8b3f0501b9b 100644
--- a/arch/mn10300/include/asm/exec.h
+++ b/arch/mn10300/include/uapi/asm/types.h
@@ -1,16 +1,11 @@
-/* MN10300 process execution definitions
+/* MN10300 Basic type definitions
  *
+ * Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
  * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public Licence
  * as published by the Free Software Foundation; either version
  * 2 of the Licence, or (at your option) any later version.
  */
-#ifndef _ASM_EXEC_H
-#define _ASM_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* _ASM_EXEC_H */
+#include <asm-generic/int-ll64.h>
diff --git a/arch/mn10300/include/uapi/asm/unistd.h b/arch/mn10300/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..e28ac3f4247
--- /dev/null
+++ b/arch/mn10300/include/uapi/asm/unistd.h
@@ -0,0 +1,354 @@
+/* MN10300 System call number list
+ *
+ * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_UNISTD_H
+#define _UAPI_ASM_UNISTD_H
+
+#define __NR_restart_syscall      0
+#define __NR_exit		  1
+#define __NR_fork		  2
+#define __NR_read		  3
+#define __NR_write		  4
+#define __NR_open		  5
+#define __NR_close		  6
+#define __NR_waitpid		  7
+#define __NR_creat		  8
+#define __NR_link		  9
+#define __NR_unlink		 10
+#define __NR_execve		 11
+#define __NR_chdir		 12
+#define __NR_time		 13
+#define __NR_mknod		 14
+#define __NR_chmod		 15
+#define __NR_lchown		 16
+#define __NR_break		 17
+#define __NR_oldstat		 18
+#define __NR_lseek		 19
+#define __NR_getpid		 20
+#define __NR_mount		 21
+#define __NR_umount		 22
+#define __NR_setuid		 23
+#define __NR_getuid		 24
+#define __NR_stime		 25
+#define __NR_ptrace		 26
+#define __NR_alarm		 27
+#define __NR_oldfstat		 28
+#define __NR_pause		 29
+#define __NR_utime		 30
+#define __NR_stty		 31
+#define __NR_gtty		 32
+#define __NR_access		 33
+#define __NR_nice		 34
+#define __NR_ftime		 35
+#define __NR_sync		 36
+#define __NR_kill		 37
+#define __NR_rename		 38
+#define __NR_mkdir		 39
+#define __NR_rmdir		 40
+#define __NR_dup		 41
+#define __NR_pipe		 42
+#define __NR_times		 43
+#define __NR_prof		 44
+#define __NR_brk		 45
+#define __NR_setgid		 46
+#define __NR_getgid		 47
+#define __NR_signal		 48
+#define __NR_geteuid		 49
+#define __NR_getegid		 50
+#define __NR_acct		 51
+#define __NR_umount2		 52
+#define __NR_lock		 53
+#define __NR_ioctl		 54
+#define __NR_fcntl		 55
+#define __NR_mpx		 56
+#define __NR_setpgid		 57
+#define __NR_ulimit		 58
+#define __NR_oldolduname	 59
+#define __NR_umask		 60
+#define __NR_chroot		 61
+#define __NR_ustat		 62
+#define __NR_dup2		 63
+#define __NR_getppid		 64
+#define __NR_getpgrp		 65
+#define __NR_setsid		 66
+#define __NR_sigaction		 67
+#define __NR_sgetmask		 68
+#define __NR_ssetmask		 69
+#define __NR_setreuid		 70
+#define __NR_setregid		 71
+#define __NR_sigsuspend		 72
+#define __NR_sigpending		 73
+#define __NR_sethostname	 74
+#define __NR_setrlimit		 75
+#define __NR_getrlimit		 76	/* Back compatible 2Gig limited rlimit */
+#define __NR_getrusage		 77
+#define __NR_gettimeofday	 78
+#define __NR_settimeofday	 79
+#define __NR_getgroups		 80
+#define __NR_setgroups		 81
+#define __NR_select		 82
+#define __NR_symlink		 83
+#define __NR_oldlstat		 84
+#define __NR_readlink		 85
+#define __NR_uselib		 86
+#define __NR_swapon		 87
+#define __NR_reboot		 88
+#define __NR_readdir		 89
+#define __NR_mmap		 90
+#define __NR_munmap		 91
+#define __NR_truncate		 92
+#define __NR_ftruncate		 93
+#define __NR_fchmod		 94
+#define __NR_fchown		 95
+#define __NR_getpriority	 96
+#define __NR_setpriority	 97
+#define __NR_profil		 98
+#define __NR_statfs		 99
+#define __NR_fstatfs		100
+#define __NR_ioperm		101
+#define __NR_socketcall		102
+#define __NR_syslog		103
+#define __NR_setitimer		104
+#define __NR_getitimer		105
+#define __NR_stat		106
+#define __NR_lstat		107
+#define __NR_fstat		108
+#define __NR_olduname		109
+#define __NR_iopl		110
+#define __NR_vhangup		111
+#define __NR_idle		112
+#define __NR_vm86old		113
+#define __NR_wait4		114
+#define __NR_swapoff		115
+#define __NR_sysinfo		116
+#define __NR_ipc		117
+#define __NR_fsync		118
+#define __NR_sigreturn		119
+#define __NR_clone		120
+#define __NR_setdomainname	121
+#define __NR_uname		122
+#define __NR_modify_ldt		123
+#define __NR_adjtimex		124
+#define __NR_mprotect		125
+#define __NR_sigprocmask	126
+#define __NR_create_module	127
+#define __NR_init_module	128
+#define __NR_delete_module	129
+#define __NR_get_kernel_syms	130
+#define __NR_quotactl		131
+#define __NR_getpgid		132
+#define __NR_fchdir		133
+#define __NR_bdflush		134
+#define __NR_sysfs		135
+#define __NR_personality	136
+#define __NR_afs_syscall	137 /* Syscall for Andrew File System */
+#define __NR_setfsuid		138
+#define __NR_setfsgid		139
+#define __NR__llseek		140
+#define __NR_getdents		141
+#define __NR__newselect		142
+#define __NR_flock		143
+#define __NR_msync		144
+#define __NR_readv		145
+#define __NR_writev		146
+#define __NR_getsid		147
+#define __NR_fdatasync		148
+#define __NR__sysctl		149
+#define __NR_mlock		150
+#define __NR_munlock		151
+#define __NR_mlockall		152
+#define __NR_munlockall		153
+#define __NR_sched_setparam		154
+#define __NR_sched_getparam		155
+#define __NR_sched_setscheduler		156
+#define __NR_sched_getscheduler		157
+#define __NR_sched_yield		158
+#define __NR_sched_get_priority_max	159
+#define __NR_sched_get_priority_min	160
+#define __NR_sched_rr_get_interval	161
+#define __NR_nanosleep		162
+#define __NR_mremap		163
+#define __NR_setresuid		164
+#define __NR_getresuid		165
+#define __NR_vm86		166
+#define __NR_query_module	167
+#define __NR_poll		168
+#define __NR_nfsservctl		169
+#define __NR_setresgid		170
+#define __NR_getresgid		171
+#define __NR_prctl              172
+#define __NR_rt_sigreturn	173
+#define __NR_rt_sigaction	174
+#define __NR_rt_sigprocmask	175
+#define __NR_rt_sigpending	176
+#define __NR_rt_sigtimedwait	177
+#define __NR_rt_sigqueueinfo	178
+#define __NR_rt_sigsuspend	179
+#define __NR_pread64		180
+#define __NR_pwrite64		181
+#define __NR_chown		182
+#define __NR_getcwd		183
+#define __NR_capget		184
+#define __NR_capset		185
+#define __NR_sigaltstack	186
+#define __NR_sendfile		187
+#define __NR_getpmsg		188	/* some people actually want streams */
+#define __NR_putpmsg		189	/* some people actually want streams */
+#define __NR_vfork		190
+#define __NR_ugetrlimit		191	/* SuS compliant getrlimit */
+#define __NR_mmap2		192
+#define __NR_truncate64		193
+#define __NR_ftruncate64	194
+#define __NR_stat64		195
+#define __NR_lstat64		196
+#define __NR_fstat64		197
+#define __NR_lchown32		198
+#define __NR_getuid32		199
+#define __NR_getgid32		200
+#define __NR_geteuid32		201
+#define __NR_getegid32		202
+#define __NR_setreuid32		203
+#define __NR_setregid32		204
+#define __NR_getgroups32	205
+#define __NR_setgroups32	206
+#define __NR_fchown32		207
+#define __NR_setresuid32	208
+#define __NR_getresuid32	209
+#define __NR_setresgid32	210
+#define __NR_getresgid32	211
+#define __NR_chown32		212
+#define __NR_setuid32		213
+#define __NR_setgid32		214
+#define __NR_setfsuid32		215
+#define __NR_setfsgid32		216
+#define __NR_pivot_root		217
+#define __NR_mincore		218
+#define __NR_madvise		219
+#define __NR_madvise1		219	/* delete when C lib stub is removed */
+#define __NR_getdents64		220
+#define __NR_fcntl64		221
+/* 223 is unused */
+#define __NR_gettid		224
+#define __NR_readahead		225
+#define __NR_setxattr		226
+#define __NR_lsetxattr		227
+#define __NR_fsetxattr		228
+#define __NR_getxattr		229
+#define __NR_lgetxattr		230
+#define __NR_fgetxattr		231
+#define __NR_listxattr		232
+#define __NR_llistxattr		233
+#define __NR_flistxattr		234
+#define __NR_removexattr	235
+#define __NR_lremovexattr	236
+#define __NR_fremovexattr	237
+#define __NR_tkill		238
+#define __NR_sendfile64		239
+#define __NR_futex		240
+#define __NR_sched_setaffinity	241
+#define __NR_sched_getaffinity	242
+#define __NR_set_thread_area	243
+#define __NR_get_thread_area	244
+#define __NR_io_setup		245
+#define __NR_io_destroy		246
+#define __NR_io_getevents	247
+#define __NR_io_submit		248
+#define __NR_io_cancel		249
+#define __NR_fadvise64		250
+
+#define __NR_exit_group		252
+#define __NR_lookup_dcookie	253
+#define __NR_epoll_create	254
+#define __NR_epoll_ctl		255
+#define __NR_epoll_wait		256
+#define __NR_remap_file_pages	257
+#define __NR_set_tid_address	258
+#define __NR_timer_create	259
+#define __NR_timer_settime	(__NR_timer_create+1)
+#define __NR_timer_gettime	(__NR_timer_create+2)
+#define __NR_timer_getoverrun	(__NR_timer_create+3)
+#define __NR_timer_delete	(__NR_timer_create+4)
+#define __NR_clock_settime	(__NR_timer_create+5)
+#define __NR_clock_gettime	(__NR_timer_create+6)
+#define __NR_clock_getres	(__NR_timer_create+7)
+#define __NR_clock_nanosleep	(__NR_timer_create+8)
+#define __NR_statfs64		268
+#define __NR_fstatfs64		269
+#define __NR_tgkill		270
+#define __NR_utimes		271
+#define __NR_fadvise64_64	272
+#define __NR_vserver		273
+#define __NR_mbind		274
+#define __NR_get_mempolicy	275
+#define __NR_set_mempolicy	276
+#define __NR_mq_open 		277
+#define __NR_mq_unlink		(__NR_mq_open+1)
+#define __NR_mq_timedsend	(__NR_mq_open+2)
+#define __NR_mq_timedreceive	(__NR_mq_open+3)
+#define __NR_mq_notify		(__NR_mq_open+4)
+#define __NR_mq_getsetattr	(__NR_mq_open+5)
+#define __NR_kexec_load		283
+#define __NR_waitid		284
+#define __NR_add_key		286
+#define __NR_request_key	287
+#define __NR_keyctl		288
+#define __NR_cacheflush		289
+#define __NR_ioprio_set		290
+#define __NR_ioprio_get		291
+#define __NR_inotify_init	292
+#define __NR_inotify_add_watch	293
+#define __NR_inotify_rm_watch	294
+#define __NR_migrate_pages	295
+#define __NR_openat		296
+#define __NR_mkdirat		297
+#define __NR_mknodat		298
+#define __NR_fchownat		299
+#define __NR_futimesat		300
+#define __NR_fstatat64		301
+#define __NR_unlinkat		302
+#define __NR_renameat		303
+#define __NR_linkat		304
+#define __NR_symlinkat		305
+#define __NR_readlinkat		306
+#define __NR_fchmodat		307
+#define __NR_faccessat		308
+#define __NR_pselect6		309
+#define __NR_ppoll		310
+#define __NR_unshare		311
+#define __NR_set_robust_list	312
+#define __NR_get_robust_list	313
+#define __NR_splice		314
+#define __NR_sync_file_range	315
+#define __NR_tee		316
+#define __NR_vmsplice		317
+#define __NR_move_pages		318
+#define __NR_getcpu		319
+#define __NR_epoll_pwait	320
+#define __NR_utimensat		321
+#define __NR_signalfd		322
+#define __NR_timerfd_create	323
+#define __NR_eventfd		324
+#define __NR_fallocate		325
+#define __NR_timerfd_settime	326
+#define __NR_timerfd_gettime	327
+#define __NR_signalfd4		328
+#define __NR_eventfd2		329
+#define __NR_epoll_create1	330
+#define __NR_dup3		331
+#define __NR_pipe2		332
+#define __NR_inotify_init1	333
+#define __NR_preadv		334
+#define __NR_pwritev		335
+#define __NR_rt_tgsigqueueinfo	336
+#define __NR_perf_event_open	337
+#define __NR_recvmmsg		338
+#define __NR_setns		339
+
+#endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mn10300/kernel/Makefile b/arch/mn10300/kernel/Makefile
index d06749173d6..561029f7fa4 100644
--- a/arch/mn10300/kernel/Makefile
+++ b/arch/mn10300/kernel/Makefile
@@ -7,8 +7,8 @@ fpu-obj-y := fpu-nofpu.o fpu-nofpu-low.o
 fpu-obj-$(CONFIG_FPU) := fpu.o fpu-low.o
 
 obj-y   := process.o signal.o entry.o traps.o irq.o \
-	   ptrace.o setup.o time.o sys_mn10300.o io.o kthread.o \
-	   switch_to.o mn10300_ksyms.o kernel_execve.o $(fpu-obj-y) \
+	   ptrace.o setup.o time.o sys_mn10300.o io.o \
+	   switch_to.o mn10300_ksyms.o $(fpu-obj-y) \
 	   csrc-mn10300.o cevt-mn10300.o
 
 obj-$(CONFIG_SMP) += smp.o smp-low.o
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index 8e11f9f4899..0c631d34c8d 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -55,6 +55,20 @@ ENTRY(ret_from_fork)
 	mov	d0,(REG_D0,fp)
 	jmp	syscall_exit
 
+ENTRY(ret_from_kernel_thread)
+	call	schedule_tail[],0
+	mov	(REG_D0,fp),d0
+	mov	(REG_A0,fp),a0
+	calls	(a0)
+	jmp	sys_exit
+
+ENTRY(ret_from_kernel_execve)
+	add	-12,d0	/* pt_regs -> frame */
+	mov	d0,sp
+	GET_THREAD_INFO a2
+	clr	d0
+	jmp	syscall_exit
+
 ###############################################################################
 #
 # system call handler
@@ -94,6 +108,10 @@ restore_all:
 ###############################################################################
 	ALIGN
 syscall_exit_work:
+	mov	(REG_EPSW,fp),d0
+	and	EPSW_nSL,d0
+	beq	resume_kernel		# returning to supervisor mode
+
 	btst	_TIF_SYSCALL_TRACE,d2
 	beq	work_pending
 	LOCAL_IRQ_ENABLE		# could let syscall_trace_exit() call
diff --git a/arch/mn10300/kernel/internal.h b/arch/mn10300/kernel/internal.h
index 2df440105a8..561785581f6 100644
--- a/arch/mn10300/kernel/internal.h
+++ b/arch/mn10300/kernel/internal.h
@@ -15,14 +15,10 @@ struct clocksource;
 struct clock_event_device;
 
 /*
- * kthread.S
- */
-extern int kernel_thread_helper(int);
-
-/*
  * entry.S
  */
 extern void ret_from_fork(struct task_struct *) __attribute__((noreturn));
+extern void ret_from_kernel_thread(struct task_struct *) __attribute__((noreturn));
 
 /*
  * smp-low.S
diff --git a/arch/mn10300/kernel/kernel_execve.S b/arch/mn10300/kernel/kernel_execve.S
deleted file mode 100644
index 86039f10526..00000000000
--- a/arch/mn10300/kernel/kernel_execve.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/* MN10300 In-kernel program execution
- *
- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public Licence
- * as published by the Free Software Foundation; either version
- * 2 of the Licence, or (at your option) any later version.
- */
-#include <linux/linkage.h>
-#include <asm/unistd.h>
-
-###############################################################################
-#
-# Do a system call from kernel instead of calling sys_execve so we end up with
-# proper pt_regs.
-#
-# int kernel_execve(const char *filename, char *const argv[],
-#		    char *const envp[])
-#
-# On entry: D0/D1/8(SP): arguments to function
-# On return: D0: syscall return.
-#
-###############################################################################
-	.globl		kernel_execve
-	.type		kernel_execve,@function
-kernel_execve:
-	mov		a3,a1
-	mov		d0,a0
-	mov		(12,sp),a3
-	mov		+__NR_execve,d0
-	syscall		0
-	mov		a1,a3
-	rets
-
-	.size		kernel_execve,.-kernel_execve
diff --git a/arch/mn10300/kernel/kthread.S b/arch/mn10300/kernel/kthread.S
deleted file mode 100644
index b5ae467ac5e..00000000000
--- a/arch/mn10300/kernel/kthread.S
+++ /dev/null
@@ -1,31 +0,0 @@
-/* MN10300 Kernel thread trampoline function
- *
- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
- * Written by Mark Salter (msalter@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public Licence
- * as published by the Free Software Foundation; either version
- * 2 of the Licence, or (at your option) any later version.
- */
-	.text
-
-###############################################################################
-#
-# kernel_thread_helper - trampoline for kernel_thread()
-#
-# On entry:
-#   A2 = address of function to call
-#   D2 = function argument
-#
-###############################################################################
-	.globl	kernel_thread_helper
-	.type	kernel_thread_helper,@function
-kernel_thread_helper:
-	mov	do_exit,d1
-	mov	d1,(sp)
-	mov	d1,mdr
-	mov	d2,d0
-	jmp	(a2)
-
-	.size	kernel_thread_helper,.-kernel_thread_helper
diff --git a/arch/mn10300/kernel/process.c b/arch/mn10300/kernel/process.c
index e9cceba193b..d0c671b6d9f 100644
--- a/arch/mn10300/kernel/process.c
+++ b/arch/mn10300/kernel/process.c
@@ -165,27 +165,6 @@ void show_regs(struct pt_regs *regs)
 }
 
 /*
- * create a kernel thread
- */
-int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
-{
-	struct pt_regs regs;
-
-	memset(&regs, 0, sizeof(regs));
-
-	regs.a2 = (unsigned long) fn;
-	regs.d2 = (unsigned long) arg;
-	regs.pc = (unsigned long) kernel_thread_helper;
-	local_save_flags(regs.epsw);
-	regs.epsw |= EPSW_IE | EPSW_IM_7;
-
-	/* Ok, create the new process.. */
-	return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0,
-		       NULL, NULL);
-}
-EXPORT_SYMBOL(kernel_thread);
-
-/*
  * free current thread data structures etc..
  */
 void exit_thread(void)
@@ -230,50 +209,42 @@ int copy_thread(unsigned long clone_flags,
 		struct task_struct *p, struct pt_regs *kregs)
 {
 	struct thread_info *ti = task_thread_info(p);
-	struct pt_regs *c_uregs, *c_kregs, *uregs;
+	struct pt_regs *c_regs;
 	unsigned long c_ksp;
 
-	uregs = current->thread.uregs;
-
 	c_ksp = (unsigned long) task_stack_page(p) + THREAD_SIZE;
 
 	/* allocate the userspace exception frame and set it up */
 	c_ksp -= sizeof(struct pt_regs);
-	c_uregs = (struct pt_regs *) c_ksp;
+	c_regs = (struct pt_regs *) c_ksp;
+	c_ksp -= 12; /* allocate function call ABI slack */
 
-	p->thread.uregs = c_uregs;
-	*c_uregs = *uregs;
-	c_uregs->sp = c_usp;
-	c_uregs->epsw &= ~EPSW_FE; /* my FPU */
+	/* set up things up so the scheduler can start the new task */
+	p->thread.uregs = c_regs;
+	ti->frame	= c_regs;
+	p->thread.a3	= (unsigned long) c_regs;
+	p->thread.sp	= c_ksp;
+	p->thread.wchan	= p->thread.pc;
+	p->thread.usp	= c_usp;
 
-	c_ksp -= 12; /* allocate function call ABI slack */
+	if (unlikely(!kregs)) {
+		memset(c_regs, 0, sizeof(struct pt_regs));
+		c_regs->a0 = c_usp; /* function */
+		c_regs->d0 = ustk_size; /* argument */
+		local_save_flags(c_regs->epsw);
+		c_regs->epsw |= EPSW_IE | EPSW_IM_7;
+		p->thread.pc	= (unsigned long) ret_from_kernel_thread;
+		return 0;
+	}
+	*c_regs = *kregs;
+	c_regs->sp = c_usp;
+	c_regs->epsw &= ~EPSW_FE; /* my FPU */
 
 	/* the new TLS pointer is passed in as arg #5 to sys_clone() */
 	if (clone_flags & CLONE_SETTLS)
-		c_uregs->e2 = current_frame()->d3;
-
-	/* set up the return kernel frame if called from kernel_thread() */
-	c_kregs = c_uregs;
-	if (kregs != uregs) {
-		c_ksp -= sizeof(struct pt_regs);
-		c_kregs = (struct pt_regs *) c_ksp;
-		*c_kregs = *kregs;
-		c_kregs->sp = c_usp;
-		c_kregs->next = c_uregs;
-#ifdef CONFIG_MN10300_CURRENT_IN_E2
-		c_kregs->e2 = (unsigned long) p; /* current */
-#endif
-
-		c_ksp -= 12; /* allocate function call ABI slack */
-	}
+		c_regs->e2 = current_frame()->d3;
 
-	/* set up things up so the scheduler can start the new task */
-	ti->frame	= c_kregs;
-	p->thread.a3	= (unsigned long) c_kregs;
-	p->thread.sp	= c_ksp;
 	p->thread.pc	= (unsigned long) ret_from_fork;
-	p->thread.wchan	= (unsigned long) ret_from_fork;
-	p->thread.usp	= c_usp;
 
 	return 0;
 }
@@ -302,22 +273,6 @@ asmlinkage long sys_vfork(void)
 		       current_frame(), 0, NULL, NULL);
 }
 
-asmlinkage long sys_execve(const char __user *name,
-			   const char __user *const __user *argv,
-			   const char __user *const __user *envp)
-{
-	char *filename;
-	int error;
-
-	filename = getname(name);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		return error;
-	error = do_execve(filename, argv, envp, current_frame());
-	putname(filename);
-	return error;
-}
-
 unsigned long get_wchan(struct task_struct *p)
 {
 	return p->thread.wchan;
diff --git a/arch/mn10300/kernel/signal.c b/arch/mn10300/kernel/signal.c
index 4d584ae29ae..f570b3085ef 100644
--- a/arch/mn10300/kernel/signal.c
+++ b/arch/mn10300/kernel/signal.c
@@ -317,10 +317,6 @@ static int setup_frame(int sig, struct k_sigaction *ka, sigset_t *set,
 	regs->d0 = sig;
 	regs->d1 = (unsigned long) &frame->sc;
 
-	/* the tracer may want to single-step inside the handler */
-	if (test_thread_flag(TIF_SINGLESTEP))
-		ptrace_notify(SIGTRAP);
-
 #if DEBUG_SIG
 	printk(KERN_DEBUG "SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n",
 	       sig, current->comm, current->pid, frame, regs->pc,
@@ -398,10 +394,6 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 	regs->d0 = sig;
 	regs->d1 = (long) &frame->info;
 
-	/* the tracer may want to single-step inside the handler */
-	if (test_thread_flag(TIF_SINGLESTEP))
-		ptrace_notify(SIGTRAP);
-
 #if DEBUG_SIG
 	printk(KERN_DEBUG "SIG deliver %d (%s:%d): sp=%p pc=%lx ra=%p\n",
 	       sig, current->comm, current->pid, frame, regs->pc,
@@ -475,11 +467,6 @@ static void do_signal(struct pt_regs *regs)
 	siginfo_t info;
 	int signr;
 
-	/* we want the common case to go fast, which is why we may in certain
-	 * cases get here from kernel mode */
-	if (!user_mode(regs))
-		return;
-
 	signr = get_signal_to_deliver(&info, &ka, regs, NULL);
 	if (signr > 0) {
 		if (handle_signal(signr, &info, &ka, regs) == 0) {
diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig
index 49765b53f63..05f2ba41ff1 100644
--- a/arch/openrisc/Kconfig
+++ b/arch/openrisc/Kconfig
@@ -21,6 +21,7 @@ config OPENRISC
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_STRNCPY_FROM_USER
 	select GENERIC_STRNLEN_USER
+	select MODULES_USE_ELF_RELA
 
 config MMU
 	def_bool y
diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild
index 0922959663a..78de6805268 100644
--- a/arch/openrisc/include/asm/Kbuild
+++ b/arch/openrisc/include/asm/Kbuild
@@ -1,6 +1,4 @@
-include include/asm-generic/Kbuild.asm
 
-header-y += elf.h
 header-y += ucontext.h
 
 generic-y += atomic.h
@@ -11,6 +9,7 @@ generic-y += bug.h
 generic-y += bugs.h
 generic-y += cacheflush.h
 generic-y += checksum.h
+generic-y += clkdev.h
 generic-y += cmpxchg.h
 generic-y += cmpxchg-local.h
 generic-y += cputime.h
diff --git a/arch/openrisc/include/asm/elf.h b/arch/openrisc/include/asm/elf.h
index 225a7ff320a..f4aa8a542a2 100644
--- a/arch/openrisc/include/asm/elf.h
+++ b/arch/openrisc/include/asm/elf.h
@@ -15,60 +15,12 @@
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  */
-
 #ifndef __ASM_OPENRISC_ELF_H
 #define __ASM_OPENRISC_ELF_H
 
-/*
- * This files is partially exported to userspace.  This allows us to keep
- * the ELF bits in one place which should assist in keeping the kernel and
- * userspace in sync.
- */
-
-/*
- * ELF register definitions..
- */
-
-/* for struct user_regs_struct definition */
-#include <asm/ptrace.h>
-
-/* The OR1K relocation types... not all relevant for module loader */
-#define R_OR32_NONE	0
-#define R_OR32_32	1
-#define R_OR32_16	2
-#define R_OR32_8	3
-#define R_OR32_CONST	4
-#define R_OR32_CONSTH	5
-#define R_OR32_JUMPTARG	6
-#define R_OR32_VTINHERIT 7
-#define R_OR32_VTENTRY	8
-
-typedef unsigned long elf_greg_t;
-
-/*
- * Note that NGREG is defined to ELF_NGREG in include/linux/elfcore.h, and is
- * thus exposed to user-space.
- */
-#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t))
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-/* A placeholder; OR32 does not have fp support yes, so no fp regs for now.  */
-typedef unsigned long elf_fpregset_t;
-
-/* This should be moved to include/linux/elf.h */
-#define EM_OR32         0x8472
-#define EM_OPENRISC     92     /* OpenRISC 32-bit embedded processor */
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#define ELF_ARCH	EM_OR32
-#define ELF_CLASS	ELFCLASS32
-#define ELF_DATA	ELFDATA2MSB
-
-#ifdef __KERNEL__
 
 #include <linux/types.h>
+#include <uapi/asm/elf.h>
 
 /*
  * This is used to ensure we don't load something for the wrong architecture.
@@ -113,5 +65,4 @@ extern void dump_elf_thread(elf_greg_t *dest, struct pt_regs *pt);
 #define SET_PERSONALITY(ex) \
 	set_personality(PER_LINUX | (current->personality & (~PER_MASK)))
 
-#endif /* __KERNEL__ */
 #endif
diff --git a/arch/openrisc/include/asm/processor.h b/arch/openrisc/include/asm/processor.h
index 30462f1fe95..43decdbdb2e 100644
--- a/arch/openrisc/include/asm/processor.h
+++ b/arch/openrisc/include/asm/processor.h
@@ -103,7 +103,7 @@ extern unsigned long thread_saved_pc(struct task_struct *t);
 
 #define init_stack      (init_thread_union.stack)
 
-#define cpu_relax()     do { } while (0)
+#define cpu_relax()     barrier()
 
 #endif /* __ASSEMBLY__ */
 #endif /* __ASM_OPENRISC_PROCESSOR_H */
diff --git a/arch/openrisc/include/asm/ptrace.h b/arch/openrisc/include/asm/ptrace.h
index 8555c0c3d4d..6ca17264c39 100644
--- a/arch/openrisc/include/asm/ptrace.h
+++ b/arch/openrisc/include/asm/ptrace.h
@@ -15,25 +15,12 @@
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  */
-
 #ifndef __ASM_OPENRISC_PTRACE_H
 #define __ASM_OPENRISC_PTRACE_H
 
-#ifndef __ASSEMBLY__
-/*
- * This is the layout of the regset returned by the GETREGSET ptrace call
- */
-struct user_regs_struct {
-	/* GPR R0-R31... */
-	unsigned long gpr[32];
-	unsigned long pc;
-	unsigned long sr;
-};
-#endif
-
-#ifdef __KERNEL__
 
 #include <asm/spr_defs.h>
+#include <uapi/asm/ptrace.h>
 
 /*
  * Make kernel PTrace/register structures opaque to userspace... userspace can
@@ -134,6 +121,4 @@ static inline long regs_return_value(struct pt_regs *regs)
 #define PT_ORIG_GPR11 132
 #define PT_SYSCALLNO  136
 
-#endif /* __KERNEL__ */
-
 #endif /* __ASM_OPENRISC_PTRACE_H */
diff --git a/arch/openrisc/include/asm/thread_info.h b/arch/openrisc/include/asm/thread_info.h
index 07a8bc080ef..07f3212422a 100644
--- a/arch/openrisc/include/asm/thread_info.h
+++ b/arch/openrisc/include/asm/thread_info.h
@@ -121,7 +121,6 @@ register struct thread_info *current_thread_info_reg asm("r10");
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
 #define _TIF_SINGLESTEP		(1<<TIF_SINGLESTEP)
-#define _TIF_RESTORE_SIGMASK     (1<<TIF_RESTORE_SIGMASK)
 #define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
 
 
@@ -129,6 +128,8 @@ register struct thread_info *current_thread_info_reg asm("r10");
 /* For OpenRISC, this is anything in the LSW other than syscall trace */
 #define _TIF_WORK_MASK (0xff & ~(_TIF_SYSCALL_TRACE|_TIF_SINGLESTEP))
 
+#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
+
 #endif /* __KERNEL__ */
 
 #endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/openrisc/include/uapi/asm/Kbuild b/arch/openrisc/include/uapi/asm/Kbuild
index baebb3da1d4..80761eb82b5 100644
--- a/arch/openrisc/include/uapi/asm/Kbuild
+++ b/arch/openrisc/include/uapi/asm/Kbuild
@@ -1,3 +1,10 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += byteorder.h
+header-y += elf.h
+header-y += kvm_para.h
+header-y += param.h
+header-y += ptrace.h
+header-y += sigcontext.h
+header-y += unistd.h
diff --git a/arch/openrisc/include/asm/byteorder.h b/arch/openrisc/include/uapi/asm/byteorder.h
index 60d14f7e14e..60d14f7e14e 100644
--- a/arch/openrisc/include/asm/byteorder.h
+++ b/arch/openrisc/include/uapi/asm/byteorder.h
diff --git a/arch/openrisc/include/uapi/asm/elf.h b/arch/openrisc/include/uapi/asm/elf.h
new file mode 100644
index 00000000000..f02ea583042
--- /dev/null
+++ b/arch/openrisc/include/uapi/asm/elf.h
@@ -0,0 +1,69 @@
+/*
+ * OpenRISC Linux
+ *
+ * Linux architectural port borrowing liberally from similar works of
+ * others.  All original copyrights apply as per the original source
+ * declaration.
+ *
+ * OpenRISC implementation:
+ * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
+ * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
+ * et al.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _UAPI__ASM_OPENRISC_ELF_H
+#define _UAPI__ASM_OPENRISC_ELF_H
+
+/*
+ * This files is partially exported to userspace.  This allows us to keep
+ * the ELF bits in one place which should assist in keeping the kernel and
+ * userspace in sync.
+ */
+
+/*
+ * ELF register definitions..
+ */
+
+/* for struct user_regs_struct definition */
+#include <asm/ptrace.h>
+
+/* The OR1K relocation types... not all relevant for module loader */
+#define R_OR32_NONE	0
+#define R_OR32_32	1
+#define R_OR32_16	2
+#define R_OR32_8	3
+#define R_OR32_CONST	4
+#define R_OR32_CONSTH	5
+#define R_OR32_JUMPTARG	6
+#define R_OR32_VTINHERIT 7
+#define R_OR32_VTENTRY	8
+
+typedef unsigned long elf_greg_t;
+
+/*
+ * Note that NGREG is defined to ELF_NGREG in include/linux/elfcore.h, and is
+ * thus exposed to user-space.
+ */
+#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+/* A placeholder; OR32 does not have fp support yes, so no fp regs for now.  */
+typedef unsigned long elf_fpregset_t;
+
+/* This should be moved to include/linux/elf.h */
+#define EM_OR32         0x8472
+#define EM_OPENRISC     92     /* OpenRISC 32-bit embedded processor */
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_ARCH	EM_OR32
+#define ELF_CLASS	ELFCLASS32
+#define ELF_DATA	ELFDATA2MSB
+
+#endif /* _UAPI__ASM_OPENRISC_ELF_H */
diff --git a/arch/openrisc/include/asm/kvm_para.h b/arch/openrisc/include/uapi/asm/kvm_para.h
index 14fab8f0b95..14fab8f0b95 100644
--- a/arch/openrisc/include/asm/kvm_para.h
+++ b/arch/openrisc/include/uapi/asm/kvm_para.h
diff --git a/arch/openrisc/include/asm/param.h b/arch/openrisc/include/uapi/asm/param.h
index c39a336610e..c39a336610e 100644
--- a/arch/openrisc/include/asm/param.h
+++ b/arch/openrisc/include/uapi/asm/param.h
diff --git a/arch/openrisc/include/uapi/asm/ptrace.h b/arch/openrisc/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..9760bd17fbc
--- /dev/null
+++ b/arch/openrisc/include/uapi/asm/ptrace.h
@@ -0,0 +1,35 @@
+/*
+ * OpenRISC Linux
+ *
+ * Linux architectural port borrowing liberally from similar works of
+ * others.  All original copyrights apply as per the original source
+ * declaration.
+ *
+ * OpenRISC implementation:
+ * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com>
+ * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
+ * et al.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _UAPI__ASM_OPENRISC_PTRACE_H
+#define _UAPI__ASM_OPENRISC_PTRACE_H
+
+#ifndef __ASSEMBLY__
+/*
+ * This is the layout of the regset returned by the GETREGSET ptrace call
+ */
+struct user_regs_struct {
+	/* GPR R0-R31... */
+	unsigned long gpr[32];
+	unsigned long pc;
+	unsigned long sr;
+};
+#endif
+
+
+#endif /* _UAPI__ASM_OPENRISC_PTRACE_H */
diff --git a/arch/openrisc/include/asm/sigcontext.h b/arch/openrisc/include/uapi/asm/sigcontext.h
index b79c2b19afb..b79c2b19afb 100644
--- a/arch/openrisc/include/asm/sigcontext.h
+++ b/arch/openrisc/include/uapi/asm/sigcontext.h
diff --git a/arch/openrisc/include/asm/unistd.h b/arch/openrisc/include/uapi/asm/unistd.h
index 437bdbb61b1..437bdbb61b1 100644
--- a/arch/openrisc/include/asm/unistd.h
+++ b/arch/openrisc/include/uapi/asm/unistd.h
diff --git a/arch/openrisc/kernel/irq.c b/arch/openrisc/kernel/irq.c
index e935b9d8eee..8ec77bc9f1e 100644
--- a/arch/openrisc/kernel/irq.c
+++ b/arch/openrisc/kernel/irq.c
@@ -46,19 +46,19 @@ EXPORT_SYMBOL(arch_local_irq_restore);
 
 static void or1k_pic_mask(struct irq_data *data)
 {
-	mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->irq));
+	mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq));
 }
 
 static void or1k_pic_unmask(struct irq_data *data)
 {
-	mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->irq));
+	mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->hwirq));
 }
 
 static void or1k_pic_ack(struct irq_data *data)
 {
 	/* EDGE-triggered interrupts need to be ack'ed in order to clear
 	 * the latch.
-	 * LEVER-triggered interrupts do not need to be ack'ed; however,
+	 * LEVEL-triggered interrupts do not need to be ack'ed; however,
 	 * ack'ing the interrupt has no ill-effect and is quicker than
 	 * trying to figure out what type it is...
 	 */
@@ -75,10 +75,10 @@ static void or1k_pic_ack(struct irq_data *data)
 	 *     as opposed to a 1 as mandated by the spec
 	 */
 
-	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->irq));
+	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq));
 #else
-	WARN(1, "Interrupt handling possibily broken\n");
-	mtspr(SPR_PICSR, (1UL << irq));
+	WARN(1, "Interrupt handling possibly broken\n");
+	mtspr(SPR_PICSR, (1UL << data->hwirq));
 #endif
 }
 
@@ -87,10 +87,12 @@ static void or1k_pic_mask_ack(struct irq_data *data)
 	/* Comments for pic_ack apply here, too */
 
 #ifdef CONFIG_OR1K_1200
-	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->irq));
+	mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq));
+	mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq));
 #else
-	WARN(1, "Interrupt handling possibily broken\n");
-	mtspr(SPR_PICSR, (1UL << irq));
+	WARN(1, "Interrupt handling possibly broken\n");
+	mtspr(SPR_PICMR, (1UL << data->hwirq));
+	mtspr(SPR_PICSR, (1UL << data->hwirq));
 #endif
 }
 
diff --git a/arch/openrisc/kernel/process.c b/arch/openrisc/kernel/process.c
index 55210f37d1a..c35f3ab1a8d 100644
--- a/arch/openrisc/kernel/process.c
+++ b/arch/openrisc/kernel/process.c
@@ -271,7 +271,7 @@ asmlinkage long _sys_execve(const char __user *name,
 			    struct pt_regs *regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname(name);
 	error = PTR_ERR(filename);
@@ -279,7 +279,7 @@ asmlinkage long _sys_execve(const char __user *name,
 	if (IS_ERR(filename))
 		goto out;
 
-	error = do_execve(filename, argv, envp, regs);
+	error = do_execve(filename->name, argv, envp, regs);
 	putname(filename);
 
 out:
diff --git a/arch/openrisc/kernel/ptrace.c b/arch/openrisc/kernel/ptrace.c
index e71781d24b0..71a2a0c34c6 100644
--- a/arch/openrisc/kernel/ptrace.c
+++ b/arch/openrisc/kernel/ptrace.c
@@ -187,7 +187,7 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
 		 */
 		ret = -1L;
 
-	audit_syscall_entry(audit_arch(), regs->gpr[11],
+	audit_syscall_entry(AUDIT_ARCH_OPENRISC, regs->gpr[11],
 			    regs->gpr[3], regs->gpr[4],
 			    regs->gpr[5], regs->gpr[6]);
 
diff --git a/arch/openrisc/lib/delay.c b/arch/openrisc/lib/delay.c
index 01d9740ae6f..c330767c921 100644
--- a/arch/openrisc/lib/delay.c
+++ b/arch/openrisc/lib/delay.c
@@ -30,9 +30,9 @@ int __devinit read_current_timer(unsigned long *timer_value)
 
 void __delay(unsigned long cycles)
 {
-	cycles_t target = get_cycles() + cycles;
+	cycles_t start = get_cycles();
 
-	while (get_cycles() < target)
+	while ((get_cycles() - start) < cycles)
 		cpu_relax();
 }
 EXPORT_SYMBOL(__delay);
@@ -41,7 +41,7 @@ inline void __const_udelay(unsigned long xloops)
 {
 	unsigned long long loops;
 
-	loops = xloops * loops_per_jiffy * HZ;
+	loops = (unsigned long long)xloops * loops_per_jiffy * HZ;
 
 	__delay(loops >> 32);
 }
diff --git a/arch/openrisc/mm/fault.c b/arch/openrisc/mm/fault.c
index 40f850e9766..e2bfafce66c 100644
--- a/arch/openrisc/mm/fault.c
+++ b/arch/openrisc/mm/fault.c
@@ -183,6 +183,7 @@ good_area:
 			tsk->min_flt++;
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			 /* No need to up_read(&mm->mmap_sem) as we would
 			 * have already released it in __lock_page_or_retry
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index b87438bb338..11def45b98c 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -20,6 +20,8 @@ config PARISC
 	select ARCH_HAVE_NMI_SAFE_CMPXCHG
 	select GENERIC_SMP_IDLE_THREAD
 	select GENERIC_STRNCPY_FROM_USER
+	select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_RELA
 
 	help
 	  The PA-RISC microprocessor is designed by Hewlett-Packard and used
diff --git a/arch/parisc/hpux/fs.c b/arch/parisc/hpux/fs.c
index 6785de7bd2a..a0760b87fd4 100644
--- a/arch/parisc/hpux/fs.c
+++ b/arch/parisc/hpux/fs.c
@@ -34,14 +34,14 @@
 int hpux_execve(struct pt_regs *regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname((const char __user *) regs->gr[26]);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
 
-	error = do_execve(filename,
+	error = do_execve(filename->name,
 			  (const char __user *const __user *) regs->gr[25],
 			  (const char __user *const __user *) regs->gr[24],
 			  regs);
diff --git a/arch/parisc/hpux/gate.S b/arch/parisc/hpux/gate.S
index 38a1c1b8d4e..011468857e9 100644
--- a/arch/parisc/hpux/gate.S
+++ b/arch/parisc/hpux/gate.S
@@ -71,7 +71,7 @@ ENTRY(hpux_gateway_page)
 	STREG	%r26, TASK_PT_GR26(%r1)	 	/* 1st argument */
 	STREG	%r27, TASK_PT_GR27(%r1)		/* user dp */
 	STREG   %r28, TASK_PT_GR28(%r1)         /* return value 0 */
-	STREG   %r28, TASK_PT_ORIG_R28(%r1)     /* return value 0 (saved for signals) */
+	STREG   %r0, TASK_PT_ORIG_R28(%r1)     /* don't prohibit restarts */
 	STREG   %r29, TASK_PT_GR29(%r1)         /* 8th argument */
 	STREG	%r31, TASK_PT_GR31(%r1)		/* preserve syscall return ptr */
 	
diff --git a/arch/parisc/include/asm/Kbuild b/arch/parisc/include/asm/Kbuild
index 4383707d980..458371a1565 100644
--- a/arch/parisc/include/asm/Kbuild
+++ b/arch/parisc/include/asm/Kbuild
@@ -1,4 +1,6 @@
 include include/asm-generic/Kbuild.asm
 
 header-y += pdc.h
+generic-y += clkdev.h
 generic-y += word-at-a-time.h
+generic-y += exec.h
diff --git a/arch/parisc/include/asm/exec.h b/arch/parisc/include/asm/exec.h
deleted file mode 100644
index 6bb5af75b17..00000000000
--- a/arch/parisc/include/asm/exec.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __PARISC_EXEC_H
-#define __PARISC_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* __PARISC_EXEC_H */
diff --git a/arch/parisc/include/asm/module.h b/arch/parisc/include/asm/module.h
index 1f4123427ea..bab37e99168 100644
--- a/arch/parisc/include/asm/module.h
+++ b/arch/parisc/include/asm/module.h
@@ -1,21 +1,11 @@
 #ifndef _ASM_PARISC_MODULE_H
 #define _ASM_PARISC_MODULE_H
+
+#include <asm-generic/module.h>
+
 /*
  * This file contains the parisc architecture specific module code.
  */
-#ifdef CONFIG_64BIT
-#define Elf_Shdr Elf64_Shdr
-#define Elf_Sym Elf64_Sym
-#define Elf_Ehdr Elf64_Ehdr
-#define Elf_Addr Elf64_Addr
-#define Elf_Rela Elf64_Rela
-#else
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
-#define Elf_Addr Elf32_Addr
-#define Elf_Rela Elf32_Rela
-#endif
 
 struct unwind_table;
 
diff --git a/arch/parisc/include/asm/thread_info.h b/arch/parisc/include/asm/thread_info.h
index 22b4726dee4..d1fb79a36f3 100644
--- a/arch/parisc/include/asm/thread_info.h
+++ b/arch/parisc/include/asm/thread_info.h
@@ -68,13 +68,16 @@ struct thread_info {
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
 #define _TIF_POLLING_NRFLAG	(1 << TIF_POLLING_NRFLAG)
 #define _TIF_32BIT		(1 << TIF_32BIT)
-#define _TIF_RESTORE_SIGMASK	(1 << TIF_RESTORE_SIGMASK)
 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
 #define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
 #define _TIF_BLOCKSTEP		(1 << TIF_BLOCKSTEP)
 
 #define _TIF_USER_WORK_MASK     (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | \
                                  _TIF_NEED_RESCHED)
+#define _TIF_SYSCALL_TRACE_MASK (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP |	\
+				 _TIF_BLOCKSTEP)
+
+#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 9d181890a7e..48e16dc2010 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -276,7 +276,6 @@ void flush_dcache_page(struct page *page)
 {
 	struct address_space *mapping = page_mapping(page);
 	struct vm_area_struct *mpnt;
-	struct prio_tree_iter iter;
 	unsigned long offset;
 	unsigned long addr, old_addr = 0;
 	pgoff_t pgoff;
@@ -299,7 +298,7 @@ void flush_dcache_page(struct page *page)
 	 * to flush one address here for them all to become coherent */
 
 	flush_dcache_mmap_lock(mapping);
-	vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
+	vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {
 		offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
 		addr = mpnt->vm_start + offset;
 
diff --git a/arch/parisc/kernel/process.c b/arch/parisc/kernel/process.c
index 8c6b6b6561f..cbc37216bf9 100644
--- a/arch/parisc/kernel/process.c
+++ b/arch/parisc/kernel/process.c
@@ -342,13 +342,13 @@ unsigned long thread_saved_pc(struct task_struct *t)
 asmlinkage int sys_execve(struct pt_regs *regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname((const char __user *) regs->gr[26]);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = do_execve(filename,
+	error = do_execve(filename->name,
 			  (const char __user *const __user *) regs->gr[25],
 			  (const char __user *const __user *) regs->gr[24],
 			  regs);
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index 594459bde14..53799695599 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -113,6 +113,8 @@ sys_rt_sigreturn(struct pt_regs *regs, int in_syscall)
 		(usp - sigframe_size);
 	DBG(2,"sys_rt_sigreturn: frame is %p\n", frame);
 
+	regs->orig_r28 = 1; /* no restarts for sigreturn */
+
 #ifdef CONFIG_64BIT
 	compat_frame = (struct compat_rt_sigframe __user *)frame;
 	
@@ -437,7 +439,7 @@ give_sigsegv:
  * OK, we're invoking a handler.
  */	
 
-static long
+static void
 handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
 		struct pt_regs *regs, int in_syscall)
 {
@@ -447,7 +449,7 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
 	
 	/* Set up the stack frame */
 	if (!setup_rt_frame(sig, ka, info, oldset, regs, in_syscall))
-		return 0;
+		return;
 
 	signal_delivered(sig, info, ka, regs, 
 		test_thread_flag(TIF_SINGLESTEP) ||
@@ -455,13 +457,14 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
 
 	DBG(1,KERN_DEBUG "do_signal: Exit (success), regs->gr[28] = %ld\n",
 		regs->gr[28]);
-
-	return 1;
 }
 
 static inline void
 syscall_restart(struct pt_regs *regs, struct k_sigaction *ka)
 {
+	if (regs->orig_r28)
+		return;
+	regs->orig_r28 = 1; /* no more restarts */
 	/* Check the return code */
 	switch (regs->gr[28]) {
 	case -ERESTART_RESTARTBLOCK:
@@ -482,8 +485,6 @@ syscall_restart(struct pt_regs *regs, struct k_sigaction *ka)
 		 * we have to do is fiddle the return pointer.
 		 */
 		regs->gr[31] -= 8; /* delayed branching */
-		/* Preserve original r28. */
-		regs->gr[28] = regs->orig_r28;
 		break;
 	}
 }
@@ -491,6 +492,9 @@ syscall_restart(struct pt_regs *regs, struct k_sigaction *ka)
 static inline void
 insert_restart_trampoline(struct pt_regs *regs)
 {
+	if (regs->orig_r28)
+		return;
+	regs->orig_r28 = 1; /* no more restarts */
 	switch(regs->gr[28]) {
 	case -ERESTART_RESTARTBLOCK: {
 		/* Restart the system call - no handlers present */
@@ -525,9 +529,6 @@ insert_restart_trampoline(struct pt_regs *regs)
 		flush_user_icache_range(regs->gr[30], regs->gr[30] + 4);
 
 		regs->gr[31] = regs->gr[30] + 8;
-		/* Preserve original r28. */
-		regs->gr[28] = regs->orig_r28;
-
 		return;
 	}
 	case -ERESTARTNOHAND:
@@ -539,9 +540,6 @@ insert_restart_trampoline(struct pt_regs *regs)
 		 * slot of the branch external instruction.
 		 */
 		regs->gr[31] -= 8;
-		/* Preserve original r28. */
-		regs->gr[28] = regs->orig_r28;
-
 		return;
 	}
 	default:
@@ -570,30 +568,17 @@ do_signal(struct pt_regs *regs, long in_syscall)
 	DBG(1,"\ndo_signal: regs=0x%p, sr7 %#lx, in_syscall=%d\n",
 	       regs, regs->sr[7], in_syscall);
 
-	/* Everyone else checks to see if they are in kernel mode at
-	   this point and exits if that's the case.  I'm not sure why
-	   we would be called in that case, but for some reason we
-	   are. */
-
-	/* May need to force signal if handle_signal failed to deliver */
-	while (1) {
-		signr = get_signal_to_deliver(&info, &ka, regs, NULL);
-		DBG(3,"do_signal: signr = %d, regs->gr[28] = %ld\n", signr, regs->gr[28]); 
+	signr = get_signal_to_deliver(&info, &ka, regs, NULL);
+	DBG(3,"do_signal: signr = %d, regs->gr[28] = %ld\n", signr, regs->gr[28]); 
 	
-		if (signr <= 0)
-		  break;
-		
+	if (signr > 0) {
 		/* Restart a system call if necessary. */
 		if (in_syscall)
 			syscall_restart(regs, &ka);
 
-		/* Whee!  Actually deliver the signal.  If the
-		   delivery failed, we need to continue to iterate in
-		   this loop so we can deliver the SIGSEGV... */
-		if (handle_signal(signr, &info, &ka, regs, in_syscall))
-			return;
+		handle_signal(signr, &info, &ka, regs, in_syscall);
+		return;
 	}
-	/* end of while(1) looping forever if we can't force a signal */
 
 	/* Did we come from a system call? */
 	if (in_syscall)
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c
index dc9a6246232..bf5b93a885d 100644
--- a/arch/parisc/kernel/sys_parisc32.c
+++ b/arch/parisc/kernel/sys_parisc32.c
@@ -60,14 +60,14 @@
 asmlinkage int sys32_execve(struct pt_regs *regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	DBG(("sys32_execve(%p) r26 = 0x%lx\n", regs, regs->gr[26]));
 	filename = getname((const char __user *) regs->gr[26]);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = compat_do_execve(filename, compat_ptr(regs->gr[25]),
+	error = compat_do_execve(filename->name, compat_ptr(regs->gr[25]),
 				 compat_ptr(regs->gr[24]), regs);
 	putname(filename);
 out:
diff --git a/arch/parisc/kernel/syscall.S b/arch/parisc/kernel/syscall.S
index 82a52b2fb13..86742df0b19 100644
--- a/arch/parisc/kernel/syscall.S
+++ b/arch/parisc/kernel/syscall.S
@@ -156,7 +156,7 @@ linux_gateway_entry:
 	STREG	%r26, TASK_PT_GR26(%r1)	 	/* 1st argument */
 	STREG	%r27, TASK_PT_GR27(%r1)		/* user dp */
 	STREG   %r28, TASK_PT_GR28(%r1)         /* return value 0 */
-	STREG   %r28, TASK_PT_ORIG_R28(%r1)     /* return value 0 (saved for signals) */
+	STREG   %r0, TASK_PT_ORIG_R28(%r1)      /* don't prohibit restarts */
 	STREG	%r29, TASK_PT_GR29(%r1)		/* return value 1 */
 	STREG	%r31, TASK_PT_GR31(%r1)		/* preserve syscall return ptr */
 	
@@ -180,9 +180,10 @@ linux_gateway_entry:
 
 	/* Are we being ptraced? */
 	mfctl	%cr30, %r1
-	LDREG	TI_TASK(%r1),%r1
-	ldw	TASK_PTRACE(%r1), %r1
-	bb,<,n	%r1,31,.Ltracesys
+	LDREG	TI_FLAGS(%r1),%r1
+	ldi	_TIF_SYSCALL_TRACE_MASK, %r19
+	and,COND(=) %r1, %r19, %r0
+	b,n	.Ltracesys
 	
 	/* Note!  We cannot use the syscall table that is mapped
 	nearby since the gateway page is mapped execute-only. */
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 4ce0be32d15..a902a5c1c76 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -99,6 +99,7 @@ config PPC
 	select HAVE_DYNAMIC_FTRACE
 	select HAVE_FUNCTION_TRACER
 	select HAVE_FUNCTION_GRAPH_TRACER
+	select SYSCTL_EXCEPTION_TRACE
 	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select HAVE_IDE
 	select HAVE_IOREMAP_PROT
@@ -113,6 +114,7 @@ config PPC
 	select HAVE_DMA_API_DEBUG
 	select USE_GENERIC_SMP_HELPERS if SMP
 	select HAVE_OPROFILE
+	select HAVE_DEBUG_KMEMLEAK
 	select HAVE_SYSCALL_WRAPPERS if PPC64
 	select GENERIC_ATOMIC64 if PPC32
 	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
@@ -135,10 +137,13 @@ config PPC
 	select ARCH_HAVE_NMI_SAFE_CMPXCHG
 	select GENERIC_SMP_IDLE_THREAD
 	select GENERIC_CMOS_UPDATE
-	select GENERIC_TIME_VSYSCALL
+	select GENERIC_TIME_VSYSCALL_OLD
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_STRNCPY_FROM_USER
 	select GENERIC_STRNLEN_USER
+	select GENERIC_KERNEL_THREAD
+	select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_RELA
 
 config EARLY_PRINTK
 	bool
diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
index 126ef1b08a0..e4ad2e27551 100644
--- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
@@ -38,7 +38,6 @@ CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_FSL_ELBC=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
diff --git a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
index abcf00ad939..34ff5686be0 100644
--- a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
@@ -37,7 +37,6 @@ CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig
index 9352e4430c3..09116c6a671 100644
--- a/arch/powerpc/configs/mpc83xx_defconfig
+++ b/arch/powerpc/configs/mpc83xx_defconfig
@@ -50,7 +50,6 @@ CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_VERIFY_WRITE=y
 CONFIG_MTD_NAND_FSL_ELBC=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index 7e313f1ed18..a4fe15e33c6 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -1,38 +1,4 @@
-include include/asm-generic/Kbuild.asm
 
-header-y += auxvec.h
-header-y += bootx.h
-header-y += byteorder.h
-header-y += cputable.h
-header-y += elf.h
-header-y += errno.h
-header-y += fcntl.h
-header-y += ioctl.h
-header-y += ioctls.h
-header-y += ipcbuf.h
-header-y += linkage.h
-header-y += msgbuf.h
-header-y += nvram.h
-header-y += param.h
-header-y += poll.h
-header-y += posix_types.h
-header-y += ps3fb.h
-header-y += resource.h
-header-y += seccomp.h
-header-y += sembuf.h
-header-y += shmbuf.h
-header-y += sigcontext.h
-header-y += siginfo.h
-header-y += signal.h
-header-y += socket.h
-header-y += sockios.h
-header-y += spu_info.h
-header-y += stat.h
-header-y += statfs.h
-header-y += termbits.h
-header-y += termios.h
-header-y += types.h
-header-y += ucontext.h
-header-y += unistd.h
 
+generic-y += clkdev.h
 generic-y += rwsem.h
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index da29032ae38..e3b1d41c89b 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -268,6 +268,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
 
 	return t;
 }
+#define atomic_dec_if_positive atomic_dec_if_positive
 
 #define smp_mb__before_atomic_dec()     smp_mb()
 #define smp_mb__after_atomic_dec()      smp_mb()
diff --git a/arch/powerpc/include/asm/bootx.h b/arch/powerpc/include/asm/bootx.h
index 60a3c9ef301..dd9461003df 100644
--- a/arch/powerpc/include/asm/bootx.h
+++ b/arch/powerpc/include/asm/bootx.h
@@ -5,126 +5,11 @@
  * Written by Benjamin Herrenschmidt.
  */
 
-
 #ifndef __ASM_BOOTX_H__
 #define __ASM_BOOTX_H__
 
-#include <linux/types.h>
-
-#ifdef macintosh
-#include <Types.h>
-#include "linux_type_defs.h"
-#endif
-
-#ifdef macintosh
-/* All this requires PowerPC alignment */
-#pragma options align=power
-#endif
-
-/* On kernel entry:
- *
- * r3 = 0x426f6f58    ('BooX')
- * r4 = pointer to boot_infos
- * r5 = NULL
- *
- * Data and instruction translation disabled, interrupts
- * disabled, kernel loaded at physical 0x00000000 on PCI
- * machines (will be different on NuBus).
- */
-
-#define BOOT_INFO_VERSION               5
-#define BOOT_INFO_COMPATIBLE_VERSION    1
-
-/* Bit in the architecture flag mask. More to be defined in
-   future versions. Note that either BOOT_ARCH_PCI or
-   BOOT_ARCH_NUBUS is set. The other BOOT_ARCH_NUBUS_xxx are
-   set additionally when BOOT_ARCH_NUBUS is set.
- */
-#define BOOT_ARCH_PCI                   0x00000001UL
-#define BOOT_ARCH_NUBUS                 0x00000002UL
-#define BOOT_ARCH_NUBUS_PDM             0x00000010UL
-#define BOOT_ARCH_NUBUS_PERFORMA        0x00000020UL
-#define BOOT_ARCH_NUBUS_POWERBOOK       0x00000040UL
-
-/*  Maximum number of ranges in phys memory map */
-#define MAX_MEM_MAP_SIZE				26
-
-/* This is the format of an element in the physical memory map. Note that
-   the map is optional and current BootX will only build it for pre-PCI
-   machines */
-typedef struct boot_info_map_entry
-{
-    __u32       physAddr;                /* Physical starting address */
-    __u32       size;                    /* Size in bytes */
-} boot_info_map_entry_t;
-
-
-/* Here are the boot informations that are passed to the bootstrap
- * Note that the kernel arguments and the device tree are appended
- * at the end of this structure. */
-typedef struct boot_infos
-{
-    /* Version of this structure */
-    __u32       version;
-    /* backward compatible down to version: */
-    __u32       compatible_version;
-
-    /* NEW (vers. 2) this holds the current _logical_ base addr of
-       the frame buffer (for use by early boot message) */
-    __u8*       logicalDisplayBase;
+#include <uapi/asm/bootx.h>
 
-    /* NEW (vers. 4) Apple's machine identification */
-    __u32       machineID;
-
-    /* NEW (vers. 4) Detected hw architecture */
-    __u32       architecture;
-
-    /* The device tree (internal addresses relative to the beginning of the tree,
-     * device tree offset relative to the beginning of this structure).
-     * On pre-PCI macintosh (BOOT_ARCH_PCI bit set to 0 in architecture), this
-     * field is 0.
-     */
-    __u32       deviceTreeOffset;        /* Device tree offset */
-    __u32       deviceTreeSize;          /* Size of the device tree */
-
-    /* Some infos about the current MacOS display */
-    __u32       dispDeviceRect[4];       /* left,top,right,bottom */
-    __u32       dispDeviceDepth;         /* (8, 16 or 32) */
-    __u8*       dispDeviceBase;          /* base address (physical) */
-    __u32       dispDeviceRowBytes;      /* rowbytes (in bytes) */
-    __u32       dispDeviceColorsOffset;  /* Colormap (8 bits only) or 0 (*) */
-    /* Optional offset in the registry to the current
-     * MacOS display. (Can be 0 when not detected) */
-     __u32      dispDeviceRegEntryOffset;
-
-    /* Optional pointer to boot ramdisk (offset from this structure) */
-    __u32       ramDisk;
-    __u32       ramDiskSize;             /* size of ramdisk image */
-
-    /* Kernel command line arguments (offset from this structure) */
-    __u32       kernelParamsOffset;
-
-    /* ALL BELOW NEW (vers. 4) */
-
-    /* This defines the physical memory. Valid with BOOT_ARCH_NUBUS flag
-       (non-PCI) only. On PCI, memory is contiguous and it's size is in the
-       device-tree. */
-    boot_info_map_entry_t
-    	        physMemoryMap[MAX_MEM_MAP_SIZE]; /* Where the phys memory is */
-    __u32       physMemoryMapSize;               /* How many entries in map */
-
-
-    /* The framebuffer size (optional, currently 0) */
-    __u32       frameBufferSize;         /* Represents a max size, can be 0. */
-
-    /* NEW (vers. 5) */
-
-    /* Total params size (args + colormap + device tree + ramdisk) */
-    __u32       totalParamsSize;
-
-} boot_infos_t;
-
-#ifdef __KERNEL__
 /* (*) The format of the colormap is 256 * 3 * 2 bytes. Each color index
  * is represented by 3 short words containing a 16 bits (unsigned) color
  * component. Later versions may contain the gamma table for direct-color
@@ -162,10 +47,4 @@ struct bootx_dt_node {
 
 extern void bootx_init(unsigned long r4, unsigned long phys);
 
-#endif /* __KERNEL__ */
-
-#ifdef macintosh
-#pragma options align=reset
-#endif
-
 #endif
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index b3c083de17a..21a0687b8c4 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -1,42 +1,10 @@
 #ifndef __ASM_POWERPC_CPUTABLE_H
 #define __ASM_POWERPC_CPUTABLE_H
 
-#define PPC_FEATURE_32			0x80000000
-#define PPC_FEATURE_64			0x40000000
-#define PPC_FEATURE_601_INSTR		0x20000000
-#define PPC_FEATURE_HAS_ALTIVEC		0x10000000
-#define PPC_FEATURE_HAS_FPU		0x08000000
-#define PPC_FEATURE_HAS_MMU		0x04000000
-#define PPC_FEATURE_HAS_4xxMAC		0x02000000
-#define PPC_FEATURE_UNIFIED_CACHE	0x01000000
-#define PPC_FEATURE_HAS_SPE		0x00800000
-#define PPC_FEATURE_HAS_EFP_SINGLE	0x00400000
-#define PPC_FEATURE_HAS_EFP_DOUBLE	0x00200000
-#define PPC_FEATURE_NO_TB		0x00100000
-#define PPC_FEATURE_POWER4		0x00080000
-#define PPC_FEATURE_POWER5		0x00040000
-#define PPC_FEATURE_POWER5_PLUS		0x00020000
-#define PPC_FEATURE_CELL		0x00010000
-#define PPC_FEATURE_BOOKE		0x00008000
-#define PPC_FEATURE_SMT			0x00004000
-#define PPC_FEATURE_ICACHE_SNOOP	0x00002000
-#define PPC_FEATURE_ARCH_2_05		0x00001000
-#define PPC_FEATURE_PA6T		0x00000800
-#define PPC_FEATURE_HAS_DFP		0x00000400
-#define PPC_FEATURE_POWER6_EXT		0x00000200
-#define PPC_FEATURE_ARCH_2_06		0x00000100
-#define PPC_FEATURE_HAS_VSX		0x00000080
-
-#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
-					0x00000040
-
-#define PPC_FEATURE_TRUE_LE		0x00000002
-#define PPC_FEATURE_PPC_LE		0x00000001
-
-#ifdef __KERNEL__
 
 #include <asm/asm-compat.h>
 #include <asm/feature-fixups.h>
+#include <uapi/asm/cputable.h>
 
 #ifndef __ASSEMBLY__
 
@@ -557,5 +525,4 @@ static inline int cpu_has_feature(unsigned long feature)
 
 #endif /* !__ASSEMBLY__ */
 
-#endif /* __KERNEL__ */
 #endif /* __ASM_POWERPC_CPUTABLE_H */
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index 3bf9cca3514..6abf0a16323 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -1,90 +1,3 @@
-#ifndef _ASM_POWERPC_ELF_H
-#define _ASM_POWERPC_ELF_H
-
-#ifdef __KERNEL__
-#include <linux/sched.h>	/* for task_struct */
-#include <asm/page.h>
-#include <asm/string.h>
-#endif
-
-#include <linux/types.h>
-
-#include <asm/ptrace.h>
-#include <asm/cputable.h>
-#include <asm/auxvec.h>
-
-/* PowerPC relocations defined by the ABIs */
-#define R_PPC_NONE		0
-#define R_PPC_ADDR32		1	/* 32bit absolute address */
-#define R_PPC_ADDR24		2	/* 26bit address, 2 bits ignored.  */
-#define R_PPC_ADDR16		3	/* 16bit absolute address */
-#define R_PPC_ADDR16_LO		4	/* lower 16bit of absolute address */
-#define R_PPC_ADDR16_HI		5	/* high 16bit of absolute address */
-#define R_PPC_ADDR16_HA		6	/* adjusted high 16bit */
-#define R_PPC_ADDR14		7	/* 16bit address, 2 bits ignored */
-#define R_PPC_ADDR14_BRTAKEN	8
-#define R_PPC_ADDR14_BRNTAKEN	9
-#define R_PPC_REL24		10	/* PC relative 26 bit */
-#define R_PPC_REL14		11	/* PC relative 16 bit */
-#define R_PPC_REL14_BRTAKEN	12
-#define R_PPC_REL14_BRNTAKEN	13
-#define R_PPC_GOT16		14
-#define R_PPC_GOT16_LO		15
-#define R_PPC_GOT16_HI		16
-#define R_PPC_GOT16_HA		17
-#define R_PPC_PLTREL24		18
-#define R_PPC_COPY		19
-#define R_PPC_GLOB_DAT		20
-#define R_PPC_JMP_SLOT		21
-#define R_PPC_RELATIVE		22
-#define R_PPC_LOCAL24PC		23
-#define R_PPC_UADDR32		24
-#define R_PPC_UADDR16		25
-#define R_PPC_REL32		26
-#define R_PPC_PLT32		27
-#define R_PPC_PLTREL32		28
-#define R_PPC_PLT16_LO		29
-#define R_PPC_PLT16_HI		30
-#define R_PPC_PLT16_HA		31
-#define R_PPC_SDAREL16		32
-#define R_PPC_SECTOFF		33
-#define R_PPC_SECTOFF_LO	34
-#define R_PPC_SECTOFF_HI	35
-#define R_PPC_SECTOFF_HA	36
-
-/* PowerPC relocations defined for the TLS access ABI.  */
-#define R_PPC_TLS		67 /* none	(sym+add)@tls */
-#define R_PPC_DTPMOD32		68 /* word32	(sym+add)@dtpmod */
-#define R_PPC_TPREL16		69 /* half16*	(sym+add)@tprel */
-#define R_PPC_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
-#define R_PPC_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
-#define R_PPC_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
-#define R_PPC_TPREL32		73 /* word32	(sym+add)@tprel */
-#define R_PPC_DTPREL16		74 /* half16*	(sym+add)@dtprel */
-#define R_PPC_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
-#define R_PPC_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
-#define R_PPC_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
-#define R_PPC_DTPREL32		78 /* word32	(sym+add)@dtprel */
-#define R_PPC_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
-#define R_PPC_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
-#define R_PPC_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
-#define R_PPC_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
-#define R_PPC_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
-#define R_PPC_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
-#define R_PPC_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
-#define R_PPC_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
-#define R_PPC_GOT_TPREL16	87 /* half16*	(sym+add)@got@tprel */
-#define R_PPC_GOT_TPREL16_LO	88 /* half16	(sym+add)@got@tprel@l */
-#define R_PPC_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
-#define R_PPC_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
-#define R_PPC_GOT_DTPREL16	91 /* half16*	(sym+add)@got@dtprel */
-#define R_PPC_GOT_DTPREL16_LO	92 /* half16*	(sym+add)@got@dtprel@l */
-#define R_PPC_GOT_DTPREL16_HI	93 /* half16*	(sym+add)@got@dtprel@h */
-#define R_PPC_GOT_DTPREL16_HA	94 /* half16*	(sym+add)@got@dtprel@ha */
-
-/* keep this the last entry. */
-#define R_PPC_NUM		95
-
 /*
  * ELF register definitions..
  *
@@ -93,77 +6,14 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
+#ifndef _ASM_POWERPC_ELF_H
+#define _ASM_POWERPC_ELF_H
 
-#define ELF_NGREG	48	/* includes nip, msr, lr, etc. */
-#define ELF_NFPREG	33	/* includes fpscr */
-
-typedef unsigned long elf_greg_t64;
-typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
-
-typedef unsigned int elf_greg_t32;
-typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
-typedef elf_gregset_t32 compat_elf_gregset_t;
-
-/*
- * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
- */
-#ifdef __powerpc64__
-# define ELF_NVRREG32	33	/* includes vscr & vrsave stuffed together */
-# define ELF_NVRREG	34	/* includes vscr & vrsave in split vectors */
-# define ELF_NVSRHALFREG 32	/* Half the vsx registers */
-# define ELF_GREG_TYPE	elf_greg_t64
-#else
-# define ELF_NEVRREG	34	/* includes acc (as 2) */
-# define ELF_NVRREG	33	/* includes vscr */
-# define ELF_GREG_TYPE	elf_greg_t32
-# define ELF_ARCH	EM_PPC
-# define ELF_CLASS	ELFCLASS32
-# define ELF_DATA	ELFDATA2MSB
-#endif /* __powerpc64__ */
-
-#ifndef ELF_ARCH
-# define ELF_ARCH	EM_PPC64
-# define ELF_CLASS	ELFCLASS64
-# define ELF_DATA	ELFDATA2MSB
-  typedef elf_greg_t64 elf_greg_t;
-  typedef elf_gregset_t64 elf_gregset_t;
-#else
-  /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
-  typedef elf_greg_t32 elf_greg_t;
-  typedef elf_gregset_t32 elf_gregset_t;
-#endif /* ELF_ARCH */
-
-/* Floating point registers */
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-/* Altivec registers */
-/*
- * The entries with indexes 0-31 contain the corresponding vector registers. 
- * The entry with index 32 contains the vscr as the last word (offset 12) 
- * within the quadword.  This allows the vscr to be stored as either a 
- * quadword (since it must be copied via a vector register to/from storage) 
- * or as a word.  
- *
- * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first  
- * word (offset 0) within the quadword.
- *
- * This definition of the VMX state is compatible with the current PPC32 
- * ptrace interface.  This allows signal handling and ptrace to use the same 
- * structures.  This also simplifies the implementation of a bi-arch 
- * (combined (32- and 64-bit) gdb.
- *
- * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
- * vrsave along with vscr and so only uses 33 vectors for the register set
- */
-typedef __vector128 elf_vrreg_t;
-typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
-#ifdef __powerpc64__
-typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
-typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
-#endif
+#include <linux/sched.h>	/* for task_struct */
+#include <asm/page.h>
+#include <asm/string.h>
+#include <uapi/asm/elf.h>
 
-#ifdef __KERNEL__
 /*
  * This is used to ensure we don't load something for the wrong architecture.
  */
@@ -277,153 +127,6 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
 extern unsigned long arch_randomize_brk(struct mm_struct *mm);
 #define arch_randomize_brk arch_randomize_brk
 
-#endif /* __KERNEL__ */
-
-/*
- * The requirements here are:
- * - keep the final alignment of sp (sp & 0xf)
- * - make sure the 32-bit value at the first 16 byte aligned position of
- *   AUXV is greater than 16 for glibc compatibility.
- *   AT_IGNOREPPC is used for that.
- * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
- *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
- * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
- */
-#define ARCH_DLINFO							\
-do {									\
-	/* Handle glibc compatibility. */				\
-	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\
-	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\
-	/* Cache size items */						\
-	NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);			\
-	NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);			\
-	NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);			\
-	VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);	\
-} while (0)
-
-/* PowerPC64 relocations defined by the ABIs */
-#define R_PPC64_NONE    R_PPC_NONE
-#define R_PPC64_ADDR32  R_PPC_ADDR32  /* 32bit absolute address.  */
-#define R_PPC64_ADDR24  R_PPC_ADDR24  /* 26bit address, word aligned.  */
-#define R_PPC64_ADDR16  R_PPC_ADDR16  /* 16bit absolute address. */
-#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address.  */
-#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
-#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits.  */
-#define R_PPC64_ADDR14 R_PPC_ADDR14   /* 16bit address, word aligned.  */
-#define R_PPC64_ADDR14_BRTAKEN  R_PPC_ADDR14_BRTAKEN
-#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
-#define R_PPC64_REL24   R_PPC_REL24 /* PC relative 26 bit, word aligned.  */
-#define R_PPC64_REL14   R_PPC_REL14 /* PC relative 16 bit. */
-#define R_PPC64_REL14_BRTAKEN   R_PPC_REL14_BRTAKEN
-#define R_PPC64_REL14_BRNTAKEN  R_PPC_REL14_BRNTAKEN
-#define R_PPC64_GOT16     R_PPC_GOT16
-#define R_PPC64_GOT16_LO  R_PPC_GOT16_LO
-#define R_PPC64_GOT16_HI  R_PPC_GOT16_HI
-#define R_PPC64_GOT16_HA  R_PPC_GOT16_HA
-
-#define R_PPC64_COPY      R_PPC_COPY
-#define R_PPC64_GLOB_DAT  R_PPC_GLOB_DAT
-#define R_PPC64_JMP_SLOT  R_PPC_JMP_SLOT
-#define R_PPC64_RELATIVE  R_PPC_RELATIVE
-
-#define R_PPC64_UADDR32   R_PPC_UADDR32
-#define R_PPC64_UADDR16   R_PPC_UADDR16
-#define R_PPC64_REL32     R_PPC_REL32
-#define R_PPC64_PLT32     R_PPC_PLT32
-#define R_PPC64_PLTREL32  R_PPC_PLTREL32
-#define R_PPC64_PLT16_LO  R_PPC_PLT16_LO
-#define R_PPC64_PLT16_HI  R_PPC_PLT16_HI
-#define R_PPC64_PLT16_HA  R_PPC_PLT16_HA
-
-#define R_PPC64_SECTOFF     R_PPC_SECTOFF
-#define R_PPC64_SECTOFF_LO  R_PPC_SECTOFF_LO
-#define R_PPC64_SECTOFF_HI  R_PPC_SECTOFF_HI
-#define R_PPC64_SECTOFF_HA  R_PPC_SECTOFF_HA
-#define R_PPC64_ADDR30          37  /* word30 (S + A - P) >> 2.  */
-#define R_PPC64_ADDR64          38  /* doubleword64 S + A.  */
-#define R_PPC64_ADDR16_HIGHER   39  /* half16 #higher(S + A).  */
-#define R_PPC64_ADDR16_HIGHERA  40  /* half16 #highera(S + A).  */
-#define R_PPC64_ADDR16_HIGHEST  41  /* half16 #highest(S + A).  */
-#define R_PPC64_ADDR16_HIGHESTA 42  /* half16 #highesta(S + A). */
-#define R_PPC64_UADDR64     43  /* doubleword64 S + A.  */
-#define R_PPC64_REL64       44  /* doubleword64 S + A - P.  */
-#define R_PPC64_PLT64       45  /* doubleword64 L + A.  */
-#define R_PPC64_PLTREL64    46  /* doubleword64 L + A - P.  */
-#define R_PPC64_TOC16       47  /* half16* S + A - .TOC.  */
-#define R_PPC64_TOC16_LO    48  /* half16 #lo(S + A - .TOC.).  */
-#define R_PPC64_TOC16_HI    49  /* half16 #hi(S + A - .TOC.).  */
-#define R_PPC64_TOC16_HA    50  /* half16 #ha(S + A - .TOC.).  */
-#define R_PPC64_TOC         51  /* doubleword64 .TOC. */
-#define R_PPC64_PLTGOT16    52  /* half16* M + A.  */
-#define R_PPC64_PLTGOT16_LO 53  /* half16 #lo(M + A).  */
-#define R_PPC64_PLTGOT16_HI 54  /* half16 #hi(M + A).  */
-#define R_PPC64_PLTGOT16_HA 55  /* half16 #ha(M + A).  */
-
-#define R_PPC64_ADDR16_DS      56 /* half16ds* (S + A) >> 2.  */
-#define R_PPC64_ADDR16_LO_DS   57 /* half16ds  #lo(S + A) >> 2.  */
-#define R_PPC64_GOT16_DS       58 /* half16ds* (G + A) >> 2.  */
-#define R_PPC64_GOT16_LO_DS    59 /* half16ds  #lo(G + A) >> 2.  */
-#define R_PPC64_PLT16_LO_DS    60 /* half16ds  #lo(L + A) >> 2.  */
-#define R_PPC64_SECTOFF_DS     61 /* half16ds* (R + A) >> 2.  */
-#define R_PPC64_SECTOFF_LO_DS  62 /* half16ds  #lo(R + A) >> 2.  */
-#define R_PPC64_TOC16_DS       63 /* half16ds* (S + A - .TOC.) >> 2.  */
-#define R_PPC64_TOC16_LO_DS    64 /* half16ds  #lo(S + A - .TOC.) >> 2.  */
-#define R_PPC64_PLTGOT16_DS    65 /* half16ds* (M + A) >> 2.  */
-#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds  #lo(M + A) >> 2.  */
-
-/* PowerPC64 relocations defined for the TLS access ABI.  */
-#define R_PPC64_TLS		67 /* none	(sym+add)@tls */
-#define R_PPC64_DTPMOD64	68 /* doubleword64 (sym+add)@dtpmod */
-#define R_PPC64_TPREL16		69 /* half16*	(sym+add)@tprel */
-#define R_PPC64_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
-#define R_PPC64_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
-#define R_PPC64_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
-#define R_PPC64_TPREL64		73 /* doubleword64 (sym+add)@tprel */
-#define R_PPC64_DTPREL16	74 /* half16*	(sym+add)@dtprel */
-#define R_PPC64_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
-#define R_PPC64_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
-#define R_PPC64_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
-#define R_PPC64_DTPREL64	78 /* doubleword64 (sym+add)@dtprel */
-#define R_PPC64_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
-#define R_PPC64_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
-#define R_PPC64_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
-#define R_PPC64_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
-#define R_PPC64_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
-#define R_PPC64_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
-#define R_PPC64_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
-#define R_PPC64_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
-#define R_PPC64_GOT_TPREL16_DS	87 /* half16ds*	(sym+add)@got@tprel */
-#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
-#define R_PPC64_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
-#define R_PPC64_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
-#define R_PPC64_GOT_DTPREL16_DS	91 /* half16ds*	(sym+add)@got@dtprel */
-#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
-#define R_PPC64_GOT_DTPREL16_HI	93 /* half16	(sym+add)@got@dtprel@h */
-#define R_PPC64_GOT_DTPREL16_HA	94 /* half16	(sym+add)@got@dtprel@ha */
-#define R_PPC64_TPREL16_DS	95 /* half16ds*	(sym+add)@tprel */
-#define R_PPC64_TPREL16_LO_DS	96 /* half16ds	(sym+add)@tprel@l */
-#define R_PPC64_TPREL16_HIGHER	97 /* half16	(sym+add)@tprel@higher */
-#define R_PPC64_TPREL16_HIGHERA	98 /* half16	(sym+add)@tprel@highera */
-#define R_PPC64_TPREL16_HIGHEST	99 /* half16	(sym+add)@tprel@highest */
-#define R_PPC64_TPREL16_HIGHESTA 100 /* half16	(sym+add)@tprel@highesta */
-#define R_PPC64_DTPREL16_DS	101 /* half16ds* (sym+add)@dtprel */
-#define R_PPC64_DTPREL16_LO_DS	102 /* half16ds	(sym+add)@dtprel@l */
-#define R_PPC64_DTPREL16_HIGHER	103 /* half16	(sym+add)@dtprel@higher */
-#define R_PPC64_DTPREL16_HIGHERA 104 /* half16	(sym+add)@dtprel@highera */
-#define R_PPC64_DTPREL16_HIGHEST 105 /* half16	(sym+add)@dtprel@highest */
-#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16	(sym+add)@dtprel@highesta */
-
-/* Keep this the last entry.  */
-#define R_PPC64_NUM		107
-
-/* There's actually a third entry here, but it's unused */
-struct ppc64_opd_entry
-{
-	unsigned long funcaddr;
-	unsigned long r2;
-};
-
-#ifdef  __KERNEL__
 
 #ifdef CONFIG_SPU_BASE
 /* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
@@ -433,6 +136,4 @@ struct ppc64_opd_entry
 
 #endif /* CONFIG_SPU_BASE */
 
-#endif /* __KERNEL */
-
 #endif /* _ASM_POWERPC_ELF_H */
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h
index dfdb95bc59a..62e11a32c4c 100644
--- a/arch/powerpc/include/asm/hugetlb.h
+++ b/arch/powerpc/include/asm/hugetlb.h
@@ -151,6 +151,10 @@ static inline void arch_release_hugepage(struct page *page)
 {
 }
 
+static inline void arch_clear_hugepage_flags(struct page *page)
+{
+}
+
 #else /* ! CONFIG_HUGETLB_PAGE */
 static inline void flush_hugetlb_page(struct vm_area_struct *vma,
 				      unsigned long vmaddr)
diff --git a/arch/powerpc/include/asm/kvm_para.h b/arch/powerpc/include/asm/kvm_para.h
index c18916bff68..9365860fb7f 100644
--- a/arch/powerpc/include/asm/kvm_para.h
+++ b/arch/powerpc/include/asm/kvm_para.h
@@ -16,77 +16,11 @@
  *
  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
  */
-
 #ifndef __POWERPC_KVM_PARA_H__
 #define __POWERPC_KVM_PARA_H__
 
-#include <linux/types.h>
+#include <uapi/asm/kvm_para.h>
 
-/*
- * Additions to this struct must only occur at the end, and should be
- * accompanied by a KVM_MAGIC_FEAT flag to advertise that they are present
- * (albeit not necessarily relevant to the current target hardware platform).
- *
- * Struct fields are always 32 or 64 bit aligned, depending on them being 32
- * or 64 bit wide respectively.
- *
- * See Documentation/virtual/kvm/ppc-pv.txt
- */
-struct kvm_vcpu_arch_shared {
-	__u64 scratch1;
-	__u64 scratch2;
-	__u64 scratch3;
-	__u64 critical;		/* Guest may not get interrupts if == r1 */
-	__u64 sprg0;
-	__u64 sprg1;
-	__u64 sprg2;
-	__u64 sprg3;
-	__u64 srr0;
-	__u64 srr1;
-	__u64 dar;		/* dear on BookE */
-	__u64 msr;
-	__u32 dsisr;
-	__u32 int_pending;	/* Tells the guest if we have an interrupt */
-	__u32 sr[16];
-	__u32 mas0;
-	__u32 mas1;
-	__u64 mas7_3;
-	__u64 mas2;
-	__u32 mas4;
-	__u32 mas6;
-	__u32 esr;
-	__u32 pir;
-
-	/*
-	 * SPRG4-7 are user-readable, so we can only keep these consistent
-	 * between the shared area and the real registers when there's an
-	 * intervening exit to KVM.  This also applies to SPRG3 on some
-	 * chips.
-	 *
-	 * This suffices for access by guest userspace, since in PR-mode
-	 * KVM, an exit must occur when changing the guest's MSR[PR].
-	 * If the guest kernel writes to SPRG3-7 via the shared area, it
-	 * must also use the shared area for reading while in kernel space.
-	 */
-	__u64 sprg4;
-	__u64 sprg5;
-	__u64 sprg6;
-	__u64 sprg7;
-};
-
-#define KVM_SC_MAGIC_R0		0x4b564d21 /* "KVM!" */
-#define HC_VENDOR_KVM		(42 << 16)
-#define HC_EV_SUCCESS		0
-#define HC_EV_UNIMPLEMENTED	12
-
-#define KVM_FEATURE_MAGIC_PAGE	1
-
-#define KVM_MAGIC_FEAT_SR		(1 << 0)
-
-/* MASn, ESR, PIR, and high SPRGs */
-#define KVM_MAGIC_FEAT_MAS0_TO_SPRG7	(1 << 1)
-
-#ifdef __KERNEL__
 
 #ifdef CONFIG_KVM_GUEST
 
@@ -211,6 +145,4 @@ static inline bool kvm_check_and_clear_guest_paused(void)
 	return false;
 }
 
-#endif /* __KERNEL__ */
-
 #endif /* __POWERPC_KVM_PARA_H__ */
diff --git a/arch/powerpc/include/asm/mman.h b/arch/powerpc/include/asm/mman.h
index d4a7f645c5d..8565c254151 100644
--- a/arch/powerpc/include/asm/mman.h
+++ b/arch/powerpc/include/asm/mman.h
@@ -1,34 +1,14 @@
-#ifndef _ASM_POWERPC_MMAN_H
-#define _ASM_POWERPC_MMAN_H
-
-#include <asm-generic/mman-common.h>
-
 /*
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
+#ifndef _ASM_POWERPC_MMAN_H
+#define _ASM_POWERPC_MMAN_H
 
-#define PROT_SAO	0x10		/* Strong Access Ordering */
-
-#define MAP_RENAME      MAP_ANONYMOUS   /* In SunOS terminology */
-#define MAP_NORESERVE   0x40            /* don't reserve swap pages */
-#define MAP_LOCKED	0x80
-
-#define MAP_GROWSDOWN	0x0100		/* stack-like segment */
-#define MAP_DENYWRITE	0x0800		/* ETXTBSY */
-#define MAP_EXECUTABLE	0x1000		/* mark it as an executable */
-
-#define MCL_CURRENT     0x2000          /* lock all currently mapped pages */
-#define MCL_FUTURE      0x4000          /* lock all additions to address space */
-
-#define MAP_POPULATE	0x8000		/* populate (prefault) pagetables */
-#define MAP_NONBLOCK	0x10000		/* do not block on IO */
-#define MAP_STACK	0x20000		/* give out an address that is best suited for process/thread stacks */
-#define MAP_HUGETLB	0x40000		/* create a huge page mapping */
+#include <uapi/asm/mman.h>
 
-#ifdef __KERNEL__
 #ifdef CONFIG_PPC64
 
 #include <asm/cputable.h>
@@ -61,5 +41,4 @@ static inline int arch_validate_prot(unsigned long prot)
 #define arch_validate_prot(prot) arch_validate_prot(prot)
 
 #endif /* CONFIG_PPC64 */
-#endif /* __KERNEL__ */
 #endif	/* _ASM_POWERPC_MMAN_H */
diff --git a/arch/powerpc/include/asm/module.h b/arch/powerpc/include/asm/module.h
index 0192a4ee2bc..c1df590ec44 100644
--- a/arch/powerpc/include/asm/module.h
+++ b/arch/powerpc/include/asm/module.h
@@ -11,6 +11,7 @@
 
 #include <linux/list.h>
 #include <asm/bug.h>
+#include <asm-generic/module.h>
 
 
 #ifndef __powerpc64__
@@ -60,16 +61,10 @@ struct mod_arch_specific {
  */
 
 #ifdef __powerpc64__
-#    define Elf_Shdr	Elf64_Shdr
-#    define Elf_Sym	Elf64_Sym
-#    define Elf_Ehdr	Elf64_Ehdr
 #    ifdef MODULE
 	asm(".section .stubs,\"ax\",@nobits; .align 3; .previous");
 #    endif
 #else
-#    define Elf_Shdr	Elf32_Shdr
-#    define Elf_Sym	Elf32_Sym
-#    define Elf_Ehdr	Elf32_Ehdr
 #    ifdef MODULE
 	asm(".section .plt,\"ax\",@nobits; .align 3; .previous");
 	asm(".section .init.plt,\"ax\",@nobits; .align 3; .previous");
diff --git a/arch/powerpc/include/asm/nvram.h b/arch/powerpc/include/asm/nvram.h
index 9d1aafe607c..b0fe0fe4e62 100644
--- a/arch/powerpc/include/asm/nvram.h
+++ b/arch/powerpc/include/asm/nvram.h
@@ -6,29 +6,13 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
-
 #ifndef _ASM_POWERPC_NVRAM_H
 #define _ASM_POWERPC_NVRAM_H
 
-/* Signatures for nvram partitions */
-#define NVRAM_SIG_SP	0x02	/* support processor */
-#define NVRAM_SIG_OF	0x50	/* open firmware config */
-#define NVRAM_SIG_FW	0x51	/* general firmware */
-#define NVRAM_SIG_HW	0x52	/* hardware (VPD) */
-#define NVRAM_SIG_FLIP	0x5a	/* Apple flip/flop header */
-#define NVRAM_SIG_APPL	0x5f	/* Apple "system" (???) */
-#define NVRAM_SIG_SYS	0x70	/* system env vars */
-#define NVRAM_SIG_CFG	0x71	/* config data */
-#define NVRAM_SIG_ELOG	0x72	/* error log */
-#define NVRAM_SIG_VEND	0x7e	/* vendor defined */
-#define NVRAM_SIG_FREE	0x7f	/* Free space */
-#define NVRAM_SIG_OS	0xa0	/* OS defined */
-#define NVRAM_SIG_PANIC	0xa1	/* Apple OSX "panic" */
-
-#ifdef __KERNEL__
 
 #include <linux/errno.h>
 #include <linux/list.h>
+#include <uapi/asm/nvram.h>
 
 #ifdef CONFIG_PPC_PSERIES
 extern int nvram_write_error_log(char * buff, int length,
@@ -56,17 +40,6 @@ extern int nvram_remove_partition(const char *name, int sig,
 extern int nvram_get_partition_size(loff_t data_index);
 extern loff_t nvram_find_partition(const char *name, int sig, int *out_size);
 
-#endif /* __KERNEL__ */
-
-/* PowerMac specific nvram stuffs */
-
-enum {
-	pmac_nvram_OF,		/* Open Firmware partition */
-	pmac_nvram_XPRAM,	/* MacOS XPRAM partition */
-	pmac_nvram_NR		/* MacOS Name Registry partition */
-};
-
-#ifdef __KERNEL__
 /* Return partition offset in nvram */
 extern int	pmac_get_partition(int partition);
 
@@ -83,30 +56,4 @@ extern ssize_t nvram_get_size(void);
 /* Normal access to NVRAM */
 extern unsigned char nvram_read_byte(int i);
 extern void nvram_write_byte(unsigned char c, int i);
-#endif
-
-/* Some offsets in XPRAM */
-#define PMAC_XPRAM_MACHINE_LOC	0xe4
-#define PMAC_XPRAM_SOUND_VOLUME	0x08
-
-/* Machine location structure in PowerMac XPRAM */
-struct pmac_machine_location {
-	unsigned int	latitude;	/* 2+30 bit Fractional number */
-	unsigned int	longitude;	/* 2+30 bit Fractional number */
-	unsigned int	delta;		/* mix of GMT delta and DLS */
-};
-
-/*
- * /dev/nvram ioctls
- *
- * Note that PMAC_NVRAM_GET_OFFSET is still supported, but is
- * definitely obsolete. Do not use it if you can avoid it
- */
-
-#define OBSOLETE_PMAC_NVRAM_GET_OFFSET \
-				_IOWR('p', 0x40, int)
-
-#define IOC_NVRAM_GET_OFFSET	_IOWR('p', 0x42, int)	/* Get NVRAM partition offset */
-#define IOC_NVRAM_SYNC		_IO('p', 0x43)		/* Sync NVRAM image */
-
 #endif /* _ASM_POWERPC_NVRAM_H */
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 9dc5cd1fde1..8734b385527 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -74,9 +74,6 @@ struct task_struct;
 void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp);
 void release_thread(struct task_struct *);
 
-/* Create a new kernel thread. */
-extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
-
 /* Lazy FPU handling on uni-processor */
 extern struct task_struct *last_task_used_math;
 extern struct task_struct *last_task_used_altivec;
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index 9c21ed42aba..5f995681bc1 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -1,6 +1,3 @@
-#ifndef _ASM_POWERPC_PTRACE_H
-#define _ASM_POWERPC_PTRACE_H
-
 /*
  * Copyright (C) 2001 PPC64 Team, IBM Corp
  *
@@ -23,37 +20,11 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
+#ifndef _ASM_POWERPC_PTRACE_H
+#define _ASM_POWERPC_PTRACE_H
 
-#include <linux/types.h>
-
-#ifndef __ASSEMBLY__
-
-struct pt_regs {
-	unsigned long gpr[32];
-	unsigned long nip;
-	unsigned long msr;
-	unsigned long orig_gpr3;	/* Used for restarting system calls */
-	unsigned long ctr;
-	unsigned long link;
-	unsigned long xer;
-	unsigned long ccr;
-#ifdef __powerpc64__
-	unsigned long softe;		/* Soft enabled/disabled */
-#else
-	unsigned long mq;		/* 601 only (not used at present) */
-					/* Used on APUS to hold IPL value. */
-#endif
-	unsigned long trap;		/* Reason for being here */
-	/* N.B. for critical exceptions on 4xx, the dar and dsisr
-	   fields are overloaded to hold srr0 and srr1. */
-	unsigned long dar;		/* Fault registers */
-	unsigned long dsisr;		/* on 4xx/Book-E used for ESR */
-	unsigned long result;		/* Result of a system call */
-};
-
-#endif /* __ASSEMBLY__ */
+#include <uapi/asm/ptrace.h>
 
-#ifdef __KERNEL__
 
 #ifdef __powerpc64__
 
@@ -125,6 +96,8 @@ extern unsigned long ptrace_get_reg(struct task_struct *task, int regno);
 extern int ptrace_put_reg(struct task_struct *task, int regno,
 			  unsigned long data);
 
+#define current_pt_regs() \
+	((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE) - 1)
 /*
  * We use the least-significant bit of the trap field to indicate
  * whether we have saved the full set of registers, or only a
@@ -220,219 +193,12 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
 
 #endif /* __ASSEMBLY__ */
 
-#endif /* __KERNEL__ */
-
-/*
- * Offsets used by 'ptrace' system call interface.
- * These can't be changed without breaking binary compatibility
- * with MkLinux, etc.
- */
-#define PT_R0	0
-#define PT_R1	1
-#define PT_R2	2
-#define PT_R3	3
-#define PT_R4	4
-#define PT_R5	5
-#define PT_R6	6
-#define PT_R7	7
-#define PT_R8	8
-#define PT_R9	9
-#define PT_R10	10
-#define PT_R11	11
-#define PT_R12	12
-#define PT_R13	13
-#define PT_R14	14
-#define PT_R15	15
-#define PT_R16	16
-#define PT_R17	17
-#define PT_R18	18
-#define PT_R19	19
-#define PT_R20	20
-#define PT_R21	21
-#define PT_R22	22
-#define PT_R23	23
-#define PT_R24	24
-#define PT_R25	25
-#define PT_R26	26
-#define PT_R27	27
-#define PT_R28	28
-#define PT_R29	29
-#define PT_R30	30
-#define PT_R31	31
-
-#define PT_NIP	32
-#define PT_MSR	33
-#define PT_ORIG_R3 34
-#define PT_CTR	35
-#define PT_LNK	36
-#define PT_XER	37
-#define PT_CCR	38
-#ifndef __powerpc64__
-#define PT_MQ	39
-#else
-#define PT_SOFTE 39
-#endif
-#define PT_TRAP	40
-#define PT_DAR	41
-#define PT_DSISR 42
-#define PT_RESULT 43
-#define PT_REGS_COUNT 44
-
-#define PT_FPR0	48	/* each FP reg occupies 2 slots in this space */
-
 #ifndef __powerpc64__
-
-#define PT_FPR31 (PT_FPR0 + 2*31)
-#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
-
 #else /* __powerpc64__ */
-
-#define PT_FPSCR (PT_FPR0 + 32)	/* each FP reg occupies 1 slot in 64-bit space */
-
-#ifdef __KERNEL__
 #define PT_FPSCR32 (PT_FPR0 + 2*32 + 1)	/* each FP reg occupies 2 32-bit userspace slots */
-#endif
-
-#define PT_VR0 82	/* each Vector reg occupies 2 slots in 64-bit */
-#define PT_VSCR (PT_VR0 + 32*2 + 1)
-#define PT_VRSAVE (PT_VR0 + 33*2)
-
-#ifdef __KERNEL__
 #define PT_VR0_32 164	/* each Vector reg occupies 4 slots in 32-bit */
 #define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
 #define PT_VRSAVE_32 (PT_VR0 + 33*4)
-#endif
-
-/*
- * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
- */
-#define PT_VSR0 150	/* each VSR reg occupies 2 slots in 64-bit */
-#define PT_VSR31 (PT_VSR0 + 2*31)
-#ifdef __KERNEL__
 #define PT_VSR0_32 300 	/* each VSR reg occupies 4 slots in 32-bit */
-#endif
 #endif /* __powerpc64__ */
-
-/*
- * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
- * The transfer totals 34 quadword.  Quadwords 0-31 contain the
- * corresponding vector registers.  Quadword 32 contains the vscr as the
- * last word (offset 12) within that quadword.  Quadword 33 contains the
- * vrsave as the first word (offset 0) within the quadword.
- *
- * This definition of the VMX state is compatible with the current PPC32
- * ptrace interface.  This allows signal handling and ptrace to use the same
- * structures.  This also simplifies the implementation of a bi-arch
- * (combined (32- and 64-bit) gdb.
- */
-#define PTRACE_GETVRREGS	18
-#define PTRACE_SETVRREGS	19
-
-/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
- * spefscr, in one go */
-#define PTRACE_GETEVRREGS	20
-#define PTRACE_SETEVRREGS	21
-
-/* Get the first 32 128bit VSX registers */
-#define PTRACE_GETVSRREGS	27
-#define PTRACE_SETVSRREGS	28
-
-/*
- * Get or set a debug register. The first 16 are DABR registers and the
- * second 16 are IABR registers.
- */
-#define PTRACE_GET_DEBUGREG	25
-#define PTRACE_SET_DEBUGREG	26
-
-/* (new) PTRACE requests using the same numbers as x86 and the same
- * argument ordering. Additionally, they support more registers too
- */
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-#define PTRACE_GETFPREGS          14
-#define PTRACE_SETFPREGS          15
-#define PTRACE_GETREGS64	  22
-#define PTRACE_SETREGS64	  23
-
-/* Calls to trace a 64bit program from a 32bit program */
-#define PPC_PTRACE_PEEKTEXT_3264 0x95
-#define PPC_PTRACE_PEEKDATA_3264 0x94
-#define PPC_PTRACE_POKETEXT_3264 0x93
-#define PPC_PTRACE_POKEDATA_3264 0x92
-#define PPC_PTRACE_PEEKUSR_3264  0x91
-#define PPC_PTRACE_POKEUSR_3264  0x90
-
-#define PTRACE_SINGLEBLOCK	0x100	/* resume execution until next branch */
-
-#define PPC_PTRACE_GETHWDBGINFO	0x89
-#define PPC_PTRACE_SETHWDEBUG	0x88
-#define PPC_PTRACE_DELHWDEBUG	0x87
-
-#ifndef __ASSEMBLY__
-
-struct ppc_debug_info {
-	__u32 version;			/* Only version 1 exists to date */
-	__u32 num_instruction_bps;
-	__u32 num_data_bps;
-	__u32 num_condition_regs;
-	__u32 data_bp_alignment;
-	__u32 sizeof_condition;		/* size of the DVC register */
-	__u64 features;
-};
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * features will have bits indication whether there is support for:
- */
-#define PPC_DEBUG_FEATURE_INSN_BP_RANGE		0x0000000000000001
-#define PPC_DEBUG_FEATURE_INSN_BP_MASK		0x0000000000000002
-#define PPC_DEBUG_FEATURE_DATA_BP_RANGE		0x0000000000000004
-#define PPC_DEBUG_FEATURE_DATA_BP_MASK		0x0000000000000008
-
-#ifndef __ASSEMBLY__
-
-struct ppc_hw_breakpoint {
-	__u32 version;		/* currently, version must be 1 */
-	__u32 trigger_type;	/* only some combinations allowed */
-	__u32 addr_mode;	/* address match mode */
-	__u32 condition_mode;	/* break/watchpoint condition flags */
-	__u64 addr;		/* break/watchpoint address */
-	__u64 addr2;		/* range end or mask */
-	__u64 condition_value;	/* contents of the DVC register */
-};
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * Trigger Type
- */
-#define PPC_BREAKPOINT_TRIGGER_EXECUTE	0x00000001
-#define PPC_BREAKPOINT_TRIGGER_READ	0x00000002
-#define PPC_BREAKPOINT_TRIGGER_WRITE	0x00000004
-#define PPC_BREAKPOINT_TRIGGER_RW	\
-	(PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE)
-
-/*
- * Address Mode
- */
-#define PPC_BREAKPOINT_MODE_EXACT		0x00000000
-#define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE	0x00000001
-#define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE	0x00000002
-#define PPC_BREAKPOINT_MODE_MASK		0x00000003
-
-/*
- * Condition Mode
- */
-#define PPC_BREAKPOINT_CONDITION_MODE	0x00000003
-#define PPC_BREAKPOINT_CONDITION_NONE	0x00000000
-#define PPC_BREAKPOINT_CONDITION_AND	0x00000001
-#define PPC_BREAKPOINT_CONDITION_EXACT	PPC_BREAKPOINT_CONDITION_AND
-#define PPC_BREAKPOINT_CONDITION_OR	0x00000002
-#define PPC_BREAKPOINT_CONDITION_AND_OR	0x00000003
-#define PPC_BREAKPOINT_CONDITION_BE_ALL	0x00ff0000
-#define PPC_BREAKPOINT_CONDITION_BE_SHIFT	16
-#define PPC_BREAKPOINT_CONDITION_BE(n)	\
-	(1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
-
 #endif /* _ASM_POWERPC_PTRACE_H */
diff --git a/arch/powerpc/include/asm/signal.h b/arch/powerpc/include/asm/signal.h
index 3eb13be11d8..189998bb61c 100644
--- a/arch/powerpc/include/asm/signal.h
+++ b/arch/powerpc/include/asm/signal.h
@@ -1,149 +1,8 @@
 #ifndef _ASM_POWERPC_SIGNAL_H
 #define _ASM_POWERPC_SIGNAL_H
 
-#include <linux/types.h>
+#include <uapi/asm/signal.h>
 
-#define _NSIG		64
-#ifdef __powerpc64__
-#define _NSIG_BPW	64
-#else
-#define _NSIG_BPW	32
-#endif
-#define _NSIG_WORDS	(_NSIG / _NSIG_BPW)
-
-typedef unsigned long old_sigset_t;		/* at least 32 bits */
-
-typedef struct {
-	unsigned long sig[_NSIG_WORDS];
-} sigset_t;
-
-#define SIGHUP		 1
-#define SIGINT		 2
-#define SIGQUIT		 3
-#define SIGILL		 4
-#define SIGTRAP		 5
-#define SIGABRT		 6
-#define SIGIOT		 6
-#define SIGBUS		 7
-#define SIGFPE		 8
-#define SIGKILL		 9
-#define SIGUSR1		10
-#define SIGSEGV		11
-#define SIGUSR2		12
-#define SIGPIPE		13
-#define SIGALRM		14
-#define SIGTERM		15
-#define SIGSTKFLT	16
-#define SIGCHLD		17
-#define SIGCONT		18
-#define SIGSTOP		19
-#define SIGTSTP		20
-#define SIGTTIN		21
-#define SIGTTOU		22
-#define SIGURG		23
-#define SIGXCPU		24
-#define SIGXFSZ		25
-#define SIGVTALRM	26
-#define SIGPROF		27
-#define SIGWINCH	28
-#define SIGIO		29
-#define SIGPOLL		SIGIO
-/*
-#define SIGLOST		29
-*/
-#define SIGPWR		30
-#define SIGSYS		31
-#define	SIGUNUSED	31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN	32
-#define SIGRTMAX	_NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK is not currently supported, but will allow sigaltstack(2).
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP	0x00000001U
-#define SA_NOCLDWAIT	0x00000002U
-#define SA_SIGINFO	0x00000004U
-#define SA_ONSTACK	0x08000000U
-#define SA_RESTART	0x10000000U
-#define SA_NODEFER	0x40000000U
-#define SA_RESETHAND	0x80000000U
-
-#define SA_NOMASK	SA_NODEFER
-#define SA_ONESHOT	SA_RESETHAND
-
-#define SA_RESTORER	0x04000000U
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK	1
-#define SS_DISABLE	2
-
-#define MINSIGSTKSZ	2048
-#define SIGSTKSZ	8192
-
-#include <asm-generic/signal-defs.h>
-
-struct old_sigaction {
-	__sighandler_t sa_handler;
-	old_sigset_t sa_mask;
-	unsigned long sa_flags;
-	__sigrestore_t sa_restorer;
-};
-
-struct sigaction {
-	__sighandler_t sa_handler;
-	unsigned long sa_flags;
-	__sigrestore_t sa_restorer;
-	sigset_t sa_mask;		/* mask last for extensibility */
-};
-
-struct k_sigaction {
-	struct sigaction sa;
-};
-
-typedef struct sigaltstack {
-	void __user *ss_sp;
-	int ss_flags;
-	size_t ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
 struct pt_regs;
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
-#endif /* __KERNEL__ */
-
-#ifndef __powerpc64__
-/*
- * These are parameters to dbg_sigreturn syscall.  They enable or
- * disable certain debugging things that can be done from signal
- * handlers.  The dbg_sigreturn syscall *must* be called from a
- * SA_SIGINFO signal so the ucontext can be passed to it.  It takes an
- * array of struct sig_dbg_op, which has the debug operations to
- * perform before returning from the signal.
- */
-struct sig_dbg_op {
-	int dbg_type;
-	unsigned long dbg_value;
-};
-
-/* Enable or disable single-stepping.  The value sets the state. */
-#define SIG_DBG_SINGLE_STEPPING		1
-
-/* Enable or disable branch tracing.  The value sets the state. */
-#define SIG_DBG_BRANCH_TRACING		2
-#endif /* ! __powerpc64__ */
-
 #endif /* _ASM_POWERPC_SIGNAL_H */
diff --git a/arch/powerpc/include/asm/spu_info.h b/arch/powerpc/include/asm/spu_info.h
index 1286c823f0d..7146b78e40f 100644
--- a/arch/powerpc/include/asm/spu_info.h
+++ b/arch/powerpc/include/asm/spu_info.h
@@ -19,37 +19,10 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
-
 #ifndef _SPU_INFO_H
 #define _SPU_INFO_H
 
-#include <linux/types.h>
-
-#ifdef __KERNEL__
 #include <asm/spu.h>
-#else
-struct mfc_cq_sr {
-	__u64 mfc_cq_data0_RW;
-	__u64 mfc_cq_data1_RW;
-	__u64 mfc_cq_data2_RW;
-	__u64 mfc_cq_data3_RW;
-};
-#endif /* __KERNEL__ */
-
-struct spu_dma_info {
-	__u64 dma_info_type;
-	__u64 dma_info_mask;
-	__u64 dma_info_status;
-	__u64 dma_info_stall_and_notify;
-	__u64 dma_info_atomic_command_status;
-	struct mfc_cq_sr dma_info_command_data[16];
-};
-
-struct spu_proxydma_info {
-	__u64 proxydma_info_type;
-	__u64 proxydma_info_mask;
-	__u64 proxydma_info_status;
-	struct mfc_cq_sr proxydma_info_command_data[8];
-};
+#include <uapi/asm/spu_info.h>
 
 #endif
diff --git a/arch/powerpc/include/asm/swab.h b/arch/powerpc/include/asm/swab.h
index c581e3ef73e..b9bd1ca944d 100644
--- a/arch/powerpc/include/asm/swab.h
+++ b/arch/powerpc/include/asm/swab.h
@@ -1,24 +1,18 @@
-#ifndef _ASM_POWERPC_SWAB_H
-#define _ASM_POWERPC_SWAB_H
-
 /*
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
+#ifndef _ASM_POWERPC_SWAB_H
+#define _ASM_POWERPC_SWAB_H
 
-#include <linux/types.h>
-#include <linux/compiler.h>
+#include <uapi/asm/swab.h>
 
 #ifdef __GNUC__
-
 #ifndef __powerpc64__
-#define __SWAB_64_THRU_32__
 #endif /* __powerpc64__ */
 
-#ifdef __KERNEL__
-
 static __inline__ __u16 ld_le16(const volatile __u16 *addr)
 {
 	__u16 val;
@@ -83,8 +77,5 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 value)
 }
 #define __arch_swab32 __arch_swab32
 
-#endif /* __KERNEL__ */
-
 #endif /* __GNUC__ */
-
 #endif /* _ASM_POWERPC_SWAB_H */
diff --git a/arch/powerpc/include/asm/syscalls.h b/arch/powerpc/include/asm/syscalls.h
index 4084e567d28..329db4ec12c 100644
--- a/arch/powerpc/include/asm/syscalls.h
+++ b/arch/powerpc/include/asm/syscalls.h
@@ -17,9 +17,6 @@ asmlinkage unsigned long sys_mmap(unsigned long addr, size_t len,
 asmlinkage unsigned long sys_mmap2(unsigned long addr, size_t len,
 		unsigned long prot, unsigned long flags,
 		unsigned long fd, unsigned long pgoff);
-asmlinkage int sys_execve(unsigned long a0, unsigned long a1,
-		unsigned long a2, unsigned long a3, unsigned long a4,
-		unsigned long a5, struct pt_regs *regs);
 asmlinkage int sys_clone(unsigned long clone_flags, unsigned long usp,
 		int __user *parent_tidp, void __user *child_threadptr,
 		int __user *child_tidp, int p6, struct pt_regs *regs);
diff --git a/arch/powerpc/include/asm/termios.h b/arch/powerpc/include/asm/termios.h
index a24f48704a3..b8353e2032d 100644
--- a/arch/powerpc/include/asm/termios.h
+++ b/arch/powerpc/include/asm/termios.h
@@ -1,6 +1,3 @@
-#ifndef _ASM_POWERPC_TERMIOS_H
-#define _ASM_POWERPC_TERMIOS_H
-
 /*
  * Liberally adapted from alpha/termios.h.  In particular, the c_cc[]
  * fields have been reordered so that termio & termios share the
@@ -12,74 +9,14 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
+#ifndef _ASM_POWERPC_TERMIOS_H
+#define _ASM_POWERPC_TERMIOS_H
 
-#include <asm/ioctls.h>
-#include <asm/termbits.h>
-
-struct sgttyb {
-	char	sg_ispeed;
-	char	sg_ospeed;
-	char	sg_erase;
-	char	sg_kill;
-	short	sg_flags;
-};
-
-struct tchars {
-	char	t_intrc;
-	char	t_quitc;
-	char	t_startc;
-	char	t_stopc;
-	char	t_eofc;
-	char	t_brkc;
-};
-
-struct ltchars {
-	char	t_suspc;
-	char	t_dsuspc;
-	char	t_rprntc;
-	char	t_flushc;
-	char	t_werasc;
-	char	t_lnextc;
-};
-
-struct winsize {
-	unsigned short ws_row;
-	unsigned short ws_col;
-	unsigned short ws_xpixel;
-	unsigned short ws_ypixel;
-};
-
-#define NCC 10
-struct termio {
-	unsigned short c_iflag;		/* input mode flags */
-	unsigned short c_oflag;		/* output mode flags */
-	unsigned short c_cflag;		/* control mode flags */
-	unsigned short c_lflag;		/* local mode flags */
-	unsigned char c_line;		/* line discipline */
-	unsigned char c_cc[NCC];	/* control characters */
-};
-
-/* c_cc characters */
-#define _VINTR	0
-#define _VQUIT	1
-#define _VERASE	2
-#define _VKILL	3
-#define _VEOF	4
-#define _VMIN	5
-#define _VEOL	6
-#define _VTIME	7
-#define _VEOL2	8
-#define _VSWTC	9
+#include <uapi/asm/termios.h>
 
-#ifdef __KERNEL__
 /*                   ^C  ^\ del  ^U  ^D   1   0   0   0   0  ^W  ^R  ^Z  ^Q  ^S  ^V  ^U  */
 #define INIT_C_CC "\003\034\177\025\004\001\000\000\000\000\027\022\032\021\023\026\025" 
-#endif
-
-#ifdef __KERNEL__
 
 #include <asm-generic/termios-base.h>
 
-#endif	/* __KERNEL__ */
-
 #endif	/* _ASM_POWERPC_TERMIOS_H */
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index 8ceea14d6fe..406b7b9a134 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -182,6 +182,8 @@ static inline bool test_thread_local_flags(unsigned int flags)
 #define is_32bit_task()	(1)
 #endif
 
+#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
+
 #endif	/* !__ASSEMBLY__ */
 
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h
index 0abf7f2c6df..bfb6ded38ff 100644
--- a/arch/powerpc/include/asm/types.h
+++ b/arch/powerpc/include/asm/types.h
@@ -1,22 +1,3 @@
-#ifndef _ASM_POWERPC_TYPES_H
-#define _ASM_POWERPC_TYPES_H
-
-/*
- * This is here because we used to use l64 for 64bit powerpc
- * and we don't want to impact user mode with our change to ll64
- * in the kernel.
- *
- * However, some user programs are fine with this.  They can
- * flag __SANE_USERSPACE_TYPES__ to get int-ll64.h here.
- */
-#if !defined(__SANE_USERSPACE_TYPES__) && defined(__powerpc64__) && !defined(__KERNEL__)
-# include <asm-generic/int-l64.h>
-#else
-# include <asm-generic/int-ll64.h>
-#endif
-
-#ifndef __ASSEMBLY__
-
 /*
  * This file is never included by application software unless
  * explicitly requested (e.g., via linux/types.h) in which case the
@@ -29,14 +10,11 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
+#ifndef _ASM_POWERPC_TYPES_H
+#define _ASM_POWERPC_TYPES_H
 
-typedef struct {
-	__u32 u[4];
-} __attribute__((aligned(16))) __vector128;
-
-#endif /* __ASSEMBLY__ */
+#include <uapi/asm/types.h>
 
-#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 
 typedef __vector128 vector128;
@@ -49,6 +27,4 @@ typedef struct {
 
 #endif /* __ASSEMBLY__ */
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_POWERPC_TYPES_H */
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index c683fa350ad..921dce6d844 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -1,6 +1,3 @@
-#ifndef _ASM_POWERPC_UNISTD_H_
-#define _ASM_POWERPC_UNISTD_H_
-
 /*
  * This file contains the system call numbers.
  *
@@ -9,374 +6,11 @@
  * as published by the Free Software Foundation; either version
  * 2 of the License, or (at your option) any later version.
  */
+#ifndef _ASM_POWERPC_UNISTD_H_
+#define _ASM_POWERPC_UNISTD_H_
 
-#define __NR_restart_syscall	  0
-#define __NR_exit		  1
-#define __NR_fork		  2
-#define __NR_read		  3
-#define __NR_write		  4
-#define __NR_open		  5
-#define __NR_close		  6
-#define __NR_waitpid		  7
-#define __NR_creat		  8
-#define __NR_link		  9
-#define __NR_unlink		 10
-#define __NR_execve		 11
-#define __NR_chdir		 12
-#define __NR_time		 13
-#define __NR_mknod		 14
-#define __NR_chmod		 15
-#define __NR_lchown		 16
-#define __NR_break		 17
-#define __NR_oldstat		 18
-#define __NR_lseek		 19
-#define __NR_getpid		 20
-#define __NR_mount		 21
-#define __NR_umount		 22
-#define __NR_setuid		 23
-#define __NR_getuid		 24
-#define __NR_stime		 25
-#define __NR_ptrace		 26
-#define __NR_alarm		 27
-#define __NR_oldfstat		 28
-#define __NR_pause		 29
-#define __NR_utime		 30
-#define __NR_stty		 31
-#define __NR_gtty		 32
-#define __NR_access		 33
-#define __NR_nice		 34
-#define __NR_ftime		 35
-#define __NR_sync		 36
-#define __NR_kill		 37
-#define __NR_rename		 38
-#define __NR_mkdir		 39
-#define __NR_rmdir		 40
-#define __NR_dup		 41
-#define __NR_pipe		 42
-#define __NR_times		 43
-#define __NR_prof		 44
-#define __NR_brk		 45
-#define __NR_setgid		 46
-#define __NR_getgid		 47
-#define __NR_signal		 48
-#define __NR_geteuid		 49
-#define __NR_getegid		 50
-#define __NR_acct		 51
-#define __NR_umount2		 52
-#define __NR_lock		 53
-#define __NR_ioctl		 54
-#define __NR_fcntl		 55
-#define __NR_mpx		 56
-#define __NR_setpgid		 57
-#define __NR_ulimit		 58
-#define __NR_oldolduname	 59
-#define __NR_umask		 60
-#define __NR_chroot		 61
-#define __NR_ustat		 62
-#define __NR_dup2		 63
-#define __NR_getppid		 64
-#define __NR_getpgrp		 65
-#define __NR_setsid		 66
-#define __NR_sigaction		 67
-#define __NR_sgetmask		 68
-#define __NR_ssetmask		 69
-#define __NR_setreuid		 70
-#define __NR_setregid		 71
-#define __NR_sigsuspend		 72
-#define __NR_sigpending		 73
-#define __NR_sethostname	 74
-#define __NR_setrlimit		 75
-#define __NR_getrlimit		 76
-#define __NR_getrusage		 77
-#define __NR_gettimeofday	 78
-#define __NR_settimeofday	 79
-#define __NR_getgroups		 80
-#define __NR_setgroups		 81
-#define __NR_select		 82
-#define __NR_symlink		 83
-#define __NR_oldlstat		 84
-#define __NR_readlink		 85
-#define __NR_uselib		 86
-#define __NR_swapon		 87
-#define __NR_reboot		 88
-#define __NR_readdir		 89
-#define __NR_mmap		 90
-#define __NR_munmap		 91
-#define __NR_truncate		 92
-#define __NR_ftruncate		 93
-#define __NR_fchmod		 94
-#define __NR_fchown		 95
-#define __NR_getpriority	 96
-#define __NR_setpriority	 97
-#define __NR_profil		 98
-#define __NR_statfs		 99
-#define __NR_fstatfs		100
-#define __NR_ioperm		101
-#define __NR_socketcall		102
-#define __NR_syslog		103
-#define __NR_setitimer		104
-#define __NR_getitimer		105
-#define __NR_stat		106
-#define __NR_lstat		107
-#define __NR_fstat		108
-#define __NR_olduname		109
-#define __NR_iopl		110
-#define __NR_vhangup		111
-#define __NR_idle		112
-#define __NR_vm86		113
-#define __NR_wait4		114
-#define __NR_swapoff		115
-#define __NR_sysinfo		116
-#define __NR_ipc		117
-#define __NR_fsync		118
-#define __NR_sigreturn		119
-#define __NR_clone		120
-#define __NR_setdomainname	121
-#define __NR_uname		122
-#define __NR_modify_ldt		123
-#define __NR_adjtimex		124
-#define __NR_mprotect		125
-#define __NR_sigprocmask	126
-#define __NR_create_module	127
-#define __NR_init_module	128
-#define __NR_delete_module	129
-#define __NR_get_kernel_syms	130
-#define __NR_quotactl		131
-#define __NR_getpgid		132
-#define __NR_fchdir		133
-#define __NR_bdflush		134
-#define __NR_sysfs		135
-#define __NR_personality	136
-#define __NR_afs_syscall	137 /* Syscall for Andrew File System */
-#define __NR_setfsuid		138
-#define __NR_setfsgid		139
-#define __NR__llseek		140
-#define __NR_getdents		141
-#define __NR__newselect		142
-#define __NR_flock		143
-#define __NR_msync		144
-#define __NR_readv		145
-#define __NR_writev		146
-#define __NR_getsid		147
-#define __NR_fdatasync		148
-#define __NR__sysctl		149
-#define __NR_mlock		150
-#define __NR_munlock		151
-#define __NR_mlockall		152
-#define __NR_munlockall		153
-#define __NR_sched_setparam		154
-#define __NR_sched_getparam		155
-#define __NR_sched_setscheduler		156
-#define __NR_sched_getscheduler		157
-#define __NR_sched_yield		158
-#define __NR_sched_get_priority_max	159
-#define __NR_sched_get_priority_min	160
-#define __NR_sched_rr_get_interval	161
-#define __NR_nanosleep		162
-#define __NR_mremap		163
-#define __NR_setresuid		164
-#define __NR_getresuid		165
-#define __NR_query_module	166
-#define __NR_poll		167
-#define __NR_nfsservctl		168
-#define __NR_setresgid		169
-#define __NR_getresgid		170
-#define __NR_prctl		171
-#define __NR_rt_sigreturn	172
-#define __NR_rt_sigaction	173
-#define __NR_rt_sigprocmask	174
-#define __NR_rt_sigpending	175
-#define __NR_rt_sigtimedwait	176
-#define __NR_rt_sigqueueinfo	177
-#define __NR_rt_sigsuspend	178
-#define __NR_pread64		179
-#define __NR_pwrite64		180
-#define __NR_chown		181
-#define __NR_getcwd		182
-#define __NR_capget		183
-#define __NR_capset		184
-#define __NR_sigaltstack	185
-#define __NR_sendfile		186
-#define __NR_getpmsg		187	/* some people actually want streams */
-#define __NR_putpmsg		188	/* some people actually want streams */
-#define __NR_vfork		189
-#define __NR_ugetrlimit		190	/* SuS compliant getrlimit */
-#define __NR_readahead		191
-#ifndef __powerpc64__			/* these are 32-bit only */
-#define __NR_mmap2		192
-#define __NR_truncate64		193
-#define __NR_ftruncate64	194
-#define __NR_stat64		195
-#define __NR_lstat64		196
-#define __NR_fstat64		197
-#endif
-#define __NR_pciconfig_read	198
-#define __NR_pciconfig_write	199
-#define __NR_pciconfig_iobase	200
-#define __NR_multiplexer	201
-#define __NR_getdents64		202
-#define __NR_pivot_root		203
-#ifndef __powerpc64__
-#define __NR_fcntl64		204
-#endif
-#define __NR_madvise		205
-#define __NR_mincore		206
-#define __NR_gettid		207
-#define __NR_tkill		208
-#define __NR_setxattr		209
-#define __NR_lsetxattr		210
-#define __NR_fsetxattr		211
-#define __NR_getxattr		212
-#define __NR_lgetxattr		213
-#define __NR_fgetxattr		214
-#define __NR_listxattr		215
-#define __NR_llistxattr		216
-#define __NR_flistxattr		217
-#define __NR_removexattr	218
-#define __NR_lremovexattr	219
-#define __NR_fremovexattr	220
-#define __NR_futex		221
-#define __NR_sched_setaffinity	222
-#define __NR_sched_getaffinity	223
-/* 224 currently unused */
-#define __NR_tuxcall		225
-#ifndef __powerpc64__
-#define __NR_sendfile64		226
-#endif
-#define __NR_io_setup		227
-#define __NR_io_destroy		228
-#define __NR_io_getevents	229
-#define __NR_io_submit		230
-#define __NR_io_cancel		231
-#define __NR_set_tid_address	232
-#define __NR_fadvise64		233
-#define __NR_exit_group		234
-#define __NR_lookup_dcookie	235
-#define __NR_epoll_create	236
-#define __NR_epoll_ctl		237
-#define __NR_epoll_wait		238
-#define __NR_remap_file_pages	239
-#define __NR_timer_create	240
-#define __NR_timer_settime	241
-#define __NR_timer_gettime	242
-#define __NR_timer_getoverrun	243
-#define __NR_timer_delete	244
-#define __NR_clock_settime	245
-#define __NR_clock_gettime	246
-#define __NR_clock_getres	247
-#define __NR_clock_nanosleep	248
-#define __NR_swapcontext	249
-#define __NR_tgkill		250
-#define __NR_utimes		251
-#define __NR_statfs64		252
-#define __NR_fstatfs64		253
-#ifndef __powerpc64__
-#define __NR_fadvise64_64	254
-#endif
-#define __NR_rtas		255
-#define __NR_sys_debug_setcontext 256
-/* Number 257 is reserved for vserver */
-#define __NR_migrate_pages	258
-#define __NR_mbind		259
-#define __NR_get_mempolicy	260
-#define __NR_set_mempolicy	261
-#define __NR_mq_open		262
-#define __NR_mq_unlink		263
-#define __NR_mq_timedsend	264
-#define __NR_mq_timedreceive	265
-#define __NR_mq_notify		266
-#define __NR_mq_getsetattr	267
-#define __NR_kexec_load		268
-#define __NR_add_key		269
-#define __NR_request_key	270
-#define __NR_keyctl		271
-#define __NR_waitid		272
-#define __NR_ioprio_set		273
-#define __NR_ioprio_get		274
-#define __NR_inotify_init	275
-#define __NR_inotify_add_watch	276
-#define __NR_inotify_rm_watch	277
-#define __NR_spu_run		278
-#define __NR_spu_create		279
-#define __NR_pselect6		280
-#define __NR_ppoll		281
-#define __NR_unshare		282
-#define __NR_splice		283
-#define __NR_tee		284
-#define __NR_vmsplice		285
-#define __NR_openat		286
-#define __NR_mkdirat		287
-#define __NR_mknodat		288
-#define __NR_fchownat		289
-#define __NR_futimesat		290
-#ifdef __powerpc64__
-#define __NR_newfstatat		291
-#else
-#define __NR_fstatat64		291
-#endif
-#define __NR_unlinkat		292
-#define __NR_renameat		293
-#define __NR_linkat		294
-#define __NR_symlinkat		295
-#define __NR_readlinkat		296
-#define __NR_fchmodat		297
-#define __NR_faccessat		298
-#define __NR_get_robust_list	299
-#define __NR_set_robust_list	300
-#define __NR_move_pages		301
-#define __NR_getcpu		302
-#define __NR_epoll_pwait	303
-#define __NR_utimensat		304
-#define __NR_signalfd		305
-#define __NR_timerfd_create	306
-#define __NR_eventfd		307
-#define __NR_sync_file_range2	308
-#define __NR_fallocate		309
-#define __NR_subpage_prot	310
-#define __NR_timerfd_settime	311
-#define __NR_timerfd_gettime	312
-#define __NR_signalfd4		313
-#define __NR_eventfd2		314
-#define __NR_epoll_create1	315
-#define __NR_dup3		316
-#define __NR_pipe2		317
-#define __NR_inotify_init1	318
-#define __NR_perf_event_open	319
-#define __NR_preadv		320
-#define __NR_pwritev		321
-#define __NR_rt_tgsigqueueinfo	322
-#define __NR_fanotify_init	323
-#define __NR_fanotify_mark	324
-#define __NR_prlimit64		325
-#define __NR_socket		326
-#define __NR_bind		327
-#define __NR_connect		328
-#define __NR_listen		329
-#define __NR_accept		330
-#define __NR_getsockname	331
-#define __NR_getpeername	332
-#define __NR_socketpair		333
-#define __NR_send		334
-#define __NR_sendto		335
-#define __NR_recv		336
-#define __NR_recvfrom		337
-#define __NR_shutdown		338
-#define __NR_setsockopt		339
-#define __NR_getsockopt		340
-#define __NR_sendmsg		341
-#define __NR_recvmsg		342
-#define __NR_recvmmsg		343
-#define __NR_accept4		344
-#define __NR_name_to_handle_at	345
-#define __NR_open_by_handle_at	346
-#define __NR_clock_adjtime	347
-#define __NR_syncfs		348
-#define __NR_sendmmsg		349
-#define __NR_setns		350
-#define __NR_process_vm_readv	351
-#define __NR_process_vm_writev	352
+#include <uapi/asm/unistd.h>
 
-#ifdef __KERNEL__
 
 #define __NR_syscalls		353
 
@@ -421,6 +55,8 @@
 #define __ARCH_WANT_SYS_NEWFSTATAT
 #define __ARCH_WANT_COMPAT_SYS_SENDFILE
 #endif
+#define __ARCH_WANT_SYS_EXECVE
+#define __ARCH_WANT_KERNEL_EXECVE
 
 /*
  * "Conditional" syscalls
@@ -429,6 +65,4 @@
 	asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall")))
 
 #endif		/* __ASSEMBLY__ */
-#endif		/* __KERNEL__ */
-
 #endif /* _ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/include/uapi/asm/Kbuild b/arch/powerpc/include/uapi/asm/Kbuild
index baebb3da1d4..a33c3c03bb2 100644
--- a/arch/powerpc/include/uapi/asm/Kbuild
+++ b/arch/powerpc/include/uapi/asm/Kbuild
@@ -1,3 +1,44 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += bootx.h
+header-y += byteorder.h
+header-y += cputable.h
+header-y += elf.h
+header-y += errno.h
+header-y += fcntl.h
+header-y += ioctl.h
+header-y += ioctls.h
+header-y += ipcbuf.h
+header-y += kvm.h
+header-y += kvm_para.h
+header-y += linkage.h
+header-y += mman.h
+header-y += msgbuf.h
+header-y += nvram.h
+header-y += param.h
+header-y += poll.h
+header-y += posix_types.h
+header-y += ps3fb.h
+header-y += ptrace.h
+header-y += resource.h
+header-y += seccomp.h
+header-y += sembuf.h
+header-y += setup.h
+header-y += shmbuf.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += socket.h
+header-y += sockios.h
+header-y += spu_info.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += termbits.h
+header-y += termios.h
+header-y += types.h
+header-y += ucontext.h
+header-y += unistd.h
diff --git a/arch/powerpc/include/asm/auxvec.h b/arch/powerpc/include/uapi/asm/auxvec.h
index ce17d2c9eb4..ce17d2c9eb4 100644
--- a/arch/powerpc/include/asm/auxvec.h
+++ b/arch/powerpc/include/uapi/asm/auxvec.h
diff --git a/arch/powerpc/include/asm/bitsperlong.h b/arch/powerpc/include/uapi/asm/bitsperlong.h
index 5f1659032c4..5f1659032c4 100644
--- a/arch/powerpc/include/asm/bitsperlong.h
+++ b/arch/powerpc/include/uapi/asm/bitsperlong.h
diff --git a/arch/powerpc/include/uapi/asm/bootx.h b/arch/powerpc/include/uapi/asm/bootx.h
new file mode 100644
index 00000000000..6e51cf0708a
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/bootx.h
@@ -0,0 +1,132 @@
+/*
+ * This file describes the structure passed from the BootX application
+ * (for MacOS) when it is used to boot Linux.
+ *
+ * Written by Benjamin Herrenschmidt.
+ */
+
+
+#ifndef _UAPI__ASM_BOOTX_H__
+#define _UAPI__ASM_BOOTX_H__
+
+#include <linux/types.h>
+
+#ifdef macintosh
+#include <Types.h>
+#include "linux_type_defs.h"
+#endif
+
+#ifdef macintosh
+/* All this requires PowerPC alignment */
+#pragma options align=power
+#endif
+
+/* On kernel entry:
+ *
+ * r3 = 0x426f6f58    ('BooX')
+ * r4 = pointer to boot_infos
+ * r5 = NULL
+ *
+ * Data and instruction translation disabled, interrupts
+ * disabled, kernel loaded at physical 0x00000000 on PCI
+ * machines (will be different on NuBus).
+ */
+
+#define BOOT_INFO_VERSION               5
+#define BOOT_INFO_COMPATIBLE_VERSION    1
+
+/* Bit in the architecture flag mask. More to be defined in
+   future versions. Note that either BOOT_ARCH_PCI or
+   BOOT_ARCH_NUBUS is set. The other BOOT_ARCH_NUBUS_xxx are
+   set additionally when BOOT_ARCH_NUBUS is set.
+ */
+#define BOOT_ARCH_PCI                   0x00000001UL
+#define BOOT_ARCH_NUBUS                 0x00000002UL
+#define BOOT_ARCH_NUBUS_PDM             0x00000010UL
+#define BOOT_ARCH_NUBUS_PERFORMA        0x00000020UL
+#define BOOT_ARCH_NUBUS_POWERBOOK       0x00000040UL
+
+/*  Maximum number of ranges in phys memory map */
+#define MAX_MEM_MAP_SIZE				26
+
+/* This is the format of an element in the physical memory map. Note that
+   the map is optional and current BootX will only build it for pre-PCI
+   machines */
+typedef struct boot_info_map_entry
+{
+    __u32       physAddr;                /* Physical starting address */
+    __u32       size;                    /* Size in bytes */
+} boot_info_map_entry_t;
+
+
+/* Here are the boot informations that are passed to the bootstrap
+ * Note that the kernel arguments and the device tree are appended
+ * at the end of this structure. */
+typedef struct boot_infos
+{
+    /* Version of this structure */
+    __u32       version;
+    /* backward compatible down to version: */
+    __u32       compatible_version;
+
+    /* NEW (vers. 2) this holds the current _logical_ base addr of
+       the frame buffer (for use by early boot message) */
+    __u8*       logicalDisplayBase;
+
+    /* NEW (vers. 4) Apple's machine identification */
+    __u32       machineID;
+
+    /* NEW (vers. 4) Detected hw architecture */
+    __u32       architecture;
+
+    /* The device tree (internal addresses relative to the beginning of the tree,
+     * device tree offset relative to the beginning of this structure).
+     * On pre-PCI macintosh (BOOT_ARCH_PCI bit set to 0 in architecture), this
+     * field is 0.
+     */
+    __u32       deviceTreeOffset;        /* Device tree offset */
+    __u32       deviceTreeSize;          /* Size of the device tree */
+
+    /* Some infos about the current MacOS display */
+    __u32       dispDeviceRect[4];       /* left,top,right,bottom */
+    __u32       dispDeviceDepth;         /* (8, 16 or 32) */
+    __u8*       dispDeviceBase;          /* base address (physical) */
+    __u32       dispDeviceRowBytes;      /* rowbytes (in bytes) */
+    __u32       dispDeviceColorsOffset;  /* Colormap (8 bits only) or 0 (*) */
+    /* Optional offset in the registry to the current
+     * MacOS display. (Can be 0 when not detected) */
+     __u32      dispDeviceRegEntryOffset;
+
+    /* Optional pointer to boot ramdisk (offset from this structure) */
+    __u32       ramDisk;
+    __u32       ramDiskSize;             /* size of ramdisk image */
+
+    /* Kernel command line arguments (offset from this structure) */
+    __u32       kernelParamsOffset;
+
+    /* ALL BELOW NEW (vers. 4) */
+
+    /* This defines the physical memory. Valid with BOOT_ARCH_NUBUS flag
+       (non-PCI) only. On PCI, memory is contiguous and it's size is in the
+       device-tree. */
+    boot_info_map_entry_t
+    	        physMemoryMap[MAX_MEM_MAP_SIZE]; /* Where the phys memory is */
+    __u32       physMemoryMapSize;               /* How many entries in map */
+
+
+    /* The framebuffer size (optional, currently 0) */
+    __u32       frameBufferSize;         /* Represents a max size, can be 0. */
+
+    /* NEW (vers. 5) */
+
+    /* Total params size (args + colormap + device tree + ramdisk) */
+    __u32       totalParamsSize;
+
+} boot_infos_t;
+
+
+#ifdef macintosh
+#pragma options align=reset
+#endif
+
+#endif /* _UAPI__ASM_BOOTX_H__ */
diff --git a/arch/powerpc/include/asm/byteorder.h b/arch/powerpc/include/uapi/asm/byteorder.h
index aa6cc4fac96..aa6cc4fac96 100644
--- a/arch/powerpc/include/asm/byteorder.h
+++ b/arch/powerpc/include/uapi/asm/byteorder.h
diff --git a/arch/powerpc/include/uapi/asm/cputable.h b/arch/powerpc/include/uapi/asm/cputable.h
new file mode 100644
index 00000000000..ed9dd815696
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/cputable.h
@@ -0,0 +1,36 @@
+#ifndef _UAPI__ASM_POWERPC_CPUTABLE_H
+#define _UAPI__ASM_POWERPC_CPUTABLE_H
+
+#define PPC_FEATURE_32			0x80000000
+#define PPC_FEATURE_64			0x40000000
+#define PPC_FEATURE_601_INSTR		0x20000000
+#define PPC_FEATURE_HAS_ALTIVEC		0x10000000
+#define PPC_FEATURE_HAS_FPU		0x08000000
+#define PPC_FEATURE_HAS_MMU		0x04000000
+#define PPC_FEATURE_HAS_4xxMAC		0x02000000
+#define PPC_FEATURE_UNIFIED_CACHE	0x01000000
+#define PPC_FEATURE_HAS_SPE		0x00800000
+#define PPC_FEATURE_HAS_EFP_SINGLE	0x00400000
+#define PPC_FEATURE_HAS_EFP_DOUBLE	0x00200000
+#define PPC_FEATURE_NO_TB		0x00100000
+#define PPC_FEATURE_POWER4		0x00080000
+#define PPC_FEATURE_POWER5		0x00040000
+#define PPC_FEATURE_POWER5_PLUS		0x00020000
+#define PPC_FEATURE_CELL		0x00010000
+#define PPC_FEATURE_BOOKE		0x00008000
+#define PPC_FEATURE_SMT			0x00004000
+#define PPC_FEATURE_ICACHE_SNOOP	0x00002000
+#define PPC_FEATURE_ARCH_2_05		0x00001000
+#define PPC_FEATURE_PA6T		0x00000800
+#define PPC_FEATURE_HAS_DFP		0x00000400
+#define PPC_FEATURE_POWER6_EXT		0x00000200
+#define PPC_FEATURE_ARCH_2_06		0x00000100
+#define PPC_FEATURE_HAS_VSX		0x00000080
+
+#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
+					0x00000040
+
+#define PPC_FEATURE_TRUE_LE		0x00000002
+#define PPC_FEATURE_PPC_LE		0x00000001
+
+#endif /* _UAPI__ASM_POWERPC_CPUTABLE_H */
diff --git a/arch/powerpc/include/uapi/asm/elf.h b/arch/powerpc/include/uapi/asm/elf.h
new file mode 100644
index 00000000000..05b8d560cfb
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/elf.h
@@ -0,0 +1,307 @@
+/*
+ * ELF register definitions..
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_POWERPC_ELF_H
+#define _UAPI_ASM_POWERPC_ELF_H
+
+
+#include <linux/types.h>
+
+#include <asm/ptrace.h>
+#include <asm/cputable.h>
+#include <asm/auxvec.h>
+
+/* PowerPC relocations defined by the ABIs */
+#define R_PPC_NONE		0
+#define R_PPC_ADDR32		1	/* 32bit absolute address */
+#define R_PPC_ADDR24		2	/* 26bit address, 2 bits ignored.  */
+#define R_PPC_ADDR16		3	/* 16bit absolute address */
+#define R_PPC_ADDR16_LO		4	/* lower 16bit of absolute address */
+#define R_PPC_ADDR16_HI		5	/* high 16bit of absolute address */
+#define R_PPC_ADDR16_HA		6	/* adjusted high 16bit */
+#define R_PPC_ADDR14		7	/* 16bit address, 2 bits ignored */
+#define R_PPC_ADDR14_BRTAKEN	8
+#define R_PPC_ADDR14_BRNTAKEN	9
+#define R_PPC_REL24		10	/* PC relative 26 bit */
+#define R_PPC_REL14		11	/* PC relative 16 bit */
+#define R_PPC_REL14_BRTAKEN	12
+#define R_PPC_REL14_BRNTAKEN	13
+#define R_PPC_GOT16		14
+#define R_PPC_GOT16_LO		15
+#define R_PPC_GOT16_HI		16
+#define R_PPC_GOT16_HA		17
+#define R_PPC_PLTREL24		18
+#define R_PPC_COPY		19
+#define R_PPC_GLOB_DAT		20
+#define R_PPC_JMP_SLOT		21
+#define R_PPC_RELATIVE		22
+#define R_PPC_LOCAL24PC		23
+#define R_PPC_UADDR32		24
+#define R_PPC_UADDR16		25
+#define R_PPC_REL32		26
+#define R_PPC_PLT32		27
+#define R_PPC_PLTREL32		28
+#define R_PPC_PLT16_LO		29
+#define R_PPC_PLT16_HI		30
+#define R_PPC_PLT16_HA		31
+#define R_PPC_SDAREL16		32
+#define R_PPC_SECTOFF		33
+#define R_PPC_SECTOFF_LO	34
+#define R_PPC_SECTOFF_HI	35
+#define R_PPC_SECTOFF_HA	36
+
+/* PowerPC relocations defined for the TLS access ABI.  */
+#define R_PPC_TLS		67 /* none	(sym+add)@tls */
+#define R_PPC_DTPMOD32		68 /* word32	(sym+add)@dtpmod */
+#define R_PPC_TPREL16		69 /* half16*	(sym+add)@tprel */
+#define R_PPC_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
+#define R_PPC_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
+#define R_PPC_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
+#define R_PPC_TPREL32		73 /* word32	(sym+add)@tprel */
+#define R_PPC_DTPREL16		74 /* half16*	(sym+add)@dtprel */
+#define R_PPC_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
+#define R_PPC_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
+#define R_PPC_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
+#define R_PPC_DTPREL32		78 /* word32	(sym+add)@dtprel */
+#define R_PPC_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
+#define R_PPC_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
+#define R_PPC_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
+#define R_PPC_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
+#define R_PPC_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
+#define R_PPC_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
+#define R_PPC_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
+#define R_PPC_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
+#define R_PPC_GOT_TPREL16	87 /* half16*	(sym+add)@got@tprel */
+#define R_PPC_GOT_TPREL16_LO	88 /* half16	(sym+add)@got@tprel@l */
+#define R_PPC_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
+#define R_PPC_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
+#define R_PPC_GOT_DTPREL16	91 /* half16*	(sym+add)@got@dtprel */
+#define R_PPC_GOT_DTPREL16_LO	92 /* half16*	(sym+add)@got@dtprel@l */
+#define R_PPC_GOT_DTPREL16_HI	93 /* half16*	(sym+add)@got@dtprel@h */
+#define R_PPC_GOT_DTPREL16_HA	94 /* half16*	(sym+add)@got@dtprel@ha */
+
+/* keep this the last entry. */
+#define R_PPC_NUM		95
+
+
+#define ELF_NGREG	48	/* includes nip, msr, lr, etc. */
+#define ELF_NFPREG	33	/* includes fpscr */
+
+typedef unsigned long elf_greg_t64;
+typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
+
+typedef unsigned int elf_greg_t32;
+typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
+typedef elf_gregset_t32 compat_elf_gregset_t;
+
+/*
+ * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
+ */
+#ifdef __powerpc64__
+# define ELF_NVRREG32	33	/* includes vscr & vrsave stuffed together */
+# define ELF_NVRREG	34	/* includes vscr & vrsave in split vectors */
+# define ELF_NVSRHALFREG 32	/* Half the vsx registers */
+# define ELF_GREG_TYPE	elf_greg_t64
+#else
+# define ELF_NEVRREG	34	/* includes acc (as 2) */
+# define ELF_NVRREG	33	/* includes vscr */
+# define ELF_GREG_TYPE	elf_greg_t32
+# define ELF_ARCH	EM_PPC
+# define ELF_CLASS	ELFCLASS32
+# define ELF_DATA	ELFDATA2MSB
+#endif /* __powerpc64__ */
+
+#ifndef ELF_ARCH
+# define ELF_ARCH	EM_PPC64
+# define ELF_CLASS	ELFCLASS64
+# define ELF_DATA	ELFDATA2MSB
+  typedef elf_greg_t64 elf_greg_t;
+  typedef elf_gregset_t64 elf_gregset_t;
+#else
+  /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
+  typedef elf_greg_t32 elf_greg_t;
+  typedef elf_gregset_t32 elf_gregset_t;
+#endif /* ELF_ARCH */
+
+/* Floating point registers */
+typedef double elf_fpreg_t;
+typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
+
+/* Altivec registers */
+/*
+ * The entries with indexes 0-31 contain the corresponding vector registers. 
+ * The entry with index 32 contains the vscr as the last word (offset 12) 
+ * within the quadword.  This allows the vscr to be stored as either a 
+ * quadword (since it must be copied via a vector register to/from storage) 
+ * or as a word.  
+ *
+ * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first  
+ * word (offset 0) within the quadword.
+ *
+ * This definition of the VMX state is compatible with the current PPC32 
+ * ptrace interface.  This allows signal handling and ptrace to use the same 
+ * structures.  This also simplifies the implementation of a bi-arch 
+ * (combined (32- and 64-bit) gdb.
+ *
+ * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
+ * vrsave along with vscr and so only uses 33 vectors for the register set
+ */
+typedef __vector128 elf_vrreg_t;
+typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
+#ifdef __powerpc64__
+typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
+typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
+#endif
+
+
+/*
+ * The requirements here are:
+ * - keep the final alignment of sp (sp & 0xf)
+ * - make sure the 32-bit value at the first 16 byte aligned position of
+ *   AUXV is greater than 16 for glibc compatibility.
+ *   AT_IGNOREPPC is used for that.
+ * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
+ *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
+ * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
+ */
+#define ARCH_DLINFO							\
+do {									\
+	/* Handle glibc compatibility. */				\
+	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\
+	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\
+	/* Cache size items */						\
+	NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);			\
+	NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);			\
+	NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);			\
+	VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);	\
+} while (0)
+
+/* PowerPC64 relocations defined by the ABIs */
+#define R_PPC64_NONE    R_PPC_NONE
+#define R_PPC64_ADDR32  R_PPC_ADDR32  /* 32bit absolute address.  */
+#define R_PPC64_ADDR24  R_PPC_ADDR24  /* 26bit address, word aligned.  */
+#define R_PPC64_ADDR16  R_PPC_ADDR16  /* 16bit absolute address. */
+#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address.  */
+#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
+#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits.  */
+#define R_PPC64_ADDR14 R_PPC_ADDR14   /* 16bit address, word aligned.  */
+#define R_PPC64_ADDR14_BRTAKEN  R_PPC_ADDR14_BRTAKEN
+#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
+#define R_PPC64_REL24   R_PPC_REL24 /* PC relative 26 bit, word aligned.  */
+#define R_PPC64_REL14   R_PPC_REL14 /* PC relative 16 bit. */
+#define R_PPC64_REL14_BRTAKEN   R_PPC_REL14_BRTAKEN
+#define R_PPC64_REL14_BRNTAKEN  R_PPC_REL14_BRNTAKEN
+#define R_PPC64_GOT16     R_PPC_GOT16
+#define R_PPC64_GOT16_LO  R_PPC_GOT16_LO
+#define R_PPC64_GOT16_HI  R_PPC_GOT16_HI
+#define R_PPC64_GOT16_HA  R_PPC_GOT16_HA
+
+#define R_PPC64_COPY      R_PPC_COPY
+#define R_PPC64_GLOB_DAT  R_PPC_GLOB_DAT
+#define R_PPC64_JMP_SLOT  R_PPC_JMP_SLOT
+#define R_PPC64_RELATIVE  R_PPC_RELATIVE
+
+#define R_PPC64_UADDR32   R_PPC_UADDR32
+#define R_PPC64_UADDR16   R_PPC_UADDR16
+#define R_PPC64_REL32     R_PPC_REL32
+#define R_PPC64_PLT32     R_PPC_PLT32
+#define R_PPC64_PLTREL32  R_PPC_PLTREL32
+#define R_PPC64_PLT16_LO  R_PPC_PLT16_LO
+#define R_PPC64_PLT16_HI  R_PPC_PLT16_HI
+#define R_PPC64_PLT16_HA  R_PPC_PLT16_HA
+
+#define R_PPC64_SECTOFF     R_PPC_SECTOFF
+#define R_PPC64_SECTOFF_LO  R_PPC_SECTOFF_LO
+#define R_PPC64_SECTOFF_HI  R_PPC_SECTOFF_HI
+#define R_PPC64_SECTOFF_HA  R_PPC_SECTOFF_HA
+#define R_PPC64_ADDR30          37  /* word30 (S + A - P) >> 2.  */
+#define R_PPC64_ADDR64          38  /* doubleword64 S + A.  */
+#define R_PPC64_ADDR16_HIGHER   39  /* half16 #higher(S + A).  */
+#define R_PPC64_ADDR16_HIGHERA  40  /* half16 #highera(S + A).  */
+#define R_PPC64_ADDR16_HIGHEST  41  /* half16 #highest(S + A).  */
+#define R_PPC64_ADDR16_HIGHESTA 42  /* half16 #highesta(S + A). */
+#define R_PPC64_UADDR64     43  /* doubleword64 S + A.  */
+#define R_PPC64_REL64       44  /* doubleword64 S + A - P.  */
+#define R_PPC64_PLT64       45  /* doubleword64 L + A.  */
+#define R_PPC64_PLTREL64    46  /* doubleword64 L + A - P.  */
+#define R_PPC64_TOC16       47  /* half16* S + A - .TOC.  */
+#define R_PPC64_TOC16_LO    48  /* half16 #lo(S + A - .TOC.).  */
+#define R_PPC64_TOC16_HI    49  /* half16 #hi(S + A - .TOC.).  */
+#define R_PPC64_TOC16_HA    50  /* half16 #ha(S + A - .TOC.).  */
+#define R_PPC64_TOC         51  /* doubleword64 .TOC. */
+#define R_PPC64_PLTGOT16    52  /* half16* M + A.  */
+#define R_PPC64_PLTGOT16_LO 53  /* half16 #lo(M + A).  */
+#define R_PPC64_PLTGOT16_HI 54  /* half16 #hi(M + A).  */
+#define R_PPC64_PLTGOT16_HA 55  /* half16 #ha(M + A).  */
+
+#define R_PPC64_ADDR16_DS      56 /* half16ds* (S + A) >> 2.  */
+#define R_PPC64_ADDR16_LO_DS   57 /* half16ds  #lo(S + A) >> 2.  */
+#define R_PPC64_GOT16_DS       58 /* half16ds* (G + A) >> 2.  */
+#define R_PPC64_GOT16_LO_DS    59 /* half16ds  #lo(G + A) >> 2.  */
+#define R_PPC64_PLT16_LO_DS    60 /* half16ds  #lo(L + A) >> 2.  */
+#define R_PPC64_SECTOFF_DS     61 /* half16ds* (R + A) >> 2.  */
+#define R_PPC64_SECTOFF_LO_DS  62 /* half16ds  #lo(R + A) >> 2.  */
+#define R_PPC64_TOC16_DS       63 /* half16ds* (S + A - .TOC.) >> 2.  */
+#define R_PPC64_TOC16_LO_DS    64 /* half16ds  #lo(S + A - .TOC.) >> 2.  */
+#define R_PPC64_PLTGOT16_DS    65 /* half16ds* (M + A) >> 2.  */
+#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds  #lo(M + A) >> 2.  */
+
+/* PowerPC64 relocations defined for the TLS access ABI.  */
+#define R_PPC64_TLS		67 /* none	(sym+add)@tls */
+#define R_PPC64_DTPMOD64	68 /* doubleword64 (sym+add)@dtpmod */
+#define R_PPC64_TPREL16		69 /* half16*	(sym+add)@tprel */
+#define R_PPC64_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
+#define R_PPC64_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
+#define R_PPC64_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
+#define R_PPC64_TPREL64		73 /* doubleword64 (sym+add)@tprel */
+#define R_PPC64_DTPREL16	74 /* half16*	(sym+add)@dtprel */
+#define R_PPC64_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
+#define R_PPC64_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
+#define R_PPC64_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
+#define R_PPC64_DTPREL64	78 /* doubleword64 (sym+add)@dtprel */
+#define R_PPC64_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
+#define R_PPC64_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
+#define R_PPC64_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
+#define R_PPC64_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
+#define R_PPC64_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
+#define R_PPC64_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
+#define R_PPC64_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
+#define R_PPC64_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
+#define R_PPC64_GOT_TPREL16_DS	87 /* half16ds*	(sym+add)@got@tprel */
+#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
+#define R_PPC64_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
+#define R_PPC64_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
+#define R_PPC64_GOT_DTPREL16_DS	91 /* half16ds*	(sym+add)@got@dtprel */
+#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
+#define R_PPC64_GOT_DTPREL16_HI	93 /* half16	(sym+add)@got@dtprel@h */
+#define R_PPC64_GOT_DTPREL16_HA	94 /* half16	(sym+add)@got@dtprel@ha */
+#define R_PPC64_TPREL16_DS	95 /* half16ds*	(sym+add)@tprel */
+#define R_PPC64_TPREL16_LO_DS	96 /* half16ds	(sym+add)@tprel@l */
+#define R_PPC64_TPREL16_HIGHER	97 /* half16	(sym+add)@tprel@higher */
+#define R_PPC64_TPREL16_HIGHERA	98 /* half16	(sym+add)@tprel@highera */
+#define R_PPC64_TPREL16_HIGHEST	99 /* half16	(sym+add)@tprel@highest */
+#define R_PPC64_TPREL16_HIGHESTA 100 /* half16	(sym+add)@tprel@highesta */
+#define R_PPC64_DTPREL16_DS	101 /* half16ds* (sym+add)@dtprel */
+#define R_PPC64_DTPREL16_LO_DS	102 /* half16ds	(sym+add)@dtprel@l */
+#define R_PPC64_DTPREL16_HIGHER	103 /* half16	(sym+add)@dtprel@higher */
+#define R_PPC64_DTPREL16_HIGHERA 104 /* half16	(sym+add)@dtprel@highera */
+#define R_PPC64_DTPREL16_HIGHEST 105 /* half16	(sym+add)@dtprel@highest */
+#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16	(sym+add)@dtprel@highesta */
+
+/* Keep this the last entry.  */
+#define R_PPC64_NUM		107
+
+/* There's actually a third entry here, but it's unused */
+struct ppc64_opd_entry
+{
+	unsigned long funcaddr;
+	unsigned long r2;
+};
+
+
+#endif /* _UAPI_ASM_POWERPC_ELF_H */
diff --git a/arch/powerpc/include/asm/errno.h b/arch/powerpc/include/uapi/asm/errno.h
index 8c145fd17d8..8c145fd17d8 100644
--- a/arch/powerpc/include/asm/errno.h
+++ b/arch/powerpc/include/uapi/asm/errno.h
diff --git a/arch/powerpc/include/asm/fcntl.h b/arch/powerpc/include/uapi/asm/fcntl.h
index ce5c4516d40..ce5c4516d40 100644
--- a/arch/powerpc/include/asm/fcntl.h
+++ b/arch/powerpc/include/uapi/asm/fcntl.h
diff --git a/arch/powerpc/include/asm/ioctl.h b/arch/powerpc/include/uapi/asm/ioctl.h
index 57d68304218..57d68304218 100644
--- a/arch/powerpc/include/asm/ioctl.h
+++ b/arch/powerpc/include/uapi/asm/ioctl.h
diff --git a/arch/powerpc/include/asm/ioctls.h b/arch/powerpc/include/uapi/asm/ioctls.h
index e9b78870aaa..e9b78870aaa 100644
--- a/arch/powerpc/include/asm/ioctls.h
+++ b/arch/powerpc/include/uapi/asm/ioctls.h
diff --git a/arch/powerpc/include/asm/ipcbuf.h b/arch/powerpc/include/uapi/asm/ipcbuf.h
index 2c3e1d94db1..2c3e1d94db1 100644
--- a/arch/powerpc/include/asm/ipcbuf.h
+++ b/arch/powerpc/include/uapi/asm/ipcbuf.h
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h
index 1bea4d8ea6f..1bea4d8ea6f 100644
--- a/arch/powerpc/include/asm/kvm.h
+++ b/arch/powerpc/include/uapi/asm/kvm.h
diff --git a/arch/powerpc/include/uapi/asm/kvm_para.h b/arch/powerpc/include/uapi/asm/kvm_para.h
new file mode 100644
index 00000000000..5e04383a1db
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/kvm_para.h
@@ -0,0 +1,90 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ */
+
+#ifndef _UAPI__POWERPC_KVM_PARA_H__
+#define _UAPI__POWERPC_KVM_PARA_H__
+
+#include <linux/types.h>
+
+/*
+ * Additions to this struct must only occur at the end, and should be
+ * accompanied by a KVM_MAGIC_FEAT flag to advertise that they are present
+ * (albeit not necessarily relevant to the current target hardware platform).
+ *
+ * Struct fields are always 32 or 64 bit aligned, depending on them being 32
+ * or 64 bit wide respectively.
+ *
+ * See Documentation/virtual/kvm/ppc-pv.txt
+ */
+struct kvm_vcpu_arch_shared {
+	__u64 scratch1;
+	__u64 scratch2;
+	__u64 scratch3;
+	__u64 critical;		/* Guest may not get interrupts if == r1 */
+	__u64 sprg0;
+	__u64 sprg1;
+	__u64 sprg2;
+	__u64 sprg3;
+	__u64 srr0;
+	__u64 srr1;
+	__u64 dar;		/* dear on BookE */
+	__u64 msr;
+	__u32 dsisr;
+	__u32 int_pending;	/* Tells the guest if we have an interrupt */
+	__u32 sr[16];
+	__u32 mas0;
+	__u32 mas1;
+	__u64 mas7_3;
+	__u64 mas2;
+	__u32 mas4;
+	__u32 mas6;
+	__u32 esr;
+	__u32 pir;
+
+	/*
+	 * SPRG4-7 are user-readable, so we can only keep these consistent
+	 * between the shared area and the real registers when there's an
+	 * intervening exit to KVM.  This also applies to SPRG3 on some
+	 * chips.
+	 *
+	 * This suffices for access by guest userspace, since in PR-mode
+	 * KVM, an exit must occur when changing the guest's MSR[PR].
+	 * If the guest kernel writes to SPRG3-7 via the shared area, it
+	 * must also use the shared area for reading while in kernel space.
+	 */
+	__u64 sprg4;
+	__u64 sprg5;
+	__u64 sprg6;
+	__u64 sprg7;
+};
+
+#define KVM_SC_MAGIC_R0		0x4b564d21 /* "KVM!" */
+#define HC_VENDOR_KVM		(42 << 16)
+#define HC_EV_SUCCESS		0
+#define HC_EV_UNIMPLEMENTED	12
+
+#define KVM_FEATURE_MAGIC_PAGE	1
+
+#define KVM_MAGIC_FEAT_SR		(1 << 0)
+
+/* MASn, ESR, PIR, and high SPRGs */
+#define KVM_MAGIC_FEAT_MAS0_TO_SPRG7	(1 << 1)
+
+
+#endif /* _UAPI__POWERPC_KVM_PARA_H__ */
diff --git a/arch/powerpc/include/asm/linkage.h b/arch/powerpc/include/uapi/asm/linkage.h
index e1c4ac1cc4b..e1c4ac1cc4b 100644
--- a/arch/powerpc/include/asm/linkage.h
+++ b/arch/powerpc/include/uapi/asm/linkage.h
diff --git a/arch/powerpc/include/uapi/asm/mman.h b/arch/powerpc/include/uapi/asm/mman.h
new file mode 100644
index 00000000000..6ea26df0a73
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/mman.h
@@ -0,0 +1,31 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_POWERPC_MMAN_H
+#define _UAPI_ASM_POWERPC_MMAN_H
+
+#include <asm-generic/mman-common.h>
+
+
+#define PROT_SAO	0x10		/* Strong Access Ordering */
+
+#define MAP_RENAME      MAP_ANONYMOUS   /* In SunOS terminology */
+#define MAP_NORESERVE   0x40            /* don't reserve swap pages */
+#define MAP_LOCKED	0x80
+
+#define MAP_GROWSDOWN	0x0100		/* stack-like segment */
+#define MAP_DENYWRITE	0x0800		/* ETXTBSY */
+#define MAP_EXECUTABLE	0x1000		/* mark it as an executable */
+
+#define MCL_CURRENT     0x2000          /* lock all currently mapped pages */
+#define MCL_FUTURE      0x4000          /* lock all additions to address space */
+
+#define MAP_POPULATE	0x8000		/* populate (prefault) pagetables */
+#define MAP_NONBLOCK	0x10000		/* do not block on IO */
+#define MAP_STACK	0x20000		/* give out an address that is best suited for process/thread stacks */
+#define MAP_HUGETLB	0x40000		/* create a huge page mapping */
+
+#endif /* _UAPI_ASM_POWERPC_MMAN_H */
diff --git a/arch/powerpc/include/asm/msgbuf.h b/arch/powerpc/include/uapi/asm/msgbuf.h
index dd76743c753..dd76743c753 100644
--- a/arch/powerpc/include/asm/msgbuf.h
+++ b/arch/powerpc/include/uapi/asm/msgbuf.h
diff --git a/arch/powerpc/include/uapi/asm/nvram.h b/arch/powerpc/include/uapi/asm/nvram.h
new file mode 100644
index 00000000000..608bdc8aedd
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/nvram.h
@@ -0,0 +1,62 @@
+/*
+ * NVRAM definitions and access functions.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _UAPI_ASM_POWERPC_NVRAM_H
+#define _UAPI_ASM_POWERPC_NVRAM_H
+
+/* Signatures for nvram partitions */
+#define NVRAM_SIG_SP	0x02	/* support processor */
+#define NVRAM_SIG_OF	0x50	/* open firmware config */
+#define NVRAM_SIG_FW	0x51	/* general firmware */
+#define NVRAM_SIG_HW	0x52	/* hardware (VPD) */
+#define NVRAM_SIG_FLIP	0x5a	/* Apple flip/flop header */
+#define NVRAM_SIG_APPL	0x5f	/* Apple "system" (???) */
+#define NVRAM_SIG_SYS	0x70	/* system env vars */
+#define NVRAM_SIG_CFG	0x71	/* config data */
+#define NVRAM_SIG_ELOG	0x72	/* error log */
+#define NVRAM_SIG_VEND	0x7e	/* vendor defined */
+#define NVRAM_SIG_FREE	0x7f	/* Free space */
+#define NVRAM_SIG_OS	0xa0	/* OS defined */
+#define NVRAM_SIG_PANIC	0xa1	/* Apple OSX "panic" */
+
+
+/* PowerMac specific nvram stuffs */
+
+enum {
+	pmac_nvram_OF,		/* Open Firmware partition */
+	pmac_nvram_XPRAM,	/* MacOS XPRAM partition */
+	pmac_nvram_NR		/* MacOS Name Registry partition */
+};
+
+
+/* Some offsets in XPRAM */
+#define PMAC_XPRAM_MACHINE_LOC	0xe4
+#define PMAC_XPRAM_SOUND_VOLUME	0x08
+
+/* Machine location structure in PowerMac XPRAM */
+struct pmac_machine_location {
+	unsigned int	latitude;	/* 2+30 bit Fractional number */
+	unsigned int	longitude;	/* 2+30 bit Fractional number */
+	unsigned int	delta;		/* mix of GMT delta and DLS */
+};
+
+/*
+ * /dev/nvram ioctls
+ *
+ * Note that PMAC_NVRAM_GET_OFFSET is still supported, but is
+ * definitely obsolete. Do not use it if you can avoid it
+ */
+
+#define OBSOLETE_PMAC_NVRAM_GET_OFFSET \
+				_IOWR('p', 0x40, int)
+
+#define IOC_NVRAM_GET_OFFSET	_IOWR('p', 0x42, int)	/* Get NVRAM partition offset */
+#define IOC_NVRAM_SYNC		_IO('p', 0x43)		/* Sync NVRAM image */
+
+#endif /* _UAPI_ASM_POWERPC_NVRAM_H */
diff --git a/arch/powerpc/include/asm/param.h b/arch/powerpc/include/uapi/asm/param.h
index 965d4542797..965d4542797 100644
--- a/arch/powerpc/include/asm/param.h
+++ b/arch/powerpc/include/uapi/asm/param.h
diff --git a/arch/powerpc/include/asm/poll.h b/arch/powerpc/include/uapi/asm/poll.h
index c98509d3149..c98509d3149 100644
--- a/arch/powerpc/include/asm/poll.h
+++ b/arch/powerpc/include/uapi/asm/poll.h
diff --git a/arch/powerpc/include/asm/posix_types.h b/arch/powerpc/include/uapi/asm/posix_types.h
index 2958c5b97b2..2958c5b97b2 100644
--- a/arch/powerpc/include/asm/posix_types.h
+++ b/arch/powerpc/include/uapi/asm/posix_types.h
diff --git a/arch/powerpc/include/asm/ps3fb.h b/arch/powerpc/include/uapi/asm/ps3fb.h
index e7233a84968..e7233a84968 100644
--- a/arch/powerpc/include/asm/ps3fb.h
+++ b/arch/powerpc/include/uapi/asm/ps3fb.h
diff --git a/arch/powerpc/include/uapi/asm/ptrace.h b/arch/powerpc/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..ee67a2bc91b
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/ptrace.h
@@ -0,0 +1,259 @@
+/*
+ * Copyright (C) 2001 PPC64 Team, IBM Corp
+ *
+ * This struct defines the way the registers are stored on the
+ * kernel stack during a system call or other kernel entry.
+ *
+ * this should only contain volatile regs
+ * since we can keep non-volatile in the thread_struct
+ * should set this up when only volatiles are saved
+ * by intr code.
+ *
+ * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
+ * that the overall structure is a multiple of 16 bytes in length.
+ *
+ * Note that the offsets of the fields in this struct correspond with
+ * the PT_* values below.  This simplifies arch/powerpc/kernel/ptrace.c.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_POWERPC_PTRACE_H
+#define _UAPI_ASM_POWERPC_PTRACE_H
+
+
+#include <linux/types.h>
+
+#ifndef __ASSEMBLY__
+
+struct pt_regs {
+	unsigned long gpr[32];
+	unsigned long nip;
+	unsigned long msr;
+	unsigned long orig_gpr3;	/* Used for restarting system calls */
+	unsigned long ctr;
+	unsigned long link;
+	unsigned long xer;
+	unsigned long ccr;
+#ifdef __powerpc64__
+	unsigned long softe;		/* Soft enabled/disabled */
+#else
+	unsigned long mq;		/* 601 only (not used at present) */
+					/* Used on APUS to hold IPL value. */
+#endif
+	unsigned long trap;		/* Reason for being here */
+	/* N.B. for critical exceptions on 4xx, the dar and dsisr
+	   fields are overloaded to hold srr0 and srr1. */
+	unsigned long dar;		/* Fault registers */
+	unsigned long dsisr;		/* on 4xx/Book-E used for ESR */
+	unsigned long result;		/* Result of a system call */
+};
+
+#endif /* __ASSEMBLY__ */
+
+
+/*
+ * Offsets used by 'ptrace' system call interface.
+ * These can't be changed without breaking binary compatibility
+ * with MkLinux, etc.
+ */
+#define PT_R0	0
+#define PT_R1	1
+#define PT_R2	2
+#define PT_R3	3
+#define PT_R4	4
+#define PT_R5	5
+#define PT_R6	6
+#define PT_R7	7
+#define PT_R8	8
+#define PT_R9	9
+#define PT_R10	10
+#define PT_R11	11
+#define PT_R12	12
+#define PT_R13	13
+#define PT_R14	14
+#define PT_R15	15
+#define PT_R16	16
+#define PT_R17	17
+#define PT_R18	18
+#define PT_R19	19
+#define PT_R20	20
+#define PT_R21	21
+#define PT_R22	22
+#define PT_R23	23
+#define PT_R24	24
+#define PT_R25	25
+#define PT_R26	26
+#define PT_R27	27
+#define PT_R28	28
+#define PT_R29	29
+#define PT_R30	30
+#define PT_R31	31
+
+#define PT_NIP	32
+#define PT_MSR	33
+#define PT_ORIG_R3 34
+#define PT_CTR	35
+#define PT_LNK	36
+#define PT_XER	37
+#define PT_CCR	38
+#ifndef __powerpc64__
+#define PT_MQ	39
+#else
+#define PT_SOFTE 39
+#endif
+#define PT_TRAP	40
+#define PT_DAR	41
+#define PT_DSISR 42
+#define PT_RESULT 43
+#define PT_REGS_COUNT 44
+
+#define PT_FPR0	48	/* each FP reg occupies 2 slots in this space */
+
+#ifndef __powerpc64__
+
+#define PT_FPR31 (PT_FPR0 + 2*31)
+#define PT_FPSCR (PT_FPR0 + 2*32 + 1)
+
+#else /* __powerpc64__ */
+
+#define PT_FPSCR (PT_FPR0 + 32)	/* each FP reg occupies 1 slot in 64-bit space */
+
+
+#define PT_VR0 82	/* each Vector reg occupies 2 slots in 64-bit */
+#define PT_VSCR (PT_VR0 + 32*2 + 1)
+#define PT_VRSAVE (PT_VR0 + 33*2)
+
+
+/*
+ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
+ */
+#define PT_VSR0 150	/* each VSR reg occupies 2 slots in 64-bit */
+#define PT_VSR31 (PT_VSR0 + 2*31)
+#endif /* __powerpc64__ */
+
+/*
+ * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
+ * The transfer totals 34 quadword.  Quadwords 0-31 contain the
+ * corresponding vector registers.  Quadword 32 contains the vscr as the
+ * last word (offset 12) within that quadword.  Quadword 33 contains the
+ * vrsave as the first word (offset 0) within the quadword.
+ *
+ * This definition of the VMX state is compatible with the current PPC32
+ * ptrace interface.  This allows signal handling and ptrace to use the same
+ * structures.  This also simplifies the implementation of a bi-arch
+ * (combined (32- and 64-bit) gdb.
+ */
+#define PTRACE_GETVRREGS	18
+#define PTRACE_SETVRREGS	19
+
+/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
+ * spefscr, in one go */
+#define PTRACE_GETEVRREGS	20
+#define PTRACE_SETEVRREGS	21
+
+/* Get the first 32 128bit VSX registers */
+#define PTRACE_GETVSRREGS	27
+#define PTRACE_SETVSRREGS	28
+
+/*
+ * Get or set a debug register. The first 16 are DABR registers and the
+ * second 16 are IABR registers.
+ */
+#define PTRACE_GET_DEBUGREG	25
+#define PTRACE_SET_DEBUGREG	26
+
+/* (new) PTRACE requests using the same numbers as x86 and the same
+ * argument ordering. Additionally, they support more registers too
+ */
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13
+#define PTRACE_GETFPREGS          14
+#define PTRACE_SETFPREGS          15
+#define PTRACE_GETREGS64	  22
+#define PTRACE_SETREGS64	  23
+
+/* Calls to trace a 64bit program from a 32bit program */
+#define PPC_PTRACE_PEEKTEXT_3264 0x95
+#define PPC_PTRACE_PEEKDATA_3264 0x94
+#define PPC_PTRACE_POKETEXT_3264 0x93
+#define PPC_PTRACE_POKEDATA_3264 0x92
+#define PPC_PTRACE_PEEKUSR_3264  0x91
+#define PPC_PTRACE_POKEUSR_3264  0x90
+
+#define PTRACE_SINGLEBLOCK	0x100	/* resume execution until next branch */
+
+#define PPC_PTRACE_GETHWDBGINFO	0x89
+#define PPC_PTRACE_SETHWDEBUG	0x88
+#define PPC_PTRACE_DELHWDEBUG	0x87
+
+#ifndef __ASSEMBLY__
+
+struct ppc_debug_info {
+	__u32 version;			/* Only version 1 exists to date */
+	__u32 num_instruction_bps;
+	__u32 num_data_bps;
+	__u32 num_condition_regs;
+	__u32 data_bp_alignment;
+	__u32 sizeof_condition;		/* size of the DVC register */
+	__u64 features;
+};
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * features will have bits indication whether there is support for:
+ */
+#define PPC_DEBUG_FEATURE_INSN_BP_RANGE		0x0000000000000001
+#define PPC_DEBUG_FEATURE_INSN_BP_MASK		0x0000000000000002
+#define PPC_DEBUG_FEATURE_DATA_BP_RANGE		0x0000000000000004
+#define PPC_DEBUG_FEATURE_DATA_BP_MASK		0x0000000000000008
+
+#ifndef __ASSEMBLY__
+
+struct ppc_hw_breakpoint {
+	__u32 version;		/* currently, version must be 1 */
+	__u32 trigger_type;	/* only some combinations allowed */
+	__u32 addr_mode;	/* address match mode */
+	__u32 condition_mode;	/* break/watchpoint condition flags */
+	__u64 addr;		/* break/watchpoint address */
+	__u64 addr2;		/* range end or mask */
+	__u64 condition_value;	/* contents of the DVC register */
+};
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * Trigger Type
+ */
+#define PPC_BREAKPOINT_TRIGGER_EXECUTE	0x00000001
+#define PPC_BREAKPOINT_TRIGGER_READ	0x00000002
+#define PPC_BREAKPOINT_TRIGGER_WRITE	0x00000004
+#define PPC_BREAKPOINT_TRIGGER_RW	\
+	(PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE)
+
+/*
+ * Address Mode
+ */
+#define PPC_BREAKPOINT_MODE_EXACT		0x00000000
+#define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE	0x00000001
+#define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE	0x00000002
+#define PPC_BREAKPOINT_MODE_MASK		0x00000003
+
+/*
+ * Condition Mode
+ */
+#define PPC_BREAKPOINT_CONDITION_MODE	0x00000003
+#define PPC_BREAKPOINT_CONDITION_NONE	0x00000000
+#define PPC_BREAKPOINT_CONDITION_AND	0x00000001
+#define PPC_BREAKPOINT_CONDITION_EXACT	PPC_BREAKPOINT_CONDITION_AND
+#define PPC_BREAKPOINT_CONDITION_OR	0x00000002
+#define PPC_BREAKPOINT_CONDITION_AND_OR	0x00000003
+#define PPC_BREAKPOINT_CONDITION_BE_ALL	0x00ff0000
+#define PPC_BREAKPOINT_CONDITION_BE_SHIFT	16
+#define PPC_BREAKPOINT_CONDITION_BE(n)	\
+	(1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
+
+#endif /* _UAPI_ASM_POWERPC_PTRACE_H */
diff --git a/arch/powerpc/include/asm/resource.h b/arch/powerpc/include/uapi/asm/resource.h
index 04bc4db8921..04bc4db8921 100644
--- a/arch/powerpc/include/asm/resource.h
+++ b/arch/powerpc/include/uapi/asm/resource.h
diff --git a/arch/powerpc/include/asm/seccomp.h b/arch/powerpc/include/uapi/asm/seccomp.h
index 00c1d9133cf..00c1d9133cf 100644
--- a/arch/powerpc/include/asm/seccomp.h
+++ b/arch/powerpc/include/uapi/asm/seccomp.h
diff --git a/arch/powerpc/include/asm/sembuf.h b/arch/powerpc/include/uapi/asm/sembuf.h
index 99a41938ae3..99a41938ae3 100644
--- a/arch/powerpc/include/asm/sembuf.h
+++ b/arch/powerpc/include/uapi/asm/sembuf.h
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/uapi/asm/setup.h
index 8b9a306260b..8b9a306260b 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/uapi/asm/setup.h
diff --git a/arch/powerpc/include/asm/shmbuf.h b/arch/powerpc/include/uapi/asm/shmbuf.h
index 8efa39698b6..8efa39698b6 100644
--- a/arch/powerpc/include/asm/shmbuf.h
+++ b/arch/powerpc/include/uapi/asm/shmbuf.h
diff --git a/arch/powerpc/include/asm/sigcontext.h b/arch/powerpc/include/uapi/asm/sigcontext.h
index 9c1f24fd5d1..9c1f24fd5d1 100644
--- a/arch/powerpc/include/asm/sigcontext.h
+++ b/arch/powerpc/include/uapi/asm/sigcontext.h
diff --git a/arch/powerpc/include/asm/siginfo.h b/arch/powerpc/include/uapi/asm/siginfo.h
index ccce3ef5cd8..ccce3ef5cd8 100644
--- a/arch/powerpc/include/asm/siginfo.h
+++ b/arch/powerpc/include/uapi/asm/siginfo.h
diff --git a/arch/powerpc/include/uapi/asm/signal.h b/arch/powerpc/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..48fa8d3f2f9
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/signal.h
@@ -0,0 +1,145 @@
+#ifndef _UAPI_ASM_POWERPC_SIGNAL_H
+#define _UAPI_ASM_POWERPC_SIGNAL_H
+
+#include <linux/types.h>
+
+#define _NSIG		64
+#ifdef __powerpc64__
+#define _NSIG_BPW	64
+#else
+#define _NSIG_BPW	32
+#endif
+#define _NSIG_WORDS	(_NSIG / _NSIG_BPW)
+
+typedef unsigned long old_sigset_t;		/* at least 32 bits */
+
+typedef struct {
+	unsigned long sig[_NSIG_WORDS];
+} sigset_t;
+
+#define SIGHUP		 1
+#define SIGINT		 2
+#define SIGQUIT		 3
+#define SIGILL		 4
+#define SIGTRAP		 5
+#define SIGABRT		 6
+#define SIGIOT		 6
+#define SIGBUS		 7
+#define SIGFPE		 8
+#define SIGKILL		 9
+#define SIGUSR1		10
+#define SIGSEGV		11
+#define SIGUSR2		12
+#define SIGPIPE		13
+#define SIGALRM		14
+#define SIGTERM		15
+#define SIGSTKFLT	16
+#define SIGCHLD		17
+#define SIGCONT		18
+#define SIGSTOP		19
+#define SIGTSTP		20
+#define SIGTTIN		21
+#define SIGTTOU		22
+#define SIGURG		23
+#define SIGXCPU		24
+#define SIGXFSZ		25
+#define SIGVTALRM	26
+#define SIGPROF		27
+#define SIGWINCH	28
+#define SIGIO		29
+#define SIGPOLL		SIGIO
+/*
+#define SIGLOST		29
+*/
+#define SIGPWR		30
+#define SIGSYS		31
+#define	SIGUNUSED	31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN	32
+#define SIGRTMAX	_NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK is not currently supported, but will allow sigaltstack(2).
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP	0x00000001U
+#define SA_NOCLDWAIT	0x00000002U
+#define SA_SIGINFO	0x00000004U
+#define SA_ONSTACK	0x08000000U
+#define SA_RESTART	0x10000000U
+#define SA_NODEFER	0x40000000U
+#define SA_RESETHAND	0x80000000U
+
+#define SA_NOMASK	SA_NODEFER
+#define SA_ONESHOT	SA_RESETHAND
+
+#define SA_RESTORER	0x04000000U
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK	1
+#define SS_DISABLE	2
+
+#define MINSIGSTKSZ	2048
+#define SIGSTKSZ	8192
+
+#include <asm-generic/signal-defs.h>
+
+struct old_sigaction {
+	__sighandler_t sa_handler;
+	old_sigset_t sa_mask;
+	unsigned long sa_flags;
+	__sigrestore_t sa_restorer;
+};
+
+struct sigaction {
+	__sighandler_t sa_handler;
+	unsigned long sa_flags;
+	__sigrestore_t sa_restorer;
+	sigset_t sa_mask;		/* mask last for extensibility */
+};
+
+struct k_sigaction {
+	struct sigaction sa;
+};
+
+typedef struct sigaltstack {
+	void __user *ss_sp;
+	int ss_flags;
+	size_t ss_size;
+} stack_t;
+
+
+#ifndef __powerpc64__
+/*
+ * These are parameters to dbg_sigreturn syscall.  They enable or
+ * disable certain debugging things that can be done from signal
+ * handlers.  The dbg_sigreturn syscall *must* be called from a
+ * SA_SIGINFO signal so the ucontext can be passed to it.  It takes an
+ * array of struct sig_dbg_op, which has the debug operations to
+ * perform before returning from the signal.
+ */
+struct sig_dbg_op {
+	int dbg_type;
+	unsigned long dbg_value;
+};
+
+/* Enable or disable single-stepping.  The value sets the state. */
+#define SIG_DBG_SINGLE_STEPPING		1
+
+/* Enable or disable branch tracing.  The value sets the state. */
+#define SIG_DBG_BRANCH_TRACING		2
+#endif /* ! __powerpc64__ */
+
+#endif /* _UAPI_ASM_POWERPC_SIGNAL_H */
diff --git a/arch/powerpc/include/asm/socket.h b/arch/powerpc/include/uapi/asm/socket.h
index 3d5179bb122..3d5179bb122 100644
--- a/arch/powerpc/include/asm/socket.h
+++ b/arch/powerpc/include/uapi/asm/socket.h
diff --git a/arch/powerpc/include/asm/sockios.h b/arch/powerpc/include/uapi/asm/sockios.h
index 55cef7675a3..55cef7675a3 100644
--- a/arch/powerpc/include/asm/sockios.h
+++ b/arch/powerpc/include/uapi/asm/sockios.h
diff --git a/arch/powerpc/include/uapi/asm/spu_info.h b/arch/powerpc/include/uapi/asm/spu_info.h
new file mode 100644
index 00000000000..ed071bf9770
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/spu_info.h
@@ -0,0 +1,53 @@
+/*
+ * SPU info structures
+ *
+ * (C) Copyright 2006 IBM Corp.
+ *
+ * Author: Dwayne Grant McConnell <decimal@us.ibm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _UAPI_SPU_INFO_H
+#define _UAPI_SPU_INFO_H
+
+#include <linux/types.h>
+
+#ifndef __KERNEL__
+struct mfc_cq_sr {
+	__u64 mfc_cq_data0_RW;
+	__u64 mfc_cq_data1_RW;
+	__u64 mfc_cq_data2_RW;
+	__u64 mfc_cq_data3_RW;
+};
+#endif /* __KERNEL__ */
+
+struct spu_dma_info {
+	__u64 dma_info_type;
+	__u64 dma_info_mask;
+	__u64 dma_info_status;
+	__u64 dma_info_stall_and_notify;
+	__u64 dma_info_atomic_command_status;
+	struct mfc_cq_sr dma_info_command_data[16];
+};
+
+struct spu_proxydma_info {
+	__u64 proxydma_info_type;
+	__u64 proxydma_info_mask;
+	__u64 proxydma_info_status;
+	struct mfc_cq_sr proxydma_info_command_data[8];
+};
+
+#endif /* _UAPI_SPU_INFO_H */
diff --git a/arch/powerpc/include/asm/stat.h b/arch/powerpc/include/uapi/asm/stat.h
index 84880b80cc1..84880b80cc1 100644
--- a/arch/powerpc/include/asm/stat.h
+++ b/arch/powerpc/include/uapi/asm/stat.h
diff --git a/arch/powerpc/include/asm/statfs.h b/arch/powerpc/include/uapi/asm/statfs.h
index 5244834583a..5244834583a 100644
--- a/arch/powerpc/include/asm/statfs.h
+++ b/arch/powerpc/include/uapi/asm/statfs.h
diff --git a/arch/powerpc/include/uapi/asm/swab.h b/arch/powerpc/include/uapi/asm/swab.h
new file mode 100644
index 00000000000..b6c368aa5c0
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/swab.h
@@ -0,0 +1,23 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_POWERPC_SWAB_H
+#define _UAPI_ASM_POWERPC_SWAB_H
+
+
+#include <linux/types.h>
+#include <linux/compiler.h>
+
+#ifdef __GNUC__
+
+#ifndef __powerpc64__
+#define __SWAB_64_THRU_32__
+#endif /* __powerpc64__ */
+
+
+#endif /* __GNUC__ */
+
+#endif /* _UAPI_ASM_POWERPC_SWAB_H */
diff --git a/arch/powerpc/include/asm/termbits.h b/arch/powerpc/include/uapi/asm/termbits.h
index 549d700e18f..549d700e18f 100644
--- a/arch/powerpc/include/asm/termbits.h
+++ b/arch/powerpc/include/uapi/asm/termbits.h
diff --git a/arch/powerpc/include/uapi/asm/termios.h b/arch/powerpc/include/uapi/asm/termios.h
new file mode 100644
index 00000000000..6cca5cdfec0
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/termios.h
@@ -0,0 +1,76 @@
+/*
+ * Liberally adapted from alpha/termios.h.  In particular, the c_cc[]
+ * fields have been reordered so that termio & termios share the
+ * common subset in the same order (for brain dead programs that don't
+ * know or care about the differences).
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_POWERPC_TERMIOS_H
+#define _UAPI_ASM_POWERPC_TERMIOS_H
+
+
+#include <asm/ioctls.h>
+#include <asm/termbits.h>
+
+struct sgttyb {
+	char	sg_ispeed;
+	char	sg_ospeed;
+	char	sg_erase;
+	char	sg_kill;
+	short	sg_flags;
+};
+
+struct tchars {
+	char	t_intrc;
+	char	t_quitc;
+	char	t_startc;
+	char	t_stopc;
+	char	t_eofc;
+	char	t_brkc;
+};
+
+struct ltchars {
+	char	t_suspc;
+	char	t_dsuspc;
+	char	t_rprntc;
+	char	t_flushc;
+	char	t_werasc;
+	char	t_lnextc;
+};
+
+struct winsize {
+	unsigned short ws_row;
+	unsigned short ws_col;
+	unsigned short ws_xpixel;
+	unsigned short ws_ypixel;
+};
+
+#define NCC 10
+struct termio {
+	unsigned short c_iflag;		/* input mode flags */
+	unsigned short c_oflag;		/* output mode flags */
+	unsigned short c_cflag;		/* control mode flags */
+	unsigned short c_lflag;		/* local mode flags */
+	unsigned char c_line;		/* line discipline */
+	unsigned char c_cc[NCC];	/* control characters */
+};
+
+/* c_cc characters */
+#define _VINTR	0
+#define _VQUIT	1
+#define _VERASE	2
+#define _VKILL	3
+#define _VEOF	4
+#define _VMIN	5
+#define _VEOL	6
+#define _VTIME	7
+#define _VEOL2	8
+#define _VSWTC	9
+
+
+
+#endif /* _UAPI_ASM_POWERPC_TERMIOS_H */
diff --git a/arch/powerpc/include/uapi/asm/types.h b/arch/powerpc/include/uapi/asm/types.h
new file mode 100644
index 00000000000..4b8ab990a3c
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/types.h
@@ -0,0 +1,40 @@
+/*
+ * This file is never included by application software unless
+ * explicitly requested (e.g., via linux/types.h) in which case the
+ * application is Linux specific so (user-) name space pollution is
+ * not a major issue.  However, for interoperability, libraries still
+ * need to be careful to avoid a name clashes.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_POWERPC_TYPES_H
+#define _UAPI_ASM_POWERPC_TYPES_H
+
+/*
+ * This is here because we used to use l64 for 64bit powerpc
+ * and we don't want to impact user mode with our change to ll64
+ * in the kernel.
+ *
+ * However, some user programs are fine with this.  They can
+ * flag __SANE_USERSPACE_TYPES__ to get int-ll64.h here.
+ */
+#if !defined(__SANE_USERSPACE_TYPES__) && defined(__powerpc64__) && !defined(__KERNEL__)
+# include <asm-generic/int-l64.h>
+#else
+# include <asm-generic/int-ll64.h>
+#endif
+
+#ifndef __ASSEMBLY__
+
+
+typedef struct {
+	__u32 u[4];
+} __attribute__((aligned(16))) __vector128;
+
+#endif /* __ASSEMBLY__ */
+
+
+#endif /* _UAPI_ASM_POWERPC_TYPES_H */
diff --git a/arch/powerpc/include/asm/ucontext.h b/arch/powerpc/include/uapi/asm/ucontext.h
index d9a4ddf0cc8..d9a4ddf0cc8 100644
--- a/arch/powerpc/include/asm/ucontext.h
+++ b/arch/powerpc/include/uapi/asm/ucontext.h
diff --git a/arch/powerpc/include/uapi/asm/unistd.h b/arch/powerpc/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..380b5d37a90
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/unistd.h
@@ -0,0 +1,380 @@
+/*
+ * This file contains the system call numbers.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef _UAPI_ASM_POWERPC_UNISTD_H_
+#define _UAPI_ASM_POWERPC_UNISTD_H_
+
+
+#define __NR_restart_syscall	  0
+#define __NR_exit		  1
+#define __NR_fork		  2
+#define __NR_read		  3
+#define __NR_write		  4
+#define __NR_open		  5
+#define __NR_close		  6
+#define __NR_waitpid		  7
+#define __NR_creat		  8
+#define __NR_link		  9
+#define __NR_unlink		 10
+#define __NR_execve		 11
+#define __NR_chdir		 12
+#define __NR_time		 13
+#define __NR_mknod		 14
+#define __NR_chmod		 15
+#define __NR_lchown		 16
+#define __NR_break		 17
+#define __NR_oldstat		 18
+#define __NR_lseek		 19
+#define __NR_getpid		 20
+#define __NR_mount		 21
+#define __NR_umount		 22
+#define __NR_setuid		 23
+#define __NR_getuid		 24
+#define __NR_stime		 25
+#define __NR_ptrace		 26
+#define __NR_alarm		 27
+#define __NR_oldfstat		 28
+#define __NR_pause		 29
+#define __NR_utime		 30
+#define __NR_stty		 31
+#define __NR_gtty		 32
+#define __NR_access		 33
+#define __NR_nice		 34
+#define __NR_ftime		 35
+#define __NR_sync		 36
+#define __NR_kill		 37
+#define __NR_rename		 38
+#define __NR_mkdir		 39
+#define __NR_rmdir		 40
+#define __NR_dup		 41
+#define __NR_pipe		 42
+#define __NR_times		 43
+#define __NR_prof		 44
+#define __NR_brk		 45
+#define __NR_setgid		 46
+#define __NR_getgid		 47
+#define __NR_signal		 48
+#define __NR_geteuid		 49
+#define __NR_getegid		 50
+#define __NR_acct		 51
+#define __NR_umount2		 52
+#define __NR_lock		 53
+#define __NR_ioctl		 54
+#define __NR_fcntl		 55
+#define __NR_mpx		 56
+#define __NR_setpgid		 57
+#define __NR_ulimit		 58
+#define __NR_oldolduname	 59
+#define __NR_umask		 60
+#define __NR_chroot		 61
+#define __NR_ustat		 62
+#define __NR_dup2		 63
+#define __NR_getppid		 64
+#define __NR_getpgrp		 65
+#define __NR_setsid		 66
+#define __NR_sigaction		 67
+#define __NR_sgetmask		 68
+#define __NR_ssetmask		 69
+#define __NR_setreuid		 70
+#define __NR_setregid		 71
+#define __NR_sigsuspend		 72
+#define __NR_sigpending		 73
+#define __NR_sethostname	 74
+#define __NR_setrlimit		 75
+#define __NR_getrlimit		 76
+#define __NR_getrusage		 77
+#define __NR_gettimeofday	 78
+#define __NR_settimeofday	 79
+#define __NR_getgroups		 80
+#define __NR_setgroups		 81
+#define __NR_select		 82
+#define __NR_symlink		 83
+#define __NR_oldlstat		 84
+#define __NR_readlink		 85
+#define __NR_uselib		 86
+#define __NR_swapon		 87
+#define __NR_reboot		 88
+#define __NR_readdir		 89
+#define __NR_mmap		 90
+#define __NR_munmap		 91
+#define __NR_truncate		 92
+#define __NR_ftruncate		 93
+#define __NR_fchmod		 94
+#define __NR_fchown		 95
+#define __NR_getpriority	 96
+#define __NR_setpriority	 97
+#define __NR_profil		 98
+#define __NR_statfs		 99
+#define __NR_fstatfs		100
+#define __NR_ioperm		101
+#define __NR_socketcall		102
+#define __NR_syslog		103
+#define __NR_setitimer		104
+#define __NR_getitimer		105
+#define __NR_stat		106
+#define __NR_lstat		107
+#define __NR_fstat		108
+#define __NR_olduname		109
+#define __NR_iopl		110
+#define __NR_vhangup		111
+#define __NR_idle		112
+#define __NR_vm86		113
+#define __NR_wait4		114
+#define __NR_swapoff		115
+#define __NR_sysinfo		116
+#define __NR_ipc		117
+#define __NR_fsync		118
+#define __NR_sigreturn		119
+#define __NR_clone		120
+#define __NR_setdomainname	121
+#define __NR_uname		122
+#define __NR_modify_ldt		123
+#define __NR_adjtimex		124
+#define __NR_mprotect		125
+#define __NR_sigprocmask	126
+#define __NR_create_module	127
+#define __NR_init_module	128
+#define __NR_delete_module	129
+#define __NR_get_kernel_syms	130
+#define __NR_quotactl		131
+#define __NR_getpgid		132
+#define __NR_fchdir		133
+#define __NR_bdflush		134
+#define __NR_sysfs		135
+#define __NR_personality	136
+#define __NR_afs_syscall	137 /* Syscall for Andrew File System */
+#define __NR_setfsuid		138
+#define __NR_setfsgid		139
+#define __NR__llseek		140
+#define __NR_getdents		141
+#define __NR__newselect		142
+#define __NR_flock		143
+#define __NR_msync		144
+#define __NR_readv		145
+#define __NR_writev		146
+#define __NR_getsid		147
+#define __NR_fdatasync		148
+#define __NR__sysctl		149
+#define __NR_mlock		150
+#define __NR_munlock		151
+#define __NR_mlockall		152
+#define __NR_munlockall		153
+#define __NR_sched_setparam		154
+#define __NR_sched_getparam		155
+#define __NR_sched_setscheduler		156
+#define __NR_sched_getscheduler		157
+#define __NR_sched_yield		158
+#define __NR_sched_get_priority_max	159
+#define __NR_sched_get_priority_min	160
+#define __NR_sched_rr_get_interval	161
+#define __NR_nanosleep		162
+#define __NR_mremap		163
+#define __NR_setresuid		164
+#define __NR_getresuid		165
+#define __NR_query_module	166
+#define __NR_poll		167
+#define __NR_nfsservctl		168
+#define __NR_setresgid		169
+#define __NR_getresgid		170
+#define __NR_prctl		171
+#define __NR_rt_sigreturn	172
+#define __NR_rt_sigaction	173
+#define __NR_rt_sigprocmask	174
+#define __NR_rt_sigpending	175
+#define __NR_rt_sigtimedwait	176
+#define __NR_rt_sigqueueinfo	177
+#define __NR_rt_sigsuspend	178
+#define __NR_pread64		179
+#define __NR_pwrite64		180
+#define __NR_chown		181
+#define __NR_getcwd		182
+#define __NR_capget		183
+#define __NR_capset		184
+#define __NR_sigaltstack	185
+#define __NR_sendfile		186
+#define __NR_getpmsg		187	/* some people actually want streams */
+#define __NR_putpmsg		188	/* some people actually want streams */
+#define __NR_vfork		189
+#define __NR_ugetrlimit		190	/* SuS compliant getrlimit */
+#define __NR_readahead		191
+#ifndef __powerpc64__			/* these are 32-bit only */
+#define __NR_mmap2		192
+#define __NR_truncate64		193
+#define __NR_ftruncate64	194
+#define __NR_stat64		195
+#define __NR_lstat64		196
+#define __NR_fstat64		197
+#endif
+#define __NR_pciconfig_read	198
+#define __NR_pciconfig_write	199
+#define __NR_pciconfig_iobase	200
+#define __NR_multiplexer	201
+#define __NR_getdents64		202
+#define __NR_pivot_root		203
+#ifndef __powerpc64__
+#define __NR_fcntl64		204
+#endif
+#define __NR_madvise		205
+#define __NR_mincore		206
+#define __NR_gettid		207
+#define __NR_tkill		208
+#define __NR_setxattr		209
+#define __NR_lsetxattr		210
+#define __NR_fsetxattr		211
+#define __NR_getxattr		212
+#define __NR_lgetxattr		213
+#define __NR_fgetxattr		214
+#define __NR_listxattr		215
+#define __NR_llistxattr		216
+#define __NR_flistxattr		217
+#define __NR_removexattr	218
+#define __NR_lremovexattr	219
+#define __NR_fremovexattr	220
+#define __NR_futex		221
+#define __NR_sched_setaffinity	222
+#define __NR_sched_getaffinity	223
+/* 224 currently unused */
+#define __NR_tuxcall		225
+#ifndef __powerpc64__
+#define __NR_sendfile64		226
+#endif
+#define __NR_io_setup		227
+#define __NR_io_destroy		228
+#define __NR_io_getevents	229
+#define __NR_io_submit		230
+#define __NR_io_cancel		231
+#define __NR_set_tid_address	232
+#define __NR_fadvise64		233
+#define __NR_exit_group		234
+#define __NR_lookup_dcookie	235
+#define __NR_epoll_create	236
+#define __NR_epoll_ctl		237
+#define __NR_epoll_wait		238
+#define __NR_remap_file_pages	239
+#define __NR_timer_create	240
+#define __NR_timer_settime	241
+#define __NR_timer_gettime	242
+#define __NR_timer_getoverrun	243
+#define __NR_timer_delete	244
+#define __NR_clock_settime	245
+#define __NR_clock_gettime	246
+#define __NR_clock_getres	247
+#define __NR_clock_nanosleep	248
+#define __NR_swapcontext	249
+#define __NR_tgkill		250
+#define __NR_utimes		251
+#define __NR_statfs64		252
+#define __NR_fstatfs64		253
+#ifndef __powerpc64__
+#define __NR_fadvise64_64	254
+#endif
+#define __NR_rtas		255
+#define __NR_sys_debug_setcontext 256
+/* Number 257 is reserved for vserver */
+#define __NR_migrate_pages	258
+#define __NR_mbind		259
+#define __NR_get_mempolicy	260
+#define __NR_set_mempolicy	261
+#define __NR_mq_open		262
+#define __NR_mq_unlink		263
+#define __NR_mq_timedsend	264
+#define __NR_mq_timedreceive	265
+#define __NR_mq_notify		266
+#define __NR_mq_getsetattr	267
+#define __NR_kexec_load		268
+#define __NR_add_key		269
+#define __NR_request_key	270
+#define __NR_keyctl		271
+#define __NR_waitid		272
+#define __NR_ioprio_set		273
+#define __NR_ioprio_get		274
+#define __NR_inotify_init	275
+#define __NR_inotify_add_watch	276
+#define __NR_inotify_rm_watch	277
+#define __NR_spu_run		278
+#define __NR_spu_create		279
+#define __NR_pselect6		280
+#define __NR_ppoll		281
+#define __NR_unshare		282
+#define __NR_splice		283
+#define __NR_tee		284
+#define __NR_vmsplice		285
+#define __NR_openat		286
+#define __NR_mkdirat		287
+#define __NR_mknodat		288
+#define __NR_fchownat		289
+#define __NR_futimesat		290
+#ifdef __powerpc64__
+#define __NR_newfstatat		291
+#else
+#define __NR_fstatat64		291
+#endif
+#define __NR_unlinkat		292
+#define __NR_renameat		293
+#define __NR_linkat		294
+#define __NR_symlinkat		295
+#define __NR_readlinkat		296
+#define __NR_fchmodat		297
+#define __NR_faccessat		298
+#define __NR_get_robust_list	299
+#define __NR_set_robust_list	300
+#define __NR_move_pages		301
+#define __NR_getcpu		302
+#define __NR_epoll_pwait	303
+#define __NR_utimensat		304
+#define __NR_signalfd		305
+#define __NR_timerfd_create	306
+#define __NR_eventfd		307
+#define __NR_sync_file_range2	308
+#define __NR_fallocate		309
+#define __NR_subpage_prot	310
+#define __NR_timerfd_settime	311
+#define __NR_timerfd_gettime	312
+#define __NR_signalfd4		313
+#define __NR_eventfd2		314
+#define __NR_epoll_create1	315
+#define __NR_dup3		316
+#define __NR_pipe2		317
+#define __NR_inotify_init1	318
+#define __NR_perf_event_open	319
+#define __NR_preadv		320
+#define __NR_pwritev		321
+#define __NR_rt_tgsigqueueinfo	322
+#define __NR_fanotify_init	323
+#define __NR_fanotify_mark	324
+#define __NR_prlimit64		325
+#define __NR_socket		326
+#define __NR_bind		327
+#define __NR_connect		328
+#define __NR_listen		329
+#define __NR_accept		330
+#define __NR_getsockname	331
+#define __NR_getpeername	332
+#define __NR_socketpair		333
+#define __NR_send		334
+#define __NR_sendto		335
+#define __NR_recv		336
+#define __NR_recvfrom		337
+#define __NR_shutdown		338
+#define __NR_setsockopt		339
+#define __NR_getsockopt		340
+#define __NR_sendmsg		341
+#define __NR_recvmsg		342
+#define __NR_recvmmsg		343
+#define __NR_accept4		344
+#define __NR_name_to_handle_at	345
+#define __NR_open_by_handle_at	346
+#define __NR_clock_adjtime	347
+#define __NR_syncfs		348
+#define __NR_sendmmsg		349
+#define __NR_setns		350
+#define __NR_process_vm_readv	351
+#define __NR_process_vm_writev	352
+
+
+#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index af37528da49..9499385676e 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -435,6 +435,22 @@ ret_from_fork:
 	li	r3,0
 	b	ret_from_syscall
 
+	.globl	ret_from_kernel_thread
+ret_from_kernel_thread:
+	REST_NVGPRS(r1)
+	bl	schedule_tail
+	mtlr	r14
+	mr	r3,r15
+	PPC440EP_ERR42
+	blrl
+	li	r3,0
+	b	do_exit		# no return
+
+	.globl	__ret_from_kernel_execve
+__ret_from_kernel_execve:
+	addi	r1,r3,-STACK_FRAME_OVERHEAD
+	b	ret_from_syscall
+
 /* Traced system call support */
 syscall_dotrace:
 	SAVE_NVGPRS(r1)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 0e931aaffca..56e0ff0878b 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -370,6 +370,22 @@ _GLOBAL(ret_from_fork)
 	li	r3,0
 	b	syscall_exit
 
+_GLOBAL(ret_from_kernel_thread)
+	bl	.schedule_tail
+	REST_NVGPRS(r1)
+	REST_GPR(2,r1)
+	mtlr	r14
+	mr	r3,r15
+	blrl
+	li	r3,0
+	b	.do_exit	# no return
+
+_GLOBAL(__ret_from_kernel_execve)
+	addi	r1,r3,-STACK_FRAME_OVERHEAD
+	li	r10,1
+	std	r10,SOFTE(r1)
+	b	syscall_exit
+
 	.section	".toc","aw"
 DSCR_DEFAULT:
 	.tc dscr_default[TC],dscr_default
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index ba16874fe29..7ce26d45777 100644
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -54,13 +54,6 @@ _GLOBAL(add_reloc_offset)
 	.align	3
 2:	PPC_LONG 1b
 
-_GLOBAL(kernel_execve)
-	li	r0,__NR_execve
-	sc
-	bnslr
-	neg	r3,r3
-	blr
-
 _GLOBAL(setjmp)
 	mflr	r0
 	PPC_STL	r0,0(r3)
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 407e293aad2..19e096bd0e7 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -663,39 +663,6 @@ _GLOBAL(abs)
 	sub	r3,r3,r4
 	blr
 
-/*
- * Create a kernel thread
- *   kernel_thread(fn, arg, flags)
- */
-_GLOBAL(kernel_thread)
-	stwu	r1,-16(r1)
-	stw	r30,8(r1)
-	stw	r31,12(r1)
-	mr	r30,r3		/* function */
-	mr	r31,r4		/* argument */
-	ori	r3,r5,CLONE_VM	/* flags */
-	oris	r3,r3,CLONE_UNTRACED>>16
-	li	r4,0		/* new sp (unused) */
-	li	r0,__NR_clone
-	sc
-	bns+	1f		/* did system call indicate error? */
-	neg	r3,r3		/* if so, make return code negative */
-1:	cmpwi	0,r3,0		/* parent or child? */
-	bne	2f		/* return if parent */
-	li	r0,0		/* make top-level stack frame */
-	stwu	r0,-16(r1)
-	mtlr	r30		/* fn addr in lr */
-	mr	r3,r31		/* load arg and call fn */
-	PPC440EP_ERR42
-	blrl
-	li	r0,__NR_exit	/* exit if function returns */
-	li	r3,0
-	sc
-2:	lwz	r30,8(r1)
-	lwz	r31,12(r1)
-	addi	r1,r1,16
-	blr
-
 #ifdef CONFIG_SMP
 _GLOBAL(start_secondary_resume)
 	/* Reset stack */
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 565b78625a3..5cfa8008693 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -407,40 +407,6 @@ _GLOBAL(scom970_write)
 
 
 /*
- * Create a kernel thread
- *   kernel_thread(fn, arg, flags)
- */
-_GLOBAL(kernel_thread)
-	std	r29,-24(r1)
-	std	r30,-16(r1)
-	stdu	r1,-STACK_FRAME_OVERHEAD(r1)
-	mr	r29,r3
-	mr	r30,r4
-	ori	r3,r5,CLONE_VM	/* flags */
-	oris	r3,r3,(CLONE_UNTRACED>>16)
-	li	r4,0		/* new sp (unused) */
-	li	r0,__NR_clone
-	sc
-	bns+	1f		/* did system call indicate error? */
-	neg	r3,r3		/* if so, make return code negative */
-1:	cmpdi	0,r3,0		/* parent or child? */
-	bne	2f		/* return if parent */
-	li	r0,0
-	stdu	r0,-STACK_FRAME_OVERHEAD(r1)
-	ld	r2,8(r29)
-	ld	r29,0(r29)
-	mtlr	r29              /* fn addr in lr */
-	mr	r3,r30	        /* load arg and call fn */
-	blrl
-	li	r0,__NR_exit	/* exit after child exits */
-        li	r3,0
-	sc
-2:	addi	r1,r1,STACK_FRAME_OVERHEAD
-	ld	r29,-24(r1)
-	ld	r30,-16(r1)
-	blr
-
-/*
  * disable_kernel_fp()
  * Disable the FPU.
  */
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 3e4031581c6..19e4288d848 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -94,7 +94,6 @@ EXPORT_SYMBOL(pci_dram_offset);
 #endif /* CONFIG_PCI */
 
 EXPORT_SYMBOL(start_thread);
-EXPORT_SYMBOL(kernel_thread);
 
 EXPORT_SYMBOL(giveup_fpu);
 #ifdef CONFIG_ALTIVEC
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index d5ad666efd8..ba48233500f 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -733,30 +733,39 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
 extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
 
 int copy_thread(unsigned long clone_flags, unsigned long usp,
-		unsigned long unused, struct task_struct *p,
+		unsigned long arg, struct task_struct *p,
 		struct pt_regs *regs)
 {
 	struct pt_regs *childregs, *kregs;
 	extern void ret_from_fork(void);
+	extern void ret_from_kernel_thread(void);
+	void (*f)(void);
 	unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
 
-	CHECK_FULL_REGS(regs);
 	/* Copy registers */
 	sp -= sizeof(struct pt_regs);
 	childregs = (struct pt_regs *) sp;
-	*childregs = *regs;
-	if ((childregs->msr & MSR_PR) == 0) {
+	if (!regs) {
 		/* for kernel thread, set `current' and stackptr in new task */
+		memset(childregs, 0, sizeof(struct pt_regs));
 		childregs->gpr[1] = sp + sizeof(struct pt_regs);
-#ifdef CONFIG_PPC32
-		childregs->gpr[2] = (unsigned long) p;
-#else
+#ifdef CONFIG_PPC64
+		childregs->gpr[14] = *(unsigned long *)usp;
+		childregs->gpr[2] = ((unsigned long *)usp)[1],
 		clear_tsk_thread_flag(p, TIF_32BIT);
+#else
+		childregs->gpr[14] = usp;	/* function */
+		childregs->gpr[2] = (unsigned long) p;
 #endif
+		childregs->gpr[15] = arg;
 		p->thread.regs = NULL;	/* no user register state */
+		f = ret_from_kernel_thread;
 	} else {
+		CHECK_FULL_REGS(regs);
+		*childregs = *regs;
 		childregs->gpr[1] = usp;
 		p->thread.regs = childregs;
+		childregs->gpr[3] = 0;  /* Result from fork() */
 		if (clone_flags & CLONE_SETTLS) {
 #ifdef CONFIG_PPC64
 			if (!is_32bit_task())
@@ -765,8 +774,9 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 #endif
 				childregs->gpr[2] = childregs->gpr[6];
 		}
+
+		f = ret_from_fork;
 	}
-	childregs->gpr[3] = 0;  /* Result from fork() */
 	sp -= STACK_FRAME_OVERHEAD;
 
 	/*
@@ -805,19 +815,17 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 		p->thread.dscr = current->thread.dscr;
 	}
 #endif
-
 	/*
 	 * The PPC64 ABI makes use of a TOC to contain function 
 	 * pointers.  The function (ret_from_except) is actually a pointer
 	 * to the TOC entry.  The first entry is a pointer to the actual
 	 * function.
- 	 */
+	 */
 #ifdef CONFIG_PPC64
-	kregs->nip = *((unsigned long *)ret_from_fork);
+	kregs->nip = *((unsigned long *)f);
 #else
-	kregs->nip = (unsigned long)ret_from_fork;
+	kregs->nip = (unsigned long)f;
 #endif
-
 	return 0;
 }
 
@@ -1055,26 +1063,13 @@ int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
 			regs, 0, NULL, NULL);
 }
 
-int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
-	       unsigned long a3, unsigned long a4, unsigned long a5,
-	       struct pt_regs *regs)
+void __ret_from_kernel_execve(struct pt_regs *normal)
+__noreturn;
+
+void ret_from_kernel_execve(struct pt_regs *normal)
 {
-	int error;
-	char *filename;
-
-	filename = getname((const char __user *) a0);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		goto out;
-	flush_fp_to_thread(current);
-	flush_altivec_to_thread(current);
-	flush_spe_to_thread(current);
-	error = do_execve(filename,
-			  (const char __user *const __user *) a1,
-			  (const char __user *const __user *) a2, regs);
-	putname(filename);
-out:
-	return error;
+	set_thread_flag(TIF_RESTOREALL);
+	__ret_from_kernel_execve(normal);
 }
 
 static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 8b4c049aee2..804e323c139 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -35,7 +35,6 @@
 #include <linux/stddef.h>
 #include <linux/tty.h>
 #include <linux/binfmts.h>
-#include <linux/freezer.h>
 #endif
 
 #include <asm/uaccess.h>
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index abd1112da54..9c2ed90ece8 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -156,28 +156,6 @@ asmlinkage long compat_sys_sendfile64_wrapper(u32 out_fd, u32 in_fd,
 			    (off_t __user *)offset, count);
 }
 
-long compat_sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
-		  unsigned long a3, unsigned long a4, unsigned long a5,
-		  struct pt_regs *regs)
-{
-	int error;
-	char * filename;
-	
-	filename = getname((char __user *) a0);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		goto out;
-	flush_fp_to_thread(current);
-	flush_altivec_to_thread(current);
-
-	error = compat_do_execve(filename, compat_ptr(a1), compat_ptr(a2), regs);
-
-	putname(filename);
-
-out:
-	return error;
-}
-
 /* Note: it is necessary to treat option as an unsigned int, 
  * with the corresponding cast to a signed int to insure that the 
  * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode)
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index c9986fd400d..ce4cb772dc7 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -73,7 +73,7 @@
 /* powerpc clocksource/clockevent code */
 
 #include <linux/clockchips.h>
-#include <linux/clocksource.h>
+#include <linux/timekeeper_internal.h>
 
 static cycle_t rtc_read(struct clocksource *);
 static struct clocksource clocksource_rtc = {
@@ -727,7 +727,7 @@ static cycle_t timebase_read(struct clocksource *cs)
 	return (cycle_t)get_tb();
 }
 
-void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
+void update_vsyscall_old(struct timespec *wall_time, struct timespec *wtm,
 			struct clocksource *clock, u32 mult)
 {
 	u64 new_tb_to_xs, new_stamp_xsec;
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 83e929e66f9..721d4603a23 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -1183,7 +1183,7 @@ static const struct vm_operations_struct kvm_rma_vm_ops = {
 
 static int kvm_rma_mmap(struct file *file, struct vm_area_struct *vma)
 {
-	vma->vm_flags |= VM_RESERVED;
+	vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
 	vma->vm_ops = &kvm_rma_vm_ops;
 	return 0;
 }
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 5495ebe983a..0a6b28336eb 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -451,6 +451,7 @@ good_area:
 			/* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
 			 * of starvation. */
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 			goto retry;
 		}
 	}
diff --git a/arch/powerpc/oprofile/cell/spu_task_sync.c b/arch/powerpc/oprofile/cell/spu_task_sync.c
index 642fca137cc..28f1af2db1f 100644
--- a/arch/powerpc/oprofile/cell/spu_task_sync.c
+++ b/arch/powerpc/oprofile/cell/spu_task_sync.c
@@ -304,7 +304,7 @@ static inline unsigned long fast_get_dcookie(struct path *path)
 	return cookie;
 }
 
-/* Look up the dcookie for the task's first VM_EXECUTABLE mapping,
+/* Look up the dcookie for the task's mm->exe_file,
  * which corresponds loosely to "application name". Also, determine
  * the offset for the SPU ELF object.  If computed offset is
  * non-zero, it implies an embedded SPU object; otherwise, it's a
@@ -321,7 +321,6 @@ get_exec_dcookie_and_offset(struct spu *spu, unsigned int *offsetp,
 {
 	unsigned long app_cookie = 0;
 	unsigned int my_offset = 0;
-	struct file *app = NULL;
 	struct vm_area_struct *vma;
 	struct mm_struct *mm = spu->mm;
 
@@ -330,16 +329,10 @@ get_exec_dcookie_and_offset(struct spu *spu, unsigned int *offsetp,
 
 	down_read(&mm->mmap_sem);
 
-	for (vma = mm->mmap; vma; vma = vma->vm_next) {
-		if (!vma->vm_file)
-			continue;
-		if (!(vma->vm_flags & VM_EXECUTABLE))
-			continue;
-		app_cookie = fast_get_dcookie(&vma->vm_file->f_path);
+	if (mm->exe_file) {
+		app_cookie = fast_get_dcookie(&mm->exe_file->f_path);
 		pr_debug("got dcookie for %s\n",
-			 vma->vm_file->f_dentry->d_name.name);
-		app = vma->vm_file;
-		break;
+			 mm->exe_file->f_dentry->d_name.name);
 	}
 
 	for (vma = mm->mmap; vma; vma = vma->vm_next) {
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c
index 51faaac8abe..185bedd926d 100644
--- a/arch/powerpc/platforms/pseries/eeh_event.c
+++ b/arch/powerpc/platforms/pseries/eeh_event.c
@@ -23,6 +23,7 @@
 #include <linux/pci.h>
 #include <linux/slab.h>
 #include <linux/workqueue.h>
+#include <linux/kthread.h>
 #include <asm/eeh_event.h>
 #include <asm/ppc-pci.h>
 
@@ -59,8 +60,6 @@ static int eeh_event_handler(void * dummy)
 	struct eeh_event *event;
 	struct eeh_pe *pe;
 
-	set_task_comm(current, "eehd");
-
 	spin_lock_irqsave(&eeh_eventlist_lock, flags);
 	event = NULL;
 
@@ -108,7 +107,7 @@ static int eeh_event_handler(void * dummy)
  */
 static void eeh_thread_launcher(struct work_struct *dummy)
 {
-	if (kernel_thread(eeh_event_handler, NULL, CLONE_KERNEL) < 0)
+	if (IS_ERR(kthread_run(eeh_event_handler, NULL, "eehd")))
 		printk(KERN_ERR "Failed to start EEH daemon\n");
 }
 
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 11d8e0544ac..ecdb0a6b317 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -78,6 +78,8 @@ static int pseries_remove_memblock(unsigned long base, unsigned int memblock_siz
 	unsigned long start, start_pfn;
 	struct zone *zone;
 	int ret;
+	unsigned long section;
+	unsigned long sections_to_remove;
 
 	start_pfn = base >> PAGE_SHIFT;
 
@@ -97,9 +99,13 @@ static int pseries_remove_memblock(unsigned long base, unsigned int memblock_siz
 	 * to sysfs "state" file and we can't remove sysfs entries
 	 * while writing to it. So we have to defer it to here.
 	 */
-	ret = __remove_pages(zone, start_pfn, memblock_size >> PAGE_SHIFT);
-	if (ret)
-		return ret;
+	sections_to_remove = (memblock_size >> PAGE_SHIFT) / PAGES_PER_SECTION;
+	for (section = 0; section < sections_to_remove; section++) {
+		unsigned long pfn = start_pfn + section * PAGES_PER_SECTION;
+		ret = __remove_pages(zone, pfn, PAGES_PER_SECTION);
+		if (ret)
+			return ret;
+	}
 
 	/*
 	 * Update memory regions for memory remove
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index c8af429991d..3f3d9ca7a5b 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -68,6 +68,7 @@ config S390
 	select HAVE_FTRACE_MCOUNT_RECORD
 	select HAVE_C_RECORDMCOUNT
 	select HAVE_SYSCALL_TRACEPOINTS
+	select SYSCTL_EXCEPTION_TRACE
 	select HAVE_DYNAMIC_FTRACE
 	select HAVE_FUNCTION_GRAPH_TRACER
 	select HAVE_REGS_AND_STACK_ACCESS_API
@@ -80,6 +81,7 @@ config S390
 	select HAVE_IRQ_WORK
 	select HAVE_PERF_EVENTS
 	select ARCH_HAVE_NMI_SAFE_CMPXCHG
+	select HAVE_DEBUG_KMEMLEAK
 	select HAVE_KERNEL_GZIP
 	select HAVE_KERNEL_BZIP2
 	select HAVE_KERNEL_LZMA
@@ -126,12 +128,16 @@ config S390
 	select ARCH_INLINE_WRITE_UNLOCK_BH
 	select ARCH_INLINE_WRITE_UNLOCK_IRQ
 	select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE
+	select HAVE_UID16 if 32BIT
 	select ARCH_WANT_IPC_PARSE_VERSION
 	select GENERIC_SMP_IDLE_THREAD
-	select GENERIC_TIME_VSYSCALL
+	select GENERIC_TIME_VSYSCALL_OLD
 	select GENERIC_CLOCKEVENTS
 	select KTIME_SCALAR if 32BIT
 	select HAVE_ARCH_SECCOMP_FILTER
+	select GENERIC_KERNEL_THREAD
+	select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_RELA
 
 config SCHED_OMIT_FRAME_POINTER
 	def_bool y
diff --git a/arch/s390/Kconfig.debug b/arch/s390/Kconfig.debug
index d76cef3fef3..fc32a2df497 100644
--- a/arch/s390/Kconfig.debug
+++ b/arch/s390/Kconfig.debug
@@ -31,6 +31,18 @@ config DEBUG_STRICT_USER_COPY_CHECKS
 
 	  If unsure, or if you run an older (pre 4.4) gcc, say N.
 
+config S390_PTDUMP
+	bool "Export kernel pagetable layout to userspace via debugfs"
+	depends on DEBUG_KERNEL
+	select DEBUG_FS
+	---help---
+	  Say Y here if you want to show the kernel pagetable layout in a
+	  debugfs file. This information is only useful for kernel developers
+	  who are working in architecture specific areas of the kernel.
+	  It is probably not a good idea to enable this feature in a production
+	  kernel.
+	  If in doubt, say "N"
+
 config DEBUG_SET_MODULE_RONX
 	def_bool y
 	depends on MODULES
diff --git a/arch/s390/include/asm/Kbuild b/arch/s390/include/asm/Kbuild
index 287d7bbb6d3..0633dc6d254 100644
--- a/arch/s390/include/asm/Kbuild
+++ b/arch/s390/include/asm/Kbuild
@@ -1,15 +1,3 @@
-include include/asm-generic/Kbuild.asm
 
-header-y += chpid.h
-header-y += chsc.h
-header-y += cmb.h
-header-y += dasd.h
-header-y += debug.h
-header-y += kvm_virtio.h
-header-y += monwriter.h
-header-y += qeth.h
-header-y += schid.h
-header-y += tape390.h
-header-y += ucontext.h
-header-y += vtoc.h
-header-y += zcrypt.h
+
+generic-y += clkdev.h
diff --git a/arch/s390/include/asm/chpid.h b/arch/s390/include/asm/chpid.h
index e5bde9f9291..38c405ef89c 100644
--- a/arch/s390/include/asm/chpid.h
+++ b/arch/s390/include/asm/chpid.h
@@ -1,24 +1,11 @@
 /*
- *    Copyright IBM Corp. 2007
+ *    Copyright IBM Corp. 2007, 2012
  *    Author(s): Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
  */
-
 #ifndef _ASM_S390_CHPID_H
 #define _ASM_S390_CHPID_H
 
-#include <linux/string.h>
-#include <linux/types.h>
-
-#define __MAX_CHPID 255
-
-struct chp_id {
-	u8 reserved1;
-	u8 cssid;
-	u8 reserved2;
-	u8 id;
-} __attribute__((packed));
-
-#ifdef __KERNEL__
+#include <uapi/asm/chpid.h>
 #include <asm/cio.h>
 
 static inline void chp_id_init(struct chp_id *chpid)
@@ -49,6 +36,4 @@ static inline int chp_id_is_valid(struct chp_id *chpid)
 
 #define chp_id_for_each(c) \
 	for (chp_id_init(c); chp_id_is_valid(c); chp_id_next(c))
-#endif /* __KERNEL */
-
 #endif /* _ASM_S390_CHPID_H */
diff --git a/arch/s390/include/asm/cmb.h b/arch/s390/include/asm/cmb.h
index 39ae0329479..806eac12e3b 100644
--- a/arch/s390/include/asm/cmb.h
+++ b/arch/s390/include/asm/cmb.h
@@ -1,61 +1,12 @@
 #ifndef S390_CMB_H
 #define S390_CMB_H
 
-#include <linux/types.h>
+#include <uapi/asm/cmb.h>
 
-/**
- * struct cmbdata - channel measurement block data for user space
- * @size: size of the stored data
- * @elapsed_time: time since last sampling
- * @ssch_rsch_count: number of ssch and rsch
- * @sample_count: number of samples
- * @device_connect_time: time of device connect
- * @function_pending_time: time of function pending
- * @device_disconnect_time: time of device disconnect
- * @control_unit_queuing_time: time of control unit queuing
- * @device_active_only_time: time of device active only
- * @device_busy_time: time of device busy (ext. format)
- * @initial_command_response_time: initial command response time (ext. format)
- *
- * All values are stored as 64 bit for simplicity, especially
- * in 32 bit emulation mode. All time values are normalized to
- * nanoseconds.
- * Currently, two formats are known, which differ by the size of
- * this structure, i.e. the last two members are only set when
- * the extended channel measurement facility (first shipped in
- * z990 machines) is activated.
- * Potentially, more fields could be added, which would result in a
- * new ioctl number.
- */
-struct cmbdata {
-	__u64 size;
-	__u64 elapsed_time;
- /* basic and exended format: */
-	__u64 ssch_rsch_count;
-	__u64 sample_count;
-	__u64 device_connect_time;
-	__u64 function_pending_time;
-	__u64 device_disconnect_time;
-	__u64 control_unit_queuing_time;
-	__u64 device_active_only_time;
- /* extended format only: */
-	__u64 device_busy_time;
-	__u64 initial_command_response_time;
-};
-
-/* enable channel measurement */
-#define BIODASDCMFENABLE	_IO(DASD_IOCTL_LETTER, 32)
-/* enable channel measurement */
-#define BIODASDCMFDISABLE	_IO(DASD_IOCTL_LETTER, 33)
-/* read channel measurement data */
-#define BIODASDREADALLCMB	_IOWR(DASD_IOCTL_LETTER, 33, struct cmbdata)
-
-#ifdef __KERNEL__
 struct ccw_device;
 extern int enable_cmf(struct ccw_device *cdev);
 extern int disable_cmf(struct ccw_device *cdev);
 extern u64 cmf_read(struct ccw_device *cdev, int index);
 extern int cmf_readall(struct ccw_device *cdev, struct cmbdata *data);
 
-#endif /* __KERNEL__ */
 #endif /* S390_CMB_H */
diff --git a/arch/s390/include/asm/css_chars.h b/arch/s390/include/asm/css_chars.h
index a06ebc2623f..7e1c917bbba 100644
--- a/arch/s390/include/asm/css_chars.h
+++ b/arch/s390/include/asm/css_chars.h
@@ -3,8 +3,6 @@
 
 #include <linux/types.h>
 
-#ifdef __KERNEL__
-
 struct css_general_char {
 	u64 : 12;
 	u32 dynio : 1;	 /* bit 12 */
@@ -35,5 +33,4 @@ struct css_general_char {
 
 extern struct css_general_char css_general_characteristics;
 
-#endif /* __KERNEL__ */
 #endif
diff --git a/arch/s390/include/asm/debug.h b/arch/s390/include/asm/debug.h
index f39677e6ccd..188c5052a20 100644
--- a/arch/s390/include/asm/debug.h
+++ b/arch/s390/include/asm/debug.h
@@ -3,39 +3,14 @@
  *
  *    Copyright IBM Corp. 1999, 2000
  */
-
 #ifndef DEBUG_H
 #define DEBUG_H
 
-#include <linux/fs.h>
-
-/* Note:
- * struct __debug_entry must be defined outside of #ifdef __KERNEL__ 
- * in order to allow a user program to analyze the 'raw'-view.
- */
-
-struct __debug_entry{
-        union {
-                struct {
-                        unsigned long long clock:52;
-                        unsigned long long exception:1;
-                        unsigned long long level:3;
-                        unsigned long long cpuid:8;
-                } fields;
-
-                unsigned long long stck;
-        } id;
-        void* caller;
-} __attribute__((packed));
-
-
-#define __DEBUG_FEATURE_VERSION      2  /* version of debug feature */
-
-#ifdef __KERNEL__
 #include <linux/string.h>
 #include <linux/spinlock.h>
 #include <linux/kernel.h>
 #include <linux/time.h>
+#include <uapi/asm/debug.h>
 
 #define DEBUG_MAX_LEVEL            6  /* debug levels range from 0 to 6 */
 #define DEBUG_OFF_LEVEL            -1 /* level where debug is switched off */
@@ -254,5 +229,4 @@ int debug_unregister_view(debug_info_t* id, struct debug_view* view);
 #define PRINT_FATAL(x...) printk ( KERN_DEBUG PRINTK_HEADER x )
 #endif				/* DASD_DEBUG */
 
-#endif				/* __KERNEL__ */
 #endif				/* DEBUG_H */
diff --git a/arch/s390/include/asm/hugetlb.h b/arch/s390/include/asm/hugetlb.h
index 2d6e6e38056..593753ee07f 100644
--- a/arch/s390/include/asm/hugetlb.h
+++ b/arch/s390/include/asm/hugetlb.h
@@ -33,6 +33,7 @@ static inline int prepare_hugepage_range(struct file *file,
 }
 
 #define hugetlb_prefault_arch_hook(mm)		do { } while (0)
+#define arch_clear_hugepage_flags(page)		do { } while (0)
 
 int arch_prepare_hugepage(struct page *page);
 void arch_release_hugepage(struct page *page);
@@ -77,23 +78,6 @@ static inline void __pmd_csp(pmd_t *pmdp)
 		"	csp %1,%3"
 		: "=m" (*pmdp)
 		: "d" (reg2), "d" (reg3), "d" (reg4), "m" (*pmdp) : "cc");
-	pmd_val(*pmdp) = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY;
-}
-
-static inline void __pmd_idte(unsigned long address, pmd_t *pmdp)
-{
-	unsigned long sto = (unsigned long) pmdp -
-				pmd_index(address) * sizeof(pmd_t);
-
-	if (!(pmd_val(*pmdp) & _SEGMENT_ENTRY_INV)) {
-		asm volatile(
-			"	.insn	rrf,0xb98e0000,%2,%3,0,0"
-			: "=m" (*pmdp)
-			: "m" (*pmdp), "a" (sto),
-			  "a" ((address & HPAGE_MASK))
-		);
-	}
-	pmd_val(*pmdp) = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY;
 }
 
 static inline void huge_ptep_invalidate(struct mm_struct *mm,
@@ -105,6 +89,7 @@ static inline void huge_ptep_invalidate(struct mm_struct *mm,
 		__pmd_idte(address, pmdp);
 	else
 		__pmd_csp(pmdp);
+	pmd_val(*pmdp) = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY;
 }
 
 static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
diff --git a/arch/s390/include/asm/kvm_para.h b/arch/s390/include/asm/kvm_para.h
index da44867de60..e0f842308a6 100644
--- a/arch/s390/include/asm/kvm_para.h
+++ b/arch/s390/include/asm/kvm_para.h
@@ -9,12 +9,6 @@
  *
  *    Author(s): Christian Borntraeger <borntraeger@de.ibm.com>
  */
-
-#ifndef __S390_KVM_PARA_H
-#define __S390_KVM_PARA_H
-
-#ifdef __KERNEL__
-
 /*
  * Hypercalls for KVM on s390. The calling convention is similar to the
  * s390 ABI, so we use R2-R6 for parameters 1-5. In addition we use R1
@@ -29,6 +23,12 @@
  *
  * This work is licensed under the terms of the GNU GPL, version 2.
  */
+#ifndef __S390_KVM_PARA_H
+#define __S390_KVM_PARA_H
+
+#include <uapi/asm/kvm_para.h>
+
+
 
 static inline long kvm_hypercall0(unsigned long nr)
 {
@@ -154,6 +154,4 @@ static inline bool kvm_check_and_clear_guest_paused(void)
 	return false;
 }
 
-#endif
-
 #endif /* __S390_KVM_PARA_H */
diff --git a/arch/s390/include/asm/mman.h b/arch/s390/include/asm/mman.h
index abc1932ac4e..0e47a576d66 100644
--- a/arch/s390/include/asm/mman.h
+++ b/arch/s390/include/asm/mman.h
@@ -3,17 +3,13 @@
  *
  *  Derived from "include/asm-i386/mman.h"
  */
-
 #ifndef __S390_MMAN_H__
 #define __S390_MMAN_H__
 
-#include <asm-generic/mman.h>
+#include <uapi/asm/mman.h>
 
-#if defined(__KERNEL__)
 #if !defined(__ASSEMBLY__) && defined(CONFIG_64BIT)
 int s390_mmap_check(unsigned long addr, unsigned long len);
 #define arch_mmap_check(addr,len,flags)	s390_mmap_check(addr,len)
 #endif
-#endif
-
 #endif /* __S390_MMAN_H__ */
diff --git a/arch/s390/include/asm/module.h b/arch/s390/include/asm/module.h
index f0b6b26b6e5..df1f861a848 100644
--- a/arch/s390/include/asm/module.h
+++ b/arch/s390/include/asm/module.h
@@ -1,5 +1,8 @@
 #ifndef _ASM_S390_MODULE_H
 #define _ASM_S390_MODULE_H
+
+#include <asm-generic/module.h>
+
 /*
  * This file contains the s390 architecture specific module code.
  */
@@ -28,19 +31,4 @@ struct mod_arch_specific
 	struct mod_arch_syminfo *syminfo;
 };
 
-#ifdef CONFIG_64BIT
-#define ElfW(x) Elf64_ ## x
-#define ELFW(x) ELF64_ ## x
-#else
-#define ElfW(x) Elf32_ ## x
-#define ELFW(x) ELF32_ ## x
-#endif
-
-#define Elf_Addr ElfW(Addr)
-#define Elf_Rela ElfW(Rela)
-#define Elf_Shdr ElfW(Shdr)
-#define Elf_Sym ElfW(Sym)
-#define Elf_Ehdr ElfW(Ehdr)
-#define ELF_R_SYM ELFW(R_SYM)
-#define ELF_R_TYPE ELFW(R_TYPE)
 #endif /* _ASM_S390_MODULE_H */
diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h
index 27ab3c7c1e8..6d5367060a5 100644
--- a/arch/s390/include/asm/page.h
+++ b/arch/s390/include/asm/page.h
@@ -30,12 +30,20 @@
 #include <asm/setup.h>
 #ifndef __ASSEMBLY__
 
+static unsigned long pfmf(unsigned long function, unsigned long address)
+{
+	asm volatile(
+		"	.insn	rre,0xb9af0000,%[function],%[address]"
+		: [address] "+a" (address)
+		: [function] "d" (function)
+		: "memory");
+	return address;
+}
+
 static inline void clear_page(void *page)
 {
 	if (MACHINE_HAS_PFMF) {
-		asm volatile(
-			"	.insn	rre,0xb9af0000,%0,%1"
-			: : "d" (0x10000), "a" (page) : "memory", "cc");
+		pfmf(0x10000, (unsigned long)page);
 	} else {
 		register unsigned long reg1 asm ("1") = 0;
 		register void *reg2 asm ("2") = page;
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index 6bd7d748301..dd647c919a6 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -42,6 +42,7 @@ extern void fault_init(void);
  * tables contain all the necessary information.
  */
 #define update_mmu_cache(vma, address, ptep)     do { } while (0)
+#define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
 
 /*
  * ZERO_PAGE is a global shared page that is always zero; used
@@ -118,13 +119,12 @@ static inline int is_zero_pfn(unsigned long pfn)
 
 #ifndef __ASSEMBLY__
 /*
- * The vmalloc area will always be on the topmost area of the kernel
- * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc,
- * which should be enough for any sane case.
- * By putting vmalloc at the top, we maximise the gap between physical
- * memory and vmalloc to catch misplaced memory accesses. As a side
- * effect, this also makes sure that 64 bit module code cannot be used
- * as system call address.
+ * The vmalloc and module area will always be on the topmost area of the kernel
+ * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc and modules.
+ * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
+ * modules will reside. That makes sure that inter module branches always
+ * happen without trampolines and in addition the placement within a 2GB frame
+ * is branch prediction unit friendly.
  */
 extern unsigned long VMALLOC_START;
 extern unsigned long VMALLOC_END;
@@ -132,6 +132,14 @@ extern struct page *vmemmap;
 
 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
 
+#ifdef CONFIG_64BIT
+extern unsigned long MODULES_VADDR;
+extern unsigned long MODULES_END;
+#define MODULES_VADDR	MODULES_VADDR
+#define MODULES_END	MODULES_END
+#define MODULES_LEN	(1UL << 31)
+#endif
+
 /*
  * A 31 bit pagetable entry of S390 has following format:
  *  |   PFRA          |    |  OS  |
@@ -347,6 +355,12 @@ extern struct page *vmemmap;
 
 #define _SEGMENT_ENTRY_LARGE	0x400	/* STE-format control, large page   */
 #define _SEGMENT_ENTRY_CO	0x100	/* change-recording override   */
+#define _SEGMENT_ENTRY_SPLIT_BIT 0	/* THP splitting bit number */
+#define _SEGMENT_ENTRY_SPLIT	(1UL << _SEGMENT_ENTRY_SPLIT_BIT)
+
+/* Set of bits not changed in pmd_modify */
+#define _SEGMENT_CHG_MASK	(_SEGMENT_ENTRY_ORIGIN | _SEGMENT_ENTRY_LARGE \
+				 | _SEGMENT_ENTRY_SPLIT | _SEGMENT_ENTRY_CO)
 
 /* Page status table bits for virtualization */
 #define RCP_ACC_BITS	0xf000000000000000UL
@@ -500,12 +514,45 @@ static inline int pmd_none(pmd_t pmd)
 	return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
 }
 
+static inline int pmd_large(pmd_t pmd)
+{
+#ifdef CONFIG_64BIT
+	return !!(pmd_val(pmd) & _SEGMENT_ENTRY_LARGE);
+#else
+	return 0;
+#endif
+}
+
 static inline int pmd_bad(pmd_t pmd)
 {
 	unsigned long mask = ~_SEGMENT_ENTRY_ORIGIN & ~_SEGMENT_ENTRY_INV;
 	return (pmd_val(pmd) & mask) != _SEGMENT_ENTRY;
 }
 
+#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
+extern void pmdp_splitting_flush(struct vm_area_struct *vma,
+				 unsigned long addr, pmd_t *pmdp);
+
+#define  __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
+extern int pmdp_set_access_flags(struct vm_area_struct *vma,
+				 unsigned long address, pmd_t *pmdp,
+				 pmd_t entry, int dirty);
+
+#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
+extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
+				  unsigned long address, pmd_t *pmdp);
+
+#define __HAVE_ARCH_PMD_WRITE
+static inline int pmd_write(pmd_t pmd)
+{
+	return (pmd_val(pmd) & _SEGMENT_ENTRY_RO) == 0;
+}
+
+static inline int pmd_young(pmd_t pmd)
+{
+	return 0;
+}
+
 static inline int pte_none(pte_t pte)
 {
 	return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
@@ -1159,6 +1206,185 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
 #define pte_unmap(pte) do { } while (0)
 
+static inline void __pmd_idte(unsigned long address, pmd_t *pmdp)
+{
+	unsigned long sto = (unsigned long) pmdp -
+			    pmd_index(address) * sizeof(pmd_t);
+
+	if (!(pmd_val(*pmdp) & _SEGMENT_ENTRY_INV)) {
+		asm volatile(
+			"	.insn	rrf,0xb98e0000,%2,%3,0,0"
+			: "=m" (*pmdp)
+			: "m" (*pmdp), "a" (sto),
+			  "a" ((address & HPAGE_MASK))
+			: "cc"
+		);
+	}
+}
+
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+#define __HAVE_ARCH_PGTABLE_DEPOSIT
+extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
+
+#define __HAVE_ARCH_PGTABLE_WITHDRAW
+extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm);
+
+static inline int pmd_trans_splitting(pmd_t pmd)
+{
+	return pmd_val(pmd) & _SEGMENT_ENTRY_SPLIT;
+}
+
+static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
+			      pmd_t *pmdp, pmd_t entry)
+{
+	*pmdp = entry;
+}
+
+static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
+{
+	unsigned long pgprot_pmd = 0;
+
+	if (pgprot_val(pgprot) & _PAGE_INVALID) {
+		if (pgprot_val(pgprot) & _PAGE_SWT)
+			pgprot_pmd |= _HPAGE_TYPE_NONE;
+		pgprot_pmd |= _SEGMENT_ENTRY_INV;
+	}
+	if (pgprot_val(pgprot) & _PAGE_RO)
+		pgprot_pmd |= _SEGMENT_ENTRY_RO;
+	return pgprot_pmd;
+}
+
+static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
+{
+	pmd_val(pmd) &= _SEGMENT_CHG_MASK;
+	pmd_val(pmd) |= massage_pgprot_pmd(newprot);
+	return pmd;
+}
+
+static inline pmd_t pmd_mkhuge(pmd_t pmd)
+{
+	pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;
+	return pmd;
+}
+
+static inline pmd_t pmd_mkwrite(pmd_t pmd)
+{
+	pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
+	return pmd;
+}
+
+static inline pmd_t pmd_wrprotect(pmd_t pmd)
+{
+	pmd_val(pmd) |= _SEGMENT_ENTRY_RO;
+	return pmd;
+}
+
+static inline pmd_t pmd_mkdirty(pmd_t pmd)
+{
+	/* No dirty bit in the segment table entry. */
+	return pmd;
+}
+
+static inline pmd_t pmd_mkold(pmd_t pmd)
+{
+	/* No referenced bit in the segment table entry. */
+	return pmd;
+}
+
+static inline pmd_t pmd_mkyoung(pmd_t pmd)
+{
+	/* No referenced bit in the segment table entry. */
+	return pmd;
+}
+
+#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
+static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
+					    unsigned long address, pmd_t *pmdp)
+{
+	unsigned long pmd_addr = pmd_val(*pmdp) & HPAGE_MASK;
+	long tmp, rc;
+	int counter;
+
+	rc = 0;
+	if (MACHINE_HAS_RRBM) {
+		counter = PTRS_PER_PTE >> 6;
+		asm volatile(
+			"0:	.insn	rre,0xb9ae0000,%0,%3\n"	/* rrbm */
+			"	ogr	%1,%0\n"
+			"	la	%3,0(%4,%3)\n"
+			"	brct	%2,0b\n"
+			: "=&d" (tmp), "+&d" (rc), "+d" (counter),
+			  "+a" (pmd_addr)
+			: "a" (64 * 4096UL) : "cc");
+		rc = !!rc;
+	} else {
+		counter = PTRS_PER_PTE;
+		asm volatile(
+			"0:	rrbe	0,%2\n"
+			"	la	%2,0(%3,%2)\n"
+			"	brc	12,1f\n"
+			"	lhi	%0,1\n"
+			"1:	brct	%1,0b\n"
+			: "+d" (rc), "+d" (counter), "+a" (pmd_addr)
+			: "a" (4096UL) : "cc");
+	}
+	return rc;
+}
+
+#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
+static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
+				       unsigned long address, pmd_t *pmdp)
+{
+	pmd_t pmd = *pmdp;
+
+	__pmd_idte(address, pmdp);
+	pmd_clear(pmdp);
+	return pmd;
+}
+
+#define __HAVE_ARCH_PMDP_CLEAR_FLUSH
+static inline pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
+				     unsigned long address, pmd_t *pmdp)
+{
+	return pmdp_get_and_clear(vma->vm_mm, address, pmdp);
+}
+
+#define __HAVE_ARCH_PMDP_INVALIDATE
+static inline void pmdp_invalidate(struct vm_area_struct *vma,
+				   unsigned long address, pmd_t *pmdp)
+{
+	__pmd_idte(address, pmdp);
+}
+
+static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
+{
+	pmd_t __pmd;
+	pmd_val(__pmd) = physpage + massage_pgprot_pmd(pgprot);
+	return __pmd;
+}
+
+#define pfn_pmd(pfn, pgprot)	mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
+#define mk_pmd(page, pgprot)	pfn_pmd(page_to_pfn(page), (pgprot))
+
+static inline int pmd_trans_huge(pmd_t pmd)
+{
+	return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;
+}
+
+static inline int has_transparent_hugepage(void)
+{
+	return MACHINE_HAS_HPAGE ? 1 : 0;
+}
+
+static inline unsigned long pmd_pfn(pmd_t pmd)
+{
+	if (pmd_trans_huge(pmd))
+		return pmd_val(pmd) >> HPAGE_SHIFT;
+	else
+		return pmd_val(pmd) >> PAGE_SHIFT;
+}
+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+
 /*
  * 31 bit swap entry format:
  * A page-table entry has some bits we have to treat in a special way.
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index 56831dfa919..94e749c9023 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -35,6 +35,7 @@ static inline void get_cpu_id(struct cpuid *ptr)
 extern void s390_adjust_jiffies(void);
 extern const struct seq_operations cpuinfo_op;
 extern int sysctl_ieee_emulation_warnings;
+extern void execve_tail(void);
 
 /*
  * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
@@ -126,6 +127,7 @@ struct stack_frame {
 	regs->psw.mask	= psw_user_bits | PSW_MASK_EA | PSW_MASK_BA;	\
 	regs->psw.addr	= new_psw | PSW_ADDR_AMODE;			\
 	regs->gprs[15]	= new_stackp;					\
+	execve_tail();							\
 } while (0)
 
 #define start_thread31(regs, new_psw, new_stackp) do {			\
@@ -135,6 +137,7 @@ struct stack_frame {
 	__tlb_flush_mm(current->mm);					\
 	crst_table_downgrade(current->mm, 1UL << 31);			\
 	update_mm(current->mm, current);				\
+	execve_tail();							\
 } while (0)
 
 /* Forward declaration, a strange C thing */
@@ -150,7 +153,6 @@ static inline void show_cacheinfo(struct seq_file *m) { }
 
 /* Free all resources held by a thread. */
 extern void release_thread(struct task_struct *);
-extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 
 /*
  * Return saved PC of a blocked thread.
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index ce20a53afe9..3ee5da3bc10 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -3,316 +3,17 @@
  *    Copyright IBM Corp. 1999, 2000
  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  */
-
 #ifndef _S390_PTRACE_H
 #define _S390_PTRACE_H
 
-/*
- * Offsets in the user_regs_struct. They are used for the ptrace
- * system call and in entry.S
- */
-#ifndef __s390x__
-
-#define PT_PSWMASK  0x00
-#define PT_PSWADDR  0x04
-#define PT_GPR0     0x08
-#define PT_GPR1     0x0C
-#define PT_GPR2     0x10
-#define PT_GPR3     0x14
-#define PT_GPR4     0x18
-#define PT_GPR5     0x1C
-#define PT_GPR6     0x20
-#define PT_GPR7     0x24
-#define PT_GPR8     0x28
-#define PT_GPR9     0x2C
-#define PT_GPR10    0x30
-#define PT_GPR11    0x34
-#define PT_GPR12    0x38
-#define PT_GPR13    0x3C
-#define PT_GPR14    0x40
-#define PT_GPR15    0x44
-#define PT_ACR0     0x48
-#define PT_ACR1     0x4C
-#define PT_ACR2     0x50
-#define PT_ACR3     0x54
-#define PT_ACR4	    0x58
-#define PT_ACR5	    0x5C
-#define PT_ACR6	    0x60
-#define PT_ACR7	    0x64
-#define PT_ACR8	    0x68
-#define PT_ACR9	    0x6C
-#define PT_ACR10    0x70
-#define PT_ACR11    0x74
-#define PT_ACR12    0x78
-#define PT_ACR13    0x7C
-#define PT_ACR14    0x80
-#define PT_ACR15    0x84
-#define PT_ORIGGPR2 0x88
-#define PT_FPC	    0x90
-/*
- * A nasty fact of life that the ptrace api
- * only supports passing of longs.
- */
-#define PT_FPR0_HI  0x98
-#define PT_FPR0_LO  0x9C
-#define PT_FPR1_HI  0xA0
-#define PT_FPR1_LO  0xA4
-#define PT_FPR2_HI  0xA8
-#define PT_FPR2_LO  0xAC
-#define PT_FPR3_HI  0xB0
-#define PT_FPR3_LO  0xB4
-#define PT_FPR4_HI  0xB8
-#define PT_FPR4_LO  0xBC
-#define PT_FPR5_HI  0xC0
-#define PT_FPR5_LO  0xC4
-#define PT_FPR6_HI  0xC8
-#define PT_FPR6_LO  0xCC
-#define PT_FPR7_HI  0xD0
-#define PT_FPR7_LO  0xD4
-#define PT_FPR8_HI  0xD8
-#define PT_FPR8_LO  0XDC
-#define PT_FPR9_HI  0xE0
-#define PT_FPR9_LO  0xE4
-#define PT_FPR10_HI 0xE8
-#define PT_FPR10_LO 0xEC
-#define PT_FPR11_HI 0xF0
-#define PT_FPR11_LO 0xF4
-#define PT_FPR12_HI 0xF8
-#define PT_FPR12_LO 0xFC
-#define PT_FPR13_HI 0x100
-#define PT_FPR13_LO 0x104
-#define PT_FPR14_HI 0x108
-#define PT_FPR14_LO 0x10C
-#define PT_FPR15_HI 0x110
-#define PT_FPR15_LO 0x114
-#define PT_CR_9	    0x118
-#define PT_CR_10    0x11C
-#define PT_CR_11    0x120
-#define PT_IEEE_IP  0x13C
-#define PT_LASTOFF  PT_IEEE_IP
-#define PT_ENDREGS  0x140-1
-
-#define GPR_SIZE	4
-#define CR_SIZE		4
-
-#define STACK_FRAME_OVERHEAD	96	/* size of minimum stack frame */
-
-#else /* __s390x__ */
-
-#define PT_PSWMASK  0x00
-#define PT_PSWADDR  0x08
-#define PT_GPR0     0x10
-#define PT_GPR1     0x18
-#define PT_GPR2     0x20
-#define PT_GPR3     0x28
-#define PT_GPR4     0x30
-#define PT_GPR5     0x38
-#define PT_GPR6     0x40
-#define PT_GPR7     0x48
-#define PT_GPR8     0x50
-#define PT_GPR9     0x58
-#define PT_GPR10    0x60
-#define PT_GPR11    0x68
-#define PT_GPR12    0x70
-#define PT_GPR13    0x78
-#define PT_GPR14    0x80
-#define PT_GPR15    0x88
-#define PT_ACR0     0x90
-#define PT_ACR1     0x94
-#define PT_ACR2     0x98
-#define PT_ACR3     0x9C
-#define PT_ACR4	    0xA0
-#define PT_ACR5	    0xA4
-#define PT_ACR6	    0xA8
-#define PT_ACR7	    0xAC
-#define PT_ACR8	    0xB0
-#define PT_ACR9	    0xB4
-#define PT_ACR10    0xB8
-#define PT_ACR11    0xBC
-#define PT_ACR12    0xC0
-#define PT_ACR13    0xC4
-#define PT_ACR14    0xC8
-#define PT_ACR15    0xCC
-#define PT_ORIGGPR2 0xD0
-#define PT_FPC	    0xD8
-#define PT_FPR0     0xE0
-#define PT_FPR1     0xE8
-#define PT_FPR2     0xF0
-#define PT_FPR3     0xF8
-#define PT_FPR4     0x100
-#define PT_FPR5     0x108
-#define PT_FPR6     0x110
-#define PT_FPR7     0x118
-#define PT_FPR8     0x120
-#define PT_FPR9     0x128
-#define PT_FPR10    0x130
-#define PT_FPR11    0x138
-#define PT_FPR12    0x140
-#define PT_FPR13    0x148
-#define PT_FPR14    0x150
-#define PT_FPR15    0x158
-#define PT_CR_9     0x160
-#define PT_CR_10    0x168
-#define PT_CR_11    0x170
-#define PT_IEEE_IP  0x1A8
-#define PT_LASTOFF  PT_IEEE_IP
-#define PT_ENDREGS  0x1B0-1
-
-#define GPR_SIZE	8
-#define CR_SIZE		8
-
-#define STACK_FRAME_OVERHEAD    160      /* size of minimum stack frame */
-
-#endif /* __s390x__ */
-
-#define NUM_GPRS	16
-#define NUM_FPRS	16
-#define NUM_CRS		16
-#define NUM_ACRS	16
-
-#define NUM_CR_WORDS	3
-
-#define FPR_SIZE	8
-#define FPC_SIZE	4
-#define FPC_PAD_SIZE	4 /* gcc insists on aligning the fpregs */
-#define ACR_SIZE	4
-
-
-#define PTRACE_OLDSETOPTIONS         21
+#include <uapi/asm/ptrace.h>
 
 #ifndef __ASSEMBLY__
-#include <linux/stddef.h>
-#include <linux/types.h>
-
-typedef union
-{
-	float   f;
-	double  d;
-        __u64   ui;
-	struct
-	{
-		__u32 hi;
-		__u32 lo;
-	} fp;
-} freg_t;
-
-typedef struct
-{
-	__u32   fpc;
-	freg_t  fprs[NUM_FPRS];              
-} s390_fp_regs;
-
-#define FPC_EXCEPTION_MASK      0xF8000000
-#define FPC_FLAGS_MASK          0x00F80000
-#define FPC_DXC_MASK            0x0000FF00
-#define FPC_RM_MASK             0x00000003
-#define FPC_VALID_MASK          0xF8F8FF03
-
-/* this typedef defines how a Program Status Word looks like */
-typedef struct 
-{
-        unsigned long mask;
-        unsigned long addr;
-} __attribute__ ((aligned(8))) psw_t;
-
-typedef struct
-{
-	__u32	mask;
-	__u32	addr;
-} __attribute__ ((aligned(8))) psw_compat_t;
-
 #ifndef __s390x__
-
-#define PSW_MASK_PER		0x40000000UL
-#define PSW_MASK_DAT		0x04000000UL
-#define PSW_MASK_IO		0x02000000UL
-#define PSW_MASK_EXT		0x01000000UL
-#define PSW_MASK_KEY		0x00F00000UL
-#define PSW_MASK_BASE		0x00080000UL	/* always one */
-#define PSW_MASK_MCHECK		0x00040000UL
-#define PSW_MASK_WAIT		0x00020000UL
-#define PSW_MASK_PSTATE		0x00010000UL
-#define PSW_MASK_ASC		0x0000C000UL
-#define PSW_MASK_CC		0x00003000UL
-#define PSW_MASK_PM		0x00000F00UL
-#define PSW_MASK_RI		0x00000000UL
-#define PSW_MASK_EA		0x00000000UL
-#define PSW_MASK_BA		0x00000000UL
-
-#define PSW_MASK_USER		0x00003F00UL
-
-#define PSW_ADDR_AMODE		0x80000000UL
-#define PSW_ADDR_INSN		0x7FFFFFFFUL
-
-#define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 20)
-
-#define PSW_ASC_PRIMARY		0x00000000UL
-#define PSW_ASC_ACCREG		0x00004000UL
-#define PSW_ASC_SECONDARY	0x00008000UL
-#define PSW_ASC_HOME		0x0000C000UL
-
 #else /* __s390x__ */
-
-#define PSW_MASK_PER		0x4000000000000000UL
-#define PSW_MASK_DAT		0x0400000000000000UL
-#define PSW_MASK_IO		0x0200000000000000UL
-#define PSW_MASK_EXT		0x0100000000000000UL
-#define PSW_MASK_BASE		0x0000000000000000UL
-#define PSW_MASK_KEY		0x00F0000000000000UL
-#define PSW_MASK_MCHECK		0x0004000000000000UL
-#define PSW_MASK_WAIT		0x0002000000000000UL
-#define PSW_MASK_PSTATE		0x0001000000000000UL
-#define PSW_MASK_ASC		0x0000C00000000000UL
-#define PSW_MASK_CC		0x0000300000000000UL
-#define PSW_MASK_PM		0x00000F0000000000UL
-#define PSW_MASK_RI		0x0000008000000000UL
-#define PSW_MASK_EA		0x0000000100000000UL
-#define PSW_MASK_BA		0x0000000080000000UL
-
-#define PSW_MASK_USER		0x00003F8180000000UL
-
-#define PSW_ADDR_AMODE		0x0000000000000000UL
-#define PSW_ADDR_INSN		0xFFFFFFFFFFFFFFFFUL
-
-#define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 52)
-
-#define PSW_ASC_PRIMARY		0x0000000000000000UL
-#define PSW_ASC_ACCREG		0x0000400000000000UL
-#define PSW_ASC_SECONDARY	0x0000800000000000UL
-#define PSW_ASC_HOME		0x0000C00000000000UL
-
 #endif /* __s390x__ */
-
-#ifdef __KERNEL__
 extern long psw_kernel_bits;
 extern long psw_user_bits;
-#endif
-
-/*
- * The s390_regs structure is used to define the elf_gregset_t.
- */
-typedef struct
-{
-	psw_t psw;
-	unsigned long gprs[NUM_GPRS];
-	unsigned int  acrs[NUM_ACRS];
-	unsigned long orig_gpr2;
-} s390_regs;
-
-typedef struct
-{
-	psw_compat_t	psw;
-	__u32		gprs[NUM_GPRS];
-	__u32		acrs[NUM_ACRS];
-	__u32		orig_gpr2;
-} s390_compat_regs;
-
-typedef struct
-{
-	__u32		gprs_high[NUM_GPRS];
-} s390_compat_regs_high;
-
-#ifdef __KERNEL__
 
 /*
  * The pt_regs struct defines the way the registers are stored on
@@ -376,167 +77,8 @@ struct per_struct_kernel {
 #define PER_CONTROL_SUSPENSION		0x00400000UL
 #define PER_CONTROL_ALTERATION		0x00200000UL
 
-#endif
-
-/*
- * Now for the user space program event recording (trace) definitions.
- * The following structures are used only for the ptrace interface, don't
- * touch or even look at it if you don't want to modify the user-space
- * ptrace interface. In particular stay away from it for in-kernel PER.
- */
-typedef struct
-{
-	unsigned long cr[NUM_CR_WORDS];
-} per_cr_words;
-
-#define PER_EM_MASK 0xE8000000UL
-
-typedef	struct
-{
 #ifdef __s390x__
-	unsigned                       : 32;
 #endif /* __s390x__ */
-	unsigned em_branching          : 1;
-	unsigned em_instruction_fetch  : 1;
-	/*
-	 * Switching on storage alteration automatically fixes
-	 * the storage alteration event bit in the users std.
-	 */
-	unsigned em_storage_alteration : 1;
-	unsigned em_gpr_alt_unused     : 1;
-	unsigned em_store_real_address : 1;
-	unsigned                       : 3;
-	unsigned branch_addr_ctl       : 1;
-	unsigned                       : 1;
-	unsigned storage_alt_space_ctl : 1;
-	unsigned                       : 21;
-	unsigned long starting_addr;
-	unsigned long ending_addr;
-} per_cr_bits;
-
-typedef struct
-{
-	unsigned short perc_atmid;
-	unsigned long address;
-	unsigned char access_id;
-} per_lowcore_words;
-
-typedef struct
-{
-	unsigned perc_branching          : 1;
-	unsigned perc_instruction_fetch  : 1;
-	unsigned perc_storage_alteration : 1;
-	unsigned perc_gpr_alt_unused     : 1;
-	unsigned perc_store_real_address : 1;
-	unsigned                         : 3;
-	unsigned atmid_psw_bit_31        : 1;
-	unsigned atmid_validity_bit      : 1;
-	unsigned atmid_psw_bit_32        : 1;
-	unsigned atmid_psw_bit_5         : 1;
-	unsigned atmid_psw_bit_16        : 1;
-	unsigned atmid_psw_bit_17        : 1;
-	unsigned si                      : 2;
-	unsigned long address;
-	unsigned                         : 4;
-	unsigned access_id               : 4;
-} per_lowcore_bits;
-
-typedef struct
-{
-	union {
-		per_cr_words   words;
-		per_cr_bits    bits;
-	} control_regs;
-	/*
-	 * Use these flags instead of setting em_instruction_fetch
-	 * directly they are used so that single stepping can be
-	 * switched on & off while not affecting other tracing
-	 */
-	unsigned  single_step       : 1;
-	unsigned  instruction_fetch : 1;
-	unsigned                    : 30;
-	/*
-	 * These addresses are copied into cr10 & cr11 if single
-	 * stepping is switched off
-	 */
-	unsigned long starting_addr;
-	unsigned long ending_addr;
-	union {
-		per_lowcore_words words;
-		per_lowcore_bits  bits;
-	} lowcore; 
-} per_struct;
-
-typedef struct
-{
-	unsigned int  len;
-	unsigned long kernel_addr;
-	unsigned long process_addr;
-} ptrace_area;
-
-/*
- * S/390 specific non posix ptrace requests. I chose unusual values so
- * they are unlikely to clash with future ptrace definitions.
- */
-#define PTRACE_PEEKUSR_AREA           0x5000
-#define PTRACE_POKEUSR_AREA           0x5001
-#define PTRACE_PEEKTEXT_AREA	      0x5002
-#define PTRACE_PEEKDATA_AREA	      0x5003
-#define PTRACE_POKETEXT_AREA	      0x5004
-#define PTRACE_POKEDATA_AREA 	      0x5005
-#define PTRACE_GET_LAST_BREAK	      0x5006
-#define PTRACE_PEEK_SYSTEM_CALL       0x5007
-#define PTRACE_POKE_SYSTEM_CALL	      0x5008
-#define PTRACE_ENABLE_TE	      0x5009
-#define PTRACE_DISABLE_TE	      0x5010
-
-/*
- * PT_PROT definition is loosely based on hppa bsd definition in
- * gdb/hppab-nat.c
- */
-#define PTRACE_PROT                       21
-
-typedef enum
-{
-	ptprot_set_access_watchpoint,
-	ptprot_set_write_watchpoint,
-	ptprot_disable_watchpoint
-} ptprot_flags;
-
-typedef struct
-{
-	unsigned long lowaddr;
-	unsigned long hiaddr;
-	ptprot_flags prot;
-} ptprot_area;                     
-
-/* Sequence of bytes for breakpoint illegal instruction.  */
-#define S390_BREAKPOINT     {0x0,0x1}
-#define S390_BREAKPOINT_U16 ((__u16)0x0001)
-#define S390_SYSCALL_OPCODE ((__u16)0x0a00)
-#define S390_SYSCALL_SIZE   2
-
-/*
- * The user_regs_struct defines the way the user registers are
- * store on the stack for signal handling.
- */
-struct user_regs_struct
-{
-	psw_t psw;
-	unsigned long gprs[NUM_GPRS];
-	unsigned int  acrs[NUM_ACRS];
-	unsigned long orig_gpr2;
-	s390_fp_regs fp_regs;
-	/*
-	 * These per registers are in here so that gdb can modify them
-	 * itself as there is no "official" ptrace interface for hardware
-	 * watchpoints. This is the way intel does it.
-	 */
-	per_struct per_info;
-	unsigned long ieee_instruction_pointer;	/* obsolete, always 0 */
-};
-
-#ifdef __KERNEL__
 /*
  * These are defined as per linux/ptrace.h, which see.
  */
@@ -562,7 +104,5 @@ static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
 	return regs->gprs[15] & PSW_ADDR_INSN;
 }
 
-#endif /* __KERNEL__ */
 #endif /* __ASSEMBLY__ */
-
 #endif /* _S390_PTRACE_H */
diff --git a/arch/s390/include/asm/schid.h b/arch/s390/include/asm/schid.h
index 3e4d401b4e4..40b47dfa9d6 100644
--- a/arch/s390/include/asm/schid.h
+++ b/arch/s390/include/asm/schid.h
@@ -1,19 +1,8 @@
 #ifndef ASM_SCHID_H
 #define ASM_SCHID_H
 
-#include <linux/types.h>
-
-struct subchannel_id {
-	__u32 cssid : 8;
-	__u32 : 4;
-	__u32 m : 1;
-	__u32 ssid : 2;
-	__u32 one : 1;
-	__u32 sch_no : 16;
-} __attribute__ ((packed, aligned(4)));
-
-#ifdef __KERNEL__
 #include <linux/string.h>
+#include <uapi/asm/schid.h>
 
 /* Helper function for sane state of pre-allocated subchannel_id. */
 static inline void
@@ -29,6 +18,4 @@ schid_equal(struct subchannel_id *schid1, struct subchannel_id *schid2)
 	return !memcmp(schid1, schid2, sizeof(struct subchannel_id));
 }
 
-#endif /* __KERNEL__ */
-
 #endif /* ASM_SCHID_H */
diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h
index 87b47ca954f..f69f76b3447 100644
--- a/arch/s390/include/asm/setup.h
+++ b/arch/s390/include/asm/setup.h
@@ -2,15 +2,11 @@
  *  S390 version
  *    Copyright IBM Corp. 1999, 2010
  */
-
 #ifndef _ASM_S390_SETUP_H
 #define _ASM_S390_SETUP_H
 
-#define COMMAND_LINE_SIZE	4096
-
-#define ARCH_COMMAND_LINE_SIZE	896
+#include <uapi/asm/setup.h>
 
-#ifdef __KERNEL__
 
 #define PARMAREA		0x10400
 #define MEMORY_CHUNKS		256
@@ -75,18 +71,21 @@ extern unsigned int s390_user_mode;
 #define MACHINE_FLAG_DIAG9C	(1UL << 7)
 #define MACHINE_FLAG_MVCOS	(1UL << 8)
 #define MACHINE_FLAG_KVM	(1UL << 9)
-#define MACHINE_FLAG_HPAGE	(1UL << 10)
-#define MACHINE_FLAG_PFMF	(1UL << 11)
+#define MACHINE_FLAG_EDAT1	(1UL << 10)
+#define MACHINE_FLAG_EDAT2	(1UL << 11)
 #define MACHINE_FLAG_LPAR	(1UL << 12)
 #define MACHINE_FLAG_SPP	(1UL << 13)
 #define MACHINE_FLAG_TOPOLOGY	(1UL << 14)
 #define MACHINE_FLAG_TE		(1UL << 15)
+#define MACHINE_FLAG_RRBM	(1UL << 16)
 
 #define MACHINE_IS_VM		(S390_lowcore.machine_flags & MACHINE_FLAG_VM)
 #define MACHINE_IS_KVM		(S390_lowcore.machine_flags & MACHINE_FLAG_KVM)
 #define MACHINE_IS_LPAR		(S390_lowcore.machine_flags & MACHINE_FLAG_LPAR)
 
 #define MACHINE_HAS_DIAG9C	(S390_lowcore.machine_flags & MACHINE_FLAG_DIAG9C)
+#define MACHINE_HAS_PFMF	MACHINE_HAS_EDAT1
+#define MACHINE_HAS_HPAGE	MACHINE_HAS_EDAT1
 
 #ifndef CONFIG_64BIT
 #define MACHINE_HAS_IEEE	(S390_lowcore.machine_flags & MACHINE_FLAG_IEEE)
@@ -95,11 +94,12 @@ extern unsigned int s390_user_mode;
 #define MACHINE_HAS_DIAG44	(1)
 #define MACHINE_HAS_MVPG	(S390_lowcore.machine_flags & MACHINE_FLAG_MVPG)
 #define MACHINE_HAS_MVCOS	(0)
-#define MACHINE_HAS_HPAGE	(0)
-#define MACHINE_HAS_PFMF	(0)
+#define MACHINE_HAS_EDAT1	(0)
+#define MACHINE_HAS_EDAT2	(0)
 #define MACHINE_HAS_SPP		(0)
 #define MACHINE_HAS_TOPOLOGY	(0)
-#define MACHINE_HAS_TE		      (0)
+#define MACHINE_HAS_TE		(0)
+#define MACHINE_HAS_RRBM	(0)
 #else /* CONFIG_64BIT */
 #define MACHINE_HAS_IEEE	(1)
 #define MACHINE_HAS_CSP		(1)
@@ -107,11 +107,12 @@ extern unsigned int s390_user_mode;
 #define MACHINE_HAS_DIAG44	(S390_lowcore.machine_flags & MACHINE_FLAG_DIAG44)
 #define MACHINE_HAS_MVPG	(1)
 #define MACHINE_HAS_MVCOS	(S390_lowcore.machine_flags & MACHINE_FLAG_MVCOS)
-#define MACHINE_HAS_HPAGE	(S390_lowcore.machine_flags & MACHINE_FLAG_HPAGE)
-#define MACHINE_HAS_PFMF	(S390_lowcore.machine_flags & MACHINE_FLAG_PFMF)
+#define MACHINE_HAS_EDAT1	(S390_lowcore.machine_flags & MACHINE_FLAG_EDAT1)
+#define MACHINE_HAS_EDAT2	(S390_lowcore.machine_flags & MACHINE_FLAG_EDAT2)
 #define MACHINE_HAS_SPP		(S390_lowcore.machine_flags & MACHINE_FLAG_SPP)
 #define MACHINE_HAS_TOPOLOGY	(S390_lowcore.machine_flags & MACHINE_FLAG_TOPOLOGY)
 #define MACHINE_HAS_TE		(S390_lowcore.machine_flags & MACHINE_FLAG_TE)
+#define MACHINE_HAS_RRBM	(S390_lowcore.machine_flags & MACHINE_FLAG_RRBM)
 #endif /* CONFIG_64BIT */
 
 #define ZFCPDUMP_HSA_SIZE	(32UL<<20)
@@ -170,5 +171,4 @@ extern void (*_machine_power_off)(void);
 #define COMMAND_LINE      0x10480
 
 #endif /* __ASSEMBLY__ */
-#endif /* __KERNEL__ */
 #endif /* _ASM_S390_SETUP_H */
diff --git a/arch/s390/include/asm/signal.h b/arch/s390/include/asm/signal.h
index 6d4d9d1faee..bffdbdd5b3d 100644
--- a/arch/s390/include/asm/signal.h
+++ b/arch/s390/include/asm/signal.h
@@ -3,18 +3,11 @@
  *
  *  Derived from "include/asm-i386/signal.h"
  */
-
 #ifndef _ASMS390_SIGNAL_H
 #define _ASMS390_SIGNAL_H
 
-#include <linux/types.h>
-#include <linux/time.h>
-
-/* Avoid too many header ordering problems.  */
-struct siginfo;
-struct pt_regs;
+#include <uapi/asm/signal.h>
 
-#ifdef __KERNEL__
 /* Most things should be clean enough to redefine this at will, if care
    is taken to make libc match.  */
 #include <asm/sigcontext.h>
@@ -28,94 +21,6 @@ typedef struct {
         unsigned long sig[_NSIG_WORDS];
 } sigset_t;
 
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-#define NSIG            32
-typedef unsigned long sigset_t;
-
-#endif /* __KERNEL__ */
-
-#define SIGHUP           1
-#define SIGINT           2
-#define SIGQUIT          3
-#define SIGILL           4
-#define SIGTRAP          5
-#define SIGABRT          6
-#define SIGIOT           6
-#define SIGBUS           7
-#define SIGFPE           8
-#define SIGKILL          9
-#define SIGUSR1         10
-#define SIGSEGV         11
-#define SIGUSR2         12
-#define SIGPIPE         13
-#define SIGALRM         14
-#define SIGTERM         15
-#define SIGSTKFLT       16
-#define SIGCHLD         17
-#define SIGCONT         18
-#define SIGSTOP         19
-#define SIGTSTP         20
-#define SIGTTIN         21
-#define SIGTTOU         22
-#define SIGURG          23
-#define SIGXCPU         24
-#define SIGXFSZ         25
-#define SIGVTALRM       26
-#define SIGPROF         27
-#define SIGWINCH        28
-#define SIGIO           29
-#define SIGPOLL         SIGIO
-/*
-#define SIGLOST         29
-*/
-#define SIGPWR          30
-#define SIGSYS		31
-#define SIGUNUSED       31
-
-/* These should not be considered constants from userland.  */
-#define SIGRTMIN        32
-#define SIGRTMAX        _NSIG
-
-/*
- * SA_FLAGS values:
- *
- * SA_ONSTACK indicates that a registered stack_t will be used.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
- * SA_RESETHAND clears the handler when the signal is delivered.
- * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
- * SA_NODEFER prevents the current signal from being masked in the handler.
- *
- * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
- * Unix names RESETHAND and NODEFER respectively.
- */
-#define SA_NOCLDSTOP    0x00000001
-#define SA_NOCLDWAIT    0x00000002
-#define SA_SIGINFO      0x00000004
-#define SA_ONSTACK      0x08000000
-#define SA_RESTART      0x10000000
-#define SA_NODEFER      0x40000000
-#define SA_RESETHAND    0x80000000
-
-#define SA_NOMASK       SA_NODEFER
-#define SA_ONESHOT      SA_RESETHAND
-
-#define SA_RESTORER     0x04000000
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK      1
-#define SS_DISABLE      2
-
-#define MINSIGSTKSZ     2048
-#define SIGSTKSZ        8192
-
-#include <asm-generic/signal-defs.h>
-
-#ifdef __KERNEL__
 struct old_sigaction {
         __sighandler_t sa_handler;
         old_sigset_t sa_mask;
@@ -136,35 +41,4 @@ struct k_sigaction {
 
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 
-#else
-/* Here we must cater to libcs that poke about in kernel headers.  */
-
-struct sigaction {
-        union {
-          __sighandler_t _sa_handler;
-          void (*_sa_sigaction)(int, struct siginfo *, void *);
-        } _u;
-#ifndef __s390x__ /* lovely */
-        sigset_t sa_mask;
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-#else  /* __s390x__ */
-        unsigned long sa_flags;
-        void (*sa_restorer)(void);
-	sigset_t sa_mask;
-#endif /* __s390x__ */
-};
-
-#define sa_handler      _u._sa_handler
-#define sa_sigaction    _u._sa_sigaction
-
-#endif /* __KERNEL__ */
-
-typedef struct sigaltstack {
-        void __user *ss_sp;
-        int ss_flags;
-        size_t ss_size;
-} stack_t;
-
-
 #endif
diff --git a/arch/s390/include/asm/termios.h b/arch/s390/include/asm/termios.h
index cb9fe2786b8..db028d17f06 100644
--- a/arch/s390/include/asm/termios.h
+++ b/arch/s390/include/asm/termios.h
@@ -3,49 +3,11 @@
  *
  *  Derived from "include/asm-i386/termios.h"
  */
-
 #ifndef _S390_TERMIOS_H
 #define _S390_TERMIOS_H
 
-#include <asm/termbits.h>
-#include <asm/ioctls.h>
-
-struct winsize {
-	unsigned short ws_row;
-	unsigned short ws_col;
-	unsigned short ws_xpixel;
-	unsigned short ws_ypixel;
-};
-
-#define NCC 8
-struct termio {
-	unsigned short c_iflag;		/* input mode flags */
-	unsigned short c_oflag;		/* output mode flags */
-	unsigned short c_cflag;		/* control mode flags */
-	unsigned short c_lflag;		/* local mode flags */
-	unsigned char c_line;		/* line discipline */
-	unsigned char c_cc[NCC];	/* control characters */
-};
+#include <uapi/asm/termios.h>
 
-/* modem lines */
-#define TIOCM_LE	0x001
-#define TIOCM_DTR	0x002
-#define TIOCM_RTS	0x004
-#define TIOCM_ST	0x008
-#define TIOCM_SR	0x010
-#define TIOCM_CTS	0x020
-#define TIOCM_CAR	0x040
-#define TIOCM_RNG	0x080
-#define TIOCM_DSR	0x100
-#define TIOCM_CD	TIOCM_CAR
-#define TIOCM_RI	TIOCM_RNG
-#define TIOCM_OUT1	0x2000
-#define TIOCM_OUT2	0x4000
-#define TIOCM_LOOP	0x8000
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-
-#ifdef __KERNEL__
 
 /*	intr=^C		quit=^\		erase=del	kill=^U
 	eof=^D		vtime=\0	vmin=\1		sxtc=\0
@@ -60,6 +22,4 @@ struct termio {
 
 #include <asm-generic/termios-base.h>
 
-#endif	/* __KERNEL__ */
-
 #endif	/* _S390_TERMIOS_H */
diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
index bb08e2afc5d..9e2cfe0349c 100644
--- a/arch/s390/include/asm/thread_info.h
+++ b/arch/s390/include/asm/thread_info.h
@@ -91,8 +91,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SYSCALL_AUDIT	9	/* syscall auditing active */
 #define TIF_SECCOMP		10	/* secure computing */
 #define TIF_SYSCALL_TRACEPOINT	11	/* syscall tracepoint instrumentation */
-#define TIF_POLLING_NRFLAG	16	/* true if poll_idle() is polling
-					   TIF_NEED_RESCHED */
 #define TIF_31BIT		17	/* 32bit process */
 #define TIF_MEMDIE		18	/* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK	19	/* restore signal mask in do_signal() */
@@ -100,7 +98,6 @@ static inline struct thread_info *current_thread_info(void)
 
 #define _TIF_SYSCALL		(1<<TIF_SYSCALL)
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
 #define _TIF_PER_TRAP		(1<<TIF_PER_TRAP)
@@ -109,7 +106,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SYSCALL_AUDIT	(1<<TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP		(1<<TIF_SECCOMP)
 #define _TIF_SYSCALL_TRACEPOINT	(1<<TIF_SYSCALL_TRACEPOINT)
-#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
 #define _TIF_31BIT		(1<<TIF_31BIT)
 #define _TIF_SINGLE_STEP	(1<<TIF_SINGLE_STEP)
 
diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h
index 06e5acbc84b..b75d7d68668 100644
--- a/arch/s390/include/asm/tlb.h
+++ b/arch/s390/include/asm/tlb.h
@@ -137,6 +137,7 @@ static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
 #define tlb_start_vma(tlb, vma)			do { } while (0)
 #define tlb_end_vma(tlb, vma)			do { } while (0)
 #define tlb_remove_tlb_entry(tlb, ptep, addr)	do { } while (0)
+#define tlb_remove_pmd_tlb_entry(tlb, pmdp, addr)	do { } while (0)
 #define tlb_migrate_finish(mm)			do { } while (0)
 
 #endif /* _S390_TLB_H */
diff --git a/arch/s390/include/asm/types.h b/arch/s390/include/asm/types.h
index 6ba7c2c7217..dccef3ca91f 100644
--- a/arch/s390/include/asm/types.h
+++ b/arch/s390/include/asm/types.h
@@ -3,26 +3,14 @@
  *
  *  Derived from "include/asm-i386/types.h"
  */
-
 #ifndef _S390_TYPES_H
 #define _S390_TYPES_H
 
-#include <asm-generic/int-ll64.h>
-
-#ifndef __ASSEMBLY__
-
-/* A address type so that arithmetic can be done on it & it can be upgraded to
-   64 bit when necessary 
-*/
-typedef unsigned long addr_t; 
-typedef __signed__ long saddr_t;
-
-#endif /* __ASSEMBLY__ */
+#include <uapi/asm/types.h>
 
 /*
  * These aren't exported outside the kernel to avoid name space clashes
  */
-#ifdef __KERNEL__
 
 #ifndef __ASSEMBLY__
 
@@ -37,5 +25,4 @@ typedef union {
 
 #endif /* ! CONFIG_64BIT   */
 #endif /* __ASSEMBLY__  */
-#endif /* __KERNEL__    */
 #endif /* _S390_TYPES_H */
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 4e64b5cd155..bbbae41fa9a 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -3,375 +3,11 @@
  *
  *  Derived from "include/asm-i386/unistd.h"
  */
-
 #ifndef _ASM_S390_UNISTD_H_
 #define _ASM_S390_UNISTD_H_
 
-/*
- * This file contains the system call numbers.
- */
-
-#define __NR_exit                 1
-#define __NR_fork                 2
-#define __NR_read                 3
-#define __NR_write                4
-#define __NR_open                 5
-#define __NR_close                6
-#define __NR_restart_syscall	  7
-#define __NR_creat                8
-#define __NR_link                 9
-#define __NR_unlink              10
-#define __NR_execve              11
-#define __NR_chdir               12
-#define __NR_mknod               14
-#define __NR_chmod               15
-#define __NR_lseek               19
-#define __NR_getpid              20
-#define __NR_mount               21
-#define __NR_umount              22
-#define __NR_ptrace              26
-#define __NR_alarm               27
-#define __NR_pause               29
-#define __NR_utime               30
-#define __NR_access              33
-#define __NR_nice                34
-#define __NR_sync                36
-#define __NR_kill                37
-#define __NR_rename              38
-#define __NR_mkdir               39
-#define __NR_rmdir               40
-#define __NR_dup                 41
-#define __NR_pipe                42
-#define __NR_times               43
-#define __NR_brk                 45
-#define __NR_signal              48
-#define __NR_acct                51
-#define __NR_umount2             52
-#define __NR_ioctl               54
-#define __NR_fcntl               55
-#define __NR_setpgid             57
-#define __NR_umask               60
-#define __NR_chroot              61
-#define __NR_ustat               62
-#define __NR_dup2                63
-#define __NR_getppid             64
-#define __NR_getpgrp             65
-#define __NR_setsid              66
-#define __NR_sigaction           67
-#define __NR_sigsuspend          72
-#define __NR_sigpending          73
-#define __NR_sethostname         74
-#define __NR_setrlimit           75
-#define __NR_getrusage           77
-#define __NR_gettimeofday        78
-#define __NR_settimeofday        79
-#define __NR_symlink             83
-#define __NR_readlink            85
-#define __NR_uselib              86
-#define __NR_swapon              87
-#define __NR_reboot              88
-#define __NR_readdir             89
-#define __NR_mmap                90
-#define __NR_munmap              91
-#define __NR_truncate            92
-#define __NR_ftruncate           93
-#define __NR_fchmod              94
-#define __NR_getpriority         96
-#define __NR_setpriority         97
-#define __NR_statfs              99
-#define __NR_fstatfs            100
-#define __NR_socketcall         102
-#define __NR_syslog             103
-#define __NR_setitimer          104
-#define __NR_getitimer          105
-#define __NR_stat               106
-#define __NR_lstat              107
-#define __NR_fstat              108
-#define __NR_lookup_dcookie     110
-#define __NR_vhangup            111
-#define __NR_idle               112
-#define __NR_wait4              114
-#define __NR_swapoff            115
-#define __NR_sysinfo            116
-#define __NR_ipc                117
-#define __NR_fsync              118
-#define __NR_sigreturn          119
-#define __NR_clone              120
-#define __NR_setdomainname      121
-#define __NR_uname              122
-#define __NR_adjtimex           124
-#define __NR_mprotect           125
-#define __NR_sigprocmask        126
-#define __NR_create_module      127
-#define __NR_init_module        128
-#define __NR_delete_module      129
-#define __NR_get_kernel_syms    130
-#define __NR_quotactl           131
-#define __NR_getpgid            132
-#define __NR_fchdir             133
-#define __NR_bdflush            134
-#define __NR_sysfs              135
-#define __NR_personality        136
-#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
-#define __NR_getdents           141
-#define __NR_flock              143
-#define __NR_msync              144
-#define __NR_readv              145
-#define __NR_writev             146
-#define __NR_getsid             147
-#define __NR_fdatasync          148
-#define __NR__sysctl            149
-#define __NR_mlock              150
-#define __NR_munlock            151
-#define __NR_mlockall           152
-#define __NR_munlockall         153
-#define __NR_sched_setparam             154
-#define __NR_sched_getparam             155
-#define __NR_sched_setscheduler         156
-#define __NR_sched_getscheduler         157
-#define __NR_sched_yield                158
-#define __NR_sched_get_priority_max     159
-#define __NR_sched_get_priority_min     160
-#define __NR_sched_rr_get_interval      161
-#define __NR_nanosleep          162
-#define __NR_mremap             163
-#define __NR_query_module       167
-#define __NR_poll               168
-#define __NR_nfsservctl         169
-#define __NR_prctl              172
-#define __NR_rt_sigreturn       173
-#define __NR_rt_sigaction       174
-#define __NR_rt_sigprocmask     175
-#define __NR_rt_sigpending      176
-#define __NR_rt_sigtimedwait    177
-#define __NR_rt_sigqueueinfo    178
-#define __NR_rt_sigsuspend      179
-#define __NR_pread64            180
-#define __NR_pwrite64           181
-#define __NR_getcwd             183
-#define __NR_capget             184
-#define __NR_capset             185
-#define __NR_sigaltstack        186
-#define __NR_sendfile           187
-#define __NR_getpmsg		188
-#define __NR_putpmsg		189
-#define __NR_vfork		190
-#define __NR_pivot_root         217
-#define __NR_mincore            218
-#define __NR_madvise            219
-#define __NR_getdents64		220
-#define __NR_readahead		222
-#define __NR_setxattr		224
-#define __NR_lsetxattr		225
-#define __NR_fsetxattr		226
-#define __NR_getxattr		227
-#define __NR_lgetxattr		228
-#define __NR_fgetxattr		229
-#define __NR_listxattr		230
-#define __NR_llistxattr		231
-#define __NR_flistxattr		232
-#define __NR_removexattr	233
-#define __NR_lremovexattr	234
-#define __NR_fremovexattr	235
-#define __NR_gettid		236
-#define __NR_tkill		237
-#define __NR_futex		238
-#define __NR_sched_setaffinity	239
-#define __NR_sched_getaffinity	240
-#define __NR_tgkill		241
-/* Number 242 is reserved for tux */
-#define __NR_io_setup		243
-#define __NR_io_destroy		244
-#define __NR_io_getevents	245
-#define __NR_io_submit		246
-#define __NR_io_cancel		247
-#define __NR_exit_group		248
-#define __NR_epoll_create	249
-#define __NR_epoll_ctl		250
-#define __NR_epoll_wait		251
-#define __NR_set_tid_address	252
-#define __NR_fadvise64		253
-#define __NR_timer_create	254
-#define __NR_timer_settime	(__NR_timer_create+1)
-#define __NR_timer_gettime	(__NR_timer_create+2)
-#define __NR_timer_getoverrun	(__NR_timer_create+3)
-#define __NR_timer_delete	(__NR_timer_create+4)
-#define __NR_clock_settime	(__NR_timer_create+5)
-#define __NR_clock_gettime	(__NR_timer_create+6)
-#define __NR_clock_getres	(__NR_timer_create+7)
-#define __NR_clock_nanosleep	(__NR_timer_create+8)
-/* Number 263 is reserved for vserver */
-#define __NR_statfs64		265
-#define __NR_fstatfs64		266
-#define __NR_remap_file_pages	267
-/* Number 268 is reserved for new sys_mbind */
-/* Number 269 is reserved for new sys_get_mempolicy */
-/* Number 270 is reserved for new sys_set_mempolicy */
-#define __NR_mq_open		271
-#define __NR_mq_unlink		272
-#define __NR_mq_timedsend	273
-#define __NR_mq_timedreceive	274
-#define __NR_mq_notify		275
-#define __NR_mq_getsetattr	276
-#define __NR_kexec_load		277
-#define __NR_add_key		278
-#define __NR_request_key	279
-#define __NR_keyctl		280
-#define __NR_waitid		281
-#define __NR_ioprio_set		282
-#define __NR_ioprio_get		283
-#define __NR_inotify_init	284
-#define __NR_inotify_add_watch	285
-#define __NR_inotify_rm_watch	286
-/* Number 287 is reserved for new sys_migrate_pages */
-#define __NR_openat		288
-#define __NR_mkdirat		289
-#define __NR_mknodat		290
-#define __NR_fchownat		291
-#define __NR_futimesat		292
-#define __NR_unlinkat		294
-#define __NR_renameat		295
-#define __NR_linkat		296
-#define __NR_symlinkat		297
-#define __NR_readlinkat		298
-#define __NR_fchmodat		299
-#define __NR_faccessat		300
-#define __NR_pselect6		301
-#define __NR_ppoll		302
-#define __NR_unshare		303
-#define __NR_set_robust_list	304
-#define __NR_get_robust_list	305
-#define __NR_splice		306
-#define __NR_sync_file_range	307
-#define __NR_tee		308
-#define __NR_vmsplice		309
-/* Number 310 is reserved for new sys_move_pages */
-#define __NR_getcpu		311
-#define __NR_epoll_pwait	312
-#define __NR_utimes		313
-#define __NR_fallocate		314
-#define __NR_utimensat		315
-#define __NR_signalfd		316
-#define __NR_timerfd		317
-#define __NR_eventfd		318
-#define __NR_timerfd_create	319
-#define __NR_timerfd_settime	320
-#define __NR_timerfd_gettime	321
-#define __NR_signalfd4		322
-#define __NR_eventfd2		323
-#define __NR_inotify_init1	324
-#define __NR_pipe2		325
-#define __NR_dup3		326
-#define __NR_epoll_create1	327
-#define	__NR_preadv		328
-#define	__NR_pwritev		329
-#define __NR_rt_tgsigqueueinfo	330
-#define __NR_perf_event_open	331
-#define __NR_fanotify_init	332
-#define __NR_fanotify_mark	333
-#define __NR_prlimit64		334
-#define __NR_name_to_handle_at	335
-#define __NR_open_by_handle_at	336
-#define __NR_clock_adjtime	337
-#define __NR_syncfs		338
-#define __NR_setns		339
-#define __NR_process_vm_readv	340
-#define __NR_process_vm_writev	341
-#define __NR_s390_runtime_instr 342
-#define __NR_kcmp		343
-#define NR_syscalls 344
-
-/* 
- * There are some system calls that are not present on 64 bit, some
- * have a different name although they do the same (e.g. __NR_chown32
- * is __NR_chown on 64 bit).
- */
-#ifndef __s390x__
-
-#define __NR_time		 13
-#define __NR_lchown		 16
-#define __NR_setuid		 23
-#define __NR_getuid		 24
-#define __NR_stime		 25
-#define __NR_setgid		 46
-#define __NR_getgid		 47
-#define __NR_geteuid		 49
-#define __NR_getegid		 50
-#define __NR_setreuid		 70
-#define __NR_setregid		 71
-#define __NR_getrlimit		 76
-#define __NR_getgroups		 80
-#define __NR_setgroups		 81
-#define __NR_fchown		 95
-#define __NR_ioperm		101
-#define __NR_setfsuid		138
-#define __NR_setfsgid		139
-#define __NR__llseek		140
-#define __NR__newselect 	142
-#define __NR_setresuid		164
-#define __NR_getresuid		165
-#define __NR_setresgid		170
-#define __NR_getresgid		171
-#define __NR_chown		182
-#define __NR_ugetrlimit		191	/* SuS compliant getrlimit */
-#define __NR_mmap2		192
-#define __NR_truncate64		193
-#define __NR_ftruncate64	194
-#define __NR_stat64		195
-#define __NR_lstat64		196
-#define __NR_fstat64		197
-#define __NR_lchown32		198
-#define __NR_getuid32		199
-#define __NR_getgid32		200
-#define __NR_geteuid32		201
-#define __NR_getegid32		202
-#define __NR_setreuid32		203
-#define __NR_setregid32		204
-#define __NR_getgroups32	205
-#define __NR_setgroups32	206
-#define __NR_fchown32		207
-#define __NR_setresuid32	208
-#define __NR_getresuid32	209
-#define __NR_setresgid32	210
-#define __NR_getresgid32	211
-#define __NR_chown32		212
-#define __NR_setuid32		213
-#define __NR_setgid32		214
-#define __NR_setfsuid32		215
-#define __NR_setfsgid32		216
-#define __NR_fcntl64		221
-#define __NR_sendfile64		223
-#define __NR_fadvise64_64	264
-#define __NR_fstatat64		293
-
-#else
-
-#define __NR_select		142
-#define __NR_getrlimit		191	/* SuS compliant getrlimit */
-#define __NR_lchown  		198
-#define __NR_getuid  		199
-#define __NR_getgid  		200
-#define __NR_geteuid  		201
-#define __NR_getegid  		202
-#define __NR_setreuid  		203
-#define __NR_setregid  		204
-#define __NR_getgroups  	205
-#define __NR_setgroups  	206
-#define __NR_fchown  		207
-#define __NR_setresuid  	208
-#define __NR_getresuid  	209
-#define __NR_setresgid  	210
-#define __NR_getresgid  	211
-#define __NR_chown  		212
-#define __NR_setuid  		213
-#define __NR_setgid  		214
-#define __NR_setfsuid  		215
-#define __NR_setfsgid  		216
-#define __NR_newfstatat		293
-
-#endif
+#include <uapi/asm/unistd.h>
 
-#ifdef __KERNEL__
 
 #ifndef CONFIG_64BIT
 #define __IGNORE_select
@@ -417,6 +53,8 @@
 #   define __ARCH_WANT_COMPAT_SYS_TIME
 #   define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
 # endif
+#define __ARCH_WANT_SYS_EXECVE
+#define __ARCH_WANT_KERNEL_EXECVE
 
 /*
  * "Conditional" syscalls
@@ -426,5 +64,4 @@
  */
 #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
 
-#endif /* __KERNEL__ */
 #endif /* _ASM_S390_UNISTD_H_ */
diff --git a/arch/s390/include/uapi/asm/Kbuild b/arch/s390/include/uapi/asm/Kbuild
index baebb3da1d4..7bf68fff7c5 100644
--- a/arch/s390/include/uapi/asm/Kbuild
+++ b/arch/s390/include/uapi/asm/Kbuild
@@ -1,3 +1,48 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += byteorder.h
+header-y += chpid.h
+header-y += chsc.h
+header-y += cmb.h
+header-y += dasd.h
+header-y += debug.h
+header-y += errno.h
+header-y += fcntl.h
+header-y += ioctl.h
+header-y += ioctls.h
+header-y += ipcbuf.h
+header-y += kvm.h
+header-y += kvm_para.h
+header-y += kvm_virtio.h
+header-y += mman.h
+header-y += monwriter.h
+header-y += msgbuf.h
+header-y += param.h
+header-y += poll.h
+header-y += posix_types.h
+header-y += ptrace.h
+header-y += qeth.h
+header-y += resource.h
+header-y += schid.h
+header-y += sembuf.h
+header-y += setup.h
+header-y += shmbuf.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += socket.h
+header-y += sockios.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += tape390.h
+header-y += termbits.h
+header-y += termios.h
+header-y += types.h
+header-y += ucontext.h
+header-y += unistd.h
+header-y += vtoc.h
+header-y += zcrypt.h
diff --git a/arch/s390/include/asm/auxvec.h b/arch/s390/include/uapi/asm/auxvec.h
index a1f153e8913..a1f153e8913 100644
--- a/arch/s390/include/asm/auxvec.h
+++ b/arch/s390/include/uapi/asm/auxvec.h
diff --git a/arch/s390/include/asm/bitsperlong.h b/arch/s390/include/uapi/asm/bitsperlong.h
index 6b235aea9c6..6b235aea9c6 100644
--- a/arch/s390/include/asm/bitsperlong.h
+++ b/arch/s390/include/uapi/asm/bitsperlong.h
diff --git a/arch/s390/include/asm/byteorder.h b/arch/s390/include/uapi/asm/byteorder.h
index a332e59e26f..a332e59e26f 100644
--- a/arch/s390/include/asm/byteorder.h
+++ b/arch/s390/include/uapi/asm/byteorder.h
diff --git a/arch/s390/include/uapi/asm/chpid.h b/arch/s390/include/uapi/asm/chpid.h
new file mode 100644
index 00000000000..581992dfae2
--- /dev/null
+++ b/arch/s390/include/uapi/asm/chpid.h
@@ -0,0 +1,22 @@
+/*
+ *    Copyright IBM Corp. 2007
+ *    Author(s): Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
+ */
+
+#ifndef _UAPI_ASM_S390_CHPID_H
+#define _UAPI_ASM_S390_CHPID_H
+
+#include <linux/string.h>
+#include <linux/types.h>
+
+#define __MAX_CHPID 255
+
+struct chp_id {
+	u8 reserved1;
+	u8 cssid;
+	u8 reserved2;
+	u8 id;
+} __attribute__((packed));
+
+
+#endif /* _UAPI_ASM_S390_CHPID_H */
diff --git a/arch/s390/include/asm/chsc.h b/arch/s390/include/uapi/asm/chsc.h
index aea451fd182..1c6a7f85a58 100644
--- a/arch/s390/include/asm/chsc.h
+++ b/arch/s390/include/uapi/asm/chsc.h
@@ -1,7 +1,7 @@
 /*
  * ioctl interface for /dev/chsc
  *
- * Copyright IBM Corp. 2008
+ * Copyright IBM Corp. 2008, 2012
  * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
  */
 
@@ -9,9 +9,12 @@
 #define _ASM_CHSC_H
 
 #include <linux/types.h>
+#include <linux/ioctl.h>
 #include <asm/chpid.h>
 #include <asm/schid.h>
 
+#define CHSC_SIZE 0x1000
+
 struct chsc_async_header {
 	__u16 length;
 	__u16 code;
@@ -23,15 +26,14 @@ struct chsc_async_header {
 
 struct chsc_async_area {
 	struct chsc_async_header header;
-	__u8 data[PAGE_SIZE - 16 /* size of chsc_async_header */];
+	__u8 data[CHSC_SIZE - sizeof(struct chsc_async_header)];
 } __attribute__ ((packed));
 
-
 struct chsc_response_struct {
 	__u16 length;
 	__u16 code;
 	__u32 parms;
-	__u8 data[PAGE_SIZE - 8];
+	__u8 data[CHSC_SIZE - 2 * sizeof(__u16) - sizeof(__u32)];
 } __attribute__ ((packed));
 
 struct chsc_chp_cd {
diff --git a/arch/s390/include/uapi/asm/cmb.h b/arch/s390/include/uapi/asm/cmb.h
new file mode 100644
index 00000000000..0c086d00d89
--- /dev/null
+++ b/arch/s390/include/uapi/asm/cmb.h
@@ -0,0 +1,53 @@
+#ifndef _UAPIS390_CMB_H
+#define _UAPIS390_CMB_H
+
+#include <linux/types.h>
+
+/**
+ * struct cmbdata - channel measurement block data for user space
+ * @size: size of the stored data
+ * @elapsed_time: time since last sampling
+ * @ssch_rsch_count: number of ssch and rsch
+ * @sample_count: number of samples
+ * @device_connect_time: time of device connect
+ * @function_pending_time: time of function pending
+ * @device_disconnect_time: time of device disconnect
+ * @control_unit_queuing_time: time of control unit queuing
+ * @device_active_only_time: time of device active only
+ * @device_busy_time: time of device busy (ext. format)
+ * @initial_command_response_time: initial command response time (ext. format)
+ *
+ * All values are stored as 64 bit for simplicity, especially
+ * in 32 bit emulation mode. All time values are normalized to
+ * nanoseconds.
+ * Currently, two formats are known, which differ by the size of
+ * this structure, i.e. the last two members are only set when
+ * the extended channel measurement facility (first shipped in
+ * z990 machines) is activated.
+ * Potentially, more fields could be added, which would result in a
+ * new ioctl number.
+ */
+struct cmbdata {
+	__u64 size;
+	__u64 elapsed_time;
+ /* basic and exended format: */
+	__u64 ssch_rsch_count;
+	__u64 sample_count;
+	__u64 device_connect_time;
+	__u64 function_pending_time;
+	__u64 device_disconnect_time;
+	__u64 control_unit_queuing_time;
+	__u64 device_active_only_time;
+ /* extended format only: */
+	__u64 device_busy_time;
+	__u64 initial_command_response_time;
+};
+
+/* enable channel measurement */
+#define BIODASDCMFENABLE	_IO(DASD_IOCTL_LETTER, 32)
+/* enable channel measurement */
+#define BIODASDCMFDISABLE	_IO(DASD_IOCTL_LETTER, 33)
+/* read channel measurement data */
+#define BIODASDREADALLCMB	_IOWR(DASD_IOCTL_LETTER, 33, struct cmbdata)
+
+#endif /* _UAPIS390_CMB_H */
diff --git a/arch/s390/include/asm/dasd.h b/arch/s390/include/uapi/asm/dasd.h
index 38eca3ba40e..38eca3ba40e 100644
--- a/arch/s390/include/asm/dasd.h
+++ b/arch/s390/include/uapi/asm/dasd.h
diff --git a/arch/s390/include/uapi/asm/debug.h b/arch/s390/include/uapi/asm/debug.h
new file mode 100644
index 00000000000..c59fc79125f
--- /dev/null
+++ b/arch/s390/include/uapi/asm/debug.h
@@ -0,0 +1,34 @@
+/*
+ *   S/390 debug facility
+ *
+ *    Copyright IBM Corp. 1999, 2000
+ */
+
+#ifndef _UAPIDEBUG_H
+#define _UAPIDEBUG_H
+
+#include <linux/fs.h>
+
+/* Note:
+ * struct __debug_entry must be defined outside of #ifdef __KERNEL__ 
+ * in order to allow a user program to analyze the 'raw'-view.
+ */
+
+struct __debug_entry{
+        union {
+                struct {
+                        unsigned long long clock:52;
+                        unsigned long long exception:1;
+                        unsigned long long level:3;
+                        unsigned long long cpuid:8;
+                } fields;
+
+                unsigned long long stck;
+        } id;
+        void* caller;
+} __attribute__((packed));
+
+
+#define __DEBUG_FEATURE_VERSION      2  /* version of debug feature */
+
+#endif /* _UAPIDEBUG_H */
diff --git a/arch/s390/include/asm/errno.h b/arch/s390/include/uapi/asm/errno.h
index 395e97d8005..395e97d8005 100644
--- a/arch/s390/include/asm/errno.h
+++ b/arch/s390/include/uapi/asm/errno.h
diff --git a/arch/s390/include/asm/fcntl.h b/arch/s390/include/uapi/asm/fcntl.h
index 46ab12db573..46ab12db573 100644
--- a/arch/s390/include/asm/fcntl.h
+++ b/arch/s390/include/uapi/asm/fcntl.h
diff --git a/arch/s390/include/asm/ioctl.h b/arch/s390/include/uapi/asm/ioctl.h
index b279fe06dfe..b279fe06dfe 100644
--- a/arch/s390/include/asm/ioctl.h
+++ b/arch/s390/include/uapi/asm/ioctl.h
diff --git a/arch/s390/include/asm/ioctls.h b/arch/s390/include/uapi/asm/ioctls.h
index 960a4c1ebdf..960a4c1ebdf 100644
--- a/arch/s390/include/asm/ioctls.h
+++ b/arch/s390/include/uapi/asm/ioctls.h
diff --git a/arch/s390/include/asm/ipcbuf.h b/arch/s390/include/uapi/asm/ipcbuf.h
index 37f293d12c8..37f293d12c8 100644
--- a/arch/s390/include/asm/ipcbuf.h
+++ b/arch/s390/include/uapi/asm/ipcbuf.h
diff --git a/arch/s390/include/asm/kvm.h b/arch/s390/include/uapi/asm/kvm.h
index d25da598ec6..d25da598ec6 100644
--- a/arch/s390/include/asm/kvm.h
+++ b/arch/s390/include/uapi/asm/kvm.h
diff --git a/arch/s390/include/uapi/asm/kvm_para.h b/arch/s390/include/uapi/asm/kvm_para.h
new file mode 100644
index 00000000000..e69de29bb2d
--- /dev/null
+++ b/arch/s390/include/uapi/asm/kvm_para.h
diff --git a/arch/s390/include/asm/kvm_virtio.h b/arch/s390/include/uapi/asm/kvm_virtio.h
index 44a438ca9e7..44a438ca9e7 100644
--- a/arch/s390/include/asm/kvm_virtio.h
+++ b/arch/s390/include/uapi/asm/kvm_virtio.h
diff --git a/arch/s390/include/uapi/asm/mman.h b/arch/s390/include/uapi/asm/mman.h
new file mode 100644
index 00000000000..de23da1f41b
--- /dev/null
+++ b/arch/s390/include/uapi/asm/mman.h
@@ -0,0 +1,6 @@
+/*
+ *  S390 version
+ *
+ *  Derived from "include/asm-i386/mman.h"
+ */
+#include <asm-generic/mman.h>
diff --git a/arch/s390/include/asm/monwriter.h b/arch/s390/include/uapi/asm/monwriter.h
index f845c8e2f86..f845c8e2f86 100644
--- a/arch/s390/include/asm/monwriter.h
+++ b/arch/s390/include/uapi/asm/monwriter.h
diff --git a/arch/s390/include/asm/msgbuf.h b/arch/s390/include/uapi/asm/msgbuf.h
index 1bbdee92792..1bbdee92792 100644
--- a/arch/s390/include/asm/msgbuf.h
+++ b/arch/s390/include/uapi/asm/msgbuf.h
diff --git a/arch/s390/include/asm/param.h b/arch/s390/include/uapi/asm/param.h
index c616821bf2a..c616821bf2a 100644
--- a/arch/s390/include/asm/param.h
+++ b/arch/s390/include/uapi/asm/param.h
diff --git a/arch/s390/include/asm/poll.h b/arch/s390/include/uapi/asm/poll.h
index c98509d3149..c98509d3149 100644
--- a/arch/s390/include/asm/poll.h
+++ b/arch/s390/include/uapi/asm/poll.h
diff --git a/arch/s390/include/asm/posix_types.h b/arch/s390/include/uapi/asm/posix_types.h
index bf2a2ad2f80..bf2a2ad2f80 100644
--- a/arch/s390/include/asm/posix_types.h
+++ b/arch/s390/include/uapi/asm/posix_types.h
diff --git a/arch/s390/include/uapi/asm/ptrace.h b/arch/s390/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..705588a16d7
--- /dev/null
+++ b/arch/s390/include/uapi/asm/ptrace.h
@@ -0,0 +1,472 @@
+/*
+ *  S390 version
+ *    Copyright IBM Corp. 1999, 2000
+ *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
+ */
+
+#ifndef _UAPI_S390_PTRACE_H
+#define _UAPI_S390_PTRACE_H
+
+/*
+ * Offsets in the user_regs_struct. They are used for the ptrace
+ * system call and in entry.S
+ */
+#ifndef __s390x__
+
+#define PT_PSWMASK  0x00
+#define PT_PSWADDR  0x04
+#define PT_GPR0     0x08
+#define PT_GPR1     0x0C
+#define PT_GPR2     0x10
+#define PT_GPR3     0x14
+#define PT_GPR4     0x18
+#define PT_GPR5     0x1C
+#define PT_GPR6     0x20
+#define PT_GPR7     0x24
+#define PT_GPR8     0x28
+#define PT_GPR9     0x2C
+#define PT_GPR10    0x30
+#define PT_GPR11    0x34
+#define PT_GPR12    0x38
+#define PT_GPR13    0x3C
+#define PT_GPR14    0x40
+#define PT_GPR15    0x44
+#define PT_ACR0     0x48
+#define PT_ACR1     0x4C
+#define PT_ACR2     0x50
+#define PT_ACR3     0x54
+#define PT_ACR4	    0x58
+#define PT_ACR5	    0x5C
+#define PT_ACR6	    0x60
+#define PT_ACR7	    0x64
+#define PT_ACR8	    0x68
+#define PT_ACR9	    0x6C
+#define PT_ACR10    0x70
+#define PT_ACR11    0x74
+#define PT_ACR12    0x78
+#define PT_ACR13    0x7C
+#define PT_ACR14    0x80
+#define PT_ACR15    0x84
+#define PT_ORIGGPR2 0x88
+#define PT_FPC	    0x90
+/*
+ * A nasty fact of life that the ptrace api
+ * only supports passing of longs.
+ */
+#define PT_FPR0_HI  0x98
+#define PT_FPR0_LO  0x9C
+#define PT_FPR1_HI  0xA0
+#define PT_FPR1_LO  0xA4
+#define PT_FPR2_HI  0xA8
+#define PT_FPR2_LO  0xAC
+#define PT_FPR3_HI  0xB0
+#define PT_FPR3_LO  0xB4
+#define PT_FPR4_HI  0xB8
+#define PT_FPR4_LO  0xBC
+#define PT_FPR5_HI  0xC0
+#define PT_FPR5_LO  0xC4
+#define PT_FPR6_HI  0xC8
+#define PT_FPR6_LO  0xCC
+#define PT_FPR7_HI  0xD0
+#define PT_FPR7_LO  0xD4
+#define PT_FPR8_HI  0xD8
+#define PT_FPR8_LO  0XDC
+#define PT_FPR9_HI  0xE0
+#define PT_FPR9_LO  0xE4
+#define PT_FPR10_HI 0xE8
+#define PT_FPR10_LO 0xEC
+#define PT_FPR11_HI 0xF0
+#define PT_FPR11_LO 0xF4
+#define PT_FPR12_HI 0xF8
+#define PT_FPR12_LO 0xFC
+#define PT_FPR13_HI 0x100
+#define PT_FPR13_LO 0x104
+#define PT_FPR14_HI 0x108
+#define PT_FPR14_LO 0x10C
+#define PT_FPR15_HI 0x110
+#define PT_FPR15_LO 0x114
+#define PT_CR_9	    0x118
+#define PT_CR_10    0x11C
+#define PT_CR_11    0x120
+#define PT_IEEE_IP  0x13C
+#define PT_LASTOFF  PT_IEEE_IP
+#define PT_ENDREGS  0x140-1
+
+#define GPR_SIZE	4
+#define CR_SIZE		4
+
+#define STACK_FRAME_OVERHEAD	96	/* size of minimum stack frame */
+
+#else /* __s390x__ */
+
+#define PT_PSWMASK  0x00
+#define PT_PSWADDR  0x08
+#define PT_GPR0     0x10
+#define PT_GPR1     0x18
+#define PT_GPR2     0x20
+#define PT_GPR3     0x28
+#define PT_GPR4     0x30
+#define PT_GPR5     0x38
+#define PT_GPR6     0x40
+#define PT_GPR7     0x48
+#define PT_GPR8     0x50
+#define PT_GPR9     0x58
+#define PT_GPR10    0x60
+#define PT_GPR11    0x68
+#define PT_GPR12    0x70
+#define PT_GPR13    0x78
+#define PT_GPR14    0x80
+#define PT_GPR15    0x88
+#define PT_ACR0     0x90
+#define PT_ACR1     0x94
+#define PT_ACR2     0x98
+#define PT_ACR3     0x9C
+#define PT_ACR4	    0xA0
+#define PT_ACR5	    0xA4
+#define PT_ACR6	    0xA8
+#define PT_ACR7	    0xAC
+#define PT_ACR8	    0xB0
+#define PT_ACR9	    0xB4
+#define PT_ACR10    0xB8
+#define PT_ACR11    0xBC
+#define PT_ACR12    0xC0
+#define PT_ACR13    0xC4
+#define PT_ACR14    0xC8
+#define PT_ACR15    0xCC
+#define PT_ORIGGPR2 0xD0
+#define PT_FPC	    0xD8
+#define PT_FPR0     0xE0
+#define PT_FPR1     0xE8
+#define PT_FPR2     0xF0
+#define PT_FPR3     0xF8
+#define PT_FPR4     0x100
+#define PT_FPR5     0x108
+#define PT_FPR6     0x110
+#define PT_FPR7     0x118
+#define PT_FPR8     0x120
+#define PT_FPR9     0x128
+#define PT_FPR10    0x130
+#define PT_FPR11    0x138
+#define PT_FPR12    0x140
+#define PT_FPR13    0x148
+#define PT_FPR14    0x150
+#define PT_FPR15    0x158
+#define PT_CR_9     0x160
+#define PT_CR_10    0x168
+#define PT_CR_11    0x170
+#define PT_IEEE_IP  0x1A8
+#define PT_LASTOFF  PT_IEEE_IP
+#define PT_ENDREGS  0x1B0-1
+
+#define GPR_SIZE	8
+#define CR_SIZE		8
+
+#define STACK_FRAME_OVERHEAD    160      /* size of minimum stack frame */
+
+#endif /* __s390x__ */
+
+#define NUM_GPRS	16
+#define NUM_FPRS	16
+#define NUM_CRS		16
+#define NUM_ACRS	16
+
+#define NUM_CR_WORDS	3
+
+#define FPR_SIZE	8
+#define FPC_SIZE	4
+#define FPC_PAD_SIZE	4 /* gcc insists on aligning the fpregs */
+#define ACR_SIZE	4
+
+
+#define PTRACE_OLDSETOPTIONS         21
+
+#ifndef __ASSEMBLY__
+#include <linux/stddef.h>
+#include <linux/types.h>
+
+typedef union
+{
+	float   f;
+	double  d;
+        __u64   ui;
+	struct
+	{
+		__u32 hi;
+		__u32 lo;
+	} fp;
+} freg_t;
+
+typedef struct
+{
+	__u32   fpc;
+	freg_t  fprs[NUM_FPRS];              
+} s390_fp_regs;
+
+#define FPC_EXCEPTION_MASK      0xF8000000
+#define FPC_FLAGS_MASK          0x00F80000
+#define FPC_DXC_MASK            0x0000FF00
+#define FPC_RM_MASK             0x00000003
+#define FPC_VALID_MASK          0xF8F8FF03
+
+/* this typedef defines how a Program Status Word looks like */
+typedef struct 
+{
+        unsigned long mask;
+        unsigned long addr;
+} __attribute__ ((aligned(8))) psw_t;
+
+typedef struct
+{
+	__u32	mask;
+	__u32	addr;
+} __attribute__ ((aligned(8))) psw_compat_t;
+
+#ifndef __s390x__
+
+#define PSW_MASK_PER		0x40000000UL
+#define PSW_MASK_DAT		0x04000000UL
+#define PSW_MASK_IO		0x02000000UL
+#define PSW_MASK_EXT		0x01000000UL
+#define PSW_MASK_KEY		0x00F00000UL
+#define PSW_MASK_BASE		0x00080000UL	/* always one */
+#define PSW_MASK_MCHECK		0x00040000UL
+#define PSW_MASK_WAIT		0x00020000UL
+#define PSW_MASK_PSTATE		0x00010000UL
+#define PSW_MASK_ASC		0x0000C000UL
+#define PSW_MASK_CC		0x00003000UL
+#define PSW_MASK_PM		0x00000F00UL
+#define PSW_MASK_RI		0x00000000UL
+#define PSW_MASK_EA		0x00000000UL
+#define PSW_MASK_BA		0x00000000UL
+
+#define PSW_MASK_USER		0x00003F00UL
+
+#define PSW_ADDR_AMODE		0x80000000UL
+#define PSW_ADDR_INSN		0x7FFFFFFFUL
+
+#define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 20)
+
+#define PSW_ASC_PRIMARY		0x00000000UL
+#define PSW_ASC_ACCREG		0x00004000UL
+#define PSW_ASC_SECONDARY	0x00008000UL
+#define PSW_ASC_HOME		0x0000C000UL
+
+#else /* __s390x__ */
+
+#define PSW_MASK_PER		0x4000000000000000UL
+#define PSW_MASK_DAT		0x0400000000000000UL
+#define PSW_MASK_IO		0x0200000000000000UL
+#define PSW_MASK_EXT		0x0100000000000000UL
+#define PSW_MASK_BASE		0x0000000000000000UL
+#define PSW_MASK_KEY		0x00F0000000000000UL
+#define PSW_MASK_MCHECK		0x0004000000000000UL
+#define PSW_MASK_WAIT		0x0002000000000000UL
+#define PSW_MASK_PSTATE		0x0001000000000000UL
+#define PSW_MASK_ASC		0x0000C00000000000UL
+#define PSW_MASK_CC		0x0000300000000000UL
+#define PSW_MASK_PM		0x00000F0000000000UL
+#define PSW_MASK_RI		0x0000008000000000UL
+#define PSW_MASK_EA		0x0000000100000000UL
+#define PSW_MASK_BA		0x0000000080000000UL
+
+#define PSW_MASK_USER		0x00003F8180000000UL
+
+#define PSW_ADDR_AMODE		0x0000000000000000UL
+#define PSW_ADDR_INSN		0xFFFFFFFFFFFFFFFFUL
+
+#define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 52)
+
+#define PSW_ASC_PRIMARY		0x0000000000000000UL
+#define PSW_ASC_ACCREG		0x0000400000000000UL
+#define PSW_ASC_SECONDARY	0x0000800000000000UL
+#define PSW_ASC_HOME		0x0000C00000000000UL
+
+#endif /* __s390x__ */
+
+
+/*
+ * The s390_regs structure is used to define the elf_gregset_t.
+ */
+typedef struct
+{
+	psw_t psw;
+	unsigned long gprs[NUM_GPRS];
+	unsigned int  acrs[NUM_ACRS];
+	unsigned long orig_gpr2;
+} s390_regs;
+
+typedef struct
+{
+	psw_compat_t	psw;
+	__u32		gprs[NUM_GPRS];
+	__u32		acrs[NUM_ACRS];
+	__u32		orig_gpr2;
+} s390_compat_regs;
+
+typedef struct
+{
+	__u32		gprs_high[NUM_GPRS];
+} s390_compat_regs_high;
+
+
+/*
+ * Now for the user space program event recording (trace) definitions.
+ * The following structures are used only for the ptrace interface, don't
+ * touch or even look at it if you don't want to modify the user-space
+ * ptrace interface. In particular stay away from it for in-kernel PER.
+ */
+typedef struct
+{
+	unsigned long cr[NUM_CR_WORDS];
+} per_cr_words;
+
+#define PER_EM_MASK 0xE8000000UL
+
+typedef	struct
+{
+#ifdef __s390x__
+	unsigned                       : 32;
+#endif /* __s390x__ */
+	unsigned em_branching          : 1;
+	unsigned em_instruction_fetch  : 1;
+	/*
+	 * Switching on storage alteration automatically fixes
+	 * the storage alteration event bit in the users std.
+	 */
+	unsigned em_storage_alteration : 1;
+	unsigned em_gpr_alt_unused     : 1;
+	unsigned em_store_real_address : 1;
+	unsigned                       : 3;
+	unsigned branch_addr_ctl       : 1;
+	unsigned                       : 1;
+	unsigned storage_alt_space_ctl : 1;
+	unsigned                       : 21;
+	unsigned long starting_addr;
+	unsigned long ending_addr;
+} per_cr_bits;
+
+typedef struct
+{
+	unsigned short perc_atmid;
+	unsigned long address;
+	unsigned char access_id;
+} per_lowcore_words;
+
+typedef struct
+{
+	unsigned perc_branching          : 1;
+	unsigned perc_instruction_fetch  : 1;
+	unsigned perc_storage_alteration : 1;
+	unsigned perc_gpr_alt_unused     : 1;
+	unsigned perc_store_real_address : 1;
+	unsigned                         : 3;
+	unsigned atmid_psw_bit_31        : 1;
+	unsigned atmid_validity_bit      : 1;
+	unsigned atmid_psw_bit_32        : 1;
+	unsigned atmid_psw_bit_5         : 1;
+	unsigned atmid_psw_bit_16        : 1;
+	unsigned atmid_psw_bit_17        : 1;
+	unsigned si                      : 2;
+	unsigned long address;
+	unsigned                         : 4;
+	unsigned access_id               : 4;
+} per_lowcore_bits;
+
+typedef struct
+{
+	union {
+		per_cr_words   words;
+		per_cr_bits    bits;
+	} control_regs;
+	/*
+	 * Use these flags instead of setting em_instruction_fetch
+	 * directly they are used so that single stepping can be
+	 * switched on & off while not affecting other tracing
+	 */
+	unsigned  single_step       : 1;
+	unsigned  instruction_fetch : 1;
+	unsigned                    : 30;
+	/*
+	 * These addresses are copied into cr10 & cr11 if single
+	 * stepping is switched off
+	 */
+	unsigned long starting_addr;
+	unsigned long ending_addr;
+	union {
+		per_lowcore_words words;
+		per_lowcore_bits  bits;
+	} lowcore; 
+} per_struct;
+
+typedef struct
+{
+	unsigned int  len;
+	unsigned long kernel_addr;
+	unsigned long process_addr;
+} ptrace_area;
+
+/*
+ * S/390 specific non posix ptrace requests. I chose unusual values so
+ * they are unlikely to clash with future ptrace definitions.
+ */
+#define PTRACE_PEEKUSR_AREA           0x5000
+#define PTRACE_POKEUSR_AREA           0x5001
+#define PTRACE_PEEKTEXT_AREA	      0x5002
+#define PTRACE_PEEKDATA_AREA	      0x5003
+#define PTRACE_POKETEXT_AREA	      0x5004
+#define PTRACE_POKEDATA_AREA 	      0x5005
+#define PTRACE_GET_LAST_BREAK	      0x5006
+#define PTRACE_PEEK_SYSTEM_CALL       0x5007
+#define PTRACE_POKE_SYSTEM_CALL	      0x5008
+#define PTRACE_ENABLE_TE	      0x5009
+#define PTRACE_DISABLE_TE	      0x5010
+
+/*
+ * PT_PROT definition is loosely based on hppa bsd definition in
+ * gdb/hppab-nat.c
+ */
+#define PTRACE_PROT                       21
+
+typedef enum
+{
+	ptprot_set_access_watchpoint,
+	ptprot_set_write_watchpoint,
+	ptprot_disable_watchpoint
+} ptprot_flags;
+
+typedef struct
+{
+	unsigned long lowaddr;
+	unsigned long hiaddr;
+	ptprot_flags prot;
+} ptprot_area;                     
+
+/* Sequence of bytes for breakpoint illegal instruction.  */
+#define S390_BREAKPOINT     {0x0,0x1}
+#define S390_BREAKPOINT_U16 ((__u16)0x0001)
+#define S390_SYSCALL_OPCODE ((__u16)0x0a00)
+#define S390_SYSCALL_SIZE   2
+
+/*
+ * The user_regs_struct defines the way the user registers are
+ * store on the stack for signal handling.
+ */
+struct user_regs_struct
+{
+	psw_t psw;
+	unsigned long gprs[NUM_GPRS];
+	unsigned int  acrs[NUM_ACRS];
+	unsigned long orig_gpr2;
+	s390_fp_regs fp_regs;
+	/*
+	 * These per registers are in here so that gdb can modify them
+	 * itself as there is no "official" ptrace interface for hardware
+	 * watchpoints. This is the way intel does it.
+	 */
+	per_struct per_info;
+	unsigned long ieee_instruction_pointer;	/* obsolete, always 0 */
+};
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _UAPI_S390_PTRACE_H */
diff --git a/arch/s390/include/asm/qeth.h b/arch/s390/include/uapi/asm/qeth.h
index 3a896cf5258..3a896cf5258 100644
--- a/arch/s390/include/asm/qeth.h
+++ b/arch/s390/include/uapi/asm/qeth.h
diff --git a/arch/s390/include/asm/resource.h b/arch/s390/include/uapi/asm/resource.h
index ec23d1c73c9..ec23d1c73c9 100644
--- a/arch/s390/include/asm/resource.h
+++ b/arch/s390/include/uapi/asm/resource.h
diff --git a/arch/s390/include/uapi/asm/schid.h b/arch/s390/include/uapi/asm/schid.h
new file mode 100644
index 00000000000..32f3ab2a820
--- /dev/null
+++ b/arch/s390/include/uapi/asm/schid.h
@@ -0,0 +1,16 @@
+#ifndef _UAPIASM_SCHID_H
+#define _UAPIASM_SCHID_H
+
+#include <linux/types.h>
+
+struct subchannel_id {
+	__u32 cssid : 8;
+	__u32 : 4;
+	__u32 m : 1;
+	__u32 ssid : 2;
+	__u32 one : 1;
+	__u32 sch_no : 16;
+} __attribute__ ((packed, aligned(4)));
+
+
+#endif /* _UAPIASM_SCHID_H */
diff --git a/arch/s390/include/asm/sembuf.h b/arch/s390/include/uapi/asm/sembuf.h
index 32626b0cac4..32626b0cac4 100644
--- a/arch/s390/include/asm/sembuf.h
+++ b/arch/s390/include/uapi/asm/sembuf.h
diff --git a/arch/s390/include/uapi/asm/setup.h b/arch/s390/include/uapi/asm/setup.h
new file mode 100644
index 00000000000..5a637e3e385
--- /dev/null
+++ b/arch/s390/include/uapi/asm/setup.h
@@ -0,0 +1,13 @@
+/*
+ *  S390 version
+ *    Copyright IBM Corp. 1999, 2010
+ */
+
+#ifndef _UAPI_ASM_S390_SETUP_H
+#define _UAPI_ASM_S390_SETUP_H
+
+#define COMMAND_LINE_SIZE	4096
+
+#define ARCH_COMMAND_LINE_SIZE	896
+
+#endif /* _UAPI_ASM_S390_SETUP_H */
diff --git a/arch/s390/include/asm/shmbuf.h b/arch/s390/include/uapi/asm/shmbuf.h
index eed2e280ce3..eed2e280ce3 100644
--- a/arch/s390/include/asm/shmbuf.h
+++ b/arch/s390/include/uapi/asm/shmbuf.h
diff --git a/arch/s390/include/asm/sigcontext.h b/arch/s390/include/uapi/asm/sigcontext.h
index 584787f6ce4..584787f6ce4 100644
--- a/arch/s390/include/asm/sigcontext.h
+++ b/arch/s390/include/uapi/asm/sigcontext.h
diff --git a/arch/s390/include/asm/siginfo.h b/arch/s390/include/uapi/asm/siginfo.h
index 91fd3e4b70c..91fd3e4b70c 100644
--- a/arch/s390/include/asm/siginfo.h
+++ b/arch/s390/include/uapi/asm/siginfo.h
diff --git a/arch/s390/include/uapi/asm/signal.h b/arch/s390/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..8c6a49e392e
--- /dev/null
+++ b/arch/s390/include/uapi/asm/signal.h
@@ -0,0 +1,135 @@
+/*
+ *  S390 version
+ *
+ *  Derived from "include/asm-i386/signal.h"
+ */
+
+#ifndef _UAPI_ASMS390_SIGNAL_H
+#define _UAPI_ASMS390_SIGNAL_H
+
+#include <linux/types.h>
+#include <linux/time.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+struct pt_regs;
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG            32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+#define SIGBUS           7
+#define SIGFPE           8
+#define SIGKILL          9
+#define SIGUSR1         10
+#define SIGSEGV         11
+#define SIGUSR2         12
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGSTKFLT       16
+#define SIGCHLD         17
+#define SIGCONT         18
+#define SIGSTOP         19
+#define SIGTSTP         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGURG          23
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGIO           29
+#define SIGPOLL         SIGIO
+/*
+#define SIGLOST         29
+*/
+#define SIGPWR          30
+#define SIGSYS		31
+#define SIGUNUSED       31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN        32
+#define SIGRTMAX        _NSIG
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_ONSTACK indicates that a registered stack_t will be used.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
+ * SA_RESETHAND clears the handler when the signal is delivered.
+ * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
+ * SA_NODEFER prevents the current signal from being masked in the handler.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP    0x00000001
+#define SA_NOCLDWAIT    0x00000002
+#define SA_SIGINFO      0x00000004
+#define SA_ONSTACK      0x08000000
+#define SA_RESTART      0x10000000
+#define SA_NODEFER      0x40000000
+#define SA_RESETHAND    0x80000000
+
+#define SA_NOMASK       SA_NODEFER
+#define SA_ONESHOT      SA_RESETHAND
+
+#define SA_RESTORER     0x04000000
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK      1
+#define SS_DISABLE      2
+
+#define MINSIGSTKSZ     2048
+#define SIGSTKSZ        8192
+
+#include <asm-generic/signal-defs.h>
+
+#ifndef __KERNEL__
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+        union {
+          __sighandler_t _sa_handler;
+          void (*_sa_sigaction)(int, struct siginfo *, void *);
+        } _u;
+#ifndef __s390x__ /* lovely */
+        sigset_t sa_mask;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+#else  /* __s390x__ */
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+	sigset_t sa_mask;
+#endif /* __s390x__ */
+};
+
+#define sa_handler      _u._sa_handler
+#define sa_sigaction    _u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+        void __user *ss_sp;
+        int ss_flags;
+        size_t ss_size;
+} stack_t;
+
+
+#endif /* _UAPI_ASMS390_SIGNAL_H */
diff --git a/arch/s390/include/asm/socket.h b/arch/s390/include/uapi/asm/socket.h
index 69718cd6d63..69718cd6d63 100644
--- a/arch/s390/include/asm/socket.h
+++ b/arch/s390/include/uapi/asm/socket.h
diff --git a/arch/s390/include/asm/sockios.h b/arch/s390/include/uapi/asm/sockios.h
index 6f60eee7324..6f60eee7324 100644
--- a/arch/s390/include/asm/sockios.h
+++ b/arch/s390/include/uapi/asm/sockios.h
diff --git a/arch/s390/include/asm/stat.h b/arch/s390/include/uapi/asm/stat.h
index b4ca97d9146..b4ca97d9146 100644
--- a/arch/s390/include/asm/stat.h
+++ b/arch/s390/include/uapi/asm/stat.h
diff --git a/arch/s390/include/asm/statfs.h b/arch/s390/include/uapi/asm/statfs.h
index 5acca0a34c2..5acca0a34c2 100644
--- a/arch/s390/include/asm/statfs.h
+++ b/arch/s390/include/uapi/asm/statfs.h
diff --git a/arch/s390/include/asm/swab.h b/arch/s390/include/uapi/asm/swab.h
index da3bfe5cc16..da3bfe5cc16 100644
--- a/arch/s390/include/asm/swab.h
+++ b/arch/s390/include/uapi/asm/swab.h
diff --git a/arch/s390/include/asm/tape390.h b/arch/s390/include/uapi/asm/tape390.h
index b2bc4bab792..b2bc4bab792 100644
--- a/arch/s390/include/asm/tape390.h
+++ b/arch/s390/include/uapi/asm/tape390.h
diff --git a/arch/s390/include/asm/termbits.h b/arch/s390/include/uapi/asm/termbits.h
index 71bf6ac6a2b..71bf6ac6a2b 100644
--- a/arch/s390/include/asm/termbits.h
+++ b/arch/s390/include/uapi/asm/termbits.h
diff --git a/arch/s390/include/uapi/asm/termios.h b/arch/s390/include/uapi/asm/termios.h
new file mode 100644
index 00000000000..554f973db1e
--- /dev/null
+++ b/arch/s390/include/uapi/asm/termios.h
@@ -0,0 +1,49 @@
+/*
+ *  S390 version
+ *
+ *  Derived from "include/asm-i386/termios.h"
+ */
+
+#ifndef _UAPI_S390_TERMIOS_H
+#define _UAPI_S390_TERMIOS_H
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+	unsigned short ws_row;
+	unsigned short ws_col;
+	unsigned short ws_xpixel;
+	unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+	unsigned short c_iflag;		/* input mode flags */
+	unsigned short c_oflag;		/* output mode flags */
+	unsigned short c_cflag;		/* control mode flags */
+	unsigned short c_lflag;		/* local mode flags */
+	unsigned char c_line;		/* line discipline */
+	unsigned char c_cc[NCC];	/* control characters */
+};
+
+/* modem lines */
+#define TIOCM_LE	0x001
+#define TIOCM_DTR	0x002
+#define TIOCM_RTS	0x004
+#define TIOCM_ST	0x008
+#define TIOCM_SR	0x010
+#define TIOCM_CTS	0x020
+#define TIOCM_CAR	0x040
+#define TIOCM_RNG	0x080
+#define TIOCM_DSR	0x100
+#define TIOCM_CD	TIOCM_CAR
+#define TIOCM_RI	TIOCM_RNG
+#define TIOCM_OUT1	0x2000
+#define TIOCM_OUT2	0x4000
+#define TIOCM_LOOP	0x8000
+
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+
+
+#endif /* _UAPI_S390_TERMIOS_H */
diff --git a/arch/s390/include/uapi/asm/types.h b/arch/s390/include/uapi/asm/types.h
new file mode 100644
index 00000000000..038f2b9178a
--- /dev/null
+++ b/arch/s390/include/uapi/asm/types.h
@@ -0,0 +1,22 @@
+/*
+ *  S390 version
+ *
+ *  Derived from "include/asm-i386/types.h"
+ */
+
+#ifndef _UAPI_S390_TYPES_H
+#define _UAPI_S390_TYPES_H
+
+#include <asm-generic/int-ll64.h>
+
+#ifndef __ASSEMBLY__
+
+/* A address type so that arithmetic can be done on it & it can be upgraded to
+   64 bit when necessary 
+*/
+typedef unsigned long addr_t; 
+typedef __signed__ long saddr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _UAPI_S390_TYPES_H */
diff --git a/arch/s390/include/asm/ucontext.h b/arch/s390/include/uapi/asm/ucontext.h
index 200e06325c6..200e06325c6 100644
--- a/arch/s390/include/asm/ucontext.h
+++ b/arch/s390/include/uapi/asm/ucontext.h
diff --git a/arch/s390/include/uapi/asm/unistd.h b/arch/s390/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..63e6078699f
--- /dev/null
+++ b/arch/s390/include/uapi/asm/unistd.h
@@ -0,0 +1,374 @@
+/*
+ *  S390 version
+ *
+ *  Derived from "include/asm-i386/unistd.h"
+ */
+
+#ifndef _UAPI_ASM_S390_UNISTD_H_
+#define _UAPI_ASM_S390_UNISTD_H_
+
+/*
+ * This file contains the system call numbers.
+ */
+
+#define __NR_exit                 1
+#define __NR_fork                 2
+#define __NR_read                 3
+#define __NR_write                4
+#define __NR_open                 5
+#define __NR_close                6
+#define __NR_restart_syscall	  7
+#define __NR_creat                8
+#define __NR_link                 9
+#define __NR_unlink              10
+#define __NR_execve              11
+#define __NR_chdir               12
+#define __NR_mknod               14
+#define __NR_chmod               15
+#define __NR_lseek               19
+#define __NR_getpid              20
+#define __NR_mount               21
+#define __NR_umount              22
+#define __NR_ptrace              26
+#define __NR_alarm               27
+#define __NR_pause               29
+#define __NR_utime               30
+#define __NR_access              33
+#define __NR_nice                34
+#define __NR_sync                36
+#define __NR_kill                37
+#define __NR_rename              38
+#define __NR_mkdir               39
+#define __NR_rmdir               40
+#define __NR_dup                 41
+#define __NR_pipe                42
+#define __NR_times               43
+#define __NR_brk                 45
+#define __NR_signal              48
+#define __NR_acct                51
+#define __NR_umount2             52
+#define __NR_ioctl               54
+#define __NR_fcntl               55
+#define __NR_setpgid             57
+#define __NR_umask               60
+#define __NR_chroot              61
+#define __NR_ustat               62
+#define __NR_dup2                63
+#define __NR_getppid             64
+#define __NR_getpgrp             65
+#define __NR_setsid              66
+#define __NR_sigaction           67
+#define __NR_sigsuspend          72
+#define __NR_sigpending          73
+#define __NR_sethostname         74
+#define __NR_setrlimit           75
+#define __NR_getrusage           77
+#define __NR_gettimeofday        78
+#define __NR_settimeofday        79
+#define __NR_symlink             83
+#define __NR_readlink            85
+#define __NR_uselib              86
+#define __NR_swapon              87
+#define __NR_reboot              88
+#define __NR_readdir             89
+#define __NR_mmap                90
+#define __NR_munmap              91
+#define __NR_truncate            92
+#define __NR_ftruncate           93
+#define __NR_fchmod              94
+#define __NR_getpriority         96
+#define __NR_setpriority         97
+#define __NR_statfs              99
+#define __NR_fstatfs            100
+#define __NR_socketcall         102
+#define __NR_syslog             103
+#define __NR_setitimer          104
+#define __NR_getitimer          105
+#define __NR_stat               106
+#define __NR_lstat              107
+#define __NR_fstat              108
+#define __NR_lookup_dcookie     110
+#define __NR_vhangup            111
+#define __NR_idle               112
+#define __NR_wait4              114
+#define __NR_swapoff            115
+#define __NR_sysinfo            116
+#define __NR_ipc                117
+#define __NR_fsync              118
+#define __NR_sigreturn          119
+#define __NR_clone              120
+#define __NR_setdomainname      121
+#define __NR_uname              122
+#define __NR_adjtimex           124
+#define __NR_mprotect           125
+#define __NR_sigprocmask        126
+#define __NR_create_module      127
+#define __NR_init_module        128
+#define __NR_delete_module      129
+#define __NR_get_kernel_syms    130
+#define __NR_quotactl           131
+#define __NR_getpgid            132
+#define __NR_fchdir             133
+#define __NR_bdflush            134
+#define __NR_sysfs              135
+#define __NR_personality        136
+#define __NR_afs_syscall        137 /* Syscall for Andrew File System */
+#define __NR_getdents           141
+#define __NR_flock              143
+#define __NR_msync              144
+#define __NR_readv              145
+#define __NR_writev             146
+#define __NR_getsid             147
+#define __NR_fdatasync          148
+#define __NR__sysctl            149
+#define __NR_mlock              150
+#define __NR_munlock            151
+#define __NR_mlockall           152
+#define __NR_munlockall         153
+#define __NR_sched_setparam             154
+#define __NR_sched_getparam             155
+#define __NR_sched_setscheduler         156
+#define __NR_sched_getscheduler         157
+#define __NR_sched_yield                158
+#define __NR_sched_get_priority_max     159
+#define __NR_sched_get_priority_min     160
+#define __NR_sched_rr_get_interval      161
+#define __NR_nanosleep          162
+#define __NR_mremap             163
+#define __NR_query_module       167
+#define __NR_poll               168
+#define __NR_nfsservctl         169
+#define __NR_prctl              172
+#define __NR_rt_sigreturn       173
+#define __NR_rt_sigaction       174
+#define __NR_rt_sigprocmask     175
+#define __NR_rt_sigpending      176
+#define __NR_rt_sigtimedwait    177
+#define __NR_rt_sigqueueinfo    178
+#define __NR_rt_sigsuspend      179
+#define __NR_pread64            180
+#define __NR_pwrite64           181
+#define __NR_getcwd             183
+#define __NR_capget             184
+#define __NR_capset             185
+#define __NR_sigaltstack        186
+#define __NR_sendfile           187
+#define __NR_getpmsg		188
+#define __NR_putpmsg		189
+#define __NR_vfork		190
+#define __NR_pivot_root         217
+#define __NR_mincore            218
+#define __NR_madvise            219
+#define __NR_getdents64		220
+#define __NR_readahead		222
+#define __NR_setxattr		224
+#define __NR_lsetxattr		225
+#define __NR_fsetxattr		226
+#define __NR_getxattr		227
+#define __NR_lgetxattr		228
+#define __NR_fgetxattr		229
+#define __NR_listxattr		230
+#define __NR_llistxattr		231
+#define __NR_flistxattr		232
+#define __NR_removexattr	233
+#define __NR_lremovexattr	234
+#define __NR_fremovexattr	235
+#define __NR_gettid		236
+#define __NR_tkill		237
+#define __NR_futex		238
+#define __NR_sched_setaffinity	239
+#define __NR_sched_getaffinity	240
+#define __NR_tgkill		241
+/* Number 242 is reserved for tux */
+#define __NR_io_setup		243
+#define __NR_io_destroy		244
+#define __NR_io_getevents	245
+#define __NR_io_submit		246
+#define __NR_io_cancel		247
+#define __NR_exit_group		248
+#define __NR_epoll_create	249
+#define __NR_epoll_ctl		250
+#define __NR_epoll_wait		251
+#define __NR_set_tid_address	252
+#define __NR_fadvise64		253
+#define __NR_timer_create	254
+#define __NR_timer_settime	(__NR_timer_create+1)
+#define __NR_timer_gettime	(__NR_timer_create+2)
+#define __NR_timer_getoverrun	(__NR_timer_create+3)
+#define __NR_timer_delete	(__NR_timer_create+4)
+#define __NR_clock_settime	(__NR_timer_create+5)
+#define __NR_clock_gettime	(__NR_timer_create+6)
+#define __NR_clock_getres	(__NR_timer_create+7)
+#define __NR_clock_nanosleep	(__NR_timer_create+8)
+/* Number 263 is reserved for vserver */
+#define __NR_statfs64		265
+#define __NR_fstatfs64		266
+#define __NR_remap_file_pages	267
+/* Number 268 is reserved for new sys_mbind */
+/* Number 269 is reserved for new sys_get_mempolicy */
+/* Number 270 is reserved for new sys_set_mempolicy */
+#define __NR_mq_open		271
+#define __NR_mq_unlink		272
+#define __NR_mq_timedsend	273
+#define __NR_mq_timedreceive	274
+#define __NR_mq_notify		275
+#define __NR_mq_getsetattr	276
+#define __NR_kexec_load		277
+#define __NR_add_key		278
+#define __NR_request_key	279
+#define __NR_keyctl		280
+#define __NR_waitid		281
+#define __NR_ioprio_set		282
+#define __NR_ioprio_get		283
+#define __NR_inotify_init	284
+#define __NR_inotify_add_watch	285
+#define __NR_inotify_rm_watch	286
+/* Number 287 is reserved for new sys_migrate_pages */
+#define __NR_openat		288
+#define __NR_mkdirat		289
+#define __NR_mknodat		290
+#define __NR_fchownat		291
+#define __NR_futimesat		292
+#define __NR_unlinkat		294
+#define __NR_renameat		295
+#define __NR_linkat		296
+#define __NR_symlinkat		297
+#define __NR_readlinkat		298
+#define __NR_fchmodat		299
+#define __NR_faccessat		300
+#define __NR_pselect6		301
+#define __NR_ppoll		302
+#define __NR_unshare		303
+#define __NR_set_robust_list	304
+#define __NR_get_robust_list	305
+#define __NR_splice		306
+#define __NR_sync_file_range	307
+#define __NR_tee		308
+#define __NR_vmsplice		309
+/* Number 310 is reserved for new sys_move_pages */
+#define __NR_getcpu		311
+#define __NR_epoll_pwait	312
+#define __NR_utimes		313
+#define __NR_fallocate		314
+#define __NR_utimensat		315
+#define __NR_signalfd		316
+#define __NR_timerfd		317
+#define __NR_eventfd		318
+#define __NR_timerfd_create	319
+#define __NR_timerfd_settime	320
+#define __NR_timerfd_gettime	321
+#define __NR_signalfd4		322
+#define __NR_eventfd2		323
+#define __NR_inotify_init1	324
+#define __NR_pipe2		325
+#define __NR_dup3		326
+#define __NR_epoll_create1	327
+#define	__NR_preadv		328
+#define	__NR_pwritev		329
+#define __NR_rt_tgsigqueueinfo	330
+#define __NR_perf_event_open	331
+#define __NR_fanotify_init	332
+#define __NR_fanotify_mark	333
+#define __NR_prlimit64		334
+#define __NR_name_to_handle_at	335
+#define __NR_open_by_handle_at	336
+#define __NR_clock_adjtime	337
+#define __NR_syncfs		338
+#define __NR_setns		339
+#define __NR_process_vm_readv	340
+#define __NR_process_vm_writev	341
+#define __NR_s390_runtime_instr 342
+#define __NR_kcmp		343
+#define NR_syscalls 344
+
+/* 
+ * There are some system calls that are not present on 64 bit, some
+ * have a different name although they do the same (e.g. __NR_chown32
+ * is __NR_chown on 64 bit).
+ */
+#ifndef __s390x__
+
+#define __NR_time		 13
+#define __NR_lchown		 16
+#define __NR_setuid		 23
+#define __NR_getuid		 24
+#define __NR_stime		 25
+#define __NR_setgid		 46
+#define __NR_getgid		 47
+#define __NR_geteuid		 49
+#define __NR_getegid		 50
+#define __NR_setreuid		 70
+#define __NR_setregid		 71
+#define __NR_getrlimit		 76
+#define __NR_getgroups		 80
+#define __NR_setgroups		 81
+#define __NR_fchown		 95
+#define __NR_ioperm		101
+#define __NR_setfsuid		138
+#define __NR_setfsgid		139
+#define __NR__llseek		140
+#define __NR__newselect 	142
+#define __NR_setresuid		164
+#define __NR_getresuid		165
+#define __NR_setresgid		170
+#define __NR_getresgid		171
+#define __NR_chown		182
+#define __NR_ugetrlimit		191	/* SuS compliant getrlimit */
+#define __NR_mmap2		192
+#define __NR_truncate64		193
+#define __NR_ftruncate64	194
+#define __NR_stat64		195
+#define __NR_lstat64		196
+#define __NR_fstat64		197
+#define __NR_lchown32		198
+#define __NR_getuid32		199
+#define __NR_getgid32		200
+#define __NR_geteuid32		201
+#define __NR_getegid32		202
+#define __NR_setreuid32		203
+#define __NR_setregid32		204
+#define __NR_getgroups32	205
+#define __NR_setgroups32	206
+#define __NR_fchown32		207
+#define __NR_setresuid32	208
+#define __NR_getresuid32	209
+#define __NR_setresgid32	210
+#define __NR_getresgid32	211
+#define __NR_chown32		212
+#define __NR_setuid32		213
+#define __NR_setgid32		214
+#define __NR_setfsuid32		215
+#define __NR_setfsgid32		216
+#define __NR_fcntl64		221
+#define __NR_sendfile64		223
+#define __NR_fadvise64_64	264
+#define __NR_fstatat64		293
+
+#else
+
+#define __NR_select		142
+#define __NR_getrlimit		191	/* SuS compliant getrlimit */
+#define __NR_lchown  		198
+#define __NR_getuid  		199
+#define __NR_getgid  		200
+#define __NR_geteuid  		201
+#define __NR_getegid  		202
+#define __NR_setreuid  		203
+#define __NR_setregid  		204
+#define __NR_getgroups  	205
+#define __NR_setgroups  	206
+#define __NR_fchown  		207
+#define __NR_setresuid  	208
+#define __NR_getresuid  	209
+#define __NR_setresgid  	210
+#define __NR_getresgid  	211
+#define __NR_chown  		212
+#define __NR_setuid  		213
+#define __NR_setgid  		214
+#define __NR_setfsuid  		215
+#define __NR_setfsgid  		216
+#define __NR_newfstatat		293
+
+#endif
+
+#endif /* _UAPI_ASM_S390_UNISTD_H_ */
diff --git a/arch/s390/include/asm/vtoc.h b/arch/s390/include/uapi/asm/vtoc.h
index 221419de275..221419de275 100644
--- a/arch/s390/include/asm/vtoc.h
+++ b/arch/s390/include/uapi/asm/vtoc.h
diff --git a/arch/s390/include/asm/zcrypt.h b/arch/s390/include/uapi/asm/zcrypt.h
index e83fc116f5b..e83fc116f5b 100644
--- a/arch/s390/include/asm/zcrypt.h
+++ b/arch/s390/include/uapi/asm/zcrypt.h
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index 189963c90c6..65cca95843e 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -432,32 +432,6 @@ sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *uinfo)
 	return ret;
 }
 
-/*
- * sys32_execve() executes a new program after the asm stub has set
- * things up for us.  This should basically do what I want it to.
- */
-asmlinkage long sys32_execve(const char __user *name, compat_uptr_t __user *argv,
-			     compat_uptr_t __user *envp)
-{
-	struct pt_regs *regs = task_pt_regs(current);
-	char *filename;
-	long rc;
-
-	filename = getname(name);
-	rc = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		return rc;
-	rc = compat_do_execve(filename, argv, envp, regs);
-	if (rc)
-		goto out;
-	current->thread.fp_regs.fpc=0;
-	asm volatile("sfpc %0,0" : : "d" (0));
-	rc = regs->gprs[2];
-out:
-	putname(filename);
-	return rc;
-}
-
 asmlinkage long sys32_pread64(unsigned int fd, char __user *ubuf,
 				size_t count, u32 poshi, u32 poslo)
 {
diff --git a/arch/s390/kernel/compat_linux.h b/arch/s390/kernel/compat_linux.h
index 90887bd98cf..d4d0239970a 100644
--- a/arch/s390/kernel/compat_linux.h
+++ b/arch/s390/kernel/compat_linux.h
@@ -125,8 +125,6 @@ long sys32_rt_sigprocmask(int how, compat_sigset_t __user *set,
 			  compat_sigset_t __user *oset, size_t sigsetsize);
 long sys32_rt_sigpending(compat_sigset_t __user *set, size_t sigsetsize);
 long sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *uinfo);
-long sys32_execve(const char __user *name, compat_uptr_t __user *argv,
-		  compat_uptr_t __user *envp);
 long sys32_init_module(void __user *umod, unsigned long len,
 		       const char __user *uargs);
 long sys32_delete_module(const char __user *name_user, unsigned int flags);
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 3afba804fe9..ad79b846535 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1576,7 +1576,7 @@ ENTRY(sys32_execve_wrapper)
 	llgtr	%r2,%r2			# char *
 	llgtr	%r3,%r3			# compat_uptr_t *
 	llgtr	%r4,%r4			# compat_uptr_t *
-	jg	sys32_execve		# branch to system call
+	jg	compat_sys_execve	# branch to system call
 
 ENTRY(sys_fanotify_init_wrapper)
 	llgfr	%r2,%r2			# unsigned int
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 7f4717675c1..1f0eee9e7da 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -283,14 +283,6 @@ static noinline __init void setup_facility_list(void)
 	      ARRAY_SIZE(S390_lowcore.stfle_fac_list));
 }
 
-static noinline __init void setup_hpage(void)
-{
-	if (!test_facility(2) || !test_facility(8))
-		return;
-	S390_lowcore.machine_flags |= MACHINE_FLAG_HPAGE;
-	__ctl_set_bit(0, 23);
-}
-
 static __init void detect_mvpg(void)
 {
 #ifndef CONFIG_64BIT
@@ -378,16 +370,22 @@ static __init void detect_diag44(void)
 static __init void detect_machine_facilities(void)
 {
 #ifdef CONFIG_64BIT
+	if (test_facility(8)) {
+		S390_lowcore.machine_flags |= MACHINE_FLAG_EDAT1;
+		__ctl_set_bit(0, 23);
+	}
+	if (test_facility(78))
+		S390_lowcore.machine_flags |= MACHINE_FLAG_EDAT2;
 	if (test_facility(3))
 		S390_lowcore.machine_flags |= MACHINE_FLAG_IDTE;
-	if (test_facility(8))
-		S390_lowcore.machine_flags |= MACHINE_FLAG_PFMF;
 	if (test_facility(27))
 		S390_lowcore.machine_flags |= MACHINE_FLAG_MVCOS;
 	if (test_facility(40))
 		S390_lowcore.machine_flags |= MACHINE_FLAG_SPP;
 	if (test_facility(50) && test_facility(73))
 		S390_lowcore.machine_flags |= MACHINE_FLAG_TE;
+	if (test_facility(66))
+		S390_lowcore.machine_flags |= MACHINE_FLAG_RRBM;
 #endif
 }
 
@@ -482,7 +480,6 @@ void __init startup_init(void)
 	detect_diag9c();
 	detect_diag44();
 	detect_machine_facilities();
-	setup_hpage();
 	setup_topology();
 	sclp_facilities_detect();
 	detect_memory_layout(memory_chunk);
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index 870bad6d56f..ef46f66bc0d 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -331,45 +331,38 @@ ENTRY(ret_from_fork)
 	l	%r12,__LC_THREAD_INFO
 	l	%r13,__LC_SVC_NEW_PSW+4
 	tm	__PT_PSW+1(%r11),0x01	# forking a kernel thread ?
-	jo	0f
-	st	%r15,__PT_R15(%r11)	# store stack pointer for new kthread
-0:	l	%r1,BASED(.Lschedule_tail)
+	je	1f
+	l	%r1,BASED(.Lschedule_tail)
 	basr	%r14,%r1		# call schedule_tail
 	TRACE_IRQS_ON
 	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
 	j	sysc_tracenogo
 
+1:	# it's a kernel thread
+	st	%r15,__PT_R15(%r11)	# store stack pointer for new kthread
+	l	%r1,BASED(.Lschedule_tail)
+	basr	%r14,%r1		# call schedule_tail
+	TRACE_IRQS_ON
+	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
+	lm	%r9,%r11,__PT_R9(%r11)	# load gprs
+ENTRY(kernel_thread_starter)
+	la	%r2,0(%r10)
+	basr	%r14,%r9
+	la	%r2,0
+	br	%r11			# do_exit
+
 #
 # kernel_execve function needs to deal with pt_regs that is not
 # at the usual place
 #
-ENTRY(kernel_execve)
-	stm	%r12,%r15,48(%r15)
-	lr	%r14,%r15
-	l	%r13,__LC_SVC_NEW_PSW+4
-	ahi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
-	st	%r14,__SF_BACKCHAIN(%r15)
-	la	%r12,STACK_FRAME_OVERHEAD(%r15)
-	xc	0(__PT_SIZE,%r12),0(%r12)
-	l	%r1,BASED(.Ldo_execve)
-	lr	%r5,%r12
-	basr	%r14,%r1		# call do_execve
-	ltr	%r2,%r2
-	je	0f
-	ahi	%r15,(STACK_FRAME_OVERHEAD + __PT_SIZE)
-	lm	%r12,%r15,48(%r15)
-	br	%r14
-	# execve succeeded.
-0:	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
-	l	%r15,__LC_KERNEL_STACK	# load ksp
-	ahi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
-	la	%r11,STACK_FRAME_OVERHEAD(%r15)
-	mvc	0(__PT_SIZE,%r11),0(%r12)	# copy pt_regs
-	l	%r12,__LC_THREAD_INFO
+ENTRY(ret_from_kernel_execve)
+	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
+	lr	%r15,%r2
+	lr	%r11,%r2
+	ahi	%r15,-STACK_FRAME_OVERHEAD
 	xc	__SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
+	l	%r12,__LC_THREAD_INFO
 	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
-	l	%r1,BASED(.Lexecve_tail)
-	basr	%r14,%r1		# call execve_tail
 	j	sysc_return
 
 /*
@@ -931,8 +924,6 @@ cleanup_idle_wait:
 .Ldo_signal:		.long	do_signal
 .Ldo_notify_resume:	.long	do_notify_resume
 .Ldo_per_trap:		.long	do_per_trap
-.Ldo_execve:		.long	do_execve
-.Lexecve_tail:		.long	execve_tail
 .Ljump_table:		.long	pgm_check_table
 .Lschedule:		.long	schedule
 #ifdef CONFIG_PREEMPT
diff --git a/arch/s390/kernel/entry.h b/arch/s390/kernel/entry.h
index a5f4dc42a5d..d0d3f69a734 100644
--- a/arch/s390/kernel/entry.h
+++ b/arch/s390/kernel/entry.h
@@ -58,9 +58,6 @@ long sys_fork(void);
 long sys_clone(unsigned long newsp, unsigned long clone_flags,
 	       int __user *parent_tidptr, int __user *child_tidptr);
 long sys_vfork(void);
-void execve_tail(void);
-long sys_execve(const char __user *name, const char __user *const __user *argv,
-		const char __user *const __user *envp);
 long sys_sigsuspend(int history0, int history1, old_sigset_t mask);
 long sys_sigaction(int sig, const struct old_sigaction __user *act,
 		   struct old_sigaction __user *oact);
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 7549985402f..07d8de35398 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -295,7 +295,7 @@ sysc_sigpending:
 	jno	sysc_return
 	lmg	%r2,%r7,__PT_R2(%r11)	# load svc arguments
 	lghi	%r8,0			# svc 0 returns -ENOSYS
-	lh	%r1,__PT_INT_CODE+2(%r11)	# load new svc number
+	llgh	%r1,__PT_INT_CODE+2(%r11)	# load new svc number
 	cghi	%r1,NR_syscalls
 	jnl	sysc_nr_ok		# invalid svc number -> do svc 0
 	slag	%r8,%r1,2
@@ -353,41 +353,31 @@ ENTRY(ret_from_fork)
 	la	%r11,STACK_FRAME_OVERHEAD(%r15)
 	lg	%r12,__LC_THREAD_INFO
 	tm	__PT_PSW+1(%r11),0x01	# forking a kernel thread ?
-	jo	0f
-	stg	%r15,__PT_R15(%r11)	# store stack pointer for new kthread
-0:	brasl	%r14,schedule_tail
+	je	1f
+	brasl	%r14,schedule_tail
 	TRACE_IRQS_ON
 	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
 	j	sysc_tracenogo
-
-#
-# kernel_execve function needs to deal with pt_regs that is not
-# at the usual place
-#
-ENTRY(kernel_execve)
-	stmg	%r12,%r15,96(%r15)
-	lgr	%r14,%r15
-	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
-	stg	%r14,__SF_BACKCHAIN(%r15)
-	la	%r12,STACK_FRAME_OVERHEAD(%r15)
-	xc	0(__PT_SIZE,%r12),0(%r12)
-	lgr	%r5,%r12
-	brasl	%r14,do_execve
-	ltgfr	%r2,%r2
-	je	0f
-	aghi	%r15,(STACK_FRAME_OVERHEAD + __PT_SIZE)
-	lmg	%r12,%r15,96(%r15)
-	br	%r14
-	# execve succeeded.
-0:	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
-	lg	%r15,__LC_KERNEL_STACK	# load ksp
-	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
-	la	%r11,STACK_FRAME_OVERHEAD(%r15)
-	mvc	0(__PT_SIZE,%r11),0(%r12)	# copy pt_regs
-	lg	%r12,__LC_THREAD_INFO
+1:	# it's a kernel thread
+	stg	%r15,__PT_R15(%r11)	# store stack pointer for new kthread
+	brasl	%r14,schedule_tail
+	TRACE_IRQS_ON
+	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
+	lmg	%r9,%r11,__PT_R9(%r11)	# load gprs
+ENTRY(kernel_thread_starter)
+	la	%r2,0(%r10)
+	basr	%r14,%r9
+	la	%r2,0
+	br	%r11			# do_exit
+
+ENTRY(ret_from_kernel_execve)
+	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
+	lgr	%r15,%r2
+	lgr	%r11,%r2
+	aghi	%r15,-STACK_FRAME_OVERHEAD
 	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
+	lg	%r12,__LC_THREAD_INFO
 	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
-	brasl	%r14,execve_tail
 	j	sysc_return
 
 /*
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index 805b6686b64..984726cbce1 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -52,7 +52,7 @@ __HEAD
 	.long	0x02000370,0x60000050		# the channel program the PSW
 	.long	0x020003c0,0x60000050		# at location 0 is loaded.
 	.long	0x02000410,0x60000050		# Initial processing starts
-	.long	0x02000460,0x60000050		# at 0xf0 = iplstart.
+	.long	0x02000460,0x60000050		# at 0x200 = iplstart.
 	.long	0x020004b0,0x60000050
 	.long	0x02000500,0x60000050
 	.long	0x02000550,0x60000050
@@ -62,11 +62,54 @@ __HEAD
 	.long	0x02000690,0x60000050
 	.long	0x020006e0,0x20000050
 
-	.org	0xf0
+	.org	0x200
+#
+# subroutine to set architecture mode
+#
+.Lsetmode:
+#ifdef CONFIG_64BIT
+	mvi	__LC_AR_MODE_ID,1	# set esame flag
+	slr	%r0,%r0 		# set cpuid to zero
+	lhi	%r1,2			# mode 2 = esame (dump)
+	sigp	%r1,%r0,0x12		# switch to esame mode
+	bras	%r13,0f
+	.fill	16,4,0x0
+0:	lmh	%r0,%r15,0(%r13)	# clear high-order half of gprs
+	sam31				# switch to 31 bit addressing mode
+#else
+	mvi	__LC_AR_MODE_ID,0	# set ESA flag (mode 0)
+#endif
+	br	%r14
+
+#
+# subroutine to wait for end I/O
+#
+.Lirqwait:
+#ifdef CONFIG_64BIT
+	mvc	0x1f0(16),.Lnewpsw	# set up IO interrupt psw
+	lpsw	.Lwaitpsw
+.Lioint:
+	br	%r14
+	.align	8
+.Lnewpsw:
+	.quad	0x0000000080000000,.Lioint
+#else
+	mvc	0x78(8),.Lnewpsw	# set up IO interrupt psw
+	lpsw	.Lwaitpsw
+.Lioint:
+	br	%r14
+	.align	8
+.Lnewpsw:
+	.long	0x00080000,0x80000000+.Lioint
+#endif
+.Lwaitpsw:
+	.long	0x020a0000,0x80000000+.Lioint
+
 #
 # subroutine for loading cards from the reader
 #
 .Lloader:
+	la	%r4,0(%r14)
 	la	%r3,.Lorb		# r2 = address of orb into r2
 	la	%r5,.Lirb		# r4 = address of irb
 	la	%r6,.Lccws
@@ -83,9 +126,7 @@ __HEAD
 	ssch	0(%r3)			# load chunk of 1600 bytes
 	bnz	.Llderr
 .Lwait4irq:
-	mvc	0x78(8),.Lnewpsw	# set up IO interrupt psw
-	lpsw	.Lwaitpsw
-.Lioint:
+	bas	%r14,.Lirqwait
 	c	%r1,0xb8		# compare subchannel number
 	bne	.Lwait4irq
 	tsch	0(%r5)
@@ -104,7 +145,7 @@ __HEAD
 	sr	%r0,%r3 		# #ccws*80-residual=#bytes read
 	ar	%r2,%r0
 
-	br	%r14			# r2 contains the total size
+	br	%r4			# r2 contains the total size
 
 .Lcont:
 	ahi	%r2,0x640		# add 0x640 to total size
@@ -128,10 +169,6 @@ __HEAD
 .Lloadp:.long	0,0
 	.align	8
 .Lcrash:.long	0x000a0000,0x00000000
-.Lnewpsw:
-	.long	0x00080000,0x80000000+.Lioint
-.Lwaitpsw:
-	.long	0x020a0000,0x80000000+.Lioint
 
 	.align	8
 .Lccws: .rept	19
@@ -140,6 +177,7 @@ __HEAD
 	.long	0x02200050,0x00000000
 
 iplstart:
+	bas	%r14,.Lsetmode		# Immediately switch to 64 bit mode
 	lh	%r1,0xb8		# test if subchannel number
 	bct	%r1,.Lnoload		#  is valid
 	l	%r1,0xb8		# load ipl subchannel number
@@ -209,8 +247,8 @@ iplstart:
 #
 # reset files in VM reader
 #
-	stidp	__LC_SAVE_AREA_SYNC	# store cpuid
-	tm	__LC_SAVE_AREA_SYNC,0xff# running VM ?
+	stidp	.Lcpuid			# store cpuid
+	tm	.Lcpuid,0xff		# running VM ?
 	bno	.Lnoreset
 	la	%r2,.Lreset
 	lhi	%r3,26
@@ -222,23 +260,14 @@ iplstart:
 	tm	31(%r5),0xff		# bits is set in the schib
 	bz	.Lnoreset
 .Lwaitforirq:
-	mvc	0x78(8),.Lrdrnewpsw	# set up IO interrupt psw
-.Lwaitrdrirq:
-	lpsw	.Lrdrwaitpsw
-.Lrdrint:
+	bas	%r14,.Lirqwait		# wait for IO interrupt
 	c	%r1,0xb8		# compare subchannel number
-	bne	.Lwaitrdrirq
+	bne	.Lwaitforirq
 	la	%r5,.Lirb
 	tsch	0(%r5)
 .Lnoreset:
 	b	.Lnoload
 
-	.align	8
-.Lrdrnewpsw:
-	.long	0x00080000,0x80000000+.Lrdrint
-.Lrdrwaitpsw:
-	.long	0x020a0000,0x80000000+.Lrdrint
-
 #
 # everything loaded, go for it
 #
@@ -254,6 +283,8 @@ iplstart:
 	.byte	0xc8,0xd6,0xd3,0xc4	# "change rdr all keep nohold"
 .L_eof: .long	0xc5d6c600	 /* C'EOF' */
 .L_hdr: .long	0xc8c4d900	 /* C'HDR' */
+	.align	8
+.Lcpuid:.fill	8,1,0
 
 #
 # SALIPL loader support. Based on a patch by Rob van der Heij.
@@ -263,6 +294,7 @@ iplstart:
 	.org	0x800
 ENTRY(start)
 	stm	%r0,%r15,0x07b0		# store registers
+	bas	%r14,.Lsetmode		# Immediately switch to 64 bit mode
 	basr	%r12,%r0
 .base:
 	l	%r11,.parm
@@ -343,6 +375,18 @@ ENTRY(startup)
 ENTRY(startup_kdump)
 	j	.Lep_startup_kdump
 .Lep_startup_normal:
+#ifdef CONFIG_64BIT
+	mvi	__LC_AR_MODE_ID,1	# set esame flag
+	slr	%r0,%r0 		# set cpuid to zero
+	lhi	%r1,2			# mode 2 = esame (dump)
+	sigp	%r1,%r0,0x12		# switch to esame mode
+	bras	%r13,0f
+	.fill	16,4,0x0
+0:	lmh	%r0,%r15,0(%r13)	# clear high-order half of gprs
+	sam31				# switch to 31 bit addressing mode
+#else
+	mvi	__LC_AR_MODE_ID,0	# set ESA flag (mode 0)
+#endif
 	basr	%r13,0			# get base
 .LPG0:
 	xc	0x200(256),0x200	# partially clear lowcore
@@ -410,22 +454,17 @@ ENTRY(startup_kdump)
 #endif
 
 #ifdef CONFIG_64BIT
-	mvi	__LC_AR_MODE_ID,1	# set esame flag
-	slr	%r0,%r0 		# set cpuid to zero
-	lhi	%r1,2			# mode 2 = esame (dump)
-	sigp	%r1,%r0,0x12		# switch to esame mode
+	/* Continue with 64bit startup code in head64.S */
 	sam64				# switch to 64 bit mode
-	larl	%r13,4f
-	lmh	%r0,%r15,0(%r13)	# clear high-order half
 	jg	startup_continue
-4:	.fill	16,4,0x0
 #else
-	mvi	__LC_AR_MODE_ID,0	# set ESA flag (mode 0)
+	/* Continue with 31bit startup code in head31.S */
 	l	%r13,4f-.LPG0(%r13)
 	b	0(%r13)
 	.align	8
 4:	.long	startup_continue
 #endif
+
 	.align	8
 5:	.long	0x7fffffff,0xffffffff
 
diff --git a/arch/s390/kernel/head31.S b/arch/s390/kernel/head31.S
index a1372ae24ae..9a99856df1c 100644
--- a/arch/s390/kernel/head31.S
+++ b/arch/s390/kernel/head31.S
@@ -78,10 +78,7 @@ ENTRY(startup_continue)
 
 ENTRY(_ehead)
 
-#ifdef CONFIG_SHARED_KERNEL
 	.org	0x100000 - 0x11000	# head.o ends at 0x11000
-#endif
-
 #
 # startup-code, running in absolute addressing mode
 #
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index c108af28bbe..b9e25ae2579 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -76,10 +76,7 @@ ENTRY(startup_continue)
 
 ENTRY(_ehead)
 
-#ifdef CONFIG_SHARED_KERNEL
 	.org	0x100000 - 0x11000	# head.o ends at 0x11000
-#endif
-
 #
 # startup-code, running in absolute addressing mode
 #
diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c
index 46412b1d7e1..4610deafd95 100644
--- a/arch/s390/kernel/module.c
+++ b/arch/s390/kernel/module.c
@@ -44,6 +44,17 @@
 #define PLT_ENTRY_SIZE 20
 #endif /* CONFIG_64BIT */
 
+#ifdef CONFIG_64BIT
+void *module_alloc(unsigned long size)
+{
+	if (PAGE_ALIGN(size) > MODULES_LEN)
+		return NULL;
+	return __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,
+				    GFP_KERNEL, PAGE_KERNEL, -1,
+				    __builtin_return_address(0));
+}
+#endif
+
 /* Free memory returned from module_alloc */
 void module_free(struct module *mod, void *module_region)
 {
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 5024be27df4..cd31ad457a9 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -100,35 +100,6 @@ void cpu_idle(void)
 
 extern void __kprobes kernel_thread_starter(void);
 
-asm(
-	".section .kprobes.text, \"ax\"\n"
-	".global kernel_thread_starter\n"
-	"kernel_thread_starter:\n"
-	"    la    2,0(10)\n"
-	"    basr  14,9\n"
-	"    la    2,0\n"
-	"    br    11\n"
-	".previous\n");
-
-int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
-{
-	struct pt_regs regs;
-
-	memset(&regs, 0, sizeof(regs));
-	regs.psw.mask = psw_kernel_bits |
-		PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK;
-	regs.psw.addr = (unsigned long) kernel_thread_starter | PSW_ADDR_AMODE;
-	regs.gprs[9] = (unsigned long) fn;
-	regs.gprs[10] = (unsigned long) arg;
-	regs.gprs[11] = (unsigned long) do_exit;
-	regs.orig_gpr2 = -1;
-
-	/* Ok, create the new process.. */
-	return do_fork(flags | CLONE_VM | CLONE_UNTRACED,
-		       0, &regs, 0, NULL, NULL);
-}
-EXPORT_SYMBOL(kernel_thread);
-
 /*
  * Free current thread data structures etc..
  */
@@ -146,7 +117,7 @@ void release_thread(struct task_struct *dead_task)
 }
 
 int copy_thread(unsigned long clone_flags, unsigned long new_stackp,
-		unsigned long unused,
+		unsigned long arg,
 		struct task_struct *p, struct pt_regs *regs)
 {
 	struct thread_info *ti;
@@ -158,20 +129,44 @@ int copy_thread(unsigned long clone_flags, unsigned long new_stackp,
 
 	frame = container_of(task_pt_regs(p), struct fake_frame, childregs);
 	p->thread.ksp = (unsigned long) frame;
-	/* Store access registers to kernel stack of new process. */
-	frame->childregs = *regs;
-	frame->childregs.gprs[2] = 0;	/* child returns 0 on fork. */
-	frame->childregs.gprs[15] = new_stackp;
-	frame->sf.back_chain = 0;
+	/* Save access registers to new thread structure. */
+	save_access_regs(&p->thread.acrs[0]);
+	/* start new process with ar4 pointing to the correct address space */
+	p->thread.mm_segment = get_fs();
+	/* Don't copy debug registers */
+	memset(&p->thread.per_user, 0, sizeof(p->thread.per_user));
+	memset(&p->thread.per_event, 0, sizeof(p->thread.per_event));
+	clear_tsk_thread_flag(p, TIF_SINGLE_STEP);
+	clear_tsk_thread_flag(p, TIF_PER_TRAP);
+	/* Initialize per thread user and system timer values */
+	ti = task_thread_info(p);
+	ti->user_timer = 0;
+	ti->system_timer = 0;
 
+	frame->sf.back_chain = 0;
 	/* new return point is ret_from_fork */
 	frame->sf.gprs[8] = (unsigned long) ret_from_fork;
-
 	/* fake return stack for resume(), don't go back to schedule */
 	frame->sf.gprs[9] = (unsigned long) frame;
 
-	/* Save access registers to new thread structure. */
-	save_access_regs(&p->thread.acrs[0]);
+	/* Store access registers to kernel stack of new process. */
+	if (unlikely(!regs)) {
+		/* kernel thread */
+		memset(&frame->childregs, 0, sizeof(struct pt_regs));
+		frame->childregs.psw.mask = psw_kernel_bits | PSW_MASK_DAT |
+				PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK;
+		frame->childregs.psw.addr = PSW_ADDR_AMODE |
+				(unsigned long) kernel_thread_starter;
+		frame->childregs.gprs[9] = new_stackp; /* function */
+		frame->childregs.gprs[10] = arg;
+		frame->childregs.gprs[11] = (unsigned long) do_exit;
+		frame->childregs.orig_gpr2 = -1;
+
+		return 0;
+	}
+	frame->childregs = *regs;
+	frame->childregs.gprs[2] = 0;	/* child returns 0 on fork. */
+	frame->childregs.gprs[15] = new_stackp;
 
 	/* Don't copy runtime instrumentation info */
 	p->thread.ri_cb = NULL;
@@ -202,17 +197,6 @@ int copy_thread(unsigned long clone_flags, unsigned long new_stackp,
 		}
 	}
 #endif /* CONFIG_64BIT */
-	/* start new process with ar4 pointing to the correct address space */
-	p->thread.mm_segment = get_fs();
-	/* Don't copy debug registers */
-	memset(&p->thread.per_user, 0, sizeof(p->thread.per_user));
-	memset(&p->thread.per_event, 0, sizeof(p->thread.per_event));
-	clear_tsk_thread_flag(p, TIF_SINGLE_STEP);
-	clear_tsk_thread_flag(p, TIF_PER_TRAP);
-	/* Initialize per thread user and system timer values */
-	ti = task_thread_info(p);
-	ti->user_timer = 0;
-	ti->system_timer = 0;
 	return 0;
 }
 
@@ -258,31 +242,6 @@ asmlinkage void execve_tail(void)
 }
 
 /*
- * sys_execve() executes a new program.
- */
-SYSCALL_DEFINE3(execve, const char __user *, name,
-		const char __user *const __user *, argv,
-		const char __user *const __user *, envp)
-{
-	struct pt_regs *regs = task_pt_regs(current);
-	char *filename;
-	long rc;
-
-	filename = getname(name);
-	rc = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		return rc;
-	rc = do_execve(filename, argv, envp, regs);
-	if (rc)
-		goto out;
-	execve_tail();
-	rc = regs->gprs[2];
-out:
-	putname(filename);
-	return rc;
-}
-
-/*
  * fill in the FPU structure for a core dump.
  */
 int dump_fpu (struct pt_regs * regs, s390_fp_regs *fpregs)
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index afa9fdba200..b1f2be9aaaa 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -105,6 +105,11 @@ EXPORT_SYMBOL(VMALLOC_END);
 struct page *vmemmap;
 EXPORT_SYMBOL(vmemmap);
 
+#ifdef CONFIG_64BIT
+unsigned long MODULES_VADDR;
+unsigned long MODULES_END;
+#endif
+
 /* An array with a pointer to the lowcore of every CPU. */
 struct _lowcore *lowcore_ptr[NR_CPUS];
 EXPORT_SYMBOL(lowcore_ptr);
@@ -544,19 +549,23 @@ static void __init setup_memory_end(void)
 
 	/* Choose kernel address space layout: 2, 3, or 4 levels. */
 #ifdef CONFIG_64BIT
-	vmalloc_size = VMALLOC_END ?: 128UL << 30;
+	vmalloc_size = VMALLOC_END ?: (128UL << 30) - MODULES_LEN;
 	tmp = (memory_end ?: real_memory_size) / PAGE_SIZE;
 	tmp = tmp * (sizeof(struct page) + PAGE_SIZE) + vmalloc_size;
 	if (tmp <= (1UL << 42))
 		vmax = 1UL << 42;	/* 3-level kernel page table */
 	else
 		vmax = 1UL << 53;	/* 4-level kernel page table */
+	/* module area is at the end of the kernel address space. */
+	MODULES_END = vmax;
+	MODULES_VADDR = MODULES_END - MODULES_LEN;
+	VMALLOC_END = MODULES_VADDR;
 #else
 	vmalloc_size = VMALLOC_END ?: 96UL << 20;
 	vmax = 1UL << 31;		/* 2-level kernel page table */
-#endif
 	/* vmalloc area is at the end of the kernel address space. */
 	VMALLOC_END = vmax;
+#endif
 	VMALLOC_START = vmax - vmalloc_size;
 
 	/* Split remaining virtual space between 1:1 mapping & vmemmap array */
@@ -768,6 +777,40 @@ static void __init reserve_crashkernel(void)
 #endif
 }
 
+static void __init init_storage_keys(unsigned long start, unsigned long end)
+{
+	unsigned long boundary, function, size;
+
+	while (start < end) {
+		if (MACHINE_HAS_EDAT2) {
+			/* set storage keys for a 2GB frame */
+			function = 0x22000 | PAGE_DEFAULT_KEY;
+			size = 1UL << 31;
+			boundary = (start + size) & ~(size - 1);
+			if (boundary <= end) {
+				do {
+					start = pfmf(function, start);
+				} while (start < boundary);
+				continue;
+			}
+		}
+		if (MACHINE_HAS_EDAT1) {
+			/* set storage keys for a 1MB frame */
+			function = 0x21000 | PAGE_DEFAULT_KEY;
+			size = 1UL << 20;
+			boundary = (start + size) & ~(size - 1);
+			if (boundary <= end) {
+				do {
+					start = pfmf(function, start);
+				} while (start < boundary);
+				continue;
+			}
+		}
+		page_set_storage_key(start, PAGE_DEFAULT_KEY, 0);
+		start += PAGE_SIZE;
+	}
+}
+
 static void __init setup_memory(void)
 {
         unsigned long bootmap_size;
@@ -846,9 +889,7 @@ static void __init setup_memory(void)
 		memblock_add_node(PFN_PHYS(start_chunk),
 				  PFN_PHYS(end_chunk - start_chunk), 0);
 		pfn = max(start_chunk, start_pfn);
-		for (; pfn < end_chunk; pfn++)
-			page_set_storage_key(PFN_PHYS(pfn),
-					     PAGE_DEFAULT_KEY, 0);
+		init_storage_keys(PFN_PHYS(pfn), PFN_PHYS(end_chunk));
 	}
 
 	psw_set_key(PAGE_DEFAULT_KEY);
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index 2db1011b8b1..7fcd690d42c 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -34,7 +34,7 @@
 #include <linux/profile.h>
 #include <linux/timex.h>
 #include <linux/notifier.h>
-#include <linux/clocksource.h>
+#include <linux/timekeeper_internal.h>
 #include <linux/clockchips.h>
 #include <linux/gfp.h>
 #include <linux/kprobes.h>
@@ -219,7 +219,7 @@ struct clocksource * __init clocksource_default_clock(void)
 	return &clocksource_tod;
 }
 
-void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
+void update_vsyscall_old(struct timespec *wall_time, struct timespec *wtm,
 			struct clocksource *clock, u32 mult)
 {
 	if (clock != &clocksource_tod)
diff --git a/arch/s390/mm/Makefile b/arch/s390/mm/Makefile
index 0f5536b0c1a..1bea6d1f55a 100644
--- a/arch/s390/mm/Makefile
+++ b/arch/s390/mm/Makefile
@@ -7,3 +7,4 @@ obj-y	 := init.o fault.o extmem.o mmap.o vmem.o pgtable.o maccess.o \
 obj-$(CONFIG_CMM) += cmm.o
 obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
 obj-$(CONFIG_DEBUG_SET_MODULE_RONX) += pageattr.o
+obj-$(CONFIG_S390_PTDUMP) += dump_pagetables.o
diff --git a/arch/s390/mm/dump_pagetables.c b/arch/s390/mm/dump_pagetables.c
new file mode 100644
index 00000000000..cbc6668acb8
--- /dev/null
+++ b/arch/s390/mm/dump_pagetables.c
@@ -0,0 +1,226 @@
+#include <linux/seq_file.h>
+#include <linux/debugfs.h>
+#include <linux/module.h>
+#include <linux/mm.h>
+#include <asm/sections.h>
+#include <asm/pgtable.h>
+
+static unsigned long max_addr;
+
+struct addr_marker {
+	unsigned long start_address;
+	const char *name;
+};
+
+enum address_markers_idx {
+	IDENTITY_NR = 0,
+	KERNEL_START_NR,
+	KERNEL_END_NR,
+	VMEMMAP_NR,
+	VMALLOC_NR,
+#ifdef CONFIG_64BIT
+	MODULES_NR,
+#endif
+};
+
+static struct addr_marker address_markers[] = {
+	[IDENTITY_NR]	  = {0, "Identity Mapping"},
+	[KERNEL_START_NR] = {(unsigned long)&_stext, "Kernel Image Start"},
+	[KERNEL_END_NR]	  = {(unsigned long)&_end, "Kernel Image End"},
+	[VMEMMAP_NR]	  = {0, "vmemmap Area"},
+	[VMALLOC_NR]	  = {0, "vmalloc Area"},
+#ifdef CONFIG_64BIT
+	[MODULES_NR]	  = {0, "Modules Area"},
+#endif
+	{ -1, NULL }
+};
+
+struct pg_state {
+	int level;
+	unsigned int current_prot;
+	unsigned long start_address;
+	unsigned long current_address;
+	const struct addr_marker *marker;
+};
+
+static void print_prot(struct seq_file *m, unsigned int pr, int level)
+{
+	static const char * const level_name[] =
+		{ "ASCE", "PGD", "PUD", "PMD", "PTE" };
+
+	seq_printf(m, "%s ", level_name[level]);
+	if (pr & _PAGE_INVALID)
+		seq_printf(m, "I\n");
+	else
+		seq_printf(m, "%s\n", pr & _PAGE_RO ? "RO" : "RW");
+}
+
+static void note_page(struct seq_file *m, struct pg_state *st,
+		     unsigned int new_prot, int level)
+{
+	static const char units[] = "KMGTPE";
+	int width = sizeof(unsigned long) * 2;
+	const char *unit = units;
+	unsigned int prot, cur;
+	unsigned long delta;
+
+	/*
+	 * If we have a "break" in the series, we need to flush the state
+	 * that we have now. "break" is either changing perms, levels or
+	 * address space marker.
+	 */
+	prot = new_prot;
+	cur = st->current_prot;
+
+	if (!st->level) {
+		/* First entry */
+		st->current_prot = new_prot;
+		st->level = level;
+		st->marker = address_markers;
+		seq_printf(m, "---[ %s ]---\n", st->marker->name);
+	} else if (prot != cur || level != st->level ||
+		   st->current_address >= st->marker[1].start_address) {
+		/* Print the actual finished series */
+		seq_printf(m, "0x%0*lx-0x%0*lx",
+			   width, st->start_address,
+			   width, st->current_address);
+		delta = (st->current_address - st->start_address) >> 10;
+		while (!(delta & 0x3ff) && unit[1]) {
+			delta >>= 10;
+			unit++;
+		}
+		seq_printf(m, "%9lu%c ", delta, *unit);
+		print_prot(m, st->current_prot, st->level);
+		if (st->current_address >= st->marker[1].start_address) {
+			st->marker++;
+			seq_printf(m, "---[ %s ]---\n", st->marker->name);
+		}
+		st->start_address = st->current_address;
+		st->current_prot = new_prot;
+		st->level = level;
+	}
+}
+
+/*
+ * The actual page table walker functions. In order to keep the implementation
+ * of print_prot() short, we only check and pass _PAGE_INVALID and _PAGE_RO
+ * flags to note_page() if a region, segment or page table entry is invalid or
+ * read-only.
+ * After all it's just a hint that the current level being walked contains an
+ * invalid or read-only entry.
+ */
+static void walk_pte_level(struct seq_file *m, struct pg_state *st,
+			   pmd_t *pmd, unsigned long addr)
+{
+	unsigned int prot;
+	pte_t *pte;
+	int i;
+
+	for (i = 0; i < PTRS_PER_PTE && addr < max_addr; i++) {
+		st->current_address = addr;
+		pte = pte_offset_kernel(pmd, addr);
+		prot = pte_val(*pte) & (_PAGE_RO | _PAGE_INVALID);
+		note_page(m, st, prot, 4);
+		addr += PAGE_SIZE;
+	}
+}
+
+static void walk_pmd_level(struct seq_file *m, struct pg_state *st,
+			   pud_t *pud, unsigned long addr)
+{
+	unsigned int prot;
+	pmd_t *pmd;
+	int i;
+
+	for (i = 0; i < PTRS_PER_PMD && addr < max_addr; i++) {
+		st->current_address = addr;
+		pmd = pmd_offset(pud, addr);
+		if (!pmd_none(*pmd)) {
+			if (pmd_large(*pmd)) {
+				prot = pmd_val(*pmd) & _SEGMENT_ENTRY_RO;
+				note_page(m, st, prot, 3);
+			} else
+				walk_pte_level(m, st, pmd, addr);
+		} else
+			note_page(m, st, _PAGE_INVALID, 3);
+		addr += PMD_SIZE;
+	}
+}
+
+static void walk_pud_level(struct seq_file *m, struct pg_state *st,
+			   pgd_t *pgd, unsigned long addr)
+{
+	pud_t *pud;
+	int i;
+
+	for (i = 0; i < PTRS_PER_PUD && addr < max_addr; i++) {
+		st->current_address = addr;
+		pud = pud_offset(pgd, addr);
+		if (!pud_none(*pud))
+			walk_pmd_level(m, st, pud, addr);
+		else
+			note_page(m, st, _PAGE_INVALID, 2);
+		addr += PUD_SIZE;
+	}
+}
+
+static void walk_pgd_level(struct seq_file *m)
+{
+	unsigned long addr = 0;
+	struct pg_state st;
+	pgd_t *pgd;
+	int i;
+
+	memset(&st, 0, sizeof(st));
+	for (i = 0; i < PTRS_PER_PGD && addr < max_addr; i++) {
+		st.current_address = addr;
+		pgd = pgd_offset_k(addr);
+		if (!pgd_none(*pgd))
+			walk_pud_level(m, &st, pgd, addr);
+		else
+			note_page(m, &st, _PAGE_INVALID, 1);
+		addr += PGDIR_SIZE;
+	}
+	/* Flush out the last page */
+	st.current_address = max_addr;
+	note_page(m, &st, 0, 0);
+}
+
+static int ptdump_show(struct seq_file *m, void *v)
+{
+	walk_pgd_level(m);
+	return 0;
+}
+
+static int ptdump_open(struct inode *inode, struct file *filp)
+{
+	return single_open(filp, ptdump_show, NULL);
+}
+
+static const struct file_operations ptdump_fops = {
+	.open		= ptdump_open,
+	.read		= seq_read,
+	.llseek		= seq_lseek,
+	.release	= single_release,
+};
+
+static int pt_dump_init(void)
+{
+	/*
+	 * Figure out the maximum virtual address being accessible with the
+	 * kernel ASCE. We need this to keep the page table walker functions
+	 * from accessing non-existent entries.
+	 */
+#ifdef CONFIG_32BIT
+	max_addr = 1UL << 31;
+#else
+	max_addr = (S390_lowcore.kernel_asce & _REGION_ENTRY_TYPE_MASK) >> 2;
+	max_addr = 1UL << (max_addr * 11 + 31);
+	address_markers[MODULES_NR].start_address = MODULES_VADDR;
+#endif
+	address_markers[VMEMMAP_NR].start_address = (unsigned long) vmemmap;
+	address_markers[VMALLOC_NR].start_address = VMALLOC_START;
+	debugfs_create_file("kernel_page_tables", 0400, NULL, NULL, &ptdump_fops);
+	return 0;
+}
+device_initcall(pt_dump_init);
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index ac9122ca115..04ad4001a28 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -367,6 +367,7 @@ retry:
 			/* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
 			 * of starvation. */
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 			down_read(&mm->mmap_sem);
 			goto retry;
 		}
diff --git a/arch/s390/mm/gup.c b/arch/s390/mm/gup.c
index eeaf8023851..60acb93a468 100644
--- a/arch/s390/mm/gup.c
+++ b/arch/s390/mm/gup.c
@@ -115,7 +115,16 @@ static inline int gup_pmd_range(pud_t *pudp, pud_t pud, unsigned long addr,
 		pmd = *pmdp;
 		barrier();
 		next = pmd_addr_end(addr, end);
-		if (pmd_none(pmd))
+		/*
+		 * The pmd_trans_splitting() check below explains why
+		 * pmdp_splitting_flush() has to serialize with
+		 * smp_call_function() against our disabled IRQs, to stop
+		 * this gup-fast code from running while we set the
+		 * splitting bit in the pmd. Returning zero will take
+		 * the slow path that will call wait_split_huge_page()
+		 * if the pmd is still in splitting state.
+		 */
+		if (pmd_none(pmd) || pmd_trans_splitting(pmd))
 			return 0;
 		if (unlikely(pmd_huge(pmd))) {
 			if (!gup_huge_pmd(pmdp, pmd, addr, next,
diff --git a/arch/s390/mm/pageattr.c b/arch/s390/mm/pageattr.c
index b36537a5f43..00be01c4b4f 100644
--- a/arch/s390/mm/pageattr.c
+++ b/arch/s390/mm/pageattr.c
@@ -8,25 +8,38 @@
 #include <asm/cacheflush.h>
 #include <asm/pgtable.h>
 
+static pte_t *walk_page_table(unsigned long addr)
+{
+	pgd_t *pgdp;
+	pud_t *pudp;
+	pmd_t *pmdp;
+	pte_t *ptep;
+
+	pgdp = pgd_offset_k(addr);
+	if (pgd_none(*pgdp))
+		return NULL;
+	pudp = pud_offset(pgdp, addr);
+	if (pud_none(*pudp))
+		return NULL;
+	pmdp = pmd_offset(pudp, addr);
+	if (pmd_none(*pmdp) || pmd_large(*pmdp))
+		return NULL;
+	ptep = pte_offset_kernel(pmdp, addr);
+	if (pte_none(*ptep))
+		return NULL;
+	return ptep;
+}
+
 static void change_page_attr(unsigned long addr, int numpages,
 			     pte_t (*set) (pte_t))
 {
 	pte_t *ptep, pte;
-	pmd_t *pmdp;
-	pud_t *pudp;
-	pgd_t *pgdp;
 	int i;
 
 	for (i = 0; i < numpages; i++) {
-		pgdp = pgd_offset(&init_mm, addr);
-		pudp = pud_offset(pgdp, addr);
-		pmdp = pmd_offset(pudp, addr);
-		if (pmd_huge(*pmdp)) {
-			WARN_ON_ONCE(1);
-			continue;
-		}
-		ptep = pte_offset_kernel(pmdp, addr);
-
+		ptep = walk_page_table(addr);
+		if (WARN_ON_ONCE(!ptep))
+			break;
 		pte = *ptep;
 		pte = set(pte);
 		__ptep_ipte(addr, ptep);
@@ -40,21 +53,18 @@ int set_memory_ro(unsigned long addr, int numpages)
 	change_page_attr(addr, numpages, pte_wrprotect);
 	return 0;
 }
-EXPORT_SYMBOL_GPL(set_memory_ro);
 
 int set_memory_rw(unsigned long addr, int numpages)
 {
 	change_page_attr(addr, numpages, pte_mkwrite);
 	return 0;
 }
-EXPORT_SYMBOL_GPL(set_memory_rw);
 
 /* not possible */
 int set_memory_nx(unsigned long addr, int numpages)
 {
 	return 0;
 }
-EXPORT_SYMBOL_GPL(set_memory_nx);
 
 int set_memory_x(unsigned long addr, int numpages)
 {
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index b402991e43d..c8188a18af0 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -787,6 +787,30 @@ void tlb_remove_table(struct mmu_gather *tlb, void *table)
 		tlb_table_flush(tlb);
 }
 
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+void thp_split_vma(struct vm_area_struct *vma)
+{
+	unsigned long addr;
+	struct page *page;
+
+	for (addr = vma->vm_start; addr < vma->vm_end; addr += PAGE_SIZE) {
+		page = follow_page(vma, addr, FOLL_SPLIT);
+	}
+}
+
+void thp_split_mm(struct mm_struct *mm)
+{
+	struct vm_area_struct *vma = mm->mmap;
+
+	while (vma != NULL) {
+		thp_split_vma(vma);
+		vma->vm_flags &= ~VM_HUGEPAGE;
+		vma->vm_flags |= VM_NOHUGEPAGE;
+		vma = vma->vm_next;
+	}
+}
+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+
 /*
  * switch on pgstes for its userspace process (for kvm)
  */
@@ -824,6 +848,12 @@ int s390_enable_sie(void)
 	if (!mm)
 		return -ENOMEM;
 
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+	/* split thp mappings and disable thp for future mappings */
+	thp_split_mm(mm);
+	mm->def_flags |= VM_NOHUGEPAGE;
+#endif
+
 	/* Now lets check again if something happened */
 	task_lock(tsk);
 	if (!tsk->mm || atomic_read(&tsk->mm->mm_users) > 1 ||
@@ -866,3 +896,81 @@ bool kernel_page_present(struct page *page)
 	return cc == 0;
 }
 #endif /* CONFIG_HIBERNATION && CONFIG_DEBUG_PAGEALLOC */
+
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+int pmdp_clear_flush_young(struct vm_area_struct *vma, unsigned long address,
+			   pmd_t *pmdp)
+{
+	VM_BUG_ON(address & ~HPAGE_PMD_MASK);
+	/* No need to flush TLB
+	 * On s390 reference bits are in storage key and never in TLB */
+	return pmdp_test_and_clear_young(vma, address, pmdp);
+}
+
+int pmdp_set_access_flags(struct vm_area_struct *vma,
+			  unsigned long address, pmd_t *pmdp,
+			  pmd_t entry, int dirty)
+{
+	VM_BUG_ON(address & ~HPAGE_PMD_MASK);
+
+	if (pmd_same(*pmdp, entry))
+		return 0;
+	pmdp_invalidate(vma, address, pmdp);
+	set_pmd_at(vma->vm_mm, address, pmdp, entry);
+	return 1;
+}
+
+static void pmdp_splitting_flush_sync(void *arg)
+{
+	/* Simply deliver the interrupt */
+}
+
+void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address,
+			  pmd_t *pmdp)
+{
+	VM_BUG_ON(address & ~HPAGE_PMD_MASK);
+	if (!test_and_set_bit(_SEGMENT_ENTRY_SPLIT_BIT,
+			      (unsigned long *) pmdp)) {
+		/* need to serialize against gup-fast (IRQ disabled) */
+		smp_call_function(pmdp_splitting_flush_sync, NULL, 1);
+	}
+}
+
+void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable)
+{
+	struct list_head *lh = (struct list_head *) pgtable;
+
+	assert_spin_locked(&mm->page_table_lock);
+
+	/* FIFO */
+	if (!mm->pmd_huge_pte)
+		INIT_LIST_HEAD(lh);
+	else
+		list_add(lh, (struct list_head *) mm->pmd_huge_pte);
+	mm->pmd_huge_pte = pgtable;
+}
+
+pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm)
+{
+	struct list_head *lh;
+	pgtable_t pgtable;
+	pte_t *ptep;
+
+	assert_spin_locked(&mm->page_table_lock);
+
+	/* FIFO */
+	pgtable = mm->pmd_huge_pte;
+	lh = (struct list_head *) pgtable;
+	if (list_empty(lh))
+		mm->pmd_huge_pte = NULL;
+	else {
+		mm->pmd_huge_pte = (pgtable_t) lh->next;
+		list_del(lh);
+	}
+	ptep = (pte_t *) pgtable;
+	pte_val(*ptep) = _PAGE_TYPE_EMPTY;
+	ptep++;
+	pte_val(*ptep) = _PAGE_TYPE_EMPTY;
+	return pgtable;
+}
+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
diff --git a/arch/s390/mm/vmem.c b/arch/s390/mm/vmem.c
index c22abf900c9..387c7c60b5b 100644
--- a/arch/s390/mm/vmem.c
+++ b/arch/s390/mm/vmem.c
@@ -79,7 +79,8 @@ static pte_t __ref *vmem_pte_alloc(unsigned long address)
  */
 static int vmem_add_mem(unsigned long start, unsigned long size, int ro)
 {
-	unsigned long address;
+	unsigned long end = start + size;
+	unsigned long address = start;
 	pgd_t *pg_dir;
 	pud_t *pu_dir;
 	pmd_t *pm_dir;
@@ -87,7 +88,7 @@ static int vmem_add_mem(unsigned long start, unsigned long size, int ro)
 	pte_t  pte;
 	int ret = -ENOMEM;
 
-	for (address = start; address < start + size; address += PAGE_SIZE) {
+	while (address < end) {
 		pg_dir = pgd_offset_k(address);
 		if (pgd_none(*pg_dir)) {
 			pu_dir = vmem_pud_alloc();
@@ -108,12 +109,11 @@ static int vmem_add_mem(unsigned long start, unsigned long size, int ro)
 		pm_dir = pmd_offset(pu_dir, address);
 
 #if defined(CONFIG_64BIT) && !defined(CONFIG_DEBUG_PAGEALLOC)
-		if (MACHINE_HAS_HPAGE && !(address & ~HPAGE_MASK) &&
-		    (address + HPAGE_SIZE <= start + size) &&
-		    (address >= HPAGE_SIZE)) {
+		if (MACHINE_HAS_EDAT1 && pmd_none(*pm_dir) && address &&
+		    !(address & ~PMD_MASK) && (address + PMD_SIZE <= end)) {
 			pte_val(pte) |= _SEGMENT_ENTRY_LARGE;
 			pmd_val(*pm_dir) = pte_val(pte);
-			address += HPAGE_SIZE - PAGE_SIZE;
+			address += PMD_SIZE;
 			continue;
 		}
 #endif
@@ -126,10 +126,11 @@ static int vmem_add_mem(unsigned long start, unsigned long size, int ro)
 
 		pt_dir = pte_offset_kernel(pm_dir, address);
 		*pt_dir = pte;
+		address += PAGE_SIZE;
 	}
 	ret = 0;
 out:
-	flush_tlb_kernel_range(start, start + size);
+	flush_tlb_kernel_range(start, end);
 	return ret;
 }
 
@@ -139,7 +140,8 @@ out:
  */
 static void vmem_remove_range(unsigned long start, unsigned long size)
 {
-	unsigned long address;
+	unsigned long end = start + size;
+	unsigned long address = start;
 	pgd_t *pg_dir;
 	pud_t *pu_dir;
 	pmd_t *pm_dir;
@@ -147,25 +149,32 @@ static void vmem_remove_range(unsigned long start, unsigned long size)
 	pte_t  pte;
 
 	pte_val(pte) = _PAGE_TYPE_EMPTY;
-	for (address = start; address < start + size; address += PAGE_SIZE) {
+	while (address < end) {
 		pg_dir = pgd_offset_k(address);
+		if (pgd_none(*pg_dir)) {
+			address += PGDIR_SIZE;
+			continue;
+		}
 		pu_dir = pud_offset(pg_dir, address);
-		if (pud_none(*pu_dir))
+		if (pud_none(*pu_dir)) {
+			address += PUD_SIZE;
 			continue;
+		}
 		pm_dir = pmd_offset(pu_dir, address);
-		if (pmd_none(*pm_dir))
+		if (pmd_none(*pm_dir)) {
+			address += PMD_SIZE;
 			continue;
-
-		if (pmd_huge(*pm_dir)) {
+		}
+		if (pmd_large(*pm_dir)) {
 			pmd_clear(pm_dir);
-			address += HPAGE_SIZE - PAGE_SIZE;
+			address += PMD_SIZE;
 			continue;
 		}
-
 		pt_dir = pte_offset_kernel(pm_dir, address);
 		*pt_dir = pte;
+		address += PAGE_SIZE;
 	}
-	flush_tlb_kernel_range(start, start + size);
+	flush_tlb_kernel_range(start, end);
 }
 
 /*
@@ -330,8 +339,8 @@ void __init vmem_map_init(void)
 	unsigned long start, end;
 	int i;
 
-	ro_start = ((unsigned long)&_stext) & PAGE_MASK;
-	ro_end = PFN_ALIGN((unsigned long)&_eshared);
+	ro_start = PFN_ALIGN((unsigned long)&_stext);
+	ro_end = (unsigned long)&_eshared & PAGE_MASK;
 	for (i = 0; i < MEMORY_CHUNKS && memory_chunk[i].size > 0; i++) {
 		if (memory_chunk[i].type == CHUNK_CRASHK ||
 		    memory_chunk[i].type == CHUNK_OLDMEM)
diff --git a/arch/score/Kconfig b/arch/score/Kconfig
index 461c2374749..4f93a431a45 100644
--- a/arch/score/Kconfig
+++ b/arch/score/Kconfig
@@ -11,6 +11,8 @@ config SCORE
        select ARCH_DISCARD_MEMBLOCK
        select GENERIC_CPU_DEVICES
        select GENERIC_CLOCKEVENTS
+       select HAVE_MOD_ARCH_SPECIFIC
+	select MODULES_USE_ELF_REL
 
 choice
 	prompt "System type"
diff --git a/arch/score/include/asm/Kbuild b/arch/score/include/asm/Kbuild
index b367abd4620..ec697aeefd0 100644
--- a/arch/score/include/asm/Kbuild
+++ b/arch/score/include/asm/Kbuild
@@ -1,3 +1,5 @@
 include include/asm-generic/Kbuild.asm
 
 header-y +=
+
+generic-y += clkdev.h
diff --git a/arch/score/include/asm/module.h b/arch/score/include/asm/module.h
index f0b5dc0bd02..abf395bbfab 100644
--- a/arch/score/include/asm/module.h
+++ b/arch/score/include/asm/module.h
@@ -3,6 +3,7 @@
 
 #include <linux/list.h>
 #include <asm/uaccess.h>
+#include <asm-generic/module.h>
 
 struct mod_arch_specific {
 	/* Data Bus Error exception tables */
@@ -13,11 +14,6 @@ struct mod_arch_specific {
 
 typedef uint8_t Elf64_Byte;		/* Type for a 8-bit quantity. */
 
-#define Elf_Shdr	Elf32_Shdr
-#define Elf_Sym		Elf32_Sym
-#define Elf_Ehdr	Elf32_Ehdr
-#define Elf_Addr	Elf32_Addr
-
 /* Given an address, look for it in the exception tables. */
 #ifdef CONFIG_MODULES
 const struct exception_table_entry *search_module_dbetables(unsigned long addr);
diff --git a/arch/score/include/asm/thread_info.h b/arch/score/include/asm/thread_info.h
index a18006e97f1..1425cc03487 100644
--- a/arch/score/include/asm/thread_info.h
+++ b/arch/score/include/asm/thread_info.h
@@ -86,16 +86,12 @@ register struct thread_info *__current_thread_info __asm__("r28");
 #define TIF_NEED_RESCHED	2	/* rescheduling necessary */
 #define TIF_NOTIFY_RESUME	5	/* callback before returning to user */
 #define TIF_RESTORE_SIGMASK	9	/* restore signal mask in do_signal() */
-#define TIF_POLLING_NRFLAG	17	/* true if poll_idle() is polling
-						 TIF_NEED_RESCHED */
 #define TIF_MEMDIE		18	/* is terminating due to OOM killer */
 
 #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
-#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
 
 #define _TIF_WORK_MASK		(0x0000ffff)
 
diff --git a/arch/score/kernel/module.c b/arch/score/kernel/module.c
index 469e3b64e2f..1378d99baa3 100644
--- a/arch/score/kernel/module.c
+++ b/arch/score/kernel/module.c
@@ -125,16 +125,6 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
 	return 0;
 }
 
-int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
-		unsigned int symindex, unsigned int relsec,
-		struct module *me)
-{
-	/* Non-standard return value... most other arch's return -ENOEXEC
-	 * for an unsupported relocation variant
-	 */
-	return 0;
-}
-
 /* Given an address, look for it in the module exception tables. */
 const struct exception_table_entry *search_module_dbetables(unsigned long addr)
 {
diff --git a/arch/score/kernel/signal.c b/arch/score/kernel/signal.c
index e382c52ca0d..c268bbf8b41 100644
--- a/arch/score/kernel/signal.c
+++ b/arch/score/kernel/signal.c
@@ -174,6 +174,7 @@ score_rt_sigreturn(struct pt_regs *regs)
 	/* It is more difficult to avoid calling this function than to
 	   call it and ignore errors.  */
 	do_sigaltstack((stack_t __user *)&st, NULL, regs->regs[0]);
+	regs->is_syscall = 0;
 
 	__asm__ __volatile__(
 		"mv\tr0, %0\n\t"
diff --git a/arch/score/kernel/sys_score.c b/arch/score/kernel/sys_score.c
index 21e86797406..d45cf00a335 100644
--- a/arch/score/kernel/sys_score.c
+++ b/arch/score/kernel/sys_score.c
@@ -92,14 +92,14 @@ asmlinkage long
 score_execve(struct pt_regs *regs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname((char __user*)regs->regs[4]);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		return error;
 
-	error = do_execve(filename,
+	error = do_execve(filename->name,
 			  (const char __user *const __user *)regs->regs[5],
 			  (const char __user *const __user *)regs->regs[6],
 			  regs);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 36f5141e804..babc2b826c5 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -13,14 +13,17 @@ config SUPERH
 	select HAVE_DMA_ATTRS
 	select HAVE_IRQ_WORK
 	select HAVE_PERF_EVENTS
+	select HAVE_DEBUG_BUGVERBOSE
 	select ARCH_HAVE_CUSTOM_GPIO_H
 	select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
 	select PERF_USE_VMALLOC
+	select HAVE_DEBUG_KMEMLEAK
 	select HAVE_KERNEL_GZIP
 	select HAVE_KERNEL_BZIP2
 	select HAVE_KERNEL_LZMA
 	select HAVE_KERNEL_XZ
 	select HAVE_KERNEL_LZO
+	select HAVE_UID16
 	select ARCH_WANT_IPC_PARSE_VERSION
 	select HAVE_SYSCALL_TRACEPOINTS
 	select HAVE_REGS_AND_STACK_ACCESS_API
@@ -35,6 +38,8 @@ config SUPERH
 	select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
 	select GENERIC_STRNCPY_FROM_USER
 	select GENERIC_STRNLEN_USER
+	select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
+	select MODULES_USE_ELF_RELA
 	help
 	  The SuperH is a RISC processor targeted for use in embedded systems
 	  and consumer electronics; it was also used in the Sega Dreamcast
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index 7b673ddcd55..86eadceff09 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -7,6 +7,7 @@ generic-y += delay.h
 generic-y += div64.h
 generic-y += emergency-restart.h
 generic-y += errno.h
+generic-y += exec.h
 generic-y += fcntl.h
 generic-y += ioctl.h
 generic-y += ipcbuf.h
diff --git a/arch/sh/include/asm/exec.h b/arch/sh/include/asm/exec.h
deleted file mode 100644
index 69486a9497f..00000000000
--- a/arch/sh/include/asm/exec.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * Copyright (C) 1999, 2000  Niibe Yutaka  &  Kaz Kojima
- * Copyright (C) 2002 Paul Mundt
- */
-#ifndef __ASM_SH_EXEC_H
-#define __ASM_SH_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* __ASM_SH_EXEC_H */
diff --git a/arch/sh/include/asm/hugetlb.h b/arch/sh/include/asm/hugetlb.h
index 967068fb79a..b3808c7d67b 100644
--- a/arch/sh/include/asm/hugetlb.h
+++ b/arch/sh/include/asm/hugetlb.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_SH_HUGETLB_H
 #define _ASM_SH_HUGETLB_H
 
+#include <asm/cacheflush.h>
 #include <asm/page.h>
 
 
@@ -89,4 +90,9 @@ static inline void arch_release_hugepage(struct page *page)
 {
 }
 
+static inline void arch_clear_hugepage_flags(struct page *page)
+{
+	clear_bit(PG_dcache_clean, &page->flags);
+}
+
 #endif /* _ASM_SH_HUGETLB_H */
diff --git a/arch/sh/include/asm/module.h b/arch/sh/include/asm/module.h
index b7927de86f9..81300d8b544 100644
--- a/arch/sh/include/asm/module.h
+++ b/arch/sh/include/asm/module.h
@@ -1,21 +1,13 @@
 #ifndef _ASM_SH_MODULE_H
 #define _ASM_SH_MODULE_H
 
-struct mod_arch_specific {
+#include <asm-generic/module.h>
+
 #ifdef CONFIG_DWARF_UNWINDER
+struct mod_arch_specific {
 	struct list_head fde_list;
 	struct list_head cie_list;
-#endif
 };
-
-#ifdef CONFIG_64BIT
-#define Elf_Shdr Elf64_Shdr
-#define Elf_Sym Elf64_Sym
-#define Elf_Ehdr Elf64_Ehdr
-#else
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
 #endif
 
 #ifdef CONFIG_CPU_LITTLE_ENDIAN
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index bc13b57cdc8..7d5ac4e4848 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -206,6 +206,9 @@ static inline bool test_and_clear_restore_sigmask(void)
 	ti->status &= ~TS_RESTORE_SIGMASK;
 	return true;
 }
+
+#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
+
 #endif	/* !__ASSEMBLY__ */
 
 #endif /* __KERNEL__ */
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 59521e8a164..ba7345f37bc 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -298,14 +298,14 @@ asmlinkage int sys_execve(const char __user *ufilename,
 {
 	struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname(ufilename);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
 
-	error = do_execve(filename, uargv, uenvp, regs);
+	error = do_execve(filename->name, uargv, uenvp, regs);
 	putname(filename);
 out:
 	return error;
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index 602545b12a8..98a709f0c3c 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -491,14 +491,14 @@ asmlinkage int sys_execve(const char *ufilename, char **uargv,
 			  struct pt_regs *pregs)
 {
 	int error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname((char __user *)ufilename);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
 
-	error = do_execve(filename,
+	error = do_execve(filename->name,
 			  (const char __user *const __user *)uargv,
 			  (const char __user *const __user *)uenvp,
 			  pregs);
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index d6b7b6154f8..2f1f65356c0 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -22,7 +22,6 @@
 #include <linux/elf.h>
 #include <linux/personality.h>
 #include <linux/binfmts.h>
-#include <linux/freezer.h>
 #include <linux/io.h>
 #include <linux/tracehook.h>
 #include <asm/ucontext.h>
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 6b5b3dfe886..23853814bd1 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -18,7 +18,6 @@
 #include <linux/errno.h>
 #include <linux/wait.h>
 #include <linux/personality.h>
-#include <linux/freezer.h>
 #include <linux/ptrace.h>
 #include <linux/unistd.h>
 #include <linux/stddef.h>
diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c
index 3bdc1ad9a34..cbbdcad8fcb 100644
--- a/arch/sh/mm/fault.c
+++ b/arch/sh/mm/fault.c
@@ -504,6 +504,7 @@ good_area:
 		}
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			/*
 			 * No need to up_read(&mm->mmap_sem) as we would
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 67f1f6f5f4e..b6b442b0d79 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -18,6 +18,7 @@ config SPARC
 	select HAVE_OPROFILE
 	select HAVE_ARCH_KGDB if !SMP || SPARC64
 	select HAVE_ARCH_TRACEHOOK
+	select SYSCTL_EXCEPTION_TRACE
 	select ARCH_WANT_OPTIONAL_GPIOLIB
 	select RTC_CLASS
 	select RTC_DRV_M48T59
@@ -32,16 +33,19 @@ config SPARC
 	select GENERIC_PCI_IOMAP
 	select HAVE_NMI_WATCHDOG if SPARC64
 	select HAVE_BPF_JIT
+	select HAVE_DEBUG_BUGVERBOSE
 	select GENERIC_SMP_IDLE_THREAD
 	select GENERIC_CMOS_UPDATE
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_STRNCPY_FROM_USER
 	select GENERIC_STRNLEN_USER
+	select MODULES_USE_ELF_RELA
 
 config SPARC32
 	def_bool !64BIT
 	select GENERIC_ATOMIC64
 	select CLZ_TAB
+	select HAVE_UID16
 
 config SPARC64
 	def_bool 64BIT
@@ -59,6 +63,7 @@ config SPARC64
 	select HAVE_DYNAMIC_FTRACE
 	select HAVE_FTRACE_MCOUNT_RECORD
 	select HAVE_SYSCALL_TRACEPOINTS
+	select HAVE_DEBUG_KMEMLEAK
 	select RTC_DRV_CMOS
 	select RTC_DRV_BQ4802
 	select RTC_DRV_SUN4V
@@ -226,25 +231,6 @@ config EARLYFB
 	help
 	  Say Y here to enable a faster early framebuffer boot console.
 
-choice
-	prompt "Kernel page size" if SPARC64
-	default SPARC64_PAGE_SIZE_8KB
-
-config SPARC64_PAGE_SIZE_8KB
-	bool "8KB"
-	help
-	  This lets you select the page size of the kernel.
-
-	  8KB and 64KB work quite well, since SPARC ELF sections
-	  provide for up to 64KB alignment.
-
-	  If you don't know what to do, choose 8KB.
-
-config SPARC64_PAGE_SIZE_64KB
-	bool "64KB"
-
-endchoice
-
 config SECCOMP
 	bool "Enable seccomp to safely compute untrusted bytecode"
 	depends on SPARC64 && PROC_FS
@@ -316,23 +302,6 @@ config GENERIC_LOCKBREAK
 	default y
 	depends on SPARC64 && SMP && PREEMPT
 
-choice
-	prompt "SPARC64 Huge TLB Page Size"
-	depends on SPARC64 && HUGETLB_PAGE
-	default HUGETLB_PAGE_SIZE_4MB
-
-config HUGETLB_PAGE_SIZE_4MB
-	bool "4MB"
-
-config HUGETLB_PAGE_SIZE_512K
-	bool "512K"
-
-config HUGETLB_PAGE_SIZE_64K
-	depends on !SPARC64_PAGE_SIZE_64KB
-	bool "64K"
-
-endchoice
-
 config NUMA
 	bool "NUMA support"
 	depends on SPARC64 && SMP
@@ -571,6 +540,7 @@ config COMPAT
 	depends on SPARC64
 	default y
 	select COMPAT_BINFMT_ELF
+	select HAVE_UID16
 	select ARCH_WANT_OLD_COMPAT_IPC
 
 config SYSVIPC_COMPAT
diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild
index 67f83e0a0d6..645a58da0e8 100644
--- a/arch/sparc/include/asm/Kbuild
+++ b/arch/sparc/include/asm/Kbuild
@@ -1,24 +1,11 @@
 # User exported sparc header files
-include include/asm-generic/Kbuild.asm
 
-header-y += apc.h
-header-y += asi.h
-header-y += display7seg.h
-header-y += envctrl.h
-header-y += fbio.h
-header-y += jsflash.h
-header-y += openpromio.h
-header-y += perfctr.h
-header-y += psrcompat.h
-header-y += psr.h
-header-y += pstate.h
-header-y += traps.h
-header-y += uctx.h
-header-y += utrap.h
-header-y += watchdog.h
 
+generic-y += clkdev.h
 generic-y += div64.h
+generic-y += exec.h
 generic-y += local64.h
 generic-y += irq_regs.h
 generic-y += local.h
+generic-y += module.h
 generic-y += word-at-a-time.h
diff --git a/arch/sparc/include/asm/exec.h b/arch/sparc/include/asm/exec.h
deleted file mode 100644
index 2e085881e0d..00000000000
--- a/arch/sparc/include/asm/exec.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __SPARC_EXEC_H
-#define __SPARC_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* __SPARC_EXEC_H */
diff --git a/arch/sparc/include/asm/fbio.h b/arch/sparc/include/asm/fbio.h
index 0a21da87f7d..1d9afe277e9 100644
--- a/arch/sparc/include/asm/fbio.h
+++ b/arch/sparc/include/asm/fbio.h
@@ -1,225 +1,10 @@
 #ifndef __LINUX_FBIO_H
 #define __LINUX_FBIO_H
 
-#include <linux/compiler.h>
-#include <linux/types.h>
+#include <uapi/asm/fbio.h>
 
-/* Constants used for fbio SunOS compatibility */
-/* (C) 1996 Miguel de Icaza */
-
-/* Frame buffer types */
-#define FBTYPE_NOTYPE           -1
-#define FBTYPE_SUN1BW           0   /* mono */
-#define FBTYPE_SUN1COLOR        1 
-#define FBTYPE_SUN2BW           2 
-#define FBTYPE_SUN2COLOR        3 
-#define FBTYPE_SUN2GP           4 
-#define FBTYPE_SUN5COLOR        5 
-#define FBTYPE_SUN3COLOR        6 
-#define FBTYPE_MEMCOLOR         7 
-#define FBTYPE_SUN4COLOR        8 
- 
-#define FBTYPE_NOTSUN1          9 
-#define FBTYPE_NOTSUN2          10
-#define FBTYPE_NOTSUN3          11
- 
-#define FBTYPE_SUNFAST_COLOR    12  /* cg6 */
-#define FBTYPE_SUNROP_COLOR     13
-#define FBTYPE_SUNFB_VIDEO      14
-#define FBTYPE_SUNGIFB          15
-#define FBTYPE_SUNGPLAS         16
-#define FBTYPE_SUNGP3           17
-#define FBTYPE_SUNGT            18
-#define FBTYPE_SUNLEO           19      /* zx Leo card */
-#define FBTYPE_MDICOLOR         20      /* cg14 */
-#define FBTYPE_TCXCOLOR		21	/* SUNW,tcx card */
-
-#define FBTYPE_LASTPLUSONE      21	/* This is not last + 1 in fact... */
-
-/* Does not seem to be listed in the Sun file either */
-#define FBTYPE_CREATOR          22
-#define FBTYPE_PCI_IGA1682	23
-#define FBTYPE_P9100COLOR	24
-
-#define FBTYPE_PCI_GENERIC	1000
-#define FBTYPE_PCI_MACH64	1001
-
-/* fbio ioctls */
-/* Returned by FBIOGTYPE */
-struct  fbtype {
-        int     fb_type;        /* fb type, see above */
-        int     fb_height;      /* pixels */
-        int     fb_width;       /* pixels */
-        int     fb_depth;
-        int     fb_cmsize;      /* color map entries */
-        int     fb_size;        /* fb size in bytes */
-};
-#define FBIOGTYPE _IOR('F', 0, struct fbtype)
-
-struct  fbcmap {
-        int             index;          /* first element (0 origin) */
-        int             count;
-        unsigned char   __user *red;
-        unsigned char   __user *green;
-        unsigned char   __user *blue;
-};
-
-#ifdef __KERNEL__
 #define FBIOPUTCMAP_SPARC _IOW('F', 3, struct fbcmap)
 #define FBIOGETCMAP_SPARC _IOW('F', 4, struct fbcmap)
-#else
-#define FBIOPUTCMAP _IOW('F', 3, struct fbcmap)
-#define FBIOGETCMAP _IOW('F', 4, struct fbcmap)
-#endif
-
-/* # of device specific values */
-#define FB_ATTR_NDEVSPECIFIC    8
-/* # of possible emulations */
-#define FB_ATTR_NEMUTYPES       4
- 
-struct fbsattr {
-        int     flags;
-        int     emu_type;	/* -1 if none */
-        int     dev_specific[FB_ATTR_NDEVSPECIFIC];
-};
- 
-struct fbgattr {
-        int     real_type;	/* real frame buffer type */
-        int     owner;		/* unknown */
-        struct fbtype fbtype;	/* real frame buffer fbtype */
-        struct fbsattr sattr;   
-        int     emu_types[FB_ATTR_NEMUTYPES]; /* supported emulations */
-};
-#define FBIOSATTR  _IOW('F', 5, struct fbgattr) /* Unsupported: */
-#define FBIOGATTR  _IOR('F', 6, struct fbgattr)	/* supported */
-
-#define FBIOSVIDEO _IOW('F', 7, int)
-#define FBIOGVIDEO _IOR('F', 8, int)
-
-struct fbcursor {
-        short set;              /* what to set, choose from the list above */
-        short enable;           /* cursor on/off */
-        struct fbcurpos pos;    /* cursor position */
-        struct fbcurpos hot;    /* cursor hot spot */
-        struct fbcmap cmap;     /* color map info */
-        struct fbcurpos size;   /* cursor bit map size */
-        char __user *image;     /* cursor image bits */
-        char __user *mask;      /* cursor mask bits */
-};
-
-/* set/get cursor attributes/shape */
-#define FBIOSCURSOR     _IOW('F', 24, struct fbcursor)
-#define FBIOGCURSOR     _IOWR('F', 25, struct fbcursor)
- 
-/* set/get cursor position */
-#define FBIOSCURPOS     _IOW('F', 26, struct fbcurpos)
-#define FBIOGCURPOS     _IOW('F', 27, struct fbcurpos)
- 
-/* get max cursor size */
-#define FBIOGCURMAX     _IOR('F', 28, struct fbcurpos)
-
-/* wid manipulation */
-struct fb_wid_alloc {
-#define FB_WID_SHARED_8		0
-#define FB_WID_SHARED_24	1
-#define FB_WID_DBL_8		2
-#define FB_WID_DBL_24		3
-	__u32	wa_type;
-	__s32	wa_index;	/* Set on return */
-	__u32	wa_count;	
-};
-struct fb_wid_item {
-	__u32	wi_type;
-	__s32	wi_index;
-	__u32	wi_attrs;
-	__u32	wi_values[32];
-};
-struct fb_wid_list {
-	__u32	wl_flags;
-	__u32	wl_count;
-	struct fb_wid_item	*wl_list;
-};
-
-#define FBIO_WID_ALLOC	_IOWR('F', 30, struct fb_wid_alloc)
-#define FBIO_WID_FREE	_IOW('F', 31, struct fb_wid_alloc)
-#define FBIO_WID_PUT	_IOW('F', 32, struct fb_wid_list)
-#define FBIO_WID_GET	_IOWR('F', 33, struct fb_wid_list)
-
-/* Creator ioctls */
-#define FFB_IOCTL	('F'<<8)
-#define FFB_SYS_INFO		(FFB_IOCTL|80)
-#define FFB_CLUTREAD		(FFB_IOCTL|81)
-#define FFB_CLUTPOST		(FFB_IOCTL|82)
-#define FFB_SETDIAGMODE		(FFB_IOCTL|83)
-#define FFB_GETMONITORID	(FFB_IOCTL|84)
-#define FFB_GETVIDEOMODE	(FFB_IOCTL|85)
-#define FFB_SETVIDEOMODE	(FFB_IOCTL|86)
-#define FFB_SETSERVER		(FFB_IOCTL|87)
-#define FFB_SETOVCTL		(FFB_IOCTL|88)
-#define FFB_GETOVCTL		(FFB_IOCTL|89)
-#define FFB_GETSAXNUM		(FFB_IOCTL|90)
-#define FFB_FBDEBUG		(FFB_IOCTL|91)
-
-/* Cg14 ioctls */
-#define MDI_IOCTL          ('M'<<8)
-#define MDI_RESET          (MDI_IOCTL|1)
-#define MDI_GET_CFGINFO    (MDI_IOCTL|2)
-#define MDI_SET_PIXELMODE  (MDI_IOCTL|3)
-#    define MDI_32_PIX     32
-#    define MDI_16_PIX     16
-#    define MDI_8_PIX      8
-
-struct mdi_cfginfo {
-	int     mdi_ncluts;     /* Number of implemented CLUTs in this MDI */
-        int     mdi_type;       /* FBTYPE name */
-        int     mdi_height;     /* height */
-        int     mdi_width;      /* width */
-        int     mdi_size;       /* available ram */
-        int     mdi_mode;       /* 8bpp, 16bpp or 32bpp */
-        int     mdi_pixfreq;    /* pixel clock (from PROM) */
-};
-
-/* SparcLinux specific ioctl for the MDI, should be replaced for
- * the SET_XLUT/SET_CLUTn ioctls instead
- */
-#define MDI_CLEAR_XLUT       (MDI_IOCTL|9)
-
-/* leo & ffb ioctls */
-struct fb_clut_alloc {
-	__u32	clutid;	/* Set on return */
- 	__u32	flag;
- 	__u32	index;
-};
-
-struct fb_clut {
-#define FB_CLUT_WAIT	0x00000001	/* Not yet implemented */
- 	__u32	flag;
- 	__u32	clutid;
- 	__u32	offset;
- 	__u32	count;
- 	char *	red;
- 	char *	green;
- 	char *	blue;
-};
-
-struct fb_clut32 {
- 	__u32	flag;
- 	__u32	clutid;
- 	__u32	offset;
- 	__u32	count;
- 	__u32	red;
- 	__u32	green;
- 	__u32	blue;
-};
-
-#define LEO_CLUTALLOC	_IOWR('L', 53, struct fb_clut_alloc)
-#define LEO_CLUTFREE	_IOW('L', 54, struct fb_clut_alloc)
-#define LEO_CLUTREAD	_IOW('L', 55, struct fb_clut)
-#define LEO_CLUTPOST	_IOW('L', 56, struct fb_clut)
-#define LEO_SETGAMMA	_IOW('L', 68, int) /* Not yet implemented */
-#define LEO_GETGAMMA	_IOR('L', 69, int) /* Not yet implemented */
-
-#ifdef __KERNEL__
 /* Addresses on the fd of a cgsix that are mappable */
 #define CG6_FBC    0x70000000
 #define CG6_TEC    0x70001000
@@ -260,47 +45,6 @@ struct fb_clut32 {
 #define CG14_CLUT3       0x6000  /* Color Look Up Table */
 #define CG14_AUTO	 0xf000
 
-#endif /* KERNEL */
-
-/* These are exported to userland for applications to use */
-/* Mappable offsets for the cg14: control registers */
-#define MDI_DIRECT_MAP 0x10000000
-#define MDI_CTLREG_MAP 0x20000000
-#define MDI_CURSOR_MAP 0x30000000
-#define MDI_SHDW_VRT_MAP 0x40000000
-
-/* Mappable offsets for the cg14: frame buffer resolutions */
-/* 32 bits */
-#define MDI_CHUNKY_XBGR_MAP 0x50000000
-#define MDI_CHUNKY_BGR_MAP 0x60000000
-
-/* 16 bits */
-#define MDI_PLANAR_X16_MAP 0x70000000
-#define MDI_PLANAR_C16_MAP 0x80000000
-
-/* 8 bit is done as CG3 MMAP offset */
-/* 32 bits, planar */
-#define MDI_PLANAR_X32_MAP 0x90000000
-#define MDI_PLANAR_B32_MAP 0xa0000000
-#define MDI_PLANAR_G32_MAP 0xb0000000
-#define MDI_PLANAR_R32_MAP 0xc0000000
-
-/* Mappable offsets on leo */
-#define LEO_SS0_MAP            0x00000000
-#define LEO_LC_SS0_USR_MAP     0x00800000
-#define LEO_LD_SS0_MAP         0x00801000
-#define LEO_LX_CURSOR_MAP      0x00802000
-#define LEO_SS1_MAP            0x00803000
-#define LEO_LC_SS1_USR_MAP     0x01003000
-#define LEO_LD_SS1_MAP         0x01004000
-#define LEO_UNK_MAP            0x01005000
-#define LEO_LX_KRN_MAP         0x01006000
-#define LEO_LC_SS0_KRN_MAP     0x01007000
-#define LEO_LC_SS1_KRN_MAP     0x01008000
-#define LEO_LD_GBL_MAP         0x01009000
-#define LEO_UNK2_MAP           0x0100a000
-
-#ifdef __KERNEL__
 struct  fbcmap32 {
 	int             index;          /* first element (0 origin) */
 	int             count;
@@ -325,6 +69,4 @@ struct fbcursor32 {
 
 #define FBIOSCURSOR32	_IOW('F', 24, struct fbcursor32)
 #define FBIOGCURSOR32	_IOW('F', 25, struct fbcursor32)
-#endif
-
 #endif /* __LINUX_FBIO_H */
diff --git a/arch/sparc/include/asm/hugetlb.h b/arch/sparc/include/asm/hugetlb.h
index 177061064ee..8c5eed6d267 100644
--- a/arch/sparc/include/asm/hugetlb.h
+++ b/arch/sparc/include/asm/hugetlb.h
@@ -10,7 +10,10 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
 pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
 			      pte_t *ptep);
 
-void hugetlb_prefault_arch_hook(struct mm_struct *mm);
+static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)
+{
+	hugetlb_setup(mm);
+}
 
 static inline int is_hugepage_only_range(struct mm_struct *mm,
 					 unsigned long addr,
@@ -82,4 +85,8 @@ static inline void arch_release_hugepage(struct page *page)
 {
 }
 
+static inline void arch_clear_hugepage_flags(struct page *page)
+{
+}
+
 #endif /* _ASM_SPARC64_HUGETLB_H */
diff --git a/arch/sparc/include/asm/ioctls.h b/arch/sparc/include/asm/ioctls.h
index 28d0c8b02cc..77413b7e3a1 100644
--- a/arch/sparc/include/asm/ioctls.h
+++ b/arch/sparc/include/asm/ioctls.h
@@ -1,123 +1,8 @@
 #ifndef _ASM_SPARC_IOCTLS_H
 #define _ASM_SPARC_IOCTLS_H
 
-#include <asm/ioctl.h>
+#include <uapi/asm/ioctls.h>
 
-/* Big T */
-#define TCGETA		_IOR('T', 1, struct termio)
-#define TCSETA		_IOW('T', 2, struct termio)
-#define TCSETAW		_IOW('T', 3, struct termio)
-#define TCSETAF		_IOW('T', 4, struct termio)
-#define TCSBRK		_IO('T', 5)
-#define TCXONC		_IO('T', 6)
-#define TCFLSH		_IO('T', 7)
-#define TCGETS		_IOR('T', 8, struct termios)
-#define TCSETS		_IOW('T', 9, struct termios)
-#define TCSETSW		_IOW('T', 10, struct termios)
-#define TCSETSF		_IOW('T', 11, struct termios)
-#define TCGETS2		_IOR('T', 12, struct termios2)
-#define TCSETS2		_IOW('T', 13, struct termios2)
-#define TCSETSW2	_IOW('T', 14, struct termios2)
-#define TCSETSF2	_IOW('T', 15, struct termios2)
-#define TIOCGDEV	_IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
-#define TIOCVHANGUP	_IO('T', 0x37)
-
-/* Note that all the ioctls that are not available in Linux have a 
- * double underscore on the front to: a) avoid some programs to
- * think we support some ioctls under Linux (autoconfiguration stuff)
- */
-/* Little t */
-#define TIOCGETD	_IOR('t', 0, int)
-#define TIOCSETD	_IOW('t', 1, int)
-#define __TIOCHPCL        _IO('t', 2) /* SunOS Specific */
-#define __TIOCMODG        _IOR('t', 3, int) /* SunOS Specific */
-#define __TIOCMODS        _IOW('t', 4, int) /* SunOS Specific */
-#define __TIOCGETP        _IOR('t', 8, struct sgttyb) /* SunOS Specific */
-#define __TIOCSETP        _IOW('t', 9, struct sgttyb) /* SunOS Specific */
-#define __TIOCSETN        _IOW('t', 10, struct sgttyb) /* SunOS Specific */
-#define TIOCEXCL	_IO('t', 13)
-#define TIOCNXCL	_IO('t', 14)
-#define __TIOCFLUSH       _IOW('t', 16, int) /* SunOS Specific */
-#define __TIOCSETC        _IOW('t', 17, struct tchars) /* SunOS Specific */
-#define __TIOCGETC        _IOR('t', 18, struct tchars) /* SunOS Specific */
-#define __TIOCTCNTL       _IOW('t', 32, int) /* SunOS Specific */
-#define __TIOCSIGNAL      _IOW('t', 33, int) /* SunOS Specific */
-#define __TIOCSETX        _IOW('t', 34, int) /* SunOS Specific */
-#define __TIOCGETX        _IOR('t', 35, int) /* SunOS Specific */
-#define TIOCCONS	_IO('t', 36)
-#define TIOCGSOFTCAR	_IOR('t', 100, int)
-#define TIOCSSOFTCAR	_IOW('t', 101, int)
-#define __TIOCUCNTL       _IOW('t', 102, int) /* SunOS Specific */
-#define TIOCSWINSZ	_IOW('t', 103, struct winsize)
-#define TIOCGWINSZ	_IOR('t', 104, struct winsize)
-#define __TIOCREMOTE      _IOW('t', 105, int) /* SunOS Specific */
-#define TIOCMGET	_IOR('t', 106, int)
-#define TIOCMBIC	_IOW('t', 107, int)
-#define TIOCMBIS	_IOW('t', 108, int)
-#define TIOCMSET	_IOW('t', 109, int)
-#define TIOCSTART       _IO('t', 110)
-#define TIOCSTOP        _IO('t', 111)
-#define TIOCPKT		_IOW('t', 112, int)
-#define TIOCNOTTY	_IO('t', 113)
-#define TIOCSTI		_IOW('t', 114, char)
-#define TIOCOUTQ	_IOR('t', 115, int)
-#define __TIOCGLTC        _IOR('t', 116, struct ltchars) /* SunOS Specific */
-#define __TIOCSLTC        _IOW('t', 117, struct ltchars) /* SunOS Specific */
-/* 118 is the non-posix setpgrp tty ioctl */
-/* 119 is the non-posix getpgrp tty ioctl */
-#define __TIOCCDTR        _IO('t', 120) /* SunOS Specific */
-#define __TIOCSDTR        _IO('t', 121) /* SunOS Specific */
-#define TIOCCBRK        _IO('t', 122)
-#define TIOCSBRK        _IO('t', 123)
-#define __TIOCLGET        _IOW('t', 124, int) /* SunOS Specific */
-#define __TIOCLSET        _IOW('t', 125, int) /* SunOS Specific */
-#define __TIOCLBIC        _IOW('t', 126, int) /* SunOS Specific */
-#define __TIOCLBIS        _IOW('t', 127, int) /* SunOS Specific */
-#define __TIOCISPACE      _IOR('t', 128, int) /* SunOS Specific */
-#define __TIOCISIZE       _IOR('t', 129, int) /* SunOS Specific */
-#define TIOCSPGRP	_IOW('t', 130, int)
-#define TIOCGPGRP	_IOR('t', 131, int)
-#define TIOCSCTTY	_IO('t', 132)
-#define TIOCGSID	_IOR('t', 133, int)
-/* Get minor device of a pty master's FD -- Solaris equiv is ISPTM */
-#define TIOCGPTN	_IOR('t', 134, unsigned int) /* Get Pty Number */
-#define TIOCSPTLCK	_IOW('t', 135, int) /* Lock/unlock PTY */
-#define TIOCSIG		_IOW('t', 136, int) /* Generate signal on Pty slave */
-
-/* Little f */
-#define FIOCLEX		_IO('f', 1)
-#define FIONCLEX	_IO('f', 2)
-#define FIOASYNC	_IOW('f', 125, int)
-#define FIONBIO		_IOW('f', 126, int)
-#define FIONREAD	_IOR('f', 127, int)
-#define TIOCINQ		FIONREAD
-#define FIOQSIZE	_IOR('f', 128, loff_t)
-
-/* SCARY Rutgers local SunOS kernel hackery, perhaps I will support it
- * someday.  This is completely bogus, I know...
- */
-#define __TCGETSTAT       _IO('T', 200) /* Rutgers specific */
-#define __TCSETSTAT       _IO('T', 201) /* Rutgers specific */
-
-/* Linux specific, no SunOS equivalent. */
-#define TIOCLINUX	0x541C
-#define TIOCGSERIAL	0x541E
-#define TIOCSSERIAL	0x541F
-#define TCSBRKP		0x5425
-#define TIOCSERCONFIG	0x5453
-#define TIOCSERGWILD	0x5454
-#define TIOCSERSWILD	0x5455
-#define TIOCGLCKTRMIOS	0x5456
-#define TIOCSLCKTRMIOS	0x5457
-#define TIOCSERGSTRUCT	0x5458 /* For debugging only */
-#define TIOCSERGETLSR   0x5459 /* Get line status register */
-#define TIOCSERGETMULTI 0x545A /* Get multiport config  */
-#define TIOCSERSETMULTI 0x545B /* Set multiport config */
-#define TIOCMIWAIT	0x545C /* Wait for change on serial input line(s) */
-#define TIOCGICOUNT	0x545D /* Read serial port inline interrupt counts */
-
-/* Kernel definitions */
-#ifdef __KERNEL__
 #define TIOCGETC __TIOCGETC
 #define TIOCGETP __TIOCGETP
 #define TIOCGLTC __TIOCGLTC
@@ -125,16 +10,4 @@
 #define TIOCSETP __TIOCSETP
 #define TIOCSETN __TIOCSETN
 #define TIOCSETC __TIOCSETC
-#endif
-
-/* Used for packet mode */
-#define TIOCPKT_DATA		 0
-#define TIOCPKT_FLUSHREAD	 1
-#define TIOCPKT_FLUSHWRITE	 2
-#define TIOCPKT_STOP		 4
-#define TIOCPKT_START		 8
-#define TIOCPKT_NOSTOP		16
-#define TIOCPKT_DOSTOP		32
-#define TIOCPKT_IOCTL		64
-
 #endif /* !(_ASM_SPARC_IOCTLS_H) */
diff --git a/arch/sparc/include/asm/mman.h b/arch/sparc/include/asm/mman.h
index c3029ad6619..59bb5938d85 100644
--- a/arch/sparc/include/asm/mman.h
+++ b/arch/sparc/include/asm/mman.h
@@ -1,33 +1,10 @@
 #ifndef __SPARC_MMAN_H__
 #define __SPARC_MMAN_H__
 
-#include <asm-generic/mman-common.h>
+#include <uapi/asm/mman.h>
 
-/* SunOS'ified... */
-
-#define MAP_RENAME      MAP_ANONYMOUS   /* In SunOS terminology */
-#define MAP_NORESERVE   0x40            /* don't reserve swap pages */
-#define MAP_INHERIT     0x80            /* SunOS doesn't do this, but... */
-#define MAP_LOCKED      0x100           /* lock the mapping */
-#define _MAP_NEW        0x80000000      /* Binary compatibility is fun... */
-
-#define MAP_GROWSDOWN	0x0200		/* stack-like segment */
-#define MAP_DENYWRITE	0x0800		/* ETXTBSY */
-#define MAP_EXECUTABLE	0x1000		/* mark it as an executable */
-
-#define MCL_CURRENT     0x2000          /* lock all currently mapped pages */
-#define MCL_FUTURE      0x4000          /* lock all additions to address space */
-
-#define MAP_POPULATE	0x8000		/* populate (prefault) pagetables */
-#define MAP_NONBLOCK	0x10000		/* do not block on IO */
-#define MAP_STACK	0x20000		/* give out an address that is best suited for process/thread stacks */
-#define MAP_HUGETLB	0x40000		/* create a huge page mapping */
-
-#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 #define arch_mmap_check(addr,len,flags)	sparc_mmap_check(addr,len)
 int sparc_mmap_check(unsigned long addr, unsigned long len);
 #endif
-#endif
-
 #endif /* __SPARC_MMAN_H__ */
diff --git a/arch/sparc/include/asm/mmu_64.h b/arch/sparc/include/asm/mmu_64.h
index 9067dc50053..76092c4dd27 100644
--- a/arch/sparc/include/asm/mmu_64.h
+++ b/arch/sparc/include/asm/mmu_64.h
@@ -30,22 +30,8 @@
 #define CTX_PGSZ_MASK		((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \
 				 (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT))
 
-#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
 #define CTX_PGSZ_BASE	CTX_PGSZ_8KB
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
-#define CTX_PGSZ_BASE	CTX_PGSZ_64KB
-#else
-#error No page size specified in kernel configuration
-#endif
-
-#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
-#define CTX_PGSZ_HUGE		CTX_PGSZ_4MB
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
-#define CTX_PGSZ_HUGE		CTX_PGSZ_512KB
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
-#define CTX_PGSZ_HUGE		CTX_PGSZ_64KB
-#endif
-
+#define CTX_PGSZ_HUGE	CTX_PGSZ_4MB
 #define CTX_PGSZ_KERN	CTX_PGSZ_4MB
 
 /* Thus, when running on UltraSPARC-III+ and later, we use the following
@@ -96,7 +82,7 @@ struct tsb_config {
 
 #define MM_TSB_BASE	0
 
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 #define MM_TSB_HUGE	1
 #define MM_NUM_TSBS	2
 #else
@@ -107,6 +93,7 @@ typedef struct {
 	spinlock_t		lock;
 	unsigned long		sparc64_ctx_val;
 	unsigned long		huge_pte_count;
+	struct page		*pgtable_page;
 	struct tsb_config	tsb_block[MM_NUM_TSBS];
 	struct hv_tsb_descr	tsb_descr[MM_NUM_TSBS];
 } mm_context_t;
diff --git a/arch/sparc/include/asm/mmu_context_64.h b/arch/sparc/include/asm/mmu_context_64.h
index a97fd085ceb..9191ca62ed9 100644
--- a/arch/sparc/include/asm/mmu_context_64.h
+++ b/arch/sparc/include/asm/mmu_context_64.h
@@ -36,7 +36,7 @@ static inline void tsb_context_switch(struct mm_struct *mm)
 {
 	__tsb_context_switch(__pa(mm->pgd),
 			     &mm->context.tsb_block[0],
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 			     (mm->context.tsb_block[1].tsb ?
 			      &mm->context.tsb_block[1] :
 			      NULL)
diff --git a/arch/sparc/include/asm/module.h b/arch/sparc/include/asm/module.h
deleted file mode 100644
index ff8e02d8033..00000000000
--- a/arch/sparc/include/asm/module.h
+++ /dev/null
@@ -1,24 +0,0 @@
-#ifndef __SPARC_MODULE_H
-#define __SPARC_MODULE_H
-struct mod_arch_specific { };
-
-/*
- * Use some preprocessor magic to define the correct symbol
- * for sparc32 and sparc64.
- * Elf_Addr becomes Elf32_Addr for sparc32 and Elf64_Addr for sparc64
- */
-#define ___ELF(a, b, c) a##b##c
-#define __ELF(a, b, c)  ___ELF(a, b, c)
-#define  _Elf(t)        __ELF(Elf, CONFIG_BITS, t)
-#define  _ELF(t)        __ELF(ELF, CONFIG_BITS, t)
-
-#define Elf_Shdr     _Elf(_Shdr)
-#define Elf_Sym      _Elf(_Sym)
-#define Elf_Ehdr     _Elf(_Ehdr)
-#define Elf_Rela     _Elf(_Rela)
-#define Elf_Addr     _Elf(_Addr)
-
-#define ELF_R_SYM    _ELF(_R_SYM)
-#define ELF_R_TYPE   _ELF(_R_TYPE)
-
-#endif /* __SPARC_MODULE_H */
diff --git a/arch/sparc/include/asm/page_64.h b/arch/sparc/include/asm/page_64.h
index f0d09b40103..4b39f74d6ca 100644
--- a/arch/sparc/include/asm/page_64.h
+++ b/arch/sparc/include/asm/page_64.h
@@ -3,13 +3,7 @@
 
 #include <linux/const.h>
 
-#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
 #define PAGE_SHIFT   13
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
-#define PAGE_SHIFT   16
-#else
-#error No page size specified in kernel configuration
-#endif
 
 #define PAGE_SIZE    (_AC(1,UL) << PAGE_SHIFT)
 #define PAGE_MASK    (~(PAGE_SIZE-1))
@@ -21,15 +15,9 @@
 #define DCACHE_ALIASING_POSSIBLE
 #endif
 
-#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
 #define HPAGE_SHIFT		22
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
-#define HPAGE_SHIFT		19
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
-#define HPAGE_SHIFT		16
-#endif
 
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 #define HPAGE_SIZE		(_AC(1,UL) << HPAGE_SHIFT)
 #define HPAGE_MASK		(~(HPAGE_SIZE - 1UL))
 #define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
@@ -38,6 +26,11 @@
 
 #ifndef __ASSEMBLY__
 
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
+struct mm_struct;
+extern void hugetlb_setup(struct mm_struct *mm);
+#endif
+
 #define WANT_PAGE_VIRTUAL
 
 extern void _clear_page(void *page);
@@ -98,7 +91,7 @@ typedef unsigned long pgprot_t;
 
 #endif /* (STRICT_MM_TYPECHECKS) */
 
-typedef struct page *pgtable_t;
+typedef pte_t *pgtable_t;
 
 #define TASK_UNMAPPED_BASE	(test_thread_flag(TIF_32BIT) ? \
 				 (_AC(0x0000000070000000,UL)) : \
diff --git a/arch/sparc/include/asm/pgalloc_64.h b/arch/sparc/include/asm/pgalloc_64.h
index 40b2d7a7023..bcfe063bce2 100644
--- a/arch/sparc/include/asm/pgalloc_64.h
+++ b/arch/sparc/include/asm/pgalloc_64.h
@@ -38,51 +38,20 @@ static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
 	kmem_cache_free(pgtable_cache, pmd);
 }
 
-static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
-					  unsigned long address)
-{
-	return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
-}
-
-static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
-					unsigned long address)
-{
-	struct page *page;
-	pte_t *pte;
-
-	pte = pte_alloc_one_kernel(mm, address);
-	if (!pte)
-		return NULL;
-	page = virt_to_page(pte);
-	pgtable_page_ctor(page);
-	return page;
-}
-
-static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
-{
-	free_page((unsigned long)pte);
-}
-
-static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
-{
-	pgtable_page_dtor(ptepage);
-	__free_page(ptepage);
-}
+extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
+				   unsigned long address);
+extern pgtable_t pte_alloc_one(struct mm_struct *mm,
+			       unsigned long address);
+extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte);
+extern void pte_free(struct mm_struct *mm, pgtable_t ptepage);
 
-#define pmd_populate_kernel(MM, PMD, PTE)	pmd_set(PMD, PTE)
-#define pmd_populate(MM,PMD,PTE_PAGE)		\
-	pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE))
-#define pmd_pgtable(pmd) pmd_page(pmd)
+#define pmd_populate_kernel(MM, PMD, PTE)	pmd_set(MM, PMD, PTE)
+#define pmd_populate(MM, PMD, PTE)		pmd_set(MM, PMD, PTE)
+#define pmd_pgtable(PMD)			((pte_t *)__pmd_page(PMD))
 
 #define check_pgt_cache()	do { } while (0)
 
-static inline void pgtable_free(void *table, bool is_page)
-{
-	if (is_page)
-		free_page((unsigned long)table);
-	else
-		kmem_cache_free(pgtable_cache, table);
-}
+extern void pgtable_free(void *table, bool is_page);
 
 #ifdef CONFIG_SMP
 
@@ -113,11 +82,10 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, bool is
 }
 #endif /* !CONFIG_SMP */
 
-static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage,
+static inline void __pte_free_tlb(struct mmu_gather *tlb, pte_t *pte,
 				  unsigned long address)
 {
-	pgtable_page_dtor(ptepage);
-	pgtable_free_tlb(tlb, page_address(ptepage), true);
+	pgtable_free_tlb(tlb, pte, true);
 }
 
 #define __pmd_free_tlb(tlb, pmd, addr)		      \
diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h
index 61210db139f..95515f1e7ce 100644
--- a/arch/sparc/include/asm/pgtable_64.h
+++ b/arch/sparc/include/asm/pgtable_64.h
@@ -45,40 +45,59 @@
 
 #define vmemmap			((struct page *)VMEMMAP_BASE)
 
-/* XXX All of this needs to be rethought so we can take advantage
- * XXX cheetah's full 64-bit virtual address space, ie. no more hole
- * XXX in the middle like on spitfire. -DaveM
- */
-/*
- * Given a virtual address, the lowest PAGE_SHIFT bits determine offset
- * into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
- * in the proper pagetable (the -3 is from the 8 byte ptes, and each page
- * table is a single page long). The next higher PMD_BITS determine pmd#
- * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2)
- * since the pmd entries are 4 bytes, and each pmd page is a single page
- * long). Finally, the higher few bits determine pgde#.
- */
-
 /* PMD_SHIFT determines the size of the area a second-level page
  * table can map
  */
-#define PMD_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT-3))
+#define PMD_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT-4))
 #define PMD_SIZE	(_AC(1,UL) << PMD_SHIFT)
 #define PMD_MASK	(~(PMD_SIZE-1))
 #define PMD_BITS	(PAGE_SHIFT - 2)
 
 /* PGDIR_SHIFT determines what a third-level page table entry can map */
-#define PGDIR_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
+#define PGDIR_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT-4) + PMD_BITS)
 #define PGDIR_SIZE	(_AC(1,UL) << PGDIR_SHIFT)
 #define PGDIR_MASK	(~(PGDIR_SIZE-1))
 #define PGDIR_BITS	(PAGE_SHIFT - 2)
 
+#if (PGDIR_SHIFT + PGDIR_BITS) != 44
+#error Page table parameters do not cover virtual address space properly.
+#endif
+
+#if (PMD_SHIFT != HPAGE_SHIFT)
+#error PMD_SHIFT must equal HPAGE_SHIFT for transparent huge pages.
+#endif
+
+/* PMDs point to PTE tables which are 4K aligned.  */
+#define PMD_PADDR	_AC(0xfffffffe,UL)
+#define PMD_PADDR_SHIFT	_AC(11,UL)
+
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+#define PMD_ISHUGE	_AC(0x00000001,UL)
+
+/* This is the PMD layout when PMD_ISHUGE is set.  With 4MB huge
+ * pages, this frees up a bunch of bits in the layout that we can
+ * use for the protection settings and software metadata.
+ */
+#define PMD_HUGE_PADDR		_AC(0xfffff800,UL)
+#define PMD_HUGE_PROTBITS	_AC(0x000007ff,UL)
+#define PMD_HUGE_PRESENT	_AC(0x00000400,UL)
+#define PMD_HUGE_WRITE		_AC(0x00000200,UL)
+#define PMD_HUGE_DIRTY		_AC(0x00000100,UL)
+#define PMD_HUGE_ACCESSED	_AC(0x00000080,UL)
+#define PMD_HUGE_EXEC		_AC(0x00000040,UL)
+#define PMD_HUGE_SPLITTING	_AC(0x00000020,UL)
+#endif
+
+/* PGDs point to PMD tables which are 8K aligned.  */
+#define PGD_PADDR	_AC(0xfffffffc,UL)
+#define PGD_PADDR_SHIFT	_AC(11,UL)
+
 #ifndef __ASSEMBLY__
 
 #include <linux/sched.h>
 
 /* Entries per page directory level. */
-#define PTRS_PER_PTE	(1UL << (PAGE_SHIFT-3))
+#define PTRS_PER_PTE	(1UL << (PAGE_SHIFT-4))
 #define PTRS_PER_PMD	(1UL << PMD_BITS)
 #define PTRS_PER_PGD	(1UL << PGDIR_BITS)
 
@@ -160,26 +179,11 @@
 #define _PAGE_SZ8K_4V	  _AC(0x0000000000000000,UL) /* 8K Page              */
 #define _PAGE_SZALL_4V	  _AC(0x0000000000000007,UL) /* All pgsz bits        */
 
-#if PAGE_SHIFT == 13
 #define _PAGE_SZBITS_4U	_PAGE_SZ8K_4U
 #define _PAGE_SZBITS_4V	_PAGE_SZ8K_4V
-#elif PAGE_SHIFT == 16
-#define _PAGE_SZBITS_4U	_PAGE_SZ64K_4U
-#define _PAGE_SZBITS_4V	_PAGE_SZ64K_4V
-#else
-#error Wrong PAGE_SHIFT specified
-#endif
 
-#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
 #define _PAGE_SZHUGE_4U	_PAGE_SZ4MB_4U
 #define _PAGE_SZHUGE_4V	_PAGE_SZ4MB_4V
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
-#define _PAGE_SZHUGE_4U	_PAGE_SZ512K_4U
-#define _PAGE_SZHUGE_4V	_PAGE_SZ512K_4V
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
-#define _PAGE_SZHUGE_4U	_PAGE_SZ64K_4U
-#define _PAGE_SZHUGE_4V	_PAGE_SZ64K_4V
-#endif
 
 /* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */
 #define __P000	__pgprot(0)
@@ -218,7 +222,6 @@ extern unsigned long _PAGE_CACHE;
 
 extern unsigned long pg_iobits;
 extern unsigned long _PAGE_ALL_SZ_BITS;
-extern unsigned long _PAGE_SZBITS;
 
 extern struct page *mem_map_zero;
 #define ZERO_PAGE(vaddr)	(mem_map_zero)
@@ -231,25 +234,25 @@ extern struct page *mem_map_zero;
 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
 {
 	unsigned long paddr = pfn << PAGE_SHIFT;
-	unsigned long sz_bits;
-
-	sz_bits = 0UL;
-	if (_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL) {
-		__asm__ __volatile__(
-		"\n661:	sethi		%%uhi(%1), %0\n"
-		"	sllx		%0, 32, %0\n"
-		"	.section	.sun4v_2insn_patch, \"ax\"\n"
-		"	.word		661b\n"
-		"	mov		%2, %0\n"
-		"	nop\n"
-		"	.previous\n"
-		: "=r" (sz_bits)
-		: "i" (_PAGE_SZBITS_4U), "i" (_PAGE_SZBITS_4V));
-	}
-	return __pte(paddr | sz_bits | pgprot_val(prot));
+
+	BUILD_BUG_ON(_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL);
+	return __pte(paddr | pgprot_val(prot));
 }
 #define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
 
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+extern pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot);
+#define mk_pmd(page, pgprot)	pfn_pmd(page_to_pfn(page), (pgprot))
+
+extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
+
+static inline pmd_t pmd_mkhuge(pmd_t pmd)
+{
+	/* Do nothing, mk_pmd() does this part.  */
+	return pmd;
+}
+#endif
+
 /* This one can be done with two shifts.  */
 static inline unsigned long pte_pfn(pte_t pte)
 {
@@ -286,6 +289,7 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
 	 * Note: We encode this into 3 sun4v 2-insn patch sequences.
 	 */
 
+	BUILD_BUG_ON(_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL);
 	__asm__ __volatile__(
 	"\n661:	sethi		%%uhi(%2), %1\n"
 	"	sethi		%%hi(%2), %0\n"
@@ -307,10 +311,10 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t prot)
 	: "=r" (mask), "=r" (tmp)
 	: "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U |
 	       _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U |
-	       _PAGE_SZBITS_4U | _PAGE_SPECIAL),
+	       _PAGE_SPECIAL),
 	  "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V |
 	       _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V |
-	       _PAGE_SZBITS_4V | _PAGE_SPECIAL));
+	       _PAGE_SPECIAL));
 
 	return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask));
 }
@@ -618,19 +622,130 @@ static inline unsigned long pte_special(pte_t pte)
 	return pte_val(pte) & _PAGE_SPECIAL;
 }
 
-#define pmd_set(pmdp, ptep)	\
-	(pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+static inline int pmd_young(pmd_t pmd)
+{
+	return pmd_val(pmd) & PMD_HUGE_ACCESSED;
+}
+
+static inline int pmd_write(pmd_t pmd)
+{
+	return pmd_val(pmd) & PMD_HUGE_WRITE;
+}
+
+static inline unsigned long pmd_pfn(pmd_t pmd)
+{
+	unsigned long val = pmd_val(pmd) & PMD_HUGE_PADDR;
+
+	return val >> (PAGE_SHIFT - PMD_PADDR_SHIFT);
+}
+
+static inline int pmd_large(pmd_t pmd)
+{
+	return (pmd_val(pmd) & (PMD_ISHUGE | PMD_HUGE_PRESENT)) ==
+		(PMD_ISHUGE | PMD_HUGE_PRESENT);
+}
+
+static inline int pmd_trans_splitting(pmd_t pmd)
+{
+	return (pmd_val(pmd) & (PMD_ISHUGE|PMD_HUGE_SPLITTING)) ==
+		(PMD_ISHUGE|PMD_HUGE_SPLITTING);
+}
+
+static inline int pmd_trans_huge(pmd_t pmd)
+{
+	return pmd_val(pmd) & PMD_ISHUGE;
+}
+
+#define has_transparent_hugepage() 1
+
+static inline pmd_t pmd_mkold(pmd_t pmd)
+{
+	pmd_val(pmd) &= ~PMD_HUGE_ACCESSED;
+	return pmd;
+}
+
+static inline pmd_t pmd_wrprotect(pmd_t pmd)
+{
+	pmd_val(pmd) &= ~PMD_HUGE_WRITE;
+	return pmd;
+}
+
+static inline pmd_t pmd_mkdirty(pmd_t pmd)
+{
+	pmd_val(pmd) |= PMD_HUGE_DIRTY;
+	return pmd;
+}
+
+static inline pmd_t pmd_mkyoung(pmd_t pmd)
+{
+	pmd_val(pmd) |= PMD_HUGE_ACCESSED;
+	return pmd;
+}
+
+static inline pmd_t pmd_mkwrite(pmd_t pmd)
+{
+	pmd_val(pmd) |= PMD_HUGE_WRITE;
+	return pmd;
+}
+
+static inline pmd_t pmd_mknotpresent(pmd_t pmd)
+{
+	pmd_val(pmd) &= ~PMD_HUGE_PRESENT;
+	return pmd;
+}
+
+static inline pmd_t pmd_mksplitting(pmd_t pmd)
+{
+	pmd_val(pmd) |= PMD_HUGE_SPLITTING;
+	return pmd;
+}
+
+extern pgprot_t pmd_pgprot(pmd_t entry);
+#endif
+
+static inline int pmd_present(pmd_t pmd)
+{
+	return pmd_val(pmd) != 0U;
+}
+
+#define pmd_none(pmd)			(!pmd_val(pmd))
+
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
+		       pmd_t *pmdp, pmd_t pmd);
+#else
+static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
+			      pmd_t *pmdp, pmd_t pmd)
+{
+	*pmdp = pmd;
+}
+#endif
+
+static inline void pmd_set(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
+{
+	unsigned long val = __pa((unsigned long) (ptep)) >> PMD_PADDR_SHIFT;
+
+	pmd_val(*pmdp) = val;
+}
+
 #define pud_set(pudp, pmdp)	\
-	(pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
-#define __pmd_page(pmd)		\
-	((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
+	(pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> PGD_PADDR_SHIFT))
+static inline unsigned long __pmd_page(pmd_t pmd)
+{
+	unsigned long paddr = (unsigned long) pmd_val(pmd);
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+	if (pmd_val(pmd) & PMD_ISHUGE)
+		paddr &= PMD_HUGE_PADDR;
+#endif
+	paddr <<= PMD_PADDR_SHIFT;
+	return ((unsigned long) __va(paddr));
+}
 #define pmd_page(pmd) 			virt_to_page((void *)__pmd_page(pmd))
 #define pud_page_vaddr(pud)		\
-	((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL)))
+	((unsigned long) __va((((unsigned long)pud_val(pud))<<PGD_PADDR_SHIFT)))
 #define pud_page(pud) 			virt_to_page((void *)pud_page_vaddr(pud))
-#define pmd_none(pmd)			(!pmd_val(pmd))
 #define pmd_bad(pmd)			(0)
-#define pmd_present(pmd)		(pmd_val(pmd) != 0U)
 #define pmd_clear(pmdp)			(pmd_val(*(pmdp)) = 0U)
 #define pud_none(pud)			(!pud_val(pud))
 #define pud_bad(pud)			(0)
@@ -664,6 +779,16 @@ static inline unsigned long pte_special(pte_t pte)
 extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
 			  pte_t *ptep, pte_t orig, int fullmm);
 
+#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
+static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
+				       unsigned long addr,
+				       pmd_t *pmdp)
+{
+	pmd_t pmd = *pmdp;
+	set_pmd_at(mm, addr, pmdp, __pmd(0U));
+	return pmd;
+}
+
 static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
 			     pte_t *ptep, pte_t pte, int fullmm)
 {
@@ -719,6 +844,16 @@ extern void mmu_info(struct seq_file *);
 
 struct vm_area_struct;
 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *);
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
+				 pmd_t *pmd);
+
+#define __HAVE_ARCH_PGTABLE_DEPOSIT
+extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
+
+#define __HAVE_ARCH_PGTABLE_WITHDRAW
+extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm);
+#endif
 
 /* Encode and de-code a swap entry */
 #define __swp_type(entry)	(((entry).val >> PAGE_SHIFT) & 0xffUL)
diff --git a/arch/sparc/include/asm/psr.h b/arch/sparc/include/asm/psr.h
index cee7ed9c927..e71eb57945e 100644
--- a/arch/sparc/include/asm/psr.h
+++ b/arch/sparc/include/asm/psr.h
@@ -7,43 +7,11 @@
  *
  * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
  */
-
 #ifndef __LINUX_SPARC_PSR_H
 #define __LINUX_SPARC_PSR_H
 
-/* The Sparc PSR fields are laid out as the following:
- *
- *  ------------------------------------------------------------------------
- *  | impl  | vers  | icc   | resv  | EC | EF | PIL  | S | PS | ET |  CWP  |
- *  | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6  | 5  |  4-0  |
- *  ------------------------------------------------------------------------
- */
-#define PSR_CWP     0x0000001f         /* current window pointer     */
-#define PSR_ET      0x00000020         /* enable traps field         */
-#define PSR_PS      0x00000040         /* previous privilege level   */
-#define PSR_S       0x00000080         /* current privilege level    */
-#define PSR_PIL     0x00000f00         /* processor interrupt level  */
-#define PSR_EF      0x00001000         /* enable floating point      */
-#define PSR_EC      0x00002000         /* enable co-processor        */
-#define PSR_SYSCALL 0x00004000         /* inside of a syscall        */
-#define PSR_LE      0x00008000         /* SuperSparcII little-endian */
-#define PSR_ICC     0x00f00000         /* integer condition codes    */
-#define PSR_C       0x00100000         /* carry bit                  */
-#define PSR_V       0x00200000         /* overflow bit               */
-#define PSR_Z       0x00400000         /* zero bit                   */
-#define PSR_N       0x00800000         /* negative bit               */
-#define PSR_VERS    0x0f000000         /* cpu-version field          */
-#define PSR_IMPL    0xf0000000         /* cpu-implementation field   */
-
-#define PSR_VERS_SHIFT		24
-#define PSR_IMPL_SHIFT		28
-#define PSR_VERS_SHIFTED_MASK	0xf
-#define PSR_IMPL_SHIFTED_MASK	0xf
-
-#define PSR_IMPL_TI		0x4
-#define PSR_IMPL_LEON		0xf
+#include <uapi/asm/psr.h>
 
-#ifdef __KERNEL__
 
 #ifndef __ASSEMBLY__
 /* Get the %psr register. */
@@ -96,6 +64,4 @@ static inline unsigned int get_fsr(void)
 
 #endif /* !(__ASSEMBLY__) */
 
-#endif /* (__KERNEL__) */
-
 #endif /* !(__LINUX_SPARC_PSR_H) */
diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h
index fd9c3f21cbf..0c6f6b06828 100644
--- a/arch/sparc/include/asm/ptrace.h
+++ b/arch/sparc/include/asm/ptrace.h
@@ -1,169 +1,11 @@
 #ifndef __SPARC_PTRACE_H
 #define __SPARC_PTRACE_H
 
-#if defined(__sparc__) && defined(__arch64__)
-/* 64 bit sparc */
-#include <asm/pstate.h>
-
-/* This struct defines the way the registers are stored on the
- * stack during a system call and basically all traps.
- */
-
-/* This magic value must have the low 9 bits clear,
- * as that is where we encode the %tt value, see below.
- */
-#define PT_REGS_MAGIC 0x57ac6c00
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-struct pt_regs {
-	unsigned long u_regs[16]; /* globals and ins */
-	unsigned long tstate;
-	unsigned long tpc;
-	unsigned long tnpc;
-	unsigned int y;
-
-	/* We encode a magic number, PT_REGS_MAGIC, along
-	 * with the %tt (trap type) register value at trap
-	 * entry time.  The magic number allows us to identify
-	 * accurately a trap stack frame in the stack
-	 * unwinder, and the %tt value allows us to test
-	 * things like "in a system call" etc. for an arbitray
-	 * process.
-	 *
-	 * The PT_REGS_MAGIC is chosen such that it can be
-	 * loaded completely using just a sethi instruction.
-	 */
-	unsigned int magic;
-};
-
-struct pt_regs32 {
-	unsigned int psr;
-	unsigned int pc;
-	unsigned int npc;
-	unsigned int y;
-	unsigned int u_regs[16]; /* globals and ins */
-};
-
-/* A V9 register window */
-struct reg_window {
-	unsigned long locals[8];
-	unsigned long ins[8];
-};
-
-/* A 32-bit register window. */
-struct reg_window32 {
-	unsigned int locals[8];
-	unsigned int ins[8];
-};
-
-/* A V9 Sparc stack frame */
-struct sparc_stackf {
-	unsigned long locals[8];
-        unsigned long ins[6];
-	struct sparc_stackf *fp;
-	unsigned long callers_pc;
-	char *structptr;
-	unsigned long xargs[6];
-	unsigned long xxargs[1];
-};
-
-/* A 32-bit Sparc stack frame */
-struct sparc_stackf32 {
-	unsigned int locals[8];
-        unsigned int ins[6];
-	unsigned int fp;
-	unsigned int callers_pc;
-	unsigned int structptr;
-	unsigned int xargs[6];
-	unsigned int xxargs[1];
-};
-
-struct sparc_trapf {
-	unsigned long locals[8];
-	unsigned long ins[8];
-	unsigned long _unused;
-	struct pt_regs *regs;
-};
-#endif /* (!__ASSEMBLY__) */
-#else
-/* 32 bit sparc */
-
-#include <asm/psr.h>
-
-/* This struct defines the way the registers are stored on the
- * stack during a system call and basically all traps.
- */
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-struct pt_regs {
-	unsigned long psr;
-	unsigned long pc;
-	unsigned long npc;
-	unsigned long y;
-	unsigned long u_regs[16]; /* globals and ins */
-};
-
-/* A 32-bit register window. */
-struct reg_window32 {
-	unsigned long locals[8];
-	unsigned long ins[8];
-};
-
-/* A Sparc stack frame */
-struct sparc_stackf {
-	unsigned long locals[8];
-        unsigned long ins[6];
-	struct sparc_stackf *fp;
-	unsigned long callers_pc;
-	char *structptr;
-	unsigned long xargs[6];
-	unsigned long xxargs[1];
-};
-#endif /* (!__ASSEMBLY__) */
-
-#endif /* (defined(__sparc__) && defined(__arch64__))*/
-
-#ifndef __ASSEMBLY__
-
-#define TRACEREG_SZ	sizeof(struct pt_regs)
-#define STACKFRAME_SZ	sizeof(struct sparc_stackf)
-
-#define TRACEREG32_SZ	sizeof(struct pt_regs32)
-#define STACKFRAME32_SZ	sizeof(struct sparc_stackf32)
-
-#endif /* (!__ASSEMBLY__) */
-
-#define UREG_G0        0
-#define UREG_G1        1
-#define UREG_G2        2
-#define UREG_G3        3
-#define UREG_G4        4
-#define UREG_G5        5
-#define UREG_G6        6
-#define UREG_G7        7
-#define UREG_I0        8
-#define UREG_I1        9
-#define UREG_I2        10
-#define UREG_I3        11
-#define UREG_I4        12
-#define UREG_I5        13
-#define UREG_I6        14
-#define UREG_I7        15
-#define UREG_FP        UREG_I6
-#define UREG_RETPC     UREG_I7
+#include <uapi/asm/ptrace.h>
 
 #if defined(__sparc__) && defined(__arch64__)
-/* 64 bit sparc */
-
 #ifndef __ASSEMBLY__
 
-#ifdef __KERNEL__
-
 #include <linux/threads.h>
 #include <asm/switch_to.h>
 
@@ -223,24 +65,10 @@ extern unsigned long profile_pc(struct pt_regs *);
 #else
 #define profile_pc(regs) instruction_pointer(regs)
 #endif
-#endif /* (__KERNEL__) */
-
 #else /* __ASSEMBLY__ */
-/* For assembly code. */
-#define TRACEREG_SZ		0xa0
-#define STACKFRAME_SZ		0xc0
-
-#define TRACEREG32_SZ		0x50
-#define STACKFRAME32_SZ		0x60
 #endif /* __ASSEMBLY__ */
-
 #else /* (defined(__sparc__) && defined(__arch64__)) */
-
-/* 32 bit sparc */
-
 #ifndef __ASSEMBLY__
-
-#ifdef __KERNEL__
 #include <asm/switch_to.h>
 
 static inline bool pt_regs_is_syscall(struct pt_regs *regs)
@@ -265,158 +93,10 @@ static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
 #define instruction_pointer(regs) ((regs)->pc)
 #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
 unsigned long profile_pc(struct pt_regs *);
-#endif /* (__KERNEL__) */
-
 #else /* (!__ASSEMBLY__) */
-/* For assembly code. */
-#define TRACEREG_SZ       0x50
-#define STACKFRAME_SZ     0x60
 #endif /* (!__ASSEMBLY__) */
-
 #endif /* (defined(__sparc__) && defined(__arch64__)) */
-
-#ifdef __KERNEL__
 #define STACK_BIAS		2047
-#endif
-
-/* These are for pt_regs. */
-#define PT_V9_G0     0x00
-#define PT_V9_G1     0x08
-#define PT_V9_G2     0x10
-#define PT_V9_G3     0x18
-#define PT_V9_G4     0x20
-#define PT_V9_G5     0x28
-#define PT_V9_G6     0x30
-#define PT_V9_G7     0x38
-#define PT_V9_I0     0x40
-#define PT_V9_I1     0x48
-#define PT_V9_I2     0x50
-#define PT_V9_I3     0x58
-#define PT_V9_I4     0x60
-#define PT_V9_I5     0x68
-#define PT_V9_I6     0x70
-#define PT_V9_FP     PT_V9_I6
-#define PT_V9_I7     0x78
-#define PT_V9_TSTATE 0x80
-#define PT_V9_TPC    0x88
-#define PT_V9_TNPC   0x90
-#define PT_V9_Y      0x98
-#define PT_V9_MAGIC  0x9c
-#define PT_TSTATE	PT_V9_TSTATE
-#define PT_TPC		PT_V9_TPC
-#define PT_TNPC		PT_V9_TNPC
-
-/* These for pt_regs32. */
-#define PT_PSR    0x0
-#define PT_PC     0x4
-#define PT_NPC    0x8
-#define PT_Y      0xc
-#define PT_G0     0x10
-#define PT_WIM    PT_G0
-#define PT_G1     0x14
-#define PT_G2     0x18
-#define PT_G3     0x1c
-#define PT_G4     0x20
-#define PT_G5     0x24
-#define PT_G6     0x28
-#define PT_G7     0x2c
-#define PT_I0     0x30
-#define PT_I1     0x34
-#define PT_I2     0x38
-#define PT_I3     0x3c
-#define PT_I4     0x40
-#define PT_I5     0x44
-#define PT_I6     0x48
-#define PT_FP     PT_I6
-#define PT_I7     0x4c
-
-/* Reg_window offsets */
-#define RW_V9_L0     0x00
-#define RW_V9_L1     0x08
-#define RW_V9_L2     0x10
-#define RW_V9_L3     0x18
-#define RW_V9_L4     0x20
-#define RW_V9_L5     0x28
-#define RW_V9_L6     0x30
-#define RW_V9_L7     0x38
-#define RW_V9_I0     0x40
-#define RW_V9_I1     0x48
-#define RW_V9_I2     0x50
-#define RW_V9_I3     0x58
-#define RW_V9_I4     0x60
-#define RW_V9_I5     0x68
-#define RW_V9_I6     0x70
-#define RW_V9_I7     0x78
-
-#define RW_L0     0x00
-#define RW_L1     0x04
-#define RW_L2     0x08
-#define RW_L3     0x0c
-#define RW_L4     0x10
-#define RW_L5     0x14
-#define RW_L6     0x18
-#define RW_L7     0x1c
-#define RW_I0     0x20
-#define RW_I1     0x24
-#define RW_I2     0x28
-#define RW_I3     0x2c
-#define RW_I4     0x30
-#define RW_I5     0x34
-#define RW_I6     0x38
-#define RW_I7     0x3c
-
-/* Stack_frame offsets */
-#define SF_V9_L0     0x00
-#define SF_V9_L1     0x08
-#define SF_V9_L2     0x10
-#define SF_V9_L3     0x18
-#define SF_V9_L4     0x20
-#define SF_V9_L5     0x28
-#define SF_V9_L6     0x30
-#define SF_V9_L7     0x38
-#define SF_V9_I0     0x40
-#define SF_V9_I1     0x48
-#define SF_V9_I2     0x50
-#define SF_V9_I3     0x58
-#define SF_V9_I4     0x60
-#define SF_V9_I5     0x68
-#define SF_V9_FP     0x70
-#define SF_V9_PC     0x78
-#define SF_V9_RETP   0x80
-#define SF_V9_XARG0  0x88
-#define SF_V9_XARG1  0x90
-#define SF_V9_XARG2  0x98
-#define SF_V9_XARG3  0xa0
-#define SF_V9_XARG4  0xa8
-#define SF_V9_XARG5  0xb0
-#define SF_V9_XXARG  0xb8
-
-#define SF_L0     0x00
-#define SF_L1     0x04
-#define SF_L2     0x08
-#define SF_L3     0x0c
-#define SF_L4     0x10
-#define SF_L5     0x14
-#define SF_L6     0x18
-#define SF_L7     0x1c
-#define SF_I0     0x20
-#define SF_I1     0x24
-#define SF_I2     0x28
-#define SF_I3     0x2c
-#define SF_I4     0x30
-#define SF_I5     0x34
-#define SF_FP     0x38
-#define SF_PC     0x3c
-#define SF_RETP   0x40
-#define SF_XARG0  0x44
-#define SF_XARG1  0x48
-#define SF_XARG2  0x4c
-#define SF_XARG3  0x50
-#define SF_XARG4  0x54
-#define SF_XARG5  0x58
-#define SF_XXARG  0x5c
-
-#ifdef __KERNEL__
 
 /* global_reg_snapshot offsets */
 #define GR_SNAP_TSTATE	0x00
@@ -428,29 +108,4 @@ unsigned long profile_pc(struct pt_regs *);
 #define GR_SNAP_THREAD	0x30
 #define GR_SNAP_PAD1	0x38
 
-#endif  /*  __KERNEL__  */
-
-/* Stuff for the ptrace system call */
-#define PTRACE_SPARC_DETACH       11
-#define PTRACE_GETREGS            12
-#define PTRACE_SETREGS            13
-#define PTRACE_GETFPREGS          14
-#define PTRACE_SETFPREGS          15
-#define PTRACE_READDATA           16
-#define PTRACE_WRITEDATA          17
-#define PTRACE_READTEXT           18
-#define PTRACE_WRITETEXT          19
-#define PTRACE_GETFPAREGS         20
-#define PTRACE_SETFPAREGS         21
-
-/* There are for debugging 64-bit processes, either from a 32 or 64 bit
- * parent.  Thus their complements are for debugging 32-bit processes only.
- */
-
-#define PTRACE_GETREGS64	  22
-#define PTRACE_SETREGS64	  23
-/* PTRACE_SYSCALL is 24 */
-#define PTRACE_GETFPREGS64	  25
-#define PTRACE_SETFPREGS64	  26
-
 #endif /* !(__SPARC_PTRACE_H) */
diff --git a/arch/sparc/include/asm/setup.h b/arch/sparc/include/asm/setup.h
index 8a83699a550..5e35e051731 100644
--- a/arch/sparc/include/asm/setup.h
+++ b/arch/sparc/include/asm/setup.h
@@ -1,17 +1,11 @@
 /*
  *	Just a place holder. 
  */
-
 #ifndef _SPARC_SETUP_H
 #define _SPARC_SETUP_H
 
-#if defined(__sparc__) && defined(__arch64__)
-# define COMMAND_LINE_SIZE 2048
-#else
-# define COMMAND_LINE_SIZE 256
-#endif
+#include <uapi/asm/setup.h>
 
-#ifdef __KERNEL__
 
 extern char reboot_command[];
 
@@ -34,6 +28,4 @@ extern void sun_do_break(void);
 extern int stop_a_enabled;
 extern int scons_pwroff;
 
-#endif /* __KERNEL__ */
-
 #endif /* _SPARC_SETUP_H */
diff --git a/arch/sparc/include/asm/sigcontext.h b/arch/sparc/include/asm/sigcontext.h
index 69914d74813..fc2df1e892c 100644
--- a/arch/sparc/include/asm/sigcontext.h
+++ b/arch/sparc/include/asm/sigcontext.h
@@ -1,8 +1,8 @@
 #ifndef __SPARC_SIGCONTEXT_H
 #define __SPARC_SIGCONTEXT_H
 
-#ifdef __KERNEL__
 #include <asm/ptrace.h>
+#include <uapi/asm/sigcontext.h>
 
 #ifndef __ASSEMBLY__
 
@@ -105,6 +105,4 @@ typedef struct {
 
 #endif /* !(__ASSEMBLY__) */
 
-#endif /* (__KERNEL__) */
-
 #endif /* !(__SPARC_SIGCONTEXT_H) */
diff --git a/arch/sparc/include/asm/siginfo.h b/arch/sparc/include/asm/siginfo.h
index dbc182c438b..48c34c19f81 100644
--- a/arch/sparc/include/asm/siginfo.h
+++ b/arch/sparc/include/asm/siginfo.h
@@ -1,19 +1,8 @@
 #ifndef __SPARC_SIGINFO_H
 #define __SPARC_SIGINFO_H
 
-#if defined(__sparc__) && defined(__arch64__)
+#include <uapi/asm/siginfo.h>
 
-#define __ARCH_SI_PREAMBLE_SIZE	(4 * sizeof(int))
-#define __ARCH_SI_BAND_T int
-
-#endif /* defined(__sparc__) && defined(__arch64__) */
-
-
-#define __ARCH_SI_TRAPNO
-
-#include <asm-generic/siginfo.h>
-
-#ifdef __KERNEL__
 
 #ifdef CONFIG_COMPAT
 
@@ -21,14 +10,4 @@ struct compat_siginfo;
 
 #endif /* CONFIG_COMPAT */
 
-#endif /* __KERNEL__ */
-
-#define SI_NOINFO	32767		/* no information in siginfo_t */
-
-/*
- * SIGEMT si_codes
- */
-#define EMT_TAGOVF	(__SI_FAULT|1)	/* tag overflow */
-#define NSIGEMT		1
-
 #endif /* !(__SPARC_SIGINFO_H) */
diff --git a/arch/sparc/include/asm/signal.h b/arch/sparc/include/asm/signal.h
index aa42fe30d5b..d243c2ae02d 100644
--- a/arch/sparc/include/asm/signal.h
+++ b/arch/sparc/include/asm/signal.h
@@ -1,168 +1,13 @@
 #ifndef __SPARC_SIGNAL_H
 #define __SPARC_SIGNAL_H
 
-#include <asm/sigcontext.h>
-#include <linux/compiler.h>
-
-#ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 #include <linux/personality.h>
 #include <linux/types.h>
 #endif
-#endif
-
-/* On the Sparc the signal handlers get passed a 'sub-signal' code
- * for certain signal types, which we document here.
- */
-#define SIGHUP		 1
-#define SIGINT		 2
-#define SIGQUIT		 3
-#define SIGILL		 4
-#define    SUBSIG_STACK       0
-#define    SUBSIG_ILLINST     2
-#define    SUBSIG_PRIVINST    3
-#define    SUBSIG_BADTRAP(t)  (0x80 + (t))
-
-#define SIGTRAP		 5
-#define SIGABRT		 6
-#define SIGIOT		 6
-
-#define SIGEMT           7
-#define    SUBSIG_TAG    10
-
-#define SIGFPE		 8
-#define    SUBSIG_FPDISABLED     0x400
-#define    SUBSIG_FPERROR        0x404
-#define    SUBSIG_FPINTOVFL      0x001
-#define    SUBSIG_FPSTSIG        0x002
-#define    SUBSIG_IDIVZERO       0x014
-#define    SUBSIG_FPINEXACT      0x0c4
-#define    SUBSIG_FPDIVZERO      0x0c8
-#define    SUBSIG_FPUNFLOW       0x0cc
-#define    SUBSIG_FPOPERROR      0x0d0
-#define    SUBSIG_FPOVFLOW       0x0d4
-
-#define SIGKILL		 9
-#define SIGBUS          10
-#define    SUBSIG_BUSTIMEOUT    1
-#define    SUBSIG_ALIGNMENT     2
-#define    SUBSIG_MISCERROR     5
-
-#define SIGSEGV		11
-#define    SUBSIG_NOMAPPING     3
-#define    SUBSIG_PROTECTION    4
-#define    SUBSIG_SEGERROR      5
-
-#define SIGSYS		12
-
-#define SIGPIPE		13
-#define SIGALRM		14
-#define SIGTERM		15
-#define SIGURG          16
-
-/* SunOS values which deviate from the Linux/i386 ones */
-#define SIGSTOP		17
-#define SIGTSTP		18
-#define SIGCONT		19
-#define SIGCHLD		20
-#define SIGTTIN		21
-#define SIGTTOU		22
-#define SIGIO		23
-#define SIGPOLL		SIGIO   /* SysV name for SIGIO */
-#define SIGXCPU		24
-#define SIGXFSZ		25
-#define SIGVTALRM	26
-#define SIGPROF		27
-#define SIGWINCH	28
-#define SIGLOST		29
-#define SIGPWR		SIGLOST
-#define SIGUSR1		30
-#define SIGUSR2		31
-
-/* Most things should be clean enough to redefine this at will, if care
-   is taken to make libc match.  */
-
-#define __OLD_NSIG	32
-#define __NEW_NSIG      64
-#ifdef __arch64__
-#define _NSIG_BPW       64
-#else
-#define _NSIG_BPW       32
-#endif
-#define _NSIG_WORDS     (__NEW_NSIG / _NSIG_BPW)
-
-#define SIGRTMIN       32
-#define SIGRTMAX       __NEW_NSIG
-
-#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
-#define _NSIG			__NEW_NSIG
-#define __new_sigset_t		sigset_t
-#define __new_sigaction		sigaction
-#define __new_sigaction32	sigaction32
-#define __old_sigset_t		old_sigset_t
-#define __old_sigaction		old_sigaction
-#define __old_sigaction32	old_sigaction32
-#else
-#define _NSIG			__OLD_NSIG
-#define NSIG			_NSIG
-#define __old_sigset_t		sigset_t
-#define __old_sigaction		sigaction
-#define __old_sigaction32	sigaction32
-#endif
+#include <uapi/asm/signal.h>
 
 #ifndef __ASSEMBLY__
-
-typedef unsigned long __old_sigset_t;            /* at least 32 bits */
-
-typedef struct {
-       unsigned long sig[_NSIG_WORDS];
-} __new_sigset_t;
-
-/* A SunOS sigstack */
-struct sigstack {
-	/* XXX 32-bit pointers pinhead XXX */
-	char *the_stack;
-	int   cur_status;
-};
-
-/* Sigvec flags */
-#define _SV_SSTACK    1u    /* This signal handler should use sig-stack */
-#define _SV_INTR      2u    /* Sig return should not restart system call */
-#define _SV_RESET     4u    /* Set handler to SIG_DFL upon taken signal */
-#define _SV_IGNCHILD  8u    /* Do not send SIGCHLD */
-
-/*
- * sa_flags values: SA_STACK is not currently supported, but will allow the
- * usage of signal stacks by using the (now obsolete) sa_restorer field in
- * the sigaction structure as a stack pointer. This is now possible due to
- * the changes in signal handling. LBT 010493.
- * SA_RESTART flag to get restarting signals (which were the default long ago)
- */
-#define SA_NOCLDSTOP	_SV_IGNCHILD
-#define SA_STACK	_SV_SSTACK
-#define SA_ONSTACK	_SV_SSTACK
-#define SA_RESTART	_SV_INTR
-#define SA_ONESHOT	_SV_RESET
-#define SA_NODEFER	0x20u
-#define SA_NOCLDWAIT    0x100u
-#define SA_SIGINFO      0x200u
-
-#define SA_NOMASK	SA_NODEFER
-
-#define SIG_BLOCK          0x01	/* for blocking signals */
-#define SIG_UNBLOCK        0x02	/* for unblocking signals */
-#define SIG_SETMASK        0x04	/* for setting the signal mask */
-
-/*
- * sigaltstack controls
- */
-#define SS_ONSTACK	1
-#define SS_DISABLE	2
-
-#define MINSIGSTKSZ	4096
-#define SIGSTKSZ	16384
-
-#ifdef __KERNEL__
 /*
  * DJHR
  * SA_STATIC_ALLOC is used for the sparc32 system to indicate that this
@@ -175,31 +20,6 @@ struct sigstack {
  *
  */
 #define SA_STATIC_ALLOC         0x8000
-#endif
-
-#include <asm-generic/signal-defs.h>
-
-struct __new_sigaction {
-	__sighandler_t		sa_handler;
-	unsigned long		sa_flags;
-	__sigrestore_t		sa_restorer;  /* not used by Linux/SPARC yet */
-	__new_sigset_t		sa_mask;
-};
-
-struct __old_sigaction {
-	__sighandler_t		sa_handler;
-	__old_sigset_t		sa_mask;
-	unsigned long		sa_flags;
-	void			(*sa_restorer)(void);  /* not used by Linux/SPARC yet */
-};
-
-typedef struct sigaltstack {
-	void			__user *ss_sp;
-	int			ss_flags;
-	size_t			ss_size;
-} stack_t;
-
-#ifdef __KERNEL__
 
 struct k_sigaction {
 	struct			__new_sigaction sa;
@@ -208,8 +28,5 @@ struct k_sigaction {
 
 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
 
-#endif /* !(__KERNEL__) */
-
 #endif /* !(__ASSEMBLY__) */
-
 #endif /* !(__SPARC_SIGNAL_H) */
diff --git a/arch/sparc/include/asm/termbits.h b/arch/sparc/include/asm/termbits.h
index 23b10ff08df..948067065ac 100644
--- a/arch/sparc/include/asm/termbits.h
+++ b/arch/sparc/include/asm/termbits.h
@@ -1,266 +1,8 @@
 #ifndef _SPARC_TERMBITS_H
 #define _SPARC_TERMBITS_H
 
-#include <linux/posix_types.h>
+#include <uapi/asm/termbits.h>
 
-typedef unsigned char   cc_t;
-typedef unsigned int    speed_t;
-
-#if defined(__sparc__) && defined(__arch64__)
-typedef unsigned int    tcflag_t;
-#else
-typedef unsigned long   tcflag_t;
-#endif
-
-#define NCC 8
-struct termio {
-	unsigned short c_iflag;		/* input mode flags */
-	unsigned short c_oflag;		/* output mode flags */
-	unsigned short c_cflag;		/* control mode flags */
-	unsigned short c_lflag;		/* local mode flags */
-	unsigned char c_line;		/* line discipline */
-	unsigned char c_cc[NCC];	/* control characters */
-};
-
-#define NCCS 17
-struct termios {
-	tcflag_t c_iflag;		/* input mode flags */
-	tcflag_t c_oflag;		/* output mode flags */
-	tcflag_t c_cflag;		/* control mode flags */
-	tcflag_t c_lflag;		/* local mode flags */
-	cc_t c_line;			/* line discipline */
-#ifndef __KERNEL__
-	cc_t c_cc[NCCS];		/* control characters */
-#else
-	cc_t c_cc[NCCS+2];	/* kernel needs 2 more to hold vmin/vtime */
-#define SIZEOF_USER_TERMIOS sizeof (struct termios) - (2*sizeof (cc_t))
-#endif
-};
-
-struct termios2 {
-	tcflag_t c_iflag;		/* input mode flags */
-	tcflag_t c_oflag;		/* output mode flags */
-	tcflag_t c_cflag;		/* control mode flags */
-	tcflag_t c_lflag;		/* local mode flags */
-	cc_t c_line;			/* line discipline */
-	cc_t c_cc[NCCS+2];		/* control characters */
-	speed_t c_ispeed;		/* input speed */
-	speed_t c_ospeed;		/* output speed */
-};
-
-struct ktermios {
-	tcflag_t c_iflag;		/* input mode flags */
-	tcflag_t c_oflag;		/* output mode flags */
-	tcflag_t c_cflag;		/* control mode flags */
-	tcflag_t c_lflag;		/* local mode flags */
-	cc_t c_line;			/* line discipline */
-	cc_t c_cc[NCCS+2];		/* control characters */
-	speed_t c_ispeed;		/* input speed */
-	speed_t c_ospeed;		/* output speed */
-};
-
-/* c_cc characters */
-#define VINTR    0
-#define VQUIT    1
-#define VERASE   2
-#define VKILL    3
-#define VEOF     4
-#define VEOL     5
-#define VEOL2    6
-#define VSWTC    7
-#define VSTART   8
-#define VSTOP    9
-
-
-
-#define VSUSP    10
-#define VDSUSP   11  /* SunOS POSIX nicety I do believe... */
-#define VREPRINT 12
-#define VDISCARD 13
-#define VWERASE  14
-#define VLNEXT   15
-
-/* Kernel keeps vmin/vtime separated, user apps assume vmin/vtime is
- * shared with eof/eol
- */
-#ifdef __KERNEL__
 #define VMIN     16
 #define VTIME    17
-#else
-#define VMIN     VEOF
-#define VTIME    VEOL
-#endif
-
-/* c_iflag bits */
-#define IGNBRK	0x00000001
-#define BRKINT	0x00000002
-#define IGNPAR	0x00000004
-#define PARMRK	0x00000008
-#define INPCK	0x00000010
-#define ISTRIP	0x00000020
-#define INLCR	0x00000040
-#define IGNCR	0x00000080
-#define ICRNL	0x00000100
-#define IUCLC	0x00000200
-#define IXON	0x00000400
-#define IXANY	0x00000800
-#define IXOFF	0x00001000
-#define IMAXBEL	0x00002000
-#define IUTF8   0x00004000
-
-/* c_oflag bits */
-#define OPOST	0x00000001
-#define OLCUC	0x00000002
-#define ONLCR	0x00000004
-#define OCRNL	0x00000008
-#define ONOCR	0x00000010
-#define ONLRET	0x00000020
-#define OFILL	0x00000040
-#define OFDEL	0x00000080
-#define NLDLY	0x00000100
-#define   NL0	0x00000000
-#define   NL1	0x00000100
-#define CRDLY	0x00000600
-#define   CR0	0x00000000
-#define   CR1	0x00000200
-#define   CR2	0x00000400
-#define   CR3	0x00000600
-#define TABDLY	0x00001800
-#define   TAB0	0x00000000
-#define   TAB1	0x00000800
-#define   TAB2	0x00001000
-#define   TAB3	0x00001800
-#define   XTABS	0x00001800
-#define BSDLY	0x00002000
-#define   BS0	0x00000000
-#define   BS1	0x00002000
-#define VTDLY	0x00004000
-#define   VT0	0x00000000
-#define   VT1	0x00004000
-#define FFDLY	0x00008000
-#define   FF0	0x00000000
-#define   FF1	0x00008000
-#define PAGEOUT 0x00010000  /* SUNOS specific */
-#define WRAP    0x00020000  /* SUNOS specific */
-
-/* c_cflag bit meaning */
-#define CBAUD	  0x0000100f
-#define  B0	  0x00000000   /* hang up */
-#define  B50	  0x00000001
-#define  B75	  0x00000002
-#define  B110	  0x00000003
-#define  B134	  0x00000004
-#define  B150	  0x00000005
-#define  B200	  0x00000006
-#define  B300	  0x00000007
-#define  B600	  0x00000008
-#define  B1200	  0x00000009
-#define  B1800	  0x0000000a
-#define  B2400	  0x0000000b
-#define  B4800	  0x0000000c
-#define  B9600	  0x0000000d
-#define  B19200	  0x0000000e
-#define  B38400	  0x0000000f
-#define EXTA      B19200
-#define EXTB      B38400
-#define  CSIZE    0x00000030
-#define   CS5	  0x00000000
-#define   CS6	  0x00000010
-#define   CS7	  0x00000020
-#define   CS8	  0x00000030
-#define CSTOPB	  0x00000040
-#define CREAD	  0x00000080
-#define PARENB	  0x00000100
-#define PARODD	  0x00000200
-#define HUPCL	  0x00000400
-#define CLOCAL	  0x00000800
-#define CBAUDEX   0x00001000
-/* We'll never see these speeds with the Zilogs, but for completeness... */
-#define  BOTHER   0x00001000
-#define  B57600   0x00001001
-#define  B115200  0x00001002
-#define  B230400  0x00001003
-#define  B460800  0x00001004
-/* This is what we can do with the Zilogs. */
-#define  B76800   0x00001005
-/* This is what we can do with the SAB82532. */
-#define  B153600  0x00001006
-#define  B307200  0x00001007
-#define  B614400  0x00001008
-#define  B921600  0x00001009
-/* And these are the rest... */
-#define  B500000  0x0000100a
-#define  B576000  0x0000100b
-#define B1000000  0x0000100c
-#define B1152000  0x0000100d
-#define B1500000  0x0000100e
-#define B2000000  0x0000100f
-/* These have totally bogus values and nobody uses them
-   so far. Later on we'd have to use say 0x10000x and
-   adjust CBAUD constant and drivers accordingly.
-#define B2500000  0x00001010
-#define B3000000  0x00001011
-#define B3500000  0x00001012
-#define B4000000  0x00001013  */
-#define CIBAUD	  0x100f0000  /* input baud rate (not used) */
-#define CMSPAR	  0x40000000  /* mark or space (stick) parity */
-#define CRTSCTS	  0x80000000  /* flow control */
-
-#define IBSHIFT	  16		/* Shift from CBAUD to CIBAUD */
-
-/* c_lflag bits */
-#define ISIG	0x00000001
-#define ICANON	0x00000002
-#define XCASE	0x00000004
-#define ECHO	0x00000008
-#define ECHOE	0x00000010
-#define ECHOK	0x00000020
-#define ECHONL	0x00000040
-#define NOFLSH	0x00000080
-#define TOSTOP	0x00000100
-#define ECHOCTL	0x00000200
-#define ECHOPRT	0x00000400
-#define ECHOKE	0x00000800
-#define DEFECHO 0x00001000  /* SUNOS thing, what is it? */
-#define FLUSHO	0x00002000
-#define PENDIN	0x00004000
-#define IEXTEN	0x00008000
-#define EXTPROC	0x00010000
-
-/* modem lines */
-#define TIOCM_LE	0x001
-#define TIOCM_DTR	0x002
-#define TIOCM_RTS	0x004
-#define TIOCM_ST	0x008
-#define TIOCM_SR	0x010
-#define TIOCM_CTS	0x020
-#define TIOCM_CAR	0x040
-#define TIOCM_RNG	0x080
-#define TIOCM_DSR	0x100
-#define TIOCM_CD	TIOCM_CAR
-#define TIOCM_RI	TIOCM_RNG
-#define TIOCM_OUT1	0x2000
-#define TIOCM_OUT2	0x4000
-#define TIOCM_LOOP	0x8000
-
-/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
-#define TIOCSER_TEMT    0x01	/* Transmitter physically empty */
-
-
-/* tcflow() and TCXONC use these */
-#define	TCOOFF		0
-#define	TCOON		1
-#define	TCIOFF		2
-#define	TCION		3
-
-/* tcflush() and TCFLSH use these */
-#define	TCIFLUSH	0
-#define	TCOFLUSH	1
-#define	TCIOFLUSH	2
-
-/* tcsetattr uses these */
-#define	TCSANOW		0
-#define	TCSADRAIN	1
-#define	TCSAFLUSH	2
-
 #endif /* !(_SPARC_TERMBITS_H) */
diff --git a/arch/sparc/include/asm/termios.h b/arch/sparc/include/asm/termios.h
index e2f46705a21..0c2414ddd52 100644
--- a/arch/sparc/include/asm/termios.h
+++ b/arch/sparc/include/asm/termios.h
@@ -1,45 +1,8 @@
 #ifndef _SPARC_TERMIOS_H
 #define _SPARC_TERMIOS_H
 
-#include <asm/ioctls.h>
-#include <asm/termbits.h>
+#include <uapi/asm/termios.h>
 
-#if defined(__KERNEL__) || defined(__DEFINE_BSD_TERMIOS)
-struct sgttyb {
-	char	sg_ispeed;
-	char	sg_ospeed;
-	char	sg_erase;
-	char	sg_kill;
-	short	sg_flags;
-};
-
-struct tchars {
-	char	t_intrc;
-	char	t_quitc;
-	char	t_startc;
-	char	t_stopc;
-	char	t_eofc;
-	char	t_brkc;
-};
-
-struct ltchars {
-	char	t_suspc;
-	char	t_dsuspc;
-	char	t_rprntc;
-	char	t_flushc;
-	char	t_werasc;
-	char	t_lnextc;
-};
-#endif /* __KERNEL__ */
-
-struct winsize {
-	unsigned short ws_row;
-	unsigned short ws_col;
-	unsigned short ws_xpixel;
-	unsigned short ws_ypixel;
-};
-
-#ifdef __KERNEL__
 
 /*
  * c_cc characters in the termio structure.  Oh, how I love being
@@ -180,6 +143,4 @@ struct winsize {
 	err; \
 })
 
-#endif	/* __KERNEL__ */
-
 #endif /* _SPARC_TERMIOS_H */
diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h
index e6cd224506a..25849ae3e90 100644
--- a/arch/sparc/include/asm/thread_info_32.h
+++ b/arch/sparc/include/asm/thread_info_32.h
@@ -126,13 +126,14 @@ register struct thread_info *current_thread_info_reg asm("g6");
 #define _TIF_NOTIFY_RESUME	(1<<TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
 #define _TIF_USEDFPU		(1<<TIF_USEDFPU)
 #define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
 
 #define _TIF_DO_NOTIFY_RESUME_MASK	(_TIF_NOTIFY_RESUME | \
 					 _TIF_SIGPENDING)
 
+#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
+
 #endif /* __KERNEL__ */
 
 #endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index cfa8c38fb9c..4e227663108 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -256,6 +256,9 @@ static inline bool test_and_clear_restore_sigmask(void)
 	ti->status &= ~TS_RESTORE_SIGMASK;
 	return true;
 }
+
+#define tsk_is_polling(t) test_tsk_thread_flag(t, TIF_POLLING_NRFLAG)
+
 #endif	/* !__ASSEMBLY__ */
 
 #endif /* __KERNEL__ */
diff --git a/arch/sparc/include/asm/traps.h b/arch/sparc/include/asm/traps.h
index 3aa62dde343..51abcb1f9b3 100644
--- a/arch/sparc/include/asm/traps.h
+++ b/arch/sparc/include/asm/traps.h
@@ -3,14 +3,12 @@
  *
  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  */
-
 #ifndef _SPARC_TRAPS_H
 #define _SPARC_TRAPS_H
 
-#define NUM_SPARC_TRAPS  255
+#include <uapi/asm/traps.h>
 
 #ifndef __ASSEMBLY__
-#ifdef __KERNEL__
 /* This is for V8 compliant Sparc CPUS */
 struct tt_entry {
 	unsigned long inst_one;
@@ -22,112 +20,5 @@ struct tt_entry {
 /* We set this to _start in system setup. */
 extern struct tt_entry *sparc_ttable;
 
-#endif /* (__KERNEL__) */
 #endif /* !(__ASSEMBLY__) */
-
-/* For patching the trap table at boot time, we need to know how to
- * form various common Sparc instructions.  Thus these macros...
- */
-
-#define SPARC_MOV_CONST_L3(const) (0xa6102000 | (const&0xfff))
-
-/* The following assumes that the branch lies before the place we
- * are branching to.  This is the case for a trap vector...
- * You have been warned.
- */
-#define SPARC_BRANCH(dest_addr, inst_addr) \
-          (0x10800000 | (((dest_addr-inst_addr)>>2)&0x3fffff))
-
-#define SPARC_RD_PSR_L0  (0xa1480000)
-#define SPARC_RD_WIM_L3  (0xa7500000)
-#define SPARC_NOP (0x01000000)
-
-/* Various interesting trap levels. */
-/* First, hardware traps. */
-#define SP_TRAP_TFLT    0x1          /* Text fault */
-#define SP_TRAP_II      0x2          /* Illegal Instruction */
-#define SP_TRAP_PI      0x3          /* Privileged Instruction */
-#define SP_TRAP_FPD     0x4          /* Floating Point Disabled */
-#define SP_TRAP_WOVF    0x5          /* Window Overflow */
-#define SP_TRAP_WUNF    0x6          /* Window Underflow */
-#define SP_TRAP_MNA     0x7          /* Memory Address Unaligned */
-#define SP_TRAP_FPE     0x8          /* Floating Point Exception */
-#define SP_TRAP_DFLT    0x9          /* Data Fault */
-#define SP_TRAP_TOF     0xa          /* Tag Overflow */
-#define SP_TRAP_WDOG    0xb          /* Watchpoint Detected */
-#define SP_TRAP_IRQ1    0x11         /* IRQ level 1 */
-#define SP_TRAP_IRQ2    0x12         /* IRQ level 2 */
-#define SP_TRAP_IRQ3    0x13         /* IRQ level 3 */
-#define SP_TRAP_IRQ4    0x14         /* IRQ level 4 */
-#define SP_TRAP_IRQ5    0x15         /* IRQ level 5 */
-#define SP_TRAP_IRQ6    0x16         /* IRQ level 6 */
-#define SP_TRAP_IRQ7    0x17         /* IRQ level 7 */
-#define SP_TRAP_IRQ8    0x18         /* IRQ level 8 */
-#define SP_TRAP_IRQ9    0x19         /* IRQ level 9 */
-#define SP_TRAP_IRQ10   0x1a         /* IRQ level 10 */
-#define SP_TRAP_IRQ11   0x1b         /* IRQ level 11 */
-#define SP_TRAP_IRQ12   0x1c         /* IRQ level 12 */
-#define SP_TRAP_IRQ13   0x1d         /* IRQ level 13 */
-#define SP_TRAP_IRQ14   0x1e         /* IRQ level 14 */
-#define SP_TRAP_IRQ15   0x1f         /* IRQ level 15 Non-maskable */
-#define SP_TRAP_RACC    0x20         /* Register Access Error ??? */
-#define SP_TRAP_IACC    0x21         /* Instruction Access Error */
-#define SP_TRAP_CPDIS   0x24         /* Co-Processor Disabled */
-#define SP_TRAP_BADFL   0x25         /* Unimplemented Flush Instruction */
-#define SP_TRAP_CPEXP   0x28         /* Co-Processor Exception */
-#define SP_TRAP_DACC    0x29         /* Data Access Error */
-#define SP_TRAP_DIVZ    0x2a         /* Divide By Zero */
-#define SP_TRAP_DSTORE  0x2b         /* Data Store Error ??? */
-#define SP_TRAP_DMM     0x2c         /* Data Access MMU Miss ??? */
-#define SP_TRAP_IMM     0x3c         /* Instruction Access MMU Miss ??? */
-
-/* Now the Software Traps... */
-#define SP_TRAP_SUNOS   0x80         /* SunOS System Call */
-#define SP_TRAP_SBPT    0x81         /* Software Breakpoint */
-#define SP_TRAP_SDIVZ   0x82         /* Software Divide-by-Zero trap */
-#define SP_TRAP_FWIN    0x83         /* Flush Windows */
-#define SP_TRAP_CWIN    0x84         /* Clean Windows */
-#define SP_TRAP_RCHK    0x85         /* Range Check */
-#define SP_TRAP_FUNA    0x86         /* Fix Unaligned Access */
-#define SP_TRAP_IOWFL   0x87         /* Integer Overflow */
-#define SP_TRAP_SOLARIS 0x88         /* Solaris System Call */
-#define SP_TRAP_NETBSD  0x89         /* NetBSD System Call */
-#define SP_TRAP_LINUX   0x90         /* Linux System Call */
-
-/* Names used for compatibility with SunOS */
-#define ST_SYSCALL              0x00
-#define ST_BREAKPOINT           0x01
-#define ST_DIV0                 0x02
-#define ST_FLUSH_WINDOWS        0x03
-#define ST_CLEAN_WINDOWS        0x04
-#define ST_RANGE_CHECK          0x05
-#define ST_FIX_ALIGN            0x06
-#define ST_INT_OVERFLOW         0x07
-
-/* Special traps... */
-#define SP_TRAP_KBPT1   0xfe         /* KADB/PROM Breakpoint one */
-#define SP_TRAP_KBPT2   0xff         /* KADB/PROM Breakpoint two */
-
-/* Handy Macros */
-/* Is this a trap we never expect to get? */
-#define BAD_TRAP_P(level) \
-        ((level > SP_TRAP_WDOG && level < SP_TRAP_IRQ1) || \
-	 (level > SP_TRAP_IACC && level < SP_TRAP_CPDIS) || \
-	 (level > SP_TRAP_BADFL && level < SP_TRAP_CPEXP) || \
-	 (level > SP_TRAP_DMM && level < SP_TRAP_IMM) || \
-	 (level > SP_TRAP_IMM && level < SP_TRAP_SUNOS) || \
-	 (level > SP_TRAP_LINUX && level < SP_TRAP_KBPT1))
-
-/* Is this a Hardware trap? */
-#define HW_TRAP_P(level) ((level > 0) && (level < SP_TRAP_SUNOS))
-
-/* Is this a Software trap? */
-#define SW_TRAP_P(level) ((level >= SP_TRAP_SUNOS) && (level <= SP_TRAP_KBPT2))
-
-/* Is this a system call for some OS we know about? */
-#define SCALL_TRAP_P(level) ((level == SP_TRAP_SUNOS) || \
-			     (level == SP_TRAP_SOLARIS) || \
-			     (level == SP_TRAP_NETBSD) || \
-			     (level == SP_TRAP_LINUX))
-
 #endif /* !(_SPARC_TRAPS_H) */
diff --git a/arch/sparc/include/asm/tsb.h b/arch/sparc/include/asm/tsb.h
index 1a8afd1ad04..b4c258de444 100644
--- a/arch/sparc/include/asm/tsb.h
+++ b/arch/sparc/include/asm/tsb.h
@@ -147,20 +147,96 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
 	brz,pn		REG1, FAIL_LABEL; \
 	 sllx		VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
-	sllx		REG1, 11, REG1; \
+	sllx		REG1, PGD_PADDR_SHIFT, REG1; \
 	andn		REG2, 0x3, REG2; \
 	lduwa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
 	brz,pn		REG1, FAIL_LABEL; \
 	 sllx		VADDR, 64 - PMD_SHIFT, REG2; \
-	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
-	sllx		REG1, 11, REG1; \
+	srlx		REG2, 64 - (PAGE_SHIFT - 1), REG2; \
+	sllx		REG1, PMD_PADDR_SHIFT, REG1; \
 	andn		REG2, 0x7, REG2; \
 	add		REG1, REG2, REG1;
 
-	/* Do a user page table walk in MMU globals.  Leaves physical PTE
-	 * pointer in REG1.  Jumps to FAIL_LABEL on early page table walk
-	 * termination.  Physical base of page tables is in PHYS_PGD which
-	 * will not be modified.
+	/* This macro exists only to make the PMD translator below easier
+	 * to read.  It hides the ELF section switch for the sun4v code
+	 * patching.
+	 */
+#define OR_PTE_BIT(REG, NAME)				\
+661:	or		REG, _PAGE_##NAME##_4U, REG;	\
+	.section	.sun4v_1insn_patch, "ax";	\
+	.word		661b;				\
+	or		REG, _PAGE_##NAME##_4V, REG;	\
+	.previous;
+
+	/* Load into REG the PTE value for VALID, CACHE, and SZHUGE.  */
+#define BUILD_PTE_VALID_SZHUGE_CACHE(REG)				   \
+661:	sethi		%uhi(_PAGE_VALID|_PAGE_SZHUGE_4U), REG;		   \
+	.section	.sun4v_1insn_patch, "ax";			   \
+	.word		661b;						   \
+	sethi		%uhi(_PAGE_VALID), REG;				   \
+	.previous;							   \
+	sllx		REG, 32, REG;					   \
+661:	or		REG, _PAGE_CP_4U|_PAGE_CV_4U, REG;		   \
+	.section	.sun4v_1insn_patch, "ax";			   \
+	.word		661b;						   \
+	or		REG, _PAGE_CP_4V|_PAGE_CV_4V|_PAGE_SZHUGE_4V, REG; \
+	.previous;
+
+	/* PMD has been loaded into REG1, interpret the value, seeing
+	 * if it is a HUGE PMD or a normal one.  If it is not valid
+	 * then jump to FAIL_LABEL.  If it is a HUGE PMD, and it
+	 * translates to a valid PTE, branch to PTE_LABEL.
+	 *
+	 * We translate the PMD by hand, one bit at a time,
+	 * constructing the huge PTE.
+	 *
+	 * So we construct the PTE in REG2 as follows:
+	 *
+	 * 1) Extract the PMD PFN from REG1 and place it into REG2.
+	 *
+	 * 2) Translate PMD protection bits in REG1 into REG2, one bit
+	 *    at a time using andcc tests on REG1 and OR's into REG2.
+	 *
+	 *    Only two bits to be concerned with here, EXEC and WRITE.
+	 *    Now REG1 is freed up and we can use it as a temporary.
+	 *
+	 * 3) Construct the VALID, CACHE, and page size PTE bits in
+	 *    REG1, OR with REG2 to form final PTE.
+	 */
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+#define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \
+	brz,pn		REG1, FAIL_LABEL;				      \
+	 andcc		REG1, PMD_ISHUGE, %g0;				      \
+	be,pt		%xcc, 700f;					      \
+	 and		REG1, PMD_HUGE_PRESENT|PMD_HUGE_ACCESSED, REG2;	      \
+	cmp		REG2, PMD_HUGE_PRESENT|PMD_HUGE_ACCESSED;	      \
+	bne,pn		%xcc, FAIL_LABEL;				      \
+	 andn		REG1, PMD_HUGE_PROTBITS, REG2;			      \
+	sllx		REG2, PMD_PADDR_SHIFT, REG2;			      \
+	/* REG2 now holds PFN << PAGE_SHIFT */				      \
+	andcc		REG1, PMD_HUGE_EXEC, %g0;			      \
+	bne,a,pt	%xcc, 1f;					      \
+	 OR_PTE_BIT(REG2, EXEC);					      \
+1:	andcc		REG1, PMD_HUGE_WRITE, %g0;			      \
+	bne,a,pt	%xcc, 1f;					      \
+	 OR_PTE_BIT(REG2, W);						      \
+	/* REG1 can now be clobbered, build final PTE */		      \
+1:	BUILD_PTE_VALID_SZHUGE_CACHE(REG1);				      \
+	ba,pt		%xcc, PTE_LABEL;				      \
+	 or		REG1, REG2, REG1;				      \
+700:
+#else
+#define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \
+	brz,pn		REG1, FAIL_LABEL; \
+	 nop;
+#endif
+
+	/* Do a user page table walk in MMU globals.  Leaves final,
+	 * valid, PTE value in REG1.  Jumps to FAIL_LABEL on early
+	 * page table walk termination or if the PTE is not valid.
+	 *
+	 * Physical base of page tables is in PHYS_PGD which will not
+	 * be modified.
 	 *
 	 * VADDR will not be clobbered, but REG1 and REG2 will.
 	 */
@@ -172,15 +248,19 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
 	brz,pn		REG1, FAIL_LABEL; \
 	 sllx		VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \
 	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
-	sllx		REG1, 11, REG1; \
+	sllx		REG1, PGD_PADDR_SHIFT, REG1; \
 	andn		REG2, 0x3, REG2; \
 	lduwa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
-	brz,pn		REG1, FAIL_LABEL; \
-	 sllx		VADDR, 64 - PMD_SHIFT, REG2; \
-	srlx		REG2, 64 - PAGE_SHIFT, REG2; \
-	sllx		REG1, 11, REG1; \
+	USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \
+	sllx		VADDR, 64 - PMD_SHIFT, REG2; \
+	srlx		REG2, 64 - (PAGE_SHIFT - 1), REG2; \
+	sllx		REG1, PMD_PADDR_SHIFT, REG1; \
 	andn		REG2, 0x7, REG2; \
-	add		REG1, REG2, REG1;
+	add		REG1, REG2, REG1; \
+	ldxa		[REG1] ASI_PHYS_USE_EC, REG1; \
+	brgez,pn	REG1, FAIL_LABEL; \
+	 nop; \
+800:
 
 /* Lookup a OBP mapping on VADDR in the prom_trans[] table at TL>0.
  * If no entry is found, FAIL_LABEL will be branched to.  On success
diff --git a/arch/sparc/include/asm/uaccess_64.h b/arch/sparc/include/asm/uaccess_64.h
index 7c831d848b4..73083e1d38d 100644
--- a/arch/sparc/include/asm/uaccess_64.h
+++ b/arch/sparc/include/asm/uaccess_64.h
@@ -265,6 +265,11 @@ extern __must_check long strnlen_user(const char __user *str, long n);
 #define __copy_to_user_inatomic ___copy_to_user
 #define __copy_from_user_inatomic ___copy_from_user
 
+struct pt_regs;
+extern unsigned long compute_effective_address(struct pt_regs *,
+					       unsigned int insn,
+					       unsigned int rd);
+
 #endif  /* __ASSEMBLY__ */
 
 #endif /* _ASM_UACCESS_H */
diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h
index d9a677c5192..0ecea6ed943 100644
--- a/arch/sparc/include/asm/unistd.h
+++ b/arch/sparc/include/asm/unistd.h
@@ -1,6 +1,3 @@
-#ifndef _SPARC_UNISTD_H
-#define _SPARC_UNISTD_H
-
 /*
  * System calls under the Sparc.
  *
@@ -14,415 +11,15 @@
  *
  * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
  */
-#ifndef __32bit_syscall_numbers__
-#ifndef __arch64__
-#define __32bit_syscall_numbers__
-#endif
-#endif
+#ifndef _SPARC_UNISTD_H
+#define _SPARC_UNISTD_H
+
+#include <uapi/asm/unistd.h>
 
-#define __NR_restart_syscall      0 /* Linux Specific				   */
-#define __NR_exit                 1 /* Common                                      */
-#define __NR_fork                 2 /* Common                                      */
-#define __NR_read                 3 /* Common                                      */
-#define __NR_write                4 /* Common                                      */
-#define __NR_open                 5 /* Common                                      */
-#define __NR_close                6 /* Common                                      */
-#define __NR_wait4                7 /* Common                                      */
-#define __NR_creat                8 /* Common                                      */
-#define __NR_link                 9 /* Common                                      */
-#define __NR_unlink              10 /* Common                                      */
-#define __NR_execv               11 /* SunOS Specific                              */
-#define __NR_chdir               12 /* Common                                      */
-#define __NR_chown		 13 /* Common					   */
-#define __NR_mknod               14 /* Common                                      */
-#define __NR_chmod               15 /* Common                                      */
-#define __NR_lchown              16 /* Common                                      */
-#define __NR_brk                 17 /* Common                                      */
-#define __NR_perfctr             18 /* Performance counter operations              */
-#define __NR_lseek               19 /* Common                                      */
-#define __NR_getpid              20 /* Common                                      */
-#define __NR_capget		 21 /* Linux Specific				   */
-#define __NR_capset		 22 /* Linux Specific				   */
-#define __NR_setuid              23 /* Implemented via setreuid in SunOS           */
-#define __NR_getuid              24 /* Common                                      */
-#define __NR_vmsplice	         25 /* ENOSYS under SunOS			   */
-#define __NR_ptrace              26 /* Common                                      */
-#define __NR_alarm               27 /* Implemented via setitimer in SunOS          */
-#define __NR_sigaltstack	 28 /* Common					   */
-#define __NR_pause               29 /* Is sigblock(0)->sigpause() in SunOS         */
-#define __NR_utime               30 /* Implemented via utimes() under SunOS        */
-#ifdef __32bit_syscall_numbers__
-#define __NR_lchown32            31 /* Linux sparc32 specific                      */
-#define __NR_fchown32            32 /* Linux sparc32 specific                      */
-#endif
-#define __NR_access              33 /* Common                                      */
-#define __NR_nice                34 /* Implemented via get/setpriority() in SunOS  */
-#ifdef __32bit_syscall_numbers__
-#define __NR_chown32             35 /* Linux sparc32 specific                      */
-#endif
-#define __NR_sync                36 /* Common                                      */
-#define __NR_kill                37 /* Common                                      */
-#define __NR_stat                38 /* Common                                      */
-#define __NR_sendfile		 39 /* Linux Specific				   */
-#define __NR_lstat               40 /* Common                                      */
-#define __NR_dup                 41 /* Common                                      */
-#define __NR_pipe                42 /* Common                                      */
-#define __NR_times               43 /* Implemented via getrusage() in SunOS        */
-#ifdef __32bit_syscall_numbers__
-#define __NR_getuid32            44 /* Linux sparc32 specific                      */
-#endif
-#define __NR_umount2             45 /* Linux Specific                              */
-#define __NR_setgid              46 /* Implemented via setregid() in SunOS         */
-#define __NR_getgid              47 /* Common                                      */
-#define __NR_signal              48 /* Implemented via sigvec() in SunOS           */
-#define __NR_geteuid             49 /* SunOS calls getuid()                        */
-#define __NR_getegid             50 /* SunOS calls getgid()                        */
-#define __NR_acct                51 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_getgid32            53 /* Linux sparc32 specific                      */
-#else
-#define __NR_memory_ordering	 52 /* Linux Specific				   */
-#endif
-#define __NR_ioctl               54 /* Common                                      */
-#define __NR_reboot              55 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_mmap2		 56 /* Linux sparc32 Specific			   */
-#endif
-#define __NR_symlink             57 /* Common                                      */
-#define __NR_readlink            58 /* Common                                      */
-#define __NR_execve              59 /* Common                                      */
-#define __NR_umask               60 /* Common                                      */
-#define __NR_chroot              61 /* Common                                      */
-#define __NR_fstat               62 /* Common                                      */
-#define __NR_fstat64		 63 /* Linux Specific			           */
-#define __NR_getpagesize         64 /* Common                                      */
-#define __NR_msync               65 /* Common in newer 1.3.x revs...               */
-#define __NR_vfork               66 /* Common                                      */
-#define __NR_pread64             67 /* Linux Specific                              */
-#define __NR_pwrite64            68 /* Linux Specific                              */
-#ifdef __32bit_syscall_numbers__
-#define __NR_geteuid32           69 /* Linux sparc32, sbrk under SunOS             */
-#define __NR_getegid32           70 /* Linux sparc32, sstk under SunOS             */
-#endif
-#define __NR_mmap                71 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_setreuid32          72 /* Linux sparc32, vadvise under SunOS          */
-#endif
-#define __NR_munmap              73 /* Common                                      */
-#define __NR_mprotect            74 /* Common                                      */
-#define __NR_madvise             75 /* Common                                      */
-#define __NR_vhangup             76 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_truncate64		 77 /* Linux sparc32 Specific			   */
-#endif
-#define __NR_mincore             78 /* Common                                      */
-#define __NR_getgroups           79 /* Common                                      */
-#define __NR_setgroups           80 /* Common                                      */
-#define __NR_getpgrp             81 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_setgroups32         82 /* Linux sparc32, setpgrp under SunOS          */
-#endif
-#define __NR_setitimer           83 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_ftruncate64	 84 /* Linux sparc32 Specific			   */
-#endif
-#define __NR_swapon              85 /* Common                                      */
-#define __NR_getitimer           86 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_setuid32            87 /* Linux sparc32, gethostname under SunOS      */
-#endif
-#define __NR_sethostname         88 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_setgid32            89 /* Linux sparc32, getdtablesize under SunOS    */
-#endif
-#define __NR_dup2                90 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_setfsuid32          91 /* Linux sparc32, getdopt under SunOS          */
-#endif
-#define __NR_fcntl               92 /* Common                                      */
-#define __NR_select              93 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_setfsgid32          94 /* Linux sparc32, setdopt under SunOS          */
-#endif
-#define __NR_fsync               95 /* Common                                      */
-#define __NR_setpriority         96 /* Common                                      */
-#define __NR_socket              97 /* Common                                      */
-#define __NR_connect             98 /* Common                                      */
-#define __NR_accept              99 /* Common                                      */
-#define __NR_getpriority        100 /* Common                                      */
-#define __NR_rt_sigreturn       101 /* Linux Specific                              */
-#define __NR_rt_sigaction       102 /* Linux Specific                              */
-#define __NR_rt_sigprocmask     103 /* Linux Specific                              */
-#define __NR_rt_sigpending      104 /* Linux Specific                              */
-#define __NR_rt_sigtimedwait    105 /* Linux Specific                              */
-#define __NR_rt_sigqueueinfo    106 /* Linux Specific                              */
-#define __NR_rt_sigsuspend      107 /* Linux Specific                              */
-#ifdef __32bit_syscall_numbers__
-#define __NR_setresuid32        108 /* Linux Specific, sigvec under SunOS	   */
-#define __NR_getresuid32        109 /* Linux Specific, sigblock under SunOS	   */
-#define __NR_setresgid32        110 /* Linux Specific, sigsetmask under SunOS	   */
-#define __NR_getresgid32        111 /* Linux Specific, sigpause under SunOS	   */
-#define __NR_setregid32         112 /* Linux sparc32, sigstack under SunOS         */
-#else
-#define __NR_setresuid          108 /* Linux Specific, sigvec under SunOS	   */
-#define __NR_getresuid          109 /* Linux Specific, sigblock under SunOS	   */
-#define __NR_setresgid          110 /* Linux Specific, sigsetmask under SunOS	   */
-#define __NR_getresgid          111 /* Linux Specific, sigpause under SunOS	   */
-#endif
-#define __NR_recvmsg            113 /* Common                                      */
-#define __NR_sendmsg            114 /* Common                                      */
-#ifdef __32bit_syscall_numbers__
-#define __NR_getgroups32        115 /* Linux sparc32, vtrace under SunOS           */
-#endif
-#define __NR_gettimeofday       116 /* Common                                      */
-#define __NR_getrusage          117 /* Common                                      */
-#define __NR_getsockopt         118 /* Common                                      */
-#define __NR_getcwd		119 /* Linux Specific				   */
-#define __NR_readv              120 /* Common                                      */
-#define __NR_writev             121 /* Common                                      */
-#define __NR_settimeofday       122 /* Common                                      */
-#define __NR_fchown             123 /* Common                                      */
-#define __NR_fchmod             124 /* Common                                      */
-#define __NR_recvfrom           125 /* Common                                      */
-#define __NR_setreuid           126 /* Common                                      */
-#define __NR_setregid           127 /* Common                                      */
-#define __NR_rename             128 /* Common                                      */
-#define __NR_truncate           129 /* Common                                      */
-#define __NR_ftruncate          130 /* Common                                      */
-#define __NR_flock              131 /* Common                                      */
-#define __NR_lstat64		132 /* Linux Specific			           */
-#define __NR_sendto             133 /* Common                                      */
-#define __NR_shutdown           134 /* Common                                      */
-#define __NR_socketpair         135 /* Common                                      */
-#define __NR_mkdir              136 /* Common                                      */
-#define __NR_rmdir              137 /* Common                                      */
-#define __NR_utimes             138 /* SunOS Specific                              */
-#define __NR_stat64		139 /* Linux Specific			           */
-#define __NR_sendfile64         140 /* adjtime under SunOS                         */
-#define __NR_getpeername        141 /* Common                                      */
-#define __NR_futex              142 /* gethostid under SunOS                       */
-#define __NR_gettid             143 /* ENOSYS under SunOS                          */
-#define __NR_getrlimit		144 /* Common                                      */
-#define __NR_setrlimit          145 /* Common                                      */
-#define __NR_pivot_root		146 /* Linux Specific, killpg under SunOS          */
-#define __NR_prctl		147 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_read	148 /* ENOSYS under SunOS                          */
-#define __NR_pciconfig_write	149 /* ENOSYS under SunOS                          */
-#define __NR_getsockname        150 /* Common                                      */
-#define __NR_inotify_init       151 /* Linux specific                              */
-#define __NR_inotify_add_watch  152 /* Linux specific                              */
-#define __NR_poll               153 /* Common                                      */
-#define __NR_getdents64		154 /* Linux specific				   */
-#ifdef __32bit_syscall_numbers__
-#define __NR_fcntl64		155 /* Linux sparc32 Specific                      */
-#endif
-#define __NR_inotify_rm_watch   156 /* Linux specific				   */
-#define __NR_statfs             157 /* Common                                      */
-#define __NR_fstatfs            158 /* Common                                      */
-#define __NR_umount             159 /* Common                                      */
-#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS    */
-#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS           */
-#define __NR_getdomainname      162 /* SunOS Specific                              */
-#define __NR_setdomainname      163 /* Common                                      */
-#ifndef __32bit_syscall_numbers__
-#define __NR_utrap_install	164 /* SYSV ABI/v9 required			   */
-#endif
-#define __NR_quotactl           165 /* Common                                      */
-#define __NR_set_tid_address    166 /* Linux specific, exportfs under SunOS        */
-#define __NR_mount              167 /* Common                                      */
-#define __NR_ustat              168 /* Common                                      */
-#define __NR_setxattr           169 /* SunOS: semsys                               */
-#define __NR_lsetxattr          170 /* SunOS: msgsys                               */
-#define __NR_fsetxattr          171 /* SunOS: shmsys                               */
-#define __NR_getxattr           172 /* SunOS: auditsys                             */
-#define __NR_lgetxattr          173 /* SunOS: rfssys                               */
-#define __NR_getdents           174 /* Common                                      */
-#define __NR_setsid             175 /* Common                                      */
-#define __NR_fchdir             176 /* Common                                      */
-#define __NR_fgetxattr          177 /* SunOS: fchroot                              */
-#define __NR_listxattr          178 /* SunOS: vpixsys                              */
-#define __NR_llistxattr         179 /* SunOS: aioread                              */
-#define __NR_flistxattr         180 /* SunOS: aiowrite                             */
-#define __NR_removexattr        181 /* SunOS: aiowait                              */
-#define __NR_lremovexattr       182 /* SunOS: aiocancel                            */
-#define __NR_sigpending         183 /* Common                                      */
-#define __NR_query_module	184 /* Linux Specific				   */
-#define __NR_setpgid            185 /* Common                                      */
-#define __NR_fremovexattr       186 /* SunOS: pathconf                             */
-#define __NR_tkill              187 /* SunOS: fpathconf                            */
-#define __NR_exit_group		188 /* Linux specific, sysconf undef SunOS         */
-#define __NR_uname              189 /* Linux Specific                              */
-#define __NR_init_module        190 /* Linux Specific                              */
-#define __NR_personality        191 /* Linux Specific                              */
-#define __NR_remap_file_pages   192 /* Linux Specific                              */
-#define __NR_epoll_create       193 /* Linux Specific                              */
-#define __NR_epoll_ctl          194 /* Linux Specific                              */
-#define __NR_epoll_wait         195 /* Linux Specific                              */
-#define __NR_ioprio_set         196 /* Linux Specific                              */
-#define __NR_getppid            197 /* Linux Specific                              */
-#define __NR_sigaction          198 /* Linux Specific                              */
-#define __NR_sgetmask           199 /* Linux Specific                              */
-#define __NR_ssetmask           200 /* Linux Specific                              */
-#define __NR_sigsuspend         201 /* Linux Specific                              */
-#define __NR_oldlstat           202 /* Linux Specific                              */
-#define __NR_uselib             203 /* Linux Specific                              */
-#define __NR_readdir            204 /* Linux Specific                              */
-#define __NR_readahead          205 /* Linux Specific                              */
-#define __NR_socketcall         206 /* Linux Specific                              */
-#define __NR_syslog             207 /* Linux Specific                              */
-#define __NR_lookup_dcookie     208 /* Linux Specific                              */
-#define __NR_fadvise64          209 /* Linux Specific                              */
-#define __NR_fadvise64_64       210 /* Linux Specific                              */
-#define __NR_tgkill             211 /* Linux Specific                              */
-#define __NR_waitpid            212 /* Linux Specific                              */
-#define __NR_swapoff            213 /* Linux Specific                              */
-#define __NR_sysinfo            214 /* Linux Specific                              */
-#define __NR_ipc                215 /* Linux Specific                              */
-#define __NR_sigreturn          216 /* Linux Specific                              */
-#define __NR_clone              217 /* Linux Specific                              */
-#define __NR_ioprio_get         218 /* Linux Specific                              */
-#define __NR_adjtimex           219 /* Linux Specific                              */
-#define __NR_sigprocmask        220 /* Linux Specific                              */
-#define __NR_create_module      221 /* Linux Specific                              */
-#define __NR_delete_module      222 /* Linux Specific                              */
-#define __NR_get_kernel_syms    223 /* Linux Specific                              */
-#define __NR_getpgid            224 /* Linux Specific                              */
-#define __NR_bdflush            225 /* Linux Specific                              */
-#define __NR_sysfs              226 /* Linux Specific                              */
-#define __NR_afs_syscall        227 /* Linux Specific                              */
-#define __NR_setfsuid           228 /* Linux Specific                              */
-#define __NR_setfsgid           229 /* Linux Specific                              */
-#define __NR__newselect         230 /* Linux Specific                              */
 #ifdef __32bit_syscall_numbers__
-#define __NR_time               231 /* Linux Specific                              */
 #else
-#ifdef __KERNEL__
 #define __NR_time		231 /* Linux sparc32                               */
 #endif
-#endif
-#define __NR_splice             232 /* Linux Specific                              */
-#define __NR_stime              233 /* Linux Specific                              */
-#define __NR_statfs64           234 /* Linux Specific                              */
-#define __NR_fstatfs64          235 /* Linux Specific                              */
-#define __NR__llseek            236 /* Linux Specific                              */
-#define __NR_mlock              237
-#define __NR_munlock            238
-#define __NR_mlockall           239
-#define __NR_munlockall         240
-#define __NR_sched_setparam     241
-#define __NR_sched_getparam     242
-#define __NR_sched_setscheduler 243
-#define __NR_sched_getscheduler 244
-#define __NR_sched_yield        245
-#define __NR_sched_get_priority_max 246
-#define __NR_sched_get_priority_min 247
-#define __NR_sched_rr_get_interval  248
-#define __NR_nanosleep          249
-#define __NR_mremap             250
-#define __NR__sysctl            251
-#define __NR_getsid             252
-#define __NR_fdatasync          253
-#define __NR_nfsservctl         254
-#define __NR_sync_file_range	255
-#define __NR_clock_settime	256
-#define __NR_clock_gettime	257
-#define __NR_clock_getres	258
-#define __NR_clock_nanosleep	259
-#define __NR_sched_getaffinity	260
-#define __NR_sched_setaffinity	261
-#define __NR_timer_settime	262
-#define __NR_timer_gettime	263
-#define __NR_timer_getoverrun	264
-#define __NR_timer_delete	265
-#define __NR_timer_create	266
-/* #define __NR_vserver		267 Reserved for VSERVER */
-#define __NR_io_setup		268
-#define __NR_io_destroy		269
-#define __NR_io_submit		270
-#define __NR_io_cancel		271
-#define __NR_io_getevents	272
-#define __NR_mq_open		273
-#define __NR_mq_unlink		274
-#define __NR_mq_timedsend	275
-#define __NR_mq_timedreceive	276
-#define __NR_mq_notify		277
-#define __NR_mq_getsetattr	278
-#define __NR_waitid		279
-#define __NR_tee		280
-#define __NR_add_key		281
-#define __NR_request_key	282
-#define __NR_keyctl		283
-#define __NR_openat		284
-#define __NR_mkdirat		285
-#define __NR_mknodat		286
-#define __NR_fchownat		287
-#define __NR_futimesat		288
-#define __NR_fstatat64		289
-#define __NR_unlinkat		290
-#define __NR_renameat		291
-#define __NR_linkat		292
-#define __NR_symlinkat		293
-#define __NR_readlinkat		294
-#define __NR_fchmodat		295
-#define __NR_faccessat		296
-#define __NR_pselect6		297
-#define __NR_ppoll		298
-#define __NR_unshare		299
-#define __NR_set_robust_list	300
-#define __NR_get_robust_list	301
-#define __NR_migrate_pages	302
-#define __NR_mbind		303
-#define __NR_get_mempolicy	304
-#define __NR_set_mempolicy	305
-#define __NR_kexec_load		306
-#define __NR_move_pages		307
-#define __NR_getcpu		308
-#define __NR_epoll_pwait	309
-#define __NR_utimensat		310
-#define __NR_signalfd		311
-#define __NR_timerfd_create	312
-#define __NR_eventfd		313
-#define __NR_fallocate		314
-#define __NR_timerfd_settime	315
-#define __NR_timerfd_gettime	316
-#define __NR_signalfd4		317
-#define __NR_eventfd2		318
-#define __NR_epoll_create1	319
-#define __NR_dup3		320
-#define __NR_pipe2		321
-#define __NR_inotify_init1	322
-#define __NR_accept4		323
-#define __NR_preadv		324
-#define __NR_pwritev		325
-#define __NR_rt_tgsigqueueinfo	326
-#define __NR_perf_event_open	327
-#define __NR_recvmmsg		328
-#define __NR_fanotify_init	329
-#define __NR_fanotify_mark	330
-#define __NR_prlimit64		331
-#define __NR_name_to_handle_at	332
-#define __NR_open_by_handle_at	333
-#define __NR_clock_adjtime	334
-#define __NR_syncfs		335
-#define __NR_sendmmsg		336
-#define __NR_setns		337
-#define __NR_process_vm_readv	338
-#define __NR_process_vm_writev	339
-
-#define NR_syscalls		340
-
-#ifdef __32bit_syscall_numbers__
-/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
- * it never had the plain ones and there is no value to adding those
- * old versions into the syscall table.
- */
-#define __IGNORE_setresuid
-#define __IGNORE_getresuid
-#define __IGNORE_setresgid
-#define __IGNORE_getresgid
-#endif
-
-#ifdef __KERNEL__
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
@@ -458,5 +55,4 @@
  */
 #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
 
-#endif /* __KERNEL__ */
 #endif /* _SPARC_UNISTD_H */
diff --git a/arch/sparc/include/uapi/asm/Kbuild b/arch/sparc/include/uapi/asm/Kbuild
index 7518ad28696..ce175aff71b 100644
--- a/arch/sparc/include/uapi/asm/Kbuild
+++ b/arch/sparc/include/uapi/asm/Kbuild
@@ -3,3 +3,49 @@
 
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += apc.h
+header-y += asi.h
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += byteorder.h
+header-y += display7seg.h
+header-y += envctrl.h
+header-y += errno.h
+header-y += fbio.h
+header-y += fcntl.h
+header-y += ioctl.h
+header-y += ioctls.h
+header-y += ipcbuf.h
+header-y += jsflash.h
+header-y += kvm_para.h
+header-y += mman.h
+header-y += msgbuf.h
+header-y += openpromio.h
+header-y += param.h
+header-y += perfctr.h
+header-y += poll.h
+header-y += posix_types.h
+header-y += psr.h
+header-y += psrcompat.h
+header-y += pstate.h
+header-y += ptrace.h
+header-y += resource.h
+header-y += sembuf.h
+header-y += setup.h
+header-y += shmbuf.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += socket.h
+header-y += sockios.h
+header-y += stat.h
+header-y += statfs.h
+header-y += swab.h
+header-y += termbits.h
+header-y += termios.h
+header-y += traps.h
+header-y += types.h
+header-y += uctx.h
+header-y += unistd.h
+header-y += utrap.h
+header-y += watchdog.h
diff --git a/arch/sparc/include/asm/apc.h b/arch/sparc/include/uapi/asm/apc.h
index 24e9a7d4d97..24e9a7d4d97 100644
--- a/arch/sparc/include/asm/apc.h
+++ b/arch/sparc/include/uapi/asm/apc.h
diff --git a/arch/sparc/include/asm/asi.h b/arch/sparc/include/uapi/asm/asi.h
index cc0006dc5d4..aace6f31371 100644
--- a/arch/sparc/include/asm/asi.h
+++ b/arch/sparc/include/uapi/asm/asi.h
@@ -270,9 +270,28 @@
 #define ASI_BLK_INIT_QUAD_LDD_P	0xe2 /* (NG) init-store, twin load,
 				      * primary, implicit
 				      */
+#define ASI_BLK_INIT_QUAD_LDD_S	0xe3 /* (NG) init-store, twin load,
+				      * secondary, implicit
+				      */
 #define ASI_BLK_P		0xf0 /* Primary, blk ld/st		*/
 #define ASI_BLK_S		0xf1 /* Secondary, blk ld/st		*/
+#define ASI_ST_BLKINIT_MRU_P	0xf2 /* (NG4) init-store, twin load,
+				      * Most-Recently-Used, primary,
+				      * implicit
+				      */
+#define ASI_ST_BLKINIT_MRU_S	0xf2 /* (NG4) init-store, twin load,
+				      * Most-Recently-Used, secondary,
+				      * implicit
+				      */
 #define ASI_BLK_PL		0xf8 /* Primary, blk ld/st, little	*/
 #define ASI_BLK_SL		0xf9 /* Secondary, blk ld/st, little	*/
+#define ASI_ST_BLKINIT_MRU_PL	0xfa /* (NG4) init-store, twin load,
+				      * Most-Recently-Used, primary,
+				      * implicit, little-endian
+				      */
+#define ASI_ST_BLKINIT_MRU_SL	0xfb /* (NG4) init-store, twin load,
+				      * Most-Recently-Used, secondary,
+				      * implicit, little-endian
+				      */
 
 #endif /* _SPARC_ASI_H */
diff --git a/arch/sparc/include/asm/auxvec.h b/arch/sparc/include/uapi/asm/auxvec.h
index ad6f360261f..ad6f360261f 100644
--- a/arch/sparc/include/asm/auxvec.h
+++ b/arch/sparc/include/uapi/asm/auxvec.h
diff --git a/arch/sparc/include/asm/bitsperlong.h b/arch/sparc/include/uapi/asm/bitsperlong.h
index 40dcaa3aaa5..40dcaa3aaa5 100644
--- a/arch/sparc/include/asm/bitsperlong.h
+++ b/arch/sparc/include/uapi/asm/bitsperlong.h
diff --git a/arch/sparc/include/asm/byteorder.h b/arch/sparc/include/uapi/asm/byteorder.h
index ccc1b6b7de6..ccc1b6b7de6 100644
--- a/arch/sparc/include/asm/byteorder.h
+++ b/arch/sparc/include/uapi/asm/byteorder.h
diff --git a/arch/sparc/include/asm/display7seg.h b/arch/sparc/include/uapi/asm/display7seg.h
index 86d4a901df2..86d4a901df2 100644
--- a/arch/sparc/include/asm/display7seg.h
+++ b/arch/sparc/include/uapi/asm/display7seg.h
diff --git a/arch/sparc/include/asm/envctrl.h b/arch/sparc/include/uapi/asm/envctrl.h
index 624fa7e2da8..624fa7e2da8 100644
--- a/arch/sparc/include/asm/envctrl.h
+++ b/arch/sparc/include/uapi/asm/envctrl.h
diff --git a/arch/sparc/include/asm/errno.h b/arch/sparc/include/uapi/asm/errno.h
index c351aba997b..c351aba997b 100644
--- a/arch/sparc/include/asm/errno.h
+++ b/arch/sparc/include/uapi/asm/errno.h
diff --git a/arch/sparc/include/uapi/asm/fbio.h b/arch/sparc/include/uapi/asm/fbio.h
new file mode 100644
index 00000000000..d6cea07afb6
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/fbio.h
@@ -0,0 +1,259 @@
+#ifndef _UAPI__LINUX_FBIO_H
+#define _UAPI__LINUX_FBIO_H
+
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+/* Constants used for fbio SunOS compatibility */
+/* (C) 1996 Miguel de Icaza */
+
+/* Frame buffer types */
+#define FBTYPE_NOTYPE           -1
+#define FBTYPE_SUN1BW           0   /* mono */
+#define FBTYPE_SUN1COLOR        1 
+#define FBTYPE_SUN2BW           2 
+#define FBTYPE_SUN2COLOR        3 
+#define FBTYPE_SUN2GP           4 
+#define FBTYPE_SUN5COLOR        5 
+#define FBTYPE_SUN3COLOR        6 
+#define FBTYPE_MEMCOLOR         7 
+#define FBTYPE_SUN4COLOR        8 
+ 
+#define FBTYPE_NOTSUN1          9 
+#define FBTYPE_NOTSUN2          10
+#define FBTYPE_NOTSUN3          11
+ 
+#define FBTYPE_SUNFAST_COLOR    12  /* cg6 */
+#define FBTYPE_SUNROP_COLOR     13
+#define FBTYPE_SUNFB_VIDEO      14
+#define FBTYPE_SUNGIFB          15
+#define FBTYPE_SUNGPLAS         16
+#define FBTYPE_SUNGP3           17
+#define FBTYPE_SUNGT            18
+#define FBTYPE_SUNLEO           19      /* zx Leo card */
+#define FBTYPE_MDICOLOR         20      /* cg14 */
+#define FBTYPE_TCXCOLOR		21	/* SUNW,tcx card */
+
+#define FBTYPE_LASTPLUSONE      21	/* This is not last + 1 in fact... */
+
+/* Does not seem to be listed in the Sun file either */
+#define FBTYPE_CREATOR          22
+#define FBTYPE_PCI_IGA1682	23
+#define FBTYPE_P9100COLOR	24
+
+#define FBTYPE_PCI_GENERIC	1000
+#define FBTYPE_PCI_MACH64	1001
+
+/* fbio ioctls */
+/* Returned by FBIOGTYPE */
+struct  fbtype {
+        int     fb_type;        /* fb type, see above */
+        int     fb_height;      /* pixels */
+        int     fb_width;       /* pixels */
+        int     fb_depth;
+        int     fb_cmsize;      /* color map entries */
+        int     fb_size;        /* fb size in bytes */
+};
+#define FBIOGTYPE _IOR('F', 0, struct fbtype)
+
+struct  fbcmap {
+        int             index;          /* first element (0 origin) */
+        int             count;
+        unsigned char   __user *red;
+        unsigned char   __user *green;
+        unsigned char   __user *blue;
+};
+
+#ifndef __KERNEL__
+#define FBIOPUTCMAP _IOW('F', 3, struct fbcmap)
+#define FBIOGETCMAP _IOW('F', 4, struct fbcmap)
+#endif
+
+/* # of device specific values */
+#define FB_ATTR_NDEVSPECIFIC    8
+/* # of possible emulations */
+#define FB_ATTR_NEMUTYPES       4
+ 
+struct fbsattr {
+        int     flags;
+        int     emu_type;	/* -1 if none */
+        int     dev_specific[FB_ATTR_NDEVSPECIFIC];
+};
+ 
+struct fbgattr {
+        int     real_type;	/* real frame buffer type */
+        int     owner;		/* unknown */
+        struct fbtype fbtype;	/* real frame buffer fbtype */
+        struct fbsattr sattr;   
+        int     emu_types[FB_ATTR_NEMUTYPES]; /* supported emulations */
+};
+#define FBIOSATTR  _IOW('F', 5, struct fbgattr) /* Unsupported: */
+#define FBIOGATTR  _IOR('F', 6, struct fbgattr)	/* supported */
+
+#define FBIOSVIDEO _IOW('F', 7, int)
+#define FBIOGVIDEO _IOR('F', 8, int)
+
+struct fbcursor {
+        short set;              /* what to set, choose from the list above */
+        short enable;           /* cursor on/off */
+        struct fbcurpos pos;    /* cursor position */
+        struct fbcurpos hot;    /* cursor hot spot */
+        struct fbcmap cmap;     /* color map info */
+        struct fbcurpos size;   /* cursor bit map size */
+        char __user *image;     /* cursor image bits */
+        char __user *mask;      /* cursor mask bits */
+};
+
+/* set/get cursor attributes/shape */
+#define FBIOSCURSOR     _IOW('F', 24, struct fbcursor)
+#define FBIOGCURSOR     _IOWR('F', 25, struct fbcursor)
+ 
+/* set/get cursor position */
+#define FBIOSCURPOS     _IOW('F', 26, struct fbcurpos)
+#define FBIOGCURPOS     _IOW('F', 27, struct fbcurpos)
+ 
+/* get max cursor size */
+#define FBIOGCURMAX     _IOR('F', 28, struct fbcurpos)
+
+/* wid manipulation */
+struct fb_wid_alloc {
+#define FB_WID_SHARED_8		0
+#define FB_WID_SHARED_24	1
+#define FB_WID_DBL_8		2
+#define FB_WID_DBL_24		3
+	__u32	wa_type;
+	__s32	wa_index;	/* Set on return */
+	__u32	wa_count;	
+};
+struct fb_wid_item {
+	__u32	wi_type;
+	__s32	wi_index;
+	__u32	wi_attrs;
+	__u32	wi_values[32];
+};
+struct fb_wid_list {
+	__u32	wl_flags;
+	__u32	wl_count;
+	struct fb_wid_item	*wl_list;
+};
+
+#define FBIO_WID_ALLOC	_IOWR('F', 30, struct fb_wid_alloc)
+#define FBIO_WID_FREE	_IOW('F', 31, struct fb_wid_alloc)
+#define FBIO_WID_PUT	_IOW('F', 32, struct fb_wid_list)
+#define FBIO_WID_GET	_IOWR('F', 33, struct fb_wid_list)
+
+/* Creator ioctls */
+#define FFB_IOCTL	('F'<<8)
+#define FFB_SYS_INFO		(FFB_IOCTL|80)
+#define FFB_CLUTREAD		(FFB_IOCTL|81)
+#define FFB_CLUTPOST		(FFB_IOCTL|82)
+#define FFB_SETDIAGMODE		(FFB_IOCTL|83)
+#define FFB_GETMONITORID	(FFB_IOCTL|84)
+#define FFB_GETVIDEOMODE	(FFB_IOCTL|85)
+#define FFB_SETVIDEOMODE	(FFB_IOCTL|86)
+#define FFB_SETSERVER		(FFB_IOCTL|87)
+#define FFB_SETOVCTL		(FFB_IOCTL|88)
+#define FFB_GETOVCTL		(FFB_IOCTL|89)
+#define FFB_GETSAXNUM		(FFB_IOCTL|90)
+#define FFB_FBDEBUG		(FFB_IOCTL|91)
+
+/* Cg14 ioctls */
+#define MDI_IOCTL          ('M'<<8)
+#define MDI_RESET          (MDI_IOCTL|1)
+#define MDI_GET_CFGINFO    (MDI_IOCTL|2)
+#define MDI_SET_PIXELMODE  (MDI_IOCTL|3)
+#    define MDI_32_PIX     32
+#    define MDI_16_PIX     16
+#    define MDI_8_PIX      8
+
+struct mdi_cfginfo {
+	int     mdi_ncluts;     /* Number of implemented CLUTs in this MDI */
+        int     mdi_type;       /* FBTYPE name */
+        int     mdi_height;     /* height */
+        int     mdi_width;      /* width */
+        int     mdi_size;       /* available ram */
+        int     mdi_mode;       /* 8bpp, 16bpp or 32bpp */
+        int     mdi_pixfreq;    /* pixel clock (from PROM) */
+};
+
+/* SparcLinux specific ioctl for the MDI, should be replaced for
+ * the SET_XLUT/SET_CLUTn ioctls instead
+ */
+#define MDI_CLEAR_XLUT       (MDI_IOCTL|9)
+
+/* leo & ffb ioctls */
+struct fb_clut_alloc {
+	__u32	clutid;	/* Set on return */
+ 	__u32	flag;
+ 	__u32	index;
+};
+
+struct fb_clut {
+#define FB_CLUT_WAIT	0x00000001	/* Not yet implemented */
+ 	__u32	flag;
+ 	__u32	clutid;
+ 	__u32	offset;
+ 	__u32	count;
+ 	char *	red;
+ 	char *	green;
+ 	char *	blue;
+};
+
+struct fb_clut32 {
+ 	__u32	flag;
+ 	__u32	clutid;
+ 	__u32	offset;
+ 	__u32	count;
+ 	__u32	red;
+ 	__u32	green;
+ 	__u32	blue;
+};
+
+#define LEO_CLUTALLOC	_IOWR('L', 53, struct fb_clut_alloc)
+#define LEO_CLUTFREE	_IOW('L', 54, struct fb_clut_alloc)
+#define LEO_CLUTREAD	_IOW('L', 55, struct fb_clut)
+#define LEO_CLUTPOST	_IOW('L', 56, struct fb_clut)
+#define LEO_SETGAMMA	_IOW('L', 68, int) /* Not yet implemented */
+#define LEO_GETGAMMA	_IOR('L', 69, int) /* Not yet implemented */
+
+
+/* These are exported to userland for applications to use */
+/* Mappable offsets for the cg14: control registers */
+#define MDI_DIRECT_MAP 0x10000000
+#define MDI_CTLREG_MAP 0x20000000
+#define MDI_CURSOR_MAP 0x30000000
+#define MDI_SHDW_VRT_MAP 0x40000000
+
+/* Mappable offsets for the cg14: frame buffer resolutions */
+/* 32 bits */
+#define MDI_CHUNKY_XBGR_MAP 0x50000000
+#define MDI_CHUNKY_BGR_MAP 0x60000000
+
+/* 16 bits */
+#define MDI_PLANAR_X16_MAP 0x70000000
+#define MDI_PLANAR_C16_MAP 0x80000000
+
+/* 8 bit is done as CG3 MMAP offset */
+/* 32 bits, planar */
+#define MDI_PLANAR_X32_MAP 0x90000000
+#define MDI_PLANAR_B32_MAP 0xa0000000
+#define MDI_PLANAR_G32_MAP 0xb0000000
+#define MDI_PLANAR_R32_MAP 0xc0000000
+
+/* Mappable offsets on leo */
+#define LEO_SS0_MAP            0x00000000
+#define LEO_LC_SS0_USR_MAP     0x00800000
+#define LEO_LD_SS0_MAP         0x00801000
+#define LEO_LX_CURSOR_MAP      0x00802000
+#define LEO_SS1_MAP            0x00803000
+#define LEO_LC_SS1_USR_MAP     0x01003000
+#define LEO_LD_SS1_MAP         0x01004000
+#define LEO_UNK_MAP            0x01005000
+#define LEO_LX_KRN_MAP         0x01006000
+#define LEO_LC_SS0_KRN_MAP     0x01007000
+#define LEO_LC_SS1_KRN_MAP     0x01008000
+#define LEO_LD_GBL_MAP         0x01009000
+#define LEO_UNK2_MAP           0x0100a000
+
+
+#endif /* _UAPI__LINUX_FBIO_H */
diff --git a/arch/sparc/include/asm/fcntl.h b/arch/sparc/include/uapi/asm/fcntl.h
index d0b83f66f35..d0b83f66f35 100644
--- a/arch/sparc/include/asm/fcntl.h
+++ b/arch/sparc/include/uapi/asm/fcntl.h
diff --git a/arch/sparc/include/asm/ioctl.h b/arch/sparc/include/uapi/asm/ioctl.h
index 7d6bd51321b..7d6bd51321b 100644
--- a/arch/sparc/include/asm/ioctl.h
+++ b/arch/sparc/include/uapi/asm/ioctl.h
diff --git a/arch/sparc/include/uapi/asm/ioctls.h b/arch/sparc/include/uapi/asm/ioctls.h
new file mode 100644
index 00000000000..9155f7041d4
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/ioctls.h
@@ -0,0 +1,131 @@
+#ifndef _UAPI_ASM_SPARC_IOCTLS_H
+#define _UAPI_ASM_SPARC_IOCTLS_H
+
+#include <asm/ioctl.h>
+
+/* Big T */
+#define TCGETA		_IOR('T', 1, struct termio)
+#define TCSETA		_IOW('T', 2, struct termio)
+#define TCSETAW		_IOW('T', 3, struct termio)
+#define TCSETAF		_IOW('T', 4, struct termio)
+#define TCSBRK		_IO('T', 5)
+#define TCXONC		_IO('T', 6)
+#define TCFLSH		_IO('T', 7)
+#define TCGETS		_IOR('T', 8, struct termios)
+#define TCSETS		_IOW('T', 9, struct termios)
+#define TCSETSW		_IOW('T', 10, struct termios)
+#define TCSETSF		_IOW('T', 11, struct termios)
+#define TCGETS2		_IOR('T', 12, struct termios2)
+#define TCSETS2		_IOW('T', 13, struct termios2)
+#define TCSETSW2	_IOW('T', 14, struct termios2)
+#define TCSETSF2	_IOW('T', 15, struct termios2)
+#define TIOCGDEV	_IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
+#define TIOCVHANGUP	_IO('T', 0x37)
+
+/* Note that all the ioctls that are not available in Linux have a 
+ * double underscore on the front to: a) avoid some programs to
+ * think we support some ioctls under Linux (autoconfiguration stuff)
+ */
+/* Little t */
+#define TIOCGETD	_IOR('t', 0, int)
+#define TIOCSETD	_IOW('t', 1, int)
+#define __TIOCHPCL        _IO('t', 2) /* SunOS Specific */
+#define __TIOCMODG        _IOR('t', 3, int) /* SunOS Specific */
+#define __TIOCMODS        _IOW('t', 4, int) /* SunOS Specific */
+#define __TIOCGETP        _IOR('t', 8, struct sgttyb) /* SunOS Specific */
+#define __TIOCSETP        _IOW('t', 9, struct sgttyb) /* SunOS Specific */
+#define __TIOCSETN        _IOW('t', 10, struct sgttyb) /* SunOS Specific */
+#define TIOCEXCL	_IO('t', 13)
+#define TIOCNXCL	_IO('t', 14)
+#define __TIOCFLUSH       _IOW('t', 16, int) /* SunOS Specific */
+#define __TIOCSETC        _IOW('t', 17, struct tchars) /* SunOS Specific */
+#define __TIOCGETC        _IOR('t', 18, struct tchars) /* SunOS Specific */
+#define __TIOCTCNTL       _IOW('t', 32, int) /* SunOS Specific */
+#define __TIOCSIGNAL      _IOW('t', 33, int) /* SunOS Specific */
+#define __TIOCSETX        _IOW('t', 34, int) /* SunOS Specific */
+#define __TIOCGETX        _IOR('t', 35, int) /* SunOS Specific */
+#define TIOCCONS	_IO('t', 36)
+#define TIOCGSOFTCAR	_IOR('t', 100, int)
+#define TIOCSSOFTCAR	_IOW('t', 101, int)
+#define __TIOCUCNTL       _IOW('t', 102, int) /* SunOS Specific */
+#define TIOCSWINSZ	_IOW('t', 103, struct winsize)
+#define TIOCGWINSZ	_IOR('t', 104, struct winsize)
+#define __TIOCREMOTE      _IOW('t', 105, int) /* SunOS Specific */
+#define TIOCMGET	_IOR('t', 106, int)
+#define TIOCMBIC	_IOW('t', 107, int)
+#define TIOCMBIS	_IOW('t', 108, int)
+#define TIOCMSET	_IOW('t', 109, int)
+#define TIOCSTART       _IO('t', 110)
+#define TIOCSTOP        _IO('t', 111)
+#define TIOCPKT		_IOW('t', 112, int)
+#define TIOCNOTTY	_IO('t', 113)
+#define TIOCSTI		_IOW('t', 114, char)
+#define TIOCOUTQ	_IOR('t', 115, int)
+#define __TIOCGLTC        _IOR('t', 116, struct ltchars) /* SunOS Specific */
+#define __TIOCSLTC        _IOW('t', 117, struct ltchars) /* SunOS Specific */
+/* 118 is the non-posix setpgrp tty ioctl */
+/* 119 is the non-posix getpgrp tty ioctl */
+#define __TIOCCDTR        _IO('t', 120) /* SunOS Specific */
+#define __TIOCSDTR        _IO('t', 121) /* SunOS Specific */
+#define TIOCCBRK        _IO('t', 122)
+#define TIOCSBRK        _IO('t', 123)
+#define __TIOCLGET        _IOW('t', 124, int) /* SunOS Specific */
+#define __TIOCLSET        _IOW('t', 125, int) /* SunOS Specific */
+#define __TIOCLBIC        _IOW('t', 126, int) /* SunOS Specific */
+#define __TIOCLBIS        _IOW('t', 127, int) /* SunOS Specific */
+#define __TIOCISPACE      _IOR('t', 128, int) /* SunOS Specific */
+#define __TIOCISIZE       _IOR('t', 129, int) /* SunOS Specific */
+#define TIOCSPGRP	_IOW('t', 130, int)
+#define TIOCGPGRP	_IOR('t', 131, int)
+#define TIOCSCTTY	_IO('t', 132)
+#define TIOCGSID	_IOR('t', 133, int)
+/* Get minor device of a pty master's FD -- Solaris equiv is ISPTM */
+#define TIOCGPTN	_IOR('t', 134, unsigned int) /* Get Pty Number */
+#define TIOCSPTLCK	_IOW('t', 135, int) /* Lock/unlock PTY */
+#define TIOCSIG		_IOW('t', 136, int) /* Generate signal on Pty slave */
+
+/* Little f */
+#define FIOCLEX		_IO('f', 1)
+#define FIONCLEX	_IO('f', 2)
+#define FIOASYNC	_IOW('f', 125, int)
+#define FIONBIO		_IOW('f', 126, int)
+#define FIONREAD	_IOR('f', 127, int)
+#define TIOCINQ		FIONREAD
+#define FIOQSIZE	_IOR('f', 128, loff_t)
+
+/* SCARY Rutgers local SunOS kernel hackery, perhaps I will support it
+ * someday.  This is completely bogus, I know...
+ */
+#define __TCGETSTAT       _IO('T', 200) /* Rutgers specific */
+#define __TCSETSTAT       _IO('T', 201) /* Rutgers specific */
+
+/* Linux specific, no SunOS equivalent. */
+#define TIOCLINUX	0x541C
+#define TIOCGSERIAL	0x541E
+#define TIOCSSERIAL	0x541F
+#define TCSBRKP		0x5425
+#define TIOCSERCONFIG	0x5453
+#define TIOCSERGWILD	0x5454
+#define TIOCSERSWILD	0x5455
+#define TIOCGLCKTRMIOS	0x5456
+#define TIOCSLCKTRMIOS	0x5457
+#define TIOCSERGSTRUCT	0x5458 /* For debugging only */
+#define TIOCSERGETLSR   0x5459 /* Get line status register */
+#define TIOCSERGETMULTI 0x545A /* Get multiport config  */
+#define TIOCSERSETMULTI 0x545B /* Set multiport config */
+#define TIOCMIWAIT	0x545C /* Wait for change on serial input line(s) */
+#define TIOCGICOUNT	0x545D /* Read serial port inline interrupt counts */
+
+/* Kernel definitions */
+
+/* Used for packet mode */
+#define TIOCPKT_DATA		 0
+#define TIOCPKT_FLUSHREAD	 1
+#define TIOCPKT_FLUSHWRITE	 2
+#define TIOCPKT_STOP		 4
+#define TIOCPKT_START		 8
+#define TIOCPKT_NOSTOP		16
+#define TIOCPKT_DOSTOP		32
+#define TIOCPKT_IOCTL		64
+
+#endif /* _UAPI_ASM_SPARC_IOCTLS_H */
diff --git a/arch/sparc/include/asm/ipcbuf.h b/arch/sparc/include/uapi/asm/ipcbuf.h
index 66013b4fe10..66013b4fe10 100644
--- a/arch/sparc/include/asm/ipcbuf.h
+++ b/arch/sparc/include/uapi/asm/ipcbuf.h
diff --git a/arch/sparc/include/asm/jsflash.h b/arch/sparc/include/uapi/asm/jsflash.h
index 0717d9e39d2..0717d9e39d2 100644
--- a/arch/sparc/include/asm/jsflash.h
+++ b/arch/sparc/include/uapi/asm/jsflash.h
diff --git a/arch/sparc/include/asm/kvm_para.h b/arch/sparc/include/uapi/asm/kvm_para.h
index 14fab8f0b95..14fab8f0b95 100644
--- a/arch/sparc/include/asm/kvm_para.h
+++ b/arch/sparc/include/uapi/asm/kvm_para.h
diff --git a/arch/sparc/include/uapi/asm/mman.h b/arch/sparc/include/uapi/asm/mman.h
new file mode 100644
index 00000000000..0b14df33cff
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/mman.h
@@ -0,0 +1,27 @@
+#ifndef _UAPI__SPARC_MMAN_H__
+#define _UAPI__SPARC_MMAN_H__
+
+#include <asm-generic/mman-common.h>
+
+/* SunOS'ified... */
+
+#define MAP_RENAME      MAP_ANONYMOUS   /* In SunOS terminology */
+#define MAP_NORESERVE   0x40            /* don't reserve swap pages */
+#define MAP_INHERIT     0x80            /* SunOS doesn't do this, but... */
+#define MAP_LOCKED      0x100           /* lock the mapping */
+#define _MAP_NEW        0x80000000      /* Binary compatibility is fun... */
+
+#define MAP_GROWSDOWN	0x0200		/* stack-like segment */
+#define MAP_DENYWRITE	0x0800		/* ETXTBSY */
+#define MAP_EXECUTABLE	0x1000		/* mark it as an executable */
+
+#define MCL_CURRENT     0x2000          /* lock all currently mapped pages */
+#define MCL_FUTURE      0x4000          /* lock all additions to address space */
+
+#define MAP_POPULATE	0x8000		/* populate (prefault) pagetables */
+#define MAP_NONBLOCK	0x10000		/* do not block on IO */
+#define MAP_STACK	0x20000		/* give out an address that is best suited for process/thread stacks */
+#define MAP_HUGETLB	0x40000		/* create a huge page mapping */
+
+
+#endif /* _UAPI__SPARC_MMAN_H__ */
diff --git a/arch/sparc/include/asm/msgbuf.h b/arch/sparc/include/uapi/asm/msgbuf.h
index efc7cbe9788..efc7cbe9788 100644
--- a/arch/sparc/include/asm/msgbuf.h
+++ b/arch/sparc/include/uapi/asm/msgbuf.h
diff --git a/arch/sparc/include/asm/openpromio.h b/arch/sparc/include/uapi/asm/openpromio.h
index 917fb8e9c63..917fb8e9c63 100644
--- a/arch/sparc/include/asm/openpromio.h
+++ b/arch/sparc/include/uapi/asm/openpromio.h
diff --git a/arch/sparc/include/asm/param.h b/arch/sparc/include/uapi/asm/param.h
index 0bc356bf8c5..0bc356bf8c5 100644
--- a/arch/sparc/include/asm/param.h
+++ b/arch/sparc/include/uapi/asm/param.h
diff --git a/arch/sparc/include/asm/perfctr.h b/arch/sparc/include/uapi/asm/perfctr.h
index 214feefa577..214feefa577 100644
--- a/arch/sparc/include/asm/perfctr.h
+++ b/arch/sparc/include/uapi/asm/perfctr.h
diff --git a/arch/sparc/include/asm/poll.h b/arch/sparc/include/uapi/asm/poll.h
index 091d3ad2e83..091d3ad2e83 100644
--- a/arch/sparc/include/asm/poll.h
+++ b/arch/sparc/include/uapi/asm/poll.h
diff --git a/arch/sparc/include/asm/posix_types.h b/arch/sparc/include/uapi/asm/posix_types.h
index 156220ed99e..156220ed99e 100644
--- a/arch/sparc/include/asm/posix_types.h
+++ b/arch/sparc/include/uapi/asm/posix_types.h
diff --git a/arch/sparc/include/uapi/asm/psr.h b/arch/sparc/include/uapi/asm/psr.h
new file mode 100644
index 00000000000..2f0ed856530
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/psr.h
@@ -0,0 +1,47 @@
+/*
+ * psr.h: This file holds the macros for masking off various parts of
+ *        the processor status register on the Sparc. This is valid
+ *        for Version 8. On the V9 this is renamed to the PSTATE
+ *        register and its members are accessed as fields like
+ *        PSTATE.PRIV for the current CPU privilege level.
+ *
+ * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _UAPI__LINUX_SPARC_PSR_H
+#define _UAPI__LINUX_SPARC_PSR_H
+
+/* The Sparc PSR fields are laid out as the following:
+ *
+ *  ------------------------------------------------------------------------
+ *  | impl  | vers  | icc   | resv  | EC | EF | PIL  | S | PS | ET |  CWP  |
+ *  | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6  | 5  |  4-0  |
+ *  ------------------------------------------------------------------------
+ */
+#define PSR_CWP     0x0000001f         /* current window pointer     */
+#define PSR_ET      0x00000020         /* enable traps field         */
+#define PSR_PS      0x00000040         /* previous privilege level   */
+#define PSR_S       0x00000080         /* current privilege level    */
+#define PSR_PIL     0x00000f00         /* processor interrupt level  */
+#define PSR_EF      0x00001000         /* enable floating point      */
+#define PSR_EC      0x00002000         /* enable co-processor        */
+#define PSR_SYSCALL 0x00004000         /* inside of a syscall        */
+#define PSR_LE      0x00008000         /* SuperSparcII little-endian */
+#define PSR_ICC     0x00f00000         /* integer condition codes    */
+#define PSR_C       0x00100000         /* carry bit                  */
+#define PSR_V       0x00200000         /* overflow bit               */
+#define PSR_Z       0x00400000         /* zero bit                   */
+#define PSR_N       0x00800000         /* negative bit               */
+#define PSR_VERS    0x0f000000         /* cpu-version field          */
+#define PSR_IMPL    0xf0000000         /* cpu-implementation field   */
+
+#define PSR_VERS_SHIFT		24
+#define PSR_IMPL_SHIFT		28
+#define PSR_VERS_SHIFTED_MASK	0xf
+#define PSR_IMPL_SHIFTED_MASK	0xf
+
+#define PSR_IMPL_TI		0x4
+#define PSR_IMPL_LEON		0xf
+
+
+#endif /* _UAPI__LINUX_SPARC_PSR_H */
diff --git a/arch/sparc/include/asm/psrcompat.h b/arch/sparc/include/uapi/asm/psrcompat.h
index 44b6327dbbf..44b6327dbbf 100644
--- a/arch/sparc/include/asm/psrcompat.h
+++ b/arch/sparc/include/uapi/asm/psrcompat.h
diff --git a/arch/sparc/include/asm/pstate.h b/arch/sparc/include/uapi/asm/pstate.h
index 4b6b998afd9..4b6b998afd9 100644
--- a/arch/sparc/include/asm/pstate.h
+++ b/arch/sparc/include/uapi/asm/pstate.h
diff --git a/arch/sparc/include/uapi/asm/ptrace.h b/arch/sparc/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..56fe4ea73fe
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/ptrace.h
@@ -0,0 +1,352 @@
+#ifndef _UAPI__SPARC_PTRACE_H
+#define _UAPI__SPARC_PTRACE_H
+
+#if defined(__sparc__) && defined(__arch64__)
+/* 64 bit sparc */
+#include <asm/pstate.h>
+
+/* This struct defines the way the registers are stored on the
+ * stack during a system call and basically all traps.
+ */
+
+/* This magic value must have the low 9 bits clear,
+ * as that is where we encode the %tt value, see below.
+ */
+#define PT_REGS_MAGIC 0x57ac6c00
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+struct pt_regs {
+	unsigned long u_regs[16]; /* globals and ins */
+	unsigned long tstate;
+	unsigned long tpc;
+	unsigned long tnpc;
+	unsigned int y;
+
+	/* We encode a magic number, PT_REGS_MAGIC, along
+	 * with the %tt (trap type) register value at trap
+	 * entry time.  The magic number allows us to identify
+	 * accurately a trap stack frame in the stack
+	 * unwinder, and the %tt value allows us to test
+	 * things like "in a system call" etc. for an arbitray
+	 * process.
+	 *
+	 * The PT_REGS_MAGIC is chosen such that it can be
+	 * loaded completely using just a sethi instruction.
+	 */
+	unsigned int magic;
+};
+
+struct pt_regs32 {
+	unsigned int psr;
+	unsigned int pc;
+	unsigned int npc;
+	unsigned int y;
+	unsigned int u_regs[16]; /* globals and ins */
+};
+
+/* A V9 register window */
+struct reg_window {
+	unsigned long locals[8];
+	unsigned long ins[8];
+};
+
+/* A 32-bit register window. */
+struct reg_window32 {
+	unsigned int locals[8];
+	unsigned int ins[8];
+};
+
+/* A V9 Sparc stack frame */
+struct sparc_stackf {
+	unsigned long locals[8];
+        unsigned long ins[6];
+	struct sparc_stackf *fp;
+	unsigned long callers_pc;
+	char *structptr;
+	unsigned long xargs[6];
+	unsigned long xxargs[1];
+};
+
+/* A 32-bit Sparc stack frame */
+struct sparc_stackf32 {
+	unsigned int locals[8];
+        unsigned int ins[6];
+	unsigned int fp;
+	unsigned int callers_pc;
+	unsigned int structptr;
+	unsigned int xargs[6];
+	unsigned int xxargs[1];
+};
+
+struct sparc_trapf {
+	unsigned long locals[8];
+	unsigned long ins[8];
+	unsigned long _unused;
+	struct pt_regs *regs;
+};
+#endif /* (!__ASSEMBLY__) */
+#else
+/* 32 bit sparc */
+
+#include <asm/psr.h>
+
+/* This struct defines the way the registers are stored on the
+ * stack during a system call and basically all traps.
+ */
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+struct pt_regs {
+	unsigned long psr;
+	unsigned long pc;
+	unsigned long npc;
+	unsigned long y;
+	unsigned long u_regs[16]; /* globals and ins */
+};
+
+/* A 32-bit register window. */
+struct reg_window32 {
+	unsigned long locals[8];
+	unsigned long ins[8];
+};
+
+/* A Sparc stack frame */
+struct sparc_stackf {
+	unsigned long locals[8];
+        unsigned long ins[6];
+	struct sparc_stackf *fp;
+	unsigned long callers_pc;
+	char *structptr;
+	unsigned long xargs[6];
+	unsigned long xxargs[1];
+};
+#endif /* (!__ASSEMBLY__) */
+
+#endif /* (defined(__sparc__) && defined(__arch64__))*/
+
+#ifndef __ASSEMBLY__
+
+#define TRACEREG_SZ	sizeof(struct pt_regs)
+#define STACKFRAME_SZ	sizeof(struct sparc_stackf)
+
+#define TRACEREG32_SZ	sizeof(struct pt_regs32)
+#define STACKFRAME32_SZ	sizeof(struct sparc_stackf32)
+
+#endif /* (!__ASSEMBLY__) */
+
+#define UREG_G0        0
+#define UREG_G1        1
+#define UREG_G2        2
+#define UREG_G3        3
+#define UREG_G4        4
+#define UREG_G5        5
+#define UREG_G6        6
+#define UREG_G7        7
+#define UREG_I0        8
+#define UREG_I1        9
+#define UREG_I2        10
+#define UREG_I3        11
+#define UREG_I4        12
+#define UREG_I5        13
+#define UREG_I6        14
+#define UREG_I7        15
+#define UREG_FP        UREG_I6
+#define UREG_RETPC     UREG_I7
+
+#if defined(__sparc__) && defined(__arch64__)
+/* 64 bit sparc */
+
+#ifndef __ASSEMBLY__
+
+
+#else /* __ASSEMBLY__ */
+/* For assembly code. */
+#define TRACEREG_SZ		0xa0
+#define STACKFRAME_SZ		0xc0
+
+#define TRACEREG32_SZ		0x50
+#define STACKFRAME32_SZ		0x60
+#endif /* __ASSEMBLY__ */
+
+#else /* (defined(__sparc__) && defined(__arch64__)) */
+
+/* 32 bit sparc */
+
+#ifndef __ASSEMBLY__
+
+
+#else /* (!__ASSEMBLY__) */
+/* For assembly code. */
+#define TRACEREG_SZ       0x50
+#define STACKFRAME_SZ     0x60
+#endif /* (!__ASSEMBLY__) */
+
+#endif /* (defined(__sparc__) && defined(__arch64__)) */
+
+
+/* These are for pt_regs. */
+#define PT_V9_G0     0x00
+#define PT_V9_G1     0x08
+#define PT_V9_G2     0x10
+#define PT_V9_G3     0x18
+#define PT_V9_G4     0x20
+#define PT_V9_G5     0x28
+#define PT_V9_G6     0x30
+#define PT_V9_G7     0x38
+#define PT_V9_I0     0x40
+#define PT_V9_I1     0x48
+#define PT_V9_I2     0x50
+#define PT_V9_I3     0x58
+#define PT_V9_I4     0x60
+#define PT_V9_I5     0x68
+#define PT_V9_I6     0x70
+#define PT_V9_FP     PT_V9_I6
+#define PT_V9_I7     0x78
+#define PT_V9_TSTATE 0x80
+#define PT_V9_TPC    0x88
+#define PT_V9_TNPC   0x90
+#define PT_V9_Y      0x98
+#define PT_V9_MAGIC  0x9c
+#define PT_TSTATE	PT_V9_TSTATE
+#define PT_TPC		PT_V9_TPC
+#define PT_TNPC		PT_V9_TNPC
+
+/* These for pt_regs32. */
+#define PT_PSR    0x0
+#define PT_PC     0x4
+#define PT_NPC    0x8
+#define PT_Y      0xc
+#define PT_G0     0x10
+#define PT_WIM    PT_G0
+#define PT_G1     0x14
+#define PT_G2     0x18
+#define PT_G3     0x1c
+#define PT_G4     0x20
+#define PT_G5     0x24
+#define PT_G6     0x28
+#define PT_G7     0x2c
+#define PT_I0     0x30
+#define PT_I1     0x34
+#define PT_I2     0x38
+#define PT_I3     0x3c
+#define PT_I4     0x40
+#define PT_I5     0x44
+#define PT_I6     0x48
+#define PT_FP     PT_I6
+#define PT_I7     0x4c
+
+/* Reg_window offsets */
+#define RW_V9_L0     0x00
+#define RW_V9_L1     0x08
+#define RW_V9_L2     0x10
+#define RW_V9_L3     0x18
+#define RW_V9_L4     0x20
+#define RW_V9_L5     0x28
+#define RW_V9_L6     0x30
+#define RW_V9_L7     0x38
+#define RW_V9_I0     0x40
+#define RW_V9_I1     0x48
+#define RW_V9_I2     0x50
+#define RW_V9_I3     0x58
+#define RW_V9_I4     0x60
+#define RW_V9_I5     0x68
+#define RW_V9_I6     0x70
+#define RW_V9_I7     0x78
+
+#define RW_L0     0x00
+#define RW_L1     0x04
+#define RW_L2     0x08
+#define RW_L3     0x0c
+#define RW_L4     0x10
+#define RW_L5     0x14
+#define RW_L6     0x18
+#define RW_L7     0x1c
+#define RW_I0     0x20
+#define RW_I1     0x24
+#define RW_I2     0x28
+#define RW_I3     0x2c
+#define RW_I4     0x30
+#define RW_I5     0x34
+#define RW_I6     0x38
+#define RW_I7     0x3c
+
+/* Stack_frame offsets */
+#define SF_V9_L0     0x00
+#define SF_V9_L1     0x08
+#define SF_V9_L2     0x10
+#define SF_V9_L3     0x18
+#define SF_V9_L4     0x20
+#define SF_V9_L5     0x28
+#define SF_V9_L6     0x30
+#define SF_V9_L7     0x38
+#define SF_V9_I0     0x40
+#define SF_V9_I1     0x48
+#define SF_V9_I2     0x50
+#define SF_V9_I3     0x58
+#define SF_V9_I4     0x60
+#define SF_V9_I5     0x68
+#define SF_V9_FP     0x70
+#define SF_V9_PC     0x78
+#define SF_V9_RETP   0x80
+#define SF_V9_XARG0  0x88
+#define SF_V9_XARG1  0x90
+#define SF_V9_XARG2  0x98
+#define SF_V9_XARG3  0xa0
+#define SF_V9_XARG4  0xa8
+#define SF_V9_XARG5  0xb0
+#define SF_V9_XXARG  0xb8
+
+#define SF_L0     0x00
+#define SF_L1     0x04
+#define SF_L2     0x08
+#define SF_L3     0x0c
+#define SF_L4     0x10
+#define SF_L5     0x14
+#define SF_L6     0x18
+#define SF_L7     0x1c
+#define SF_I0     0x20
+#define SF_I1     0x24
+#define SF_I2     0x28
+#define SF_I3     0x2c
+#define SF_I4     0x30
+#define SF_I5     0x34
+#define SF_FP     0x38
+#define SF_PC     0x3c
+#define SF_RETP   0x40
+#define SF_XARG0  0x44
+#define SF_XARG1  0x48
+#define SF_XARG2  0x4c
+#define SF_XARG3  0x50
+#define SF_XARG4  0x54
+#define SF_XARG5  0x58
+#define SF_XXARG  0x5c
+
+
+/* Stuff for the ptrace system call */
+#define PTRACE_SPARC_DETACH       11
+#define PTRACE_GETREGS            12
+#define PTRACE_SETREGS            13
+#define PTRACE_GETFPREGS          14
+#define PTRACE_SETFPREGS          15
+#define PTRACE_READDATA           16
+#define PTRACE_WRITEDATA          17
+#define PTRACE_READTEXT           18
+#define PTRACE_WRITETEXT          19
+#define PTRACE_GETFPAREGS         20
+#define PTRACE_SETFPAREGS         21
+
+/* There are for debugging 64-bit processes, either from a 32 or 64 bit
+ * parent.  Thus their complements are for debugging 32-bit processes only.
+ */
+
+#define PTRACE_GETREGS64	  22
+#define PTRACE_SETREGS64	  23
+/* PTRACE_SYSCALL is 24 */
+#define PTRACE_GETFPREGS64	  25
+#define PTRACE_SETFPREGS64	  26
+
+#endif /* _UAPI__SPARC_PTRACE_H */
diff --git a/arch/sparc/include/asm/resource.h b/arch/sparc/include/uapi/asm/resource.h
index fe163cafb4c..fe163cafb4c 100644
--- a/arch/sparc/include/asm/resource.h
+++ b/arch/sparc/include/uapi/asm/resource.h
diff --git a/arch/sparc/include/asm/sembuf.h b/arch/sparc/include/uapi/asm/sembuf.h
index faee1be08d6..faee1be08d6 100644
--- a/arch/sparc/include/asm/sembuf.h
+++ b/arch/sparc/include/uapi/asm/sembuf.h
diff --git a/arch/sparc/include/uapi/asm/setup.h b/arch/sparc/include/uapi/asm/setup.h
new file mode 100644
index 00000000000..53376845087
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/setup.h
@@ -0,0 +1,15 @@
+/*
+ *	Just a place holder. 
+ */
+
+#ifndef _UAPI_SPARC_SETUP_H
+#define _UAPI_SPARC_SETUP_H
+
+#if defined(__sparc__) && defined(__arch64__)
+# define COMMAND_LINE_SIZE 2048
+#else
+# define COMMAND_LINE_SIZE 256
+#endif
+
+
+#endif /* _UAPI_SPARC_SETUP_H */
diff --git a/arch/sparc/include/asm/shmbuf.h b/arch/sparc/include/uapi/asm/shmbuf.h
index 83a16055363..83a16055363 100644
--- a/arch/sparc/include/asm/shmbuf.h
+++ b/arch/sparc/include/uapi/asm/shmbuf.h
diff --git a/arch/sparc/include/uapi/asm/sigcontext.h b/arch/sparc/include/uapi/asm/sigcontext.h
new file mode 100644
index 00000000000..e69de29bb2d
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/sigcontext.h
diff --git a/arch/sparc/include/uapi/asm/siginfo.h b/arch/sparc/include/uapi/asm/siginfo.h
new file mode 100644
index 00000000000..2d9b79ccaa5
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/siginfo.h
@@ -0,0 +1,25 @@
+#ifndef _UAPI__SPARC_SIGINFO_H
+#define _UAPI__SPARC_SIGINFO_H
+
+#if defined(__sparc__) && defined(__arch64__)
+
+#define __ARCH_SI_PREAMBLE_SIZE	(4 * sizeof(int))
+#define __ARCH_SI_BAND_T int
+
+#endif /* defined(__sparc__) && defined(__arch64__) */
+
+
+#define __ARCH_SI_TRAPNO
+
+#include <asm-generic/siginfo.h>
+
+
+#define SI_NOINFO	32767		/* no information in siginfo_t */
+
+/*
+ * SIGEMT si_codes
+ */
+#define EMT_TAGOVF	(__SI_FAULT|1)	/* tag overflow */
+#define NSIGEMT		1
+
+#endif /* _UAPI__SPARC_SIGINFO_H */
diff --git a/arch/sparc/include/uapi/asm/signal.h b/arch/sparc/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..1a041892538
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/signal.h
@@ -0,0 +1,185 @@
+#ifndef _UAPI__SPARC_SIGNAL_H
+#define _UAPI__SPARC_SIGNAL_H
+
+#include <asm/sigcontext.h>
+#include <linux/compiler.h>
+
+
+/* On the Sparc the signal handlers get passed a 'sub-signal' code
+ * for certain signal types, which we document here.
+ */
+#define SIGHUP		 1
+#define SIGINT		 2
+#define SIGQUIT		 3
+#define SIGILL		 4
+#define    SUBSIG_STACK       0
+#define    SUBSIG_ILLINST     2
+#define    SUBSIG_PRIVINST    3
+#define    SUBSIG_BADTRAP(t)  (0x80 + (t))
+
+#define SIGTRAP		 5
+#define SIGABRT		 6
+#define SIGIOT		 6
+
+#define SIGEMT           7
+#define    SUBSIG_TAG    10
+
+#define SIGFPE		 8
+#define    SUBSIG_FPDISABLED     0x400
+#define    SUBSIG_FPERROR        0x404
+#define    SUBSIG_FPINTOVFL      0x001
+#define    SUBSIG_FPSTSIG        0x002
+#define    SUBSIG_IDIVZERO       0x014
+#define    SUBSIG_FPINEXACT      0x0c4
+#define    SUBSIG_FPDIVZERO      0x0c8
+#define    SUBSIG_FPUNFLOW       0x0cc
+#define    SUBSIG_FPOPERROR      0x0d0
+#define    SUBSIG_FPOVFLOW       0x0d4
+
+#define SIGKILL		 9
+#define SIGBUS          10
+#define    SUBSIG_BUSTIMEOUT    1
+#define    SUBSIG_ALIGNMENT     2
+#define    SUBSIG_MISCERROR     5
+
+#define SIGSEGV		11
+#define    SUBSIG_NOMAPPING     3
+#define    SUBSIG_PROTECTION    4
+#define    SUBSIG_SEGERROR      5
+
+#define SIGSYS		12
+
+#define SIGPIPE		13
+#define SIGALRM		14
+#define SIGTERM		15
+#define SIGURG          16
+
+/* SunOS values which deviate from the Linux/i386 ones */
+#define SIGSTOP		17
+#define SIGTSTP		18
+#define SIGCONT		19
+#define SIGCHLD		20
+#define SIGTTIN		21
+#define SIGTTOU		22
+#define SIGIO		23
+#define SIGPOLL		SIGIO   /* SysV name for SIGIO */
+#define SIGXCPU		24
+#define SIGXFSZ		25
+#define SIGVTALRM	26
+#define SIGPROF		27
+#define SIGWINCH	28
+#define SIGLOST		29
+#define SIGPWR		SIGLOST
+#define SIGUSR1		30
+#define SIGUSR2		31
+
+/* Most things should be clean enough to redefine this at will, if care
+   is taken to make libc match.  */
+
+#define __OLD_NSIG	32
+#define __NEW_NSIG      64
+#ifdef __arch64__
+#define _NSIG_BPW       64
+#else
+#define _NSIG_BPW       32
+#endif
+#define _NSIG_WORDS     (__NEW_NSIG / _NSIG_BPW)
+
+#define SIGRTMIN       32
+#define SIGRTMAX       __NEW_NSIG
+
+#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__)
+#define _NSIG			__NEW_NSIG
+#define __new_sigset_t		sigset_t
+#define __new_sigaction		sigaction
+#define __new_sigaction32	sigaction32
+#define __old_sigset_t		old_sigset_t
+#define __old_sigaction		old_sigaction
+#define __old_sigaction32	old_sigaction32
+#else
+#define _NSIG			__OLD_NSIG
+#define NSIG			_NSIG
+#define __old_sigset_t		sigset_t
+#define __old_sigaction		sigaction
+#define __old_sigaction32	sigaction32
+#endif
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long __old_sigset_t;            /* at least 32 bits */
+
+typedef struct {
+       unsigned long sig[_NSIG_WORDS];
+} __new_sigset_t;
+
+/* A SunOS sigstack */
+struct sigstack {
+	/* XXX 32-bit pointers pinhead XXX */
+	char *the_stack;
+	int   cur_status;
+};
+
+/* Sigvec flags */
+#define _SV_SSTACK    1u    /* This signal handler should use sig-stack */
+#define _SV_INTR      2u    /* Sig return should not restart system call */
+#define _SV_RESET     4u    /* Set handler to SIG_DFL upon taken signal */
+#define _SV_IGNCHILD  8u    /* Do not send SIGCHLD */
+
+/*
+ * sa_flags values: SA_STACK is not currently supported, but will allow the
+ * usage of signal stacks by using the (now obsolete) sa_restorer field in
+ * the sigaction structure as a stack pointer. This is now possible due to
+ * the changes in signal handling. LBT 010493.
+ * SA_RESTART flag to get restarting signals (which were the default long ago)
+ */
+#define SA_NOCLDSTOP	_SV_IGNCHILD
+#define SA_STACK	_SV_SSTACK
+#define SA_ONSTACK	_SV_SSTACK
+#define SA_RESTART	_SV_INTR
+#define SA_ONESHOT	_SV_RESET
+#define SA_NODEFER	0x20u
+#define SA_NOCLDWAIT    0x100u
+#define SA_SIGINFO      0x200u
+
+#define SA_NOMASK	SA_NODEFER
+
+#define SIG_BLOCK          0x01	/* for blocking signals */
+#define SIG_UNBLOCK        0x02	/* for unblocking signals */
+#define SIG_SETMASK        0x04	/* for setting the signal mask */
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK	1
+#define SS_DISABLE	2
+
+#define MINSIGSTKSZ	4096
+#define SIGSTKSZ	16384
+
+
+#include <asm-generic/signal-defs.h>
+
+struct __new_sigaction {
+	__sighandler_t		sa_handler;
+	unsigned long		sa_flags;
+	__sigrestore_t		sa_restorer;  /* not used by Linux/SPARC yet */
+	__new_sigset_t		sa_mask;
+};
+
+struct __old_sigaction {
+	__sighandler_t		sa_handler;
+	__old_sigset_t		sa_mask;
+	unsigned long		sa_flags;
+	void			(*sa_restorer)(void);  /* not used by Linux/SPARC yet */
+};
+
+typedef struct sigaltstack {
+	void			__user *ss_sp;
+	int			ss_flags;
+	size_t			ss_size;
+} stack_t;
+
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* _UAPI__SPARC_SIGNAL_H */
diff --git a/arch/sparc/include/asm/socket.h b/arch/sparc/include/uapi/asm/socket.h
index bea1568ae4a..bea1568ae4a 100644
--- a/arch/sparc/include/asm/socket.h
+++ b/arch/sparc/include/uapi/asm/socket.h
diff --git a/arch/sparc/include/asm/sockios.h b/arch/sparc/include/uapi/asm/sockios.h
index 990ea746486..990ea746486 100644
--- a/arch/sparc/include/asm/sockios.h
+++ b/arch/sparc/include/uapi/asm/sockios.h
diff --git a/arch/sparc/include/asm/stat.h b/arch/sparc/include/uapi/asm/stat.h
index a232e9e1f4e..a232e9e1f4e 100644
--- a/arch/sparc/include/asm/stat.h
+++ b/arch/sparc/include/uapi/asm/stat.h
diff --git a/arch/sparc/include/asm/statfs.h b/arch/sparc/include/uapi/asm/statfs.h
index 55e607ad461..55e607ad461 100644
--- a/arch/sparc/include/asm/statfs.h
+++ b/arch/sparc/include/uapi/asm/statfs.h
diff --git a/arch/sparc/include/asm/swab.h b/arch/sparc/include/uapi/asm/swab.h
index a34ad079487..a34ad079487 100644
--- a/arch/sparc/include/asm/swab.h
+++ b/arch/sparc/include/uapi/asm/swab.h
diff --git a/arch/sparc/include/uapi/asm/termbits.h b/arch/sparc/include/uapi/asm/termbits.h
new file mode 100644
index 00000000000..dd91642fcca
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/termbits.h
@@ -0,0 +1,263 @@
+#ifndef _UAPI_SPARC_TERMBITS_H
+#define _UAPI_SPARC_TERMBITS_H
+
+#include <linux/posix_types.h>
+
+typedef unsigned char   cc_t;
+typedef unsigned int    speed_t;
+
+#if defined(__sparc__) && defined(__arch64__)
+typedef unsigned int    tcflag_t;
+#else
+typedef unsigned long   tcflag_t;
+#endif
+
+#define NCC 8
+struct termio {
+	unsigned short c_iflag;		/* input mode flags */
+	unsigned short c_oflag;		/* output mode flags */
+	unsigned short c_cflag;		/* control mode flags */
+	unsigned short c_lflag;		/* local mode flags */
+	unsigned char c_line;		/* line discipline */
+	unsigned char c_cc[NCC];	/* control characters */
+};
+
+#define NCCS 17
+struct termios {
+	tcflag_t c_iflag;		/* input mode flags */
+	tcflag_t c_oflag;		/* output mode flags */
+	tcflag_t c_cflag;		/* control mode flags */
+	tcflag_t c_lflag;		/* local mode flags */
+	cc_t c_line;			/* line discipline */
+#ifndef __KERNEL__
+	cc_t c_cc[NCCS];		/* control characters */
+#else
+	cc_t c_cc[NCCS+2];	/* kernel needs 2 more to hold vmin/vtime */
+#define SIZEOF_USER_TERMIOS sizeof (struct termios) - (2*sizeof (cc_t))
+#endif
+};
+
+struct termios2 {
+	tcflag_t c_iflag;		/* input mode flags */
+	tcflag_t c_oflag;		/* output mode flags */
+	tcflag_t c_cflag;		/* control mode flags */
+	tcflag_t c_lflag;		/* local mode flags */
+	cc_t c_line;			/* line discipline */
+	cc_t c_cc[NCCS+2];		/* control characters */
+	speed_t c_ispeed;		/* input speed */
+	speed_t c_ospeed;		/* output speed */
+};
+
+struct ktermios {
+	tcflag_t c_iflag;		/* input mode flags */
+	tcflag_t c_oflag;		/* output mode flags */
+	tcflag_t c_cflag;		/* control mode flags */
+	tcflag_t c_lflag;		/* local mode flags */
+	cc_t c_line;			/* line discipline */
+	cc_t c_cc[NCCS+2];		/* control characters */
+	speed_t c_ispeed;		/* input speed */
+	speed_t c_ospeed;		/* output speed */
+};
+
+/* c_cc characters */
+#define VINTR    0
+#define VQUIT    1
+#define VERASE   2
+#define VKILL    3
+#define VEOF     4
+#define VEOL     5
+#define VEOL2    6
+#define VSWTC    7
+#define VSTART   8
+#define VSTOP    9
+
+
+
+#define VSUSP    10
+#define VDSUSP   11  /* SunOS POSIX nicety I do believe... */
+#define VREPRINT 12
+#define VDISCARD 13
+#define VWERASE  14
+#define VLNEXT   15
+
+/* Kernel keeps vmin/vtime separated, user apps assume vmin/vtime is
+ * shared with eof/eol
+ */
+#ifndef __KERNEL__
+#define VMIN     VEOF
+#define VTIME    VEOL
+#endif
+
+/* c_iflag bits */
+#define IGNBRK	0x00000001
+#define BRKINT	0x00000002
+#define IGNPAR	0x00000004
+#define PARMRK	0x00000008
+#define INPCK	0x00000010
+#define ISTRIP	0x00000020
+#define INLCR	0x00000040
+#define IGNCR	0x00000080
+#define ICRNL	0x00000100
+#define IUCLC	0x00000200
+#define IXON	0x00000400
+#define IXANY	0x00000800
+#define IXOFF	0x00001000
+#define IMAXBEL	0x00002000
+#define IUTF8   0x00004000
+
+/* c_oflag bits */
+#define OPOST	0x00000001
+#define OLCUC	0x00000002
+#define ONLCR	0x00000004
+#define OCRNL	0x00000008
+#define ONOCR	0x00000010
+#define ONLRET	0x00000020
+#define OFILL	0x00000040
+#define OFDEL	0x00000080
+#define NLDLY	0x00000100
+#define   NL0	0x00000000
+#define   NL1	0x00000100
+#define CRDLY	0x00000600
+#define   CR0	0x00000000
+#define   CR1	0x00000200
+#define   CR2	0x00000400
+#define   CR3	0x00000600
+#define TABDLY	0x00001800
+#define   TAB0	0x00000000
+#define   TAB1	0x00000800
+#define   TAB2	0x00001000
+#define   TAB3	0x00001800
+#define   XTABS	0x00001800
+#define BSDLY	0x00002000
+#define   BS0	0x00000000
+#define   BS1	0x00002000
+#define VTDLY	0x00004000
+#define   VT0	0x00000000
+#define   VT1	0x00004000
+#define FFDLY	0x00008000
+#define   FF0	0x00000000
+#define   FF1	0x00008000
+#define PAGEOUT 0x00010000  /* SUNOS specific */
+#define WRAP    0x00020000  /* SUNOS specific */
+
+/* c_cflag bit meaning */
+#define CBAUD	  0x0000100f
+#define  B0	  0x00000000   /* hang up */
+#define  B50	  0x00000001
+#define  B75	  0x00000002
+#define  B110	  0x00000003
+#define  B134	  0x00000004
+#define  B150	  0x00000005
+#define  B200	  0x00000006
+#define  B300	  0x00000007
+#define  B600	  0x00000008
+#define  B1200	  0x00000009
+#define  B1800	  0x0000000a
+#define  B2400	  0x0000000b
+#define  B4800	  0x0000000c
+#define  B9600	  0x0000000d
+#define  B19200	  0x0000000e
+#define  B38400	  0x0000000f
+#define EXTA      B19200
+#define EXTB      B38400
+#define  CSIZE    0x00000030
+#define   CS5	  0x00000000
+#define   CS6	  0x00000010
+#define   CS7	  0x00000020
+#define   CS8	  0x00000030
+#define CSTOPB	  0x00000040
+#define CREAD	  0x00000080
+#define PARENB	  0x00000100
+#define PARODD	  0x00000200
+#define HUPCL	  0x00000400
+#define CLOCAL	  0x00000800
+#define CBAUDEX   0x00001000
+/* We'll never see these speeds with the Zilogs, but for completeness... */
+#define  BOTHER   0x00001000
+#define  B57600   0x00001001
+#define  B115200  0x00001002
+#define  B230400  0x00001003
+#define  B460800  0x00001004
+/* This is what we can do with the Zilogs. */
+#define  B76800   0x00001005
+/* This is what we can do with the SAB82532. */
+#define  B153600  0x00001006
+#define  B307200  0x00001007
+#define  B614400  0x00001008
+#define  B921600  0x00001009
+/* And these are the rest... */
+#define  B500000  0x0000100a
+#define  B576000  0x0000100b
+#define B1000000  0x0000100c
+#define B1152000  0x0000100d
+#define B1500000  0x0000100e
+#define B2000000  0x0000100f
+/* These have totally bogus values and nobody uses them
+   so far. Later on we'd have to use say 0x10000x and
+   adjust CBAUD constant and drivers accordingly.
+#define B2500000  0x00001010
+#define B3000000  0x00001011
+#define B3500000  0x00001012
+#define B4000000  0x00001013  */
+#define CIBAUD	  0x100f0000  /* input baud rate (not used) */
+#define CMSPAR	  0x40000000  /* mark or space (stick) parity */
+#define CRTSCTS	  0x80000000  /* flow control */
+
+#define IBSHIFT	  16		/* Shift from CBAUD to CIBAUD */
+
+/* c_lflag bits */
+#define ISIG	0x00000001
+#define ICANON	0x00000002
+#define XCASE	0x00000004
+#define ECHO	0x00000008
+#define ECHOE	0x00000010
+#define ECHOK	0x00000020
+#define ECHONL	0x00000040
+#define NOFLSH	0x00000080
+#define TOSTOP	0x00000100
+#define ECHOCTL	0x00000200
+#define ECHOPRT	0x00000400
+#define ECHOKE	0x00000800
+#define DEFECHO 0x00001000  /* SUNOS thing, what is it? */
+#define FLUSHO	0x00002000
+#define PENDIN	0x00004000
+#define IEXTEN	0x00008000
+#define EXTPROC	0x00010000
+
+/* modem lines */
+#define TIOCM_LE	0x001
+#define TIOCM_DTR	0x002
+#define TIOCM_RTS	0x004
+#define TIOCM_ST	0x008
+#define TIOCM_SR	0x010
+#define TIOCM_CTS	0x020
+#define TIOCM_CAR	0x040
+#define TIOCM_RNG	0x080
+#define TIOCM_DSR	0x100
+#define TIOCM_CD	TIOCM_CAR
+#define TIOCM_RI	TIOCM_RNG
+#define TIOCM_OUT1	0x2000
+#define TIOCM_OUT2	0x4000
+#define TIOCM_LOOP	0x8000
+
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+#define TIOCSER_TEMT    0x01	/* Transmitter physically empty */
+
+
+/* tcflow() and TCXONC use these */
+#define	TCOOFF		0
+#define	TCOON		1
+#define	TCIOFF		2
+#define	TCION		3
+
+/* tcflush() and TCFLSH use these */
+#define	TCIFLUSH	0
+#define	TCOFLUSH	1
+#define	TCIOFLUSH	2
+
+/* tcsetattr uses these */
+#define	TCSANOW		0
+#define	TCSADRAIN	1
+#define	TCSAFLUSH	2
+
+#endif /* _UAPI_SPARC_TERMBITS_H */
diff --git a/arch/sparc/include/uapi/asm/termios.h b/arch/sparc/include/uapi/asm/termios.h
new file mode 100644
index 00000000000..ea6f09e51e5
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/termios.h
@@ -0,0 +1,43 @@
+#ifndef _UAPI_SPARC_TERMIOS_H
+#define _UAPI_SPARC_TERMIOS_H
+
+#include <asm/ioctls.h>
+#include <asm/termbits.h>
+
+#if defined(__KERNEL__) || defined(__DEFINE_BSD_TERMIOS)
+struct sgttyb {
+	char	sg_ispeed;
+	char	sg_ospeed;
+	char	sg_erase;
+	char	sg_kill;
+	short	sg_flags;
+};
+
+struct tchars {
+	char	t_intrc;
+	char	t_quitc;
+	char	t_startc;
+	char	t_stopc;
+	char	t_eofc;
+	char	t_brkc;
+};
+
+struct ltchars {
+	char	t_suspc;
+	char	t_dsuspc;
+	char	t_rprntc;
+	char	t_flushc;
+	char	t_werasc;
+	char	t_lnextc;
+};
+#endif /* __KERNEL__ */
+
+struct winsize {
+	unsigned short ws_row;
+	unsigned short ws_col;
+	unsigned short ws_xpixel;
+	unsigned short ws_ypixel;
+};
+
+
+#endif /* _UAPI_SPARC_TERMIOS_H */
diff --git a/arch/sparc/include/uapi/asm/traps.h b/arch/sparc/include/uapi/asm/traps.h
new file mode 100644
index 00000000000..a4eceace6cc
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/traps.h
@@ -0,0 +1,120 @@
+/*
+ * traps.h:  Format of entries for the Sparc trap table.
+ *
+ * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _UAPI_SPARC_TRAPS_H
+#define _UAPI_SPARC_TRAPS_H
+
+#define NUM_SPARC_TRAPS  255
+
+#ifndef __ASSEMBLY__
+#endif /* !(__ASSEMBLY__) */
+
+/* For patching the trap table at boot time, we need to know how to
+ * form various common Sparc instructions.  Thus these macros...
+ */
+
+#define SPARC_MOV_CONST_L3(const) (0xa6102000 | (const&0xfff))
+
+/* The following assumes that the branch lies before the place we
+ * are branching to.  This is the case for a trap vector...
+ * You have been warned.
+ */
+#define SPARC_BRANCH(dest_addr, inst_addr) \
+          (0x10800000 | (((dest_addr-inst_addr)>>2)&0x3fffff))
+
+#define SPARC_RD_PSR_L0  (0xa1480000)
+#define SPARC_RD_WIM_L3  (0xa7500000)
+#define SPARC_NOP (0x01000000)
+
+/* Various interesting trap levels. */
+/* First, hardware traps. */
+#define SP_TRAP_TFLT    0x1          /* Text fault */
+#define SP_TRAP_II      0x2          /* Illegal Instruction */
+#define SP_TRAP_PI      0x3          /* Privileged Instruction */
+#define SP_TRAP_FPD     0x4          /* Floating Point Disabled */
+#define SP_TRAP_WOVF    0x5          /* Window Overflow */
+#define SP_TRAP_WUNF    0x6          /* Window Underflow */
+#define SP_TRAP_MNA     0x7          /* Memory Address Unaligned */
+#define SP_TRAP_FPE     0x8          /* Floating Point Exception */
+#define SP_TRAP_DFLT    0x9          /* Data Fault */
+#define SP_TRAP_TOF     0xa          /* Tag Overflow */
+#define SP_TRAP_WDOG    0xb          /* Watchpoint Detected */
+#define SP_TRAP_IRQ1    0x11         /* IRQ level 1 */
+#define SP_TRAP_IRQ2    0x12         /* IRQ level 2 */
+#define SP_TRAP_IRQ3    0x13         /* IRQ level 3 */
+#define SP_TRAP_IRQ4    0x14         /* IRQ level 4 */
+#define SP_TRAP_IRQ5    0x15         /* IRQ level 5 */
+#define SP_TRAP_IRQ6    0x16         /* IRQ level 6 */
+#define SP_TRAP_IRQ7    0x17         /* IRQ level 7 */
+#define SP_TRAP_IRQ8    0x18         /* IRQ level 8 */
+#define SP_TRAP_IRQ9    0x19         /* IRQ level 9 */
+#define SP_TRAP_IRQ10   0x1a         /* IRQ level 10 */
+#define SP_TRAP_IRQ11   0x1b         /* IRQ level 11 */
+#define SP_TRAP_IRQ12   0x1c         /* IRQ level 12 */
+#define SP_TRAP_IRQ13   0x1d         /* IRQ level 13 */
+#define SP_TRAP_IRQ14   0x1e         /* IRQ level 14 */
+#define SP_TRAP_IRQ15   0x1f         /* IRQ level 15 Non-maskable */
+#define SP_TRAP_RACC    0x20         /* Register Access Error ??? */
+#define SP_TRAP_IACC    0x21         /* Instruction Access Error */
+#define SP_TRAP_CPDIS   0x24         /* Co-Processor Disabled */
+#define SP_TRAP_BADFL   0x25         /* Unimplemented Flush Instruction */
+#define SP_TRAP_CPEXP   0x28         /* Co-Processor Exception */
+#define SP_TRAP_DACC    0x29         /* Data Access Error */
+#define SP_TRAP_DIVZ    0x2a         /* Divide By Zero */
+#define SP_TRAP_DSTORE  0x2b         /* Data Store Error ??? */
+#define SP_TRAP_DMM     0x2c         /* Data Access MMU Miss ??? */
+#define SP_TRAP_IMM     0x3c         /* Instruction Access MMU Miss ??? */
+
+/* Now the Software Traps... */
+#define SP_TRAP_SUNOS   0x80         /* SunOS System Call */
+#define SP_TRAP_SBPT    0x81         /* Software Breakpoint */
+#define SP_TRAP_SDIVZ   0x82         /* Software Divide-by-Zero trap */
+#define SP_TRAP_FWIN    0x83         /* Flush Windows */
+#define SP_TRAP_CWIN    0x84         /* Clean Windows */
+#define SP_TRAP_RCHK    0x85         /* Range Check */
+#define SP_TRAP_FUNA    0x86         /* Fix Unaligned Access */
+#define SP_TRAP_IOWFL   0x87         /* Integer Overflow */
+#define SP_TRAP_SOLARIS 0x88         /* Solaris System Call */
+#define SP_TRAP_NETBSD  0x89         /* NetBSD System Call */
+#define SP_TRAP_LINUX   0x90         /* Linux System Call */
+
+/* Names used for compatibility with SunOS */
+#define ST_SYSCALL              0x00
+#define ST_BREAKPOINT           0x01
+#define ST_DIV0                 0x02
+#define ST_FLUSH_WINDOWS        0x03
+#define ST_CLEAN_WINDOWS        0x04
+#define ST_RANGE_CHECK          0x05
+#define ST_FIX_ALIGN            0x06
+#define ST_INT_OVERFLOW         0x07
+
+/* Special traps... */
+#define SP_TRAP_KBPT1   0xfe         /* KADB/PROM Breakpoint one */
+#define SP_TRAP_KBPT2   0xff         /* KADB/PROM Breakpoint two */
+
+/* Handy Macros */
+/* Is this a trap we never expect to get? */
+#define BAD_TRAP_P(level) \
+        ((level > SP_TRAP_WDOG && level < SP_TRAP_IRQ1) || \
+	 (level > SP_TRAP_IACC && level < SP_TRAP_CPDIS) || \
+	 (level > SP_TRAP_BADFL && level < SP_TRAP_CPEXP) || \
+	 (level > SP_TRAP_DMM && level < SP_TRAP_IMM) || \
+	 (level > SP_TRAP_IMM && level < SP_TRAP_SUNOS) || \
+	 (level > SP_TRAP_LINUX && level < SP_TRAP_KBPT1))
+
+/* Is this a Hardware trap? */
+#define HW_TRAP_P(level) ((level > 0) && (level < SP_TRAP_SUNOS))
+
+/* Is this a Software trap? */
+#define SW_TRAP_P(level) ((level >= SP_TRAP_SUNOS) && (level <= SP_TRAP_KBPT2))
+
+/* Is this a system call for some OS we know about? */
+#define SCALL_TRAP_P(level) ((level == SP_TRAP_SUNOS) || \
+			     (level == SP_TRAP_SOLARIS) || \
+			     (level == SP_TRAP_NETBSD) || \
+			     (level == SP_TRAP_LINUX))
+
+#endif /* _UAPI_SPARC_TRAPS_H */
diff --git a/arch/sparc/include/asm/types.h b/arch/sparc/include/uapi/asm/types.h
index 383d156cde9..383d156cde9 100644
--- a/arch/sparc/include/asm/types.h
+++ b/arch/sparc/include/uapi/asm/types.h
diff --git a/arch/sparc/include/asm/uctx.h b/arch/sparc/include/uapi/asm/uctx.h
index dc937c75ffd..dc937c75ffd 100644
--- a/arch/sparc/include/asm/uctx.h
+++ b/arch/sparc/include/uapi/asm/uctx.h
diff --git a/arch/sparc/include/uapi/asm/unistd.h b/arch/sparc/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..8974ef7ae92
--- /dev/null
+++ b/arch/sparc/include/uapi/asm/unistd.h
@@ -0,0 +1,422 @@
+/*
+ * System calls under the Sparc.
+ *
+ * Don't be scared by the ugly clobbers, it is the only way I can
+ * think of right now to force the arguments into fixed registers
+ * before the trap into the system call with gcc 'asm' statements.
+ *
+ * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
+ *
+ * SunOS compatibility based upon preliminary work which is:
+ *
+ * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu)
+ */
+#ifndef _UAPI_SPARC_UNISTD_H
+#define _UAPI_SPARC_UNISTD_H
+
+#ifndef __32bit_syscall_numbers__
+#ifndef __arch64__
+#define __32bit_syscall_numbers__
+#endif
+#endif
+
+#define __NR_restart_syscall      0 /* Linux Specific				   */
+#define __NR_exit                 1 /* Common                                      */
+#define __NR_fork                 2 /* Common                                      */
+#define __NR_read                 3 /* Common                                      */
+#define __NR_write                4 /* Common                                      */
+#define __NR_open                 5 /* Common                                      */
+#define __NR_close                6 /* Common                                      */
+#define __NR_wait4                7 /* Common                                      */
+#define __NR_creat                8 /* Common                                      */
+#define __NR_link                 9 /* Common                                      */
+#define __NR_unlink              10 /* Common                                      */
+#define __NR_execv               11 /* SunOS Specific                              */
+#define __NR_chdir               12 /* Common                                      */
+#define __NR_chown		 13 /* Common					   */
+#define __NR_mknod               14 /* Common                                      */
+#define __NR_chmod               15 /* Common                                      */
+#define __NR_lchown              16 /* Common                                      */
+#define __NR_brk                 17 /* Common                                      */
+#define __NR_perfctr             18 /* Performance counter operations              */
+#define __NR_lseek               19 /* Common                                      */
+#define __NR_getpid              20 /* Common                                      */
+#define __NR_capget		 21 /* Linux Specific				   */
+#define __NR_capset		 22 /* Linux Specific				   */
+#define __NR_setuid              23 /* Implemented via setreuid in SunOS           */
+#define __NR_getuid              24 /* Common                                      */
+#define __NR_vmsplice	         25 /* ENOSYS under SunOS			   */
+#define __NR_ptrace              26 /* Common                                      */
+#define __NR_alarm               27 /* Implemented via setitimer in SunOS          */
+#define __NR_sigaltstack	 28 /* Common					   */
+#define __NR_pause               29 /* Is sigblock(0)->sigpause() in SunOS         */
+#define __NR_utime               30 /* Implemented via utimes() under SunOS        */
+#ifdef __32bit_syscall_numbers__
+#define __NR_lchown32            31 /* Linux sparc32 specific                      */
+#define __NR_fchown32            32 /* Linux sparc32 specific                      */
+#endif
+#define __NR_access              33 /* Common                                      */
+#define __NR_nice                34 /* Implemented via get/setpriority() in SunOS  */
+#ifdef __32bit_syscall_numbers__
+#define __NR_chown32             35 /* Linux sparc32 specific                      */
+#endif
+#define __NR_sync                36 /* Common                                      */
+#define __NR_kill                37 /* Common                                      */
+#define __NR_stat                38 /* Common                                      */
+#define __NR_sendfile		 39 /* Linux Specific				   */
+#define __NR_lstat               40 /* Common                                      */
+#define __NR_dup                 41 /* Common                                      */
+#define __NR_pipe                42 /* Common                                      */
+#define __NR_times               43 /* Implemented via getrusage() in SunOS        */
+#ifdef __32bit_syscall_numbers__
+#define __NR_getuid32            44 /* Linux sparc32 specific                      */
+#endif
+#define __NR_umount2             45 /* Linux Specific                              */
+#define __NR_setgid              46 /* Implemented via setregid() in SunOS         */
+#define __NR_getgid              47 /* Common                                      */
+#define __NR_signal              48 /* Implemented via sigvec() in SunOS           */
+#define __NR_geteuid             49 /* SunOS calls getuid()                        */
+#define __NR_getegid             50 /* SunOS calls getgid()                        */
+#define __NR_acct                51 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_getgid32            53 /* Linux sparc32 specific                      */
+#else
+#define __NR_memory_ordering	 52 /* Linux Specific				   */
+#endif
+#define __NR_ioctl               54 /* Common                                      */
+#define __NR_reboot              55 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_mmap2		 56 /* Linux sparc32 Specific			   */
+#endif
+#define __NR_symlink             57 /* Common                                      */
+#define __NR_readlink            58 /* Common                                      */
+#define __NR_execve              59 /* Common                                      */
+#define __NR_umask               60 /* Common                                      */
+#define __NR_chroot              61 /* Common                                      */
+#define __NR_fstat               62 /* Common                                      */
+#define __NR_fstat64		 63 /* Linux Specific			           */
+#define __NR_getpagesize         64 /* Common                                      */
+#define __NR_msync               65 /* Common in newer 1.3.x revs...               */
+#define __NR_vfork               66 /* Common                                      */
+#define __NR_pread64             67 /* Linux Specific                              */
+#define __NR_pwrite64            68 /* Linux Specific                              */
+#ifdef __32bit_syscall_numbers__
+#define __NR_geteuid32           69 /* Linux sparc32, sbrk under SunOS             */
+#define __NR_getegid32           70 /* Linux sparc32, sstk under SunOS             */
+#endif
+#define __NR_mmap                71 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setreuid32          72 /* Linux sparc32, vadvise under SunOS          */
+#endif
+#define __NR_munmap              73 /* Common                                      */
+#define __NR_mprotect            74 /* Common                                      */
+#define __NR_madvise             75 /* Common                                      */
+#define __NR_vhangup             76 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_truncate64		 77 /* Linux sparc32 Specific			   */
+#endif
+#define __NR_mincore             78 /* Common                                      */
+#define __NR_getgroups           79 /* Common                                      */
+#define __NR_setgroups           80 /* Common                                      */
+#define __NR_getpgrp             81 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setgroups32         82 /* Linux sparc32, setpgrp under SunOS          */
+#endif
+#define __NR_setitimer           83 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_ftruncate64	 84 /* Linux sparc32 Specific			   */
+#endif
+#define __NR_swapon              85 /* Common                                      */
+#define __NR_getitimer           86 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setuid32            87 /* Linux sparc32, gethostname under SunOS      */
+#endif
+#define __NR_sethostname         88 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setgid32            89 /* Linux sparc32, getdtablesize under SunOS    */
+#endif
+#define __NR_dup2                90 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setfsuid32          91 /* Linux sparc32, getdopt under SunOS          */
+#endif
+#define __NR_fcntl               92 /* Common                                      */
+#define __NR_select              93 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setfsgid32          94 /* Linux sparc32, setdopt under SunOS          */
+#endif
+#define __NR_fsync               95 /* Common                                      */
+#define __NR_setpriority         96 /* Common                                      */
+#define __NR_socket              97 /* Common                                      */
+#define __NR_connect             98 /* Common                                      */
+#define __NR_accept              99 /* Common                                      */
+#define __NR_getpriority        100 /* Common                                      */
+#define __NR_rt_sigreturn       101 /* Linux Specific                              */
+#define __NR_rt_sigaction       102 /* Linux Specific                              */
+#define __NR_rt_sigprocmask     103 /* Linux Specific                              */
+#define __NR_rt_sigpending      104 /* Linux Specific                              */
+#define __NR_rt_sigtimedwait    105 /* Linux Specific                              */
+#define __NR_rt_sigqueueinfo    106 /* Linux Specific                              */
+#define __NR_rt_sigsuspend      107 /* Linux Specific                              */
+#ifdef __32bit_syscall_numbers__
+#define __NR_setresuid32        108 /* Linux Specific, sigvec under SunOS	   */
+#define __NR_getresuid32        109 /* Linux Specific, sigblock under SunOS	   */
+#define __NR_setresgid32        110 /* Linux Specific, sigsetmask under SunOS	   */
+#define __NR_getresgid32        111 /* Linux Specific, sigpause under SunOS	   */
+#define __NR_setregid32         112 /* Linux sparc32, sigstack under SunOS         */
+#else
+#define __NR_setresuid          108 /* Linux Specific, sigvec under SunOS	   */
+#define __NR_getresuid          109 /* Linux Specific, sigblock under SunOS	   */
+#define __NR_setresgid          110 /* Linux Specific, sigsetmask under SunOS	   */
+#define __NR_getresgid          111 /* Linux Specific, sigpause under SunOS	   */
+#endif
+#define __NR_recvmsg            113 /* Common                                      */
+#define __NR_sendmsg            114 /* Common                                      */
+#ifdef __32bit_syscall_numbers__
+#define __NR_getgroups32        115 /* Linux sparc32, vtrace under SunOS           */
+#endif
+#define __NR_gettimeofday       116 /* Common                                      */
+#define __NR_getrusage          117 /* Common                                      */
+#define __NR_getsockopt         118 /* Common                                      */
+#define __NR_getcwd		119 /* Linux Specific				   */
+#define __NR_readv              120 /* Common                                      */
+#define __NR_writev             121 /* Common                                      */
+#define __NR_settimeofday       122 /* Common                                      */
+#define __NR_fchown             123 /* Common                                      */
+#define __NR_fchmod             124 /* Common                                      */
+#define __NR_recvfrom           125 /* Common                                      */
+#define __NR_setreuid           126 /* Common                                      */
+#define __NR_setregid           127 /* Common                                      */
+#define __NR_rename             128 /* Common                                      */
+#define __NR_truncate           129 /* Common                                      */
+#define __NR_ftruncate          130 /* Common                                      */
+#define __NR_flock              131 /* Common                                      */
+#define __NR_lstat64		132 /* Linux Specific			           */
+#define __NR_sendto             133 /* Common                                      */
+#define __NR_shutdown           134 /* Common                                      */
+#define __NR_socketpair         135 /* Common                                      */
+#define __NR_mkdir              136 /* Common                                      */
+#define __NR_rmdir              137 /* Common                                      */
+#define __NR_utimes             138 /* SunOS Specific                              */
+#define __NR_stat64		139 /* Linux Specific			           */
+#define __NR_sendfile64         140 /* adjtime under SunOS                         */
+#define __NR_getpeername        141 /* Common                                      */
+#define __NR_futex              142 /* gethostid under SunOS                       */
+#define __NR_gettid             143 /* ENOSYS under SunOS                          */
+#define __NR_getrlimit		144 /* Common                                      */
+#define __NR_setrlimit          145 /* Common                                      */
+#define __NR_pivot_root		146 /* Linux Specific, killpg under SunOS          */
+#define __NR_prctl		147 /* ENOSYS under SunOS                          */
+#define __NR_pciconfig_read	148 /* ENOSYS under SunOS                          */
+#define __NR_pciconfig_write	149 /* ENOSYS under SunOS                          */
+#define __NR_getsockname        150 /* Common                                      */
+#define __NR_inotify_init       151 /* Linux specific                              */
+#define __NR_inotify_add_watch  152 /* Linux specific                              */
+#define __NR_poll               153 /* Common                                      */
+#define __NR_getdents64		154 /* Linux specific				   */
+#ifdef __32bit_syscall_numbers__
+#define __NR_fcntl64		155 /* Linux sparc32 Specific                      */
+#endif
+#define __NR_inotify_rm_watch   156 /* Linux specific				   */
+#define __NR_statfs             157 /* Common                                      */
+#define __NR_fstatfs            158 /* Common                                      */
+#define __NR_umount             159 /* Common                                      */
+#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS    */
+#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS           */
+#define __NR_getdomainname      162 /* SunOS Specific                              */
+#define __NR_setdomainname      163 /* Common                                      */
+#ifndef __32bit_syscall_numbers__
+#define __NR_utrap_install	164 /* SYSV ABI/v9 required			   */
+#endif
+#define __NR_quotactl           165 /* Common                                      */
+#define __NR_set_tid_address    166 /* Linux specific, exportfs under SunOS        */
+#define __NR_mount              167 /* Common                                      */
+#define __NR_ustat              168 /* Common                                      */
+#define __NR_setxattr           169 /* SunOS: semsys                               */
+#define __NR_lsetxattr          170 /* SunOS: msgsys                               */
+#define __NR_fsetxattr          171 /* SunOS: shmsys                               */
+#define __NR_getxattr           172 /* SunOS: auditsys                             */
+#define __NR_lgetxattr          173 /* SunOS: rfssys                               */
+#define __NR_getdents           174 /* Common                                      */
+#define __NR_setsid             175 /* Common                                      */
+#define __NR_fchdir             176 /* Common                                      */
+#define __NR_fgetxattr          177 /* SunOS: fchroot                              */
+#define __NR_listxattr          178 /* SunOS: vpixsys                              */
+#define __NR_llistxattr         179 /* SunOS: aioread                              */
+#define __NR_flistxattr         180 /* SunOS: aiowrite                             */
+#define __NR_removexattr        181 /* SunOS: aiowait                              */
+#define __NR_lremovexattr       182 /* SunOS: aiocancel                            */
+#define __NR_sigpending         183 /* Common                                      */
+#define __NR_query_module	184 /* Linux Specific				   */
+#define __NR_setpgid            185 /* Common                                      */
+#define __NR_fremovexattr       186 /* SunOS: pathconf                             */
+#define __NR_tkill              187 /* SunOS: fpathconf                            */
+#define __NR_exit_group		188 /* Linux specific, sysconf undef SunOS         */
+#define __NR_uname              189 /* Linux Specific                              */
+#define __NR_init_module        190 /* Linux Specific                              */
+#define __NR_personality        191 /* Linux Specific                              */
+#define __NR_remap_file_pages   192 /* Linux Specific                              */
+#define __NR_epoll_create       193 /* Linux Specific                              */
+#define __NR_epoll_ctl          194 /* Linux Specific                              */
+#define __NR_epoll_wait         195 /* Linux Specific                              */
+#define __NR_ioprio_set         196 /* Linux Specific                              */
+#define __NR_getppid            197 /* Linux Specific                              */
+#define __NR_sigaction          198 /* Linux Specific                              */
+#define __NR_sgetmask           199 /* Linux Specific                              */
+#define __NR_ssetmask           200 /* Linux Specific                              */
+#define __NR_sigsuspend         201 /* Linux Specific                              */
+#define __NR_oldlstat           202 /* Linux Specific                              */
+#define __NR_uselib             203 /* Linux Specific                              */
+#define __NR_readdir            204 /* Linux Specific                              */
+#define __NR_readahead          205 /* Linux Specific                              */
+#define __NR_socketcall         206 /* Linux Specific                              */
+#define __NR_syslog             207 /* Linux Specific                              */
+#define __NR_lookup_dcookie     208 /* Linux Specific                              */
+#define __NR_fadvise64          209 /* Linux Specific                              */
+#define __NR_fadvise64_64       210 /* Linux Specific                              */
+#define __NR_tgkill             211 /* Linux Specific                              */
+#define __NR_waitpid            212 /* Linux Specific                              */
+#define __NR_swapoff            213 /* Linux Specific                              */
+#define __NR_sysinfo            214 /* Linux Specific                              */
+#define __NR_ipc                215 /* Linux Specific                              */
+#define __NR_sigreturn          216 /* Linux Specific                              */
+#define __NR_clone              217 /* Linux Specific                              */
+#define __NR_ioprio_get         218 /* Linux Specific                              */
+#define __NR_adjtimex           219 /* Linux Specific                              */
+#define __NR_sigprocmask        220 /* Linux Specific                              */
+#define __NR_create_module      221 /* Linux Specific                              */
+#define __NR_delete_module      222 /* Linux Specific                              */
+#define __NR_get_kernel_syms    223 /* Linux Specific                              */
+#define __NR_getpgid            224 /* Linux Specific                              */
+#define __NR_bdflush            225 /* Linux Specific                              */
+#define __NR_sysfs              226 /* Linux Specific                              */
+#define __NR_afs_syscall        227 /* Linux Specific                              */
+#define __NR_setfsuid           228 /* Linux Specific                              */
+#define __NR_setfsgid           229 /* Linux Specific                              */
+#define __NR__newselect         230 /* Linux Specific                              */
+#ifdef __32bit_syscall_numbers__
+#define __NR_time               231 /* Linux Specific                              */
+#else
+#endif
+#define __NR_splice             232 /* Linux Specific                              */
+#define __NR_stime              233 /* Linux Specific                              */
+#define __NR_statfs64           234 /* Linux Specific                              */
+#define __NR_fstatfs64          235 /* Linux Specific                              */
+#define __NR__llseek            236 /* Linux Specific                              */
+#define __NR_mlock              237
+#define __NR_munlock            238
+#define __NR_mlockall           239
+#define __NR_munlockall         240
+#define __NR_sched_setparam     241
+#define __NR_sched_getparam     242
+#define __NR_sched_setscheduler 243
+#define __NR_sched_getscheduler 244
+#define __NR_sched_yield        245
+#define __NR_sched_get_priority_max 246
+#define __NR_sched_get_priority_min 247
+#define __NR_sched_rr_get_interval  248
+#define __NR_nanosleep          249
+#define __NR_mremap             250
+#define __NR__sysctl            251
+#define __NR_getsid             252
+#define __NR_fdatasync          253
+#define __NR_nfsservctl         254
+#define __NR_sync_file_range	255
+#define __NR_clock_settime	256
+#define __NR_clock_gettime	257
+#define __NR_clock_getres	258
+#define __NR_clock_nanosleep	259
+#define __NR_sched_getaffinity	260
+#define __NR_sched_setaffinity	261
+#define __NR_timer_settime	262
+#define __NR_timer_gettime	263
+#define __NR_timer_getoverrun	264
+#define __NR_timer_delete	265
+#define __NR_timer_create	266
+/* #define __NR_vserver		267 Reserved for VSERVER */
+#define __NR_io_setup		268
+#define __NR_io_destroy		269
+#define __NR_io_submit		270
+#define __NR_io_cancel		271
+#define __NR_io_getevents	272
+#define __NR_mq_open		273
+#define __NR_mq_unlink		274
+#define __NR_mq_timedsend	275
+#define __NR_mq_timedreceive	276
+#define __NR_mq_notify		277
+#define __NR_mq_getsetattr	278
+#define __NR_waitid		279
+#define __NR_tee		280
+#define __NR_add_key		281
+#define __NR_request_key	282
+#define __NR_keyctl		283
+#define __NR_openat		284
+#define __NR_mkdirat		285
+#define __NR_mknodat		286
+#define __NR_fchownat		287
+#define __NR_futimesat		288
+#define __NR_fstatat64		289
+#define __NR_unlinkat		290
+#define __NR_renameat		291
+#define __NR_linkat		292
+#define __NR_symlinkat		293
+#define __NR_readlinkat		294
+#define __NR_fchmodat		295
+#define __NR_faccessat		296
+#define __NR_pselect6		297
+#define __NR_ppoll		298
+#define __NR_unshare		299
+#define __NR_set_robust_list	300
+#define __NR_get_robust_list	301
+#define __NR_migrate_pages	302
+#define __NR_mbind		303
+#define __NR_get_mempolicy	304
+#define __NR_set_mempolicy	305
+#define __NR_kexec_load		306
+#define __NR_move_pages		307
+#define __NR_getcpu		308
+#define __NR_epoll_pwait	309
+#define __NR_utimensat		310
+#define __NR_signalfd		311
+#define __NR_timerfd_create	312
+#define __NR_eventfd		313
+#define __NR_fallocate		314
+#define __NR_timerfd_settime	315
+#define __NR_timerfd_gettime	316
+#define __NR_signalfd4		317
+#define __NR_eventfd2		318
+#define __NR_epoll_create1	319
+#define __NR_dup3		320
+#define __NR_pipe2		321
+#define __NR_inotify_init1	322
+#define __NR_accept4		323
+#define __NR_preadv		324
+#define __NR_pwritev		325
+#define __NR_rt_tgsigqueueinfo	326
+#define __NR_perf_event_open	327
+#define __NR_recvmmsg		328
+#define __NR_fanotify_init	329
+#define __NR_fanotify_mark	330
+#define __NR_prlimit64		331
+#define __NR_name_to_handle_at	332
+#define __NR_open_by_handle_at	333
+#define __NR_clock_adjtime	334
+#define __NR_syncfs		335
+#define __NR_sendmmsg		336
+#define __NR_setns		337
+#define __NR_process_vm_readv	338
+#define __NR_process_vm_writev	339
+
+#define NR_syscalls		340
+
+#ifdef __32bit_syscall_numbers__
+/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants,
+ * it never had the plain ones and there is no value to adding those
+ * old versions into the syscall table.
+ */
+#define __IGNORE_setresuid
+#define __IGNORE_getresuid
+#define __IGNORE_setresgid
+#define __IGNORE_getresgid
+#endif
+
+#endif /* _UAPI_SPARC_UNISTD_H */
diff --git a/arch/sparc/include/asm/utrap.h b/arch/sparc/include/uapi/asm/utrap.h
index b10e527c22d..b10e527c22d 100644
--- a/arch/sparc/include/asm/utrap.h
+++ b/arch/sparc/include/uapi/asm/utrap.h
diff --git a/arch/sparc/include/asm/watchdog.h b/arch/sparc/include/uapi/asm/watchdog.h
index 5baf2d3919c..5baf2d3919c 100644
--- a/arch/sparc/include/asm/watchdog.h
+++ b/arch/sparc/include/uapi/asm/watchdog.h
diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S
index ee5dcced249..2feb15c35d9 100644
--- a/arch/sparc/kernel/head_64.S
+++ b/arch/sparc/kernel/head_64.S
@@ -576,7 +576,7 @@ niagara_tlb_fixup:
 niagara4_patch:
 	call	niagara4_patch_copyops
 	 nop
-	call	niagara_patch_bzero
+	call	niagara4_patch_bzero
 	 nop
 	call	niagara4_patch_pageops
 	 nop
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index acc8c838ff7..75b31bcdead 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -779,7 +779,7 @@ static int __pci_mmap_make_offset(struct pci_dev *pdev,
 static void __pci_mmap_set_flags(struct pci_dev *dev, struct vm_area_struct *vma,
 					    enum pci_mmap_state mmap_state)
 {
-	vma->vm_flags |= (VM_IO | VM_RESERVED);
+	vma->vm_flags |= VM_IO | VM_DONTEXPAND | VM_DONTDUMP;
 }
 
 /* Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
diff --git a/arch/sparc/kernel/process_32.c b/arch/sparc/kernel/process_32.c
index 14006d8aca2..487bffb36f5 100644
--- a/arch/sparc/kernel/process_32.c
+++ b/arch/sparc/kernel/process_32.c
@@ -482,7 +482,7 @@ int dump_fpu (struct pt_regs * regs, elf_fpregset_t * fpregs)
 asmlinkage int sparc_execve(struct pt_regs *regs)
 {
 	int error, base = 0;
-	char *filename;
+	struct filename *filename;
 
 	/* Check for indirect call. */
 	if(regs->u_regs[UREG_G1] == 0)
@@ -492,7 +492,7 @@ asmlinkage int sparc_execve(struct pt_regs *regs)
 	error = PTR_ERR(filename);
 	if(IS_ERR(filename))
 		goto out;
-	error = do_execve(filename,
+	error = do_execve(filename->name,
 			  (const char __user *const  __user *)
 			  regs->u_regs[base + UREG_I1],
 			  (const char __user *const  __user *)
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index aff0c72fac0..fcaa5942112 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -722,7 +722,7 @@ EXPORT_SYMBOL(dump_fpu);
 asmlinkage int sparc_execve(struct pt_regs *regs)
 {
 	int error, base = 0;
-	char *filename;
+	struct filename *filename;
 
 	/* User register window flush is done by entry.S */
 
@@ -734,7 +734,7 @@ asmlinkage int sparc_execve(struct pt_regs *regs)
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = do_execve(filename,
+	error = do_execve(filename->name,
 			  (const char __user *const __user *)
 			  regs->u_regs[base + UREG_I1],
 			  (const char __user *const __user *)
diff --git a/arch/sparc/kernel/sun4v_tlb_miss.S b/arch/sparc/kernel/sun4v_tlb_miss.S
index e1fbf8c7578..bde867fd71e 100644
--- a/arch/sparc/kernel/sun4v_tlb_miss.S
+++ b/arch/sparc/kernel/sun4v_tlb_miss.S
@@ -176,7 +176,7 @@ sun4v_tsb_miss_common:
 
 	sub	%g2, TRAP_PER_CPU_FAULT_INFO, %g2
 
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 	mov	SCRATCHPAD_UTSBREG2, %g5
 	ldxa	[%g5] ASI_SCRATCHPAD, %g5
 	cmp	%g5, -1
diff --git a/arch/sparc/kernel/sys_sparc32.c b/arch/sparc/kernel/sys_sparc32.c
index d862499eb01..c3239811a1b 100644
--- a/arch/sparc/kernel/sys_sparc32.c
+++ b/arch/sparc/kernel/sys_sparc32.c
@@ -403,7 +403,7 @@ asmlinkage long compat_sys_rt_sigaction(int sig,
 asmlinkage long sparc32_execve(struct pt_regs *regs)
 {
 	int error, base = 0;
-	char *filename;
+	struct filename *filename;
 
 	/* User register window flush is done by entry.S */
 
@@ -416,7 +416,7 @@ asmlinkage long sparc32_execve(struct pt_regs *regs)
 	if (IS_ERR(filename))
 		goto out;
 
-	error = compat_do_execve(filename,
+	error = compat_do_execve(filename->name,
 				 compat_ptr(regs->u_regs[base + UREG_I1]),
 				 compat_ptr(regs->u_regs[base + UREG_I2]), regs);
 
diff --git a/arch/sparc/kernel/syscalls.S b/arch/sparc/kernel/syscalls.S
index 1d7e274f3f2..7f5f65d0b3f 100644
--- a/arch/sparc/kernel/syscalls.S
+++ b/arch/sparc/kernel/syscalls.S
@@ -212,24 +212,20 @@ linux_sparc_syscall:
 3:	stx	%o0, [%sp + PTREGS_OFF + PT_V9_I0]
 ret_sys_call:
 	ldx	[%sp + PTREGS_OFF + PT_V9_TSTATE], %g3
-	ldx	[%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc
 	sra	%o0, 0, %o0
 	mov	%ulo(TSTATE_XCARRY | TSTATE_ICARRY), %g2
 	sllx	%g2, 32, %g2
 
-	/* Check if force_successful_syscall_return()
-	 * was invoked.
-	 */
-	ldub	[%g6 + TI_SYS_NOERROR], %l2
-	brnz,a,pn %l2, 80f
-	 stb	%g0, [%g6 + TI_SYS_NOERROR]
-
 	cmp	%o0, -ERESTART_RESTARTBLOCK
 	bgeu,pn	%xcc, 1f
-	 andcc	%l0, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT|_TIF_SYSCALL_TRACEPOINT), %l6
-80:
+	 andcc	%l0, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT|_TIF_SYSCALL_TRACEPOINT), %g0
+	ldx	[%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc
+
+2:
+	stb	%g0, [%g6 + TI_SYS_NOERROR]
 	/* System call success, clear Carry condition code. */
 	andn	%g3, %g2, %g3
+3:
 	stx	%g3, [%sp + PTREGS_OFF + PT_V9_TSTATE]	
 	bne,pn	%icc, linux_syscall_trace2
 	 add	%l1, 0x4, %l2			! npc = npc+4
@@ -238,20 +234,20 @@ ret_sys_call:
 	 stx	%l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
 
 1:
+	/* Check if force_successful_syscall_return()
+	 * was invoked.
+	 */
+	ldub	[%g6 + TI_SYS_NOERROR], %l2
+	brnz,pn %l2, 2b
+	 ldx	[%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc
 	/* System call failure, set Carry condition code.
 	 * Also, get abs(errno) to return to the process.
 	 */
-	andcc	%l0, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT|_TIF_SYSCALL_TRACEPOINT), %l6	
 	sub	%g0, %o0, %o0
-	or	%g3, %g2, %g3
 	stx	%o0, [%sp + PTREGS_OFF + PT_V9_I0]
-	stx	%g3, [%sp + PTREGS_OFF + PT_V9_TSTATE]
-	bne,pn	%icc, linux_syscall_trace2
-	 add	%l1, 0x4, %l2			! npc = npc+4
-	stx	%l1, [%sp + PTREGS_OFF + PT_V9_TPC]
+	ba,pt	%xcc, 3b
+	 or	%g3, %g2, %g3
 
-	b,pt	%xcc, rtrap
-	 stx	%l2, [%sp + PTREGS_OFF + PT_V9_TNPC]
 linux_syscall_trace2:
 	call	syscall_trace_leave
 	 add	%sp, PTREGS_OFF, %o0
diff --git a/arch/sparc/kernel/traps_64.c b/arch/sparc/kernel/traps_64.c
index fa1f1d375ff..b66a77968f3 100644
--- a/arch/sparc/kernel/traps_64.c
+++ b/arch/sparc/kernel/traps_64.c
@@ -1,6 +1,6 @@
 /* arch/sparc64/kernel/traps.c
  *
- * Copyright (C) 1995,1997,2008,2009 David S. Miller (davem@davemloft.net)
+ * Copyright (C) 1995,1997,2008,2009,2012 David S. Miller (davem@davemloft.net)
  * Copyright (C) 1997,1999,2000 Jakub Jelinek (jakub@redhat.com)
  */
 
@@ -18,6 +18,7 @@
 #include <linux/init.h>
 #include <linux/kdebug.h>
 #include <linux/ftrace.h>
+#include <linux/reboot.h>
 #include <linux/gfp.h>
 
 #include <asm/smp.h>
@@ -1760,85 +1761,223 @@ void cheetah_plus_parity_error(int type, struct pt_regs *regs)
 }
 
 struct sun4v_error_entry {
-	u64		err_handle;
-	u64		err_stick;
+	/* Unique error handle */
+/*0x00*/u64		err_handle;
 
-	u32		err_type;
+	/* %stick value at the time of the error */
+/*0x08*/u64		err_stick;
+
+/*0x10*/u8		reserved_1[3];
+
+	/* Error type */
+/*0x13*/u8		err_type;
 #define SUN4V_ERR_TYPE_UNDEFINED	0
 #define SUN4V_ERR_TYPE_UNCORRECTED_RES	1
 #define SUN4V_ERR_TYPE_PRECISE_NONRES	2
 #define SUN4V_ERR_TYPE_DEFERRED_NONRES	3
-#define SUN4V_ERR_TYPE_WARNING_RES	4
+#define SUN4V_ERR_TYPE_SHUTDOWN_RQST	4
+#define SUN4V_ERR_TYPE_DUMP_CORE	5
+#define SUN4V_ERR_TYPE_SP_STATE_CHANGE	6
+#define SUN4V_ERR_TYPE_NUM		7
 
-	u32		err_attrs;
+	/* Error attributes */
+/*0x14*/u32		err_attrs;
 #define SUN4V_ERR_ATTRS_PROCESSOR	0x00000001
 #define SUN4V_ERR_ATTRS_MEMORY		0x00000002
 #define SUN4V_ERR_ATTRS_PIO		0x00000004
 #define SUN4V_ERR_ATTRS_INT_REGISTERS	0x00000008
 #define SUN4V_ERR_ATTRS_FPU_REGISTERS	0x00000010
-#define SUN4V_ERR_ATTRS_USER_MODE	0x01000000
-#define SUN4V_ERR_ATTRS_PRIV_MODE	0x02000000
+#define SUN4V_ERR_ATTRS_SHUTDOWN_RQST	0x00000020
+#define SUN4V_ERR_ATTRS_ASR		0x00000040
+#define SUN4V_ERR_ATTRS_ASI		0x00000080
+#define SUN4V_ERR_ATTRS_PRIV_REG	0x00000100
+#define SUN4V_ERR_ATTRS_SPSTATE_MSK	0x00000600
+#define SUN4V_ERR_ATTRS_SPSTATE_SHFT	9
+#define SUN4V_ERR_ATTRS_MODE_MSK	0x03000000
+#define SUN4V_ERR_ATTRS_MODE_SHFT	24
 #define SUN4V_ERR_ATTRS_RES_QUEUE_FULL	0x80000000
 
-	u64		err_raddr;
-	u32		err_size;
-	u16		err_cpu;
-	u16		err_pad;
+#define SUN4V_ERR_SPSTATE_FAULTED	0
+#define SUN4V_ERR_SPSTATE_AVAILABLE	1
+#define SUN4V_ERR_SPSTATE_NOT_PRESENT	2
+
+#define SUN4V_ERR_MODE_USER		1
+#define SUN4V_ERR_MODE_PRIV		2
+
+	/* Real address of the memory region or PIO transaction */
+/*0x18*/u64		err_raddr;
+
+	/* Size of the operation triggering the error, in bytes */
+/*0x20*/u32		err_size;
+
+	/* ID of the CPU */
+/*0x24*/u16		err_cpu;
+
+	/* Grace periof for shutdown, in seconds */
+/*0x26*/u16		err_secs;
+
+	/* Value of the %asi register */
+/*0x28*/u8		err_asi;
+
+/*0x29*/u8		reserved_2;
+
+	/* Value of the ASR register number */
+/*0x2a*/u16		err_asr;
+#define SUN4V_ERR_ASR_VALID		0x8000
+
+/*0x2c*/u32		reserved_3;
+/*0x30*/u64		reserved_4;
+/*0x38*/u64		reserved_5;
 };
 
 static atomic_t sun4v_resum_oflow_cnt = ATOMIC_INIT(0);
 static atomic_t sun4v_nonresum_oflow_cnt = ATOMIC_INIT(0);
 
-static const char *sun4v_err_type_to_str(u32 type)
-{
-	switch (type) {
-	case SUN4V_ERR_TYPE_UNDEFINED:
-		return "undefined";
-	case SUN4V_ERR_TYPE_UNCORRECTED_RES:
-		return "uncorrected resumable";
-	case SUN4V_ERR_TYPE_PRECISE_NONRES:
-		return "precise nonresumable";
-	case SUN4V_ERR_TYPE_DEFERRED_NONRES:
-		return "deferred nonresumable";
-	case SUN4V_ERR_TYPE_WARNING_RES:
-		return "warning resumable";
-	default:
-		return "unknown";
+static const char *sun4v_err_type_to_str(u8 type)
+{
+	static const char *types[SUN4V_ERR_TYPE_NUM] = {
+		"undefined",
+		"uncorrected resumable",
+		"precise nonresumable",
+		"deferred nonresumable",
+		"shutdown request",
+		"dump core",
+		"SP state change",
+	};
+
+	if (type < SUN4V_ERR_TYPE_NUM)
+		return types[type];
+
+	return "unknown";
+}
+
+static void sun4v_emit_err_attr_strings(u32 attrs)
+{
+	static const char *attr_names[] = {
+		"processor",
+		"memory",
+		"PIO",
+		"int-registers",
+		"fpu-registers",
+		"shutdown-request",
+		"ASR",
+		"ASI",
+		"priv-reg",
+	};
+	static const char *sp_states[] = {
+		"sp-faulted",
+		"sp-available",
+		"sp-not-present",
+		"sp-state-reserved",
+	};
+	static const char *modes[] = {
+		"mode-reserved0",
+		"user",
+		"priv",
+		"mode-reserved1",
+	};
+	u32 sp_state, mode;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(attr_names); i++) {
+		if (attrs & (1U << i)) {
+			const char *s = attr_names[i];
+
+			pr_cont("%s ", s);
+		}
 	}
+
+	sp_state = ((attrs & SUN4V_ERR_ATTRS_SPSTATE_MSK) >>
+		    SUN4V_ERR_ATTRS_SPSTATE_SHFT);
+	pr_cont("%s ", sp_states[sp_state]);
+
+	mode = ((attrs & SUN4V_ERR_ATTRS_MODE_MSK) >>
+		SUN4V_ERR_ATTRS_MODE_SHFT);
+	pr_cont("%s ", modes[mode]);
+
+	if (attrs & SUN4V_ERR_ATTRS_RES_QUEUE_FULL)
+		pr_cont("res-queue-full ");
 }
 
-static void sun4v_log_error(struct pt_regs *regs, struct sun4v_error_entry *ent, int cpu, const char *pfx, atomic_t *ocnt)
+/* When the report contains a real-address of "-1" it means that the
+ * hardware did not provide the address.  So we compute the effective
+ * address of the load or store instruction at regs->tpc and report
+ * that.  Usually when this happens it's a PIO and in such a case we
+ * are using physical addresses with bypass ASIs anyways, so what we
+ * report here is exactly what we want.
+ */
+static void sun4v_report_real_raddr(const char *pfx, struct pt_regs *regs)
 {
+	unsigned int insn;
+	u64 addr;
+
+	if (!(regs->tstate & TSTATE_PRIV))
+		return;
+
+	insn = *(unsigned int *) regs->tpc;
+
+	addr = compute_effective_address(regs, insn, 0);
+
+	printk("%s: insn effective address [0x%016llx]\n",
+	       pfx, addr);
+}
+
+static void sun4v_log_error(struct pt_regs *regs, struct sun4v_error_entry *ent,
+			    int cpu, const char *pfx, atomic_t *ocnt)
+{
+	u64 *raw_ptr = (u64 *) ent;
+	u32 attrs;
 	int cnt;
 
 	printk("%s: Reporting on cpu %d\n", pfx, cpu);
-	printk("%s: err_handle[%llx] err_stick[%llx] err_type[%08x:%s]\n",
-	       pfx,
-	       ent->err_handle, ent->err_stick,
-	       ent->err_type,
-	       sun4v_err_type_to_str(ent->err_type));
-	printk("%s: err_attrs[%08x:%s %s %s %s %s %s %s %s]\n",
-	       pfx,
-	       ent->err_attrs,
-	       ((ent->err_attrs & SUN4V_ERR_ATTRS_PROCESSOR) ?
-		"processor" : ""),
-	       ((ent->err_attrs & SUN4V_ERR_ATTRS_MEMORY) ?
-		"memory" : ""),
-	       ((ent->err_attrs & SUN4V_ERR_ATTRS_PIO) ?
-		"pio" : ""),
-	       ((ent->err_attrs & SUN4V_ERR_ATTRS_INT_REGISTERS) ?
-		"integer-regs" : ""),
-	       ((ent->err_attrs & SUN4V_ERR_ATTRS_FPU_REGISTERS) ?
-		"fpu-regs" : ""),
-	       ((ent->err_attrs & SUN4V_ERR_ATTRS_USER_MODE) ?
-		"user" : ""),
-	       ((ent->err_attrs & SUN4V_ERR_ATTRS_PRIV_MODE) ?
-		"privileged" : ""),
-	       ((ent->err_attrs & SUN4V_ERR_ATTRS_RES_QUEUE_FULL) ?
-		"queue-full" : ""));
-	printk("%s: err_raddr[%016llx] err_size[%u] err_cpu[%u]\n",
-	       pfx,
-	       ent->err_raddr, ent->err_size, ent->err_cpu);
+	printk("%s: TPC [0x%016lx] <%pS>\n",
+	       pfx, regs->tpc, (void *) regs->tpc);
+
+	printk("%s: RAW [%016llx:%016llx:%016llx:%016llx\n",
+	       pfx, raw_ptr[0], raw_ptr[1], raw_ptr[2], raw_ptr[3]);
+	printk("%s:      %016llx:%016llx:%016llx:%016llx]\n",
+	       pfx, raw_ptr[4], raw_ptr[5], raw_ptr[6], raw_ptr[7]);
+
+	printk("%s: handle [0x%016llx] stick [0x%016llx]\n",
+	       pfx, ent->err_handle, ent->err_stick);
+
+	printk("%s: type [%s]\n", pfx, sun4v_err_type_to_str(ent->err_type));
+
+	attrs = ent->err_attrs;
+	printk("%s: attrs [0x%08x] < ", pfx, attrs);
+	sun4v_emit_err_attr_strings(attrs);
+	pr_cont(">\n");
+
+	/* Various fields in the error report are only valid if
+	 * certain attribute bits are set.
+	 */
+	if (attrs & (SUN4V_ERR_ATTRS_MEMORY |
+		     SUN4V_ERR_ATTRS_PIO |
+		     SUN4V_ERR_ATTRS_ASI)) {
+		printk("%s: raddr [0x%016llx]\n", pfx, ent->err_raddr);
+
+		if (ent->err_raddr == ~(u64)0)
+			sun4v_report_real_raddr(pfx, regs);
+	}
+
+	if (attrs & (SUN4V_ERR_ATTRS_MEMORY | SUN4V_ERR_ATTRS_ASI))
+		printk("%s: size [0x%x]\n", pfx, ent->err_size);
+
+	if (attrs & (SUN4V_ERR_ATTRS_PROCESSOR |
+		     SUN4V_ERR_ATTRS_INT_REGISTERS |
+		     SUN4V_ERR_ATTRS_FPU_REGISTERS |
+		     SUN4V_ERR_ATTRS_PRIV_REG))
+		printk("%s: cpu[%u]\n", pfx, ent->err_cpu);
+
+	if (attrs & SUN4V_ERR_ATTRS_ASI)
+		printk("%s: asi [0x%02x]\n", pfx, ent->err_asi);
+
+	if ((attrs & (SUN4V_ERR_ATTRS_INT_REGISTERS |
+		      SUN4V_ERR_ATTRS_FPU_REGISTERS |
+		      SUN4V_ERR_ATTRS_PRIV_REG)) &&
+	    (ent->err_asr & SUN4V_ERR_ASR_VALID) != 0)
+		printk("%s: reg [0x%04x]\n",
+		       pfx, ent->err_asr & ~SUN4V_ERR_ASR_VALID);
 
 	show_regs(regs);
 
@@ -1874,13 +2013,15 @@ void sun4v_resum_error(struct pt_regs *regs, unsigned long offset)
 
 	put_cpu();
 
-	if (ent->err_type == SUN4V_ERR_TYPE_WARNING_RES) {
-		/* If err_type is 0x4, it's a powerdown request.  Do
-		 * not do the usual resumable error log because that
-		 * makes it look like some abnormal error.
+	if (local_copy.err_type == SUN4V_ERR_TYPE_SHUTDOWN_RQST) {
+		/* We should really take the seconds field of
+		 * the error report and use it for the shutdown
+		 * invocation, but for now do the same thing we
+		 * do for a DS shutdown request.
 		 */
-		printk(KERN_INFO "Power down request...\n");
-		kill_cad_pid(SIGINT, 1);
+		pr_info("Shutdown request, %u seconds...\n",
+			local_copy.err_secs);
+		orderly_poweroff(true);
 		return;
 	}
 
diff --git a/arch/sparc/kernel/tsb.S b/arch/sparc/kernel/tsb.S
index db15d123f05..d4bdc7a6237 100644
--- a/arch/sparc/kernel/tsb.S
+++ b/arch/sparc/kernel/tsb.S
@@ -49,7 +49,7 @@ tsb_miss_page_table_walk:
 	/* Before committing to a full page table walk,
 	 * check the huge page TSB.
 	 */
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 
 661:	ldx		[%g7 + TRAP_PER_CPU_TSB_HUGE], %g5
 	nop
@@ -110,12 +110,9 @@ tsb_miss_page_table_walk:
 tsb_miss_page_table_walk_sun4v_fastpath:
 	USER_PGTABLE_WALK_TL1(%g4, %g7, %g5, %g2, tsb_do_fault)
 
-	/* Load and check PTE.  */
-	ldxa		[%g5] ASI_PHYS_USE_EC, %g5
-	brgez,pn	%g5, tsb_do_fault
-	 nop
+	/* Valid PTE is now in %g5.  */
 
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 661:	sethi		%uhi(_PAGE_SZALL_4U), %g7
 	sllx		%g7, 32, %g7
 	.section	.sun4v_2insn_patch, "ax"
diff --git a/arch/sparc/lib/Makefile b/arch/sparc/lib/Makefile
index 30f6ab51c55..8410065f286 100644
--- a/arch/sparc/lib/Makefile
+++ b/arch/sparc/lib/Makefile
@@ -33,7 +33,7 @@ lib-$(CONFIG_SPARC64) += NG2memcpy.o NG2copy_from_user.o NG2copy_to_user.o
 lib-$(CONFIG_SPARC64) +=  NG2patch.o
 
 lib-$(CONFIG_SPARC64) += NG4memcpy.o NG4copy_from_user.o NG4copy_to_user.o
-lib-$(CONFIG_SPARC64) +=  NG4patch.o NG4copy_page.o
+lib-$(CONFIG_SPARC64) +=  NG4patch.o NG4copy_page.o NG4clear_page.o NG4memset.o
 
 lib-$(CONFIG_SPARC64) += GENmemcpy.o GENcopy_from_user.o GENcopy_to_user.o
 lib-$(CONFIG_SPARC64) += GENpatch.o GENpage.o GENbzero.o
diff --git a/arch/sparc/lib/NG4clear_page.S b/arch/sparc/lib/NG4clear_page.S
new file mode 100644
index 00000000000..e16c88204a4
--- /dev/null
+++ b/arch/sparc/lib/NG4clear_page.S
@@ -0,0 +1,29 @@
+/* NG4copy_page.S: Niagara-4 optimized clear page.
+ *
+ * Copyright (C) 2012 (davem@davemloft.net)
+ */
+
+#include <asm/asi.h>
+#include <asm/page.h>
+
+	.text
+
+	.register	%g3, #scratch
+
+	.align		32
+	.globl		NG4clear_page
+	.globl		NG4clear_user_page
+NG4clear_page:		/* %o0=dest */
+NG4clear_user_page:	/* %o0=dest, %o1=vaddr */
+	set		PAGE_SIZE, %g7
+	mov		0x20, %g3
+1:	stxa		%g0, [%o0 + %g0] ASI_ST_BLKINIT_MRU_P
+	subcc		%g7, 0x40, %g7
+	stxa		%g0, [%o0 + %g3] ASI_ST_BLKINIT_MRU_P
+	bne,pt		%xcc, 1b
+	 add		%o0, 0x40, %o0
+	membar		#StoreLoad|#StoreStore
+	retl
+	 nop
+	.size		NG4clear_page,.-NG4clear_page
+	.size		NG4clear_user_page,.-NG4clear_user_page
\ No newline at end of file
diff --git a/arch/sparc/lib/NG4copy_page.S b/arch/sparc/lib/NG4copy_page.S
index f30ec10bbca..28504e88c53 100644
--- a/arch/sparc/lib/NG4copy_page.S
+++ b/arch/sparc/lib/NG4copy_page.S
@@ -30,25 +30,25 @@ NG4copy_user_page:	/* %o0=dest, %o1=src, %o2=vaddr */
 	ldx		[%o1 + 0x10], %o4
 	ldx		[%o1 + 0x18], %o5
 	ldx		[%o1 + 0x20], %g1
-	stxa		%o2, [%o0] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o2, [%o0] ASI_ST_BLKINIT_MRU_P
 	add		%o0, 0x08, %o0
 	ldx		[%o1 + 0x28], %g2
-	stxa		%o3, [%o0] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o3, [%o0] ASI_ST_BLKINIT_MRU_P
 	add		%o0, 0x08, %o0
 	ldx		[%o1 + 0x30], %g3
-	stxa		%o4, [%o0] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o4, [%o0] ASI_ST_BLKINIT_MRU_P
 	add		%o0, 0x08, %o0
 	ldx		[%o1 + 0x38], %o2
 	add		%o1, 0x40, %o1
-	stxa		%o5, [%o0] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o5, [%o0] ASI_ST_BLKINIT_MRU_P
 	add		%o0, 0x08, %o0
-	stxa		%g1, [%o0] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%g1, [%o0] ASI_ST_BLKINIT_MRU_P
 	add		%o0, 0x08, %o0
-	stxa		%g2, [%o0] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%g2, [%o0] ASI_ST_BLKINIT_MRU_P
 	add		%o0, 0x08, %o0
-	stxa		%g3, [%o0] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%g3, [%o0] ASI_ST_BLKINIT_MRU_P
 	add		%o0, 0x08, %o0
-	stxa		%o2, [%o0] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o2, [%o0] ASI_ST_BLKINIT_MRU_P
 	add		%o0, 0x08, %o0
 	bne,pt		%icc, 1b
 	 prefetch	[%o1 + 0x200], #n_reads_strong
diff --git a/arch/sparc/lib/NG4memset.S b/arch/sparc/lib/NG4memset.S
new file mode 100644
index 00000000000..41da4bdd95c
--- /dev/null
+++ b/arch/sparc/lib/NG4memset.S
@@ -0,0 +1,105 @@
+/* NG4memset.S: Niagara-4 optimized memset/bzero.
+ *
+ * Copyright (C) 2012 David S. Miller (davem@davemloft.net)
+ */
+
+#include <asm/asi.h>
+
+	.register	%g2, #scratch
+	.register	%g3, #scratch
+
+	.text
+	.align		32
+	.globl		NG4memset
+NG4memset:
+	andcc		%o1, 0xff, %o4
+	be,pt		%icc, 1f
+	 mov		%o2, %o1
+	sllx		%o4, 8, %g1
+	or		%g1, %o4, %o2
+	sllx		%o2, 16, %g1
+	or		%g1, %o2, %o2
+	sllx		%o2, 32, %g1
+	ba,pt		%icc, 1f
+	 or		%g1, %o2, %o4
+	.size		NG4memset,.-NG4memset
+
+	.align		32
+	.globl		NG4bzero
+NG4bzero:
+	clr		%o4
+1:	cmp		%o1, 16
+	ble		%icc, .Ltiny
+	 mov		%o0, %o3
+	sub		%g0, %o0, %g1
+	and		%g1, 0x7, %g1
+	brz,pt		%g1, .Laligned8
+	 sub		%o1, %g1, %o1
+1:	stb		%o4, [%o0 + 0x00]
+	subcc		%g1, 1, %g1
+	bne,pt		%icc, 1b
+	 add		%o0, 1, %o0
+.Laligned8:
+	cmp		%o1, 64 + (64 - 8)
+	ble		.Lmedium
+	 sub		%g0, %o0, %g1
+	andcc		%g1, (64 - 1), %g1
+	brz,pn		%g1, .Laligned64
+	 sub		%o1, %g1, %o1
+1:	stx		%o4, [%o0 + 0x00]
+	subcc		%g1, 8, %g1
+	bne,pt		%icc, 1b
+	 add		%o0, 0x8, %o0
+.Laligned64:
+	andn		%o1, 64 - 1, %g1
+	sub		%o1, %g1, %o1
+	brnz,pn		%o4, .Lnon_bzero_loop
+	 mov		0x20, %g2
+1:	stxa		%o4, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
+	subcc		%g1, 0x40, %g1
+	stxa		%o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
+	bne,pt		%icc, 1b
+	 add		%o0, 0x40, %o0
+.Lpostloop:
+	cmp		%o1, 8
+	bl,pn		%icc, .Ltiny
+	 membar		#StoreStore|#StoreLoad
+.Lmedium:
+	andn		%o1, 0x7, %g1
+	sub		%o1, %g1, %o1
+1:	stx		%o4, [%o0 + 0x00]
+	subcc		%g1, 0x8, %g1
+	bne,pt		%icc, 1b
+	 add		%o0, 0x08, %o0
+	andcc		%o1, 0x4, %g1
+	be,pt		%icc, .Ltiny
+	 sub		%o1, %g1, %o1
+	stw		%o4, [%o0 + 0x00]
+	add		%o0, 0x4, %o0
+.Ltiny:
+	cmp		%o1, 0
+	be,pn		%icc, .Lexit
+1:	 subcc		%o1, 1, %o1
+	stb		%o4, [%o0 + 0x00]
+	bne,pt		%icc, 1b
+	 add		%o0, 1, %o0
+.Lexit:
+	retl
+	 mov		%o3, %o0
+.Lnon_bzero_loop:
+	mov		0x08, %g3
+	mov		0x28, %o5
+1:	stxa		%o4, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
+	subcc		%g1, 0x40, %g1
+	stxa		%o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o4, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o4, [%o0 + %o5] ASI_BLK_INIT_QUAD_LDD_P
+	add		%o0, 0x10, %o0
+	stxa		%o4, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o4, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
+	stxa		%o4, [%o0 + %o5] ASI_BLK_INIT_QUAD_LDD_P
+	bne,pt		%icc, 1b
+	 add		%o0, 0x30, %o0
+	ba,a,pt		%icc, .Lpostloop
+	.size		NG4bzero,.-NG4bzero
diff --git a/arch/sparc/lib/NG4patch.S b/arch/sparc/lib/NG4patch.S
index c21c34c61dd..a114cbcf2a4 100644
--- a/arch/sparc/lib/NG4patch.S
+++ b/arch/sparc/lib/NG4patch.S
@@ -32,12 +32,23 @@ niagara4_patch_copyops:
 	 nop
 	.size	niagara4_patch_copyops,.-niagara4_patch_copyops
 
+	.globl	niagara4_patch_bzero
+	.type	niagara4_patch_bzero,#function
+niagara4_patch_bzero:
+	NG_DO_PATCH(memset, NG4memset)
+	NG_DO_PATCH(__bzero, NG4bzero)
+	NG_DO_PATCH(__clear_user, NGclear_user)
+	NG_DO_PATCH(tsb_init, NGtsb_init)
+	retl
+	 nop
+	.size	niagara4_patch_bzero,.-niagara4_patch_bzero
+
 	.globl	niagara4_patch_pageops
 	.type	niagara4_patch_pageops,#function
 niagara4_patch_pageops:
 	NG_DO_PATCH(copy_user_page, NG4copy_user_page)
-	NG_DO_PATCH(_clear_page, NGclear_page)
-	NG_DO_PATCH(clear_user_page, NGclear_user_page)
+	NG_DO_PATCH(_clear_page, NG4clear_page)
+	NG_DO_PATCH(clear_user_page, NG4clear_user_page)
 	retl
 	 nop
 	.size	niagara4_patch_pageops,.-niagara4_patch_pageops
diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c
index 77ac917be15..e98bfda205a 100644
--- a/arch/sparc/mm/fault_32.c
+++ b/arch/sparc/mm/fault_32.c
@@ -265,6 +265,7 @@ good_area:
 		}
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			/* No need to up_read(&mm->mmap_sem) as we would
 			 * have already released it in __lock_page_or_retry
diff --git a/arch/sparc/mm/fault_64.c b/arch/sparc/mm/fault_64.c
index 1fe0429b631..097aee763af 100644
--- a/arch/sparc/mm/fault_64.c
+++ b/arch/sparc/mm/fault_64.c
@@ -151,8 +151,6 @@ show_signal_msg(struct pt_regs *regs, int sig, int code,
 	printk(KERN_CONT "\n");
 }
 
-extern unsigned long compute_effective_address(struct pt_regs *, unsigned int, unsigned int);
-
 static void do_fault_siginfo(int code, int sig, struct pt_regs *regs,
 			     unsigned int insn, int fault_code)
 {
@@ -452,6 +450,7 @@ good_area:
 		}
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			/* No need to up_read(&mm->mmap_sem) as we would
 			 * have already released it in __lock_page_or_retry
@@ -464,13 +463,13 @@ good_area:
 	up_read(&mm->mmap_sem);
 
 	mm_rss = get_mm_rss(mm);
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 	mm_rss -= (mm->context.huge_pte_count * (HPAGE_SIZE / PAGE_SIZE));
 #endif
 	if (unlikely(mm_rss >
 		     mm->context.tsb_block[MM_TSB_BASE].tsb_rss_limit))
 		tsb_grow(mm, MM_TSB_BASE, mm_rss);
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 	mm_rss = mm->context.huge_pte_count;
 	if (unlikely(mm_rss >
 		     mm->context.tsb_block[MM_TSB_HUGE].tsb_rss_limit))
diff --git a/arch/sparc/mm/hugetlbpage.c b/arch/sparc/mm/hugetlbpage.c
index 07e14535375..f76f83d5ac6 100644
--- a/arch/sparc/mm/hugetlbpage.c
+++ b/arch/sparc/mm/hugetlbpage.c
@@ -303,53 +303,3 @@ struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address,
 {
 	return NULL;
 }
-
-static void context_reload(void *__data)
-{
-	struct mm_struct *mm = __data;
-
-	if (mm == current->mm)
-		load_secondary_context(mm);
-}
-
-void hugetlb_prefault_arch_hook(struct mm_struct *mm)
-{
-	struct tsb_config *tp = &mm->context.tsb_block[MM_TSB_HUGE];
-
-	if (likely(tp->tsb != NULL))
-		return;
-
-	tsb_grow(mm, MM_TSB_HUGE, 0);
-	tsb_context_switch(mm);
-	smp_tsb_sync(mm);
-
-	/* On UltraSPARC-III+ and later, configure the second half of
-	 * the Data-TLB for huge pages.
-	 */
-	if (tlb_type == cheetah_plus) {
-		unsigned long ctx;
-
-		spin_lock(&ctx_alloc_lock);
-		ctx = mm->context.sparc64_ctx_val;
-		ctx &= ~CTX_PGSZ_MASK;
-		ctx |= CTX_PGSZ_BASE << CTX_PGSZ0_SHIFT;
-		ctx |= CTX_PGSZ_HUGE << CTX_PGSZ1_SHIFT;
-
-		if (ctx != mm->context.sparc64_ctx_val) {
-			/* When changing the page size fields, we
-			 * must perform a context flush so that no
-			 * stale entries match.  This flush must
-			 * occur with the original context register
-			 * settings.
-			 */
-			do_flush_tlb_mm(mm);
-
-			/* Reload the context register of all processors
-			 * also executing in this address space.
-			 */
-			mm->context.sparc64_ctx_val = ctx;
-			on_each_cpu(context_reload, mm, 0);
-		}
-		spin_unlock(&ctx_alloc_lock);
-	}
-}
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 7a9b788c6ce..9e28a118e6a 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -276,7 +276,6 @@ static inline void tsb_insert(struct tsb *ent, unsigned long tag, unsigned long
 }
 
 unsigned long _PAGE_ALL_SZ_BITS __read_mostly;
-unsigned long _PAGE_SZBITS __read_mostly;
 
 static void flush_dcache(unsigned long pfn)
 {
@@ -307,12 +306,24 @@ static void flush_dcache(unsigned long pfn)
 	}
 }
 
+/* mm->context.lock must be held */
+static void __update_mmu_tsb_insert(struct mm_struct *mm, unsigned long tsb_index,
+				    unsigned long tsb_hash_shift, unsigned long address,
+				    unsigned long tte)
+{
+	struct tsb *tsb = mm->context.tsb_block[tsb_index].tsb;
+	unsigned long tag;
+
+	tsb += ((address >> tsb_hash_shift) &
+		(mm->context.tsb_block[tsb_index].tsb_nentries - 1UL));
+	tag = (address >> 22UL);
+	tsb_insert(tsb, tag, tte);
+}
+
 void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
 {
+	unsigned long tsb_index, tsb_hash_shift, flags;
 	struct mm_struct *mm;
-	struct tsb *tsb;
-	unsigned long tag, flags;
-	unsigned long tsb_index, tsb_hash_shift;
 	pte_t pte = *ptep;
 
 	if (tlb_type != hypervisor) {
@@ -329,7 +340,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *
 
 	spin_lock_irqsave(&mm->context.lock, flags);
 
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 	if (mm->context.tsb_block[MM_TSB_HUGE].tsb != NULL) {
 		if ((tlb_type == hypervisor &&
 		     (pte_val(pte) & _PAGE_SZALL_4V) == _PAGE_SZHUGE_4V) ||
@@ -341,11 +352,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *
 	}
 #endif
 
-	tsb = mm->context.tsb_block[tsb_index].tsb;
-	tsb += ((address >> tsb_hash_shift) &
-		(mm->context.tsb_block[tsb_index].tsb_nentries - 1UL));
-	tag = (address >> 22UL);
-	tsb_insert(tsb, tag, pte_val(pte));
+	__update_mmu_tsb_insert(mm, tsb_index, tsb_hash_shift,
+				address, pte_val(pte));
 
 	spin_unlock_irqrestore(&mm->context.lock, flags);
 }
@@ -2275,8 +2283,7 @@ static void __init sun4u_pgprot_init(void)
 		     __ACCESS_BITS_4U | _PAGE_E_4U);
 
 #ifdef CONFIG_DEBUG_PAGEALLOC
-	kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4U) ^
-		0xfffff80000000000UL;
+	kern_linear_pte_xor[0] = _PAGE_VALID ^ 0xfffff80000000000UL;
 #else
 	kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4U) ^
 		0xfffff80000000000UL;
@@ -2287,7 +2294,6 @@ static void __init sun4u_pgprot_init(void)
 	for (i = 1; i < 4; i++)
 		kern_linear_pte_xor[i] = kern_linear_pte_xor[0];
 
-	_PAGE_SZBITS = _PAGE_SZBITS_4U;
 	_PAGE_ALL_SZ_BITS =  (_PAGE_SZ4MB_4U | _PAGE_SZ512K_4U |
 			      _PAGE_SZ64K_4U | _PAGE_SZ8K_4U |
 			      _PAGE_SZ32MB_4U | _PAGE_SZ256MB_4U);
@@ -2324,8 +2330,7 @@ static void __init sun4v_pgprot_init(void)
 	_PAGE_CACHE = _PAGE_CACHE_4V;
 
 #ifdef CONFIG_DEBUG_PAGEALLOC
-	kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZBITS_4V) ^
-		0xfffff80000000000UL;
+	kern_linear_pte_xor[0] = _PAGE_VALID ^ 0xfffff80000000000UL;
 #else
 	kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4V) ^
 		0xfffff80000000000UL;
@@ -2339,7 +2344,6 @@ static void __init sun4v_pgprot_init(void)
 	pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4V | __DIRTY_BITS_4V |
 		     __ACCESS_BITS_4V | _PAGE_E_4V);
 
-	_PAGE_SZBITS = _PAGE_SZBITS_4V;
 	_PAGE_ALL_SZ_BITS = (_PAGE_SZ16GB_4V | _PAGE_SZ2GB_4V |
 			     _PAGE_SZ256MB_4V | _PAGE_SZ32MB_4V |
 			     _PAGE_SZ4MB_4V | _PAGE_SZ512K_4V |
@@ -2472,3 +2476,281 @@ void __flush_tlb_all(void)
 	__asm__ __volatile__("wrpr	%0, 0, %%pstate"
 			     : : "r" (pstate));
 }
+
+static pte_t *get_from_cache(struct mm_struct *mm)
+{
+	struct page *page;
+	pte_t *ret;
+
+	spin_lock(&mm->page_table_lock);
+	page = mm->context.pgtable_page;
+	ret = NULL;
+	if (page) {
+		void *p = page_address(page);
+
+		mm->context.pgtable_page = NULL;
+
+		ret = (pte_t *) (p + (PAGE_SIZE / 2));
+	}
+	spin_unlock(&mm->page_table_lock);
+
+	return ret;
+}
+
+static struct page *__alloc_for_cache(struct mm_struct *mm)
+{
+	struct page *page = alloc_page(GFP_KERNEL | __GFP_NOTRACK |
+				       __GFP_REPEAT | __GFP_ZERO);
+
+	if (page) {
+		spin_lock(&mm->page_table_lock);
+		if (!mm->context.pgtable_page) {
+			atomic_set(&page->_count, 2);
+			mm->context.pgtable_page = page;
+		}
+		spin_unlock(&mm->page_table_lock);
+	}
+	return page;
+}
+
+pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
+			    unsigned long address)
+{
+	struct page *page;
+	pte_t *pte;
+
+	pte = get_from_cache(mm);
+	if (pte)
+		return pte;
+
+	page = __alloc_for_cache(mm);
+	if (page)
+		pte = (pte_t *) page_address(page);
+
+	return pte;
+}
+
+pgtable_t pte_alloc_one(struct mm_struct *mm,
+			unsigned long address)
+{
+	struct page *page;
+	pte_t *pte;
+
+	pte = get_from_cache(mm);
+	if (pte)
+		return pte;
+
+	page = __alloc_for_cache(mm);
+	if (page) {
+		pgtable_page_ctor(page);
+		pte = (pte_t *) page_address(page);
+	}
+
+	return pte;
+}
+
+void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+	struct page *page = virt_to_page(pte);
+	if (put_page_testzero(page))
+		free_hot_cold_page(page, 0);
+}
+
+static void __pte_free(pgtable_t pte)
+{
+	struct page *page = virt_to_page(pte);
+	if (put_page_testzero(page)) {
+		pgtable_page_dtor(page);
+		free_hot_cold_page(page, 0);
+	}
+}
+
+void pte_free(struct mm_struct *mm, pgtable_t pte)
+{
+	__pte_free(pte);
+}
+
+void pgtable_free(void *table, bool is_page)
+{
+	if (is_page)
+		__pte_free(table);
+	else
+		kmem_cache_free(pgtable_cache, table);
+}
+
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+static pmd_t pmd_set_protbits(pmd_t pmd, pgprot_t pgprot, bool for_modify)
+{
+	if (pgprot_val(pgprot) & _PAGE_VALID)
+		pmd_val(pmd) |= PMD_HUGE_PRESENT;
+	if (tlb_type == hypervisor) {
+		if (pgprot_val(pgprot) & _PAGE_WRITE_4V)
+			pmd_val(pmd) |= PMD_HUGE_WRITE;
+		if (pgprot_val(pgprot) & _PAGE_EXEC_4V)
+			pmd_val(pmd) |= PMD_HUGE_EXEC;
+
+		if (!for_modify) {
+			if (pgprot_val(pgprot) & _PAGE_ACCESSED_4V)
+				pmd_val(pmd) |= PMD_HUGE_ACCESSED;
+			if (pgprot_val(pgprot) & _PAGE_MODIFIED_4V)
+				pmd_val(pmd) |= PMD_HUGE_DIRTY;
+		}
+	} else {
+		if (pgprot_val(pgprot) & _PAGE_WRITE_4U)
+			pmd_val(pmd) |= PMD_HUGE_WRITE;
+		if (pgprot_val(pgprot) & _PAGE_EXEC_4U)
+			pmd_val(pmd) |= PMD_HUGE_EXEC;
+
+		if (!for_modify) {
+			if (pgprot_val(pgprot) & _PAGE_ACCESSED_4U)
+				pmd_val(pmd) |= PMD_HUGE_ACCESSED;
+			if (pgprot_val(pgprot) & _PAGE_MODIFIED_4U)
+				pmd_val(pmd) |= PMD_HUGE_DIRTY;
+		}
+	}
+
+	return pmd;
+}
+
+pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
+{
+	pmd_t pmd;
+
+	pmd_val(pmd) = (page_nr << ((PAGE_SHIFT - PMD_PADDR_SHIFT)));
+	pmd_val(pmd) |= PMD_ISHUGE;
+	pmd = pmd_set_protbits(pmd, pgprot, false);
+	return pmd;
+}
+
+pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
+{
+	pmd_val(pmd) &= ~(PMD_HUGE_PRESENT |
+			  PMD_HUGE_WRITE |
+			  PMD_HUGE_EXEC);
+	pmd = pmd_set_protbits(pmd, newprot, true);
+	return pmd;
+}
+
+pgprot_t pmd_pgprot(pmd_t entry)
+{
+	unsigned long pte = 0;
+
+	if (pmd_val(entry) & PMD_HUGE_PRESENT)
+		pte |= _PAGE_VALID;
+
+	if (tlb_type == hypervisor) {
+		if (pmd_val(entry) & PMD_HUGE_PRESENT)
+			pte |= _PAGE_PRESENT_4V;
+		if (pmd_val(entry) & PMD_HUGE_EXEC)
+			pte |= _PAGE_EXEC_4V;
+		if (pmd_val(entry) & PMD_HUGE_WRITE)
+			pte |= _PAGE_W_4V;
+		if (pmd_val(entry) & PMD_HUGE_ACCESSED)
+			pte |= _PAGE_ACCESSED_4V;
+		if (pmd_val(entry) & PMD_HUGE_DIRTY)
+			pte |= _PAGE_MODIFIED_4V;
+		pte |= _PAGE_CP_4V|_PAGE_CV_4V;
+	} else {
+		if (pmd_val(entry) & PMD_HUGE_PRESENT)
+			pte |= _PAGE_PRESENT_4U;
+		if (pmd_val(entry) & PMD_HUGE_EXEC)
+			pte |= _PAGE_EXEC_4U;
+		if (pmd_val(entry) & PMD_HUGE_WRITE)
+			pte |= _PAGE_W_4U;
+		if (pmd_val(entry) & PMD_HUGE_ACCESSED)
+			pte |= _PAGE_ACCESSED_4U;
+		if (pmd_val(entry) & PMD_HUGE_DIRTY)
+			pte |= _PAGE_MODIFIED_4U;
+		pte |= _PAGE_CP_4U|_PAGE_CV_4U;
+	}
+
+	return __pgprot(pte);
+}
+
+void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
+			  pmd_t *pmd)
+{
+	unsigned long pte, flags;
+	struct mm_struct *mm;
+	pmd_t entry = *pmd;
+	pgprot_t prot;
+
+	if (!pmd_large(entry) || !pmd_young(entry))
+		return;
+
+	pte = (pmd_val(entry) & ~PMD_HUGE_PROTBITS);
+	pte <<= PMD_PADDR_SHIFT;
+	pte |= _PAGE_VALID;
+
+	prot = pmd_pgprot(entry);
+
+	if (tlb_type == hypervisor)
+		pgprot_val(prot) |= _PAGE_SZHUGE_4V;
+	else
+		pgprot_val(prot) |= _PAGE_SZHUGE_4U;
+
+	pte |= pgprot_val(prot);
+
+	mm = vma->vm_mm;
+
+	spin_lock_irqsave(&mm->context.lock, flags);
+
+	if (mm->context.tsb_block[MM_TSB_HUGE].tsb != NULL)
+		__update_mmu_tsb_insert(mm, MM_TSB_HUGE, HPAGE_SHIFT,
+					addr, pte);
+
+	spin_unlock_irqrestore(&mm->context.lock, flags);
+}
+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
+static void context_reload(void *__data)
+{
+	struct mm_struct *mm = __data;
+
+	if (mm == current->mm)
+		load_secondary_context(mm);
+}
+
+void hugetlb_setup(struct mm_struct *mm)
+{
+	struct tsb_config *tp = &mm->context.tsb_block[MM_TSB_HUGE];
+
+	if (likely(tp->tsb != NULL))
+		return;
+
+	tsb_grow(mm, MM_TSB_HUGE, 0);
+	tsb_context_switch(mm);
+	smp_tsb_sync(mm);
+
+	/* On UltraSPARC-III+ and later, configure the second half of
+	 * the Data-TLB for huge pages.
+	 */
+	if (tlb_type == cheetah_plus) {
+		unsigned long ctx;
+
+		spin_lock(&ctx_alloc_lock);
+		ctx = mm->context.sparc64_ctx_val;
+		ctx &= ~CTX_PGSZ_MASK;
+		ctx |= CTX_PGSZ_BASE << CTX_PGSZ0_SHIFT;
+		ctx |= CTX_PGSZ_HUGE << CTX_PGSZ1_SHIFT;
+
+		if (ctx != mm->context.sparc64_ctx_val) {
+			/* When changing the page size fields, we
+			 * must perform a context flush so that no
+			 * stale entries match.  This flush must
+			 * occur with the original context register
+			 * settings.
+			 */
+			do_flush_tlb_mm(mm);
+
+			/* Reload the context register of all processors
+			 * also executing in this address space.
+			 */
+			mm->context.sparc64_ctx_val = ctx;
+			on_each_cpu(context_reload, mm, 0);
+		}
+		spin_unlock(&ctx_alloc_lock);
+	}
+}
+#endif
diff --git a/arch/sparc/mm/tlb.c b/arch/sparc/mm/tlb.c
index b1f279cd00b..3e8fec391fe 100644
--- a/arch/sparc/mm/tlb.c
+++ b/arch/sparc/mm/tlb.c
@@ -43,16 +43,37 @@ void flush_tlb_pending(void)
 	put_cpu_var(tlb_batch);
 }
 
-void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
-		   pte_t *ptep, pte_t orig, int fullmm)
+static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
+			      bool exec)
 {
 	struct tlb_batch *tb = &get_cpu_var(tlb_batch);
 	unsigned long nr;
 
 	vaddr &= PAGE_MASK;
-	if (pte_exec(orig))
+	if (exec)
 		vaddr |= 0x1UL;
 
+	nr = tb->tlb_nr;
+
+	if (unlikely(nr != 0 && mm != tb->mm)) {
+		flush_tlb_pending();
+		nr = 0;
+	}
+
+	if (nr == 0)
+		tb->mm = mm;
+
+	tb->vaddrs[nr] = vaddr;
+	tb->tlb_nr = ++nr;
+	if (nr >= TLB_BATCH_NR)
+		flush_tlb_pending();
+
+	put_cpu_var(tlb_batch);
+}
+
+void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
+		   pte_t *ptep, pte_t orig, int fullmm)
+{
 	if (tlb_type != hypervisor &&
 	    pte_dirty(orig)) {
 		unsigned long paddr, pfn = pte_pfn(orig);
@@ -77,26 +98,91 @@ void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
 	}
 
 no_cache_flush:
+	if (!fullmm)
+		tlb_batch_add_one(mm, vaddr, pte_exec(orig));
+}
+
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
+			       pmd_t pmd, bool exec)
+{
+	unsigned long end;
+	pte_t *pte;
+
+	pte = pte_offset_map(&pmd, vaddr);
+	end = vaddr + HPAGE_SIZE;
+	while (vaddr < end) {
+		if (pte_val(*pte) & _PAGE_VALID)
+			tlb_batch_add_one(mm, vaddr, exec);
+		pte++;
+		vaddr += PAGE_SIZE;
+	}
+	pte_unmap(pte);
+}
 
-	if (fullmm) {
-		put_cpu_var(tlb_batch);
+void set_pmd_at(struct mm_struct *mm, unsigned long addr,
+		pmd_t *pmdp, pmd_t pmd)
+{
+	pmd_t orig = *pmdp;
+
+	*pmdp = pmd;
+
+	if (mm == &init_mm)
 		return;
+
+	if ((pmd_val(pmd) ^ pmd_val(orig)) & PMD_ISHUGE) {
+		if (pmd_val(pmd) & PMD_ISHUGE)
+			mm->context.huge_pte_count++;
+		else
+			mm->context.huge_pte_count--;
+		if (mm->context.huge_pte_count == 1)
+			hugetlb_setup(mm);
 	}
 
-	nr = tb->tlb_nr;
+	if (!pmd_none(orig)) {
+		bool exec = ((pmd_val(orig) & PMD_HUGE_EXEC) != 0);
 
-	if (unlikely(nr != 0 && mm != tb->mm)) {
-		flush_tlb_pending();
-		nr = 0;
+		addr &= HPAGE_MASK;
+		if (pmd_val(orig) & PMD_ISHUGE)
+			tlb_batch_add_one(mm, addr, exec);
+		else
+			tlb_batch_pmd_scan(mm, addr, orig, exec);
 	}
+}
 
-	if (nr == 0)
-		tb->mm = mm;
+void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable)
+{
+	struct list_head *lh = (struct list_head *) pgtable;
 
-	tb->vaddrs[nr] = vaddr;
-	tb->tlb_nr = ++nr;
-	if (nr >= TLB_BATCH_NR)
-		flush_tlb_pending();
+	assert_spin_locked(&mm->page_table_lock);
 
-	put_cpu_var(tlb_batch);
+	/* FIFO */
+	if (!mm->pmd_huge_pte)
+		INIT_LIST_HEAD(lh);
+	else
+		list_add(lh, (struct list_head *) mm->pmd_huge_pte);
+	mm->pmd_huge_pte = pgtable;
+}
+
+pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm)
+{
+	struct list_head *lh;
+	pgtable_t pgtable;
+
+	assert_spin_locked(&mm->page_table_lock);
+
+	/* FIFO */
+	pgtable = mm->pmd_huge_pte;
+	lh = (struct list_head *) pgtable;
+	if (list_empty(lh))
+		mm->pmd_huge_pte = NULL;
+	else {
+		mm->pmd_huge_pte = (pgtable_t) lh->next;
+		list_del(lh);
+	}
+	pte_val(pgtable[0]) = 0;
+	pte_val(pgtable[1]) = 0;
+
+	return pgtable;
 }
+#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
diff --git a/arch/sparc/mm/tsb.c b/arch/sparc/mm/tsb.c
index c52add79b83..7f647434749 100644
--- a/arch/sparc/mm/tsb.c
+++ b/arch/sparc/mm/tsb.c
@@ -78,7 +78,7 @@ void flush_tsb_user(struct tlb_batch *tb)
 		base = __pa(base);
 	__flush_tsb_one(tb, PAGE_SHIFT, base, nentries);
 
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 	if (mm->context.tsb_block[MM_TSB_HUGE].tsb) {
 		base = (unsigned long) mm->context.tsb_block[MM_TSB_HUGE].tsb;
 		nentries = mm->context.tsb_block[MM_TSB_HUGE].tsb_nentries;
@@ -90,29 +90,12 @@ void flush_tsb_user(struct tlb_batch *tb)
 	spin_unlock_irqrestore(&mm->context.lock, flags);
 }
 
-#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB)
 #define HV_PGSZ_IDX_BASE	HV_PGSZ_IDX_8K
 #define HV_PGSZ_MASK_BASE	HV_PGSZ_MASK_8K
-#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB)
-#define HV_PGSZ_IDX_BASE	HV_PGSZ_IDX_64K
-#define HV_PGSZ_MASK_BASE	HV_PGSZ_MASK_64K
-#else
-#error Broken base page size setting...
-#endif
 
-#ifdef CONFIG_HUGETLB_PAGE
-#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
-#define HV_PGSZ_IDX_HUGE	HV_PGSZ_IDX_64K
-#define HV_PGSZ_MASK_HUGE	HV_PGSZ_MASK_64K
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
-#define HV_PGSZ_IDX_HUGE	HV_PGSZ_IDX_512K
-#define HV_PGSZ_MASK_HUGE	HV_PGSZ_MASK_512K
-#elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 #define HV_PGSZ_IDX_HUGE	HV_PGSZ_IDX_4MB
 #define HV_PGSZ_MASK_HUGE	HV_PGSZ_MASK_4MB
-#else
-#error Broken huge page size setting...
-#endif
 #endif
 
 static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsigned long tsb_bytes)
@@ -207,7 +190,7 @@ static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsign
 		case MM_TSB_BASE:
 			hp->pgsz_idx = HV_PGSZ_IDX_BASE;
 			break;
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 		case MM_TSB_HUGE:
 			hp->pgsz_idx = HV_PGSZ_IDX_HUGE;
 			break;
@@ -222,7 +205,7 @@ static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsign
 		case MM_TSB_BASE:
 			hp->pgsz_mask = HV_PGSZ_MASK_BASE;
 			break;
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 		case MM_TSB_HUGE:
 			hp->pgsz_mask = HV_PGSZ_MASK_HUGE;
 			break;
@@ -444,7 +427,7 @@ retry_tsb_alloc:
 
 int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 	unsigned long huge_pte_count;
 #endif
 	unsigned int i;
@@ -453,7 +436,7 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 
 	mm->context.sparc64_ctx_val = 0UL;
 
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 	/* We reset it to zero because the fork() page copying
 	 * will re-increment the counters as the parent PTEs are
 	 * copied into the child address space.
@@ -462,6 +445,8 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 	mm->context.huge_pte_count = 0;
 #endif
 
+	mm->context.pgtable_page = NULL;
+
 	/* copy_mm() copies over the parent's mm_struct before calling
 	 * us, so we need to zero out the TSB pointer or else tsb_grow()
 	 * will be confused and think there is an older TSB to free up.
@@ -474,7 +459,7 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 	 */
 	tsb_grow(mm, MM_TSB_BASE, get_mm_rss(mm));
 
-#ifdef CONFIG_HUGETLB_PAGE
+#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
 	if (unlikely(huge_pte_count))
 		tsb_grow(mm, MM_TSB_HUGE, huge_pte_count);
 #endif
@@ -500,10 +485,17 @@ static void tsb_destroy_one(struct tsb_config *tp)
 void destroy_context(struct mm_struct *mm)
 {
 	unsigned long flags, i;
+	struct page *page;
 
 	for (i = 0; i < MM_NUM_TSBS; i++)
 		tsb_destroy_one(&mm->context.tsb_block[i]);
 
+	page = mm->context.pgtable_page;
+	if (page && put_page_testzero(page)) {
+		pgtable_page_dtor(page);
+		free_hot_cold_page(page, 0);
+	}
+
 	spin_lock_irqsave(&ctx_alloc_lock, flags);
 
 	if (CTX_VALID(mm->context)) {
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index c9a3c1fe729..875d008828b 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -7,16 +7,20 @@ config TILE
 	select HAVE_DMA_API_DEBUG
 	select HAVE_KVM if !TILEGX
 	select GENERIC_FIND_FIRST_BIT
+	select SYSCTL_EXCEPTION_TRACE
 	select USE_GENERIC_SMP_HELPERS
 	select CC_OPTIMIZE_FOR_SIZE
+	select HAVE_DEBUG_KMEMLEAK
 	select HAVE_GENERIC_HARDIRQS
 	select GENERIC_IRQ_PROBE
 	select GENERIC_PENDING_IRQ if SMP
 	select GENERIC_IRQ_SHOW
+	select HAVE_DEBUG_BUGVERBOSE
 	select HAVE_SYSCALL_WRAPPERS if TILEGX
 	select SYS_HYPERVISOR
 	select ARCH_HAVE_NMI_SAFE_CMPXCHG
 	select GENERIC_CLOCKEVENTS
+	select MODULES_USE_ELF_RELA
 
 # FIXME: investigate whether we need/want these options.
 #	select HAVE_IOREMAP_PROT
diff --git a/arch/tile/include/arch/Kbuild b/arch/tile/include/arch/Kbuild
index 9c0ea24cc94..e69de29bb2d 100644
--- a/arch/tile/include/arch/Kbuild
+++ b/arch/tile/include/arch/Kbuild
@@ -1,17 +0,0 @@
-header-y += abi.h
-header-y += chip.h
-header-y += chip_tile64.h
-header-y += chip_tilegx.h
-header-y += chip_tilepro.h
-header-y += icache.h
-header-y += interrupts.h
-header-y += interrupts_32.h
-header-y += interrupts_64.h
-header-y += opcode.h
-header-y += opcode_tilegx.h
-header-y += opcode_tilepro.h
-header-y += sim.h
-header-y += sim_def.h
-header-y += spr_def.h
-header-y += spr_def_32.h
-header-y += spr_def_64.h
diff --git a/arch/tile/include/arch/spr_def.h b/arch/tile/include/arch/spr_def.h
index d6ba449b536..2de83e7aff3 100644
--- a/arch/tile/include/arch/spr_def.h
+++ b/arch/tile/include/arch/spr_def.h
@@ -11,15 +11,11 @@
  *   NON INFRINGEMENT.  See the GNU General Public License for
  *   more details.
  */
+#ifndef __ARCH_SPR_DEF_H__
+#define __ARCH_SPR_DEF_H__
 
-/* Include the proper base SPR definition file. */
-#ifdef __tilegx__
-#include <arch/spr_def_64.h>
-#else
-#include <arch/spr_def_32.h>
-#endif
+#include <uapi/arch/spr_def.h>
 
-#ifdef __KERNEL__
 
 /*
  * In addition to including the proper base SPR definition file, depending
@@ -110,4 +106,4 @@
 #define INT_INTCTRL_K \
 	_concat4(INT_INTCTRL_, CONFIG_KERNEL_PL,,)
 
-#endif /* __KERNEL__ */
+#endif /* __ARCH_SPR_DEF_H__ */
diff --git a/arch/tile/include/asm/Kbuild b/arch/tile/include/asm/Kbuild
index 5bd71994452..c68808a09da 100644
--- a/arch/tile/include/asm/Kbuild
+++ b/arch/tile/include/asm/Kbuild
@@ -1,17 +1,16 @@
-include include/asm-generic/Kbuild.asm
 
 header-y += ../arch/
 
-header-y += cachectl.h
 header-y += ucontext.h
-header-y += hardwall.h
 
 generic-y += bug.h
 generic-y += bugs.h
+generic-y += clkdev.h
 generic-y += cputime.h
 generic-y += div64.h
 generic-y += emergency-restart.h
 generic-y += errno.h
+generic-y += exec.h
 generic-y += fb.h
 generic-y += fcntl.h
 generic-y += ioctl.h
diff --git a/arch/tile/include/asm/hardwall.h b/arch/tile/include/asm/hardwall.h
index 47514a58d68..2f572b6b7bc 100644
--- a/arch/tile/include/asm/hardwall.h
+++ b/arch/tile/include/asm/hardwall.h
@@ -14,40 +14,11 @@
  * Provide methods for access control of per-cpu resources like
  * UDN, IDN, or IPI.
  */
-
 #ifndef _ASM_TILE_HARDWALL_H
 #define _ASM_TILE_HARDWALL_H
 
-#include <arch/chip.h>
-#include <linux/ioctl.h>
-
-#define HARDWALL_IOCTL_BASE 0xa2
-
-/*
- * The HARDWALL_CREATE() ioctl is a macro with a "size" argument.
- * The resulting ioctl value is passed to the kernel in conjunction
- * with a pointer to a standard kernel bitmask of cpus.
- * For network resources (UDN or IDN) the bitmask must physically
- * represent a rectangular configuration on the chip.
- * The "size" is the number of bytes of cpu mask data.
- */
-#define _HARDWALL_CREATE 1
-#define HARDWALL_CREATE(size) \
-  _IOC(_IOC_READ, HARDWALL_IOCTL_BASE, _HARDWALL_CREATE, (size))
-
-#define _HARDWALL_ACTIVATE 2
-#define HARDWALL_ACTIVATE \
-  _IO(HARDWALL_IOCTL_BASE, _HARDWALL_ACTIVATE)
-
-#define _HARDWALL_DEACTIVATE 3
-#define HARDWALL_DEACTIVATE \
- _IO(HARDWALL_IOCTL_BASE, _HARDWALL_DEACTIVATE)
-
-#define _HARDWALL_GET_ID 4
-#define HARDWALL_GET_ID \
- _IO(HARDWALL_IOCTL_BASE, _HARDWALL_GET_ID)
+#include <uapi/asm/hardwall.h>
 
-#ifdef __KERNEL__
 /* /proc hooks for hardwall. */
 struct proc_dir_entry;
 #ifdef CONFIG_HARDWALL
@@ -56,6 +27,4 @@ int proc_pid_hardwall(struct task_struct *task, char *buffer);
 #else
 static inline void proc_tile_hardwall_init(struct proc_dir_entry *root) {}
 #endif
-#endif
-
 #endif /* _ASM_TILE_HARDWALL_H */
diff --git a/arch/tile/include/asm/hugetlb.h b/arch/tile/include/asm/hugetlb.h
index b2042380a5a..0f885af2b62 100644
--- a/arch/tile/include/asm/hugetlb.h
+++ b/arch/tile/include/asm/hugetlb.h
@@ -106,6 +106,10 @@ static inline void arch_release_hugepage(struct page *page)
 {
 }
 
+static inline void arch_clear_hugepage_flags(struct page *page)
+{
+}
+
 #ifdef CONFIG_HUGETLB_SUPER_PAGES
 static inline pte_t arch_make_huge_pte(pte_t entry, struct vm_area_struct *vma,
 				       struct page *page, int writable)
diff --git a/arch/tile/include/asm/ptrace.h b/arch/tile/include/asm/ptrace.h
index c6cddd7e8d5..1a4fd9ab0ee 100644
--- a/arch/tile/include/asm/ptrace.h
+++ b/arch/tile/include/asm/ptrace.h
@@ -11,87 +11,21 @@
  *   NON INFRINGEMENT.  See the GNU General Public License for
  *   more details.
  */
-
 #ifndef _ASM_TILE_PTRACE_H
 #define _ASM_TILE_PTRACE_H
 
-#include <arch/chip.h>
-#include <arch/abi.h>
-
-/* These must match struct pt_regs, below. */
-#if CHIP_WORD_SIZE() == 32
-#define PTREGS_OFFSET_REG(n)    ((n)*4)
-#else
-#define PTREGS_OFFSET_REG(n)    ((n)*8)
-#endif
-#define PTREGS_OFFSET_BASE      0
-#define PTREGS_OFFSET_TP        PTREGS_OFFSET_REG(53)
-#define PTREGS_OFFSET_SP        PTREGS_OFFSET_REG(54)
-#define PTREGS_OFFSET_LR        PTREGS_OFFSET_REG(55)
-#define PTREGS_NR_GPRS          56
-#define PTREGS_OFFSET_PC        PTREGS_OFFSET_REG(56)
-#define PTREGS_OFFSET_EX1       PTREGS_OFFSET_REG(57)
-#define PTREGS_OFFSET_FAULTNUM  PTREGS_OFFSET_REG(58)
-#define PTREGS_OFFSET_ORIG_R0   PTREGS_OFFSET_REG(59)
-#define PTREGS_OFFSET_FLAGS     PTREGS_OFFSET_REG(60)
-#if CHIP_HAS_CMPEXCH()
-#define PTREGS_OFFSET_CMPEXCH   PTREGS_OFFSET_REG(61)
-#endif
-#define PTREGS_SIZE             PTREGS_OFFSET_REG(64)
+#include <linux/compiler.h>
 
 #ifndef __ASSEMBLY__
-
-#ifdef __KERNEL__
 /* Benefit from consistent use of "long" on all chips. */
 typedef unsigned long pt_reg_t;
-#else
-/* Provide appropriate length type to userspace regardless of -m32/-m64. */
-typedef uint_reg_t pt_reg_t;
-#endif
-
-/*
- * This struct defines the way the registers are stored on the stack during a
- * system call or exception.  "struct sigcontext" has the same shape.
- */
-struct pt_regs {
-	/* Saved main processor registers; 56..63 are special. */
-	/* tp, sp, and lr must immediately follow regs[] for aliasing. */
-	pt_reg_t regs[53];
-	pt_reg_t tp;		/* aliases regs[TREG_TP] */
-	pt_reg_t sp;		/* aliases regs[TREG_SP] */
-	pt_reg_t lr;		/* aliases regs[TREG_LR] */
-
-	/* Saved special registers. */
-	pt_reg_t pc;		/* stored in EX_CONTEXT_K_0 */
-	pt_reg_t ex1;		/* stored in EX_CONTEXT_K_1 (PL and ICS bit) */
-	pt_reg_t faultnum;	/* fault number (INT_SWINT_1 for syscall) */
-	pt_reg_t orig_r0;	/* r0 at syscall entry, else zero */
-	pt_reg_t flags;		/* flags (see below) */
-#if !CHIP_HAS_CMPEXCH()
-	pt_reg_t pad[3];
-#else
-	pt_reg_t cmpexch;	/* value of CMPEXCH_VALUE SPR at interrupt */
-	pt_reg_t pad[2];
 #endif
-};
-
-#endif /* __ASSEMBLY__ */
 
-#define PTRACE_GETREGS		12
-#define PTRACE_SETREGS		13
-#define PTRACE_GETFPREGS	14
-#define PTRACE_SETFPREGS	15
+#include <uapi/asm/ptrace.h>
 
-/* Support TILE-specific ptrace options, with events starting at 16. */
-#define PTRACE_O_TRACEMIGRATE	0x00010000
-#define PTRACE_EVENT_MIGRATE	16
-#ifdef __KERNEL__
 #define PTRACE_O_MASK_TILE	(PTRACE_O_TRACEMIGRATE)
 #define PT_TRACE_MIGRATE	0x00080000
 #define PT_TRACE_MASK_TILE	(PT_TRACE_MIGRATE)
-#endif
-
-#ifdef __KERNEL__
 
 /* Flag bits in pt_regs.flags */
 #define PT_FLAGS_DISABLE_IRQ    1  /* on return to kernel, disable irqs */
@@ -159,6 +93,4 @@ extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
 #define SINGLESTEP_STATE_TARGET_LB              2
 #define SINGLESTEP_STATE_TARGET_UB              7
 
-#endif /* !__KERNEL__ */
-
 #endif /* _ASM_TILE_PTRACE_H */
diff --git a/arch/tile/include/asm/setup.h b/arch/tile/include/asm/setup.h
index c67eb70ea78..d048888c5d9 100644
--- a/arch/tile/include/asm/setup.h
+++ b/arch/tile/include/asm/setup.h
@@ -11,16 +11,13 @@
  *   NON INFRINGEMENT.  See the GNU General Public License for
  *   more details.
  */
-
 #ifndef _ASM_TILE_SETUP_H
 #define _ASM_TILE_SETUP_H
 
-#define COMMAND_LINE_SIZE	2048
-
-#ifdef __KERNEL__
 
 #include <linux/pfn.h>
 #include <linux/init.h>
+#include <uapi/asm/setup.h>
 
 /*
  * Reserved space for vmalloc and iomap - defined in asm/page.h
@@ -53,6 +50,4 @@ int hardwall_ipi_valid(int cpu);
 } while (0)
 #endif
 
-#endif /* __KERNEL__ */
-
 #endif /* _ASM_TILE_SETUP_H */
diff --git a/arch/tile/include/asm/signal.h b/arch/tile/include/asm/signal.h
index 1e5e49aad54..10e183de96d 100644
--- a/arch/tile/include/asm/signal.h
+++ b/arch/tile/include/asm/signal.h
@@ -11,19 +11,11 @@
  *   NON INFRINGEMENT.  See the GNU General Public License for
  *   more details.
  */
-
 #ifndef _ASM_TILE_SIGNAL_H
 #define _ASM_TILE_SIGNAL_H
 
-/* Do not notify a ptracer when this signal is handled. */
-#define SA_NOPTRACE 0x02000000u
-
-/* Used in earlier Tilera releases, so keeping for binary compatibility. */
-#define SA_RESTORER 0x04000000u
-
-#include <asm-generic/signal.h>
+#include <uapi/asm/signal.h>
 
-#if defined(__KERNEL__)
 #if !defined(__ASSEMBLY__)
 struct pt_regs;
 int restore_sigcontext(struct pt_regs *, struct sigcontext __user *);
@@ -34,6 +26,4 @@ void signal_fault(const char *type, struct pt_regs *,
 void trace_unhandled_signal(const char *type, struct pt_regs *regs,
 			    unsigned long address, int signo);
 #endif
-#endif
-
 #endif /* _ASM_TILE_SIGNAL_H */
diff --git a/arch/tile/include/asm/unistd.h b/arch/tile/include/asm/unistd.h
index 0e1f3e66e49..6e032a0a268 100644
--- a/arch/tile/include/asm/unistd.h
+++ b/arch/tile/include/asm/unistd.h
@@ -11,32 +11,9 @@
  *   NON INFRINGEMENT.  See the GNU General Public License for
  *   more details.
  */
-
-#if !defined(__LP64__) || defined(__SYSCALL_COMPAT)
-/* Use the flavor of this syscall that matches the 32-bit API better. */
-#define __ARCH_WANT_SYNC_FILE_RANGE2
-#endif
-
-/* Use the standard ABI for syscalls. */
-#include <asm-generic/unistd.h>
-
-/* Additional Tilera-specific syscalls. */
-#define __NR_cacheflush	(__NR_arch_specific_syscall + 1)
-__SYSCALL(__NR_cacheflush, sys_cacheflush)
-
-#ifndef __tilegx__
-/* "Fast" syscalls provide atomic support for 32-bit chips. */
-#define __NR_FAST_cmpxchg	-1
-#define __NR_FAST_atomic_update	-2
-#define __NR_FAST_cmpxchg64	-3
-#define __NR_cmpxchg_badaddr	(__NR_arch_specific_syscall + 0)
-__SYSCALL(__NR_cmpxchg_badaddr, sys_cmpxchg_badaddr)
-#endif
-
-#ifdef __KERNEL__
 /* In compat mode, we use sys_llseek() for compat_sys_llseek(). */
 #ifdef CONFIG_COMPAT
 #define __ARCH_WANT_SYS_LLSEEK
 #endif
 #define __ARCH_WANT_SYS_NEWFSTATAT
-#endif
+#include <uapi/asm/unistd.h>
diff --git a/arch/tile/include/uapi/arch/Kbuild b/arch/tile/include/uapi/arch/Kbuild
index aafaa5aa54d..4ebc34f4768 100644
--- a/arch/tile/include/uapi/arch/Kbuild
+++ b/arch/tile/include/uapi/arch/Kbuild
@@ -1 +1,18 @@
 # UAPI Header export list
+header-y += abi.h
+header-y += chip.h
+header-y += chip_tile64.h
+header-y += chip_tilegx.h
+header-y += chip_tilepro.h
+header-y += icache.h
+header-y += interrupts.h
+header-y += interrupts_32.h
+header-y += interrupts_64.h
+header-y += opcode.h
+header-y += opcode_tilegx.h
+header-y += opcode_tilepro.h
+header-y += sim.h
+header-y += sim_def.h
+header-y += spr_def.h
+header-y += spr_def_32.h
+header-y += spr_def_64.h
diff --git a/arch/tile/include/arch/abi.h b/arch/tile/include/uapi/arch/abi.h
index c55a3d43264..c55a3d43264 100644
--- a/arch/tile/include/arch/abi.h
+++ b/arch/tile/include/uapi/arch/abi.h
diff --git a/arch/tile/include/arch/chip.h b/arch/tile/include/uapi/arch/chip.h
index 926d3db0e91..926d3db0e91 100644
--- a/arch/tile/include/arch/chip.h
+++ b/arch/tile/include/uapi/arch/chip.h
diff --git a/arch/tile/include/arch/chip_tile64.h b/arch/tile/include/uapi/arch/chip_tile64.h
index 261aaba092d..261aaba092d 100644
--- a/arch/tile/include/arch/chip_tile64.h
+++ b/arch/tile/include/uapi/arch/chip_tile64.h
diff --git a/arch/tile/include/arch/chip_tilegx.h b/arch/tile/include/uapi/arch/chip_tilegx.h
index ea8e4f2c948..ea8e4f2c948 100644
--- a/arch/tile/include/arch/chip_tilegx.h
+++ b/arch/tile/include/uapi/arch/chip_tilegx.h
diff --git a/arch/tile/include/arch/chip_tilepro.h b/arch/tile/include/uapi/arch/chip_tilepro.h
index 70017699a74..70017699a74 100644
--- a/arch/tile/include/arch/chip_tilepro.h
+++ b/arch/tile/include/uapi/arch/chip_tilepro.h
diff --git a/arch/tile/include/arch/icache.h b/arch/tile/include/uapi/arch/icache.h
index 762eafa8a11..762eafa8a11 100644
--- a/arch/tile/include/arch/icache.h
+++ b/arch/tile/include/uapi/arch/icache.h
diff --git a/arch/tile/include/arch/interrupts.h b/arch/tile/include/uapi/arch/interrupts.h
index 20f8f07d2de..20f8f07d2de 100644
--- a/arch/tile/include/arch/interrupts.h
+++ b/arch/tile/include/uapi/arch/interrupts.h
diff --git a/arch/tile/include/arch/interrupts_32.h b/arch/tile/include/uapi/arch/interrupts_32.h
index 96b5710505b..96b5710505b 100644
--- a/arch/tile/include/arch/interrupts_32.h
+++ b/arch/tile/include/uapi/arch/interrupts_32.h
diff --git a/arch/tile/include/arch/interrupts_64.h b/arch/tile/include/uapi/arch/interrupts_64.h
index 5bb58b2e4e6..5bb58b2e4e6 100644
--- a/arch/tile/include/arch/interrupts_64.h
+++ b/arch/tile/include/uapi/arch/interrupts_64.h
diff --git a/arch/tile/include/arch/opcode.h b/arch/tile/include/uapi/arch/opcode.h
index 92d15229ece..92d15229ece 100644
--- a/arch/tile/include/arch/opcode.h
+++ b/arch/tile/include/uapi/arch/opcode.h
diff --git a/arch/tile/include/arch/opcode_tilegx.h b/arch/tile/include/uapi/arch/opcode_tilegx.h
index c14d02c8160..c14d02c8160 100644
--- a/arch/tile/include/arch/opcode_tilegx.h
+++ b/arch/tile/include/uapi/arch/opcode_tilegx.h
diff --git a/arch/tile/include/arch/opcode_tilepro.h b/arch/tile/include/uapi/arch/opcode_tilepro.h
index 71b763b8ce8..71b763b8ce8 100644
--- a/arch/tile/include/arch/opcode_tilepro.h
+++ b/arch/tile/include/uapi/arch/opcode_tilepro.h
diff --git a/arch/tile/include/arch/sim.h b/arch/tile/include/uapi/arch/sim.h
index e54b7b0527f..e54b7b0527f 100644
--- a/arch/tile/include/arch/sim.h
+++ b/arch/tile/include/uapi/arch/sim.h
diff --git a/arch/tile/include/arch/sim_def.h b/arch/tile/include/uapi/arch/sim_def.h
index 4b44a2b6a09..4b44a2b6a09 100644
--- a/arch/tile/include/arch/sim_def.h
+++ b/arch/tile/include/uapi/arch/sim_def.h
diff --git a/arch/tile/include/uapi/arch/spr_def.h b/arch/tile/include/uapi/arch/spr_def.h
new file mode 100644
index 00000000000..c250c5adb1a
--- /dev/null
+++ b/arch/tile/include/uapi/arch/spr_def.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License
+ *   as published by the Free Software Foundation, version 2.
+ *
+ *   This program is distributed in the hope that it will be useful, but
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *   NON INFRINGEMENT.  See the GNU General Public License for
+ *   more details.
+ */
+
+#ifndef _UAPI__ARCH_SPR_DEF_H__
+#define _UAPI__ARCH_SPR_DEF_H__
+
+/* Include the proper base SPR definition file. */
+#ifdef __tilegx__
+#include <arch/spr_def_64.h>
+#else
+#include <arch/spr_def_32.h>
+#endif
+
+
+#endif /* _UAPI__ARCH_SPR_DEF_H__ */
diff --git a/arch/tile/include/arch/spr_def_32.h b/arch/tile/include/uapi/arch/spr_def_32.h
index 78bbce2fb19..c689446e628 100644
--- a/arch/tile/include/arch/spr_def_32.h
+++ b/arch/tile/include/uapi/arch/spr_def_32.h
@@ -14,8 +14,8 @@
 
 #ifndef __DOXYGEN__
 
-#ifndef __ARCH_SPR_DEF_H__
-#define __ARCH_SPR_DEF_H__
+#ifndef __ARCH_SPR_DEF_32_H__
+#define __ARCH_SPR_DEF_32_H__
 
 #define SPR_AUX_PERF_COUNT_0 0x6005
 #define SPR_AUX_PERF_COUNT_1 0x6006
@@ -252,6 +252,6 @@
 #define SPR_WATCH_MASK 0x420a
 #define SPR_WATCH_VAL 0x420b
 
-#endif /* !defined(__ARCH_SPR_DEF_H__) */
+#endif /* !defined(__ARCH_SPR_DEF_32_H__) */
 
 #endif /* !defined(__DOXYGEN__) */
diff --git a/arch/tile/include/arch/spr_def_64.h b/arch/tile/include/uapi/arch/spr_def_64.h
index 0da86faa337..67a6c1751e3 100644
--- a/arch/tile/include/arch/spr_def_64.h
+++ b/arch/tile/include/uapi/arch/spr_def_64.h
@@ -14,8 +14,8 @@
 
 #ifndef __DOXYGEN__
 
-#ifndef __ARCH_SPR_DEF_H__
-#define __ARCH_SPR_DEF_H__
+#ifndef __ARCH_SPR_DEF_64_H__
+#define __ARCH_SPR_DEF_64_H__
 
 #define SPR_AUX_PERF_COUNT_0 0x2105
 #define SPR_AUX_PERF_COUNT_1 0x2106
@@ -211,6 +211,6 @@
 #define SPR_WATCH_MASK 0x200a
 #define SPR_WATCH_VAL 0x200b
 
-#endif /* !defined(__ARCH_SPR_DEF_H__) */
+#endif /* !defined(__ARCH_SPR_DEF_64_H__) */
 
 #endif /* !defined(__DOXYGEN__) */
diff --git a/arch/tile/include/uapi/asm/Kbuild b/arch/tile/include/uapi/asm/Kbuild
index baebb3da1d4..5c6915fd30b 100644
--- a/arch/tile/include/uapi/asm/Kbuild
+++ b/arch/tile/include/uapi/asm/Kbuild
@@ -1,3 +1,18 @@
 # UAPI Header export list
 include include/uapi/asm-generic/Kbuild.asm
 
+header-y += auxvec.h
+header-y += bitsperlong.h
+header-y += byteorder.h
+header-y += cachectl.h
+header-y += hardwall.h
+header-y += kvm_para.h
+header-y += mman.h
+header-y += ptrace.h
+header-y += setup.h
+header-y += sigcontext.h
+header-y += siginfo.h
+header-y += signal.h
+header-y += stat.h
+header-y += swab.h
+header-y += unistd.h
diff --git a/arch/tile/include/asm/auxvec.h b/arch/tile/include/uapi/asm/auxvec.h
index 1d393edb064..1d393edb064 100644
--- a/arch/tile/include/asm/auxvec.h
+++ b/arch/tile/include/uapi/asm/auxvec.h
diff --git a/arch/tile/include/asm/bitsperlong.h b/arch/tile/include/uapi/asm/bitsperlong.h
index 58c771f2af2..58c771f2af2 100644
--- a/arch/tile/include/asm/bitsperlong.h
+++ b/arch/tile/include/uapi/asm/bitsperlong.h
diff --git a/arch/tile/include/asm/byteorder.h b/arch/tile/include/uapi/asm/byteorder.h
index fb72ecf4921..fb72ecf4921 100644
--- a/arch/tile/include/asm/byteorder.h
+++ b/arch/tile/include/uapi/asm/byteorder.h
diff --git a/arch/tile/include/asm/cachectl.h b/arch/tile/include/uapi/asm/cachectl.h
index af4c9f9154d..af4c9f9154d 100644
--- a/arch/tile/include/asm/cachectl.h
+++ b/arch/tile/include/uapi/asm/cachectl.h
diff --git a/arch/tile/include/uapi/asm/hardwall.h b/arch/tile/include/uapi/asm/hardwall.h
new file mode 100644
index 00000000000..c2169d4f401
--- /dev/null
+++ b/arch/tile/include/uapi/asm/hardwall.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License
+ *   as published by the Free Software Foundation, version 2.
+ *
+ *   This program is distributed in the hope that it will be useful, but
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *   NON INFRINGEMENT.  See the GNU General Public License for
+ *   more details.
+ *
+ * Provide methods for access control of per-cpu resources like
+ * UDN, IDN, or IPI.
+ */
+
+#ifndef _UAPI_ASM_TILE_HARDWALL_H
+#define _UAPI_ASM_TILE_HARDWALL_H
+
+#include <arch/chip.h>
+#include <linux/ioctl.h>
+
+#define HARDWALL_IOCTL_BASE 0xa2
+
+/*
+ * The HARDWALL_CREATE() ioctl is a macro with a "size" argument.
+ * The resulting ioctl value is passed to the kernel in conjunction
+ * with a pointer to a standard kernel bitmask of cpus.
+ * For network resources (UDN or IDN) the bitmask must physically
+ * represent a rectangular configuration on the chip.
+ * The "size" is the number of bytes of cpu mask data.
+ */
+#define _HARDWALL_CREATE 1
+#define HARDWALL_CREATE(size) \
+  _IOC(_IOC_READ, HARDWALL_IOCTL_BASE, _HARDWALL_CREATE, (size))
+
+#define _HARDWALL_ACTIVATE 2
+#define HARDWALL_ACTIVATE \
+  _IO(HARDWALL_IOCTL_BASE, _HARDWALL_ACTIVATE)
+
+#define _HARDWALL_DEACTIVATE 3
+#define HARDWALL_DEACTIVATE \
+ _IO(HARDWALL_IOCTL_BASE, _HARDWALL_DEACTIVATE)
+
+#define _HARDWALL_GET_ID 4
+#define HARDWALL_GET_ID \
+ _IO(HARDWALL_IOCTL_BASE, _HARDWALL_GET_ID)
+
+
+#endif /* _UAPI_ASM_TILE_HARDWALL_H */
diff --git a/arch/tile/include/asm/kvm_para.h b/arch/tile/include/uapi/asm/kvm_para.h
index 14fab8f0b95..14fab8f0b95 100644
--- a/arch/tile/include/asm/kvm_para.h
+++ b/arch/tile/include/uapi/asm/kvm_para.h
diff --git a/arch/tile/include/asm/mman.h b/arch/tile/include/uapi/asm/mman.h
index 81b8fc348d6..81b8fc348d6 100644
--- a/arch/tile/include/asm/mman.h
+++ b/arch/tile/include/uapi/asm/mman.h
diff --git a/arch/tile/include/uapi/asm/ptrace.h b/arch/tile/include/uapi/asm/ptrace.h
new file mode 100644
index 00000000000..c717d0fec72
--- /dev/null
+++ b/arch/tile/include/uapi/asm/ptrace.h
@@ -0,0 +1,88 @@
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License
+ *   as published by the Free Software Foundation, version 2.
+ *
+ *   This program is distributed in the hope that it will be useful, but
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *   NON INFRINGEMENT.  See the GNU General Public License for
+ *   more details.
+ */
+
+#ifndef _UAPI_ASM_TILE_PTRACE_H
+#define _UAPI_ASM_TILE_PTRACE_H
+
+#include <arch/chip.h>
+#include <arch/abi.h>
+
+/* These must match struct pt_regs, below. */
+#if CHIP_WORD_SIZE() == 32
+#define PTREGS_OFFSET_REG(n)    ((n)*4)
+#else
+#define PTREGS_OFFSET_REG(n)    ((n)*8)
+#endif
+#define PTREGS_OFFSET_BASE      0
+#define PTREGS_OFFSET_TP        PTREGS_OFFSET_REG(53)
+#define PTREGS_OFFSET_SP        PTREGS_OFFSET_REG(54)
+#define PTREGS_OFFSET_LR        PTREGS_OFFSET_REG(55)
+#define PTREGS_NR_GPRS          56
+#define PTREGS_OFFSET_PC        PTREGS_OFFSET_REG(56)
+#define PTREGS_OFFSET_EX1       PTREGS_OFFSET_REG(57)
+#define PTREGS_OFFSET_FAULTNUM  PTREGS_OFFSET_REG(58)
+#define PTREGS_OFFSET_ORIG_R0   PTREGS_OFFSET_REG(59)
+#define PTREGS_OFFSET_FLAGS     PTREGS_OFFSET_REG(60)
+#if CHIP_HAS_CMPEXCH()
+#define PTREGS_OFFSET_CMPEXCH   PTREGS_OFFSET_REG(61)
+#endif
+#define PTREGS_SIZE             PTREGS_OFFSET_REG(64)
+
+
+#ifndef __ASSEMBLY__
+
+#ifndef __KERNEL__
+/* Provide appropriate length type to userspace regardless of -m32/-m64. */
+typedef uint_reg_t pt_reg_t;
+#endif
+
+/*
+ * This struct defines the way the registers are stored on the stack during a
+ * system call or exception.  "struct sigcontext" has the same shape.
+ */
+struct pt_regs {
+	/* Saved main processor registers; 56..63 are special. */
+	/* tp, sp, and lr must immediately follow regs[] for aliasing. */
+	pt_reg_t regs[53];
+	pt_reg_t tp;		/* aliases regs[TREG_TP] */
+	pt_reg_t sp;		/* aliases regs[TREG_SP] */
+	pt_reg_t lr;		/* aliases regs[TREG_LR] */
+
+	/* Saved special registers. */
+	pt_reg_t pc;		/* stored in EX_CONTEXT_K_0 */
+	pt_reg_t ex1;		/* stored in EX_CONTEXT_K_1 (PL and ICS bit) */
+	pt_reg_t faultnum;	/* fault number (INT_SWINT_1 for syscall) */
+	pt_reg_t orig_r0;	/* r0 at syscall entry, else zero */
+	pt_reg_t flags;		/* flags (see below) */
+#if !CHIP_HAS_CMPEXCH()
+	pt_reg_t pad[3];
+#else
+	pt_reg_t cmpexch;	/* value of CMPEXCH_VALUE SPR at interrupt */
+	pt_reg_t pad[2];
+#endif
+};
+
+#endif /* __ASSEMBLY__ */
+
+#define PTRACE_GETREGS		12
+#define PTRACE_SETREGS		13
+#define PTRACE_GETFPREGS	14
+#define PTRACE_SETFPREGS	15
+
+/* Support TILE-specific ptrace options, with events starting at 16. */
+#define PTRACE_O_TRACEMIGRATE	0x00010000
+#define PTRACE_EVENT_MIGRATE	16
+
+
+#endif /* _UAPI_ASM_TILE_PTRACE_H */
diff --git a/arch/tile/include/asm/exec.h b/arch/tile/include/uapi/asm/setup.h
index a714e195086..e6f7da265ac 100644
--- a/arch/tile/include/asm/exec.h
+++ b/arch/tile/include/uapi/asm/setup.h
@@ -12,9 +12,10 @@
  *   more details.
  */
 
-#ifndef _ASM_TILE_EXEC_H
-#define _ASM_TILE_EXEC_H
+#ifndef _UAPI_ASM_TILE_SETUP_H
+#define _UAPI_ASM_TILE_SETUP_H
 
-#define arch_align_stack(x) (x)
+#define COMMAND_LINE_SIZE	2048
 
-#endif /* _ASM_TILE_EXEC_H */
+
+#endif /* _UAPI_ASM_TILE_SETUP_H */
diff --git a/arch/tile/include/asm/sigcontext.h b/arch/tile/include/uapi/asm/sigcontext.h
index 6348e59d372..6348e59d372 100644
--- a/arch/tile/include/asm/sigcontext.h
+++ b/arch/tile/include/uapi/asm/sigcontext.h
diff --git a/arch/tile/include/asm/siginfo.h b/arch/tile/include/uapi/asm/siginfo.h
index 56d661bb010..56d661bb010 100644
--- a/arch/tile/include/asm/siginfo.h
+++ b/arch/tile/include/uapi/asm/siginfo.h
diff --git a/arch/tile/include/uapi/asm/signal.h b/arch/tile/include/uapi/asm/signal.h
new file mode 100644
index 00000000000..ef0d32d84a4
--- /dev/null
+++ b/arch/tile/include/uapi/asm/signal.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License
+ *   as published by the Free Software Foundation, version 2.
+ *
+ *   This program is distributed in the hope that it will be useful, but
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *   NON INFRINGEMENT.  See the GNU General Public License for
+ *   more details.
+ */
+
+#ifndef _UAPI_ASM_TILE_SIGNAL_H
+#define _UAPI_ASM_TILE_SIGNAL_H
+
+/* Do not notify a ptracer when this signal is handled. */
+#define SA_NOPTRACE 0x02000000u
+
+/* Used in earlier Tilera releases, so keeping for binary compatibility. */
+#define SA_RESTORER 0x04000000u
+
+#include <asm-generic/signal.h>
+
+
+#endif /* _UAPI_ASM_TILE_SIGNAL_H */
diff --git a/arch/tile/include/asm/stat.h b/arch/tile/include/uapi/asm/stat.h
index c0db34d56be..c0db34d56be 100644
--- a/arch/tile/include/asm/stat.h
+++ b/arch/tile/include/uapi/asm/stat.h
diff --git a/arch/tile/include/asm/swab.h b/arch/tile/include/uapi/asm/swab.h
index 7c37b38f6c8..7c37b38f6c8 100644
--- a/arch/tile/include/asm/swab.h
+++ b/arch/tile/include/uapi/asm/swab.h
diff --git a/arch/tile/include/uapi/asm/unistd.h b/arch/tile/include/uapi/asm/unistd.h
new file mode 100644
index 00000000000..cd7b6dd9d47
--- /dev/null
+++ b/arch/tile/include/uapi/asm/unistd.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License
+ *   as published by the Free Software Foundation, version 2.
+ *
+ *   This program is distributed in the hope that it will be useful, but
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *   NON INFRINGEMENT.  See the GNU General Public License for
+ *   more details.
+ */
+
+#if !defined(__LP64__) || defined(__SYSCALL_COMPAT)
+/* Use the flavor of this syscall that matches the 32-bit API better. */
+#define __ARCH_WANT_SYNC_FILE_RANGE2
+#endif
+
+/* Use the standard ABI for syscalls. */
+#include <asm-generic/unistd.h>
+
+/* Additional Tilera-specific syscalls. */
+#define __NR_cacheflush	(__NR_arch_specific_syscall + 1)
+__SYSCALL(__NR_cacheflush, sys_cacheflush)
+
+#ifndef __tilegx__
+/* "Fast" syscalls provide atomic support for 32-bit chips. */
+#define __NR_FAST_cmpxchg	-1
+#define __NR_FAST_atomic_update	-2
+#define __NR_FAST_cmpxchg64	-3
+#define __NR_cmpxchg_badaddr	(__NR_arch_specific_syscall + 0)
+__SYSCALL(__NR_cmpxchg_badaddr, sys_cmpxchg_badaddr)
+#endif
diff --git a/arch/tile/kernel/compat_signal.c b/arch/tile/kernel/compat_signal.c
index 7bc0859a9f5..08b4fe1717b 100644
--- a/arch/tile/kernel/compat_signal.c
+++ b/arch/tile/kernel/compat_signal.c
@@ -354,15 +354,6 @@ int compat_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 	regs->regs[1] = ptr_to_compat_reg(&frame->info);
 	regs->regs[2] = ptr_to_compat_reg(&frame->uc);
 	regs->flags |= PT_FLAGS_CALLER_SAVES;
-
-	/*
-	 * Notify any tracer that was single-stepping it.
-	 * The tracer may want to single-step inside the
-	 * handler too.
-	 */
-	if (test_thread_flag(TIF_SINGLESTEP))
-		ptrace_notify(SIGTRAP);
-
 	return 0;
 
 give_sigsegv:
diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c
index 6be79915050..307d010696c 100644
--- a/arch/tile/kernel/process.c
+++ b/arch/tile/kernel/process.c
@@ -548,6 +548,9 @@ int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
 	if (!user_mode(regs))
 		return 0;
 
+	/* Enable interrupts; they are disabled again on return to caller. */
+	local_irq_enable();
+
 	if (thread_info_flags & _TIF_NEED_RESCHED) {
 		schedule();
 		return 1;
@@ -594,13 +597,13 @@ SYSCALL_DEFINE4(execve, const char __user *, path,
 		struct pt_regs *, regs)
 {
 	long error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname(path);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = do_execve(filename, argv, envp, regs);
+	error = do_execve(filename->name, argv, envp, regs);
 	putname(filename);
 	if (error == 0)
 		single_step_execve();
@@ -615,13 +618,13 @@ long compat_sys_execve(const char __user *path,
 		       struct pt_regs *regs)
 {
 	long error;
-	char *filename;
+	struct filename *filename;
 
 	filename = getname(path);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = compat_do_execve(filename, argv, envp, regs);
+	error = compat_do_execve(filename->name, argv, envp, regs);
 	putname(filename);
 	if (error == 0)
 		single_step_execve();
diff --git a/arch/tile/kernel/signal.c b/arch/tile/kernel/signal.c
index e29b0553211..67efb656d10 100644
--- a/arch/tile/kernel/signal.c
+++ b/arch/tile/kernel/signal.c
@@ -219,15 +219,6 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
 	regs->regs[1] = (unsigned long) &frame->info;
 	regs->regs[2] = (unsigned long) &frame->uc;
 	regs->flags |= PT_FLAGS_CALLER_SAVES;
-
-	/*
-	 * Notify any tracer that was single-stepping it.
-	 * The tracer may want to single-step inside the
-	 * handler too.
-	 */
-	if (test_thread_flag(TIF_SINGLESTEP))
-		ptrace_notify(SIGTRAP);
-
 	return 0;
 
 give_sigsegv:
@@ -278,7 +269,8 @@ static void handle_signal(unsigned long sig, siginfo_t *info,
 		ret = setup_rt_frame(sig, ka, info, oldset, regs);
 	if (ret)
 		return;
-	signal_delivered(sig, info, ka, regs, 0);
+	signal_delivered(sig, info, ka, regs,
+			test_thread_flag(TIF_SINGLESTEP));
 }
 
 /*
diff --git a/arch/tile/mm/elf.c b/arch/tile/mm/elf.c
index 758b6038c2b..3cfa98bf912 100644
--- a/arch/tile/mm/elf.c
+++ b/arch/tile/mm/elf.c
@@ -36,19 +36,14 @@ static void sim_notify_exec(const char *binary_name)
 	} while (c);
 }
 
-static int notify_exec(void)
+static int notify_exec(struct mm_struct *mm)
 {
 	int retval = 0;  /* failure */
-	struct vm_area_struct *vma = current->mm->mmap;
-	while (vma) {
-		if ((vma->vm_flags & VM_EXECUTABLE) && vma->vm_file)
-			break;
-		vma = vma->vm_next;
-	}
-	if (vma) {
+
+	if (mm->exe_file) {
 		char *buf = (char *) __get_free_page(GFP_KERNEL);
 		if (buf) {
-			char *path = d_path(&vma->vm_file->f_path,
+			char *path = d_path(&mm->exe_file->f_path,
 					    buf, PAGE_SIZE);
 			if (!IS_ERR(path)) {
 				sim_notify_exec(path);
@@ -106,16 +101,16 @@ int arch_setup_additional_pages(struct linux_binprm *bprm,
 	unsigned long vdso_base;
 	int retval = 0;
 
+	down_write(&mm->mmap_sem);
+
 	/*
 	 * Notify the simulator that an exec just occurred.
 	 * If we can't find the filename of the mapping, just use
 	 * whatever was passed as the linux_binprm filename.
 	 */
-	if (!notify_exec())
+	if (!notify_exec(mm))
 		sim_notify_exec(bprm->filename);
 
-	down_write(&mm->mmap_sem);
-
 	/*
 	 * MAYWRITE to allow gdb to COW and set breakpoints
 	 */
diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c
index 84ce7abbf5a..fe811fa5f1b 100644
--- a/arch/tile/mm/fault.c
+++ b/arch/tile/mm/fault.c
@@ -454,6 +454,7 @@ good_area:
 			tsk->min_flt++;
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			 /*
 			  * No need to up_read(&mm->mmap_sem) as we would
diff --git a/arch/um/Kconfig.common b/arch/um/Kconfig.common
index cb837c22392..648121b037d 100644
--- a/arch/um/Kconfig.common
+++ b/arch/um/Kconfig.common
@@ -7,6 +7,7 @@ config UML
 	bool
 	default y
 	select HAVE_GENERIC_HARDIRQS
+	select HAVE_UID16
 	select GENERIC_IRQ_SHOW
 	select GENERIC_CPU_DEVICES
 	select GENERIC_IO
diff --git a/arch/um/drivers/chan_kern.c b/arch/um/drivers/chan_kern.c
index 87eebfe03c6..c3bba73e4be 100644
--- a/arch/um/drivers/chan_kern.c
+++ b/arch/um/drivers/chan_kern.c
@@ -7,8 +7,8 @@
 #include <linux/tty.h>
 #include <linux/tty_flip.h>
 #include "chan.h"
-#include "os.h"
-#include "irq_kern.h"
+#include <os.h>
+#include <irq_kern.h>
 
 #ifdef CONFIG_NOCONFIG_CHAN
 static void *not_configged_init(char *str, int device,
diff --git a/arch/um/drivers/chan_user.c b/arch/um/drivers/chan_user.c
index f180813ce2c..9be670ad23b 100644
--- a/arch/um/drivers/chan_user.c
+++ b/arch/um/drivers/chan_user.c
@@ -11,8 +11,8 @@
 #include <termios.h>
 #include <sys/ioctl.h>
 #include "chan_user.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <os.h>
+#include <um_malloc.h>
 
 void generic_close(int fd, void *unused)
 {
diff --git a/arch/um/drivers/chan_user.h b/arch/um/drivers/chan_user.h
index 6257b7a6e1a..dc693298eb8 100644
--- a/arch/um/drivers/chan_user.h
+++ b/arch/um/drivers/chan_user.h
@@ -6,7 +6,7 @@
 #ifndef __CHAN_USER_H__
 #define __CHAN_USER_H__
 
-#include "init.h"
+#include <init.h>
 
 struct chan_opts {
 	void (*const announce)(char *dev_name, int dev);
diff --git a/arch/um/drivers/cow_sys.h b/arch/um/drivers/cow_sys.h
index 7f2ed0b8824..67cbee63e70 100644
--- a/arch/um/drivers/cow_sys.h
+++ b/arch/um/drivers/cow_sys.h
@@ -1,9 +1,9 @@
 #ifndef __COW_SYS_H__
 #define __COW_SYS_H__
 
-#include "kern_util.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <kern_util.h>
+#include <os.h>
+#include <um_malloc.h>
 
 static inline void *cow_malloc(int size)
 {
diff --git a/arch/um/drivers/daemon.h b/arch/um/drivers/daemon.h
index 6e0e891f8a0..c2dd1951559 100644
--- a/arch/um/drivers/daemon.h
+++ b/arch/um/drivers/daemon.h
@@ -6,7 +6,7 @@
 #ifndef __DAEMON_H__
 #define __DAEMON_H__
 
-#include "net_user.h"
+#include <net_user.h>
 
 #define SWITCH_VERSION 3
 
diff --git a/arch/um/drivers/daemon_kern.c b/arch/um/drivers/daemon_kern.c
index b4a1522f215..7568cc2f3cd 100644
--- a/arch/um/drivers/daemon_kern.c
+++ b/arch/um/drivers/daemon_kern.c
@@ -6,9 +6,9 @@
  * Licensed under the GPL.
  */
 
-#include "linux/init.h"
+#include <linux/init.h>
 #include <linux/netdevice.h>
-#include "net_kern.h"
+#include <net_kern.h>
 #include "daemon.h"
 
 struct daemon_init {
diff --git a/arch/um/drivers/daemon_user.c b/arch/um/drivers/daemon_user.c
index a4fd7bc14af..8813c10d017 100644
--- a/arch/um/drivers/daemon_user.c
+++ b/arch/um/drivers/daemon_user.c
@@ -14,9 +14,9 @@
 #include <sys/time.h>
 #include <sys/un.h>
 #include "daemon.h"
-#include "net_user.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <net_user.h>
+#include <os.h>
+#include <um_malloc.h>
 
 enum request_type { REQ_NEW_CONTROL };
 
diff --git a/arch/um/drivers/fd.c b/arch/um/drivers/fd.c
index 5b81d257441..a13a427b996 100644
--- a/arch/um/drivers/fd.c
+++ b/arch/um/drivers/fd.c
@@ -9,8 +9,8 @@
 #include <errno.h>
 #include <termios.h>
 #include "chan_user.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <os.h>
+#include <um_malloc.h>
 
 struct fd_chan {
 	int fd;
diff --git a/arch/um/drivers/harddog_user.c b/arch/um/drivers/harddog_user.c
index 0345d6206d4..f99b32a4dbf 100644
--- a/arch/um/drivers/harddog_user.c
+++ b/arch/um/drivers/harddog_user.c
@@ -6,7 +6,7 @@
 #include <stdio.h>
 #include <unistd.h>
 #include <errno.h>
-#include "os.h"
+#include <os.h>
 
 struct dog_data {
 	int stdin;
diff --git a/arch/um/drivers/hostaudio_kern.c b/arch/um/drivers/hostaudio_kern.c
index f9f6a4e2059..9b90fdc4b15 100644
--- a/arch/um/drivers/hostaudio_kern.c
+++ b/arch/um/drivers/hostaudio_kern.c
@@ -3,15 +3,15 @@
  * Licensed under the GPL
  */
 
-#include "linux/fs.h"
-#include "linux/module.h"
-#include "linux/slab.h"
-#include "linux/sound.h"
-#include "linux/soundcard.h"
-#include "linux/mutex.h"
-#include "asm/uaccess.h"
-#include "init.h"
-#include "os.h"
+#include <linux/fs.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/sound.h>
+#include <linux/soundcard.h>
+#include <linux/mutex.h>
+#include <asm/uaccess.h>
+#include <init.h>
+#include <os.h>
 
 struct hostaudio_state {
 	int fd;
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c
index 457475f9841..fd9a15b318a 100644
--- a/arch/um/drivers/line.c
+++ b/arch/um/drivers/line.c
@@ -3,15 +3,15 @@
  * Licensed under the GPL
  */
 
-#include "linux/irqreturn.h"
-#include "linux/kd.h"
-#include "linux/sched.h"
-#include "linux/slab.h"
+#include <linux/irqreturn.h>
+#include <linux/kd.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
 #include "chan.h"
-#include "irq_kern.h"
-#include "irq_user.h"
-#include "kern_util.h"
-#include "os.h"
+#include <irq_kern.h>
+#include <irq_user.h>
+#include <kern_util.h>
+#include <os.h>
 
 #define LINE_BUFSIZE 4096
 
diff --git a/arch/um/drivers/line.h b/arch/um/drivers/line.h
index bae95611e7a..138a14526d9 100644
--- a/arch/um/drivers/line.h
+++ b/arch/um/drivers/line.h
@@ -6,12 +6,12 @@
 #ifndef __LINE_H__
 #define __LINE_H__
 
-#include "linux/list.h"
-#include "linux/workqueue.h"
-#include "linux/tty.h"
-#include "linux/interrupt.h"
-#include "linux/spinlock.h"
-#include "linux/mutex.h"
+#include <linux/list.h>
+#include <linux/workqueue.h>
+#include <linux/tty.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+#include <linux/mutex.h>
 #include "chan_user.h"
 #include "mconsole_kern.h"
 
diff --git a/arch/um/drivers/mconsole.h b/arch/um/drivers/mconsole.h
index c139ae1d682..8b22535c62c 100644
--- a/arch/um/drivers/mconsole.h
+++ b/arch/um/drivers/mconsole.h
@@ -12,7 +12,7 @@
 #define u32 uint32_t
 #endif
 
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
 #define MCONSOLE_MAGIC (0xcafebabe)
 #define MCONSOLE_MAX_DATA (512)
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index 9efeb6da48b..79ccfe6c707 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -27,13 +27,13 @@
 #include <asm/uaccess.h>
 #include <asm/switch_to.h>
 
-#include "init.h"
-#include "irq_kern.h"
-#include "irq_user.h"
-#include "kern_util.h"
+#include <init.h>
+#include <irq_kern.h>
+#include <irq_user.h>
+#include <kern_util.h>
 #include "mconsole.h"
 #include "mconsole_kern.h"
-#include "os.h"
+#include <os.h>
 
 static int do_unlink_socket(struct notifier_block *notifier,
 			    unsigned long what, void *data)
diff --git a/arch/um/drivers/mconsole_kern.h b/arch/um/drivers/mconsole_kern.h
index d2fe07e7895..7a0c6a1ad1d 100644
--- a/arch/um/drivers/mconsole_kern.h
+++ b/arch/um/drivers/mconsole_kern.h
@@ -6,7 +6,7 @@
 #ifndef __MCONSOLE_KERN_H__
 #define __MCONSOLE_KERN_H__
 
-#include "linux/list.h"
+#include <linux/list.h>
 #include "mconsole.h"
 
 struct mconsole_entry {
diff --git a/arch/um/drivers/mmapper_kern.c b/arch/um/drivers/mmapper_kern.c
index c0ef803c7c7..62145c27616 100644
--- a/arch/um/drivers/mmapper_kern.c
+++ b/arch/um/drivers/mmapper_kern.c
@@ -18,7 +18,7 @@
 #include <linux/mm.h>
 
 #include <asm/uaccess.h>
-#include "mem_user.h"
+#include <mem_user.h>
 
 /* These are set in mmapper_init, which is called at boot time */
 static unsigned long mmapper_size;
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index 458d324f062..b1314ebf1f7 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -18,12 +18,12 @@
 #include <linux/skbuff.h>
 #include <linux/slab.h>
 #include <linux/spinlock.h>
-#include "init.h"
-#include "irq_kern.h"
-#include "irq_user.h"
+#include <init.h>
+#include <irq_kern.h>
+#include <irq_user.h>
 #include "mconsole_kern.h"
-#include "net_kern.h"
-#include "net_user.h"
+#include <net_kern.h>
+#include <net_user.h>
 
 #define DRIVER_NAME "uml-netdev"
 
diff --git a/arch/um/drivers/net_user.c b/arch/um/drivers/net_user.c
index 05090c37fa8..cd14157b556 100644
--- a/arch/um/drivers/net_user.c
+++ b/arch/um/drivers/net_user.c
@@ -11,9 +11,9 @@
 #include <string.h>
 #include <sys/socket.h>
 #include <sys/wait.h>
-#include "net_user.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <net_user.h>
+#include <os.h>
+#include <um_malloc.h>
 
 int tap_open_common(void *dev, char *gate_addr)
 {
diff --git a/arch/um/drivers/null.c b/arch/um/drivers/null.c
index 2b45a1446c8..10495747ce8 100644
--- a/arch/um/drivers/null.c
+++ b/arch/um/drivers/null.c
@@ -7,7 +7,7 @@
 #include <errno.h>
 #include <fcntl.h>
 #include "chan_user.h"
-#include "os.h"
+#include <os.h>
 
 /* This address is used only as a unique identifier */
 static int null_chan;
diff --git a/arch/um/drivers/pcap_kern.c b/arch/um/drivers/pcap_kern.c
index 2860525f8ff..be0fb57bd1d 100644
--- a/arch/um/drivers/pcap_kern.c
+++ b/arch/um/drivers/pcap_kern.c
@@ -3,9 +3,9 @@
  * Licensed under the GPL.
  */
 
-#include "linux/init.h"
+#include <linux/init.h>
 #include <linux/netdevice.h>
-#include "net_kern.h"
+#include <net_kern.h>
 #include "pcap_user.h"
 
 struct pcap_init {
diff --git a/arch/um/drivers/pcap_user.c b/arch/um/drivers/pcap_user.c
index 702a75b190e..c07b9c752c8 100644
--- a/arch/um/drivers/pcap_user.c
+++ b/arch/um/drivers/pcap_user.c
@@ -7,9 +7,9 @@
 #include <pcap.h>
 #include <string.h>
 #include <asm/types.h>
-#include "net_user.h"
+#include <net_user.h>
 #include "pcap_user.h"
-#include "um_malloc.h"
+#include <um_malloc.h>
 
 #define PCAP_FD(p) (*(int *)(p))
 
diff --git a/arch/um/drivers/pcap_user.h b/arch/um/drivers/pcap_user.h
index d8ba6153f91..1ca7c764cc6 100644
--- a/arch/um/drivers/pcap_user.h
+++ b/arch/um/drivers/pcap_user.h
@@ -3,7 +3,7 @@
  * Licensed under the GPL
  */
 
-#include "net_user.h"
+#include <net_user.h>
 
 struct pcap_data {
 	char *host_if;
diff --git a/arch/um/drivers/port_kern.c b/arch/um/drivers/port_kern.c
index 1d83d50236e..40ca5cc275e 100644
--- a/arch/um/drivers/port_kern.c
+++ b/arch/um/drivers/port_kern.c
@@ -3,16 +3,16 @@
  * Licensed under the GPL
  */
 
-#include "linux/completion.h"
-#include "linux/interrupt.h"
-#include "linux/list.h"
-#include "linux/mutex.h"
-#include "linux/slab.h"
-#include "linux/workqueue.h"
-#include "asm/atomic.h"
-#include "init.h"
-#include "irq_kern.h"
-#include "os.h"
+#include <linux/completion.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/slab.h>
+#include <linux/workqueue.h>
+#include <asm/atomic.h>
+#include <init.h>
+#include <irq_kern.h>
+#include <os.h>
 #include "port.h"
 
 struct port_list {
diff --git a/arch/um/drivers/port_user.c b/arch/um/drivers/port_user.c
index 7b010b76ddf..9a8e1b64c22 100644
--- a/arch/um/drivers/port_user.c
+++ b/arch/um/drivers/port_user.c
@@ -10,9 +10,9 @@
 #include <unistd.h>
 #include <netinet/in.h>
 #include "chan_user.h"
-#include "os.h"
+#include <os.h>
 #include "port.h"
-#include "um_malloc.h"
+#include <um_malloc.h>
 
 struct port_chan {
 	int raw;
diff --git a/arch/um/drivers/pty.c b/arch/um/drivers/pty.c
index cff2b75d31f..f1fcc2cedb5 100644
--- a/arch/um/drivers/pty.c
+++ b/arch/um/drivers/pty.c
@@ -12,8 +12,8 @@
 #include <termios.h>
 #include <sys/stat.h>
 #include "chan_user.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <os.h>
+#include <um_malloc.h>
 
 struct pty_chan {
 	void (*announce)(char *dev_name, int dev);
diff --git a/arch/um/drivers/random.c b/arch/um/drivers/random.c
index e32c6aa6396..9e3a7220582 100644
--- a/arch/um/drivers/random.c
+++ b/arch/um/drivers/random.c
@@ -13,8 +13,8 @@
 #include <linux/miscdevice.h>
 #include <linux/delay.h>
 #include <asm/uaccess.h>
-#include "irq_kern.h"
-#include "os.h"
+#include <irq_kern.h>
+#include <os.h>
 
 /*
  * core module and version information
diff --git a/arch/um/drivers/slip_common.c b/arch/um/drivers/slip_common.c
index e89cfc68fc3..f597fa7c91d 100644
--- a/arch/um/drivers/slip_common.c
+++ b/arch/um/drivers/slip_common.c
@@ -1,6 +1,6 @@
 #include <string.h>
 #include "slip_common.h"
-#include "net_user.h"
+#include <net_user.h>
 
 int slip_proto_read(int fd, void *buf, int len, struct slip_proto *slip)
 {
diff --git a/arch/um/drivers/slip_kern.c b/arch/um/drivers/slip_kern.c
index dd2aadc14af..ed5249fc057 100644
--- a/arch/um/drivers/slip_kern.c
+++ b/arch/um/drivers/slip_kern.c
@@ -6,7 +6,7 @@
 #include <linux/if_arp.h>
 #include <linux/init.h>
 #include <linux/netdevice.h>
-#include "net_kern.h"
+#include <net_kern.h>
 #include "slip.h"
 
 struct slip_init {
diff --git a/arch/um/drivers/slip_user.c b/arch/um/drivers/slip_user.c
index 932b4d69bec..55c290d925f 100644
--- a/arch/um/drivers/slip_user.c
+++ b/arch/um/drivers/slip_user.c
@@ -11,10 +11,10 @@
 #include <string.h>
 #include <sys/termios.h>
 #include <sys/wait.h>
-#include "net_user.h"
-#include "os.h"
+#include <net_user.h>
+#include <os.h>
 #include "slip.h"
-#include "um_malloc.h"
+#include <um_malloc.h>
 
 static int slip_user_init(void *data, void *dev)
 {
diff --git a/arch/um/drivers/slirp_kern.c b/arch/um/drivers/slirp_kern.c
index e376284f0fb..4ef11ca7cac 100644
--- a/arch/um/drivers/slirp_kern.c
+++ b/arch/um/drivers/slirp_kern.c
@@ -4,11 +4,11 @@
  */
 
 #include <linux/if_arp.h>
-#include "linux/init.h"
+#include <linux/init.h>
 #include <linux/netdevice.h>
 #include <linux/string.h>
-#include "net_kern.h"
-#include "net_user.h"
+#include <net_kern.h>
+#include <net_user.h>
 #include "slirp.h"
 
 struct slirp_init {
diff --git a/arch/um/drivers/slirp_user.c b/arch/um/drivers/slirp_user.c
index db4adb639ff..c999d187abb 100644
--- a/arch/um/drivers/slirp_user.c
+++ b/arch/um/drivers/slirp_user.c
@@ -7,8 +7,8 @@
 #include <errno.h>
 #include <string.h>
 #include <sys/wait.h>
-#include "net_user.h"
-#include "os.h"
+#include <net_user.h>
+#include <os.h>
 #include "slirp.h"
 
 static int slirp_user_init(void *data, void *dev)
diff --git a/arch/um/drivers/ssl.c b/arch/um/drivers/ssl.c
index 7e86f007012..16fdd0a0f9d 100644
--- a/arch/um/drivers/ssl.c
+++ b/arch/um/drivers/ssl.c
@@ -3,19 +3,19 @@
  * Licensed under the GPL
  */
 
-#include "linux/fs.h"
-#include "linux/tty.h"
-#include "linux/tty_driver.h"
-#include "linux/major.h"
-#include "linux/mm.h"
-#include "linux/init.h"
-#include "linux/console.h"
-#include "asm/termbits.h"
-#include "asm/irq.h"
+#include <linux/fs.h>
+#include <linux/tty.h>
+#include <linux/tty_driver.h>
+#include <linux/major.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+#include <linux/console.h>
+#include <asm/termbits.h>
+#include <asm/irq.h>
 #include "ssl.h"
 #include "chan.h"
-#include "init.h"
-#include "irq_user.h"
+#include <init.h>
+#include <irq_user.h>
 #include "mconsole_kern.h"
 
 static const int ssl_version = 1;
diff --git a/arch/um/drivers/stdio_console.c b/arch/um/drivers/stdio_console.c
index 929b99a261f..827777af3f6 100644
--- a/arch/um/drivers/stdio_console.c
+++ b/arch/um/drivers/stdio_console.c
@@ -3,27 +3,27 @@
  * Licensed under the GPL
  */
 
-#include "linux/posix_types.h"
-#include "linux/tty.h"
-#include "linux/tty_flip.h"
-#include "linux/types.h"
-#include "linux/major.h"
-#include "linux/kdev_t.h"
-#include "linux/console.h"
-#include "linux/string.h"
-#include "linux/sched.h"
-#include "linux/list.h"
-#include "linux/init.h"
-#include "linux/interrupt.h"
-#include "linux/slab.h"
-#include "linux/hardirq.h"
-#include "asm/current.h"
-#include "asm/irq.h"
+#include <linux/posix_types.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/types.h>
+#include <linux/major.h>
+#include <linux/kdev_t.h>
+#include <linux/console.h>
+#include <linux/string.h>
+#include <linux/sched.h>
+#include <linux/list.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/slab.h>
+#include <linux/hardirq.h>
+#include <asm/current.h>
+#include <asm/irq.h>
 #include "stdio_console.h"
 #include "chan.h"
-#include "irq_user.h"
+#include <irq_user.h>
 #include "mconsole_kern.h"
-#include "init.h"
+#include <init.h>
 
 #define MAX_TTYS (16)
 
diff --git a/arch/um/drivers/tty.c b/arch/um/drivers/tty.c
index a97391f9ec5..eaa201bca5e 100644
--- a/arch/um/drivers/tty.c
+++ b/arch/um/drivers/tty.c
@@ -7,8 +7,8 @@
 #include <fcntl.h>
 #include <termios.h>
 #include "chan_user.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <os.h>
+#include <um_malloc.h>
 
 struct tty_chan {
 	char *dev;
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 0643e5bc9f4..41bf72073cc 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -33,12 +33,12 @@
 #include <linux/platform_device.h>
 #include <linux/scatterlist.h>
 #include <asm/tlbflush.h>
-#include "kern_util.h"
+#include <kern_util.h>
 #include "mconsole_kern.h"
-#include "init.h"
-#include "irq_kern.h"
+#include <init.h>
+#include <irq_kern.h>
 #include "ubd.h"
-#include "os.h"
+#include <os.h>
 #include "cow.h"
 
 enum ubd_req { UBD_READ, UBD_WRITE };
diff --git a/arch/um/drivers/ubd_user.c b/arch/um/drivers/ubd_user.c
index ffe02c431de..a703e45d8aa 100644
--- a/arch/um/drivers/ubd_user.c
+++ b/arch/um/drivers/ubd_user.c
@@ -19,7 +19,7 @@
 #include <byteswap.h>
 
 #include "ubd.h"
-#include "os.h"
+#include <os.h>
 
 void ignore_sigwinch_sig(void)
 {
diff --git a/arch/um/drivers/umcast.h b/arch/um/drivers/umcast.h
index 6f8c0fe890f..c190c644091 100644
--- a/arch/um/drivers/umcast.h
+++ b/arch/um/drivers/umcast.h
@@ -6,7 +6,7 @@
 #ifndef __DRIVERS_UMCAST_H
 #define __DRIVERS_UMCAST_H
 
-#include "net_user.h"
+#include <net_user.h>
 
 struct umcast_data {
 	char *addr;
diff --git a/arch/um/drivers/umcast_kern.c b/arch/um/drivers/umcast_kern.c
index 42dab11d2ec..f5ba6e37791 100644
--- a/arch/um/drivers/umcast_kern.c
+++ b/arch/um/drivers/umcast_kern.c
@@ -11,10 +11,10 @@
  * Licensed under the GPL.
  */
 
-#include "linux/init.h"
+#include <linux/init.h>
 #include <linux/netdevice.h>
 #include "umcast.h"
-#include "net_kern.h"
+#include <net_kern.h>
 
 struct umcast_init {
 	char *addr;
diff --git a/arch/um/drivers/umcast_user.c b/arch/um/drivers/umcast_user.c
index 010fa2d849e..6074184bb51 100644
--- a/arch/um/drivers/umcast_user.c
+++ b/arch/um/drivers/umcast_user.c
@@ -16,8 +16,8 @@
 #include <errno.h>
 #include <netinet/in.h>
 #include "umcast.h"
-#include "net_user.h"
-#include "um_malloc.h"
+#include <net_user.h>
+#include <um_malloc.h>
 
 static struct sockaddr_in *new_addr(char *addr, unsigned short port)
 {
diff --git a/arch/um/drivers/vde_kern.c b/arch/um/drivers/vde_kern.c
index 1b852bffdeb..6a365fadc7c 100644
--- a/arch/um/drivers/vde_kern.c
+++ b/arch/um/drivers/vde_kern.c
@@ -7,10 +7,10 @@
  *
  */
 
-#include "linux/init.h"
+#include <linux/init.h>
 #include <linux/netdevice.h>
-#include "net_kern.h"
-#include "net_user.h"
+#include <net_kern.h>
+#include <net_user.h>
 #include "vde.h"
 
 static void vde_init(struct net_device *dev, void *data)
diff --git a/arch/um/drivers/vde_user.c b/arch/um/drivers/vde_user.c
index b8c286748d3..64cb630d115 100644
--- a/arch/um/drivers/vde_user.c
+++ b/arch/um/drivers/vde_user.c
@@ -6,8 +6,8 @@
 #include <stddef.h>
 #include <errno.h>
 #include <libvdeplug.h>
-#include "net_user.h"
-#include "um_malloc.h"
+#include <net_user.h>
+#include <um_malloc.h>
 #include "vde.h"
 
 static int vde_user_init(void *data, void *dev)
diff --git a/arch/um/drivers/xterm.c b/arch/um/drivers/xterm.c
index 969110e5648..20e30be4479 100644
--- a/arch/um/drivers/xterm.c
+++ b/arch/um/drivers/xterm.c
@@ -11,8 +11,8 @@
 #include <string.h>
 #include <termios.h>
 #include "chan_user.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <os.h>
+#include <um_malloc.h>
 #include "xterm.h"
 
 struct xterm_chan {
diff --git a/arch/um/drivers/xterm_kern.c b/arch/um/drivers/xterm_kern.c
index e3031e69445..e8f9957bfbf 100644
--- a/arch/um/drivers/xterm_kern.c
+++ b/arch/um/drivers/xterm_kern.c
@@ -7,8 +7,8 @@
 #include <linux/completion.h>
 #include <linux/irqreturn.h>
 #include <asm/irq.h>
-#include "irq_kern.h"
-#include "os.h"
+#include <irq_kern.h>
+#include <os.h>
 
 struct xterm_wait {
 	struct completion ready;
diff --git a/arch/um/include/asm/Kbuild b/arch/um/include/asm/Kbuild
index fff24352255..0f6e7b32826 100644
--- a/arch/um/include/asm/Kbuild
+++ b/arch/um/include/asm/Kbuild
@@ -1,4 +1,4 @@
 generic-y += bug.h cputime.h device.h emergency-restart.h futex.h hardirq.h
 generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h
 generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h exec.h
-generic-y += switch_to.h
+generic-y += switch_to.h clkdev.h
diff --git a/arch/um/include/asm/dma.h b/arch/um/include/asm/dma.h
index 9f6139a8a52..f88c5860520 100644
--- a/arch/um/include/asm/dma.h
+++ b/arch/um/include/asm/dma.h
@@ -1,7 +1,7 @@
 #ifndef __UM_DMA_H
 #define __UM_DMA_H
 
-#include "asm/io.h"
+#include <asm/io.h>
 
 extern unsigned long uml_physmem;
 
diff --git a/arch/um/include/asm/mmu.h b/arch/um/include/asm/mmu.h
index 53e8b498ebb..da705448590 100644
--- a/arch/um/include/asm/mmu.h
+++ b/arch/um/include/asm/mmu.h
@@ -6,7 +6,7 @@
 #ifndef __ARCH_UM_MMU_H
 #define __ARCH_UM_MMU_H
 
-#include "mm_id.h"
+#include <mm_id.h>
 #include <asm/mm_context.h>
 
 typedef struct mm_context {
diff --git a/arch/um/include/asm/page.h b/arch/um/include/asm/page.h
index 7cfc3cedce8..5ff53d9185f 100644
--- a/arch/um/include/asm/page.h
+++ b/arch/um/include/asm/page.h
@@ -99,7 +99,7 @@ extern unsigned long uml_physmem;
 
 #define __va_space (8*1024*1024)
 
-#include "mem.h"
+#include <mem.h>
 
 /* Cast to unsigned long before casting to void * to avoid a warning from
  * mmap_kmem about cutting a long long down to a void *.  Not sure that
diff --git a/arch/um/include/asm/pgtable.h b/arch/um/include/asm/pgtable.h
index 5888f1b8347..ae02909a187 100644
--- a/arch/um/include/asm/pgtable.h
+++ b/arch/um/include/asm/pgtable.h
@@ -23,9 +23,9 @@
 				   pte_present gives true */
 
 #ifdef CONFIG_3_LEVEL_PGTABLES
-#include "asm/pgtable-3level.h"
+#include <asm/pgtable-3level.h>
 #else
-#include "asm/pgtable-2level.h"
+#include <asm/pgtable-2level.h>
 #endif
 
 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
diff --git a/arch/um/include/asm/processor-generic.h b/arch/um/include/asm/processor-generic.h
index 33a6a2423bd..c03cd5a0236 100644
--- a/arch/um/include/asm/processor-generic.h
+++ b/arch/um/include/asm/processor-generic.h
@@ -10,9 +10,9 @@ struct pt_regs;
 
 struct task_struct;
 
-#include "asm/ptrace.h"
-#include "registers.h"
-#include "sysdep/archsetjmp.h"
+#include <asm/ptrace.h>
+#include <registers.h>
+#include <sysdep/archsetjmp.h>
 
 #include <linux/prefetch.h>
 
@@ -26,7 +26,6 @@ struct thread_struct {
 	jmp_buf *fault_catcher;
 	struct task_struct *prev_sched;
 	unsigned long temp_stack;
-	jmp_buf *exec_buf;
 	struct arch_thread arch;
 	jmp_buf switch_buf;
 	int mm_count;
@@ -54,7 +53,6 @@ struct thread_struct {
 	.fault_addr		= NULL, \
 	.prev_sched		= NULL, \
 	.temp_stack		= 0, \
-	.exec_buf		= NULL, \
 	.arch			= INIT_ARCH_THREAD, \
 	.request		= { 0 } \
 }
@@ -63,8 +61,6 @@ static inline void release_thread(struct task_struct *task)
 {
 }
 
-extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
-
 extern unsigned long thread_saved_pc(struct task_struct *t);
 
 static inline void mm_copy_segments(struct mm_struct *from_mm,
diff --git a/arch/um/include/asm/ptrace-generic.h b/arch/um/include/asm/ptrace-generic.h
index 442f1d025dc..cb9b3c47ca8 100644
--- a/arch/um/include/asm/ptrace-generic.h
+++ b/arch/um/include/asm/ptrace-generic.h
@@ -9,7 +9,7 @@
 #ifndef __ASSEMBLY__
 
 #include <asm/ptrace-abi.h>
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
 struct pt_regs {
 	struct uml_pt_regs regs;
diff --git a/arch/um/include/asm/smp.h b/arch/um/include/asm/smp.h
index 4a4b09d4f36..e4507938d8c 100644
--- a/arch/um/include/asm/smp.h
+++ b/arch/um/include/asm/smp.h
@@ -3,9 +3,9 @@
 
 #ifdef CONFIG_SMP
 
-#include "linux/bitops.h"
-#include "asm/current.h"
-#include "linux/cpumask.h"
+#include <linux/bitops.h>
+#include <asm/current.h>
+#include <linux/cpumask.h>
 
 #define raw_smp_processor_id() (current_thread->cpu)
 
diff --git a/arch/um/include/shared/sysrq.h b/arch/um/include/asm/sysrq.h
index c8d332b56b9..c8d332b56b9 100644
--- a/arch/um/include/shared/sysrq.h
+++ b/arch/um/include/asm/sysrq.h
diff --git a/arch/um/include/asm/thread_info.h b/arch/um/include/asm/thread_info.h
index c04e5ab68f5..2c8eeb2df8b 100644
--- a/arch/um/include/asm/thread_info.h
+++ b/arch/um/include/asm/thread_info.h
@@ -65,8 +65,6 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SYSCALL_TRACE	0	/* syscall trace active */
 #define TIF_SIGPENDING		1	/* signal pending */
 #define TIF_NEED_RESCHED	2	/* rescheduling necessary */
-#define TIF_POLLING_NRFLAG      3       /* true if poll_idle() is polling
-					 * TIF_NEED_RESCHED */
 #define TIF_RESTART_BLOCK	4
 #define TIF_MEMDIE		5	/* is terminating due to OOM killer */
 #define TIF_SYSCALL_AUDIT	6
@@ -76,7 +74,6 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
-#define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_MEMDIE		(1 << TIF_MEMDIE)
 #define _TIF_SYSCALL_AUDIT	(1 << TIF_SYSCALL_AUDIT)
 
diff --git a/arch/um/include/shared/arch.h b/arch/um/include/shared/arch.h
index 2de92a08a76..4f46abda060 100644
--- a/arch/um/include/shared/arch.h
+++ b/arch/um/include/shared/arch.h
@@ -6,7 +6,7 @@
 #ifndef __ARCH_H__
 #define __ARCH_H__
 
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
 extern void arch_check_bugs(void);
 extern int arch_fixup(unsigned long address, struct uml_pt_regs *regs);
diff --git a/arch/um/include/shared/as-layout.h b/arch/um/include/shared/as-layout.h
index 86daa546181..694c792bab4 100644
--- a/arch/um/include/shared/as-layout.h
+++ b/arch/um/include/shared/as-layout.h
@@ -35,7 +35,7 @@
 
 #ifndef __ASSEMBLY__
 
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
 struct cpu_task {
 	int pid;
diff --git a/arch/um/include/shared/irq_kern.h b/arch/um/include/shared/irq_kern.h
index 7a5bfa6291b..e05bd667de1 100644
--- a/arch/um/include/shared/irq_kern.h
+++ b/arch/um/include/shared/irq_kern.h
@@ -6,8 +6,8 @@
 #ifndef __IRQ_KERN_H__
 #define __IRQ_KERN_H__
 
-#include "linux/interrupt.h"
-#include "asm/ptrace.h"
+#include <linux/interrupt.h>
+#include <asm/ptrace.h>
 
 extern int um_request_irq(unsigned int irq, int fd, int type,
 			  irq_handler_t handler,
diff --git a/arch/um/include/shared/irq_user.h b/arch/um/include/shared/irq_user.h
index 2b6d703925b..df563305395 100644
--- a/arch/um/include/shared/irq_user.h
+++ b/arch/um/include/shared/irq_user.h
@@ -6,7 +6,7 @@
 #ifndef __IRQ_USER_H__
 #define __IRQ_USER_H__
 
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
 struct irq_fd {
 	struct irq_fd *next;
diff --git a/arch/um/include/shared/kern_util.h b/arch/um/include/shared/kern_util.h
index af6b6dc868b..83a91f97633 100644
--- a/arch/um/include/shared/kern_util.h
+++ b/arch/um/include/shared/kern_util.h
@@ -6,8 +6,8 @@
 #ifndef __KERN_UTIL_H__
 #define __KERN_UTIL_H__
 
-#include "sysdep/ptrace.h"
-#include "sysdep/faultinfo.h"
+#include <sysdep/ptrace.h>
+#include <sysdep/faultinfo.h>
 
 struct siginfo;
 
diff --git a/arch/um/include/shared/longjmp.h b/arch/um/include/shared/longjmp.h
index e860bc5848e..9bdddf4c405 100644
--- a/arch/um/include/shared/longjmp.h
+++ b/arch/um/include/shared/longjmp.h
@@ -1,8 +1,8 @@
 #ifndef __UML_LONGJMP_H
 #define __UML_LONGJMP_H
 
-#include "sysdep/archsetjmp.h"
-#include "os.h"
+#include <sysdep/archsetjmp.h>
+#include <os.h>
 
 extern int setjmp(jmp_buf);
 extern void longjmp(jmp_buf, int);
diff --git a/arch/um/include/shared/os.h b/arch/um/include/shared/os.h
index 89b686c1a3e..95feaa47a2f 100644
--- a/arch/um/include/shared/os.h
+++ b/arch/um/include/shared/os.h
@@ -7,9 +7,9 @@
 #define __OS_H__
 
 #include <stdarg.h>
-#include "irq_user.h"
-#include "longjmp.h"
-#include "mm_id.h"
+#include <irq_user.h>
+#include <longjmp.h>
+#include <mm_id.h>
 
 #define CATCH_EINTR(expr) while ((errno = 0, ((expr) < 0)) && (errno == EINTR))
 
@@ -191,7 +191,6 @@ extern int os_getpid(void);
 extern int os_getpgrp(void);
 
 extern void init_new_thread_signals(void);
-extern int run_kernel_thread(int (*fn)(void *), void *arg, jmp_buf **jmp_ptr);
 
 extern int os_map_memory(void *virt, int fd, unsigned long long off,
 			 unsigned long len, int r, int w, int x);
diff --git a/arch/um/include/shared/registers.h b/arch/um/include/shared/registers.h
index f1e0aa56c52..f5b76355ad7 100644
--- a/arch/um/include/shared/registers.h
+++ b/arch/um/include/shared/registers.h
@@ -6,8 +6,8 @@
 #ifndef __REGISTERS_H
 #define __REGISTERS_H
 
-#include "sysdep/ptrace.h"
-#include "sysdep/archsetjmp.h"
+#include <sysdep/ptrace.h>
+#include <sysdep/archsetjmp.h>
 
 extern int save_fp_registers(int pid, unsigned long *fp_regs);
 extern int restore_fp_registers(int pid, unsigned long *fp_regs);
diff --git a/arch/um/include/shared/skas/skas.h b/arch/um/include/shared/skas/skas.h
index 64d2c744330..c45df961c87 100644
--- a/arch/um/include/shared/skas/skas.h
+++ b/arch/um/include/shared/skas/skas.h
@@ -6,7 +6,7 @@
 #ifndef __SKAS_H
 #define __SKAS_H
 
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
 extern int userspace_pid[];
 extern int proc_mm, ptrace_faultinfo, ptrace_ldt;
diff --git a/arch/um/include/shared/skas_ptrace.h b/arch/um/include/shared/skas_ptrace.h
index 3d31bbacd01..630a9c92b93 100644
--- a/arch/um/include/shared/skas_ptrace.h
+++ b/arch/um/include/shared/skas_ptrace.h
@@ -9,6 +9,6 @@
 #define PTRACE_FAULTINFO 52
 #define PTRACE_SWITCH_MM 55
 
-#include "sysdep/skas_ptrace.h"
+#include <sysdep/skas_ptrace.h>
 
 #endif
diff --git a/arch/um/kernel/asm-offsets.c b/arch/um/kernel/asm-offsets.c
index 91ea538e161..1fb12235ab9 100644
--- a/arch/um/kernel/asm-offsets.c
+++ b/arch/um/kernel/asm-offsets.c
@@ -1 +1 @@
-#include "sysdep/kernel-offsets.h"
+#include <sysdep/kernel-offsets.h>
diff --git a/arch/um/kernel/config.c.in b/arch/um/kernel/config.c.in
index b7a43feafde..972bf165956 100644
--- a/arch/um/kernel/config.c.in
+++ b/arch/um/kernel/config.c.in
@@ -5,7 +5,7 @@
 
 #include <stdio.h>
 #include <stdlib.h>
-#include "init.h"
+#include <init.h>
 
 static __initdata const char *config[] = {
 "CONFIG"
diff --git a/arch/um/kernel/dyn.lds.S b/arch/um/kernel/dyn.lds.S
index a3cab6d3ae0..fb8fd6fb656 100644
--- a/arch/um/kernel/dyn.lds.S
+++ b/arch/um/kernel/dyn.lds.S
@@ -89,7 +89,7 @@ SECTIONS
 
   .kstrtab : { *(.kstrtab) }
 
-  #include "asm/common.lds.S"
+  #include <asm/common.lds.S>
 
   init.data : { INIT_DATA }
 
diff --git a/arch/um/kernel/early_printk.c b/arch/um/kernel/early_printk.c
index ec649bf72f6..49480f09245 100644
--- a/arch/um/kernel/early_printk.c
+++ b/arch/um/kernel/early_printk.c
@@ -9,7 +9,7 @@
 #include <linux/kernel.h>
 #include <linux/console.h>
 #include <linux/init.h>
-#include "os.h"
+#include <os.h>
 
 static void early_console_write(struct console *con, const char *s, unsigned int n)
 {
diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c
index 8c82786da82..3a8ece7d09c 100644
--- a/arch/um/kernel/exec.c
+++ b/arch/um/kernel/exec.c
@@ -12,11 +12,10 @@
 #include <asm/current.h>
 #include <asm/processor.h>
 #include <asm/uaccess.h>
-#include "as-layout.h"
-#include "mem_user.h"
-#include "skas.h"
-#include "os.h"
-#include "internal.h"
+#include <as-layout.h>
+#include <mem_user.h>
+#include <skas.h>
+#include <os.h>
 
 void flush_thread(void)
 {
@@ -48,28 +47,3 @@ void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp)
 #endif
 }
 EXPORT_SYMBOL(start_thread);
-
-long um_execve(const char *file, const char __user *const __user *argv, const char __user *const __user *env)
-{
-	long err;
-
-	err = do_execve(file, argv, env, &current->thread.regs);
-	if (!err)
-		UML_LONGJMP(current->thread.exec_buf, 1);
-	return err;
-}
-
-long sys_execve(const char __user *file, const char __user *const __user *argv,
-		const char __user *const __user *env)
-{
-	long error;
-	char *filename;
-
-	filename = getname(file);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename)) goto out;
-	error = do_execve(filename, argv, env, &current->thread.regs);
-	putname(filename);
- out:
-	return error;
-}
diff --git a/arch/um/kernel/gmon_syms.c b/arch/um/kernel/gmon_syms.c
index e9bcf247bce..1bf61266da8 100644
--- a/arch/um/kernel/gmon_syms.c
+++ b/arch/um/kernel/gmon_syms.c
@@ -3,7 +3,7 @@
  * Licensed under the GPL
  */
 
-#include "linux/module.h"
+#include <linux/module.h>
 
 extern void __bb_init_func(void *)  __attribute__((weak));
 EXPORT_SYMBOL(__bb_init_func);
diff --git a/arch/um/kernel/gprof_syms.c b/arch/um/kernel/gprof_syms.c
index e2f043d0de6..74ddb44288a 100644
--- a/arch/um/kernel/gprof_syms.c
+++ b/arch/um/kernel/gprof_syms.c
@@ -3,7 +3,7 @@
  * Licensed under the GPL
  */
 
-#include "linux/module.h"
+#include <linux/module.h>
 
 extern void mcount(void);
 EXPORT_SYMBOL(mcount);
diff --git a/arch/um/kernel/initrd.c b/arch/um/kernel/initrd.c
index 10cc18f729f..55cead809b1 100644
--- a/arch/um/kernel/initrd.c
+++ b/arch/um/kernel/initrd.c
@@ -3,12 +3,12 @@
  * Licensed under the GPL
  */
 
-#include "linux/init.h"
-#include "linux/bootmem.h"
-#include "linux/initrd.h"
-#include "asm/types.h"
-#include "init.h"
-#include "os.h"
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/initrd.h>
+#include <asm/types.h>
+#include <init.h>
+#include <os.h>
 
 /* Changed by uml_initrd_setup, which is a setup */
 static char *initrd __initdata = NULL;
diff --git a/arch/um/kernel/internal.h b/arch/um/kernel/internal.h
deleted file mode 100644
index 5bf97db24a0..00000000000
--- a/arch/um/kernel/internal.h
+++ /dev/null
@@ -1 +0,0 @@
-extern long um_execve(const char *file, const char __user *const __user *argv, const char __user *const __user *env);
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
index 9883026f073..36e12f0cefd 100644
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -5,17 +5,17 @@
  *	Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
  */
 
-#include "linux/cpumask.h"
-#include "linux/hardirq.h"
-#include "linux/interrupt.h"
-#include "linux/kernel_stat.h"
-#include "linux/module.h"
-#include "linux/sched.h"
-#include "linux/seq_file.h"
-#include "linux/slab.h"
-#include "as-layout.h"
-#include "kern_util.h"
-#include "os.h"
+#include <linux/cpumask.h>
+#include <linux/hardirq.h>
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/seq_file.h>
+#include <linux/slab.h>
+#include <as-layout.h>
+#include <kern_util.h>
+#include <os.h>
 
 /*
  * This list is accessed under irq_lock, except in sigio_handler,
diff --git a/arch/um/kernel/ksyms.c b/arch/um/kernel/ksyms.c
index e17bea0b22e..543c0475693 100644
--- a/arch/um/kernel/ksyms.c
+++ b/arch/um/kernel/ksyms.c
@@ -4,7 +4,7 @@
  */
 
 #include <linux/module.h>
-#include "os.h"
+#include <os.h>
 
 EXPORT_SYMBOL(set_signals);
 EXPORT_SYMBOL(get_signals);
diff --git a/arch/um/kernel/mem.c b/arch/um/kernel/mem.c
index ebb86b21844..5abcbfbe7e2 100644
--- a/arch/um/kernel/mem.c
+++ b/arch/um/kernel/mem.c
@@ -12,12 +12,12 @@
 #include <linux/slab.h>
 #include <asm/fixmap.h>
 #include <asm/page.h>
-#include "as-layout.h"
-#include "init.h"
-#include "kern.h"
-#include "kern_util.h"
-#include "mem_user.h"
-#include "os.h"
+#include <as-layout.h>
+#include <init.h>
+#include <kern.h>
+#include <kern_util.h>
+#include <mem_user.h>
+#include <os.h>
 
 /* allocated in paging_init, zeroed in mem_init, and unchanged thereafter */
 unsigned long *empty_zero_page = NULL;
diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c
index c5f5afa5074..b6d699cdd55 100644
--- a/arch/um/kernel/process.c
+++ b/arch/um/kernel/process.c
@@ -23,10 +23,10 @@
 #include <asm/pgtable.h>
 #include <asm/mmu_context.h>
 #include <asm/uaccess.h>
-#include "as-layout.h"
-#include "kern_util.h"
-#include "os.h"
-#include "skas.h"
+#include <as-layout.h>
+#include <kern_util.h>
+#include <os.h>
+#include <skas.h>
 
 /*
  * This is a per-cpu array.  A processor only modifies its entry and it only
@@ -69,18 +69,6 @@ unsigned long alloc_stack(int order, int atomic)
 	return page;
 }
 
-int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
-{
-	int pid;
-
-	current->thread.request.u.thread.proc = fn;
-	current->thread.request.u.thread.arg = arg;
-	pid = do_fork(CLONE_VM | CLONE_UNTRACED | flags, 0,
-		      &current->thread.regs, 0, NULL, NULL);
-	return pid;
-}
-EXPORT_SYMBOL(kernel_thread);
-
 static inline void set_current(struct task_struct *task)
 {
 	cpu_tasks[task_thread_info(task)->cpu] = ((struct cpu_task)
@@ -147,14 +135,10 @@ void new_thread_handler(void)
 	arg = current->thread.request.u.thread.arg;
 
 	/*
-	 * The return value is 1 if the kernel thread execs a process,
-	 * 0 if it just exits
+	 * callback returns only if the kernel thread execs a process
 	 */
-	n = run_kernel_thread(fn, arg, &current->thread.exec_buf);
-	if (n == 1)
-		userspace(&current->thread.regs.regs);
-	else
-		do_exit(0);
+	n = fn(arg);
+	userspace(&current->thread.regs.regs);
 }
 
 /* Called magically, see new_thread_handler above */
@@ -177,7 +161,7 @@ void fork_handler(void)
 }
 
 int copy_thread(unsigned long clone_flags, unsigned long sp,
-		unsigned long stack_top, struct task_struct * p,
+		unsigned long arg, struct task_struct * p,
 		struct pt_regs *regs)
 {
 	void (*handler)(void);
@@ -198,7 +182,8 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
 		arch_copy_thread(&current->thread.arch, &p->thread.arch);
 	} else {
 		get_safe_registers(p->thread.regs.regs.gp, p->thread.regs.regs.fp);
-		p->thread.request.u.thread = current->thread.request.u.thread;
+		p->thread.request.u.thread.proc = (int (*)(void *))sp;
+		p->thread.request.u.thread.arg = (void *)arg;
 		handler = new_thread_handler;
 	}
 
diff --git a/arch/um/kernel/reboot.c b/arch/um/kernel/reboot.c
index 3d15243ce69..ced8903921a 100644
--- a/arch/um/kernel/reboot.c
+++ b/arch/um/kernel/reboot.c
@@ -3,13 +3,13 @@
  * Licensed under the GPL
  */
 
-#include "linux/sched.h"
-#include "linux/spinlock.h"
-#include "linux/slab.h"
-#include "linux/oom.h"
-#include "kern_util.h"
-#include "os.h"
-#include "skas.h"
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+#include <linux/oom.h>
+#include <kern_util.h>
+#include <os.h>
+#include <skas.h>
 
 void (*pm_power_off)(void);
 
diff --git a/arch/um/kernel/sigio.c b/arch/um/kernel/sigio.c
index c88211139a5..b5e0cbb3438 100644
--- a/arch/um/kernel/sigio.c
+++ b/arch/um/kernel/sigio.c
@@ -4,9 +4,9 @@
  */
 
 #include <linux/interrupt.h>
-#include "irq_kern.h"
-#include "os.h"
-#include "sigio.h"
+#include <irq_kern.h>
+#include <os.h>
+#include <sigio.h>
 
 /* Protected by sigio_lock() called from write_sigio_workaround */
 static int sigio_irq_fd = -1;
diff --git a/arch/um/kernel/signal.c b/arch/um/kernel/signal.c
index cc9c2350e41..db18eb6124e 100644
--- a/arch/um/kernel/signal.c
+++ b/arch/um/kernel/signal.c
@@ -9,8 +9,8 @@
 #include <asm/siginfo.h>
 #include <asm/signal.h>
 #include <asm/unistd.h>
-#include "frame_kern.h"
-#include "kern_util.h"
+#include <frame_kern.h>
+#include <kern_util.h>
 
 EXPORT_SYMBOL(block_signals);
 EXPORT_SYMBOL(unblock_signals);
diff --git a/arch/um/kernel/skas/clone.c b/arch/um/kernel/skas/clone.c
index e1fd066a352..289771dadf8 100644
--- a/arch/um/kernel/skas/clone.c
+++ b/arch/um/kernel/skas/clone.c
@@ -7,10 +7,10 @@
 #include <sched.h>
 #include <asm/unistd.h>
 #include <sys/time.h>
-#include "as-layout.h"
-#include "ptrace_user.h"
-#include "stub-data.h"
-#include "sysdep/stub.h"
+#include <as-layout.h>
+#include <ptrace_user.h>
+#include <stub-data.h>
+#include <sysdep/stub.h>
 
 /*
  * This is in a separate file because it needs to be compiled with any
diff --git a/arch/um/kernel/skas/mmu.c b/arch/um/kernel/skas/mmu.c
index 0a49ef0c2bf..ff03067a3b1 100644
--- a/arch/um/kernel/skas/mmu.c
+++ b/arch/um/kernel/skas/mmu.c
@@ -3,14 +3,14 @@
  * Licensed under the GPL
  */
 
-#include "linux/mm.h"
-#include "linux/sched.h"
-#include "linux/slab.h"
-#include "asm/pgalloc.h"
-#include "asm/pgtable.h"
-#include "as-layout.h"
-#include "os.h"
-#include "skas.h"
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <asm/pgalloc.h>
+#include <asm/pgtable.h>
+#include <as-layout.h>
+#include <os.h>
+#include <skas.h>
 
 extern int __syscall_stub_start;
 
diff --git a/arch/um/kernel/skas/process.c b/arch/um/kernel/skas/process.c
index 0a9e57e7446..4da11b3c8dd 100644
--- a/arch/um/kernel/skas/process.c
+++ b/arch/um/kernel/skas/process.c
@@ -3,12 +3,12 @@
  * Licensed under the GPL
  */
 
-#include "linux/init.h"
-#include "linux/sched.h"
-#include "as-layout.h"
-#include "kern.h"
-#include "os.h"
-#include "skas.h"
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <as-layout.h>
+#include <kern.h>
+#include <os.h>
+#include <skas.h>
 
 int new_mm(unsigned long stack)
 {
diff --git a/arch/um/kernel/skas/syscall.c b/arch/um/kernel/skas/syscall.c
index 86368a025a9..c0681e09743 100644
--- a/arch/um/kernel/skas/syscall.c
+++ b/arch/um/kernel/skas/syscall.c
@@ -3,11 +3,11 @@
  * Licensed under the GPL
  */
 
-#include "linux/kernel.h"
-#include "linux/ptrace.h"
-#include "kern_util.h"
-#include "sysdep/ptrace.h"
-#include "sysdep/syscalls.h"
+#include <linux/kernel.h>
+#include <linux/ptrace.h>
+#include <kern_util.h>
+#include <sysdep/ptrace.h>
+#include <sysdep/syscalls.h>
 
 extern int syscall_table_size;
 #define NR_SYSCALLS (syscall_table_size / sizeof(void *))
diff --git a/arch/um/kernel/skas/uaccess.c b/arch/um/kernel/skas/uaccess.c
index cd7df79c6a5..1d3e0c17340 100644
--- a/arch/um/kernel/skas/uaccess.c
+++ b/arch/um/kernel/skas/uaccess.c
@@ -11,8 +11,8 @@
 #include <asm/current.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
-#include "kern_util.h"
-#include "os.h"
+#include <kern_util.h>
+#include <os.h>
 
 pte_t *virt_to_pte(struct mm_struct *mm, unsigned long addr)
 {
diff --git a/arch/um/kernel/smp.c b/arch/um/kernel/smp.c
index a02b7e9e6b9..5c8c3ea7db7 100644
--- a/arch/um/kernel/smp.c
+++ b/arch/um/kernel/smp.c
@@ -3,24 +3,24 @@
  * Licensed under the GPL
  */
 
-#include "linux/percpu.h"
-#include "asm/pgalloc.h"
-#include "asm/tlb.h"
+#include <linux/percpu.h>
+#include <asm/pgalloc.h>
+#include <asm/tlb.h>
 
 #ifdef CONFIG_SMP
 
-#include "linux/sched.h"
-#include "linux/module.h"
-#include "linux/threads.h"
-#include "linux/interrupt.h"
-#include "linux/err.h"
-#include "linux/hardirq.h"
-#include "asm/smp.h"
-#include "asm/processor.h"
-#include "asm/spinlock.h"
-#include "kern.h"
-#include "irq_user.h"
-#include "os.h"
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/threads.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/hardirq.h>
+#include <asm/smp.h>
+#include <asm/processor.h>
+#include <asm/spinlock.h>
+#include <kern.h>
+#include <irq_user.h>
+#include <os.h>
 
 /* Per CPU bogomips and other parameters
  * The only piece used here is the ipi pipe, which is set before SMP is
diff --git a/arch/um/kernel/syscall.c b/arch/um/kernel/syscall.c
index a4c6d8eee74..a81f3705e90 100644
--- a/arch/um/kernel/syscall.c
+++ b/arch/um/kernel/syscall.c
@@ -3,17 +3,16 @@
  * Licensed under the GPL
  */
 
-#include "linux/file.h"
-#include "linux/fs.h"
-#include "linux/mm.h"
-#include "linux/sched.h"
-#include "linux/utsname.h"
-#include "linux/syscalls.h"
-#include "asm/current.h"
-#include "asm/mman.h"
-#include "asm/uaccess.h"
-#include "asm/unistd.h"
-#include "internal.h"
+#include <linux/file.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/utsname.h>
+#include <linux/syscalls.h>
+#include <asm/current.h>
+#include <asm/mman.h>
+#include <asm/uaccess.h>
+#include <asm/unistd.h>
 
 long sys_fork(void)
 {
@@ -50,19 +49,3 @@ long old_mmap(unsigned long addr, unsigned long len,
  out:
 	return err;
 }
-
-int kernel_execve(const char *filename,
-		  const char *const argv[],
-		  const char *const envp[])
-{
-	mm_segment_t fs;
-	int ret;
-
-	fs = get_fs();
-	set_fs(KERNEL_DS);
-	ret = um_execve(filename, (const char __user *const __user *)argv,
-			(const char __user *const __user *) envp);
-	set_fs(fs);
-
-	return ret;
-}
diff --git a/arch/um/kernel/sysrq.c b/arch/um/kernel/sysrq.c
index 0960de54495..e562ff80409 100644
--- a/arch/um/kernel/sysrq.c
+++ b/arch/um/kernel/sysrq.c
@@ -7,7 +7,7 @@
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/sched.h>
-#include "sysrq.h"
+#include <asm/sysrq.h>
 
 /* Catch non-i386 SUBARCH's. */
 #if !defined(CONFIG_UML_X86) || defined(CONFIG_64BIT)
diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
index 5f76d4ba151..117568d4f64 100644
--- a/arch/um/kernel/time.c
+++ b/arch/um/kernel/time.c
@@ -10,8 +10,8 @@
 #include <linux/threads.h>
 #include <asm/irq.h>
 #include <asm/param.h>
-#include "kern_util.h"
-#include "os.h"
+#include <kern_util.h>
+#include <os.h>
 
 void timer_handler(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs)
 {
diff --git a/arch/um/kernel/tlb.c b/arch/um/kernel/tlb.c
index f819af951c1..9472079471b 100644
--- a/arch/um/kernel/tlb.c
+++ b/arch/um/kernel/tlb.c
@@ -8,10 +8,10 @@
 #include <linux/sched.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
-#include "as-layout.h"
-#include "mem_user.h"
-#include "os.h"
-#include "skas.h"
+#include <as-layout.h>
+#include <mem_user.h>
+#include <os.h>
+#include <skas.h>
 
 struct host_vm_change {
 	struct host_vm_op {
diff --git a/arch/um/kernel/trap.c b/arch/um/kernel/trap.c
index 0353b98ae35..089f3987e27 100644
--- a/arch/um/kernel/trap.c
+++ b/arch/um/kernel/trap.c
@@ -10,11 +10,11 @@
 #include <asm/current.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
-#include "arch.h"
-#include "as-layout.h"
-#include "kern_util.h"
-#include "os.h"
-#include "skas.h"
+#include <arch.h>
+#include <as-layout.h>
+#include <kern_util.h>
+#include <os.h>
+#include <skas.h>
 
 /*
  * Note this is constrained to return 0, -EFAULT, -EACCESS, -ENOMEM by
@@ -89,6 +89,7 @@ good_area:
 				current->min_flt++;
 			if (fault & VM_FAULT_RETRY) {
 				flags &= ~FAULT_FLAG_ALLOW_RETRY;
+				flags |= FAULT_FLAG_TRIED;
 
 				goto retry;
 			}
diff --git a/arch/um/kernel/um_arch.c b/arch/um/kernel/um_arch.c
index 4db8770906c..87df5e3acc2 100644
--- a/arch/um/kernel/um_arch.c
+++ b/arch/um/kernel/um_arch.c
@@ -14,13 +14,13 @@
 #include <asm/pgtable.h>
 #include <asm/processor.h>
 #include <asm/setup.h>
-#include "as-layout.h"
-#include "arch.h"
-#include "init.h"
-#include "kern.h"
-#include "kern_util.h"
-#include "mem_user.h"
-#include "os.h"
+#include <as-layout.h>
+#include <arch.h>
+#include <init.h>
+#include <kern.h>
+#include <kern_util.h>
+#include <mem_user.h>
+#include <os.h>
 
 #define DEFAULT_COMMAND_LINE "root=98:0"
 
diff --git a/arch/um/kernel/umid.c b/arch/um/kernel/umid.c
index 81e07e2be3a..f6cc3bd6178 100644
--- a/arch/um/kernel/umid.c
+++ b/arch/um/kernel/umid.c
@@ -4,9 +4,9 @@
  */
 
 #include <asm/errno.h>
-#include "init.h"
-#include "kern.h"
-#include "os.h"
+#include <init.h>
+#include <kern.h>
+#include <os.h>
 
 /* Changed by set_umid_arg */
 static int umid_inited = 0;
diff --git a/arch/um/kernel/uml.lds.S b/arch/um/kernel/uml.lds.S
index fbd99402d4d..ff65fb4f1a9 100644
--- a/arch/um/kernel/uml.lds.S
+++ b/arch/um/kernel/uml.lds.S
@@ -60,7 +60,7 @@ SECTIONS
 	PROVIDE_HIDDEN(__rela_iplt_end = .);
   }
 
-  #include "asm/common.lds.S"
+  #include <asm/common.lds.S>
 
   init.data : { INIT_DATA }
   .data    :
diff --git a/arch/um/os-Linux/aio.c b/arch/um/os-Linux/aio.c
index c5d039e1ff3..3a6bc2af096 100644
--- a/arch/um/os-Linux/aio.c
+++ b/arch/um/os-Linux/aio.c
@@ -9,10 +9,10 @@
 #include <errno.h>
 #include <sys/time.h>
 #include <asm/unistd.h>
-#include "aio.h"
-#include "init.h"
-#include "kern_util.h"
-#include "os.h"
+#include <aio.h>
+#include <init.h>
+#include <kern_util.h>
+#include <os.h>
 
 struct aio_thread_req {
 	enum aio_type type;
diff --git a/arch/um/os-Linux/drivers/etap.h b/arch/um/os-Linux/drivers/etap.h
index ddffd41c3f3..54183a679fd 100644
--- a/arch/um/os-Linux/drivers/etap.h
+++ b/arch/um/os-Linux/drivers/etap.h
@@ -6,7 +6,7 @@
 #ifndef __DRIVERS_ETAP_H
 #define __DRIVERS_ETAP_H
 
-#include "net_user.h"
+#include <net_user.h>
 
 struct ethertap_data {
 	char *dev_name;
diff --git a/arch/um/os-Linux/drivers/ethertap_kern.c b/arch/um/os-Linux/drivers/ethertap_kern.c
index 7f6f9a71aae..f424600a583 100644
--- a/arch/um/os-Linux/drivers/ethertap_kern.c
+++ b/arch/um/os-Linux/drivers/ethertap_kern.c
@@ -9,7 +9,7 @@
 #include <linux/init.h>
 #include <linux/netdevice.h>
 #include "etap.h"
-#include "net_kern.h"
+#include <net_kern.h>
 
 struct ethertap_init {
 	char *dev_name;
diff --git a/arch/um/os-Linux/drivers/ethertap_user.c b/arch/um/os-Linux/drivers/ethertap_user.c
index db3d6481375..b39b6696ac5 100644
--- a/arch/um/os-Linux/drivers/ethertap_user.c
+++ b/arch/um/os-Linux/drivers/ethertap_user.c
@@ -13,9 +13,9 @@
 #include <sys/socket.h>
 #include <sys/wait.h>
 #include "etap.h"
-#include "os.h"
-#include "net_user.h"
-#include "um_malloc.h"
+#include <os.h>
+#include <net_user.h>
+#include <um_malloc.h>
 
 #define MAX_PACKET ETH_MAX_PACKET
 
diff --git a/arch/um/os-Linux/drivers/tuntap.h b/arch/um/os-Linux/drivers/tuntap.h
index f17c31586c8..7367354ac8d 100644
--- a/arch/um/os-Linux/drivers/tuntap.h
+++ b/arch/um/os-Linux/drivers/tuntap.h
@@ -6,7 +6,7 @@
 #ifndef __UM_TUNTAP_H
 #define __UM_TUNTAP_H
 
-#include "net_user.h"
+#include <net_user.h>
 
 struct tuntap_data {
 	char *dev_name;
diff --git a/arch/um/os-Linux/drivers/tuntap_kern.c b/arch/um/os-Linux/drivers/tuntap_kern.c
index 4048800e469..d9d56e5810f 100644
--- a/arch/um/os-Linux/drivers/tuntap_kern.c
+++ b/arch/um/os-Linux/drivers/tuntap_kern.c
@@ -7,7 +7,7 @@
 #include <linux/init.h>
 #include <linux/skbuff.h>
 #include <asm/errno.h>
-#include "net_kern.h"
+#include <net_kern.h>
 #include "tuntap.h"
 
 struct tuntap_init {
diff --git a/arch/um/os-Linux/drivers/tuntap_user.c b/arch/um/os-Linux/drivers/tuntap_user.c
index a2aacffdd90..14126d9176a 100644
--- a/arch/um/os-Linux/drivers/tuntap_user.c
+++ b/arch/um/os-Linux/drivers/tuntap_user.c
@@ -13,8 +13,8 @@
 #include <sys/socket.h>
 #include <sys/wait.h>
 #include <sys/uio.h>
-#include "kern_util.h"
-#include "os.h"
+#include <kern_util.h>
+#include <os.h>
 #include "tuntap.h"
 
 static int tuntap_user_init(void *data, void *dev)
diff --git a/arch/um/os-Linux/elf_aux.c b/arch/um/os-Linux/elf_aux.c
index d895271ad6f..1a365ddc4d0 100644
--- a/arch/um/os-Linux/elf_aux.c
+++ b/arch/um/os-Linux/elf_aux.c
@@ -9,9 +9,9 @@
  */
 #include <elf.h>
 #include <stddef.h>
-#include "init.h"
-#include "elf_user.h"
-#include "mem_user.h"
+#include <init.h>
+#include <elf_user.h>
+#include <mem_user.h>
 
 typedef Elf32_auxv_t elf_auxv_t;
 
diff --git a/arch/um/os-Linux/execvp.c b/arch/um/os-Linux/execvp.c
index 66e583a4031..8fb25ca07c4 100644
--- a/arch/um/os-Linux/execvp.c
+++ b/arch/um/os-Linux/execvp.c
@@ -27,12 +27,12 @@
 #include <limits.h>
 
 #ifndef TEST
-#include "um_malloc.h"
+#include <um_malloc.h>
 #else
 #include <stdio.h>
 #define um_kmalloc malloc
 #endif
-#include "os.h"
+#include <os.h>
 
 /* Execute FILE, searching in the `PATH' environment variable if it contains
    no slashes, with arguments ARGV and environment from `environ'.  */
diff --git a/arch/um/os-Linux/file.c b/arch/um/os-Linux/file.c
index b049a63bb74..c17bd6f7d67 100644
--- a/arch/um/os-Linux/file.c
+++ b/arch/um/os-Linux/file.c
@@ -13,7 +13,7 @@
 #include <sys/socket.h>
 #include <sys/stat.h>
 #include <sys/un.h>
-#include "os.h"
+#include <os.h>
 
 static void copy_stat(struct uml_stat *dst, const struct stat64 *src)
 {
diff --git a/arch/um/os-Linux/helper.c b/arch/um/os-Linux/helper.c
index cf26c4a9a43..e3ee4a51ef6 100644
--- a/arch/um/os-Linux/helper.c
+++ b/arch/um/os-Linux/helper.c
@@ -10,9 +10,9 @@
 #include <linux/limits.h>
 #include <sys/socket.h>
 #include <sys/wait.h>
-#include "kern_util.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <kern_util.h>
+#include <os.h>
+#include <um_malloc.h>
 
 struct helper_data {
 	void (*pre_exec)(void*);
diff --git a/arch/um/os-Linux/irq.c b/arch/um/os-Linux/irq.c
index 9a49908b576..b9afb74b79a 100644
--- a/arch/um/os-Linux/irq.c
+++ b/arch/um/os-Linux/irq.c
@@ -8,9 +8,9 @@
 #include <poll.h>
 #include <signal.h>
 #include <string.h>
-#include "irq_user.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <irq_user.h>
+#include <os.h>
+#include <um_malloc.h>
 
 /*
  * Locked by irq_lock in arch/um/kernel/irq.c.  Changed by os_create_pollfd
diff --git a/arch/um/os-Linux/main.c b/arch/um/os-Linux/main.c
index 7a86dd516eb..749c96da7b9 100644
--- a/arch/um/os-Linux/main.c
+++ b/arch/um/os-Linux/main.c
@@ -10,11 +10,11 @@
 #include <signal.h>
 #include <string.h>
 #include <sys/resource.h>
-#include "as-layout.h"
-#include "init.h"
-#include "kern_util.h"
-#include "os.h"
-#include "um_malloc.h"
+#include <as-layout.h>
+#include <init.h>
+#include <kern_util.h>
+#include <os.h>
+#include <um_malloc.h>
 
 #define PGD_BOUND (4 * 1024 * 1024)
 #define STACKSIZE (8 * 1024 * 1024)
diff --git a/arch/um/os-Linux/mem.c b/arch/um/os-Linux/mem.c
index 8e421e1d6d3..ba4398056fe 100644
--- a/arch/um/os-Linux/mem.c
+++ b/arch/um/os-Linux/mem.c
@@ -13,8 +13,8 @@
 #include <sys/stat.h>
 #include <sys/mman.h>
 #include <sys/param.h>
-#include "init.h"
-#include "os.h"
+#include <init.h>
+#include <os.h>
 
 /* Modified by which_tmpdir, which is called during early boot */
 static char *default_tmpdir = "/tmp";
diff --git a/arch/um/os-Linux/process.c b/arch/um/os-Linux/process.c
index 307f173e7f8..b8f34c9e53a 100644
--- a/arch/um/os-Linux/process.c
+++ b/arch/um/os-Linux/process.c
@@ -12,10 +12,10 @@
 #include <sys/ptrace.h>
 #include <sys/wait.h>
 #include <asm/unistd.h>
-#include "init.h"
-#include "longjmp.h"
-#include "os.h"
-#include "skas_ptrace.h"
+#include <init.h>
+#include <longjmp.h>
+#include <os.h>
+#include <skas_ptrace.h>
 
 #define ARBITRARY_ADDR -1
 #define FAILURE_PID    -1
@@ -244,16 +244,3 @@ void init_new_thread_signals(void)
 	signal(SIGWINCH, SIG_IGN);
 	signal(SIGTERM, SIG_DFL);
 }
-
-int run_kernel_thread(int (*fn)(void *), void *arg, jmp_buf **jmp_ptr)
-{
-	jmp_buf buf;
-	int n;
-
-	*jmp_ptr = &buf;
-	n = UML_SETJMP(&buf);
-	if (n != 0)
-		return n;
-	(*fn)(arg);
-	return 0;
-}
diff --git a/arch/um/os-Linux/registers.c b/arch/um/os-Linux/registers.c
index b866b9e3bef..2ff8d4fe83c 100644
--- a/arch/um/os-Linux/registers.c
+++ b/arch/um/os-Linux/registers.c
@@ -7,9 +7,9 @@
 #include <errno.h>
 #include <string.h>
 #include <sys/ptrace.h>
-#include "sysdep/ptrace.h"
-#include "sysdep/ptrace_user.h"
-#include "registers.h"
+#include <sysdep/ptrace.h>
+#include <sysdep/ptrace_user.h>
+#include <registers.h>
 
 int save_registers(int pid, struct uml_pt_regs *regs)
 {
diff --git a/arch/um/os-Linux/sigio.c b/arch/um/os-Linux/sigio.c
index 3c161218c67..8b61cc0e82c 100644
--- a/arch/um/os-Linux/sigio.c
+++ b/arch/um/os-Linux/sigio.c
@@ -11,11 +11,11 @@
 #include <sched.h>
 #include <signal.h>
 #include <string.h>
-#include "kern_util.h"
-#include "init.h"
-#include "os.h"
-#include "sigio.h"
-#include "um_malloc.h"
+#include <kern_util.h>
+#include <init.h>
+#include <os.h>
+#include <sigio.h>
+#include <um_malloc.h>
 
 /*
  * Protected by sigio_lock(), also used by sigio_cleanup, which is an
diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c
index 6366ce904b9..b1469fe9329 100644
--- a/arch/um/os-Linux/signal.c
+++ b/arch/um/os-Linux/signal.c
@@ -9,10 +9,10 @@
 #include <errno.h>
 #include <signal.h>
 #include <strings.h>
-#include "as-layout.h"
-#include "kern_util.h"
-#include "os.h"
-#include "sysdep/mcontext.h"
+#include <as-layout.h>
+#include <kern_util.h>
+#include <os.h>
+#include <sysdep/mcontext.h>
 #include "internal.h"
 
 void (*sig_info[NSIG])(int, siginfo_t *, struct uml_pt_regs *) = {
diff --git a/arch/um/os-Linux/skas/mem.c b/arch/um/os-Linux/skas/mem.c
index 90b310d2917..689b18db798 100644
--- a/arch/um/os-Linux/skas/mem.c
+++ b/arch/um/os-Linux/skas/mem.c
@@ -8,16 +8,16 @@
 #include <errno.h>
 #include <string.h>
 #include <sys/mman.h>
-#include "init.h"
-#include "as-layout.h"
-#include "mm_id.h"
-#include "os.h"
-#include "proc_mm.h"
-#include "ptrace_user.h"
-#include "registers.h"
-#include "skas.h"
-#include "sysdep/ptrace.h"
-#include "sysdep/stub.h"
+#include <init.h>
+#include <as-layout.h>
+#include <mm_id.h>
+#include <os.h>
+#include <proc_mm.h>
+#include <ptrace_user.h>
+#include <registers.h>
+#include <skas.h>
+#include <sysdep/ptrace.h>
+#include <sysdep/stub.h>
 
 extern unsigned long batch_syscall_stub, __syscall_stub_start;
 
diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c
index d93bb40499f..4625949bf1e 100644
--- a/arch/um/os-Linux/skas/process.c
+++ b/arch/um/os-Linux/skas/process.c
@@ -11,17 +11,17 @@
 #include <sys/mman.h>
 #include <sys/wait.h>
 #include <asm/unistd.h>
-#include "as-layout.h"
-#include "init.h"
-#include "kern_util.h"
-#include "mem.h"
-#include "os.h"
-#include "proc_mm.h"
-#include "ptrace_user.h"
-#include "registers.h"
-#include "skas.h"
-#include "skas_ptrace.h"
-#include "sysdep/stub.h"
+#include <as-layout.h>
+#include <init.h>
+#include <kern_util.h>
+#include <mem.h>
+#include <os.h>
+#include <proc_mm.h>
+#include <ptrace_user.h>
+#include <registers.h>
+#include <skas.h>
+#include <skas_ptrace.h>
+#include <sysdep/stub.h>
 
 int is_skas_winch(int pid, int fd, void *data)
 {
diff --git a/arch/um/os-Linux/start_up.c b/arch/um/os-Linux/start_up.c
index 425162e22af..da4b9e9999f 100644
--- a/arch/um/os-Linux/start_up.c
+++ b/arch/um/os-Linux/start_up.c
@@ -16,13 +16,13 @@
 #include <sys/stat.h>
 #include <sys/wait.h>
 #include <asm/unistd.h>
-#include "init.h"
-#include "os.h"
-#include "mem_user.h"
-#include "ptrace_user.h"
-#include "registers.h"
-#include "skas.h"
-#include "skas_ptrace.h"
+#include <init.h>
+#include <os.h>
+#include <mem_user.h>
+#include <ptrace_user.h>
+#include <registers.h>
+#include <skas.h>
+#include <skas_ptrace.h>
 
 static void ptrace_child(void)
 {
diff --git a/arch/um/os-Linux/time.c b/arch/um/os-Linux/time.c
index 0748fe0c8a7..fac388cb464 100644
--- a/arch/um/os-Linux/time.c
+++ b/arch/um/os-Linux/time.c
@@ -8,8 +8,8 @@
 #include <signal.h>
 #include <time.h>
 #include <sys/time.h>
-#include "kern_util.h"
-#include "os.h"
+#include <kern_util.h>
+#include <os.h>
 #include "internal.h"
 
 int set_interval(void)
diff --git a/arch/um/os-Linux/tty.c b/arch/um/os-Linux/tty.c
index dd12b99dcb5..721d8afa329 100644
--- a/arch/um/os-Linux/tty.c
+++ b/arch/um/os-Linux/tty.c
@@ -7,8 +7,8 @@
 #include <unistd.h>
 #include <errno.h>
 #include <fcntl.h>
-#include "kern_util.h"
-#include "os.h"
+#include <kern_util.h>
+#include <os.h>
 
 struct grantpt_info {
 	int fd;
diff --git a/arch/um/os-Linux/umid.c b/arch/um/os-Linux/umid.c
index 4832eb519f8..c1dc89261f6 100644
--- a/arch/um/os-Linux/umid.c
+++ b/arch/um/os-Linux/umid.c
@@ -12,8 +12,8 @@
 #include <string.h>
 #include <unistd.h>
 #include <sys/stat.h>
-#include "init.h"
-#include "os.h"
+#include <init.h>
+#include <os.h>
 
 #define UML_DIR "~/.uml/"
 
diff --git a/arch/um/os-Linux/user_syms.c b/arch/um/os-Linux/user_syms.c
index 73926fa3f96..db4a034aeee 100644
--- a/arch/um/os-Linux/user_syms.c
+++ b/arch/um/os-Linux/user_syms.c
@@ -1,5 +1,5 @@
-#include "linux/types.h"
-#include "linux/module.h"
+#include <linux/types.h>
+#include <linux/module.h>
 
 /* Some of this are builtin function (some are not but could in the future),
  * so I *must* declare good prototypes for them and then EXPORT them.
diff --git a/arch/um/os-Linux/util.c b/arch/um/os-Linux/util.c
index 9e3b43bb84c..492ef5e6e16 100644
--- a/arch/um/os-Linux/util.c
+++ b/arch/um/os-Linux/util.c
@@ -13,7 +13,7 @@
 #include <wait.h>
 #include <sys/mman.h>
 #include <sys/utsname.h>
-#include "os.h"
+#include <os.h>
 
 void stack_protections(unsigned long address)
 {
diff --git a/arch/um/sys-ppc/miscthings.c b/arch/um/sys-ppc/miscthings.c
index 1c11aed9c71..25908d26ce0 100644
--- a/arch/um/sys-ppc/miscthings.c
+++ b/arch/um/sys-ppc/miscthings.c
@@ -1,6 +1,6 @@
-#include "linux/threads.h"
-#include "linux/stddef.h"  // for NULL
-#include "linux/elf.h"  // for AT_NULL
+#include <linux/threads.h>
+#include <linux/stddef.h>  // for NULL
+#include <linux/elf.h>  // for AT_NULL
 
 /* The following function nicked from arch/ppc/kernel/process.c and
  * adapted slightly */
diff --git a/arch/um/sys-ppc/ptrace.c b/arch/um/sys-ppc/ptrace.c
index 66ef155248f..8245df41b20 100644
--- a/arch/um/sys-ppc/ptrace.c
+++ b/arch/um/sys-ppc/ptrace.c
@@ -1,4 +1,4 @@
-#include "linux/sched.h"
+#include <linux/sched.h>
 #include "asm/ptrace.h"
 
 int putreg(struct task_struct *child, unsigned long regno, 
diff --git a/arch/um/sys-ppc/ptrace_user.c b/arch/um/sys-ppc/ptrace_user.c
index 224d2403c37..4601b9296aa 100644
--- a/arch/um/sys-ppc/ptrace_user.c
+++ b/arch/um/sys-ppc/ptrace_user.c
@@ -1,6 +1,6 @@
 #include <errno.h>
 #include <asm/ptrace.h>
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
 int ptrace_getregs(long pid, unsigned long *regs_out)
 {
diff --git a/arch/um/sys-ppc/shared/sysdep/ptrace.h b/arch/um/sys-ppc/shared/sysdep/ptrace.h
index 0e3230e937e..efe0c1a3ea9 100644
--- a/arch/um/sys-ppc/shared/sysdep/ptrace.h
+++ b/arch/um/sys-ppc/shared/sysdep/ptrace.h
@@ -5,7 +5,7 @@
 #ifndef __SYS_PTRACE_PPC_H
 #define __SYS_PTRACE_PPC_H
 
-#include "linux/types.h"
+#include <linux/types.h>
 
 /* the following taken from <asm-ppc/ptrace.h> */
 
diff --git a/arch/um/sys-ppc/sigcontext.c b/arch/um/sys-ppc/sigcontext.c
index 40694d0f3d1..aac6c83fe44 100644
--- a/arch/um/sys-ppc/sigcontext.c
+++ b/arch/um/sys-ppc/sigcontext.c
@@ -1,4 +1,4 @@
 #include "asm/ptrace.h"
 #include "asm/sigcontext.h"
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
diff --git a/arch/um/sys-ppc/sysrq.c b/arch/um/sys-ppc/sysrq.c
index 2f816f1a0ff..f889449f928 100644
--- a/arch/um/sys-ppc/sysrq.c
+++ b/arch/um/sys-ppc/sysrq.c
@@ -3,8 +3,8 @@
  * Licensed under the GPL
  */
 
-#include "linux/kernel.h"
-#include "linux/smp.h"
+#include <linux/kernel.h>
+#include <linux/smp.h>
 #include "asm/ptrace.h"
 #include "sysrq.h"
 
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index 1e638e75a6b..e5c5473e69c 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -15,15 +15,13 @@ config UNICORE32
 	select GENERIC_IRQ_SHOW
 	select ARCH_WANT_FRAME_POINTERS
 	select GENERIC_IOMAP
+	select MODULES_USE_ELF_REL
 	help
 	  UniCore-32 is 32-bit Instruction Set Architecture,
 	  including a series of low-power-consumption RISC chip
 	  designs licensed by PKUnity Ltd.
 	  Please see web page at <http://www.pkunity.com/>.
 
-config HAVE_PWM
-	bool
-
 config GENERIC_GPIO
 	def_bool y
 
@@ -106,7 +104,8 @@ config PUV3_DB0913
 
 config PUV3_NB0916
 	bool "NetBook board (0916)"
-	select HAVE_PWM
+	select PWM
+	select PWM_PUV3
 
 config PUV3_SMW0919
 	bool "Security Mini-Workstation board (0919)"
@@ -220,12 +219,6 @@ config PUV3_GPIO
 	select GPIO_SYSFS if EXPERIMENTAL
 	default y
 
-config PUV3_PWM
-	tristate
-	default BACKLIGHT_PWM
-	help
-	  Enable support for NB0916 PWM controllers
-
 if PUV3_NB0916
 
 menu "PKUnity NetBook-0916 Features"
diff --git a/arch/unicore32/include/asm/Kbuild b/arch/unicore32/include/asm/Kbuild
index 34b789b7111..c910c9857e1 100644
--- a/arch/unicore32/include/asm/Kbuild
+++ b/arch/unicore32/include/asm/Kbuild
@@ -4,12 +4,14 @@ generic-y += atomic.h
 generic-y += auxvec.h
 generic-y += bitsperlong.h
 generic-y += bugs.h
+generic-y += clkdev.h
 generic-y += cputime.h
 generic-y += current.h
 generic-y += device.h
 generic-y += div64.h
 generic-y += emergency-restart.h
 generic-y += errno.h
+generic-y += exec.h
 generic-y += fb.h
 generic-y += fcntl.h
 generic-y += ftrace.h
diff --git a/arch/unicore32/include/asm/exec.h b/arch/unicore32/include/asm/exec.h
deleted file mode 100644
index 06d1f0f5788..00000000000
--- a/arch/unicore32/include/asm/exec.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * Process execution bits for PKUnity SoC and UniCore ISA
- *
- * Copyright (C) 2001-2012 GUAN Xue-tao
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __UNICORE_EXEC_H__
-#define __UNICORE_EXEC_H__
-
-#define arch_align_stack(x)		(x)
-
-#endif /* __UNICORE_EXEC_H__ */
diff --git a/arch/unicore32/include/asm/thread_info.h b/arch/unicore32/include/asm/thread_info.h
index 89f7557583b..818b4a1edb5 100644
--- a/arch/unicore32/include/asm/thread_info.h
+++ b/arch/unicore32/include/asm/thread_info.h
@@ -141,12 +141,12 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
 #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
-#define _TIF_RESTORE_SIGMASK	(1 << TIF_RESTORE_SIGMASK)
 
 /*
  * Change these and you break ASM code in entry-common.S
  */
-#define _TIF_WORK_MASK		0x000000ff
+#define _TIF_WORK_MASK \
+	(_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME)
 
 #endif /* __KERNEL__ */
 #endif /* __UNICORE_THREAD_INFO_H__ */
diff --git a/arch/unicore32/include/mach/regs-ost.h b/arch/unicore32/include/mach/regs-ost.h
index 7b91fe698ee..4a85fb46384 100644
--- a/arch/unicore32/include/mach/regs-ost.h
+++ b/arch/unicore32/include/mach/regs-ost.h
@@ -33,18 +33,16 @@
  * Interrupt Enable Reg OST_OIER
  */
 #define OST_OIER	(PKUNITY_OST_BASE + 0x001C)
+
 /*
- * PWM Pulse Width Control Reg OST_PWMPWCR
- */
-#define OST_PWMPWCR	(PKUNITY_OST_BASE + 0x0080)
-/*
- * PWM Duty Cycle Control Reg OST_PWMDCCR
- */
-#define OST_PWMDCCR	(PKUNITY_OST_BASE + 0x0084)
-/*
- * PWM Period Control Reg OST_PWMPCR
+ * PWM Registers: IO base address: PKUNITY_OST_BASE + 0x80
+ *      PWCR: Pulse Width Control Reg
+ *      DCCR: Duty Cycle Control Reg
+ *      PCR: Period Control Reg
  */
-#define OST_PWMPCR	(PKUNITY_OST_BASE + 0x0088)
+#define OST_PWM_PWCR	(0x00)
+#define OST_PWM_DCCR	(0x04)
+#define OST_PWM_PCR 	(0x08)
 
 /*
  * Match detected 0 OST_OSSR_M0
diff --git a/arch/unicore32/kernel/Makefile b/arch/unicore32/kernel/Makefile
index 32401015695..fa497e0efe5 100644
--- a/arch/unicore32/kernel/Makefile
+++ b/arch/unicore32/kernel/Makefile
@@ -16,7 +16,6 @@ obj-$(CONFIG_UNICORE_FPU_F64)	+= fpu-ucf64.o
 obj-$(CONFIG_ARCH_PUV3)		+= clock.o irq.o time.o
 
 obj-$(CONFIG_PUV3_GPIO)		+= gpio.o
-obj-$(CONFIG_PUV3_PWM)		+= pwm.o
 obj-$(CONFIG_PUV3_PM)		+= pm.o sleep.o
 obj-$(CONFIG_HIBERNATION)	+= hibernate.o hibernate_asm.o
 
diff --git a/arch/unicore32/kernel/entry.S b/arch/unicore32/kernel/entry.S
index 00a259f9819..dcb87ab19dd 100644
--- a/arch/unicore32/kernel/entry.S
+++ b/arch/unicore32/kernel/entry.S
@@ -544,8 +544,6 @@ fast_work_pending:
 work_pending:
 	cand.a	r1, #_TIF_NEED_RESCHED
 	bne	work_resched
-	cand.a	r1, #_TIF_SIGPENDING|_TIF_NOTIFY_RESUME
-	beq	no_work_pending
 	mov	r0, sp				@ 'regs'
 	mov	r2, why				@ 'syscall'
 	cand.a	r1, #_TIF_SIGPENDING		@ delivering a signal?
diff --git a/arch/unicore32/kernel/process.c b/arch/unicore32/kernel/process.c
index b6f0458c314..b008586dad7 100644
--- a/arch/unicore32/kernel/process.c
+++ b/arch/unicore32/kernel/process.c
@@ -380,7 +380,7 @@ int vectors_user_mapping(void)
 	return install_special_mapping(mm, 0xffff0000, PAGE_SIZE,
 				       VM_READ | VM_EXEC |
 				       VM_MAYREAD | VM_MAYEXEC |
-				       VM_RESERVED,
+				       VM_DONTEXPAND | VM_DONTDUMP,
 				       NULL);
 }
 
diff --git a/arch/unicore32/kernel/pwm.c b/arch/unicore32/kernel/pwm.c
deleted file mode 100644
index 4615d51e3ba..00000000000
--- a/arch/unicore32/kernel/pwm.c
+++ /dev/null
@@ -1,263 +0,0 @@
-/*
- * linux/arch/unicore32/kernel/pwm.c
- *
- * Code specific to PKUnity SoC and UniCore ISA
- *
- *	Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
- *	Copyright (C) 2001-2010 Guan Xuetao
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/slab.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/pwm.h>
-
-#include <asm/div64.h>
-#include <mach/hardware.h>
-
-struct pwm_device {
-	struct list_head	node;
-	struct platform_device *pdev;
-
-	const char	*label;
-	struct clk	*clk;
-	int		clk_enabled;
-
-	unsigned int	use_count;
-	unsigned int	pwm_id;
-};
-
-/*
- * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
- * duty_ns   = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
- */
-int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
-{
-	unsigned long long c;
-	unsigned long period_cycles, prescale, pv, dc;
-
-	if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
-		return -EINVAL;
-
-	c = clk_get_rate(pwm->clk);
-	c = c * period_ns;
-	do_div(c, 1000000000);
-	period_cycles = c;
-
-	if (period_cycles < 1)
-		period_cycles = 1;
-	prescale = (period_cycles - 1) / 1024;
-	pv = period_cycles / (prescale + 1) - 1;
-
-	if (prescale > 63)
-		return -EINVAL;
-
-	if (duty_ns == period_ns)
-		dc = OST_PWMDCCR_FDCYCLE;
-	else
-		dc = (pv + 1) * duty_ns / period_ns;
-
-	/* NOTE: the clock to PWM has to be enabled first
-	 * before writing to the registers
-	 */
-	clk_enable(pwm->clk);
-	OST_PWMPWCR = prescale;
-	OST_PWMDCCR = pv - dc;
-	OST_PWMPCR  = pv;
-	clk_disable(pwm->clk);
-
-	return 0;
-}
-EXPORT_SYMBOL(pwm_config);
-
-int pwm_enable(struct pwm_device *pwm)
-{
-	int rc = 0;
-
-	if (!pwm->clk_enabled) {
-		rc = clk_enable(pwm->clk);
-		if (!rc)
-			pwm->clk_enabled = 1;
-	}
-	return rc;
-}
-EXPORT_SYMBOL(pwm_enable);
-
-void pwm_disable(struct pwm_device *pwm)
-{
-	if (pwm->clk_enabled) {
-		clk_disable(pwm->clk);
-		pwm->clk_enabled = 0;
-	}
-}
-EXPORT_SYMBOL(pwm_disable);
-
-static DEFINE_MUTEX(pwm_lock);
-static LIST_HEAD(pwm_list);
-
-struct pwm_device *pwm_request(int pwm_id, const char *label)
-{
-	struct pwm_device *pwm;
-	int found = 0;
-
-	mutex_lock(&pwm_lock);
-
-	list_for_each_entry(pwm, &pwm_list, node) {
-		if (pwm->pwm_id == pwm_id) {
-			found = 1;
-			break;
-		}
-	}
-
-	if (found) {
-		if (pwm->use_count == 0) {
-			pwm->use_count++;
-			pwm->label = label;
-		} else
-			pwm = ERR_PTR(-EBUSY);
-	} else
-		pwm = ERR_PTR(-ENOENT);
-
-	mutex_unlock(&pwm_lock);
-	return pwm;
-}
-EXPORT_SYMBOL(pwm_request);
-
-void pwm_free(struct pwm_device *pwm)
-{
-	mutex_lock(&pwm_lock);
-
-	if (pwm->use_count) {
-		pwm->use_count--;
-		pwm->label = NULL;
-	} else
-		pr_warning("PWM device already freed\n");
-
-	mutex_unlock(&pwm_lock);
-}
-EXPORT_SYMBOL(pwm_free);
-
-static inline void __add_pwm(struct pwm_device *pwm)
-{
-	mutex_lock(&pwm_lock);
-	list_add_tail(&pwm->node, &pwm_list);
-	mutex_unlock(&pwm_lock);
-}
-
-static struct pwm_device *pwm_probe(struct platform_device *pdev,
-		unsigned int pwm_id, struct pwm_device *parent_pwm)
-{
-	struct pwm_device *pwm;
-	struct resource *r;
-	int ret = 0;
-
-	pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
-	if (pwm == NULL) {
-		dev_err(&pdev->dev, "failed to allocate memory\n");
-		return ERR_PTR(-ENOMEM);
-	}
-
-	pwm->clk = clk_get(NULL, "OST_CLK");
-	if (IS_ERR(pwm->clk)) {
-		ret = PTR_ERR(pwm->clk);
-		goto err_free;
-	}
-	pwm->clk_enabled = 0;
-
-	pwm->use_count = 0;
-	pwm->pwm_id = pwm_id;
-	pwm->pdev = pdev;
-
-	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (r == NULL) {
-		dev_err(&pdev->dev, "no memory resource defined\n");
-		ret = -ENODEV;
-		goto err_free_clk;
-	}
-
-	r = request_mem_region(r->start, resource_size(r), pdev->name);
-	if (r == NULL) {
-		dev_err(&pdev->dev, "failed to request memory resource\n");
-		ret = -EBUSY;
-		goto err_free_clk;
-	}
-
-	__add_pwm(pwm);
-	platform_set_drvdata(pdev, pwm);
-	return pwm;
-
-err_free_clk:
-	clk_put(pwm->clk);
-err_free:
-	kfree(pwm);
-	return ERR_PTR(ret);
-}
-
-static int __devinit puv3_pwm_probe(struct platform_device *pdev)
-{
-	struct pwm_device *pwm = pwm_probe(pdev, pdev->id, NULL);
-
-	if (IS_ERR(pwm))
-		return PTR_ERR(pwm);
-
-	return 0;
-}
-
-static int __devexit pwm_remove(struct platform_device *pdev)
-{
-	struct pwm_device *pwm;
-	struct resource *r;
-
-	pwm = platform_get_drvdata(pdev);
-	if (pwm == NULL)
-		return -ENODEV;
-
-	mutex_lock(&pwm_lock);
-	list_del(&pwm->node);
-	mutex_unlock(&pwm_lock);
-
-	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	release_mem_region(r->start, resource_size(r));
-
-	clk_put(pwm->clk);
-	kfree(pwm);
-	return 0;
-}
-
-static struct platform_driver puv3_pwm_driver = {
-	.driver		= {
-		.name	= "PKUnity-v3-PWM",
-	},
-	.probe		= puv3_pwm_probe,
-	.remove		= __devexit_p(pwm_remove),
-};
-
-static int __init pwm_init(void)
-{
-	int ret = 0;
-
-	ret = platform_driver_register(&puv3_pwm_driver);
-	if (ret) {
-		printk(KERN_ERR "failed to register puv3_pwm_driver\n");
-		return ret;
-	}
-
-	return ret;
-}
-arch_initcall(pwm_init);
-
-static void __exit pwm_exit(void)
-{
-	platform_driver_unregister(&puv3_pwm_driver);
-}
-module_exit(pwm_exit);
-
-MODULE_LICENSE("GPL v2");
diff --git a/arch/unicore32/kernel/signal.c b/arch/unicore32/kernel/signal.c
index 8adedb37720..b8b2ffd774d 100644
--- a/arch/unicore32/kernel/signal.c
+++ b/arch/unicore32/kernel/signal.c
@@ -12,7 +12,6 @@
 #include <linux/errno.h>
 #include <linux/signal.h>
 #include <linux/personality.h>
-#include <linux/freezer.h>
 #include <linux/uaccess.h>
 #include <linux/tracehook.h>
 #include <linux/elf.h>
diff --git a/arch/unicore32/kernel/sys.c b/arch/unicore32/kernel/sys.c
index 3afe60a39ac..fabdee96110 100644
--- a/arch/unicore32/kernel/sys.c
+++ b/arch/unicore32/kernel/sys.c
@@ -51,13 +51,13 @@ asmlinkage long __sys_execve(const char __user *filename,
 			  struct pt_regs *regs)
 {
 	int error;
-	char *fn;
+	struct filename *fn;
 
 	fn = getname(filename);
 	error = PTR_ERR(fn);
 	if (IS_ERR(fn))
 		goto out;
-	error = do_execve(fn, argv, envp, regs);
+	error = do_execve(fn->name, argv, envp, regs);
 	putname(fn);
 out:
 	return error;
@@ -104,7 +104,6 @@ int kernel_execve(const char *filename,
  out:
 	return ret;
 }
-EXPORT_SYMBOL(kernel_execve);
 
 /* Note: used by the compat code even in 64-bit Linux. */
 SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index b72777ff32a..46c3bff3ced 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -10,6 +10,7 @@ config X86_32
 	def_bool y
 	depends on !64BIT
 	select CLKSRC_I8253
+	select HAVE_UID16
 
 config X86_64
 	def_bool y
@@ -46,6 +47,7 @@ config X86
 	select HAVE_FUNCTION_GRAPH_FP_TEST
 	select HAVE_FUNCTION_TRACE_MCOUNT_TEST
 	select HAVE_SYSCALL_TRACEPOINTS
+	select SYSCTL_EXCEPTION_TRACE
 	select HAVE_KVM
 	select HAVE_ARCH_KGDB
 	select HAVE_ARCH_TRACEHOOK
@@ -65,6 +67,7 @@ config X86
 	select HAVE_PERF_EVENTS_NMI
 	select HAVE_PERF_REGS
 	select HAVE_PERF_USER_STACK_DUMP
+	select HAVE_DEBUG_KMEMLEAK
 	select ANON_INODES
 	select HAVE_ALIGNED_STRUCT_PAGE if SLUB && !M386
 	select HAVE_CMPXCHG_LOCAL if !M386
@@ -85,6 +88,7 @@ config X86
 	select IRQ_FORCED_THREADING
 	select USE_GENERIC_SMP_HELPERS if SMP
 	select HAVE_BPF_JIT if X86_64
+	select HAVE_ARCH_TRANSPARENT_HUGEPAGE
 	select CLKEVT_I8253
 	select ARCH_HAVE_NMI_SAFE_CMPXCHG
 	select GENERIC_IOMAP
@@ -104,6 +108,10 @@ config X86
 	select GENERIC_STRNLEN_USER
 	select HAVE_RCU_USER_QS if X86_64
 	select HAVE_IRQ_TIME_ACCOUNTING
+	select GENERIC_KERNEL_THREAD
+	select GENERIC_KERNEL_EXECVE
+	select MODULES_USE_ELF_REL if X86_32
+	select MODULES_USE_ELF_RELA if X86_64
 
 config INSTRUCTION_DECODER
 	def_bool y
@@ -2168,6 +2176,7 @@ config IA32_EMULATION
 	bool "IA32 Emulation"
 	depends on X86_64
 	select COMPAT_BINFMT_ELF
+	select HAVE_UID16
 	---help---
 	  Include code to run legacy 32-bit programs under a
 	  64-bit kernel. You should likely turn this on, unless you're
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 474ca35b1bc..58790bd85c1 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -92,7 +92,7 @@ endif
 ifdef CONFIG_X86_X32
 	x32_ld_ok := $(call try-run,\
 			/bin/echo -e '1: .quad 1b' | \
-			$(CC) $(KBUILD_AFLAGS) -c -xassembler -o "$$TMP" - && \
+			$(CC) $(KBUILD_AFLAGS) -c -x assembler -o "$$TMP" - && \
 			$(OBJCOPY) -O elf32-x86-64 "$$TMP" "$$TMPO" && \
 			$(LD) -m elf32_x86_64 "$$TMPO" -o "$$TMP",y,n)
         ifeq ($(x32_ld_ok),y)
@@ -142,7 +142,7 @@ KBUILD_CFLAGS += $(call cc-option,-mno-avx,)
 KBUILD_CFLAGS += $(mflags-y)
 KBUILD_AFLAGS += $(mflags-y)
 
-archscripts: scripts_basic
+archscripts:
 	$(Q)$(MAKE) $(build)=arch/x86/tools relocs
 
 ###
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index ce03476d8c8..ccce0ed67dd 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -37,7 +37,8 @@ setup-y		+= video-bios.o
 targets		+= $(setup-y)
 hostprogs-y	:= mkcpustr tools/build
 
-HOST_EXTRACFLAGS += -I$(srctree)/tools/include $(USERINCLUDE) \
+HOST_EXTRACFLAGS += -I$(srctree)/tools/include \
+		    -include include/generated/autoconf.h \
 	            -D__EXPORTED_HEADERS__
 
 $(obj)/cpu.o: $(obj)/cpustr.h
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 9c289504e68..076745fc804 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -465,7 +465,7 @@ GLOBAL(\label)
 	PTREGSCALL stub32_rt_sigreturn, sys32_rt_sigreturn, %rdi
 	PTREGSCALL stub32_sigreturn, sys32_sigreturn, %rdi
 	PTREGSCALL stub32_sigaltstack, sys32_sigaltstack, %rdx
-	PTREGSCALL stub32_execve, sys32_execve, %rcx
+	PTREGSCALL stub32_execve, compat_sys_execve, %rcx
 	PTREGSCALL stub32_fork, sys_fork, %rdi
 	PTREGSCALL stub32_clone, sys32_clone, %rdx
 	PTREGSCALL stub32_vfork, sys_vfork, %rdi
diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index c5b938d92ea..86d68d1c880 100644
--- a/arch/x86/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
@@ -385,21 +385,6 @@ asmlinkage long sys32_sendfile(int out_fd, int in_fd,
 	return ret;
 }
 
-asmlinkage long sys32_execve(const char __user *name, compat_uptr_t __user *argv,
-			     compat_uptr_t __user *envp, struct pt_regs *regs)
-{
-	long error;
-	char *filename;
-
-	filename = getname(name);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		return error;
-	error = compat_do_execve(filename, argv, envp, regs);
-	putname(filename);
-	return error;
-}
-
 asmlinkage long sys32_clone(unsigned int clone_flags, unsigned int newsp,
 			    struct pt_regs *regs)
 {
diff --git a/arch/x86/include/asm/Kbuild b/arch/x86/include/asm/Kbuild
index 1595d681343..66e5f0ef052 100644
--- a/arch/x86/include/asm/Kbuild
+++ b/arch/x86/include/asm/Kbuild
@@ -22,3 +22,9 @@ header-y += sigcontext32.h
 header-y += ucontext.h
 header-y += vm86.h
 header-y += vsyscall.h
+
+genhdr-y += unistd_32.h
+genhdr-y += unistd_64.h
+genhdr-y += unistd_x32.h
+
+generic-y += clkdev.h
diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h
index 250b8774c15..b6c3b821acf 100644
--- a/arch/x86/include/asm/atomic.h
+++ b/arch/x86/include/asm/atomic.h
@@ -240,30 +240,6 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
 	return c;
 }
 
-
-/*
- * atomic_dec_if_positive - decrement by 1 if old value positive
- * @v: pointer of type atomic_t
- *
- * The function returns the old value of *v minus 1, even if
- * the atomic variable, v, was not decremented.
- */
-static inline int atomic_dec_if_positive(atomic_t *v)
-{
-	int c, old, dec;
-	c = atomic_read(v);
-	for (;;) {
-		dec = c - 1;
-		if (unlikely(dec < 0))
-			break;
-		old = atomic_cmpxchg((v), c, dec);
-		if (likely(old == c))
-			break;
-		c = old;
-	}
-	return dec;
-}
-
 /**
  * atomic_inc_short - increment of a short integer
  * @v: pointer to type int
diff --git a/arch/x86/include/asm/hugetlb.h b/arch/x86/include/asm/hugetlb.h
index 439a9acc132..bdd35dbd060 100644
--- a/arch/x86/include/asm/hugetlb.h
+++ b/arch/x86/include/asm/hugetlb.h
@@ -90,4 +90,8 @@ static inline void arch_release_hugepage(struct page *page)
 {
 }
 
+static inline void arch_clear_hugepage_flags(struct page *page)
+{
+}
+
 #endif /* _ASM_X86_HUGETLB_H */
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index fbee9714d9a..7f0edceb756 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -121,6 +121,11 @@
 #define MSR_P6_EVNTSEL0			0x00000186
 #define MSR_P6_EVNTSEL1			0x00000187
 
+#define MSR_KNC_PERFCTR0               0x00000020
+#define MSR_KNC_PERFCTR1               0x00000021
+#define MSR_KNC_EVNTSEL0               0x00000028
+#define MSR_KNC_EVNTSEL1               0x00000029
+
 /* AMD64 MSRs. Not complete. See the architecture manual for a more
    complete list. */
 
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index fc994846529..a1f780d45f7 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -146,8 +146,7 @@ static inline unsigned long pmd_pfn(pmd_t pmd)
 
 static inline int pmd_large(pmd_t pte)
 {
-	return (pmd_flags(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
-		(_PAGE_PSE | _PAGE_PRESENT);
+	return pmd_flags(pte) & _PAGE_PSE;
 }
 
 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
@@ -415,7 +414,13 @@ static inline int pte_hidden(pte_t pte)
 
 static inline int pmd_present(pmd_t pmd)
 {
-	return pmd_flags(pmd) & _PAGE_PRESENT;
+	/*
+	 * Checking for _PAGE_PSE is needed too because
+	 * split_huge_page will temporarily clear the present bit (but
+	 * the _PAGE_PSE flag will remain set at all times while the
+	 * _PAGE_PRESENT bit is clear).
+	 */
+	return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
 }
 
 static inline int pmd_none(pmd_t pmd)
diff --git a/arch/x86/include/asm/pgtable_32.h b/arch/x86/include/asm/pgtable_32.h
index 0c92113c4cb..8faa215a503 100644
--- a/arch/x86/include/asm/pgtable_32.h
+++ b/arch/x86/include/asm/pgtable_32.h
@@ -71,6 +71,7 @@ do {						\
  * tables contain all the necessary information.
  */
 #define update_mmu_cache(vma, address, ptep) do { } while (0)
+#define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
 
 #endif /* !__ASSEMBLY__ */
 
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 8251be02301..47356f9df82 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -143,6 +143,7 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
 #define pte_unmap(pte) ((void)(pte))/* NOP */
 
 #define update_mmu_cache(vma, address, ptep) do { } while (0)
+#define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
 
 /* Encode and de-code a swap entry */
 #if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index b98c0d958eb..ad1fc851167 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -588,11 +588,6 @@ typedef struct {
 } mm_segment_t;
 
 
-/*
- * create a kernel thread without removing it from tasklists
- */
-extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
-
 /* Free all resources held by a thread. */
 extern void release_thread(struct task_struct *);
 
diff --git a/arch/x86/include/asm/sys_ia32.h b/arch/x86/include/asm/sys_ia32.h
index 4ca1c611b55..a9a8cf3da49 100644
--- a/arch/x86/include/asm/sys_ia32.h
+++ b/arch/x86/include/asm/sys_ia32.h
@@ -54,8 +54,6 @@ asmlinkage long sys32_pwrite(unsigned int, const char __user *, u32, u32, u32);
 asmlinkage long sys32_personality(unsigned long);
 asmlinkage long sys32_sendfile(int, int, compat_off_t __user *, s32);
 
-asmlinkage long sys32_execve(const char __user *, compat_uptr_t __user *,
-			     compat_uptr_t __user *, struct pt_regs *);
 asmlinkage long sys32_clone(unsigned int, unsigned int, struct pt_regs *);
 
 long sys32_lseek(unsigned int, int, unsigned int);
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index f1d8b441fc7..2be0b880417 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -25,7 +25,7 @@ int sys_fork(struct pt_regs *);
 int sys_vfork(struct pt_regs *);
 long sys_execve(const char __user *,
 		const char __user *const __user *,
-		const char __user *const __user *, struct pt_regs *);
+		const char __user *const __user *);
 long sys_clone(unsigned long, unsigned long, void __user *,
 	       void __user *, struct pt_regs *);
 
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index c535d847e3b..2d946e63ee8 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -79,7 +79,6 @@ struct thread_info {
 #define TIF_SIGPENDING		2	/* signal pending */
 #define TIF_NEED_RESCHED	3	/* rescheduling necessary */
 #define TIF_SINGLESTEP		4	/* reenable singlestep on user return*/
-#define TIF_IRET		5	/* force IRET */
 #define TIF_SYSCALL_EMU		6	/* syscall emulation active */
 #define TIF_SYSCALL_AUDIT	7	/* syscall auditing active */
 #define TIF_SECCOMP		8	/* secure computing */
@@ -105,7 +104,6 @@ struct thread_info {
 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
 #define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
-#define _TIF_IRET		(1 << TIF_IRET)
 #define _TIF_SYSCALL_EMU	(1 << TIF_SYSCALL_EMU)
 #define _TIF_SYSCALL_AUDIT	(1 << TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP		(1 << TIF_SECCOMP)
diff --git a/arch/x86/include/asm/unistd.h b/arch/x86/include/asm/unistd.h
index 0d9776e9e2d..16f3fc6ebf2 100644
--- a/arch/x86/include/asm/unistd.h
+++ b/arch/x86/include/asm/unistd.h
@@ -50,6 +50,7 @@
 # define __ARCH_WANT_SYS_TIME
 # define __ARCH_WANT_SYS_UTIME
 # define __ARCH_WANT_SYS_WAITPID
+# define __ARCH_WANT_SYS_EXECVE
 
 /*
  * "Conditional" syscalls
diff --git a/arch/x86/include/asm/vgtod.h b/arch/x86/include/asm/vgtod.h
index 8b38be2de9e..46e24d36b7d 100644
--- a/arch/x86/include/asm/vgtod.h
+++ b/arch/x86/include/asm/vgtod.h
@@ -17,8 +17,8 @@ struct vsyscall_gtod_data {
 
 	/* open coded 'struct timespec' */
 	time_t		wall_time_sec;
-	u32		wall_time_nsec;
-	u32		monotonic_time_nsec;
+	u64		wall_time_snsec;
+	u64		monotonic_time_snsec;
 	time_t		monotonic_time_sec;
 
 	struct timezone sys_tz;
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index a48ea05157d..91ce48f05f9 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -23,7 +23,7 @@ obj-y			+= time.o ioport.o ldt.o dumpstack.o nmi.o
 obj-y			+= setup.o x86_init.o i8259.o irqinit.o jump_label.o
 obj-$(CONFIG_IRQ_WORK)  += irq_work.o
 obj-y			+= probe_roms.o
-obj-$(CONFIG_X86_32)	+= sys_i386_32.o i386_ksyms_32.o
+obj-$(CONFIG_X86_32)	+= i386_ksyms_32.o
 obj-$(CONFIG_X86_64)	+= sys_x86_64.o x8664_ksyms_64.o
 obj-y			+= syscall_$(BITS).o
 obj-$(CONFIG_X86_64)	+= vsyscall_64.o
diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
index 68de2dc962e..28610822fb3 100644
--- a/arch/x86/kernel/asm-offsets.c
+++ b/arch/x86/kernel/asm-offsets.c
@@ -69,4 +69,7 @@ void common(void) {
 	OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment);
 	OFFSET(BP_pref_address, boot_params, hdr.pref_address);
 	OFFSET(BP_code32_start, boot_params, hdr.code32_start);
+
+	BLANK();
+	DEFINE(PTREGS_SIZE, sizeof(struct pt_regs));
 }
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index d30a6a9a012..a0e067d3d96 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -32,7 +32,7 @@ obj-$(CONFIG_PERF_EVENTS)		+= perf_event.o
 
 ifdef CONFIG_PERF_EVENTS
 obj-$(CONFIG_CPU_SUP_AMD)		+= perf_event_amd.o
-obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_p6.o perf_event_p4.o
+obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_p6.o perf_event_knc.o perf_event_p4.o
 obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_intel_lbr.o perf_event_intel_ds.o perf_event_intel.o
 obj-$(CONFIG_CPU_SUP_INTEL)		+= perf_event_intel_uncore.o
 endif
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 8b6defe7eef..271d2570029 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -626,6 +626,8 @@ int p4_pmu_init(void);
 
 int p6_pmu_init(void);
 
+int knc_pmu_init(void);
+
 #else /* CONFIG_CPU_SUP_INTEL */
 
 static inline void reserve_ds_buffers(void)
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
index eebd5ffe1bb..6336bcbd061 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
@@ -41,17 +41,22 @@ struct cpu_perf_ibs {
 };
 
 struct perf_ibs {
-	struct pmu	pmu;
-	unsigned int	msr;
-	u64		config_mask;
-	u64		cnt_mask;
-	u64		enable_mask;
-	u64		valid_mask;
-	u64		max_period;
-	unsigned long	offset_mask[1];
-	int		offset_max;
-	struct cpu_perf_ibs __percpu *pcpu;
-	u64		(*get_count)(u64 config);
+	struct pmu			pmu;
+	unsigned int			msr;
+	u64				config_mask;
+	u64				cnt_mask;
+	u64				enable_mask;
+	u64				valid_mask;
+	u64				max_period;
+	unsigned long			offset_mask[1];
+	int				offset_max;
+	struct cpu_perf_ibs __percpu	*pcpu;
+
+	struct attribute		**format_attrs;
+	struct attribute_group		format_group;
+	const struct attribute_group	*attr_groups[2];
+
+	u64				(*get_count)(u64 config);
 };
 
 struct perf_ibs_data {
@@ -446,6 +451,19 @@ static void perf_ibs_del(struct perf_event *event, int flags)
 
 static void perf_ibs_read(struct perf_event *event) { }
 
+PMU_FORMAT_ATTR(rand_en,	"config:57");
+PMU_FORMAT_ATTR(cnt_ctl,	"config:19");
+
+static struct attribute *ibs_fetch_format_attrs[] = {
+	&format_attr_rand_en.attr,
+	NULL,
+};
+
+static struct attribute *ibs_op_format_attrs[] = {
+	NULL,	/* &format_attr_cnt_ctl.attr if IBS_CAPS_OPCNT */
+	NULL,
+};
+
 static struct perf_ibs perf_ibs_fetch = {
 	.pmu = {
 		.task_ctx_nr	= perf_invalid_context,
@@ -465,6 +483,7 @@ static struct perf_ibs perf_ibs_fetch = {
 	.max_period		= IBS_FETCH_MAX_CNT << 4,
 	.offset_mask		= { MSR_AMD64_IBSFETCH_REG_MASK },
 	.offset_max		= MSR_AMD64_IBSFETCH_REG_COUNT,
+	.format_attrs		= ibs_fetch_format_attrs,
 
 	.get_count		= get_ibs_fetch_count,
 };
@@ -488,6 +507,7 @@ static struct perf_ibs perf_ibs_op = {
 	.max_period		= IBS_OP_MAX_CNT << 4,
 	.offset_mask		= { MSR_AMD64_IBSOP_REG_MASK },
 	.offset_max		= MSR_AMD64_IBSOP_REG_COUNT,
+	.format_attrs		= ibs_op_format_attrs,
 
 	.get_count		= get_ibs_op_count,
 };
@@ -597,6 +617,17 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name)
 
 	perf_ibs->pcpu = pcpu;
 
+	/* register attributes */
+	if (perf_ibs->format_attrs[0]) {
+		memset(&perf_ibs->format_group, 0, sizeof(perf_ibs->format_group));
+		perf_ibs->format_group.name	= "format";
+		perf_ibs->format_group.attrs	= perf_ibs->format_attrs;
+
+		memset(&perf_ibs->attr_groups, 0, sizeof(perf_ibs->attr_groups));
+		perf_ibs->attr_groups[0]	= &perf_ibs->format_group;
+		perf_ibs->pmu.attr_groups	= perf_ibs->attr_groups;
+	}
+
 	ret = perf_pmu_register(&perf_ibs->pmu, name, -1);
 	if (ret) {
 		perf_ibs->pcpu = NULL;
@@ -608,13 +639,19 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name)
 
 static __init int perf_event_ibs_init(void)
 {
+	struct attribute **attr = ibs_op_format_attrs;
+
 	if (!ibs_caps)
 		return -ENODEV;	/* ibs not supported by the cpu */
 
 	perf_ibs_pmu_init(&perf_ibs_fetch, "ibs_fetch");
-	if (ibs_caps & IBS_CAPS_OPCNT)
+
+	if (ibs_caps & IBS_CAPS_OPCNT) {
 		perf_ibs_op.config_mask |= IBS_OP_CNT_CTL;
+		*attr++ = &format_attr_cnt_ctl.attr;
+	}
 	perf_ibs_pmu_init(&perf_ibs_op, "ibs_op");
+
 	register_nmi_handler(NMI_LOCAL, perf_ibs_nmi_handler, 0, "perf_ibs");
 	printk(KERN_INFO "perf: AMD IBS detected (0x%08x)\n", ibs_caps);
 
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 6bca492b854..324bb523d9d 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1906,6 +1906,8 @@ __init int intel_pmu_init(void)
 		switch (boot_cpu_data.x86) {
 		case 0x6:
 			return p6_pmu_init();
+		case 0xb:
+			return knc_pmu_init();
 		case 0xf:
 			return p4_pmu_init();
 		}
diff --git a/arch/x86/kernel/cpu/perf_event_knc.c b/arch/x86/kernel/cpu/perf_event_knc.c
new file mode 100644
index 00000000000..7c46bfdbc37
--- /dev/null
+++ b/arch/x86/kernel/cpu/perf_event_knc.c
@@ -0,0 +1,248 @@
+/* Driver for Intel Xeon Phi "Knights Corner" PMU */
+
+#include <linux/perf_event.h>
+#include <linux/types.h>
+
+#include "perf_event.h"
+
+static const u64 knc_perfmon_event_map[] =
+{
+  [PERF_COUNT_HW_CPU_CYCLES]		= 0x002a,
+  [PERF_COUNT_HW_INSTRUCTIONS]		= 0x0016,
+  [PERF_COUNT_HW_CACHE_REFERENCES]	= 0x0028,
+  [PERF_COUNT_HW_CACHE_MISSES]		= 0x0029,
+  [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= 0x0012,
+  [PERF_COUNT_HW_BRANCH_MISSES]		= 0x002b,
+};
+
+static __initconst u64 knc_hw_cache_event_ids
+				[PERF_COUNT_HW_CACHE_MAX]
+				[PERF_COUNT_HW_CACHE_OP_MAX]
+				[PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+ [ C(L1D) ] = {
+	[ C(OP_READ) ] = {
+		/* On Xeon Phi event "0" is a valid DATA_READ          */
+		/*   (L1 Data Cache Reads) Instruction.                */
+		/* We code this as ARCH_PERFMON_EVENTSEL_INT as this   */
+		/* bit will always be set in x86_pmu_hw_config().      */
+		[ C(RESULT_ACCESS) ] = ARCH_PERFMON_EVENTSEL_INT,
+						/* DATA_READ           */
+		[ C(RESULT_MISS)   ] = 0x0003,	/* DATA_READ_MISS      */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0001,	/* DATA_WRITE          */
+		[ C(RESULT_MISS)   ] = 0x0004,	/* DATA_WRITE_MISS     */
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0011,	/* L1_DATA_PF1         */
+		[ C(RESULT_MISS)   ] = 0x001c,	/* L1_DATA_PF1_MISS    */
+	},
+ },
+ [ C(L1I ) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0x000c,	/* CODE_READ          */
+		[ C(RESULT_MISS)   ] = 0x000e,	/* CODE_CACHE_MISS    */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0,
+		[ C(RESULT_MISS)   ] = 0x0,
+	},
+ },
+ [ C(LL  ) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0,
+		[ C(RESULT_MISS)   ] = 0x10cb,	/* L2_READ_MISS */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = 0x10cc,	/* L2_WRITE_HIT */
+		[ C(RESULT_MISS)   ] = 0,
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = 0x10fc,	/* L2_DATA_PF2      */
+		[ C(RESULT_MISS)   ] = 0x10fe,	/* L2_DATA_PF2_MISS */
+	},
+ },
+ [ C(DTLB) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = ARCH_PERFMON_EVENTSEL_INT,
+						/* DATA_READ */
+						/* see note on L1 OP_READ */
+		[ C(RESULT_MISS)   ] = 0x0002,	/* DATA_PAGE_WALK */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0001,	/* DATA_WRITE */
+		[ C(RESULT_MISS)   ] = 0x0002,	/* DATA_PAGE_WALK */
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0,
+		[ C(RESULT_MISS)   ] = 0x0,
+	},
+ },
+ [ C(ITLB) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0x000c,	/* CODE_READ */
+		[ C(RESULT_MISS)   ] = 0x000d,	/* CODE_PAGE_WALK */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+ },
+ [ C(BPU ) ] = {
+	[ C(OP_READ) ] = {
+		[ C(RESULT_ACCESS) ] = 0x0012,	/* BRANCHES */
+		[ C(RESULT_MISS)   ] = 0x002b,	/* BRANCHES_MISPREDICTED */
+	},
+	[ C(OP_WRITE) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+	[ C(OP_PREFETCH) ] = {
+		[ C(RESULT_ACCESS) ] = -1,
+		[ C(RESULT_MISS)   ] = -1,
+	},
+ },
+};
+
+
+static u64 knc_pmu_event_map(int hw_event)
+{
+	return knc_perfmon_event_map[hw_event];
+}
+
+static struct event_constraint knc_event_constraints[] =
+{
+	INTEL_EVENT_CONSTRAINT(0xc3, 0x1),	/* HWP_L2HIT */
+	INTEL_EVENT_CONSTRAINT(0xc4, 0x1),	/* HWP_L2MISS */
+	INTEL_EVENT_CONSTRAINT(0xc8, 0x1),	/* L2_READ_HIT_E */
+	INTEL_EVENT_CONSTRAINT(0xc9, 0x1),	/* L2_READ_HIT_M */
+	INTEL_EVENT_CONSTRAINT(0xca, 0x1),	/* L2_READ_HIT_S */
+	INTEL_EVENT_CONSTRAINT(0xcb, 0x1),	/* L2_READ_MISS */
+	INTEL_EVENT_CONSTRAINT(0xcc, 0x1),	/* L2_WRITE_HIT */
+	INTEL_EVENT_CONSTRAINT(0xce, 0x1),	/* L2_STRONGLY_ORDERED_STREAMING_VSTORES_MISS */
+	INTEL_EVENT_CONSTRAINT(0xcf, 0x1),	/* L2_WEAKLY_ORDERED_STREAMING_VSTORE_MISS */
+	INTEL_EVENT_CONSTRAINT(0xd7, 0x1),	/* L2_VICTIM_REQ_WITH_DATA */
+	INTEL_EVENT_CONSTRAINT(0xe3, 0x1),	/* SNP_HITM_BUNIT */
+	INTEL_EVENT_CONSTRAINT(0xe6, 0x1),	/* SNP_HIT_L2 */
+	INTEL_EVENT_CONSTRAINT(0xe7, 0x1),	/* SNP_HITM_L2 */
+	INTEL_EVENT_CONSTRAINT(0xf1, 0x1),	/* L2_DATA_READ_MISS_CACHE_FILL */
+	INTEL_EVENT_CONSTRAINT(0xf2, 0x1),	/* L2_DATA_WRITE_MISS_CACHE_FILL */
+	INTEL_EVENT_CONSTRAINT(0xf6, 0x1),	/* L2_DATA_READ_MISS_MEM_FILL */
+	INTEL_EVENT_CONSTRAINT(0xf7, 0x1),	/* L2_DATA_WRITE_MISS_MEM_FILL */
+	INTEL_EVENT_CONSTRAINT(0xfc, 0x1),	/* L2_DATA_PF2 */
+	INTEL_EVENT_CONSTRAINT(0xfd, 0x1),	/* L2_DATA_PF2_DROP */
+	INTEL_EVENT_CONSTRAINT(0xfe, 0x1),	/* L2_DATA_PF2_MISS */
+	INTEL_EVENT_CONSTRAINT(0xff, 0x1),	/* L2_DATA_HIT_INFLIGHT_PF2 */
+	EVENT_CONSTRAINT_END
+};
+
+#define MSR_KNC_IA32_PERF_GLOBAL_STATUS		0x0000002d
+#define MSR_KNC_IA32_PERF_GLOBAL_OVF_CONTROL	0x0000002e
+#define MSR_KNC_IA32_PERF_GLOBAL_CTRL		0x0000002f
+
+#define KNC_ENABLE_COUNTER0			0x00000001
+#define KNC_ENABLE_COUNTER1			0x00000002
+
+static void knc_pmu_disable_all(void)
+{
+	u64 val;
+
+	rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);
+	val &= ~(KNC_ENABLE_COUNTER0|KNC_ENABLE_COUNTER1);
+	wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);
+}
+
+static void knc_pmu_enable_all(int added)
+{
+	u64 val;
+
+	rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);
+	val |= (KNC_ENABLE_COUNTER0|KNC_ENABLE_COUNTER1);
+	wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val);
+}
+
+static inline void
+knc_pmu_disable_event(struct perf_event *event)
+{
+	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+	struct hw_perf_event *hwc = &event->hw;
+	u64 val;
+
+	val = hwc->config;
+	if (cpuc->enabled)
+		val &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
+
+	(void)wrmsrl_safe(hwc->config_base + hwc->idx, val);
+}
+
+static void knc_pmu_enable_event(struct perf_event *event)
+{
+	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+	struct hw_perf_event *hwc = &event->hw;
+	u64 val;
+
+	val = hwc->config;
+	if (cpuc->enabled)
+		val |= ARCH_PERFMON_EVENTSEL_ENABLE;
+
+	(void)wrmsrl_safe(hwc->config_base + hwc->idx, val);
+}
+
+PMU_FORMAT_ATTR(event,	"config:0-7"	);
+PMU_FORMAT_ATTR(umask,	"config:8-15"	);
+PMU_FORMAT_ATTR(edge,	"config:18"	);
+PMU_FORMAT_ATTR(inv,	"config:23"	);
+PMU_FORMAT_ATTR(cmask,	"config:24-31"	);
+
+static struct attribute *intel_knc_formats_attr[] = {
+	&format_attr_event.attr,
+	&format_attr_umask.attr,
+	&format_attr_edge.attr,
+	&format_attr_inv.attr,
+	&format_attr_cmask.attr,
+	NULL,
+};
+
+static __initconst struct x86_pmu knc_pmu = {
+	.name			= "knc",
+	.handle_irq		= x86_pmu_handle_irq,
+	.disable_all		= knc_pmu_disable_all,
+	.enable_all		= knc_pmu_enable_all,
+	.enable			= knc_pmu_enable_event,
+	.disable		= knc_pmu_disable_event,
+	.hw_config		= x86_pmu_hw_config,
+	.schedule_events	= x86_schedule_events,
+	.eventsel		= MSR_KNC_EVNTSEL0,
+	.perfctr		= MSR_KNC_PERFCTR0,
+	.event_map		= knc_pmu_event_map,
+	.max_events             = ARRAY_SIZE(knc_perfmon_event_map),
+	.apic			= 1,
+	.max_period		= (1ULL << 31) - 1,
+	.version		= 0,
+	.num_counters		= 2,
+	/* in theory 40 bits, early silicon is buggy though */
+	.cntval_bits		= 32,
+	.cntval_mask		= (1ULL << 32) - 1,
+	.get_event_constraints	= x86_get_event_constraints,
+	.event_constraints	= knc_event_constraints,
+	.format_attrs		= intel_knc_formats_attr,
+};
+
+__init int knc_pmu_init(void)
+{
+	x86_pmu = knc_pmu;
+
+	memcpy(hw_cache_event_ids, knc_hw_cache_event_ids, 
+		sizeof(hw_cache_event_ids));
+
+	return 0;
+}
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index 966512b2cac..2e8caf03f59 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -56,6 +56,8 @@ static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr)
 		switch (boot_cpu_data.x86) {
 		case 6:
 			return msr - MSR_P6_PERFCTR0;
+		case 11:
+			return msr - MSR_KNC_PERFCTR0;
 		case 15:
 			return msr - MSR_P4_BPU_PERFCTR0;
 		}
@@ -82,6 +84,8 @@ static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr)
 		switch (boot_cpu_data.x86) {
 		case 6:
 			return msr - MSR_P6_EVNTSEL0;
+		case 11:
+			return msr - MSR_KNC_EVNTSEL0;
 		case 15:
 			return msr - MSR_P4_BSU_ESCR0;
 		}
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 0750e3ba87c..a1193aef6d7 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -299,6 +299,21 @@ ENTRY(ret_from_fork)
 	CFI_ENDPROC
 END(ret_from_fork)
 
+ENTRY(ret_from_kernel_thread)
+	CFI_STARTPROC
+	pushl_cfi %eax
+	call schedule_tail
+	GET_THREAD_INFO(%ebp)
+	popl_cfi %eax
+	pushl_cfi $0x0202		# Reset kernel eflags
+	popfl_cfi
+	movl PT_EBP(%esp),%eax
+	call *PT_EBX(%esp)
+	movl $0,PT_EAX(%esp)
+	jmp syscall_exit
+	CFI_ENDPROC
+ENDPROC(ret_from_kernel_thread)
+
 /*
  * Interrupt exit functions should be protected against kprobes
  */
@@ -323,8 +338,7 @@ ret_from_intr:
 	andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
 #else
 	/*
-	 * We can be coming here from a syscall done in the kernel space,
-	 * e.g. a failed kernel_execve().
+	 * We can be coming here from child spawned by kernel_thread().
 	 */
 	movl PT_CS(%esp), %eax
 	andl $SEGMENT_RPL_MASK, %eax
@@ -616,6 +630,10 @@ work_notifysig:				# deal with pending signals and
 	movl %esp, %eax
 	jne work_notifysig_v86		# returning to kernel-space or
 					# vm86-space
+1:
+#else
+	movl %esp, %eax
+#endif
 	TRACE_IRQS_ON
 	ENABLE_INTERRUPTS(CLBR_NONE)
 	movb PT_CS(%esp), %bl
@@ -626,24 +644,15 @@ work_notifysig:				# deal with pending signals and
 	call do_notify_resume
 	jmp resume_userspace
 
+#ifdef CONFIG_VM86
 	ALIGN
 work_notifysig_v86:
 	pushl_cfi %ecx			# save ti_flags for do_notify_resume
 	call save_v86_state		# %eax contains pt_regs pointer
 	popl_cfi %ecx
 	movl %eax, %esp
-#else
-	movl %esp, %eax
+	jmp 1b
 #endif
-	TRACE_IRQS_ON
-	ENABLE_INTERRUPTS(CLBR_NONE)
-	movb PT_CS(%esp), %bl
-	andb $SEGMENT_RPL_MASK, %bl
-	cmpb $USER_RPL, %bl
-	jb resume_kernel
-	xorl %edx, %edx
-	call do_notify_resume
-	jmp resume_userspace
 END(work_pending)
 
 	# perform syscall exit tracing
@@ -732,7 +741,6 @@ ENDPROC(ptregs_##name)
 PTREGSCALL1(iopl)
 PTREGSCALL0(fork)
 PTREGSCALL0(vfork)
-PTREGSCALL3(execve)
 PTREGSCALL2(sigaltstack)
 PTREGSCALL0(sigreturn)
 PTREGSCALL0(rt_sigreturn)
@@ -1015,16 +1023,6 @@ END(spurious_interrupt_bug)
  */
 	.popsection
 
-ENTRY(kernel_thread_helper)
-	pushl $0		# fake return address for unwinder
-	CFI_STARTPROC
-	movl %edi,%eax
-	call *%esi
-	call do_exit
-	ud2			# padding for call trace
-	CFI_ENDPROC
-ENDPROC(kernel_thread_helper)
-
 #ifdef CONFIG_XEN
 /* Xen doesn't set %esp to be precisely what the normal sysenter
    entrypoint expects, so fix it up before using the normal path. */
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 44531acd9a8..0c58952d64e 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -554,7 +554,7 @@ ENTRY(ret_from_fork)
 	RESTORE_REST
 
 	testl $3, CS-ARGOFFSET(%rsp)		# from kernel_thread?
-	jz   retint_restore_args
+	jz   1f
 
 	testl $_TIF_IA32, TI_flags(%rcx)	# 32-bit compat task needs IRET
 	jnz  int_ret_from_sys_call
@@ -562,6 +562,14 @@ ENTRY(ret_from_fork)
 	RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET
 	jmp ret_from_sys_call			# go to the SYSRET fastpath
 
+1:
+	subq $REST_SKIP, %rsp	# leave space for volatiles
+	CFI_ADJUST_CFA_OFFSET	REST_SKIP
+	movq %rbp, %rdi
+	call *%rbx
+	movl $0, RAX(%rsp)
+	RESTORE_REST
+	jmp int_ret_from_sys_call
 	CFI_ENDPROC
 END(ret_from_fork)
 
@@ -862,7 +870,6 @@ ENTRY(stub_execve)
 	PARTIAL_FRAME 0
 	SAVE_REST
 	FIXUP_TOP_OF_STACK %r11
-	movq %rsp, %rcx
 	call sys_execve
 	RESTORE_TOP_OF_STACK %r11
 	movq %rax,RAX(%rsp)
@@ -912,8 +919,7 @@ ENTRY(stub_x32_execve)
 	PARTIAL_FRAME 0
 	SAVE_REST
 	FIXUP_TOP_OF_STACK %r11
-	movq %rsp, %rcx
-	call sys32_execve
+	call compat_sys_execve
 	RESTORE_TOP_OF_STACK %r11
 	movq %rax,RAX(%rsp)
 	RESTORE_REST
@@ -1318,52 +1324,6 @@ bad_gs:
 	jmp  2b
 	.previous
 
-ENTRY(kernel_thread_helper)
-	pushq $0		# fake return address
-	CFI_STARTPROC
-	/*
-	 * Here we are in the child and the registers are set as they were
-	 * at kernel_thread() invocation in the parent.
-	 */
-	call *%rsi
-	# exit
-	mov %eax, %edi
-	call do_exit
-	ud2			# padding for call trace
-	CFI_ENDPROC
-END(kernel_thread_helper)
-
-/*
- * execve(). This function needs to use IRET, not SYSRET, to set up all state properly.
- *
- * C extern interface:
- *	 extern long execve(const char *name, char **argv, char **envp)
- *
- * asm input arguments:
- *	rdi: name, rsi: argv, rdx: envp
- *
- * We want to fallback into:
- *	extern long sys_execve(const char *name, char **argv,char **envp, struct pt_regs *regs)
- *
- * do_sys_execve asm fallback arguments:
- *	rdi: name, rsi: argv, rdx: envp, rcx: fake frame on the stack
- */
-ENTRY(kernel_execve)
-	CFI_STARTPROC
-	FAKE_STACK_FRAME $0
-	SAVE_ALL
-	movq %rsp,%rcx
-	call sys_execve
-	movq %rax, RAX(%rsp)
-	RESTORE_REST
-	testq %rax,%rax
-	je int_ret_from_sys_call
-	RESTORE_ARGS
-	UNFAKE_STACK_FRAME
-	ret
-	CFI_ENDPROC
-END(kernel_execve)
-
 /* Call softirq on interrupt stack. Interrupts are off. */
 ENTRY(call_softirq)
 	CFI_STARTPROC
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index 3f61904365c..836f8322960 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -746,7 +746,9 @@ void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long ip)
 int kgdb_arch_set_breakpoint(struct kgdb_bkpt *bpt)
 {
 	int err;
+#ifdef CONFIG_DEBUG_RODATA
 	char opc[BREAK_INSTR_SIZE];
+#endif /* CONFIG_DEBUG_RODATA */
 
 	bpt->type = BP_BREAKPOINT;
 	err = probe_kernel_read(bpt->saved_instr, (char *)bpt->bpt_addr,
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index dc3567e083f..b644e1c765d 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -293,71 +293,6 @@ sys_clone(unsigned long clone_flags, unsigned long newsp,
 }
 
 /*
- * This gets run with %si containing the
- * function to call, and %di containing
- * the "args".
- */
-extern void kernel_thread_helper(void);
-
-/*
- * Create a kernel thread
- */
-int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
-{
-	struct pt_regs regs;
-
-	memset(&regs, 0, sizeof(regs));
-
-	regs.si = (unsigned long) fn;
-	regs.di = (unsigned long) arg;
-
-#ifdef CONFIG_X86_32
-	regs.ds = __USER_DS;
-	regs.es = __USER_DS;
-	regs.fs = __KERNEL_PERCPU;
-	regs.gs = __KERNEL_STACK_CANARY;
-#else
-	regs.ss = __KERNEL_DS;
-#endif
-
-	regs.orig_ax = -1;
-	regs.ip = (unsigned long) kernel_thread_helper;
-	regs.cs = __KERNEL_CS | get_kernel_rpl();
-	regs.flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
-
-	/* Ok, create the new process.. */
-	return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
-}
-EXPORT_SYMBOL(kernel_thread);
-
-/*
- * sys_execve() executes a new program.
- */
-long sys_execve(const char __user *name,
-		const char __user *const __user *argv,
-		const char __user *const __user *envp, struct pt_regs *regs)
-{
-	long error;
-	char *filename;
-
-	filename = getname(name);
-	error = PTR_ERR(filename);
-	if (IS_ERR(filename))
-		return error;
-	error = do_execve(filename, argv, envp, regs);
-
-#ifdef CONFIG_X86_32
-	if (error == 0) {
-		/* Make sure we don't return using sysenter.. */
-                set_thread_flag(TIF_IRET);
-        }
-#endif
-
-	putname(filename);
-	return error;
-}
-
-/*
  * Idle related variables and functions
  */
 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index b9ff83c7135..44e0bff38e7 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -57,6 +57,7 @@
 #include <asm/switch_to.h>
 
 asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
+asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread");
 
 /*
  * Return saved PC of a blocked thread.
@@ -127,23 +128,39 @@ void release_thread(struct task_struct *dead_task)
 }
 
 int copy_thread(unsigned long clone_flags, unsigned long sp,
-	unsigned long unused,
+	unsigned long arg,
 	struct task_struct *p, struct pt_regs *regs)
 {
-	struct pt_regs *childregs;
+	struct pt_regs *childregs = task_pt_regs(p);
 	struct task_struct *tsk;
 	int err;
 
-	childregs = task_pt_regs(p);
+	p->thread.sp = (unsigned long) childregs;
+	p->thread.sp0 = (unsigned long) (childregs+1);
+
+	if (unlikely(!regs)) {
+		/* kernel thread */
+		memset(childregs, 0, sizeof(struct pt_regs));
+		p->thread.ip = (unsigned long) ret_from_kernel_thread;
+		task_user_gs(p) = __KERNEL_STACK_CANARY;
+		childregs->ds = __USER_DS;
+		childregs->es = __USER_DS;
+		childregs->fs = __KERNEL_PERCPU;
+		childregs->bx = sp;	/* function */
+		childregs->bp = arg;
+		childregs->orig_ax = -1;
+		childregs->cs = __KERNEL_CS | get_kernel_rpl();
+		childregs->flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
+		p->fpu_counter = 0;
+		p->thread.io_bitmap_ptr = NULL;
+		memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
+		return 0;
+	}
 	*childregs = *regs;
 	childregs->ax = 0;
 	childregs->sp = sp;
 
-	p->thread.sp = (unsigned long) childregs;
-	p->thread.sp0 = (unsigned long) (childregs+1);
-
 	p->thread.ip = (unsigned long) ret_from_fork;
-
 	task_user_gs(p) = get_user_gs(regs);
 
 	p->fpu_counter = 0;
@@ -190,6 +207,12 @@ start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 	regs->cs		= __USER_CS;
 	regs->ip		= new_ip;
 	regs->sp		= new_sp;
+	regs->flags		= X86_EFLAGS_IF;
+	/*
+	 * force it to the iret return path by making it look as if there was
+	 * some work pending.
+	 */
+	set_thread_flag(TIF_NOTIFY_RESUME);
 }
 EXPORT_SYMBOL_GPL(start_thread);
 
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 8a6d20ce197..16c6365e2b8 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -146,29 +146,18 @@ static inline u32 read_32bit_tls(struct task_struct *t, int tls)
 }
 
 int copy_thread(unsigned long clone_flags, unsigned long sp,
-		unsigned long unused,
+		unsigned long arg,
 	struct task_struct *p, struct pt_regs *regs)
 {
 	int err;
 	struct pt_regs *childregs;
 	struct task_struct *me = current;
 
-	childregs = ((struct pt_regs *)
-			(THREAD_SIZE + task_stack_page(p))) - 1;
-	*childregs = *regs;
-
-	childregs->ax = 0;
-	if (user_mode(regs))
-		childregs->sp = sp;
-	else
-		childregs->sp = (unsigned long)childregs;
-
+	p->thread.sp0 = (unsigned long)task_stack_page(p) + THREAD_SIZE;
+	childregs = task_pt_regs(p);
 	p->thread.sp = (unsigned long) childregs;
-	p->thread.sp0 = (unsigned long) (childregs+1);
 	p->thread.usersp = me->thread.usersp;
-
 	set_tsk_thread_flag(p, TIF_FORK);
-
 	p->fpu_counter = 0;
 	p->thread.io_bitmap_ptr = NULL;
 
@@ -178,6 +167,24 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
 	p->thread.fs = p->thread.fsindex ? 0 : me->thread.fs;
 	savesegment(es, p->thread.es);
 	savesegment(ds, p->thread.ds);
+	memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
+
+	if (unlikely(!regs)) {
+		/* kernel thread */
+		memset(childregs, 0, sizeof(struct pt_regs));
+		childregs->sp = (unsigned long)childregs;
+		childregs->ss = __KERNEL_DS;
+		childregs->bx = sp; /* function */
+		childregs->bp = arg;
+		childregs->orig_ax = -1;
+		childregs->cs = __KERNEL_CS | get_kernel_rpl();
+		childregs->flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
+		return 0;
+	}
+	*childregs = *regs;
+
+	childregs->ax = 0;
+	childregs->sp = sp;
 
 	err = -ENOMEM;
 	memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index d609be046b5..a2bb18e0283 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -68,6 +68,7 @@
 #include <linux/percpu.h>
 #include <linux/crash_dump.h>
 #include <linux/tboot.h>
+#include <linux/jiffies.h>
 
 #include <video/edid.h>
 
@@ -1032,6 +1033,8 @@ void __init setup_arch(char **cmdline_p)
 	mcheck_init();
 
 	arch_init_ideal_nops();
+
+	register_refined_jiffies(CLOCK_TICK_RATE);
 }
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index b33144c8b30..29ad351804e 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -840,10 +840,6 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
 	if (thread_info_flags & _TIF_USER_RETURN_NOTIFY)
 		fire_user_return_notifiers();
 
-#ifdef CONFIG_X86_32
-	clear_thread_flag(TIF_IRET);
-#endif /* CONFIG_X86_32 */
-
 	rcu_user_enter();
 }
 
diff --git a/arch/x86/kernel/sys_i386_32.c b/arch/x86/kernel/sys_i386_32.c
deleted file mode 100644
index 0b0cb5fede1..00000000000
--- a/arch/x86/kernel/sys_i386_32.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file contains various random system calls that
- * have a non-standard calling sequence on the Linux/i386
- * platform.
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/fs.h>
-#include <linux/smp.h>
-#include <linux/sem.h>
-#include <linux/msg.h>
-#include <linux/shm.h>
-#include <linux/stat.h>
-#include <linux/syscalls.h>
-#include <linux/mman.h>
-#include <linux/file.h>
-#include <linux/utsname.h>
-#include <linux/ipc.h>
-
-#include <linux/uaccess.h>
-#include <linux/unistd.h>
-
-#include <asm/syscalls.h>
-
-/*
- * Do a system call from kernel instead of calling sys_execve so we
- * end up with proper pt_regs.
- */
-int kernel_execve(const char *filename,
-		  const char *const argv[],
-		  const char *const envp[])
-{
-	long __res;
-	asm volatile ("int $0x80"
-	: "=a" (__res)
-	: "0" (__NR_execve), "b" (filename), "c" (argv), "d" (envp) : "memory");
-	return __res;
-}
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index 54abcc0baf2..5c9687b1bde 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -561,9 +561,9 @@ int handle_vm86_trap(struct kernel_vm86_regs *regs, long error_code, int trapno)
 		if ((trapno == 3) || (trapno == 1)) {
 			KVM86->regs32->ax = VM86_TRAP + (trapno << 8);
 			/* setting this flag forces the code in entry_32.S to
-			   call save_v86_state() and change the stack pointer
-			   to KVM86->regs32 */
-			set_thread_flag(TIF_IRET);
+			   the path where we call save_v86_state() and change
+			   the stack pointer to KVM86->regs32 */
+			set_thread_flag(TIF_NOTIFY_RESUME);
 			return 0;
 		}
 		do_int(regs, trapno, (unsigned char __user *) (regs->pt.ss << 4), SP(regs));
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 8d141b30904..3a3e8c9e280 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -28,7 +28,7 @@
 #include <linux/jiffies.h>
 #include <linux/sysctl.h>
 #include <linux/topology.h>
-#include <linux/clocksource.h>
+#include <linux/timekeeper_internal.h>
 #include <linux/getcpu.h>
 #include <linux/cpu.h>
 #include <linux/smp.h>
@@ -82,32 +82,41 @@ void update_vsyscall_tz(void)
 	vsyscall_gtod_data.sys_tz = sys_tz;
 }
 
-void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
-			struct clocksource *clock, u32 mult)
+void update_vsyscall(struct timekeeper *tk)
 {
-	struct timespec monotonic;
+	struct vsyscall_gtod_data *vdata = &vsyscall_gtod_data;
 
-	write_seqcount_begin(&vsyscall_gtod_data.seq);
+	write_seqcount_begin(&vdata->seq);
 
 	/* copy vsyscall data */
-	vsyscall_gtod_data.clock.vclock_mode	= clock->archdata.vclock_mode;
-	vsyscall_gtod_data.clock.cycle_last	= clock->cycle_last;
-	vsyscall_gtod_data.clock.mask		= clock->mask;
-	vsyscall_gtod_data.clock.mult		= mult;
-	vsyscall_gtod_data.clock.shift		= clock->shift;
-
-	vsyscall_gtod_data.wall_time_sec	= wall_time->tv_sec;
-	vsyscall_gtod_data.wall_time_nsec	= wall_time->tv_nsec;
+	vdata->clock.vclock_mode	= tk->clock->archdata.vclock_mode;
+	vdata->clock.cycle_last		= tk->clock->cycle_last;
+	vdata->clock.mask		= tk->clock->mask;
+	vdata->clock.mult		= tk->mult;
+	vdata->clock.shift		= tk->shift;
+
+	vdata->wall_time_sec		= tk->xtime_sec;
+	vdata->wall_time_snsec		= tk->xtime_nsec;
+
+	vdata->monotonic_time_sec	= tk->xtime_sec
+					+ tk->wall_to_monotonic.tv_sec;
+	vdata->monotonic_time_snsec	= tk->xtime_nsec
+					+ (tk->wall_to_monotonic.tv_nsec
+						<< tk->shift);
+	while (vdata->monotonic_time_snsec >=
+					(((u64)NSEC_PER_SEC) << tk->shift)) {
+		vdata->monotonic_time_snsec -=
+					((u64)NSEC_PER_SEC) << tk->shift;
+		vdata->monotonic_time_sec++;
+	}
 
-	monotonic = timespec_add(*wall_time, *wtm);
-	vsyscall_gtod_data.monotonic_time_sec	= monotonic.tv_sec;
-	vsyscall_gtod_data.monotonic_time_nsec	= monotonic.tv_nsec;
+	vdata->wall_time_coarse.tv_sec	= tk->xtime_sec;
+	vdata->wall_time_coarse.tv_nsec	= (long)(tk->xtime_nsec >> tk->shift);
 
-	vsyscall_gtod_data.wall_time_coarse	= __current_kernel_time();
-	vsyscall_gtod_data.monotonic_time_coarse =
-		timespec_add(vsyscall_gtod_data.wall_time_coarse, *wtm);
+	vdata->monotonic_time_coarse	= timespec_add(vdata->wall_time_coarse,
+							tk->wall_to_monotonic);
 
-	write_seqcount_end(&vsyscall_gtod_data.seq);
+	write_seqcount_end(&vdata->seq);
 }
 
 static void warn_bad_vsyscall(const char *level, struct pt_regs *regs,
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index a530b230e7d..8e13ecb41be 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -1220,6 +1220,7 @@ good_area:
 			/* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk
 			 * of starvation. */
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 			goto retry;
 		}
 	}
diff --git a/arch/x86/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c
index b91e4851242..937bff5cdaa 100644
--- a/arch/x86/mm/hugetlbpage.c
+++ b/arch/x86/mm/hugetlbpage.c
@@ -71,7 +71,6 @@ huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud)
 	struct address_space *mapping = vma->vm_file->f_mapping;
 	pgoff_t idx = ((addr - vma->vm_start) >> PAGE_SHIFT) +
 			vma->vm_pgoff;
-	struct prio_tree_iter iter;
 	struct vm_area_struct *svma;
 	unsigned long saddr;
 	pte_t *spte = NULL;
@@ -81,7 +80,7 @@ huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud)
 		return (pte_t *)pmd_alloc(mm, pud, addr);
 
 	mutex_lock(&mapping->i_mmap_mutex);
-	vma_prio_tree_foreach(svma, &iter, &mapping->i_mmap, idx, idx) {
+	vma_interval_tree_foreach(svma, &mapping->i_mmap, idx, idx) {
 		if (svma == vma)
 			continue;
 
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c
index 3d68ef6d226..0eb572eda40 100644
--- a/arch/x86/mm/pat.c
+++ b/arch/x86/mm/pat.c
@@ -664,20 +664,20 @@ static void free_pfn_range(u64 paddr, unsigned long size)
 }
 
 /*
- * track_pfn_vma_copy is called when vma that is covering the pfnmap gets
+ * track_pfn_copy is called when vma that is covering the pfnmap gets
  * copied through copy_page_range().
  *
  * If the vma has a linear pfn mapping for the entire range, we get the prot
  * from pte and reserve the entire vma range with single reserve_pfn_range call.
  */
-int track_pfn_vma_copy(struct vm_area_struct *vma)
+int track_pfn_copy(struct vm_area_struct *vma)
 {
 	resource_size_t paddr;
 	unsigned long prot;
 	unsigned long vma_size = vma->vm_end - vma->vm_start;
 	pgprot_t pgprot;
 
-	if (is_linear_pfn_mapping(vma)) {
+	if (vma->vm_flags & VM_PAT) {
 		/*
 		 * reserve the whole chunk covered by vma. We need the
 		 * starting address and protection from pte.
@@ -694,31 +694,59 @@ int track_pfn_vma_copy(struct vm_area_struct *vma)
 }
 
 /*
- * track_pfn_vma_new is called when a _new_ pfn mapping is being established
- * for physical range indicated by pfn and size.
- *
  * prot is passed in as a parameter for the new mapping. If the vma has a
  * linear pfn mapping for the entire range reserve the entire vma range with
  * single reserve_pfn_range call.
  */
-int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t *prot,
-			unsigned long pfn, unsigned long size)
+int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
+		    unsigned long pfn, unsigned long addr, unsigned long size)
 {
+	resource_size_t paddr = (resource_size_t)pfn << PAGE_SHIFT;
 	unsigned long flags;
-	resource_size_t paddr;
-	unsigned long vma_size = vma->vm_end - vma->vm_start;
 
-	if (is_linear_pfn_mapping(vma)) {
-		/* reserve the whole chunk starting from vm_pgoff */
-		paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT;
-		return reserve_pfn_range(paddr, vma_size, prot, 0);
+	/* reserve the whole chunk starting from paddr */
+	if (addr == vma->vm_start && size == (vma->vm_end - vma->vm_start)) {
+		int ret;
+
+		ret = reserve_pfn_range(paddr, size, prot, 0);
+		if (!ret)
+			vma->vm_flags |= VM_PAT;
+		return ret;
 	}
 
 	if (!pat_enabled)
 		return 0;
 
-	/* for vm_insert_pfn and friends, we set prot based on lookup */
-	flags = lookup_memtype(pfn << PAGE_SHIFT);
+	/*
+	 * For anything smaller than the vma size we set prot based on the
+	 * lookup.
+	 */
+	flags = lookup_memtype(paddr);
+
+	/* Check memtype for the remaining pages */
+	while (size > PAGE_SIZE) {
+		size -= PAGE_SIZE;
+		paddr += PAGE_SIZE;
+		if (flags != lookup_memtype(paddr))
+			return -EINVAL;
+	}
+
+	*prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) |
+			 flags);
+
+	return 0;
+}
+
+int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
+		     unsigned long pfn)
+{
+	unsigned long flags;
+
+	if (!pat_enabled)
+		return 0;
+
+	/* Set prot based on lookup */
+	flags = lookup_memtype((resource_size_t)pfn << PAGE_SHIFT);
 	*prot = __pgprot((pgprot_val(vma->vm_page_prot) & (~_PAGE_CACHE_MASK)) |
 			 flags);
 
@@ -726,22 +754,31 @@ int track_pfn_vma_new(struct vm_area_struct *vma, pgprot_t *prot,
 }
 
 /*
- * untrack_pfn_vma is called while unmapping a pfnmap for a region.
+ * untrack_pfn is called while unmapping a pfnmap for a region.
  * untrack can be called for a specific region indicated by pfn and size or
- * can be for the entire vma (in which case size can be zero).
+ * can be for the entire vma (in which case pfn, size are zero).
  */
-void untrack_pfn_vma(struct vm_area_struct *vma, unsigned long pfn,
-			unsigned long size)
+void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
+		 unsigned long size)
 {
 	resource_size_t paddr;
-	unsigned long vma_size = vma->vm_end - vma->vm_start;
+	unsigned long prot;
 
-	if (is_linear_pfn_mapping(vma)) {
-		/* free the whole chunk starting from vm_pgoff */
-		paddr = (resource_size_t)vma->vm_pgoff << PAGE_SHIFT;
-		free_pfn_range(paddr, vma_size);
+	if (!(vma->vm_flags & VM_PAT))
 		return;
+
+	/* free the chunk starting from pfn or the whole chunk */
+	paddr = (resource_size_t)pfn << PAGE_SHIFT;
+	if (!paddr && !size) {
+		if (follow_phys(vma, vma->vm_start, 0, &prot, &paddr)) {
+			WARN_ON_ONCE(1);
+			return;
+		}
+
+		size = vma->vm_end - vma->vm_start;
 	}
+	free_pfn_range(paddr, size);
+	vma->vm_flags &= ~VM_PAT;
 }
 
 pgprot_t pgprot_writecombine(pgprot_t prot)
diff --git a/arch/x86/mm/pat_rbtree.c b/arch/x86/mm/pat_rbtree.c
index 8acaddd0fb2..415f6c4ced3 100644
--- a/arch/x86/mm/pat_rbtree.c
+++ b/arch/x86/mm/pat_rbtree.c
@@ -12,7 +12,7 @@
 #include <linux/debugfs.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/rbtree.h>
+#include <linux/rbtree_augmented.h>
 #include <linux/sched.h>
 #include <linux/gfp.h>
 
@@ -54,29 +54,24 @@ static u64 get_subtree_max_end(struct rb_node *node)
 	return ret;
 }
 
-/* Update 'subtree_max_end' for a node, based on node and its children */
-static void memtype_rb_augment_cb(struct rb_node *node, void *__unused)
+static u64 compute_subtree_max_end(struct memtype *data)
 {
-	struct memtype *data;
-	u64 max_end, child_max_end;
-
-	if (!node)
-		return;
+	u64 max_end = data->end, child_max_end;
 
-	data = container_of(node, struct memtype, rb);
-	max_end = data->end;
-
-	child_max_end = get_subtree_max_end(node->rb_right);
+	child_max_end = get_subtree_max_end(data->rb.rb_right);
 	if (child_max_end > max_end)
 		max_end = child_max_end;
 
-	child_max_end = get_subtree_max_end(node->rb_left);
+	child_max_end = get_subtree_max_end(data->rb.rb_left);
 	if (child_max_end > max_end)
 		max_end = child_max_end;
 
-	data->subtree_max_end = max_end;
+	return max_end;
 }
 
+RB_DECLARE_CALLBACKS(static, memtype_rb_augment_cb, struct memtype, rb,
+		     u64, subtree_max_end, compute_subtree_max_end)
+
 /* Find the first (lowest start addr) overlapping range from rb tree */
 static struct memtype *memtype_rb_lowest_match(struct rb_root *root,
 				u64 start, u64 end)
@@ -179,15 +174,17 @@ static void memtype_rb_insert(struct rb_root *root, struct memtype *newdata)
 		struct memtype *data = container_of(*node, struct memtype, rb);
 
 		parent = *node;
+		if (data->subtree_max_end < newdata->end)
+			data->subtree_max_end = newdata->end;
 		if (newdata->start <= data->start)
 			node = &((*node)->rb_left);
 		else if (newdata->start > data->start)
 			node = &((*node)->rb_right);
 	}
 
+	newdata->subtree_max_end = newdata->end;
 	rb_link_node(&newdata->rb, parent, node);
-	rb_insert_color(&newdata->rb, root);
-	rb_augment_insert(&newdata->rb, memtype_rb_augment_cb, NULL);
+	rb_insert_augmented(&newdata->rb, root, &memtype_rb_augment_cb);
 }
 
 int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type)
@@ -209,16 +206,13 @@ int rbt_memtype_check_insert(struct memtype *new, unsigned long *ret_type)
 
 struct memtype *rbt_memtype_erase(u64 start, u64 end)
 {
-	struct rb_node *deepest;
 	struct memtype *data;
 
 	data = memtype_rb_exact_match(&memtype_rbroot, start, end);
 	if (!data)
 		goto out;
 
-	deepest = rb_augment_erase_begin(&data->rb);
-	rb_erase(&data->rb, &memtype_rbroot);
-	rb_augment_erase_end(deepest, memtype_rb_augment_cb, NULL);
+	rb_erase_augmented(&data->rb, &memtype_rbroot, &memtype_rb_augment_cb);
 out:
 	return data;
 }
diff --git a/arch/x86/syscalls/syscall_32.tbl b/arch/x86/syscalls/syscall_32.tbl
index 7a35a6e71d4..a47103fbc69 100644
--- a/arch/x86/syscalls/syscall_32.tbl
+++ b/arch/x86/syscalls/syscall_32.tbl
@@ -17,7 +17,7 @@
 8	i386	creat			sys_creat
 9	i386	link			sys_link
 10	i386	unlink			sys_unlink
-11	i386	execve			ptregs_execve			stub32_execve
+11	i386	execve			sys_execve			stub32_execve
 12	i386	chdir			sys_chdir
 13	i386	time			sys_time			compat_sys_time
 14	i386	mknod			sys_mknod
diff --git a/arch/x86/um/Kconfig b/arch/x86/um/Kconfig
index aeaff8bef2f..07611759ce3 100644
--- a/arch/x86/um/Kconfig
+++ b/arch/x86/um/Kconfig
@@ -13,6 +13,8 @@ endmenu
 config UML_X86
 	def_bool y
 	select GENERIC_FIND_FIRST_BIT
+	select GENERIC_KERNEL_THREAD
+	select GENERIC_KERNEL_EXECVE
 
 config 64BIT
 	bool "64-bit kernel" if SUBARCH = "x86"
@@ -22,9 +24,11 @@ config X86_32
 	def_bool !64BIT
 	select HAVE_AOUT
 	select ARCH_WANT_IPC_PARSE_VERSION
+	select MODULES_USE_ELF_REL
 
 config X86_64
 	def_bool 64BIT
+	select MODULES_USE_ELF_RELA
 
 config RWSEM_XCHGADD_ALGORITHM
 	def_bool X86_XADD && 64BIT
diff --git a/arch/x86/um/asm/checksum.h b/arch/x86/um/asm/checksum.h
index b6efe2381b5..4b181b74454 100644
--- a/arch/x86/um/asm/checksum.h
+++ b/arch/x86/um/asm/checksum.h
@@ -1,6 +1,150 @@
 #ifndef __UM_CHECKSUM_H
 #define __UM_CHECKSUM_H
 
+#include <linux/string.h>
+#include <linux/in6.h>
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+extern __wsum csum_partial(const void *buff, int len, __wsum sum);
+
+/*
+ *	Note: when you get a NULL pointer exception here this means someone
+ *	passed in an incorrect kernel address to one of these functions.
+ *
+ *	If you use these functions directly please don't forget the
+ *	access_ok().
+ */
+
+static __inline__
+__wsum csum_partial_copy_nocheck(const void *src, void *dst,
+				       int len, __wsum sum)
+{
+	memcpy(dst, src, len);
+	return csum_partial(dst, len, sum);
+}
+
+/*
+ * the same as csum_partial, but copies from src while it
+ * checksums, and handles user-space pointer exceptions correctly, when needed.
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+
+static __inline__
+__wsum csum_partial_copy_from_user(const void __user *src, void *dst,
+					 int len, __wsum sum, int *err_ptr)
+{
+	if (copy_from_user(dst, src, len)) {
+		*err_ptr = -EFAULT;
+		return (__force __wsum)-1;
+	}
+
+	return csum_partial(dst, len, sum);
+}
+
+/**
+ * csum_fold - Fold and invert a 32bit checksum.
+ * sum: 32bit unfolded sum
+ *
+ * Fold a 32bit running checksum to 16bit and invert it. This is usually
+ * the last step before putting a checksum into a packet.
+ * Make sure not to mix with 64bit checksums.
+ */
+static inline __sum16 csum_fold(__wsum sum)
+{
+	__asm__(
+		"  addl %1,%0\n"
+		"  adcl $0xffff,%0"
+		: "=r" (sum)
+		: "r" ((__force u32)sum << 16),
+		  "0" ((__force u32)sum & 0xffff0000)
+	);
+	return (__force __sum16)(~(__force u32)sum >> 16);
+}
+
+/**
+ * csum_tcpup_nofold - Compute an IPv4 pseudo header checksum.
+ * @saddr: source address
+ * @daddr: destination address
+ * @len: length of packet
+ * @proto: ip protocol of packet
+ * @sum: initial sum to be added in (32bit unfolded)
+ *
+ * Returns the pseudo header checksum the input data. Result is
+ * 32bit unfolded.
+ */
+static inline __wsum
+csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
+		   unsigned short proto, __wsum sum)
+{
+	asm("  addl %1, %0\n"
+	    "  adcl %2, %0\n"
+	    "  adcl %3, %0\n"
+	    "  adcl $0, %0\n"
+		: "=r" (sum)
+	    : "g" (daddr), "g" (saddr), "g" ((len + proto) << 8), "0" (sum));
+	return sum;
+}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
+					   unsigned short len,
+					   unsigned short proto,
+					   __wsum sum)
+{
+	return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
+}
+
+/**
+ * ip_fast_csum - Compute the IPv4 header checksum efficiently.
+ * iph: ipv4 header
+ * ihl: length of header / 4
+ */
+static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+{
+	unsigned int sum;
+
+	asm(	"  movl (%1), %0\n"
+		"  subl $4, %2\n"
+		"  jbe 2f\n"
+		"  addl 4(%1), %0\n"
+		"  adcl 8(%1), %0\n"
+		"  adcl 12(%1), %0\n"
+		"1: adcl 16(%1), %0\n"
+		"  lea 4(%1), %1\n"
+		"  decl %2\n"
+		"  jne	1b\n"
+		"  adcl $0, %0\n"
+		"  movl %0, %2\n"
+		"  shrl $16, %0\n"
+		"  addw %w2, %w0\n"
+		"  adcl $0, %0\n"
+		"  notl %0\n"
+		"2:"
+	/* Since the input registers which are loaded with iph and ipl
+	   are modified, we must also specify them as outputs, or gcc
+	   will assume they contain their original values. */
+	: "=r" (sum), "=r" (iph), "=r" (ihl)
+	: "1" (iph), "2" (ihl)
+	: "memory");
+	return (__force __sum16)sum;
+}
+
 #ifdef CONFIG_X86_32
 # include "checksum_32.h"
 #else
diff --git a/arch/x86/um/asm/checksum_32.h b/arch/x86/um/asm/checksum_32.h
index caab74252e2..ab77b6f9a4b 100644
--- a/arch/x86/um/asm/checksum_32.h
+++ b/arch/x86/um/asm/checksum_32.h
@@ -5,145 +5,6 @@
 #ifndef __UM_SYSDEP_CHECKSUM_H
 #define __UM_SYSDEP_CHECKSUM_H
 
-#include "linux/in6.h"
-#include "linux/string.h"
-
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * returns a 32-bit number suitable for feeding into itself
- * or csum_tcpudp_magic
- *
- * this function must be called with even lengths, except
- * for the last fragment, which may be odd
- *
- * it's best to have buff aligned on a 32-bit boundary
- */
-__wsum csum_partial(const void *buff, int len, __wsum sum);
-
-/*
- *	Note: when you get a NULL pointer exception here this means someone
- *	passed in an incorrect kernel address to one of these functions.
- *
- *	If you use these functions directly please don't forget the
- *	access_ok().
- */
-
-static __inline__
-__wsum csum_partial_copy_nocheck(const void *src, void *dst,
-				       int len, __wsum sum)
-{
-	memcpy(dst, src, len);
-	return csum_partial(dst, len, sum);
-}
-
-/*
- * the same as csum_partial, but copies from src while it
- * checksums, and handles user-space pointer exceptions correctly, when needed.
- *
- * here even more important to align src and dst on a 32-bit (or even
- * better 64-bit) boundary
- */
-
-static __inline__
-__wsum csum_partial_copy_from_user(const void __user *src, void *dst,
-					 int len, __wsum sum, int *err_ptr)
-{
-	if (copy_from_user(dst, src, len)) {
-		*err_ptr = -EFAULT;
-		return (__force __wsum)-1;
-	}
-
-	return csum_partial(dst, len, sum);
-}
-
-/*
- *	This is a version of ip_compute_csum() optimized for IP headers,
- *	which always checksum on 4 octet boundaries.
- *
- *	By Jorge Cwik <jorge@laser.satlink.net>, adapted for linux by
- *	Arnt Gulbrandsen.
- */
-static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
-{
-	unsigned int sum;
-
-	__asm__ __volatile__(
-	    "movl (%1), %0	;\n"
-	    "subl $4, %2	;\n"
-	    "jbe 2f		;\n"
-	    "addl 4(%1), %0	;\n"
-	    "adcl 8(%1), %0	;\n"
-	    "adcl 12(%1), %0	;\n"
-"1:	    adcl 16(%1), %0	;\n"
-	    "lea 4(%1), %1	;\n"
-	    "decl %2		;\n"
-	    "jne 1b		;\n"
-	    "adcl $0, %0	;\n"
-	    "movl %0, %2	;\n"
-	    "shrl $16, %0	;\n"
-	    "addw %w2, %w0	;\n"
-	    "adcl $0, %0	;\n"
-	    "notl %0		;\n"
-"2:				;\n"
-	/* Since the input registers which are loaded with iph and ipl
-	   are modified, we must also specify them as outputs, or gcc
-	   will assume they contain their original values. */
-	: "=r" (sum), "=r" (iph), "=r" (ihl)
-	: "1" (iph), "2" (ihl)
-	: "memory");
-	return (__force __sum16)sum;
-}
-
-/*
- *	Fold a partial checksum
- */
-
-static inline __sum16 csum_fold(__wsum sum)
-{
-	__asm__(
-		"addl %1, %0		;\n"
-		"adcl $0xffff, %0	;\n"
-		: "=r" (sum)
-		: "r" ((__force u32)sum << 16),
-		  "0" ((__force u32)sum & 0xffff0000)
-	);
-	return (__force __sum16)(~(__force u32)sum >> 16);
-}
-
-static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
-						   unsigned short len,
-						   unsigned short proto,
-						   __wsum sum)
-{
-    __asm__(
-	"addl %1, %0	;\n"
-	"adcl %2, %0	;\n"
-	"adcl %3, %0	;\n"
-	"adcl $0, %0	;\n"
-	: "=r" (sum)
-	: "g" (daddr), "g"(saddr), "g"((len + proto) << 8), "0"(sum));
-    return sum;
-}
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
-						   unsigned short len,
-						   unsigned short proto,
-						   __wsum sum)
-{
-	return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
-}
-
-/*
- * this routine is used for miscellaneous IP-like checksums, mainly
- * in icmp.c
- */
-
 static inline __sum16 ip_compute_csum(const void *buff, int len)
 {
     return csum_fold (csum_partial(buff, len, 0));
@@ -198,4 +59,3 @@ static __inline__ __wsum csum_and_copy_to_user(const void *src,
 }
 
 #endif
-
diff --git a/arch/x86/um/asm/checksum_64.h b/arch/x86/um/asm/checksum_64.h
index a5be9031ea8..7b6cd192157 100644
--- a/arch/x86/um/asm/checksum_64.h
+++ b/arch/x86/um/asm/checksum_64.h
@@ -5,131 +5,6 @@
 #ifndef __UM_SYSDEP_CHECKSUM_H
 #define __UM_SYSDEP_CHECKSUM_H
 
-#include "linux/string.h"
-#include "linux/in6.h"
-#include "asm/uaccess.h"
-
-extern __wsum csum_partial(const void *buff, int len, __wsum sum);
-
-/*
- *	Note: when you get a NULL pointer exception here this means someone
- *	passed in an incorrect kernel address to one of these functions.
- *
- *	If you use these functions directly please don't forget the
- *	access_ok().
- */
-
-static __inline__
-__wsum csum_partial_copy_nocheck(const void *src, void *dst,
-				       int len, __wsum sum)
-{
-	memcpy(dst, src, len);
-	return(csum_partial(dst, len, sum));
-}
-
-static __inline__
-__wsum csum_partial_copy_from_user(const void __user *src,
-                                         void *dst, int len, __wsum sum,
-                                         int *err_ptr)
-{
-        if (copy_from_user(dst, src, len)) {
-                *err_ptr = -EFAULT;
-                return (__force __wsum)-1;
-        }
-        return csum_partial(dst, len, sum);
-}
-
-/**
- * csum_fold - Fold and invert a 32bit checksum.
- * sum: 32bit unfolded sum
- *
- * Fold a 32bit running checksum to 16bit and invert it. This is usually
- * the last step before putting a checksum into a packet.
- * Make sure not to mix with 64bit checksums.
- */
-static inline __sum16 csum_fold(__wsum sum)
-{
-	__asm__(
-		"  addl %1,%0\n"
-		"  adcl $0xffff,%0"
-		: "=r" (sum)
-		: "r" ((__force u32)sum << 16),
-		  "0" ((__force u32)sum & 0xffff0000)
-	);
-	return (__force __sum16)(~(__force u32)sum >> 16);
-}
-
-/**
- * csum_tcpup_nofold - Compute an IPv4 pseudo header checksum.
- * @saddr: source address
- * @daddr: destination address
- * @len: length of packet
- * @proto: ip protocol of packet
- * @sum: initial sum to be added in (32bit unfolded)
- *
- * Returns the pseudo header checksum the input data. Result is
- * 32bit unfolded.
- */
-static inline __wsum
-csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len,
-		   unsigned short proto, __wsum sum)
-{
-	asm("  addl %1, %0\n"
-	    "  adcl %2, %0\n"
-	    "  adcl %3, %0\n"
-	    "  adcl $0, %0\n"
-		: "=r" (sum)
-	    : "g" (daddr), "g" (saddr), "g" ((len + proto) << 8), "0" (sum));
-	return sum;
-}
-
-/*
- * computes the checksum of the TCP/UDP pseudo-header
- * returns a 16-bit checksum, already complemented
- */
-static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
-					   unsigned short len,
-					   unsigned short proto,
-					   __wsum sum)
-{
-	return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
-}
-
-/**
- * ip_fast_csum - Compute the IPv4 header checksum efficiently.
- * iph: ipv4 header
- * ihl: length of header / 4
- */
-static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
-{
-	unsigned int sum;
-
-	asm(	"  movl (%1), %0\n"
-		"  subl $4, %2\n"
-		"  jbe 2f\n"
-		"  addl 4(%1), %0\n"
-		"  adcl 8(%1), %0\n"
-		"  adcl 12(%1), %0\n"
-		"1: adcl 16(%1), %0\n"
-		"  lea 4(%1), %1\n"
-		"  decl %2\n"
-		"  jne	1b\n"
-		"  adcl $0, %0\n"
-		"  movl %0, %2\n"
-		"  shrl $16, %0\n"
-		"  addw %w2, %w0\n"
-		"  adcl $0, %0\n"
-		"  notl %0\n"
-		"2:"
-	/* Since the input registers which are loaded with iph and ipl
-	   are modified, we must also specify them as outputs, or gcc
-	   will assume they contain their original values. */
-	: "=r" (sum), "=r" (iph), "=r" (ihl)
-	: "1" (iph), "2" (ihl)
-	: "memory");
-	return (__force __sum16)sum;
-}
-
 static inline unsigned add32_with_carry(unsigned a, unsigned b)
 {
         asm("addl %2,%0\n\t"
diff --git a/arch/x86/um/asm/elf.h b/arch/x86/um/asm/elf.h
index 0e07adc8cbe..0feee2fd507 100644
--- a/arch/x86/um/asm/elf.h
+++ b/arch/x86/um/asm/elf.h
@@ -6,7 +6,7 @@
 #define __UM_ELF_X86_H
 
 #include <asm/user.h>
-#include "skas.h"
+#include <skas.h>
 
 #ifdef CONFIG_X86_32
 
diff --git a/arch/x86/um/asm/ptrace.h b/arch/x86/um/asm/ptrace.h
index e72cd0df5ba..755133258c4 100644
--- a/arch/x86/um/asm/ptrace.h
+++ b/arch/x86/um/asm/ptrace.h
@@ -1,11 +1,13 @@
 #ifndef __UM_X86_PTRACE_H
 #define __UM_X86_PTRACE_H
 
-#ifdef CONFIG_X86_32
-# include "ptrace_32.h"
-#else
-# include "ptrace_64.h"
+#include <linux/compiler.h>
+#ifndef CONFIG_X86_32
+#define __FRAME_OFFSETS /* Needed to get the R* macros */
 #endif
+#include <asm/ptrace-generic.h>
+
+#define user_mode(r) UPT_IS_USER(&(r)->regs)
 
 #define PT_REGS_AX(r) UPT_AX(&(r)->regs)
 #define PT_REGS_BX(r) UPT_BX(&(r)->regs)
@@ -36,4 +38,52 @@ static inline long regs_return_value(struct pt_regs *regs)
 {
 	return PT_REGS_AX(regs);
 }
+
+/*
+ * Forward declaration to avoid including sysdep/tls.h, which causes a
+ * circular include, and compilation failures.
+ */
+struct user_desc;
+
+#ifdef CONFIG_X86_32
+
+#define HOST_AUDIT_ARCH AUDIT_ARCH_I386
+
+extern int ptrace_get_thread_area(struct task_struct *child, int idx,
+                                  struct user_desc __user *user_desc);
+
+extern int ptrace_set_thread_area(struct task_struct *child, int idx,
+                                  struct user_desc __user *user_desc);
+
+#else
+
+#define HOST_AUDIT_ARCH AUDIT_ARCH_X86_64
+
+#define PT_REGS_R8(r) UPT_R8(&(r)->regs)
+#define PT_REGS_R9(r) UPT_R9(&(r)->regs)
+#define PT_REGS_R10(r) UPT_R10(&(r)->regs)
+#define PT_REGS_R11(r) UPT_R11(&(r)->regs)
+#define PT_REGS_R12(r) UPT_R12(&(r)->regs)
+#define PT_REGS_R13(r) UPT_R13(&(r)->regs)
+#define PT_REGS_R14(r) UPT_R14(&(r)->regs)
+#define PT_REGS_R15(r) UPT_R15(&(r)->regs)
+
+#include <asm/errno.h>
+
+static inline int ptrace_get_thread_area(struct task_struct *child, int idx,
+                                         struct user_desc __user *user_desc)
+{
+        return -ENOSYS;
+}
+
+static inline int ptrace_set_thread_area(struct task_struct *child, int idx,
+                                         struct user_desc __user *user_desc)
+{
+        return -ENOSYS;
+}
+
+extern long arch_prctl(struct task_struct *task, int code,
+		       unsigned long __user *addr);
+
+#endif
 #endif /* __UM_X86_PTRACE_H */
diff --git a/arch/x86/um/asm/ptrace_32.h b/arch/x86/um/asm/ptrace_32.h
deleted file mode 100644
index 2cf225351b6..00000000000
--- a/arch/x86/um/asm/ptrace_32.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* 
- * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
- * Licensed under the GPL
- */
-
-#ifndef __UM_PTRACE_I386_H
-#define __UM_PTRACE_I386_H
-
-#define HOST_AUDIT_ARCH AUDIT_ARCH_I386
-
-#include "linux/compiler.h"
-#include "asm/ptrace-generic.h"
-
-#define user_mode(r) UPT_IS_USER(&(r)->regs)
-
-/*
- * Forward declaration to avoid including sysdep/tls.h, which causes a
- * circular include, and compilation failures.
- */
-struct user_desc;
-
-extern int ptrace_get_thread_area(struct task_struct *child, int idx,
-                                  struct user_desc __user *user_desc);
-
-extern int ptrace_set_thread_area(struct task_struct *child, int idx,
-                                  struct user_desc __user *user_desc);
-
-#endif
diff --git a/arch/x86/um/asm/ptrace_64.h b/arch/x86/um/asm/ptrace_64.h
deleted file mode 100644
index ea7bff39432..00000000000
--- a/arch/x86/um/asm/ptrace_64.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright 2003 PathScale, Inc.
- *
- * Licensed under the GPL
- */
-
-#ifndef __UM_PTRACE_X86_64_H
-#define __UM_PTRACE_X86_64_H
-
-#include "linux/compiler.h"
-#include "asm/errno.h"
-
-#define __FRAME_OFFSETS /* Needed to get the R* macros */
-#include "asm/ptrace-generic.h"
-
-#define HOST_AUDIT_ARCH AUDIT_ARCH_X86_64
-
-#define PT_REGS_R8(r) UPT_R8(&(r)->regs)
-#define PT_REGS_R9(r) UPT_R9(&(r)->regs)
-#define PT_REGS_R10(r) UPT_R10(&(r)->regs)
-#define PT_REGS_R11(r) UPT_R11(&(r)->regs)
-#define PT_REGS_R12(r) UPT_R12(&(r)->regs)
-#define PT_REGS_R13(r) UPT_R13(&(r)->regs)
-#define PT_REGS_R14(r) UPT_R14(&(r)->regs)
-#define PT_REGS_R15(r) UPT_R15(&(r)->regs)
-
-/* XXX */
-#define user_mode(r) UPT_IS_USER(&(r)->regs)
-
-struct user_desc;
-
-static inline int ptrace_get_thread_area(struct task_struct *child, int idx,
-                                         struct user_desc __user *user_desc)
-{
-        return -ENOSYS;
-}
-
-static inline int ptrace_set_thread_area(struct task_struct *child, int idx,
-                                         struct user_desc __user *user_desc)
-{
-        return -ENOSYS;
-}
-
-extern long arch_prctl(struct task_struct *task, int code,
-		       unsigned long __user *addr);
-#endif
diff --git a/arch/x86/um/bugs_32.c b/arch/x86/um/bugs_32.c
index 17d88cf2c6c..33daff4dade 100644
--- a/arch/x86/um/bugs_32.c
+++ b/arch/x86/um/bugs_32.c
@@ -4,9 +4,9 @@
  */
 
 #include <signal.h>
-#include "kern_util.h"
-#include "longjmp.h"
-#include "sysdep/ptrace.h"
+#include <kern_util.h>
+#include <longjmp.h>
+#include <sysdep/ptrace.h>
 #include <generated/asm-offsets.h>
 
 /* Set during early boot */
diff --git a/arch/x86/um/bugs_64.c b/arch/x86/um/bugs_64.c
index 44e02ba2a26..8cc8256c698 100644
--- a/arch/x86/um/bugs_64.c
+++ b/arch/x86/um/bugs_64.c
@@ -4,7 +4,7 @@
  * Licensed under the GPL
  */
 
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
 void arch_check_bugs(void)
 {
diff --git a/arch/x86/um/fault.c b/arch/x86/um/fault.c
index d670f68532f..8784ab30d91 100644
--- a/arch/x86/um/fault.c
+++ b/arch/x86/um/fault.c
@@ -3,7 +3,7 @@
  * Licensed under the GPL
  */
 
-#include "sysdep/ptrace.h"
+#include <sysdep/ptrace.h>
 
 /* These two are from asm-um/uaccess.h and linux/module.h, check them. */
 struct exception_table_entry
diff --git a/arch/x86/um/ldt.c b/arch/x86/um/ldt.c
index 26b0e39d2ce..8e08176f0bc 100644
--- a/arch/x86/um/ldt.c
+++ b/arch/x86/um/ldt.c
@@ -7,11 +7,11 @@
 #include <linux/sched.h>
 #include <linux/slab.h>
 #include <asm/unistd.h>
-#include "os.h"
-#include "proc_mm.h"
-#include "skas.h"
-#include "skas_ptrace.h"
-#include "sysdep/tls.h"
+#include <os.h>
+#include <proc_mm.h>
+#include <skas.h>
+#include <skas_ptrace.h>
+#include <sysdep/tls.h>
 
 extern int modify_ldt(int func, void *ptr, unsigned long bytecount);
 
diff --git a/arch/x86/um/mem_64.c b/arch/x86/um/mem_64.c
index 546518727a7..c6492e75797 100644
--- a/arch/x86/um/mem_64.c
+++ b/arch/x86/um/mem_64.c
@@ -1,6 +1,6 @@
-#include "linux/mm.h"
-#include "asm/page.h"
-#include "asm/mman.h"
+#include <linux/mm.h>
+#include <asm/page.h>
+#include <asm/mman.h>
 
 const char *arch_vma_name(struct vm_area_struct *vma)
 {
diff --git a/arch/x86/um/os-Linux/registers.c b/arch/x86/um/os-Linux/registers.c
index 0cdbb86b012..41bfe84e11a 100644
--- a/arch/x86/um/os-Linux/registers.c
+++ b/arch/x86/um/os-Linux/registers.c
@@ -9,8 +9,8 @@
 #ifdef __i386__
 #include <sys/user.h>
 #endif
-#include "longjmp.h"
-#include "sysdep/ptrace_user.h"
+#include <longjmp.h>
+#include <sysdep/ptrace_user.h>
 
 int save_fp_registers(int pid, unsigned long *fp_regs)
 {
diff --git a/arch/x86/um/os-Linux/task_size.c b/arch/x86/um/os-Linux/task_size.c
index efb16c5c9bc..8502ad30e61 100644
--- a/arch/x86/um/os-Linux/task_size.c
+++ b/arch/x86/um/os-Linux/task_size.c
@@ -2,7 +2,7 @@
 #include <stdlib.h>
 #include <signal.h>
 #include <sys/mman.h>
-#include "longjmp.h"
+#include <longjmp.h>
 
 #ifdef __i386__
 
diff --git a/arch/x86/um/os-Linux/tls.c b/arch/x86/um/os-Linux/tls.c
index 82276b6071a..9d94b3b76c7 100644
--- a/arch/x86/um/os-Linux/tls.c
+++ b/arch/x86/um/os-Linux/tls.c
@@ -5,7 +5,7 @@
 #include <sys/syscall.h>
 #include <unistd.h>
 
-#include "sysdep/tls.h"
+#include <sysdep/tls.h>
 
 #ifndef PTRACE_GET_THREAD_AREA
 #define PTRACE_GET_THREAD_AREA 25
diff --git a/arch/x86/um/ptrace_32.c b/arch/x86/um/ptrace_32.c
index 3b949daa095..ce3dd4f36f3 100644
--- a/arch/x86/um/ptrace_32.c
+++ b/arch/x86/um/ptrace_32.c
@@ -3,10 +3,10 @@
  * Licensed under the GPL
  */
 
-#include "linux/mm.h"
-#include "linux/sched.h"
-#include "asm/uaccess.h"
-#include "skas.h"
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <asm/uaccess.h>
+#include <skas.h>
 
 extern int arch_switch_tls(struct task_struct *to);
 
diff --git a/arch/x86/um/ptrace_user.c b/arch/x86/um/ptrace_user.c
index 3960ca1dd35..617885b1899 100644
--- a/arch/x86/um/ptrace_user.c
+++ b/arch/x86/um/ptrace_user.c
@@ -4,7 +4,7 @@
  */
 
 #include <errno.h>
-#include "ptrace_user.h"
+#include <ptrace_user.h>
 
 int ptrace_getregs(long pid, unsigned long *regs_out)
 {
diff --git a/arch/x86/um/shared/sysdep/ptrace.h b/arch/x86/um/shared/sysdep/ptrace.h
index 6ce2d76eb90..eb9356904ad 100644
--- a/arch/x86/um/shared/sysdep/ptrace.h
+++ b/arch/x86/um/shared/sysdep/ptrace.h
@@ -2,7 +2,7 @@
 #define __SYSDEP_X86_PTRACE_H
 
 #include <generated/user_constants.h>
-#include "sysdep/faultinfo.h"
+#include <sysdep/faultinfo.h>
 
 #define MAX_REG_OFFSET (UM_FRAME_SIZE)
 #define MAX_REG_NR ((MAX_REG_OFFSET) / sizeof(unsigned long))
diff --git a/arch/x86/um/shared/sysdep/stub.h b/arch/x86/um/shared/sysdep/stub.h
index bd161e30010..3f55e5bd3ce 100644
--- a/arch/x86/um/shared/sysdep/stub.h
+++ b/arch/x86/um/shared/sysdep/stub.h
@@ -1,8 +1,8 @@
 #include <asm/unistd.h>
 #include <sys/mman.h>
 #include <signal.h>
-#include "as-layout.h"
-#include "stub-data.h"
+#include <as-layout.h>
+#include <stub-data.h>
 
 #ifdef __i386__
 #include "stub_32.h"
diff --git a/arch/x86/um/shared/sysdep/syscalls_32.h b/arch/x86/um/shared/sysdep/syscalls_32.h
index 05cb796aecb..8436079be91 100644
--- a/arch/x86/um/shared/sysdep/syscalls_32.h
+++ b/arch/x86/um/shared/sysdep/syscalls_32.h
@@ -3,8 +3,8 @@
  * Licensed under the GPL
  */
 
-#include "asm/unistd.h"
-#include "sysdep/ptrace.h"
+#include <asm/unistd.h>
+#include <sysdep/ptrace.h>
 
 typedef long syscall_handler_t(struct pt_regs);
 
diff --git a/arch/x86/um/signal.c b/arch/x86/um/signal.c
index ba7363ecf89..bdaa08cfbcf 100644
--- a/arch/x86/um/signal.c
+++ b/arch/x86/um/signal.c
@@ -11,8 +11,8 @@
 #include <asm/unistd.h>
 #include <asm/uaccess.h>
 #include <asm/ucontext.h>
-#include "frame_kern.h"
-#include "skas.h"
+#include <frame_kern.h>
+#include <skas.h>
 
 #ifdef CONFIG_X86_32
 
diff --git a/arch/x86/um/stub_32.S b/arch/x86/um/stub_32.S
index 54a36ec20cb..b972649d3a1 100644
--- a/arch/x86/um/stub_32.S
+++ b/arch/x86/um/stub_32.S
@@ -1,4 +1,4 @@
-#include "as-layout.h"
+#include <as-layout.h>
 
 	.globl syscall_stub
 .section .__syscall_stub, "ax"
diff --git a/arch/x86/um/stub_64.S b/arch/x86/um/stub_64.S
index 20e4a96a6dc..7160b20172d 100644
--- a/arch/x86/um/stub_64.S
+++ b/arch/x86/um/stub_64.S
@@ -1,4 +1,4 @@
-#include "as-layout.h"
+#include <as-layout.h>
 
 	.globl syscall_stub
 .section .__syscall_stub, "ax"
diff --git a/arch/x86/um/stub_segv.c b/arch/x86/um/stub_segv.c
index b7450bd22e7..1518d2805ae 100644
--- a/arch/x86/um/stub_segv.c
+++ b/arch/x86/um/stub_segv.c
@@ -3,9 +3,9 @@
  * Licensed under the GPL
  */
 
-#include "sysdep/stub.h"
-#include "sysdep/faultinfo.h"
-#include "sysdep/mcontext.h"
+#include <sysdep/stub.h>
+#include <sysdep/faultinfo.h>
+#include <sysdep/mcontext.h>
 
 void __attribute__ ((__section__ (".__syscall_stub")))
 stub_segv_handler(int sig, siginfo_t *info, void *p)
diff --git a/arch/x86/um/sys_call_table_32.c b/arch/x86/um/sys_call_table_32.c
index b5408cecac6..232e60504b3 100644
--- a/arch/x86/um/sys_call_table_32.c
+++ b/arch/x86/um/sys_call_table_32.c
@@ -25,7 +25,6 @@
 #define old_mmap sys_old_mmap
 
 #define ptregs_fork sys_fork
-#define ptregs_execve sys_execve
 #define ptregs_iopl sys_iopl
 #define ptregs_vm86old sys_vm86old
 #define ptregs_clone i386_clone
diff --git a/arch/x86/um/sysrq_32.c b/arch/x86/um/sysrq_32.c
index 2d5cc51e9be..c9bee5b8c0d 100644
--- a/arch/x86/um/sysrq_32.c
+++ b/arch/x86/um/sysrq_32.c
@@ -3,12 +3,12 @@
  * Licensed under the GPL
  */
 
-#include "linux/kernel.h"
-#include "linux/smp.h"
-#include "linux/sched.h"
-#include "linux/kallsyms.h"
-#include "asm/ptrace.h"
-#include "sysrq.h"
+#include <linux/kernel.h>
+#include <linux/smp.h>
+#include <linux/sched.h>
+#include <linux/kallsyms.h>
+#include <asm/ptrace.h>
+#include <asm/sysrq.h>
 
 /* This is declared by <linux/sched.h> */
 void show_regs(struct pt_regs *regs)
diff --git a/arch/x86/um/sysrq_64.c b/arch/x86/um/sysrq_64.c
index 08258f17996..a0e7fb1134a 100644
--- a/arch/x86/um/sysrq_64.c
+++ b/arch/x86/um/sysrq_64.c
@@ -10,7 +10,7 @@
 #include <linux/utsname.h>
 #include <asm/current.h>
 #include <asm/ptrace.h>
-#include "sysrq.h"
+#include <asm/sysrq.h>
 
 void __show_regs(struct pt_regs *regs)
 {
diff --git a/arch/x86/um/tls_32.c b/arch/x86/um/tls_32.c
index baba84f8ecb..5f5feff3d24 100644
--- a/arch/x86/um/tls_32.c
+++ b/arch/x86/um/tls_32.c
@@ -3,12 +3,12 @@
  * Licensed under the GPL
  */
 
-#include "linux/percpu.h"
-#include "linux/sched.h"
-#include "asm/uaccess.h"
-#include "os.h"
-#include "skas.h"
-#include "sysdep/tls.h"
+#include <linux/percpu.h>
+#include <linux/sched.h>
+#include <asm/uaccess.h>
+#include <os.h>
+#include <skas.h>
+#include <sysdep/tls.h>
 
 /*
  * If needed we can detect when it's uninitialized.
diff --git a/arch/x86/um/tls_64.c b/arch/x86/um/tls_64.c
index f7ba46200ec..d22363cb854 100644
--- a/arch/x86/um/tls_64.c
+++ b/arch/x86/um/tls_64.c
@@ -1,4 +1,4 @@
-#include "linux/sched.h"
+#include <linux/sched.h>
 
 void clear_flushed_tls(struct task_struct *task)
 {
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index 885eff49d6a..4df6c373421 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -80,7 +80,7 @@ notrace static long vdso_fallback_gtod(struct timeval *tv, struct timezone *tz)
 }
 
 
-notrace static inline long vgetns(void)
+notrace static inline u64 vgetsns(void)
 {
 	long v;
 	cycles_t cycles;
@@ -91,21 +91,24 @@ notrace static inline long vgetns(void)
 	else
 		return 0;
 	v = (cycles - gtod->clock.cycle_last) & gtod->clock.mask;
-	return (v * gtod->clock.mult) >> gtod->clock.shift;
+	return v * gtod->clock.mult;
 }
 
 /* Code size doesn't matter (vdso is 4k anyway) and this is faster. */
 notrace static int __always_inline do_realtime(struct timespec *ts)
 {
-	unsigned long seq, ns;
+	unsigned long seq;
+	u64 ns;
 	int mode;
 
+	ts->tv_nsec = 0;
 	do {
 		seq = read_seqcount_begin(&gtod->seq);
 		mode = gtod->clock.vclock_mode;
 		ts->tv_sec = gtod->wall_time_sec;
-		ts->tv_nsec = gtod->wall_time_nsec;
-		ns = vgetns();
+		ns = gtod->wall_time_snsec;
+		ns += vgetsns();
+		ns >>= gtod->clock.shift;
 	} while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
 
 	timespec_add_ns(ts, ns);
@@ -114,15 +117,18 @@ notrace static int __always_inline do_realtime(struct timespec *ts)
 
 notrace static int do_monotonic(struct timespec *ts)
 {
-	unsigned long seq, ns;
+	unsigned long seq;
+	u64 ns;
 	int mode;
 
+	ts->tv_nsec = 0;
 	do {
 		seq = read_seqcount_begin(&gtod->seq);
 		mode = gtod->clock.vclock_mode;
 		ts->tv_sec = gtod->monotonic_time_sec;
-		ts->tv_nsec = gtod->monotonic_time_nsec;
-		ns = vgetns();
+		ns = gtod->monotonic_time_snsec;
+		ns += vgetsns();
+		ns >>= gtod->clock.shift;
 	} while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
 	timespec_add_ns(ts, ns);
 
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index bf788d34530..e3497f240ea 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -987,7 +987,16 @@ static void xen_write_cr4(unsigned long cr4)
 
 	native_write_cr4(cr4);
 }
-
+#ifdef CONFIG_X86_64
+static inline unsigned long xen_read_cr8(void)
+{
+	return 0;
+}
+static inline void xen_write_cr8(unsigned long val)
+{
+	BUG_ON(val);
+}
+#endif
 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
 {
 	int ret;
@@ -1156,6 +1165,11 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
 	.read_cr4_safe = native_read_cr4_safe,
 	.write_cr4 = xen_write_cr4,
 
+#ifdef CONFIG_X86_64
+	.read_cr8 = xen_read_cr8,
+	.write_cr8 = xen_write_cr8,
+#endif
+
 	.wbinvd = native_wbinvd,
 
 	.read_msr = native_read_msr_safe,
@@ -1164,6 +1178,8 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
 	.read_tsc = native_read_tsc,
 	.read_pmc = native_read_pmc,
 
+	.read_tscp = native_read_tscp,
+
 	.iret = xen_iret,
 	.irq_enable_sysexit = xen_sysexit,
 #ifdef CONFIG_X86_64
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 5a16824cc2b..6226c99729b 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -47,6 +47,7 @@
 #include <linux/gfp.h>
 #include <linux/memblock.h>
 #include <linux/seq_file.h>
+#include <linux/crash_dump.h>
 
 #include <trace/events/xen.h>
 
@@ -2381,6 +2382,43 @@ void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
 EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
 
 #ifdef CONFIG_XEN_PVHVM
+#ifdef CONFIG_PROC_VMCORE
+/*
+ * This function is used in two contexts:
+ * - the kdump kernel has to check whether a pfn of the crashed kernel
+ *   was a ballooned page. vmcore is using this function to decide
+ *   whether to access a pfn of the crashed kernel.
+ * - the kexec kernel has to check whether a pfn was ballooned by the
+ *   previous kernel. If the pfn is ballooned, handle it properly.
+ * Returns 0 if the pfn is not backed by a RAM page, the caller may
+ * handle the pfn special in this case.
+ */
+static int xen_oldmem_pfn_is_ram(unsigned long pfn)
+{
+	struct xen_hvm_get_mem_type a = {
+		.domid = DOMID_SELF,
+		.pfn = pfn,
+	};
+	int ram;
+
+	if (HYPERVISOR_hvm_op(HVMOP_get_mem_type, &a))
+		return -ENXIO;
+
+	switch (a.mem_type) {
+		case HVMMEM_mmio_dm:
+			ram = 0;
+			break;
+		case HVMMEM_ram_rw:
+		case HVMMEM_ram_ro:
+		default:
+			ram = 1;
+			break;
+	}
+
+	return ram;
+}
+#endif
+
 static void xen_hvm_exit_mmap(struct mm_struct *mm)
 {
 	struct xen_hvm_pagetable_dying a;
@@ -2411,6 +2449,9 @@ void __init xen_hvm_init_mmu_ops(void)
 {
 	if (is_pagetable_dying_supported())
 		pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
+#ifdef CONFIG_PROC_VMCORE
+	register_oldmem_pfn_is_ram(&xen_oldmem_pfn_is_ram);
+#endif
 }
 #endif
 
@@ -2451,8 +2492,7 @@ int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
 
 	prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
 
-	BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) ==
-				(VM_PFNMAP | VM_RESERVED | VM_IO)));
+	BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_IO)) == (VM_PFNMAP | VM_IO)));
 
 	rmd.mfn = mfn;
 	rmd.prot = prot;
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index 744f5ee4ba4..cdcb48adee4 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -11,6 +11,9 @@ config XTENSA
 	select HAVE_GENERIC_HARDIRQS
 	select GENERIC_IRQ_SHOW
 	select GENERIC_CPU_DEVICES
+	select MODULES_USE_ELF_RELA
+	select GENERIC_PCI_IOMAP
+	select ARCH_WANT_OPTIONAL_GPIOLIB
 	help
 	  Xtensa processors are 32-bit RISC machines designed by Tensilica
 	  primarily for embedded systems.  These processors are both
@@ -35,7 +38,7 @@ config ARCH_HAS_ILOG2_U64
 	def_bool n
 
 config NO_IOPORT
-	def_bool y
+	def_bool n
 
 config HZ
 	int
@@ -142,6 +145,7 @@ config XTENSA_PLATFORM_XT2000
 config XTENSA_PLATFORM_S6105
 	bool "S6105"
 	select SERIAL_CONSOLE
+	select NO_IOPORT
 
 endchoice
 
@@ -205,23 +209,6 @@ source "drivers/Kconfig"
 
 source "fs/Kconfig"
 
-menu "Xtensa initrd options"
-	depends on BLK_DEV_INITRD
-
-config EMBEDDED_RAMDISK
-	bool "Embed root filesystem ramdisk into the kernel"
-
-config EMBEDDED_RAMDISK_IMAGE
-	string "Filename of gzipped ramdisk image"
-	depends on EMBEDDED_RAMDISK
-	default "ramdisk.gz"
-	help
-	  This is the filename of the ramdisk image to be built into the
-	  kernel.  Relative pathnames are relative to arch/xtensa/boot/ramdisk/.
-	  The ramdisk image is not part of the kernel distribution; you must
-	  provide one yourself.
-endmenu
-
 source "arch/xtensa/Kconfig.debug"
 
 source "security/Kconfig"
diff --git a/arch/xtensa/Makefile b/arch/xtensa/Makefile
index f973754ddf9..bb5ba61723f 100644
--- a/arch/xtensa/Makefile
+++ b/arch/xtensa/Makefile
@@ -21,6 +21,18 @@ variant-$(CONFIG_XTENSA_VARIANT_LINUX_CUSTOM)	:= custom
 VARIANT = $(variant-y)
 export VARIANT
 
+# Test for cross compiling
+
+ifneq ($(VARIANT),)
+  COMPILE_ARCH = $(shell uname -m)
+
+  ifneq ($(COMPILE_ARCH), xtensa)
+    ifndef CROSS_COMPILE
+      CROSS_COMPILE = xtensa_$(VARIANT)-
+    endif
+  endif
+endif
+
 # Platform configuration
 
 platform-$(CONFIG_XTENSA_PLATFORM_XT2000)	:= xt2000
@@ -31,7 +43,7 @@ PLATFORM = $(platform-y)
 export PLATFORM
 
 # temporarily until string.h is fixed
-KBUILD_CFLAGS += -ffreestanding
+KBUILD_CFLAGS += -ffreestanding -D__linux__
 
 KBUILD_CFLAGS += -pipe -mlongcalls
 
@@ -48,24 +60,6 @@ endif
 
 KBUILD_DEFCONFIG := iss_defconfig
 
-# ramdisk/initrd support
-# You need a compressed ramdisk image, named ramdisk.gz in
-# arch/xtensa/boot/ramdisk
-
-core-$(CONFIG_EMBEDDED_RAMDISK)	+= arch/xtensa/boot/ramdisk/
-
-# Test for cross compiling
-
-ifneq ($(VARIANT),)
-  COMPILE_ARCH = $(shell uname -m)
-
-  ifneq ($(COMPILE_ARCH), xtensa)
-    ifndef CROSS_COMPILE
-      CROSS_COMPILE = xtensa_$(VARIANT)-
-    endif
-  endif
-endif
-
 # Only build variant and/or platform if it includes a Makefile
 
 buildvar := $(shell test -e $(srctree)/arch/xtensa/variants/$(VARIANT)/Makefile && echo arch/xtensa/variants/$(VARIANT)/)
@@ -87,7 +81,7 @@ all: zImage
 
 bzImage : zImage
 
-zImage zImage.initrd: vmlinux
+zImage: vmlinux
 	$(Q)$(MAKE) $(build)=$(boot) $@
 
 define archhelp
diff --git a/arch/xtensa/boot/Makefile b/arch/xtensa/boot/Makefile
index 70fd1453e17..4018f899419 100644
--- a/arch/xtensa/boot/Makefile
+++ b/arch/xtensa/boot/Makefile
@@ -25,7 +25,7 @@ bootdir-$(CONFIG_XTENSA_PLATFORM_ISS)	 += boot-elf
 bootdir-$(CONFIG_XTENSA_PLATFORM_XT2000) += boot-redboot boot-elf
 
 
-zImage zImage.initrd Image Image.initrd: $(bootdir-y)
+zImage Image: $(bootdir-y)
 
 $(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
 	      $(addprefix $(obj)/,$(host-progs))
diff --git a/arch/xtensa/boot/boot-elf/Makefile b/arch/xtensa/boot/boot-elf/Makefile
index 08e8814f8c7..f10992b8902 100644
--- a/arch/xtensa/boot/boot-elf/Makefile
+++ b/arch/xtensa/boot/boot-elf/Makefile
@@ -20,34 +20,18 @@ boot-y		:= bootstrap.o
 
 OBJS		:= $(addprefix $(obj)/,$(boot-y))
 
-Image:	vmlinux $(OBJS) arch/$(ARCH)/boot/boot-elf/boot.lds
+vmlinux.tmp: vmlinux
 	$(OBJCOPY) --strip-all -R .comment -R .note.gnu.build-id -O binary \
-		vmlinux vmlinux.tmp
-	$(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
-		--add-section image=vmlinux.tmp \
-		--set-section-flags image=contents,alloc,load,load,data \
-		$(OBJS) $@.tmp
-	$(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) \
-		-T arch/$(ARCH)/boot/boot-elf/boot.lds \
-		-o arch/$(ARCH)/boot/$@.elf $@.tmp
-	rm -f $@.tmp vmlinux.tmp
+		$^ $@
 
-Image.initrd:	vmlinux $(OBJS)
-	$(OBJCOPY) --strip-all -R .comment -R .note.gnu.build-id -O binary \
-		--add-section .initrd=arch/$(ARCH)/boot/ramdisk \
-		--set-section-flags .initrd=contents,alloc,load,load,data \
-		vmlinux vmlinux.tmp
+Image:	vmlinux.tmp $(OBJS) arch/$(ARCH)/boot/boot-elf/boot.lds
 	$(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
 		--add-section image=vmlinux.tmp \
 		--set-section-flags image=contents,alloc,load,load,data \
 		$(OBJS) $@.tmp
 	$(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) \
-		-T $(srctree)/arch/$(ARCH)/boot/boot-elf/boot.ld \
+		-T arch/$(ARCH)/boot/boot-elf/boot.lds \
 		-o arch/$(ARCH)/boot/$@.elf $@.tmp
-	rm -f $@.tmp vmlinux.tmp
-
 
 zImage:	Image
 
-zImage.initrd:	Image.initrd
-
diff --git a/arch/xtensa/boot/boot-elf/boot.lds.S b/arch/xtensa/boot/boot-elf/boot.lds.S
index 4e53b74dc44..7b646e0a648 100644
--- a/arch/xtensa/boot/boot-elf/boot.lds.S
+++ b/arch/xtensa/boot/boot-elf/boot.lds.S
@@ -33,13 +33,6 @@ SECTIONS
 
 	__reloc_end = . ;
 
-	.initrd ALIGN(0x10) :
-	{
-		boot_initrd_start = . ;
-		*(.initrd)
-		boot_initrd_end = .;
-	}
-
 	. = ALIGN(0x10);
 	__image_load = . ;
 	.image 0xd0001000:
diff --git a/arch/xtensa/boot/boot-redboot/Makefile b/arch/xtensa/boot/boot-redboot/Makefile
index 872029b8443..25a78c6b153 100644
--- a/arch/xtensa/boot/boot-redboot/Makefile
+++ b/arch/xtensa/boot/boot-redboot/Makefile
@@ -21,15 +21,17 @@ LIBS	:= arch/xtensa/boot/lib/lib.a arch/xtensa/lib/lib.a
 
 LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
 
-zImage: vmlinux $(OBJS) $(LIBS)
+vmlinux.tmp: vmlinux
 	$(OBJCOPY) --strip-all -R .comment -R .note.gnu.build-id -O binary \
-		vmlinux vmlinux.tmp
-	gzip -vf9 vmlinux.tmp
+		$^ $@
+
+vmlinux.tmp.gz: vmlinux.tmp
+	$(GZIP) $(GZIP_FLAGS) $^ > $@
+
+zImage: vmlinux.tmp.gz $(OBJS) $(LIBS)
 	$(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
 		--add-section image=vmlinux.tmp.gz \
 		--set-section-flags image=contents,alloc,load,load,data \
 		$(OBJS) $@.tmp
 	$(LD) $(LD_ARGS) -o $@.elf $@.tmp $(LIBS) -L/xtensa-elf/lib $(LIBGCC)
 	$(OBJCOPY) -S -O binary $@.elf arch/$(ARCH)/boot/$@.redboot
-	rm -f $@.tmp $@.elf vmlinux.tmp.gz
-
diff --git a/arch/xtensa/boot/boot-redboot/boot.ld b/arch/xtensa/boot/boot-redboot/boot.ld
index 774db20d11f..5bbcaf9e830 100644
--- a/arch/xtensa/boot/boot-redboot/boot.ld
+++ b/arch/xtensa/boot/boot-redboot/boot.ld
@@ -31,13 +31,6 @@ SECTIONS
 
 	__reloc_end = . ;
 
-	.initrd ALIGN(0x10) :
-	{
-		boot_initrd_start = . ;
-		*(.initrd)
-		boot_initrd_end = .;
-	}
-
 	. = ALIGN(0x10);
 	__image_load = . ;
 	.image 0xd0001000: AT(__image_load)
diff --git a/arch/xtensa/boot/boot-redboot/bootstrap.S b/arch/xtensa/boot/boot-redboot/bootstrap.S
index 5582e8cfac8..4c316cd28a5 100644
--- a/arch/xtensa/boot/boot-redboot/bootstrap.S
+++ b/arch/xtensa/boot/boot-redboot/bootstrap.S
@@ -226,17 +226,7 @@ _reloc:
 
 	isync
 
-	movi	a5, __start
-	movi	a3, boot_initrd_start
-	movi	a4, boot_initrd_end
-	sub	a3, a3, a5
-	sub	a4, a4, a5
-	add	a3, a0, a3
-	add	a4, a0, a4
-
 	# a2  Boot parameter list
-	# a3  initrd_start (virtual load address)
-	# a4  initrd_end   (virtual load address)
 
 	movi	a0, _image_start
 	jx	a0
diff --git a/arch/xtensa/boot/ramdisk/Makefile b/arch/xtensa/boot/ramdisk/Makefile
deleted file mode 100644
index b12f7635243..00000000000
--- a/arch/xtensa/boot/ramdisk/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# Makefile for a ramdisk image
-#
-
-BIG_ENDIAN	:= $(shell echo -e "\#ifdef __XTENSA_EL__\nint little;\n\#else\nint big;\n\#endif" | $(CC) -E -|grep -c big)
-
-ifeq ($(BIG_ENDIAN),1)
-OBJCOPY_ARGS    := -O elf32-xtensa-be
-else
-OBJCOPY_ARGS    := -O elf32-xtensa-le
-endif
-
-obj-y = ramdisk.o
-
-RAMDISK_IMAGE = arch/$(ARCH)/boot/ramdisk/$(CONFIG_EMBEDDED_RAMDISK_IMAGE)
-
-arch/$(ARCH)/boot/ramdisk/ramdisk.o:
-	$(Q)echo -e "dummy:" | $(AS) -o $@;
-	$(Q)$(OBJCOPY) $(OBJCOPY_ARGS)					    \
-		--add-section .initrd=$(RAMDISK_IMAGE)			    \
-		--set-section-flags .initrd=contents,alloc,load,load,data   \
-		arch/$(ARCH)/boot/ramdisk/ramdisk.o $@
-
diff --git a/arch/xtensa/configs/s6105_defconfig b/arch/xtensa/configs/s6105_defconfig
index 550e8ed5b5c..eaf1b8fc655 100644
--- a/arch/xtensa/configs/s6105_defconfig
+++ b/arch/xtensa/configs/s6105_defconfig
@@ -541,11 +541,6 @@ CONFIG_MSDOS_PARTITION=y
 # CONFIG_DLM is not set
 
 #
-# Xtensa initrd options
-#
-# CONFIG_EMBEDDED_RAMDISK is not set
-
-#
 # Kernel hacking
 #
 CONFIG_PRINTK_TIME=y
diff --git a/arch/xtensa/include/asm/Kbuild b/arch/xtensa/include/asm/Kbuild
index c68e1680da0..fccd81eddff 100644
--- a/arch/xtensa/include/asm/Kbuild
+++ b/arch/xtensa/include/asm/Kbuild
@@ -1 +1,4 @@
 include include/asm-generic/Kbuild.asm
+
+generic-y += clkdev.h
+generic-y += exec.h
diff --git a/arch/xtensa/include/asm/exec.h b/arch/xtensa/include/asm/exec.h
deleted file mode 100644
index af949e28cb3..00000000000
--- a/arch/xtensa/include/asm/exec.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2001 - 2005 Tensilica Inc.
- */
-
-#ifndef _XTENSA_EXEC_H
-#define _XTENSA_EXEC_H
-
-#define arch_align_stack(x) (x)
-
-#endif /* _XTENSA_EXEC_H */
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index 4beb43c087d..e6be5b9091c 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -25,184 +25,54 @@
 #define XCHAL_KIO_SIZE		0x10000000
 
 #define IOADDR(x)		(XCHAL_KIO_BYPASS_VADDR + (x))
+#define IO_SPACE_LIMIT ~0
 
+#ifdef CONFIG_MMU
 /*
- * swap functions to change byte order from little-endian to big-endian and
- * vice versa.
- */
-
-static inline unsigned short _swapw (unsigned short v)
-{
-	return (v << 8) | (v >> 8);
-}
-
-static inline unsigned int _swapl (unsigned int v)
-{
-	return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24);
-}
-
-/*
- * Change virtual addresses to physical addresses and vv.
- * These are trivial on the 1:1 Linux/Xtensa mapping
- */
-
-static inline unsigned long virt_to_phys(volatile void * address)
-{
-	return __pa(address);
-}
-
-static inline void * phys_to_virt(unsigned long address)
-{
-	return __va(address);
-}
-
-/*
- * virt_to_bus and bus_to_virt are deprecated.
- */
-
-#define virt_to_bus(x)	virt_to_phys(x)
-#define bus_to_virt(x)	phys_to_virt(x)
-
-/*
- * Return the virtual (cached) address for the specified bus memory.
+ * Return the virtual address for the specified bus memory.
  * Note that we currently don't support any address outside the KIO segment.
  */
-
-static inline void *ioremap(unsigned long offset, unsigned long size)
+static inline void __iomem *ioremap_nocache(unsigned long offset,
+		unsigned long size)
 {
-#ifdef CONFIG_MMU
 	if (offset >= XCHAL_KIO_PADDR
-	    && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE)
+	    && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE)
 		return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR);
 	else
 		BUG();
-#else
-	return (void *)offset;
-#endif
 }
 
-static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
+static inline void __iomem *ioremap_cache(unsigned long offset,
+		unsigned long size)
 {
-#ifdef CONFIG_MMU
 	if (offset >= XCHAL_KIO_PADDR
-	    && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE)
+	    && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE)
 		return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR);
 	else
 		BUG();
-#else
-	return (void *)offset;
-#endif
-}
-
-static inline void iounmap(void *addr)
-{
 }
 
-/*
- * Generic I/O
- */
-
-#define readb(addr) \
-	({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; })
-#define readw(addr) \
-	({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; })
-#define readl(addr) \
-	({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; })
-#define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b))
-#define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b))
-#define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b))
+#define ioremap_wc ioremap_nocache
 
-static inline __u8 __raw_readb(const volatile void __iomem *addr)
-{
-          return *(__force volatile __u8 *)(addr);
-}
-static inline __u16 __raw_readw(const volatile void __iomem *addr)
-{
-          return *(__force volatile __u16 *)(addr);
-}
-static inline __u32 __raw_readl(const volatile void __iomem *addr)
+static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
 {
-          return *(__force volatile __u32 *)(addr);
+	return ioremap_nocache(offset, size);
 }
-static inline void __raw_writeb(__u8 b, volatile void __iomem *addr)
-{
-          *(__force volatile __u8 *)(addr) = b;
-}
-static inline void __raw_writew(__u16 b, volatile void __iomem *addr)
-{
-          *(__force volatile __u16 *)(addr) = b;
-}
-static inline void __raw_writel(__u32 b, volatile void __iomem *addr)
+
+static inline void iounmap(volatile void __iomem *addr)
 {
-          *(__force volatile __u32 *)(addr) = b;
 }
-
-/* These are the definitions for the x86 IO instructions
- * inb/inw/inl/outb/outw/outl, the "string" versions
- * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions
- * inb_p/inw_p/...
- * The macros don't do byte-swapping.
- */
-
-#define inb(port)		readb((u8 *)((port)))
-#define outb(val, port)		writeb((val),(u8 *)((unsigned long)(port)))
-#define inw(port)		readw((u16 *)((port)))
-#define outw(val, port)		writew((val),(u16 *)((unsigned long)(port)))
-#define inl(port)		readl((u32 *)((port)))
-#define outl(val, port)		writel((val),(u32 *)((unsigned long)(port)))
-
-#define inb_p(port)		inb((port))
-#define outb_p(val, port)	outb((val), (port))
-#define inw_p(port)		inw((port))
-#define outw_p(val, port)	outw((val), (port))
-#define inl_p(port)		inl((port))
-#define outl_p(val, port)	outl((val), (port))
-
-extern void insb (unsigned long port, void *dst, unsigned long count);
-extern void insw (unsigned long port, void *dst, unsigned long count);
-extern void insl (unsigned long port, void *dst, unsigned long count);
-extern void outsb (unsigned long port, const void *src, unsigned long count);
-extern void outsw (unsigned long port, const void *src, unsigned long count);
-extern void outsl (unsigned long port, const void *src, unsigned long count);
-
-#define IO_SPACE_LIMIT ~0
-
-#define memset_io(a,b,c)       memset((void *)(a),(b),(c))
-#define memcpy_fromio(a,b,c)   memcpy((a),(void *)(b),(c))
-#define memcpy_toio(a,b,c)      memcpy((void *)(a),(b),(c))
-
-/* At this point the Xtensa doesn't provide byte swap instructions */
-
-#ifdef __XTENSA_EB__
-# define in_8(addr) (*(u8*)(addr))
-# define in_le16(addr) _swapw(*(u16*)(addr))
-# define in_le32(addr) _swapl(*(u32*)(addr))
-# define out_8(b, addr) *(u8*)(addr) = (b)
-# define out_le16(b, addr) *(u16*)(addr) = _swapw(b)
-# define out_le32(b, addr) *(u32*)(addr) = _swapl(b)
-#elif defined(__XTENSA_EL__)
-# define in_8(addr)  (*(u8*)(addr))
-# define in_le16(addr) (*(u16*)(addr))
-# define in_le32(addr) (*(u32*)(addr))
-# define out_8(b, addr) *(u8*)(addr) = (b)
-# define out_le16(b, addr) *(u16*)(addr) = (b)
-# define out_le32(b, addr) *(u32*)(addr) = (b)
-#else
-# error processor byte order undefined!
-#endif
-
-
-/*
- * Convert a physical pointer to a virtual kernel pointer for /dev/mem access
- */
-#define xlate_dev_mem_ptr(p)    __va(p)
+#endif /* CONFIG_MMU */
 
 /*
- * Convert a virtual cached pointer to an uncached pointer
+ * Generic I/O
  */
-#define xlate_dev_kmem_ptr(p)   p
-
+#define readb_relaxed readb
+#define readw_relaxed readw
+#define readl_relaxed readl
 
 #endif	/* __KERNEL__ */
 
+#include <asm-generic/io.h>
+
 #endif	/* _XTENSA_IO_H */
diff --git a/arch/xtensa/include/asm/ioctls.h b/arch/xtensa/include/asm/ioctls.h
index fd1d1369a40..2aa4cd9f0ce 100644
--- a/arch/xtensa/include/asm/ioctls.h
+++ b/arch/xtensa/include/asm/ioctls.h
@@ -71,8 +71,8 @@
 #define TIOCSSOFTCAR	_IOW('T', 26, unsigned int)
 #define TIOCLINUX	_IOW('T', 28, char)
 #define TIOCCONS	_IO('T', 29)
-#define TIOCGSERIAL	_IOR('T', 30, struct serial_struct)
-#define TIOCSSERIAL	_IOW('T', 31, struct serial_struct)
+#define TIOCGSERIAL	0x803C541E	/*_IOR('T', 30, struct serial_struct)*/
+#define TIOCSSERIAL	0x403C541F	/*_IOW('T', 31, struct serial_struct)*/
 #define TIOCPKT		_IOW('T', 32, int)
 # define TIOCPKT_DATA		 0
 # define TIOCPKT_FLUSHREAD	 1
diff --git a/arch/xtensa/include/asm/module.h b/arch/xtensa/include/asm/module.h
index d9b34bee4d4..488b40c6f9b 100644
--- a/arch/xtensa/include/asm/module.h
+++ b/arch/xtensa/include/asm/module.h
@@ -13,15 +13,8 @@
 #ifndef _XTENSA_MODULE_H
 #define _XTENSA_MODULE_H
 
-struct mod_arch_specific
-{
-	/* No special elements, yet. */
-};
-
 #define MODULE_ARCH_VERMAGIC "xtensa-" __stringify(XCHAL_CORE_ID) " "
 
-#define Elf_Shdr Elf32_Shdr
-#define Elf_Sym Elf32_Sym
-#define Elf_Ehdr Elf32_Ehdr
+#include <asm-generic/module.h>
 
 #endif	/* _XTENSA_MODULE_H */
diff --git a/arch/xtensa/include/asm/regs.h b/arch/xtensa/include/asm/regs.h
index d4baed24692..a3075b12aff 100644
--- a/arch/xtensa/include/asm/regs.h
+++ b/arch/xtensa/include/asm/regs.h
@@ -66,7 +66,7 @@
 #define ICOUNTLEVEL	237
 #define EXCVADDR	238
 #define CCOMPARE	240
-#define MISC		244
+#define MISC_SR		244
 
 /*  Special names for read-only and write-only interrupt registers.  */
 
diff --git a/arch/xtensa/include/asm/thread_info.h b/arch/xtensa/include/asm/thread_info.h
index 81abfd5d01a..9481004ac11 100644
--- a/arch/xtensa/include/asm/thread_info.h
+++ b/arch/xtensa/include/asm/thread_info.h
@@ -128,19 +128,14 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_SIGPENDING		1	/* signal pending */
 #define TIF_NEED_RESCHED	2	/* rescheduling necessary */
 #define TIF_SINGLESTEP		3	/* restore singlestep on return to user mode */
-#define TIF_IRET		4	/* return with iret */
 #define TIF_MEMDIE		5	/* is terminating due to OOM killer */
 #define TIF_RESTORE_SIGMASK	6	/* restore signal mask in do_signal() */
 #define TIF_NOTIFY_RESUME	7	/* callback before returning to user */
-#define TIF_POLLING_NRFLAG	16	/* true if poll_idle() is polling TIF_NEED_RESCHED */
 
 #define _TIF_SYSCALL_TRACE	(1<<TIF_SYSCALL_TRACE)
 #define _TIF_SIGPENDING		(1<<TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
 #define _TIF_SINGLESTEP		(1<<TIF_SINGLESTEP)
-#define _TIF_IRET		(1<<TIF_IRET)
-#define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
-#define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
 
 #define _TIF_WORK_MASK		0x0000FFFE	/* work to do on interrupt/exception return */
 #define _TIF_ALLWORK_MASK	0x0000FFFF	/* work to do on any return to u-space */
diff --git a/arch/xtensa/kernel/Makefile b/arch/xtensa/kernel/Makefile
index 59fc3fe1557..f36cef5a62f 100644
--- a/arch/xtensa/kernel/Makefile
+++ b/arch/xtensa/kernel/Makefile
@@ -6,7 +6,7 @@ extra-y := head.o vmlinux.lds
 
 obj-y := align.o entry.o irq.o coprocessor.o process.o ptrace.o \
 	 setup.o signal.o syscall.o time.o traps.o vectors.o platform.o  \
-	 pci-dma.o io.o
+	 pci-dma.o
 
 obj-$(CONFIG_KGDB) += xtensa-stub.o
 obj-$(CONFIG_PCI) += pci.o
@@ -24,6 +24,7 @@ obj-$(CONFIG_MODULES) += xtensa_ksyms.o module.o
 # Replicate rules in scripts/Makefile.build
 
 sed-y = -e 's/\*(\(\.[a-z]*it\|\.ref\|\)\.text)/*(\1.literal \1.text)/g'    \
+	-e 's/\.text\.unlikely/.literal.unlikely .text.unlikely/g' \
 	-e 's/\*(\(\.text\.[a-z]*\))/*(\1.literal \1)/g'
 
 quiet_cmd__cpp_lds_S = LDS     $@
diff --git a/arch/xtensa/kernel/io.c b/arch/xtensa/kernel/io.c
deleted file mode 100644
index 5b65269b1d2..00000000000
--- a/arch/xtensa/kernel/io.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * arch/xtensa/io.c
- *
- * IO primitives
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- * Copied from sparc.
- *
- * Chris Zankel <chris@zankel.net>
- *
- */
-
-#include <asm/io.h>
-#include <asm/byteorder.h>
-
-void outsb(unsigned long addr, const void *src, unsigned long count) {
-        while (count) {
-                count -= 1;
-                writeb(*(const char *)src, addr);
-                src += 1;
-                addr += 1;
-        }
-}
-
-void outsw(unsigned long addr, const void *src, unsigned long count) {
-        while (count) {
-                count -= 2;
-                writew(*(const short *)src, addr);
-                src += 2;
-                addr += 2;
-        }
-}
-
-void outsl(unsigned long addr, const void *src, unsigned long count) {
-        while (count) {
-                count -= 4;
-                writel(*(const long *)src, addr);
-                src += 4;
-                addr += 4;
-        }
-}
-
-void insb(unsigned long addr, void *dst, unsigned long count) {
-        while (count) {
-                count -= 1;
-                *(unsigned char *)dst = readb(addr);
-                dst += 1;
-                addr += 1;
-        }
-}
-
-void insw(unsigned long addr, void *dst, unsigned long count) {
-        while (count) {
-                count -= 2;
-                *(unsigned short *)dst = readw(addr);
-                dst += 2;
-                addr += 2;
-        }
-}
-
-void insl(unsigned long addr, void *dst, unsigned long count) {
-        while (count) {
-                count -= 4;
-                /*
-                 * XXX I am sure we are in for an unaligned trap here.
-                 */
-                *(unsigned long *)dst = readl(addr);
-                dst += 4;
-                addr += 4;
-        }
-}
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
index 4340ee076bd..98e77c3ef1c 100644
--- a/arch/xtensa/kernel/irq.c
+++ b/arch/xtensa/kernel/irq.c
@@ -84,12 +84,12 @@ static void xtensa_irq_unmask(struct irq_data *d)
 static void xtensa_irq_enable(struct irq_data *d)
 {
 	variant_irq_enable(d->irq);
-	xtensa_irq_unmask(d->irq);
+	xtensa_irq_unmask(d);
 }
 
 static void xtensa_irq_disable(struct irq_data *d)
 {
-	xtensa_irq_mask(d->irq);
+	xtensa_irq_mask(d);
 	variant_irq_disable(d->irq);
 }
 
diff --git a/arch/xtensa/kernel/pci-dma.c b/arch/xtensa/kernel/pci-dma.c
index 2783fda76dd..2d9cc6dbfd7 100644
--- a/arch/xtensa/kernel/pci-dma.c
+++ b/arch/xtensa/kernel/pci-dma.c
@@ -21,6 +21,7 @@
 #include <linux/string.h>
 #include <linux/pci.h>
 #include <linux/gfp.h>
+#include <linux/module.h>
 #include <asm/io.h>
 #include <asm/cacheflush.h>
 
@@ -62,6 +63,7 @@ dma_alloc_coherent(struct device *dev,size_t size,dma_addr_t *handle,gfp_t flag)
 
 	return (void*)uncached;
 }
+EXPORT_SYMBOL(dma_alloc_coherent);
 
 void dma_free_coherent(struct device *hwdev, size_t size,
 			 void *vaddr, dma_addr_t dma_handle)
@@ -73,6 +75,7 @@ void dma_free_coherent(struct device *hwdev, size_t size,
 
 	free_pages(addr, get_order(size));
 }
+EXPORT_SYMBOL(dma_free_coherent);
 
 
 void consistent_sync(void *vaddr, size_t size, int direction)
@@ -92,3 +95,4 @@ void consistent_sync(void *vaddr, size_t size, int direction)
 		break;
 	}
 }
+EXPORT_SYMBOL(consistent_sync);
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c
index 54354de38a7..126c1883940 100644
--- a/arch/xtensa/kernel/pci.c
+++ b/arch/xtensa/kernel/pci.c
@@ -333,7 +333,7 @@ __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma,
 	int prot = pgprot_val(vma->vm_page_prot);
 
 	/* Set to write-through */
-	prot &= ~_PAGE_NO_CACHE;
+	prot = (prot & _PAGE_CA_MASK) | _PAGE_CA_WT;
 #if 0
 	if (!write_combine)
 		prot |= _PAGE_WRITETHRU;
diff --git a/arch/xtensa/kernel/platform.c b/arch/xtensa/kernel/platform.c
index 1b91a97f1d8..97230e46cbe 100644
--- a/arch/xtensa/kernel/platform.c
+++ b/arch/xtensa/kernel/platform.c
@@ -40,8 +40,8 @@ _F(int,  pcibios_fixup, (void), { return 0; });
 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
 _F(void, calibrate_ccount, (void),
 {
-  printk ("ERROR: Cannot calibrate cpu frequency! Assuming 100MHz.\n");
-  ccount_per_jiffy = 100 * (1000000UL/HZ);
+	pr_err("ERROR: Cannot calibrate cpu frequency! Assuming 10MHz.\n");
+	ccount_per_jiffy = 10 * (1000000UL/HZ);
 });
 #endif
 
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c
index bc44311aa18..bc020825cce 100644
--- a/arch/xtensa/kernel/process.c
+++ b/arch/xtensa/kernel/process.c
@@ -328,13 +328,13 @@ long xtensa_execve(const char __user *name,
                    struct pt_regs *regs)
 {
 	long error;
-	char * filename;
+	struct filename *filename;
 
 	filename = getname(name);
 	error = PTR_ERR(filename);
 	if (IS_ERR(filename))
 		goto out;
-	error = do_execve(filename, argv, envp, regs);
+	error = do_execve(filename->name, argv, envp, regs);
 	putname(filename);
 out:
 	return error;
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 17e746f7be6..270360d9806 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -60,8 +60,6 @@ struct rtc_ops *rtc_ops;
 #ifdef CONFIG_BLK_DEV_INITRD
 extern void *initrd_start;
 extern void *initrd_end;
-extern void *__initrd_start;
-extern void *__initrd_end;
 int initrd_is_mapped = 0;
 extern int initrd_below_start_ok;
 #endif
@@ -79,10 +77,6 @@ static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
 
 sysmem_info_t __initdata sysmem;
 
-#ifdef CONFIG_BLK_DEV_INITRD
-int initrd_is_mapped;
-#endif
-
 #ifdef CONFIG_MMU
 extern void init_mmu(void);
 #else
@@ -197,12 +191,6 @@ static int __init parse_bootparam(const bp_tag_t* tag)
 
 void __init init_arch(bp_tag_t *bp_start)
 {
-
-#ifdef CONFIG_BLK_DEV_INITRD
-	initrd_start = &__initrd_start;
-	initrd_end = &__initrd_end;
-#endif
-
 	sysmem.nr_banks = 0;
 
 #ifdef CONFIG_CMDLINE_BOOL
diff --git a/arch/xtensa/kernel/signal.c b/arch/xtensa/kernel/signal.c
index efe4e854b3c..63c566f627b 100644
--- a/arch/xtensa/kernel/signal.c
+++ b/arch/xtensa/kernel/signal.c
@@ -19,7 +19,6 @@
 #include <linux/errno.h>
 #include <linux/ptrace.h>
 #include <linux/personality.h>
-#include <linux/freezer.h>
 #include <linux/tracehook.h>
 
 #include <asm/ucontext.h>
@@ -527,9 +526,6 @@ static void do_signal(struct pt_regs *regs)
 
 void do_notify_resume(struct pt_regs *regs)
 {
-	if (!user_mode(regs))
-		return;
-
 	if (test_thread_flag(TIF_SIGPENDING))
 		do_signal(regs);
 
diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S
index ee2e2089483..255154f820b 100644
--- a/arch/xtensa/kernel/vmlinux.lds.S
+++ b/arch/xtensa/kernel/vmlinux.lds.S
@@ -222,11 +222,6 @@ SECTIONS
   . = ALIGN(0x10);
   .bootstrap : { *(.bootstrap.literal .bootstrap.text .bootstrap.data) }
 
-  . = ALIGN(0x1000);
-  __initrd_start = .;
-  .initrd : { *(.initrd) }
-  __initrd_end = .;
-
   .ResetVector.text XCHAL_RESET_VECTOR_VADDR :
   {
     *(.ResetVector.text)
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
index c9a7c5b74a0..a8b9f1fd1e1 100644
--- a/arch/xtensa/kernel/xtensa_ksyms.c
+++ b/arch/xtensa/kernel/xtensa_ksyms.c
@@ -39,8 +39,12 @@
 EXPORT_SYMBOL(memset);
 EXPORT_SYMBOL(memcpy);
 EXPORT_SYMBOL(memmove);
+EXPORT_SYMBOL(__strncpy_user);
+EXPORT_SYMBOL(clear_page);
+EXPORT_SYMBOL(copy_page);
 
 EXPORT_SYMBOL(kernel_thread);
+EXPORT_SYMBOL(empty_zero_page);
 
 /*
  * gcc internal math functions
@@ -56,6 +60,7 @@ extern unsigned int __udivsi3(unsigned int, unsigned int);
 extern unsigned int __umodsi3(unsigned int, unsigned int);
 extern unsigned long long __umoddi3(unsigned long long, unsigned long long);
 extern unsigned long long __udivdi3(unsigned long long, unsigned long long);
+extern int __ucmpdi2(int, int);
 
 EXPORT_SYMBOL(__ashldi3);
 EXPORT_SYMBOL(__ashrdi3);
@@ -68,11 +73,31 @@ EXPORT_SYMBOL(__udivsi3);
 EXPORT_SYMBOL(__umodsi3);
 EXPORT_SYMBOL(__udivdi3);
 EXPORT_SYMBOL(__umoddi3);
+EXPORT_SYMBOL(__ucmpdi2);
+
+void __xtensa_libgcc_window_spill(void)
+{
+	BUG();
+}
+EXPORT_SYMBOL(__xtensa_libgcc_window_spill);
+
+unsigned long __sync_fetch_and_and_4(unsigned long *p, unsigned long v)
+{
+	BUG();
+}
+EXPORT_SYMBOL(__sync_fetch_and_and_4);
+
+unsigned long __sync_fetch_and_or_4(unsigned long *p, unsigned long v)
+{
+	BUG();
+}
+EXPORT_SYMBOL(__sync_fetch_and_or_4);
 
 #ifdef CONFIG_NET
 /*
  * Networking support
  */
+EXPORT_SYMBOL(csum_partial);
 EXPORT_SYMBOL(csum_partial_copy_generic);
 #endif /* CONFIG_NET */
 
diff --git a/arch/xtensa/mm/fault.c b/arch/xtensa/mm/fault.c
index 5a74c53bc69..2c2f710ed1d 100644
--- a/arch/xtensa/mm/fault.c
+++ b/arch/xtensa/mm/fault.c
@@ -126,6 +126,7 @@ good_area:
 			current->min_flt++;
 		if (fault & VM_FAULT_RETRY) {
 			flags &= ~FAULT_FLAG_ALLOW_RETRY;
+			flags |= FAULT_FLAG_TRIED;
 
 			 /* No need to up_read(&mm->mmap_sem) as we would
 			 * have already released it in __lock_page_or_retry
diff --git a/arch/xtensa/platforms/iss/Makefile b/arch/xtensa/platforms/iss/Makefile
index af96e314d71..b7d1a5c0ff7 100644
--- a/arch/xtensa/platforms/iss/Makefile
+++ b/arch/xtensa/platforms/iss/Makefile
@@ -4,5 +4,5 @@
 # "prom monitor" library routines under Linux.
 #
 
-obj-y			= io.o console.o setup.o network.o
-
+obj-y			= console.o setup.o
+obj-$(CONFIG_NET)	+= network.o
diff --git a/arch/xtensa/platforms/iss/console.c b/arch/xtensa/platforms/iss/console.c
index 2cd3d3a3400..8ab47edd7c8 100644
--- a/arch/xtensa/platforms/iss/console.c
+++ b/arch/xtensa/platforms/iss/console.c
@@ -33,7 +33,7 @@
 #endif
 
 #define SERIAL_MAX_NUM_LINES 1
-#define SERIAL_TIMER_VALUE (20 * HZ)
+#define SERIAL_TIMER_VALUE (HZ / 10)
 
 static struct tty_driver *serial_driver;
 static struct tty_port serial_port;
@@ -41,19 +41,6 @@ static struct timer_list serial_timer;
 
 static DEFINE_SPINLOCK(timer_lock);
 
-int errno;
-
-static int __simc (int a, int b, int c, int d, int e, int f) __attribute__((__noinline__));
-static int __simc (int a, int b, int c, int d, int e, int f)
-{
-	int ret;
-	__asm__ __volatile__ ("simcall\n"
-			"mov %0, a2\n"
-			"mov %1, a3\n" : "=a" (ret), "=a" (errno)
-			: : "a2", "a3");
-	return ret;
-}
-
 static char *serial_version = "0.1";
 static char *serial_name = "ISS serial driver";
 
diff --git a/arch/xtensa/platforms/iss/include/platform/serial.h b/arch/xtensa/platforms/iss/include/platform/serial.h
new file mode 100644
index 00000000000..e69de29bb2d
--- /dev/null
+++ b/arch/xtensa/platforms/iss/include/platform/serial.h
diff --git a/arch/xtensa/platforms/iss/include/platform/simcall.h b/arch/xtensa/platforms/iss/include/platform/simcall.h
index b7952c06a2b..8c43bfea05e 100644
--- a/arch/xtensa/platforms/iss/include/platform/simcall.h
+++ b/arch/xtensa/platforms/iss/include/platform/simcall.h
@@ -57,6 +57,59 @@
 #define  XTISS_SELECT_ONE_WRITE   2
 #define  XTISS_SELECT_ONE_EXCEPT  3
 
+static int errno;
+
+static inline int __simc(int a, int b, int c, int d, int e, int f)
+{
+	int ret;
+	register int a1 asm("a2") = a;
+	register int b1 asm("a3") = b;
+	register int c1 asm("a4") = c;
+	register int d1 asm("a5") = d;
+	register int e1 asm("a6") = e;
+	register int f1 asm("a7") = f;
+	__asm__ __volatile__ (
+			"simcall\n"
+			"mov %0, a2\n"
+			"mov %1, a3\n"
+			: "=a" (ret), "=a" (errno), "+r"(a1), "+r"(b1)
+			: "r"(c1), "r"(d1), "r"(e1), "r"(f1)
+			: );
+	return ret;
+}
+
+static inline int simc_open(char *file, int flags, int mode)
+{
+	return __simc(SYS_open, (int) file, flags, mode, 0, 0);
+}
+
+static inline int simc_close(int fd)
+{
+	return __simc(SYS_close, fd, 0, 0, 0, 0);
+}
+
+static inline int simc_ioctl(int fd, int request, void *arg)
+{
+	return __simc(SYS_ioctl, fd, request, (int) arg, 0, 0);
+}
+
+static inline int simc_read(int fd, void *buf, size_t count)
+{
+	return __simc(SYS_read, fd, (int) buf, count, 0, 0);
+}
+
+static inline int simc_write(int fd, void *buf, size_t count)
+{
+	return __simc(SYS_write, fd, (int) buf, count, 0, 0);
+}
+
+static inline int simc_poll(int fd)
+{
+	struct timeval tv = { .tv_sec = 0, .tv_usec = 0 };
+
+	return __simc(SYS_select_one, fd, XTISS_SELECT_ONE_READ, (int)&tv,
+			0, 0);
+}
 
 #endif /* _XTENSA_PLATFORM_ISS_SIMCALL_H */
 
diff --git a/arch/xtensa/platforms/iss/io.c b/arch/xtensa/platforms/iss/io.c
deleted file mode 100644
index 571d0b24f89..00000000000
--- a/arch/xtensa/platforms/iss/io.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/* This file isn't really needed right now. */
-
-#if 0
-
-#include <asm/io.h>
-#include <platform/platform-iss/simcall.h>
-
-extern int __simc ();
-
-
-char iss_serial_getc()
-{
-  char c;
-  __simc( SYS_read, 0, &c, 1 );
-  return c;
-}
-
-void iss_serial_putc( char c )
-{
-  __simc( SYS_write, 1, &c, 1 );
-}
-
-void iss_serial_puts( char *s )
-{
-  if( s != 0 && *s != 0 )
-    __simc( SYS_write, 1, s, strlen(s) );
-}
-
-/*#error Need I/O ports to specific hardware!*/
-
-#endif
-
diff --git a/arch/xtensa/platforms/iss/network.c b/arch/xtensa/platforms/iss/network.c
index 7dde2445642..7d0fea6d7f2 100644
--- a/arch/xtensa/platforms/iss/network.c
+++ b/arch/xtensa/platforms/iss/network.c
@@ -101,55 +101,6 @@ struct iss_net_private {
 
 };
 
-/* ======================= ISS SIMCALL INTERFACE =========================== */
-
-/* Note: __simc must _not_ be declared inline! */
-
-static int errno;
-
-static int __simc (int a, int b, int c, int d, int e, int f) __attribute__((__noinline__));
-static int __simc (int a, int b, int c, int d, int e, int f)
-{
-	int ret;
-	__asm__ __volatile__ ("simcall\n"
-	    		      "mov %0, a2\n"
-			      "mov %1, a3\n" : "=a" (ret), "=a" (errno)
-			      : : "a2", "a3");
-	return ret;
-}
-
-static int inline simc_open(char *file, int flags, int mode)
-{
-	return __simc(SYS_open, (int) file, flags, mode, 0, 0);
-}
-
-static int inline simc_close(int fd)
-{
-	return __simc(SYS_close, fd, 0, 0, 0, 0);
-}
-
-static int inline simc_ioctl(int fd, int request, void *arg)
-{
-	return __simc(SYS_ioctl, fd, request, (int) arg, 0, 0);
-}
-
-static int inline simc_read(int fd, void *buf, size_t count)
-{
-	return __simc(SYS_read, fd, (int) buf, count, 0, 0);
-}
-
-static int inline simc_write(int fd, void *buf, size_t count)
-{
-	return __simc(SYS_write, fd, (int) buf, count, 0, 0);
-}
-
-static int inline simc_poll(int fd)
-{
-	struct timeval tv = { .tv_sec = 0, .tv_usec = 0 };
-
-	return __simc(SYS_select_one, fd, XTISS_SELECT_ONE_READ, (int)&tv,0,0);
-}
-
 /* ================================ HELPERS ================================ */
 
 
diff --git a/arch/xtensa/platforms/iss/setup.c b/arch/xtensa/platforms/iss/setup.c
index f60c8cf6dfb..927acf378ea 100644
--- a/arch/xtensa/platforms/iss/setup.c
+++ b/arch/xtensa/platforms/iss/setup.c
@@ -38,16 +38,22 @@ void __init platform_init(bp_tag_t* bootparam)
 
 }
 
+#ifdef CONFIG_PCI
+void platform_pcibios_init(void)
+{
+}
+#endif
+
 void platform_halt(void)
 {
-	printk (" ** Called platform_halt(), looping forever! **\n");
-	while (1);
+	pr_info(" ** Called platform_halt() **\n");
+	__asm__ __volatile__("movi a2, 1\nsimcall\n");
 }
 
 void platform_power_off(void)
 {
-	printk (" ** Called platform_power_off(), looping forever! **\n");
-	while (1);
+	pr_info(" ** Called platform_power_off() **\n");
+	__asm__ __volatile__("movi a2, 1\nsimcall\n");
 }
 void platform_restart(void)
 {