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authorMyungJoo Ham <myungjoo.ham@samsung.com>2014-03-20 15:29:15 +0900
committerMyungJoo Ham <myungjoo.ham@samsung.com>2014-03-20 15:29:15 +0900
commitb3a6e2c5448b7d340ff6bea9e99f79989453b1f7 (patch)
tree03f7e2c45fa76d6f65f46ba1de2b2541ebe3dc7b /patches.tizen/0833-arm-exynos-Fix-SFR-base-address-of-DMC-in-EXYNOS4-se.patch
parent9157e421d4c229d2b45e00b4e36ede3606033ad3 (diff)
downloadlinux-3.10-devel/v3.10-ltsi.tar.gz
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add Tizen ARM reference patchesdevel/v3.10-ltsi
- Imported 20140319.065243: author Jonghwa Lee <jonghwa3.lee@samsung.com> Wed, 19 Mar 2014 00:55:10 +0900 (00:55 +0900) committer Jonghwa Lee <jonghwa3.lee@samsung.com> Wed, 19 Mar 2014 01:13:40 +0900 (01:13 +0900) commit 7464f7e4fed02c10aa619746890bdd96b1b43fc3 Based on Linux 3.10.19 LTS. Change-Id: I17572de4952319a6815c18379bdbe35b1db0a88c Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Diffstat (limited to 'patches.tizen/0833-arm-exynos-Fix-SFR-base-address-of-DMC-in-EXYNOS4-se.patch')
-rw-r--r--patches.tizen/0833-arm-exynos-Fix-SFR-base-address-of-DMC-in-EXYNOS4-se.patch93
1 files changed, 93 insertions, 0 deletions
diff --git a/patches.tizen/0833-arm-exynos-Fix-SFR-base-address-of-DMC-in-EXYNOS4-se.patch b/patches.tizen/0833-arm-exynos-Fix-SFR-base-address-of-DMC-in-EXYNOS4-se.patch
new file mode 100644
index 00000000000..9d806729503
--- /dev/null
+++ b/patches.tizen/0833-arm-exynos-Fix-SFR-base-address-of-DMC-in-EXYNOS4-se.patch
@@ -0,0 +1,93 @@
+From dc35488b130cc195ba36cc8c4c10a450f87a59eb Mon Sep 17 00:00:00 2001
+From: Jonghwa Lee <jonghwa3.lee@samsung.com>
+Date: Mon, 7 Oct 2013 17:03:32 +0900
+Subject: [PATCH 0833/1302] arm: exynos: Fix SFR base address of DMC in EXYNOS4
+ series.
+
+This patch fixes DMC's physical SFR address base which is used for
+static memory mapping as EXYNOS4210 and EXYNOS4x12 uses different SFR
+addresses for them.
+
+Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
+Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
+---
+ arch/arm/mach-exynos/common.c | 30 ++++++++++++++++++++----------
+ arch/arm/mach-exynos/include/mach/map.h | 7 +++++--
+ 2 files changed, 25 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
+index a8b62e4..d0dcfc0 100644
+--- a/arch/arm/mach-exynos/common.c
++++ b/arch/arm/mach-exynos/common.c
+@@ -190,16 +190,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+- .virtual = (unsigned long)S5P_VA_DMC0,
+- .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
+- .length = SZ_64K,
+- .type = MT_DEVICE,
+- }, {
+- .virtual = (unsigned long)S5P_VA_DMC1,
+- .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1),
+- .length = SZ_64K,
+- .type = MT_DEVICE,
+- }, {
+ .virtual = (unsigned long)S3C_VA_USB_HSPHY,
+ .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
+ .length = SZ_4K,
+@@ -231,6 +221,16 @@ static struct map_desc exynos4210_iodesc[] __initdata = {
+ .pfn = __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
++ }, {
++ .virtual = (unsigned long)S5P_VA_DMC0,
++ .pfn = __phys_to_pfn(EXYNOS4210_PA_DMC0),
++ .length = SZ_64K,
++ .type = MT_DEVICE,
++ }, {
++ .virtual = (unsigned long)S5P_VA_DMC1,
++ .pfn = __phys_to_pfn(EXYNOS4210_PA_DMC1),
++ .length = SZ_64K,
++ .type = MT_DEVICE,
+ },
+ };
+
+@@ -240,6 +240,16 @@ static struct map_desc exynos4x12_iodesc[] __initdata = {
+ .pfn = __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
++ }, {
++ .virtual = (unsigned long)S5P_VA_DMC0,
++ .pfn = __phys_to_pfn(EXYNOS4x12_PA_DMC0),
++ .length = SZ_64K,
++ .type = MT_DEVICE,
++ }, {
++ .virtual = (unsigned long)S5P_VA_DMC1,
++ .pfn = __phys_to_pfn(EXYNOS4x12_PA_DMC1),
++ .length = SZ_64K,
++ .type = MT_DEVICE,
+ },
+ };
+
+diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
+index e721398..9d8a9b7 100644
+--- a/arch/arm/mach-exynos/include/mach/map.h
++++ b/arch/arm/mach-exynos/include/mach/map.h
+@@ -75,8 +75,11 @@
+
+ #define EXYNOS4_PA_KEYPAD 0x100A0000
+
+-#define EXYNOS4_PA_DMC0 0x10400000
+-#define EXYNOS4_PA_DMC1 0x10410000
++#define EXYNOS4210_PA_DMC0 0x10400000
++#define EXYNOS4210_PA_DMC1 0x10410000
++
++#define EXYNOS4x12_PA_DMC0 0x10600000
++#define EXYNOS4x12_PA_DMC1 0x10610000
+
+ #define EXYNOS4_PA_COMBINER 0x10440000
+ #define EXYNOS5_PA_COMBINER 0x10440000
+--
+1.8.3.2
+