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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-02-12 14:36:24 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-03-14 19:42:35 +0000
commit1027247f6eb727db6c600b9eb02796f0766ae704 (patch)
tree5ed53827e63426a5a2358cced2e20c4fdfc20970 /mm/mmu_context.c
parentd10fca9f39238b07cc670b441d2b423de30359d2 (diff)
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ARM: Add L2 cache handling to smp boot support
The page table and secondary data which we're asking the secondary CPU to make use of has to hit RAM to ensure that the secondary CPU can see it since it may not be taking part in coherency or cache searches at this point. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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