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author | Andi Kleen <ak@suse.de> | 2005-09-29 22:05:55 +0200 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-29 15:41:42 -0700 |
commit | 7d318d774789657c37a5e994a4a2cf59d4879ae7 (patch) | |
tree | ac48b3dd2cd7c8bedb049f4062ef9959bc5c73bb /include | |
parent | 5acbc5cb507e6c381b70093b1081854708e82b16 (diff) | |
download | linux-3.10-7d318d774789657c37a5e994a4a2cf59d4879ae7.tar.gz linux-3.10-7d318d774789657c37a5e994a4a2cf59d4879ae7.tar.bz2 linux-3.10-7d318d774789657c37a5e994a4a2cf59d4879ae7.zip |
[PATCH] Fix up TLB flush filter disabling
I checked with AMD and they requested to only disable it for family 15.
Also disable it for i386 too. And some style fixes.
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-x86_64/msr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h index 4d727f3f555..5a7fe3c6c3d 100644 --- a/include/asm-x86_64/msr.h +++ b/include/asm-x86_64/msr.h @@ -234,6 +234,7 @@ static inline unsigned int cpuid_edx(unsigned int op) #define MSR_K8_TOP_MEM1 0xC001001A #define MSR_K8_TOP_MEM2 0xC001001D #define MSR_K8_SYSCFG 0xC0010010 +#define MSR_K8_HWCR 0xC0010015 /* K6 MSRs */ #define MSR_K6_EFER 0xC0000080 |