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authorJosh Wu <josh.wu@atmel.com>2013-12-10 09:25:47 -0300
committerChanho Park <chanho61.park@samsung.com>2014-11-18 11:52:40 +0900
commit53a2daf7b0c52b5f713bbb5ae7ed54a437357228 (patch)
tree7a8f86b79eb87de9390ebfe144d4fde6b6dd62d0 /include
parentd41f75b0c9406c36333f0d48623990d72dbe3975 (diff)
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upstream: [media] v4l: atmel-isi: Should clear bits before set the hardware register
In the ISI driver it reads the config register to get original value, then set the correct FRATE_DIV and YCC_SWAP_MODE directly. This will cause some bits overlap. So we need to clear these bits first, then set correct value. This patch fix it. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'include')
-rw-r--r--include/media/atmel-isi.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/media/atmel-isi.h b/include/media/atmel-isi.h
index 65682307570..2b023471ac8 100644
--- a/include/media/atmel-isi.h
+++ b/include/media/atmel-isi.h
@@ -56,6 +56,7 @@
#define ISI_CFG1_FRATE_DIV_6 (5 << 8)
#define ISI_CFG1_FRATE_DIV_7 (6 << 8)
#define ISI_CFG1_FRATE_DIV_8 (7 << 8)
+#define ISI_CFG1_FRATE_DIV_MASK (7 << 8)
#define ISI_CFG1_DISCR (1 << 11)
#define ISI_CFG1_FULL_MODE (1 << 12)
@@ -66,6 +67,7 @@
#define ISI_CFG2_YCC_SWAP_MODE_1 (1 << 28)
#define ISI_CFG2_YCC_SWAP_MODE_2 (2 << 28)
#define ISI_CFG2_YCC_SWAP_MODE_3 (3 << 28)
+#define ISI_CFG2_YCC_SWAP_MODE_MASK (3 << 28)
#define ISI_CFG2_IM_VSIZE_OFFSET 0
#define ISI_CFG2_IM_HSIZE_OFFSET 16
#define ISI_CFG2_IM_VSIZE_MASK (0x7FF << ISI_CFG2_IM_VSIZE_OFFSET)