summaryrefslogtreecommitdiff
path: root/include/media
diff options
context:
space:
mode:
authorSylwester Nawrocki <s.nawrocki@samsung.com>2013-03-29 14:12:39 -0300
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-03-31 10:54:18 -0300
commit2b13f7d4e3822ed4de37b73b009ff81932e884bb (patch)
tree15a7e2ffc126318fdfd6244957ae64b18b03ddc9 /include/media
parente2985a260e6615503b4fa8e66788708e750c7750 (diff)
downloadlinux-3.10-2b13f7d4e3822ed4de37b73b009ff81932e884bb.tar.gz
linux-3.10-2b13f7d4e3822ed4de37b73b009ff81932e884bb.tar.bz2
linux-3.10-2b13f7d4e3822ed4de37b73b009ff81932e884bb.zip
[media] s5p-fimc: Add device tree based sensors registration
The sensor (I2C and/or SPI client) devices are instantiated by their corresponding control bus drivers. Since the I2C client's master clock is often provided by a video bus receiver (host interface) or other than I2C/SPI controller device, the drivers of those client devices are not accessing hardware in their driver's probe() callback. Instead, after enabling clock, the host driver calls back into a sub-device when it wants to activate them. This pattern is used by some in-tree drivers and this patch also uses it for DT case. This patch is intended as a first step for adding device tree support to the S5P/Exynos SoC camera drivers. The second one is adding support for asynchronous sub-devices registration and clock control from sub-device driver level. The bindings shall not change when asynchronous probing support is added. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'include/media')
-rw-r--r--include/media/s5p_fimc.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/media/s5p_fimc.h b/include/media/s5p_fimc.h
index e2c59896269..e2434bb0b30 100644
--- a/include/media/s5p_fimc.h
+++ b/include/media/s5p_fimc.h
@@ -45,6 +45,9 @@ enum fimc_bus_type {
FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
};
+#define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
+#define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
+
struct i2c_board_info;
/**