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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-03 08:52:26 -0700 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-03 08:52:26 -0700 |
commit | ccaa36f73544163ef6e15eb29a620130755f6001 (patch) | |
tree | b5cf50592c45e25edbd66fea451e6941e455fa83 /include/asm-ppc | |
parent | b4a9071af62f95dc6d22040a0b37ac7225ce4d54 (diff) | |
parent | 5e980823581682d1566e7b5089cf827ddd5f3c94 (diff) | |
download | linux-3.10-ccaa36f73544163ef6e15eb29a620130755f6001.tar.gz linux-3.10-ccaa36f73544163ef6e15eb29a620130755f6001.tar.bz2 linux-3.10-ccaa36f73544163ef6e15eb29a620130755f6001.zip |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (29 commits)
[POWERPC] Fix rheap alignment problem
[POWERPC] Use check_legacy_ioport() for ISAPnP
[POWERPC] Avoid NULL pointer in gpio1_interrupt
[POWERPC] Enable generic rtc hook for the MPC8349 mITX
[POWERPC] Add powerpc get/set_rtc_time interface to new generic rtc class
[POWERPC] Create a "wrapper" script and use it in arch/powerpc/boot
[POWERPC] fix spin lock nesting in hvc_iseries
[POWERPC] EEH failure to mark pci slot as frozen.
[POWERPC] update powerpc defconfig files after libata kconfig breakage
[POWERPC] enable sysrq in pmac32_defconfig
[POWERPC] UPIO_TSI cleanup
[POWERPC] rewrite mkprep and mkbugboot in sane C
[POWERPC] maple/pci iomem annotations
[POWERPC] powerpc oprofile __user annotations
[POWERPC] cell spufs iomem annotations
[POWERPC] NULL noise removal: spufs
[POWERPC] ppc math-emu needs -fno-builtin-fabs for math.c and fabs.c
[POWERPC] update mpc8349_itx_defconfig and remove some debug settings
[POWERPC] Always call cede in pseries dedicated idle loop
[POWERPC] Fix loop logic in irq_alloc_virt()
...
Diffstat (limited to 'include/asm-ppc')
-rw-r--r-- | include/asm-ppc/cpm2.h | 63 | ||||
-rw-r--r-- | include/asm-ppc/fs_pd.h | 36 | ||||
-rw-r--r-- | include/asm-ppc/rheap.h | 4 |
3 files changed, 102 insertions, 1 deletions
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h index f6a7ff04ffe..220cc2debe0 100644 --- a/include/asm-ppc/cpm2.h +++ b/include/asm-ppc/cpm2.h @@ -42,6 +42,8 @@ #define CPM_CR_IDMA4_SBLOCK (0x17) #define CPM_CR_MCC1_SBLOCK (0x1c) +#define CPM_CR_FCC_SBLOCK(x) (x + 0x10) + #define CPM_CR_SCC1_PAGE (0x00) #define CPM_CR_SCC2_PAGE (0x01) #define CPM_CR_SCC3_PAGE (0x02) @@ -62,6 +64,8 @@ #define CPM_CR_MCC1_PAGE (0x07) #define CPM_CR_MCC2_PAGE (0x08) +#define CPM_CR_FCC_PAGE(x) (x + 0x04) + /* Some opcodes (there are more...later) */ #define CPM_CR_INIT_TRX ((ushort)0x0000) @@ -173,6 +177,10 @@ typedef struct cpm_buf_desc { #define PROFF_I2C_BASE ((uint)0x8afc) #define PROFF_IDMA4_BASE ((uint)0x8afe) +#define PROFF_SCC_SIZE ((uint)0x100) +#define PROFF_FCC_SIZE ((uint)0x100) +#define PROFF_SMC_SIZE ((uint)64) + /* The SMCs are relocated to any of the first eight DPRAM pages. * We will fix these at the first locations of DPRAM, until we * get some microcode patches :-). @@ -1186,7 +1194,60 @@ typedef struct im_idma { #define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128)) #define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0) #define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1) -#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(2) +#define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2) + +/* Clocks and GRG's */ + +enum cpm_clk_dir { + CPM_CLK_RX, + CPM_CLK_TX, + CPM_CLK_RTX +}; + +enum cpm_clk_target { + CPM_CLK_SCC1, + CPM_CLK_SCC2, + CPM_CLK_SCC3, + CPM_CLK_SCC4, + CPM_CLK_FCC1, + CPM_CLK_FCC2, + CPM_CLK_FCC3 +}; + +enum cpm_clk { + CPM_CLK_NONE = 0, + CPM_BRG1, /* Baud Rate Generator 1 */ + CPM_BRG2, /* Baud Rate Generator 2 */ + CPM_BRG3, /* Baud Rate Generator 3 */ + CPM_BRG4, /* Baud Rate Generator 4 */ + CPM_BRG5, /* Baud Rate Generator 5 */ + CPM_BRG6, /* Baud Rate Generator 6 */ + CPM_BRG7, /* Baud Rate Generator 7 */ + CPM_BRG8, /* Baud Rate Generator 8 */ + CPM_CLK1, /* Clock 1 */ + CPM_CLK2, /* Clock 2 */ + CPM_CLK3, /* Clock 3 */ + CPM_CLK4, /* Clock 4 */ + CPM_CLK5, /* Clock 5 */ + CPM_CLK6, /* Clock 6 */ + CPM_CLK7, /* Clock 7 */ + CPM_CLK8, /* Clock 8 */ + CPM_CLK9, /* Clock 9 */ + CPM_CLK10, /* Clock 10 */ + CPM_CLK11, /* Clock 11 */ + CPM_CLK12, /* Clock 12 */ + CPM_CLK13, /* Clock 13 */ + CPM_CLK14, /* Clock 14 */ + CPM_CLK15, /* Clock 15 */ + CPM_CLK16, /* Clock 16 */ + CPM_CLK17, /* Clock 17 */ + CPM_CLK18, /* Clock 18 */ + CPM_CLK19, /* Clock 19 */ + CPM_CLK20, /* Clock 20 */ + CPM_CLK_DUMMY +}; + +extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode); #endif /* __CPM2__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-ppc/fs_pd.h b/include/asm-ppc/fs_pd.h new file mode 100644 index 00000000000..8691327653a --- /dev/null +++ b/include/asm-ppc/fs_pd.h @@ -0,0 +1,36 @@ +/* + * Platform information definitions. + * + * 2006 (c) MontaVista Software, Inc. + * Vitaly Bordug <vbordug@ru.mvista.com> + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef FS_PD_H +#define FS_PD_H + +static inline int uart_baudrate(void) +{ + int baud; + bd_t *bd = (bd_t *) __res; + + if (bd->bi_baudrate) + baud = bd->bi_baudrate; + else + baud = -1; + return baud; +} + +static inline int uart_clock(void) +{ + return (((bd_t *) __res)->bi_intfreq); +} + +#define cpm2_map(member) (&cpm2_immr->member) +#define cpm2_map_size(member, size) (&cpm2_immr->member) +#define cpm2_unmap(addr) do {} while(0) + +#endif diff --git a/include/asm-ppc/rheap.h b/include/asm-ppc/rheap.h index e6ca1f67ced..65b93225a77 100644 --- a/include/asm-ppc/rheap.h +++ b/include/asm-ppc/rheap.h @@ -62,6 +62,10 @@ extern int rh_attach_region(rh_info_t * info, void *start, int size); /* Detach a free region */ extern void *rh_detach_region(rh_info_t * info, void *start, int size); +/* Allocate the given size from the remote heap (with alignment) */ +extern void *rh_alloc_align(rh_info_t * info, int size, int alignment, + const char *owner); + /* Allocate the given size from the remote heap */ extern void *rh_alloc(rh_info_t * info, int size, const char *owner); |