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| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2007-02-23 21:39:38 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-26 23:06:06 +0000 |
| commit | f13cc01d8d3630ba42680ac56b3bedfce812e531 (patch) | |
| tree | 0737d5e36474827dff3bc05cb1071946b3e366fa /include/asm-mips | |
| parent | 3dac2561e2ed8d75a8bb682c25a32b271298ff49 (diff) | |
| download | linux-3.10-f13cc01d8d3630ba42680ac56b3bedfce812e531.tar.gz linux-3.10-f13cc01d8d3630ba42680ac56b3bedfce812e531.tar.bz2 linux-3.10-f13cc01d8d3630ba42680ac56b3bedfce812e531.zip | |
[MIPS] SNI: MIPS_CPU_IRQ_BASE cleanup
Use MIPS_CPU_IRQ_BASE instead of own define.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
| -rw-r--r-- | include/asm-mips/sni.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h index 62f9be6f732..f257509b914 100644 --- a/include/asm-mips/sni.h +++ b/include/asm-mips/sni.h @@ -141,10 +141,9 @@ extern unsigned int sni_brd_type; #define A20R_PT_TIM0_ACK 0xbc050000 #define A20R_PT_TIM1_ACK 0xbc060000 -#define SNI_MIPS_IRQ_CPU_BASE 16 -#define SNI_MIPS_IRQ_CPU_TIMER (SNI_MIPS_IRQ_CPU_BASE+7) +#define SNI_MIPS_IRQ_CPU_TIMER (MIPS_CPU_IRQ_BASE+7) -#define SNI_A20R_IRQ_BASE SNI_MIPS_IRQ_CPU_BASE +#define SNI_A20R_IRQ_BASE MIPS_CPU_IRQ_BASE #define SNI_A20R_IRQ_TIMER (SNI_A20R_IRQ_BASE+5) #define SNI_DS1216_A20R_BASE 0xbc081ffc @@ -155,7 +154,7 @@ extern unsigned int sni_brd_type; #define SNI_PCIT_INT_START 24 #define SNI_PCIT_INT_END 30 -#define PCIT_IRQ_ETHERNET (SNI_MIPS_IRQ_CPU_BASE + 5) +#define PCIT_IRQ_ETHERNET (MIPS_CPU_IRQ_BASE + 5) #define PCIT_IRQ_INTA (SNI_PCIT_INT_START + 0) #define PCIT_IRQ_INTB (SNI_PCIT_INT_START + 1) #define PCIT_IRQ_INTC (SNI_PCIT_INT_START + 2) @@ -180,7 +179,7 @@ extern unsigned int sni_brd_type; #define PCIMT_IRQ_EISA 29 #define PCIMT_IRQ_SCSI 30 -#define PCIMT_IRQ_ETHERNET (SNI_MIPS_IRQ_CPU_BASE+6) +#define PCIMT_IRQ_ETHERNET (MIPS_CPU_IRQ_BASE+6) #if 0 #define PCIMT_IRQ_TEMPERATURE 24 |