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author | Ralf Baechle <ralf@linux-mips.org> | 2005-05-31 11:49:19 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 19:31:17 +0100 |
commit | e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f (patch) | |
tree | 1928e8b0a4b7fb615e5a9f65dc934ba2e74cb9cd /include/asm-mips/cpu-features.h | |
parent | 10f650db1bcc193ea07d4f8c2f07315da38ea0c4 (diff) | |
download | linux-3.10-e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f.tar.gz linux-3.10-e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f.tar.bz2 linux-3.10-e50c0a8fa60da9ac0e0a70caa8a3a803815c1f2f.zip |
Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cpu-features.h')
-rw-r--r-- | include/asm-mips/cpu-features.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 012deda63e6..4930824a43a 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -105,6 +105,10 @@ #endif #endif +#ifndef cpu_has_dsp +#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) +#endif + /* * Certain CPUs may throw bizarre exceptions if not the whole cacheline * contains valid instructions. For these we ensure proper alignment of |