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| author | SAN People <andrew@sanpeople.com> | 2006-01-09 17:05:41 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-01-09 17:05:41 +0000 |
| commit | 73a59c1c4af06c675a168d698d3ebfbb3270ddbe (patch) | |
| tree | fa1708e19cf89a6bd13c8f7725a9cc67cc4ae6fd /include/asm-arm/arch-at91rm9200/debug-macro.S | |
| parent | 50365c57860cd931c2d806057e0987634797e9af (diff) | |
| download | linux-3.10-73a59c1c4af06c675a168d698d3ebfbb3270ddbe.tar.gz linux-3.10-73a59c1c4af06c675a168d698d3ebfbb3270ddbe.tar.bz2 linux-3.10-73a59c1c4af06c675a168d698d3ebfbb3270ddbe.zip | |
[ARM] 3240/2: AT91RM9200 support for 2.6 (Core)
Patch from SAN People
Following changes were made to clock.c:
1) Replaced <asm/hardware/clock.h> with <linux/clk.h>
2) Removed old unused clk_enable & clk_disable.
3) Replaced clk_use/clk_unuse with clk_enable/clk_disable.
Otherwise it's the same as the previous patch.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/debug-macro.S')
| -rw-r--r-- | include/asm-arm/arch-at91rm9200/debug-macro.S | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91rm9200/debug-macro.S b/include/asm-arm/arch-at91rm9200/debug-macro.S new file mode 100644 index 00000000000..f496b54c4c3 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/debug-macro.S @@ -0,0 +1,38 @@ +/* + * include/asm-arm/arch-at91rm9200/debug-macro.S + * + * Copyright (C) 2003-2005 SAN People + * + * Debugging macro include header + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include <asm/hardware.h> + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + ldreq \rx, =AT91_BASE_SYS @ System peripherals (phys address) + ldrne \rx, =AT91_VA_BASE_SYS @ System peripherals (virt address) + .endm + + .macro senduart,rd,rx + strb \rd, [\rx, #AT91_DBGU_THR] @ Write to Transmitter Holding Register + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #AT91_DBGU_SR] @ Read Status Register + tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit + beq 1001b + .endm + + .macro busyuart,rd,rx +1001: ldr \rd, [\rx, #AT91_DBGU_SR] @ Read Status Register + tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete + beq 1001b + .endm + |