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author | Martin Peres <martin.peres@labri.fr> | 2012-12-07 02:26:02 +0100 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2013-02-20 16:00:23 +1000 |
commit | 9d7175c808793b3e30db455da7529d3c05b00712 (patch) | |
tree | d6106fa66e7d850ae1c705db81f2e9b85e273227 /drivers | |
parent | 382b5bbb4a1ef96be863b71593d23968308b6d24 (diff) | |
download | linux-3.10-9d7175c808793b3e30db455da7529d3c05b00712.tar.gz linux-3.10-9d7175c808793b3e30db455da7529d3c05b00712.tar.bz2 linux-3.10-9d7175c808793b3e30db455da7529d3c05b00712.zip |
drm/nv41/bus: report useful data on mmio fault
Based on Ben Skeggs's nvc0 patch. Tested on my nv4b, 84 and 92.
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/bus/nv31.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/bus/nv50.c | 8 |
2 files changed, 15 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/bus/nv31.c b/drivers/gpu/drm/nouveau/core/subdev/bus/nv31.c index d996b5dc0cb..34132aef34e 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/bus/nv31.c +++ b/drivers/gpu/drm/nouveau/core/subdev/bus/nv31.c @@ -42,8 +42,14 @@ nv31_bus_intr(struct nouveau_subdev *subdev) subdev->intr(subdev); } - if (stat & 0x00000008) { - nv_error(pbus, "MMIO FAULT\n"); /* NV41- */ + if (stat & 0x00000008) { /* NV41- */ + u32 addr = nv_rd32(pbus, 0x009084); + u32 data = nv_rd32(pbus, 0x009088); + + nv_error(pbus, "MMIO %s of 0x%08x FAULT at 0x%06x\n", + (addr & 0x00000002) ? "write" : "read", data, + (addr & 0x00fffffc)); + stat &= ~0x00000008; nv_wr32(pbus, 0x001100, 0x00000008); } diff --git a/drivers/gpu/drm/nouveau/core/subdev/bus/nv50.c b/drivers/gpu/drm/nouveau/core/subdev/bus/nv50.c index 0eed34f93e5..f5b2117fa8c 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/bus/nv50.c +++ b/drivers/gpu/drm/nouveau/core/subdev/bus/nv50.c @@ -36,7 +36,13 @@ nv50_bus_intr(struct nouveau_subdev *subdev) u32 stat = nv_rd32(pbus, 0x001100) & nv_rd32(pbus, 0x001140); if (stat & 0x00000008) { - nv_error(pbus, "MMIO FAULT\n"); + u32 addr = nv_rd32(pbus, 0x009084); + u32 data = nv_rd32(pbus, 0x009088); + + nv_error(pbus, "MMIO %s of 0x%08x FAULT at 0x%06x\n", + (addr & 0x00000002) ? "write" : "read", data, + (addr & 0x00fffffc)); + stat &= ~0x00000008; nv_wr32(pbus, 0x001100, 0x00000008); } |