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| author | Hyungwon Hwang <human.hwang@samsung.com> | 2014-08-22 14:44:44 +0900 |
|---|---|---|
| committer | Hyungwon Hwang <human.hwang@samsung.com> | 2014-08-22 14:44:44 +0900 |
| commit | 2461f9c74cbd8f31dd5ed3bea4ad178e9d508356 (patch) | |
| tree | 47c3da6a71520083d9b9be4e9cec0ef9cdb7f322 /drivers | |
| parent | 88cc2848ff065698de0c19cb4f014154ceeffb48 (diff) | |
| download | linux-3.10-2461f9c74cbd8f31dd5ed3bea4ad178e9d508356.tar.gz linux-3.10-2461f9c74cbd8f31dd5ed3bea4ad178e9d508356.tar.bz2 linux-3.10-2461f9c74cbd8f31dd5ed3bea4ad178e9d508356.zip | |
exynos/drm: gsc: fix build error related with write back
Fix the variable type and the macro name to make this driver buildable.
Change-Id: I14f95c66db7bcfc8170e330e065f3de80c34ada8
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_gsc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gsc.c b/drivers/gpu/drm/exynos/exynos_drm_gsc.c index 081ac5e71f1..870eb8ccb60 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_gsc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_gsc.c @@ -1533,7 +1533,7 @@ static int gsc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd) struct drm_exynos_ipp_property *property; struct drm_exynos_ipp_config *config; struct drm_exynos_pos img_pos[EXYNOS_DRM_OPS_MAX]; - struct drm_exynos_ipp_set_wb set_wb; + struct drm_exynos_display_set_wb set_wb; u32 cfg; int ret, i; @@ -1577,7 +1577,7 @@ static int gsc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd) set_wb.enable = 1; set_wb.refresh = property->refresh_rate; gsc_set_gscblk_fimd_wb(ctx, set_wb.enable); - exynos_drm_ippnb_send_event(IPP_SET_WRITEBACK, (void *)&set_wb); + exynos_drm_ippnb_send_event(EXYNOS_DISPLAY_OUTPUT_WB, (void *)&set_wb); /* src local path */ cfg = gsc_read(GSC_IN_CON); @@ -1628,7 +1628,7 @@ static int gsc_ippdrv_start(struct device *dev, enum drm_exynos_ipp_cmd cmd) static void gsc_ippdrv_stop(struct device *dev, enum drm_exynos_ipp_cmd cmd) { struct gsc_context *ctx = get_gsc_context(dev); - struct drm_exynos_ipp_set_wb set_wb = {0, 0}; + struct drm_exynos_display_set_wb set_wb = {0, 0}; u32 cfg; DRM_DEBUG_KMS("%s:cmd[%d]\n", __func__, cmd); @@ -1639,7 +1639,7 @@ static void gsc_ippdrv_stop(struct device *dev, enum drm_exynos_ipp_cmd cmd) break; case IPP_CMD_WB: gsc_set_gscblk_fimd_wb(ctx, set_wb.enable); - exynos_drm_ippnb_send_event(IPP_SET_WRITEBACK, (void *)&set_wb); + exynos_drm_ippnb_send_event(EXYNOS_DISPLAY_OUTPUT_WB, (void *)&set_wb); break; case IPP_CMD_OUTPUT: default: |