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| author | Anatolij Gustschin <agust@denx.de> | 2011-05-13 14:12:15 +0200 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2011-05-24 16:28:51 +0200 |
| commit | 3cadf9455c31de340ed77394dfad330caeb66b58 (patch) | |
| tree | 4523ca559a55147e6a90b275c06eeb14d8ced1a4 /drivers/video/mb862xx | |
| parent | dcdf2f7e7e154957f913e5468e3715e1a0401138 (diff) | |
| download | linux-3.10-3cadf9455c31de340ed77394dfad330caeb66b58.tar.gz linux-3.10-3cadf9455c31de340ed77394dfad330caeb66b58.tar.bz2 linux-3.10-3cadf9455c31de340ed77394dfad330caeb66b58.zip | |
video: mb862xxfb: use pre-initialized configuration for PCI GDCs
If the bootloader has already initialized the display
controller, do not re-initialize it in the driver. Take over
the bootloader's configuration instead. This is already supported
for non PCI GDCs Lime and Mint. Add this functionality for PCI
GDCs Coral-P and Coral-PA. It is useful to avoid flicker and
also avoids unneeded init delays while booting.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'drivers/video/mb862xx')
| -rw-r--r-- | drivers/video/mb862xx/mb862xxfb.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/drivers/video/mb862xx/mb862xxfb.c b/drivers/video/mb862xx/mb862xxfb.c index 825795894da..a1b81e73394 100644 --- a/drivers/video/mb862xx/mb862xxfb.c +++ b/drivers/video/mb862xx/mb862xxfb.c @@ -746,13 +746,21 @@ static int coralp_init(struct mb862xxfb_par *par) cn = (ver & GC_CID_CNAME_MSK) >> 8; ver = ver & GC_CID_VERSION_MSK; if (cn == 3) { + unsigned long reg; + dev_info(par->dev, "Fujitsu Coral-%s GDC Rev.%d found\n",\ (ver == 6) ? "P" : (ver == 8) ? "PA" : "?", par->pdev->revision); - outreg(host, GC_CCF, GC_CCF_CGE_166 | GC_CCF_COT_133); - udelay(200); - outreg(host, GC_MMR, GC_MMR_CORALP_EVB_VAL); - udelay(10); + reg = inreg(disp, GC_DCM1); + if (reg & GC_DCM01_DEN && reg & GC_DCM01_L0E) + par->pre_init = 1; + + if (!par->pre_init) { + outreg(host, GC_CCF, GC_CCF_CGE_166 | GC_CCF_COT_133); + udelay(200); + outreg(host, GC_MMR, GC_MMR_CORALP_EVB_VAL); + udelay(10); + } /* Clear interrupt status */ outreg(host, GC_IST, 0); } else { |