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authorPaul Mundt <lethal@linux-sh.org>2012-05-25 15:26:01 +0900
committerPaul Mundt <lethal@linux-sh.org>2012-05-25 15:26:01 +0900
commit75f5f8a56e0fdf6d32b3ae9c44c10bc0acd3857c (patch)
treeab4c7322730e02674e35e5cbbd9ac4afc57db628 /drivers/sh
parent1111cc1e8080b5ff46f5b945acb2f99d6176b2d1 (diff)
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sh: clkfwk: Use shared sh_clk_div_recalc().
This generalizes the div4 recalc routine for use by div6 and others, then makes it the default. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers/sh')
-rw-r--r--drivers/sh/clk/cpg.c62
1 files changed, 26 insertions, 36 deletions
diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c
index 9386bd21c00..84aeeb8fe01 100644
--- a/drivers/sh/clk/cpg.c
+++ b/drivers/sh/clk/cpg.c
@@ -66,11 +66,6 @@ int __init sh_clk_mstp_register(struct clk *clks, int nr)
return ret;
}
-static long sh_clk_div_round_rate(struct clk *clk, unsigned long rate)
-{
- return clk_rate_table_round(clk, clk->freq_table, rate);
-}
-
/*
* Div/mult table lookup helpers
*/
@@ -85,6 +80,27 @@ static inline struct clk_div_mult_table *clk_to_div_mult_table(struct clk *clk)
}
/*
+ * Common div ops
+ */
+static long sh_clk_div_round_rate(struct clk *clk, unsigned long rate)
+{
+ return clk_rate_table_round(clk, clk->freq_table, rate);
+}
+
+static unsigned long sh_clk_div_recalc(struct clk *clk)
+{
+ struct clk_div_mult_table *table = clk_to_div_mult_table(clk);
+ unsigned int idx;
+
+ clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
+ table, clk->arch_flags ? &clk->arch_flags : NULL);
+
+ idx = (sh_clk_read(clk) >> clk->enable_bit) & clk->div_mask;
+
+ return clk->freq_table[idx].frequency;
+}
+
+/*
* div6 support
*/
static int sh_clk_div6_divisors[64] = {
@@ -103,19 +119,6 @@ static struct clk_div_table sh_clk_div6_table = {
.div_mult_table = &div6_div_mult_table,
};
-static unsigned long sh_clk_div6_recalc(struct clk *clk)
-{
- struct clk_div_mult_table *table = clk_to_div_mult_table(clk);
- unsigned int idx;
-
- clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
- table, NULL);
-
- idx = sh_clk_read(clk) & clk->div_mask;
-
- return clk->freq_table[idx].frequency;
-}
-
static int sh_clk_div6_set_parent(struct clk *clk, struct clk *parent)
{
struct clk_div_mult_table *table = clk_to_div_mult_table(clk);
@@ -190,7 +193,7 @@ static void sh_clk_div6_disable(struct clk *clk)
}
static struct sh_clk_ops sh_clk_div6_clk_ops = {
- .recalc = sh_clk_div6_recalc,
+ .recalc = sh_clk_div_recalc,
.round_rate = sh_clk_div_round_rate,
.set_rate = sh_clk_div6_set_rate,
.enable = sh_clk_div6_enable,
@@ -198,7 +201,7 @@ static struct sh_clk_ops sh_clk_div6_clk_ops = {
};
static struct sh_clk_ops sh_clk_div6_reparent_clk_ops = {
- .recalc = sh_clk_div6_recalc,
+ .recalc = sh_clk_div_recalc,
.round_rate = sh_clk_div_round_rate,
.set_rate = sh_clk_div6_set_rate,
.enable = sh_clk_div6_enable,
@@ -287,19 +290,6 @@ int __init sh_clk_div6_reparent_register(struct clk *clks, int nr)
/*
* div4 support
*/
-static unsigned long sh_clk_div4_recalc(struct clk *clk)
-{
- struct clk_div_mult_table *table = clk_to_div_mult_table(clk);
- unsigned int idx;
-
- clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
- table, &clk->arch_flags);
-
- idx = (sh_clk_read(clk) >> clk->enable_bit) & clk->div_mask;
-
- return clk->freq_table[idx].frequency;
-}
-
static int sh_clk_div4_set_parent(struct clk *clk, struct clk *parent)
{
struct clk_div_mult_table *table = clk_to_div_mult_table(clk);
@@ -361,13 +351,13 @@ static void sh_clk_div4_disable(struct clk *clk)
}
static struct sh_clk_ops sh_clk_div4_clk_ops = {
- .recalc = sh_clk_div4_recalc,
+ .recalc = sh_clk_div_recalc,
.set_rate = sh_clk_div4_set_rate,
.round_rate = sh_clk_div_round_rate,
};
static struct sh_clk_ops sh_clk_div4_enable_clk_ops = {
- .recalc = sh_clk_div4_recalc,
+ .recalc = sh_clk_div_recalc,
.set_rate = sh_clk_div4_set_rate,
.round_rate = sh_clk_div_round_rate,
.enable = sh_clk_div4_enable,
@@ -375,7 +365,7 @@ static struct sh_clk_ops sh_clk_div4_enable_clk_ops = {
};
static struct sh_clk_ops sh_clk_div4_reparent_clk_ops = {
- .recalc = sh_clk_div4_recalc,
+ .recalc = sh_clk_div_recalc,
.set_rate = sh_clk_div4_set_rate,
.round_rate = sh_clk_div_round_rate,
.enable = sh_clk_div4_enable,