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authorChirantan Ekbote <chirantan@chromium.org>2014-06-12 00:18:48 +0900
committerChanho Park <chanho61.park@samsung.com>2014-10-15 23:36:51 -0700
commit3a1acbc2ac949a5b53a413ea1256407b8f5f09f3 (patch)
tree131374c42331df8b54e27a820697e7ab7e225b3e /drivers/pcmcia
parentc900a1ab108c9b24d80bfe8fd9aa5162d30b30c3 (diff)
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clocksource: exynos_mct: Don't reset the counter during boot and resumesubmit/tizen_common/20141016.103111accepted/tizen/common/20141020.075855
Unfortunately on some exynos systems, resetting the mct counter also resets the architected timer counter. This can cause problems if the architected timer driver has already been initialized because the kernel will think that the counter has wrapped around, causing a big jump in printk timestamps and delaying any scheduled clock events until the counter reaches the value it had before it was reset. The kernel code makes no assumptions about the initial value of the mct counter so there is no reason from a software perspective to clear the counter before starting it. This also fixes the problems described in the previous paragraph. Change-Id: I35f6bcd1e0ef46d5c19183dc526078a6b8b4ca64 Cc: Olof Johansson <olof@lixom.net> Cc: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Chirantan Ekbote <chirantan@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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