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| author | David S. Miller <davem@davemloft.net> | 2005-09-16 16:59:20 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2005-09-16 16:59:20 -0700 |
| commit | 1cbf07478bbf3e350a2025bc5ea23fedaa95855a (patch) | |
| tree | 1da3df4563187bae7eec7834d1fada04f8a9271b /drivers/net | |
| parent | 67e6b629212fa9ffb7420e8a88a41806af637e28 (diff) | |
| download | linux-3.10-1cbf07478bbf3e350a2025bc5ea23fedaa95855a.tar.gz linux-3.10-1cbf07478bbf3e350a2025bc5ea23fedaa95855a.tar.bz2 linux-3.10-1cbf07478bbf3e350a2025bc5ea23fedaa95855a.zip | |
[TG3]: Add AMD K8 to list of write-reorder chipsets.
Thanks to Andy Stewart for the report and testing
debug patches from Michael Chan.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/tg3.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 7599f52e15b..52eae9f096e 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -67,8 +67,8 @@ #define DRV_MODULE_NAME "tg3" #define PFX DRV_MODULE_NAME ": " -#define DRV_MODULE_VERSION "3.39" -#define DRV_MODULE_RELDATE "September 5, 2005" +#define DRV_MODULE_VERSION "3.40" +#define DRV_MODULE_RELDATE "September 15, 2005" #define TG3_DEF_MAC_MODE 0 #define TG3_DEF_RX_MODE 0 @@ -9271,6 +9271,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) static struct pci_device_id write_reorder_chipsets[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, + PCI_DEVICE_ID_AMD_K8_NB) }, { }, }; u32 misc_ctrl_reg; @@ -9285,7 +9287,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) tp->tg3_flags2 |= TG3_FLG2_SUN_570X; #endif - /* If we have an AMD 762 chipset, write + /* If we have an AMD 762 or K8 chipset, write * reordering to the mailbox registers done by the host * controller can cause major troubles. We read back from * every mailbox register write to force the writes to be |