diff options
author | Pierre Ossman <drzeus@drzeus.cx> | 2008-12-31 19:56:05 +0100 |
---|---|---|
committer | Pierre Ossman <drzeus@drzeus.cx> | 2008-12-31 19:56:05 +0100 |
commit | 418f19ea17a99421b22a64e101e14b6a16bed66d (patch) | |
tree | 7c21fcc368c63f1f9907deac6d16b30bd371792d /drivers/mmc | |
parent | 98444d3dd975653a4a970ecc0dfc30918da92f60 (diff) | |
parent | f6e10b865c3ea56bdaa8c6ecfee313b997900dbb (diff) | |
download | linux-3.10-418f19ea17a99421b22a64e101e14b6a16bed66d.tar.gz linux-3.10-418f19ea17a99421b22a64e101e14b6a16bed66d.tar.bz2 linux-3.10-418f19ea17a99421b22a64e101e14b6a16bed66d.zip |
Merge branch 'master' of ../mmc
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/card/block.c | 122 | ||||
-rw-r--r-- | drivers/mmc/core/core.c | 77 | ||||
-rw-r--r-- | drivers/mmc/core/mmc.c | 18 | ||||
-rw-r--r-- | drivers/mmc/host/Makefile | 3 | ||||
-rw-r--r-- | drivers/mmc/host/imxmmc.c | 459 | ||||
-rw-r--r-- | drivers/mmc/host/imxmmc.h | 37 | ||||
-rw-r--r-- | drivers/mmc/host/mmc_spi.c | 4 | ||||
-rw-r--r-- | drivers/mmc/host/mmci.c | 2 | ||||
-rw-r--r-- | drivers/mmc/host/of_mmc_spi.c | 149 | ||||
-rw-r--r-- | drivers/mmc/host/omap.c | 7 | ||||
-rw-r--r-- | drivers/mmc/host/pxamci.c | 9 | ||||
-rw-r--r-- | drivers/mmc/host/ricoh_mmc.c | 17 | ||||
-rw-r--r-- | drivers/mmc/host/s3cmci.c | 2 | ||||
-rw-r--r-- | drivers/mmc/host/sdhci-pci.c | 2 | ||||
-rw-r--r-- | drivers/mmc/host/sdhci.c | 17 | ||||
-rw-r--r-- | drivers/mmc/host/sdhci.h | 2 | ||||
-rw-r--r-- | drivers/mmc/host/sdricoh_cs.c | 2 | ||||
-rw-r--r-- | drivers/mmc/host/tmio_mmc.c | 3 |
18 files changed, 638 insertions, 294 deletions
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c index 3d067c35185..45b1f430685 100644 --- a/drivers/mmc/card/block.c +++ b/drivers/mmc/card/block.c @@ -145,7 +145,7 @@ struct mmc_blk_request { static u32 mmc_sd_num_wr_blocks(struct mmc_card *card) { int err; - u32 blocks; + __be32 blocks; struct mmc_request mrq; struct mmc_command cmd; @@ -204,9 +204,24 @@ static u32 mmc_sd_num_wr_blocks(struct mmc_card *card) if (cmd.error || data.error) return (u32)-1; - blocks = ntohl(blocks); + return ntohl(blocks); +} + +static u32 get_card_status(struct mmc_card *card, struct request *req) +{ + struct mmc_command cmd; + int err; - return blocks; + memset(&cmd, 0, sizeof(struct mmc_command)); + cmd.opcode = MMC_SEND_STATUS; + if (!mmc_host_is_spi(card->host)) + cmd.arg = card->rca << 16; + cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC; + err = mmc_wait_for_cmd(card->host, &cmd, 0); + if (err) + printk(KERN_ERR "%s: error %d sending status comand", + req->rq_disk->disk_name, err); + return cmd.resp[0]; } static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) @@ -214,13 +229,13 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) struct mmc_blk_data *md = mq->data; struct mmc_card *card = md->queue.card; struct mmc_blk_request brq; - int ret = 1; + int ret = 1, disable_multi = 0; mmc_claim_host(card->host); do { struct mmc_command cmd; - u32 readcmd, writecmd; + u32 readcmd, writecmd, status = 0; memset(&brq, 0, sizeof(struct mmc_blk_request)); brq.mrq.cmd = &brq.cmd; @@ -236,6 +251,14 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) brq.stop.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC; brq.data.blocks = req->nr_sectors; + /* + * After a read error, we redo the request one sector at a time + * in order to accurately determine which sectors can be read + * successfully. + */ + if (disable_multi && brq.data.blocks > 1) + brq.data.blocks = 1; + if (brq.data.blocks > 1) { /* SPI multiblock writes terminate using a special * token, not a STOP_TRANSMISSION request. @@ -264,6 +287,25 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) brq.data.sg = mq->sg; brq.data.sg_len = mmc_queue_map_sg(mq); + /* + * Adjust the sg list so it is the same size as the + * request. + */ + if (brq.data.blocks != req->nr_sectors) { + int i, data_size = brq.data.blocks << 9; + struct scatterlist *sg; + + for_each_sg(brq.data.sg, sg, brq.data.sg_len, i) { + data_size -= sg->length; + if (data_size <= 0) { + sg->length += data_size; + i++; + break; + } + } + brq.data.sg_len = i; + } + mmc_queue_bounce_pre(mq); mmc_wait_for_req(card->host, &brq.mrq); @@ -275,19 +317,40 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) * until later as we need to wait for the card to leave * programming mode even when things go wrong. */ + if (brq.cmd.error || brq.data.error || brq.stop.error) { + if (brq.data.blocks > 1 && rq_data_dir(req) == READ) { + /* Redo read one sector at a time */ + printk(KERN_WARNING "%s: retrying using single " + "block read\n", req->rq_disk->disk_name); + disable_multi = 1; + continue; + } + status = get_card_status(card, req); + } + if (brq.cmd.error) { - printk(KERN_ERR "%s: error %d sending read/write command\n", - req->rq_disk->disk_name, brq.cmd.error); + printk(KERN_ERR "%s: error %d sending read/write " + "command, response %#x, card status %#x\n", + req->rq_disk->disk_name, brq.cmd.error, + brq.cmd.resp[0], status); } if (brq.data.error) { - printk(KERN_ERR "%s: error %d transferring data\n", - req->rq_disk->disk_name, brq.data.error); + if (brq.data.error == -ETIMEDOUT && brq.mrq.stop) + /* 'Stop' response contains card status */ + status = brq.mrq.stop->resp[0]; + printk(KERN_ERR "%s: error %d transferring data," + " sector %u, nr %u, card status %#x\n", + req->rq_disk->disk_name, brq.data.error, + (unsigned)req->sector, + (unsigned)req->nr_sectors, status); } if (brq.stop.error) { - printk(KERN_ERR "%s: error %d sending stop command\n", - req->rq_disk->disk_name, brq.stop.error); + printk(KERN_ERR "%s: error %d sending stop command, " + "response %#x, card status %#x\n", + req->rq_disk->disk_name, brq.stop.error, + brq.stop.resp[0], status); } if (!mmc_host_is_spi(card->host) && rq_data_dir(req) != READ) { @@ -320,8 +383,20 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) #endif } - if (brq.cmd.error || brq.data.error || brq.stop.error) + if (brq.cmd.error || brq.stop.error || brq.data.error) { + if (rq_data_dir(req) == READ) { + /* + * After an error, we redo I/O one sector at a + * time, so we only reach here after trying to + * read a single sector. + */ + spin_lock_irq(&md->lock); + ret = __blk_end_request(req, -EIO, brq.data.blksz); + spin_unlock_irq(&md->lock); + continue; + } goto cmd_err; + } /* * A block was successfully transferred. @@ -343,25 +418,20 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req) * If the card is not SD, we can still ok written sectors * as reported by the controller (which might be less than * the real number of written sectors, but never more). - * - * For reads we just fail the entire chunk as that should - * be safe in all cases. */ - if (rq_data_dir(req) != READ) { - if (mmc_card_sd(card)) { - u32 blocks; + if (mmc_card_sd(card)) { + u32 blocks; - blocks = mmc_sd_num_wr_blocks(card); - if (blocks != (u32)-1) { - spin_lock_irq(&md->lock); - ret = __blk_end_request(req, 0, blocks << 9); - spin_unlock_irq(&md->lock); - } - } else { + blocks = mmc_sd_num_wr_blocks(card); + if (blocks != (u32)-1) { spin_lock_irq(&md->lock); - ret = __blk_end_request(req, 0, brq.data.bytes_xfered); + ret = __blk_end_request(req, 0, blocks << 9); spin_unlock_irq(&md->lock); } + } else { + spin_lock_irq(&md->lock); + ret = __blk_end_request(req, 0, brq.data.bytes_xfered); + spin_unlock_irq(&md->lock); } mmc_release_host(card->host); diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index f7284b905eb..df6ce4a06cf 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -20,6 +20,7 @@ #include <linux/err.h> #include <linux/leds.h> #include <linux/scatterlist.h> +#include <linux/log2.h> #include <linux/mmc/card.h> #include <linux/mmc/host.h> @@ -448,6 +449,80 @@ void mmc_set_bus_width(struct mmc_host *host, unsigned int width) mmc_set_ios(host); } +/** + * mmc_vdd_to_ocrbitnum - Convert a voltage to the OCR bit number + * @vdd: voltage (mV) + * @low_bits: prefer low bits in boundary cases + * + * This function returns the OCR bit number according to the provided @vdd + * value. If conversion is not possible a negative errno value returned. + * + * Depending on the @low_bits flag the function prefers low or high OCR bits + * on boundary voltages. For example, + * with @low_bits = true, 3300 mV translates to ilog2(MMC_VDD_32_33); + * with @low_bits = false, 3300 mV translates to ilog2(MMC_VDD_33_34); + * + * Any value in the [1951:1999] range translates to the ilog2(MMC_VDD_20_21). + */ +static int mmc_vdd_to_ocrbitnum(int vdd, bool low_bits) +{ + const int max_bit = ilog2(MMC_VDD_35_36); + int bit; + + if (vdd < 1650 || vdd > 3600) + return -EINVAL; + + if (vdd >= 1650 && vdd <= 1950) + return ilog2(MMC_VDD_165_195); + + if (low_bits) + vdd -= 1; + + /* Base 2000 mV, step 100 mV, bit's base 8. */ + bit = (vdd - 2000) / 100 + 8; + if (bit > max_bit) + return max_bit; + return bit; +} + +/** + * mmc_vddrange_to_ocrmask - Convert a voltage range to the OCR mask + * @vdd_min: minimum voltage value (mV) + * @vdd_max: maximum voltage value (mV) + * + * This function returns the OCR mask bits according to the provided @vdd_min + * and @vdd_max values. If conversion is not possible the function returns 0. + * + * Notes wrt boundary cases: + * This function sets the OCR bits for all boundary voltages, for example + * [3300:3400] range is translated to MMC_VDD_32_33 | MMC_VDD_33_34 | + * MMC_VDD_34_35 mask. + */ +u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max) +{ + u32 mask = 0; + + if (vdd_max < vdd_min) + return 0; + + /* Prefer high bits for the boundary vdd_max values. */ + vdd_max = mmc_vdd_to_ocrbitnum(vdd_max, false); + if (vdd_max < 0) + return 0; + + /* Prefer low bits for the boundary vdd_min values. */ + vdd_min = mmc_vdd_to_ocrbitnum(vdd_min, true); + if (vdd_min < 0) + return 0; + + /* Fill the mask, from max bit to min bit. */ + while (vdd_max >= vdd_min) + mask |= 1 << vdd_max--; + + return mask; +} +EXPORT_SYMBOL(mmc_vddrange_to_ocrmask); + /* * Mask off any voltages we don't support and select * the lowest voltage @@ -467,6 +542,8 @@ u32 mmc_select_voltage(struct mmc_host *host, u32 ocr) host->ios.vdd = bit; mmc_set_ios(host); } else { + pr_warning("%s: host doesn't support card's voltages\n", + mmc_hostname(host)); ocr = 0; } diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index fdd7c760be8..c232d11a7ed 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -434,13 +434,24 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, * Activate wide bus (if supported). */ if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) && - (host->caps & MMC_CAP_4_BIT_DATA)) { + (host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) { + unsigned ext_csd_bit, bus_width; + + if (host->caps & MMC_CAP_8_BIT_DATA) { + ext_csd_bit = EXT_CSD_BUS_WIDTH_8; + bus_width = MMC_BUS_WIDTH_8; + } else { + ext_csd_bit = EXT_CSD_BUS_WIDTH_4; + bus_width = MMC_BUS_WIDTH_4; + } + err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, - EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_4); + EXT_CSD_BUS_WIDTH, ext_csd_bit); + if (err) goto free_card; - mmc_set_bus_width(card->host, MMC_BUS_WIDTH_4); + mmc_set_bus_width(card->host, bus_width); } if (!oldcard) @@ -624,4 +635,3 @@ err: return err; } - diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index c794cc5ce44..f4853288bbb 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -19,6 +19,9 @@ obj-$(CONFIG_MMC_AT91) += at91_mci.o obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o obj-$(CONFIG_MMC_SPI) += mmc_spi.o +ifeq ($(CONFIG_OF),y) +obj-$(CONFIG_MMC_SPI) += of_mmc_spi.o +endif obj-$(CONFIG_MMC_S3C) += s3cmci.o obj-$(CONFIG_MMC_SDRICOH_CS) += sdricoh_cs.o obj-$(CONFIG_MMC_TMIO) += tmio_mmc.o diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c index 2f0fcdb869b..eb29b1d933a 100644 --- a/drivers/mmc/host/imxmmc.c +++ b/drivers/mmc/host/imxmmc.c @@ -10,20 +10,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * - * 2005-04-17 Pavel Pisa <pisa@cmp.felk.cvut.cz> - * Changed to conform redesigned i.MX scatter gather DMA interface - * - * 2005-11-04 Pavel Pisa <pisa@cmp.felk.cvut.cz> - * Updated for 2.6.14 kernel - * - * 2005-12-13 Jay Monkman <jtm@smoothsmoothie.com> - * Found and corrected problems in the write path - * - * 2005-12-30 Pavel Pisa <pisa@cmp.felk.cvut.cz> - * The event handling rewritten right way in softirq. - * Added many ugly hacks and delays to overcome SDHC - * deficiencies - * */ #include <linux/module.h> @@ -37,9 +23,9 @@ #include <linux/mmc/card.h> #include <linux/delay.h> #include <linux/clk.h> +#include <linux/io.h> #include <asm/dma.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/sizes.h> #include <mach/mmc.h> @@ -50,17 +36,16 @@ #define DRIVER_NAME "imx-mmc" #define IMXMCI_INT_MASK_DEFAULT (INT_MASK_BUF_READY | INT_MASK_DATA_TRAN | \ - INT_MASK_WRITE_OP_DONE | INT_MASK_END_CMD_RES | \ - INT_MASK_AUTO_CARD_DETECT | INT_MASK_DAT0_EN | INT_MASK_SDIO) + INT_MASK_WRITE_OP_DONE | INT_MASK_END_CMD_RES | \ + INT_MASK_AUTO_CARD_DETECT | INT_MASK_DAT0_EN | INT_MASK_SDIO) struct imxmci_host { struct mmc_host *mmc; spinlock_t lock; struct resource *res; + void __iomem *base; int irq; imx_dmach_t dma; - unsigned int clkrt; - unsigned int cmdat; volatile unsigned int imask; unsigned int power_mode; unsigned int present; @@ -74,7 +59,7 @@ struct imxmci_host { struct tasklet_struct tasklet; unsigned int status_reg; unsigned long pending_events; - /* Next to fields are there for CPU driven transfers to overcome SDHC deficiencies */ + /* Next two fields are there for CPU driven transfers to overcome SDHC deficiencies */ u16 *data_ptr; unsigned int data_cnt; atomic_t stuck_timeout; @@ -114,14 +99,22 @@ struct imxmci_host { static void imxmci_stop_clock(struct imxmci_host *host) { int i = 0; - MMC_STR_STP_CLK &= ~STR_STP_CLK_START_CLK; - while(i < 0x1000) { - if(!(i & 0x7f)) - MMC_STR_STP_CLK |= STR_STP_CLK_STOP_CLK; + u16 reg; + + reg = readw(host->base + MMC_REG_STR_STP_CLK); + writew(reg & ~STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); + while (i < 0x1000) { + if (!(i & 0x7f)) { + reg = readw(host->base + MMC_REG_STR_STP_CLK); + writew(reg | STR_STP_CLK_STOP_CLK, + host->base + MMC_REG_STR_STP_CLK); + } - if(!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)) { + reg = readw(host->base + MMC_REG_STATUS); + if (!(reg & STATUS_CARD_BUS_CLK_RUN)) { /* Check twice before cut */ - if(!(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN)) + reg = readw(host->base + MMC_REG_STATUS); + if (!(reg & STATUS_CARD_BUS_CLK_RUN)) return; } @@ -135,8 +128,10 @@ static int imxmci_start_clock(struct imxmci_host *host) unsigned int trials = 0; unsigned int delay_limit = 128; unsigned long flags; + u16 reg; - MMC_STR_STP_CLK &= ~STR_STP_CLK_STOP_CLK; + reg = readw(host->base + MMC_REG_STR_STP_CLK); + writew(reg & ~STR_STP_CLK_STOP_CLK, host->base + MMC_REG_STR_STP_CLK); clear_bit(IMXMCI_PEND_STARTED_b, &host->pending_events); @@ -145,18 +140,21 @@ static int imxmci_start_clock(struct imxmci_host *host) * then 6 delay loops, but during card detection (low clockrate) * it takes up to 5000 delay loops and sometimes fails for the first time */ - MMC_STR_STP_CLK |= STR_STP_CLK_START_CLK; + reg = readw(host->base + MMC_REG_STR_STP_CLK); + writew(reg | STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); do { unsigned int delay = delay_limit; - while(delay--){ - if(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN) + while (delay--) { + reg = readw(host->base + MMC_REG_STATUS); + if (reg & STATUS_CARD_BUS_CLK_RUN) /* Check twice before cut */ - if(MMC_STATUS & STATUS_CARD_BUS_CLK_RUN) + reg = readw(host->base + MMC_REG_STATUS); + if (reg & STATUS_CARD_BUS_CLK_RUN) return 0; - if(test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) + if (test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) return 0; } @@ -167,58 +165,59 @@ static int imxmci_start_clock(struct imxmci_host *host) * IRQ or schedule delays this function execution and the clocks has * been already stopped by other means (response processing, SDHC HW) */ - if(!test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) - MMC_STR_STP_CLK |= STR_STP_CLK_START_CLK; + if (!test_bit(IMXMCI_PEND_STARTED_b, &host->pending_events)) { + reg = readw(host->base + MMC_REG_STR_STP_CLK); + writew(reg | STR_STP_CLK_START_CLK, + host->base + MMC_REG_STR_STP_CLK); + } local_irq_restore(flags); - } while(++trials<256); + } while (++trials < 256); dev_err(mmc_dev(host->mmc), "imxmci_start_clock blocked, no luck\n"); return -1; } -static void imxmci_softreset(void) +static void imxmci_softreset(struct imxmci_host *host) { + int i; + /* reset sequence */ - MMC_STR_STP_CLK = 0x8; - MMC_STR_STP_CLK = 0xD; - MMC_STR_STP_CLK = 0x5; - MMC_STR_STP_CLK = 0x5; - MMC_STR_STP_CLK = 0x5; - MMC_STR_STP_CLK = 0x5; - MMC_STR_STP_CLK = 0x5; - MMC_STR_STP_CLK = 0x5; - MMC_STR_STP_CLK = 0x5; - MMC_STR_STP_CLK = 0x5; - - MMC_RES_TO = 0xff; - MMC_BLK_LEN = 512; - MMC_NOB = 1; + writew(0x08, host->base + MMC_REG_STR_STP_CLK); + writew(0x0D, host->base + MMC_REG_STR_STP_CLK); + + for (i = 0; i < 8; i++) + writew(0x05, host->base + MMC_REG_STR_STP_CLK); + + writew(0xff, host->base + MMC_REG_RES_TO); + writew(512, host->base + MMC_REG_BLK_LEN); + writew(1, host->base + MMC_REG_NOB); } static int imxmci_busy_wait_for_status(struct imxmci_host *host, - unsigned int *pstat, unsigned int stat_mask, - int timeout, const char *where) + unsigned int *pstat, unsigned int stat_mask, + int timeout, const char *where) { - int loops=0; - while(!(*pstat & stat_mask)) { - loops+=2; - if(loops >= timeout) { + int loops = 0; + + while (!(*pstat & stat_mask)) { + loops += 2; + if (loops >= timeout) { dev_dbg(mmc_dev(host->mmc), "busy wait timeout in %s, STATUS = 0x%x (0x%x)\n", where, *pstat, stat_mask); return -1; } udelay(2); - *pstat |= MMC_STATUS; + *pstat |= readw(host->base + MMC_REG_STATUS); } - if(!loops) + if (!loops) return 0; /* The busy-wait is expected there for clock <8MHz due to SDHC hardware flaws */ - if(!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock>=8000000)) + if (!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock >= 8000000)) dev_info(mmc_dev(host->mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n", - loops, where, *pstat, stat_mask); + loops, where, *pstat, stat_mask); return loops; } @@ -235,8 +234,8 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) host->data = data; data->bytes_xfered = 0; - MMC_NOB = nob; - MMC_BLK_LEN = blksz; + writew(nob, host->base + MMC_REG_NOB); + writew(blksz, host->base + MMC_REG_BLK_LEN); /* * DMA cannot be used for small block sizes, we have to use CPU driven transfers otherwise. @@ -252,14 +251,14 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) host->dma_dir = DMA_FROM_DEVICE; /* Hack to enable read SCR */ - MMC_NOB = 1; - MMC_BLK_LEN = 512; + writew(1, host->base + MMC_REG_NOB); + writew(512, host->base + MMC_REG_BLK_LEN); } else { host->dma_dir = DMA_TO_DEVICE; } /* Convert back to virtual address */ - host->data_ptr = (u16*)sg_virt(data->sg); + host->data_ptr = (u16 *)sg_virt(data->sg); host->data_cnt = 0; clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events); @@ -271,10 +270,11 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) if (data->flags & MMC_DATA_READ) { host->dma_dir = DMA_FROM_DEVICE; host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, - data->sg_len, host->dma_dir); + data->sg_len, host->dma_dir); imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz, - host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_READ); + host->res->start + MMC_REG_BUFFER_ACCESS, + DMA_MODE_READ); /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_READ, IMX_DMA_WIDTH_16, CCR_REN);*/ CCR(host->dma) = CCR_DMOD_LINEAR | CCR_DSIZ_32 | CCR_SMOD_FIFO | CCR_SSIZ_16 | CCR_REN; @@ -282,10 +282,11 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) host->dma_dir = DMA_TO_DEVICE; host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, - data->sg_len, host->dma_dir); + data->sg_len, host->dma_dir); imx_dma_setup_sg(host->dma, data->sg, data->sg_len, datasz, - host->res->start + MMC_BUFFER_ACCESS_OFS, DMA_MODE_WRITE); + host->res->start + MMC_REG_BUFFER_ACCESS, + DMA_MODE_WRITE); /*imx_dma_setup_mem2dev_ccr(host->dma, DMA_MODE_WRITE, IMX_DMA_WIDTH_16, CCR_REN);*/ CCR(host->dma) = CCR_SMOD_LINEAR | CCR_SSIZ_32 | CCR_DMOD_FIFO | CCR_DSIZ_16 | CCR_REN; @@ -293,12 +294,12 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) #if 1 /* This code is there only for consistency checking and can be disabled in future */ host->dma_size = 0; - for(i=0; i<host->dma_nents; i++) - host->dma_size+=data->sg[i].length; + for (i = 0; i < host->dma_nents; i++) + host->dma_size += data->sg[i].length; if (datasz > host->dma_size) { dev_err(mmc_dev(host->mmc), "imxmci_setup_data datasz 0x%x > 0x%x dm_size\n", - datasz, host->dma_size); + datasz, host->dma_size); } #endif @@ -306,7 +307,7 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) wmb(); - if(host->actual_bus_width == MMC_BUS_WIDTH_4) + if (host->actual_bus_width == MMC_BUS_WIDTH_4) BLR(host->dma) = 0; /* burst 64 byte read / 64 bytes write */ else BLR(host->dma) = 16; /* burst 16 byte read / 16 bytes write */ @@ -317,9 +318,8 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data) clear_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events); /* start DMA engine for read, write is delayed after initial response */ - if (host->dma_dir == DMA_FROM_DEVICE) { + if (host->dma_dir == DMA_FROM_DEVICE) imx_dma_enable(host->dma); - } } static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd, unsigned int cmdat) @@ -351,16 +351,16 @@ static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd, break; } - if ( test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events) ) + if (test_and_clear_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events)) cmdat |= CMD_DAT_CONT_INIT; /* This command needs init */ - if ( host->actual_bus_width == MMC_BUS_WIDTH_4 ) + if (host->actual_bus_width == MMC_BUS_WIDTH_4) cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; - MMC_CMD = cmd->opcode; - MMC_ARGH = cmd->arg >> 16; - MMC_ARGL = cmd->arg & 0xffff; - MMC_CMD_DAT_CONT = cmdat; + writew(cmd->opcode, host->base + MMC_REG_CMD); + writew(cmd->arg >> 16, host->base + MMC_REG_ARGH); + writew(cmd->arg & 0xffff, host->base + MMC_REG_ARGL); + writew(cmdat, host->base + MMC_REG_CMD_DAT_CONT); atomic_set(&host->stuck_timeout, 0); set_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events); @@ -368,18 +368,18 @@ static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd, imask = IMXMCI_INT_MASK_DEFAULT; imask &= ~INT_MASK_END_CMD_RES; - if ( cmdat & CMD_DAT_CONT_DATA_ENABLE ) { - /*imask &= ~INT_MASK_BUF_READY;*/ + if (cmdat & CMD_DAT_CONT_DATA_ENABLE) { + /* imask &= ~INT_MASK_BUF_READY; */ imask &= ~INT_MASK_DATA_TRAN; - if ( cmdat & CMD_DAT_CONT_WRITE ) + if (cmdat & CMD_DAT_CONT_WRITE) imask &= ~INT_MASK_WRITE_OP_DONE; - if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) + if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) imask &= ~INT_MASK_BUF_READY; } spin_lock_irqsave(&host->lock, flags); host->imask = imask; - MMC_INT_MASK = host->imask; + writew(host->imask, host->base + MMC_REG_INT_MASK); spin_unlock_irqrestore(&host->lock, flags); dev_dbg(mmc_dev(host->mmc), "CMD%02d (0x%02x) mask set to 0x%04x\n", @@ -395,14 +395,14 @@ static void imxmci_finish_request(struct imxmci_host *host, struct mmc_request * spin_lock_irqsave(&host->lock, flags); host->pending_events &= ~(IMXMCI_PEND_WAIT_RESP_m | IMXMCI_PEND_DMA_END_m | - IMXMCI_PEND_DMA_DATA_m | IMXMCI_PEND_CPU_DATA_m); + IMXMCI_PEND_DMA_DATA_m | IMXMCI_PEND_CPU_DATA_m); host->imask = IMXMCI_INT_MASK_DEFAULT; - MMC_INT_MASK = host->imask; + writew(host->imask, host->base + MMC_REG_INT_MASK); spin_unlock_irqrestore(&host->lock, flags); - if(req && req->cmd) + if (req && req->cmd) host->prev_cmd_code = req->cmd->opcode; host->req = NULL; @@ -416,17 +416,17 @@ static int imxmci_finish_data(struct imxmci_host *host, unsigned int stat) struct mmc_data *data = host->data; int data_error; - if(test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)){ + if (test_and_clear_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { imx_dma_disable(host->dma); dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents, host->dma_dir); } - if ( stat & STATUS_ERR_MASK ) { - dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n",stat); - if(stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR)) + if (stat & STATUS_ERR_MASK) { + dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", stat); + if (stat & (STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR)) data->error = -EILSEQ; - else if(stat & STATUS_TIME_OUT_READ) + else if (stat & STATUS_TIME_OUT_READ) data->error = -ETIMEDOUT; else data->error = -EIO; @@ -445,7 +445,7 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat) { struct mmc_command *cmd = host->cmd; int i; - u32 a,b,c; + u32 a, b, c; struct mmc_data *data = host->data; if (!cmd) @@ -461,18 +461,18 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat) cmd->error = -EILSEQ; } - if(cmd->flags & MMC_RSP_PRESENT) { - if(cmd->flags & MMC_RSP_136) { + if (cmd->flags & MMC_RSP_PRESENT) { + if (cmd->flags & MMC_RSP_136) { for (i = 0; i < 4; i++) { - u32 a = MMC_RES_FIFO & 0xffff; - u32 b = MMC_RES_FIFO & 0xffff; - cmd->resp[i] = a<<16 | b; + a = readw(host->base + MMC_REG_RES_FIFO); + b = readw(host->base + MMC_REG_RES_FIFO); + cmd->resp[i] = a << 16 | b; } } else { - a = MMC_RES_FIFO & 0xffff; - b = MMC_RES_FIFO & 0xffff; - c = MMC_RES_FIFO & 0xffff; - cmd->resp[0] = a<<24 | b<<8 | c>>8; + a = readw(host->base + MMC_REG_RES_FIFO); + b = readw(host->base + MMC_REG_RES_FIFO); + c = readw(host->base + MMC_REG_RES_FIFO); + cmd->resp[0] = a << 24 | b << 8 | c >> 8; } } @@ -484,36 +484,34 @@ static int imxmci_cmd_done(struct imxmci_host *host, unsigned int stat) /* Wait for FIFO to be empty before starting DMA write */ - stat = MMC_STATUS; - if(imxmci_busy_wait_for_status(host, &stat, - STATUS_APPL_BUFF_FE, - 40, "imxmci_cmd_done DMA WR") < 0) { + stat = readw(host->base + MMC_REG_STATUS); + if (imxmci_busy_wait_for_status(host, &stat, + STATUS_APPL_BUFF_FE, + 40, "imxmci_cmd_done DMA WR") < 0) { cmd->error = -EIO; imxmci_finish_data(host, stat); - if(host->req) + if (host->req) imxmci_finish_request(host, host->req); dev_warn(mmc_dev(host->mmc), "STATUS = 0x%04x\n", - stat); + stat); return 0; } - if(test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { + if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) imx_dma_enable(host->dma); - } } } else { struct mmc_request *req; imxmci_stop_clock(host); req = host->req; - if(data) + if (data) imxmci_finish_data(host, stat); - if( req ) { + if (req) imxmci_finish_request(host, req); - } else { + else dev_warn(mmc_dev(host->mmc), "imxmci_cmd_done: no request to finish\n"); - } } return 1; @@ -535,11 +533,10 @@ static int imxmci_data_done(struct imxmci_host *host, unsigned int stat) } else { struct mmc_request *req; req = host->req; - if( req ) { + if (req) imxmci_finish_request(host, req); - } else { + else dev_warn(mmc_dev(host->mmc), "imxmci_data_done: no request to finish\n"); - } } return 1; @@ -552,7 +549,7 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat) int trans_done = 0; unsigned int stat = *pstat; - if(host->actual_bus_width != MMC_BUS_WIDTH_4) + if (host->actual_bus_width != MMC_BUS_WIDTH_4) burst_len = 16; else burst_len = 64; @@ -563,44 +560,44 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat) udelay(20); /* required for clocks < 8MHz*/ - if(host->dma_dir == DMA_FROM_DEVICE) { + if (host->dma_dir == DMA_FROM_DEVICE) { imxmci_busy_wait_for_status(host, &stat, - STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE | - STATUS_TIME_OUT_READ, - 50, "imxmci_cpu_driven_data read"); + STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE | + STATUS_TIME_OUT_READ, + 50, "imxmci_cpu_driven_data read"); - while((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) && - !(stat & STATUS_TIME_OUT_READ) && - (host->data_cnt < 512)) { + while ((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) && + !(stat & STATUS_TIME_OUT_READ) && + (host->data_cnt < 512)) { udelay(20); /* required for clocks < 8MHz*/ - for(i = burst_len; i>=2 ; i-=2) { + for (i = burst_len; i >= 2 ; i -= 2) { u16 data; - data = MMC_BUFFER_ACCESS; + data = readw(host->base + MMC_REG_BUFFER_ACCESS); udelay(10); /* required for clocks < 8MHz*/ - if(host->data_cnt+2 <= host->dma_size) { + if (host->data_cnt+2 <= host->dma_size) { *(host->data_ptr++) = data; } else { - if(host->data_cnt < host->dma_size) - *(u8*)(host->data_ptr) = data; + if (host->data_cnt < host->dma_size) + *(u8 *)(host->data_ptr) = data; } host->data_cnt += 2; } - stat = MMC_STATUS; + stat = readw(host->base + MMC_REG_STATUS); dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read %d burst %d STATUS = 0x%x\n", host->data_cnt, burst_len, stat); } - if((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512)) + if ((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512)) trans_done = 1; - if(host->dma_size & 0x1ff) + if (host->dma_size & 0x1ff) stat &= ~STATUS_CRC_READ_ERR; - if(stat & STATUS_TIME_OUT_READ) { + if (stat & STATUS_TIME_OUT_READ) { dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n", stat); trans_done = -1; @@ -608,12 +605,12 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat) } else { imxmci_busy_wait_for_status(host, &stat, - STATUS_APPL_BUFF_FE, - 20, "imxmci_cpu_driven_data write"); + STATUS_APPL_BUFF_FE, + 20, "imxmci_cpu_driven_data write"); - while((stat & STATUS_APPL_BUFF_FE) && - (host->data_cnt < host->dma_size)) { - if(burst_len >= host->dma_size - host->data_cnt) { + while ((stat & STATUS_APPL_BUFF_FE) && + (host->data_cnt < host->dma_size)) { + if (burst_len >= host->dma_size - host->data_cnt) { burst_len = host->dma_size - host->data_cnt; host->data_cnt = host->dma_size; trans_done = 1; @@ -621,10 +618,10 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat) host->data_cnt += burst_len; } - for(i = burst_len; i>0 ; i-=2) - MMC_BUFFER_ACCESS = *(host->data_ptr++); + for (i = burst_len; i > 0 ; i -= 2) + writew(*(host->data_ptr++), host->base + MMC_REG_BUFFER_ACCESS); - stat = MMC_STATUS; + stat = readw(host->base + MMC_REG_STATUS); dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data write burst %d STATUS = 0x%x\n", burst_len, stat); @@ -639,7 +636,7 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat) static void imxmci_dma_irq(int dma, void *devid) { struct imxmci_host *host = devid; - uint32_t stat = MMC_STATUS; + u32 stat = readw(host->base + MMC_REG_STATUS); atomic_set(&host->stuck_timeout, 0); host->status_reg = stat; @@ -650,10 +647,11 @@ static void imxmci_dma_irq(int dma, void *devid) static irqreturn_t imxmci_irq(int irq, void *devid) { struct imxmci_host *host = devid; - uint32_t stat = MMC_STATUS; + u32 stat = readw(host->base + MMC_REG_STATUS); int handled = 1; - MMC_INT_MASK = host->imask | INT_MASK_SDIO | INT_MASK_AUTO_CARD_DETECT; + writew(host->imask | INT_MASK_SDIO | INT_MASK_AUTO_CARD_DETECT, + host->base + MMC_REG_INT_MASK); atomic_set(&host->stuck_timeout, 0); host->status_reg = stat; @@ -671,10 +669,10 @@ static void imxmci_tasklet_fnc(unsigned long data) unsigned int data_dir_mask = 0; /* STATUS_WR_CRC_ERROR_CODE_MASK */ int timeout = 0; - if(atomic_read(&host->stuck_timeout) > 4) { + if (atomic_read(&host->stuck_timeout) > 4) { char *what; timeout = 1; - stat = MMC_STATUS; + stat = readw(host->base + MMC_REG_STATUS); host->status_reg = stat; if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) @@ -683,29 +681,37 @@ static void imxmci_tasklet_fnc(unsigned long data) what = "RESP"; else if (test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) - if(test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events)) + if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events)) what = "DATA"; else what = "DMA"; else what = "???"; - dev_err(mmc_dev(host->mmc), "%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n", - what, stat, MMC_INT_MASK); - dev_err(mmc_dev(host->mmc), "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n", - MMC_CMD_DAT_CONT, MMC_BLK_LEN, MMC_NOB, CCR(host->dma)); + dev_err(mmc_dev(host->mmc), + "%s TIMEOUT, hardware stucked STATUS = 0x%04x IMASK = 0x%04x\n", + what, stat, + readw(host->base + MMC_REG_INT_MASK)); + dev_err(mmc_dev(host->mmc), + "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n", + readw(host->base + MMC_REG_CMD_DAT_CONT), + readw(host->base + MMC_REG_BLK_LEN), + readw(host->base + MMC_REG_NOB), + CCR(host->dma)); dev_err(mmc_dev(host->mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n", - host->cmd?host->cmd->opcode:0, host->prev_cmd_code, 1<<host->actual_bus_width, host->dma_size); + host->cmd ? host->cmd->opcode : 0, + host->prev_cmd_code, + 1 << host->actual_bus_width, host->dma_size); } - if(!host->present || timeout) + if (!host->present || timeout) host->status_reg = STATUS_TIME_OUT_RESP | STATUS_TIME_OUT_READ | - STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR; + STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR; - if(test_bit(IMXMCI_PEND_IRQ_b, &host->pending_events) || timeout) { + if (test_bit(IMXMCI_PEND_IRQ_b, &host->pending_events) || timeout) { clear_bit(IMXMCI_PEND_IRQ_b, &host->pending_events); - stat = MMC_STATUS; + stat = readw(host->base + MMC_REG_STATUS); /* * This is not required in theory, but there is chance to miss some flag * which clears automatically by mask write, FreeScale original code keeps @@ -713,63 +719,62 @@ static void imxmci_tasklet_fnc(unsigned long data) */ stat |= host->status_reg; - if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) + if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) stat &= ~STATUS_CRC_READ_ERR; - if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { + if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { imxmci_busy_wait_for_status(host, &stat, - STATUS_END_CMD_RESP | STATUS_ERR_MASK, - 20, "imxmci_tasklet_fnc resp (ERRATUM #4)"); + STATUS_END_CMD_RESP | STATUS_ERR_MASK, + 20, "imxmci_tasklet_fnc resp (ERRATUM #4)"); } - if(stat & (STATUS_END_CMD_RESP | STATUS_ERR_MASK)) { - if(test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) + if (stat & (STATUS_END_CMD_RESP | STATUS_ERR_MASK)) { + if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) imxmci_cmd_done(host, stat); - if(host->data && (stat & STATUS_ERR_MASK)) + if (host->data && (stat & STATUS_ERR_MASK)) imxmci_data_done(host, stat); } - if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) { - stat |= MMC_STATUS; - if(imxmci_cpu_driven_data(host, &stat)){ - if(test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) + if (test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events)) { + stat |= readw(host->base + MMC_REG_STATUS); + if (imxmci_cpu_driven_data(host, &stat)) { + if (test_and_clear_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) imxmci_cmd_done(host, stat); atomic_clear_mask(IMXMCI_PEND_IRQ_m|IMXMCI_PEND_CPU_DATA_m, - &host->pending_events); + &host->pending_events); imxmci_data_done(host, stat); } } } - if(test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events) && - !test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { + if (test_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events) && + !test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) { - stat = MMC_STATUS; + stat = readw(host->base + MMC_REG_STATUS); /* Same as above */ stat |= host->status_reg; - if(host->dma_dir == DMA_TO_DEVICE) { + if (host->dma_dir == DMA_TO_DEVICE) data_dir_mask = STATUS_WRITE_OP_DONE; - } else { + else data_dir_mask = STATUS_DATA_TRANS_DONE; - } - if(stat & data_dir_mask) { + if (stat & data_dir_mask) { clear_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events); imxmci_data_done(host, stat); } } - if(test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events)) { + if (test_and_clear_bit(IMXMCI_PEND_CARD_XCHG_b, &host->pending_events)) { - if(host->cmd) + if (host->cmd) imxmci_cmd_done(host, STATUS_TIME_OUT_RESP); - if(host->data) + if (host->data) imxmci_data_done(host, STATUS_TIME_OUT_READ | STATUS_CRC_READ_ERR | STATUS_CRC_WRITE_ERR); - if(host->req) + if (host->req) imxmci_finish_request(host, host->req); mmc_detect_change(host->mmc, msecs_to_jiffies(100)); @@ -796,9 +801,8 @@ static void imxmci_request(struct mmc_host *mmc, struct mmc_request *req) if (req->data->flags & MMC_DATA_WRITE) cmdat |= CMD_DAT_CONT_WRITE; - if (req->data->flags & MMC_DATA_STREAM) { + if (req->data->flags & MMC_DATA_STREAM) cmdat |= CMD_DAT_CONT_STREAM_BLOCK; - } } imxmci_start_cmd(host, req->cmd, cmdat); @@ -811,36 +815,37 @@ static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) struct imxmci_host *host = mmc_priv(mmc); int prescaler; - if( ios->bus_width==MMC_BUS_WIDTH_4 ) { + if (ios->bus_width == MMC_BUS_WIDTH_4) { host->actual_bus_width = MMC_BUS_WIDTH_4; imx_gpio_mode(PB11_PF_SD_DAT3); - }else{ + } else { host->actual_bus_width = MMC_BUS_WIDTH_1; imx_gpio_mode(GPIO_PORTB | GPIO_IN | GPIO_PUEN | 11); } - if ( host->power_mode != ios->power_mode ) { + if (host->power_mode != ios->power_mode) { switch (ios->power_mode) { case MMC_POWER_OFF: - break; + break; case MMC_POWER_UP: set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events); - break; + break; case MMC_POWER_ON: - break; + break; } host->power_mode = ios->power_mode; } - if ( ios->clock ) { + if (ios->clock) { unsigned int clk; + u16 reg; /* The prescaler is 5 for PERCLK2 equal to 96MHz * then 96MHz / 5 = 19.2 MHz */ clk = clk_get_rate(host->clk); - prescaler=(clk+(CLK_RATE*7)/8)/CLK_RATE; - switch(prescaler) { + prescaler = (clk + (CLK_RATE * 7) / 8) / CLK_RATE; + switch (prescaler) { case 0: case 1: prescaler = 0; break; @@ -858,24 +863,29 @@ static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) dev_dbg(mmc_dev(host->mmc), "PERCLK2 %d MHz -> prescaler %d\n", clk, prescaler); - for(clk=0; clk<8; clk++) { + for (clk = 0; clk < 8; clk++) { int x; - x = CLK_RATE / (1<<clk); - if( x <= ios->clock) + x = CLK_RATE / (1 << clk); + if (x <= ios->clock) break; } - MMC_STR_STP_CLK |= STR_STP_CLK_ENABLE; /* enable controller */ + /* enable controller */ + reg = readw(host->base + MMC_REG_STR_STP_CLK); + writew(reg | STR_STP_CLK_ENABLE, + host->base + MMC_REG_STR_STP_CLK); imxmci_stop_clock(host); - MMC_CLK_RATE = (prescaler<<3) | clk; + writew((prescaler << 3) | clk, host->base + MMC_REG_CLK_RATE); /* * Under my understanding, clock should not be started there, because it would * initiate SDHC sequencer and send last or random command into card */ - /*imxmci_start_clock(host);*/ + /* imxmci_start_clock(host); */ - dev_dbg(mmc_dev(host->mmc), "MMC_CLK_RATE: 0x%08x\n", MMC_CLK_RATE); + dev_dbg(mmc_dev(host->mmc), + "MMC_CLK_RATE: 0x%08x\n", + readw(host->base + MMC_REG_CLK_RATE)); } else { imxmci_stop_clock(host); } @@ -915,10 +925,10 @@ static void imxmci_check_status(unsigned long data) tasklet_schedule(&host->tasklet); } - if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events) || - test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { + if (test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events) || + test_bit(IMXMCI_PEND_DMA_DATA_b, &host->pending_events)) { atomic_inc(&host->stuck_timeout); - if(atomic_read(&host->stuck_timeout) > 4) + if (atomic_read(&host->stuck_timeout) > 4) tasklet_schedule(&host->tasklet); } else { atomic_set(&host->stuck_timeout, 0); @@ -934,6 +944,7 @@ static int imxmci_probe(struct platform_device *pdev) struct imxmci_host *host = NULL; struct resource *r; int ret = 0, irq; + u16 rev_no; printk(KERN_INFO "i.MX mmc driver\n"); @@ -942,7 +953,8 @@ static int imxmci_probe(struct platform_device *pdev) if (!r || irq < 0) return -ENXIO; - if (!request_mem_region(r->start, 0x100, pdev->name)) + r = request_mem_region(r->start, resource_size(r), pdev->name); + if (!r) return -EBUSY; mmc = mmc_alloc_host(sizeof(struct imxmci_host), &pdev->dev); @@ -966,6 +978,12 @@ static int imxmci_probe(struct platform_device *pdev) mmc->max_blk_count = 65535; host = mmc_priv(mmc); + host->base = ioremap(r->start, resource_size(r)); + if (!host->base) { + ret = -ENOMEM; + goto out; + } + host->mmc = mmc; host->dma_allocated = 0; host->pdata = pdev->dev.platform_data; @@ -993,18 +1011,20 @@ static int imxmci_probe(struct platform_device *pdev) imx_gpio_mode(PB12_PF_SD_CLK); imx_gpio_mode(PB13_PF_SD_CMD); - imxmci_softreset(); + imxmci_softreset(host); - if ( MMC_REV_NO != 0x390 ) { + rev_no = readw(host->base + MMC_REG_REV_NO); + if (rev_no != 0x390) { dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n", - MMC_REV_NO); + readw(host->base + MMC_REG_REV_NO)); goto out; } - MMC_READ_TO = 0x2db4; /* recommended in data sheet */ + /* recommended in data sheet */ + writew(0x2db4, host->base + MMC_REG_READ_TO); host->imask = IMXMCI_INT_MASK_DEFAULT; - MMC_INT_MASK = host->imask; + writew(host->imask, host->base + MMC_REG_INT_MASK); host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW); if(host->dma < 0) { @@ -1012,7 +1032,7 @@ static int imxmci_probe(struct platform_device *pdev) ret = -EBUSY; goto out; } - host->dma_allocated=1; + host->dma_allocated = 1; imx_dma_setup_handlers(host->dma, imxmci_dma_irq, NULL, host); tasklet_init(&host->tasklet, imxmci_tasklet_fnc, (unsigned long)host); @@ -1032,7 +1052,7 @@ static int imxmci_probe(struct platform_device *pdev) host->timer.data = (unsigned long)host; host->timer.function = imxmci_check_status; add_timer(&host->timer); - mod_timer(&host->timer, jiffies + (HZ>>1)); + mod_timer(&host->timer, jiffies + (HZ >> 1)); platform_set_drvdata(pdev, mmc); @@ -1042,18 +1062,20 @@ static int imxmci_probe(struct platform_device *pdev) out: if (host) { - if(host->dma_allocated){ + if (host->dma_allocated) { imx_dma_free(host->dma); - host->dma_allocated=0; + host->dma_allocated = 0; } if (host->clk) { clk_disable(host->clk); clk_put(host->clk); } + if (host->base) + iounmap(host->base); } if (mmc) mmc_free_host(mmc); - release_mem_region(r->start, 0x100); + release_mem_region(r->start, resource_size(r)); return ret; } @@ -1072,9 +1094,10 @@ static int imxmci_remove(struct platform_device *pdev) mmc_remove_host(mmc); free_irq(host->irq, host); - if(host->dma_allocated){ + iounmap(host->base); + if (host->dma_allocated) { imx_dma_free(host->dma); - host->dma_allocated=0; + host->dma_allocated = 0; } tasklet_kill(&host->tasklet); @@ -1082,7 +1105,7 @@ static int imxmci_remove(struct platform_device *pdev) clk_disable(host->clk); clk_put(host->clk); - release_mem_region(host->res->start, 0x100); + release_mem_region(host->res->start, resource_size(host->res)); mmc_free_host(mmc); } @@ -1109,7 +1132,7 @@ static int imxmci_resume(struct platform_device *dev) if (mmc) { host = mmc_priv(mmc); - if(host) + if (host) set_bit(IMXMCI_PEND_SET_INIT_b, &host->pending_events); ret = mmc_resume_host(mmc); } diff --git a/drivers/mmc/host/imxmmc.h b/drivers/mmc/host/imxmmc.h index e5339e334db..09d5d4ee3a7 100644 --- a/drivers/mmc/host/imxmmc.h +++ b/drivers/mmc/host/imxmmc.h @@ -1,24 +1,21 @@ +#define MMC_REG_STR_STP_CLK 0x00 +#define MMC_REG_STATUS 0x04 +#define MMC_REG_CLK_RATE 0x08 +#define MMC_REG_CMD_DAT_CONT 0x0C +#define MMC_REG_RES_TO 0x10 +#define MMC_REG_READ_TO 0x14 +#define MMC_REG_BLK_LEN 0x18 +#define MMC_REG_NOB 0x1C +#define MMC_REG_REV_NO 0x20 +#define MMC_REG_INT_MASK 0x24 +#define MMC_REG_CMD 0x28 +#define MMC_REG_ARGH 0x2C +#define MMC_REG_ARGL 0x30 +#define MMC_REG_RES_FIFO 0x34 +#define MMC_REG_BUFFER_ACCESS 0x38 -# define __REG16(x) (*((volatile u16 *)IO_ADDRESS(x))) - -#define MMC_STR_STP_CLK __REG16(IMX_MMC_BASE + 0x00) -#define MMC_STATUS __REG16(IMX_MMC_BASE + 0x04) -#define MMC_CLK_RATE __REG16(IMX_MMC_BASE + 0x08) -#define MMC_CMD_DAT_CONT __REG16(IMX_MMC_BASE + 0x0C) -#define MMC_RES_TO __REG16(IMX_MMC_BASE + 0x10) -#define MMC_READ_TO __REG16(IMX_MMC_BASE + 0x14) -#define MMC_BLK_LEN __REG16(IMX_MMC_BASE + 0x18) -#define MMC_NOB __REG16(IMX_MMC_BASE + 0x1C) -#define MMC_REV_NO __REG16(IMX_MMC_BASE + 0x20) -#define MMC_INT_MASK __REG16(IMX_MMC_BASE + 0x24) -#define MMC_CMD __REG16(IMX_MMC_BASE + 0x28) -#define MMC_ARGH __REG16(IMX_MMC_BASE + 0x2C) -#define MMC_ARGL __REG16(IMX_MMC_BASE + 0x30) -#define MMC_RES_FIFO __REG16(IMX_MMC_BASE + 0x34) -#define MMC_BUFFER_ACCESS __REG16(IMX_MMC_BASE + 0x38) -#define MMC_BUFFER_ACCESS_OFS 0x38 - - +#define STR_STP_CLK_IPG_CLK_GATE_DIS (1<<15) +#define STR_STP_CLK_IPG_PERCLK_GATE_DIS (1<<14) #define STR_STP_CLK_ENDIAN (1<<5) #define STR_STP_CLK_RESET (1<<3) #define STR_STP_CLK_ENABLE (1<<2) diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c index ad00e163231..87e211df68a 100644 --- a/drivers/mmc/host/mmc_spi.c +++ b/drivers/mmc/host/mmc_spi.c @@ -1285,7 +1285,7 @@ static int mmc_spi_probe(struct spi_device *spi) /* Platform data is used to hook up things like card sensing * and power switching gpios. */ - host->pdata = spi->dev.platform_data; + host->pdata = mmc_spi_get_pdata(spi); if (host->pdata) mmc->ocr_avail = host->pdata->ocr_mask; if (!mmc->ocr_avail) { @@ -1368,6 +1368,7 @@ fail_glue_init: fail_nobuf1: mmc_free_host(mmc); + mmc_spi_put_pdata(spi); dev_set_drvdata(&spi->dev, NULL); nomem: @@ -1402,6 +1403,7 @@ static int __devexit mmc_spi_remove(struct spi_device *spi) spi->max_speed_hz = mmc->f_max; mmc_free_host(mmc); + mmc_spi_put_pdata(spi); dev_set_drvdata(&spi->dev, NULL); } return 0; diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 2fadf323c69..1bcbdd6763a 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -500,7 +500,7 @@ static int mmci_probe(struct amba_device *dev, void *id) } host = mmc_priv(mmc); - host->clk = clk_get(&dev->dev, "MCLK"); + host->clk = clk_get(&dev->dev, NULL); if (IS_ERR(host->clk)) { ret = PTR_ERR(host->clk); host->clk = NULL; diff --git a/drivers/mmc/host/of_mmc_spi.c b/drivers/mmc/host/of_mmc_spi.c new file mode 100644 index 00000000000..fb2921f8099 --- /dev/null +++ b/drivers/mmc/host/of_mmc_spi.c @@ -0,0 +1,149 @@ +/* + * OpenFirmware bindings for the MMC-over-SPI driver + * + * Copyright (c) MontaVista Software, Inc. 2008. + * + * Author: Anton Vorontsov <avorontsov@ru.mvista.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/gpio.h> +#include <linux/of.h> +#include <linux/of_gpio.h> +#include <linux/spi/spi.h> +#include <linux/spi/mmc_spi.h> +#include <linux/mmc/core.h> +#include <linux/mmc/host.h> + +enum { + CD_GPIO = 0, + WP_GPIO, + NUM_GPIOS, +}; + +struct of_mmc_spi { + int gpios[NUM_GPIOS]; + bool alow_gpios[NUM_GPIOS]; + struct mmc_spi_platform_data pdata; +}; + +static struct of_mmc_spi *to_of_mmc_spi(struct device *dev) +{ + return container_of(dev->platform_data, struct of_mmc_spi, pdata); +} + +static int of_mmc_spi_read_gpio(struct device *dev, int gpio_num) +{ + struct of_mmc_spi *oms = to_of_mmc_spi(dev); + bool active_low = oms->alow_gpios[gpio_num]; + bool value = gpio_get_value(oms->gpios[gpio_num]); + + return active_low ^ value; +} + +static int of_mmc_spi_get_cd(struct device *dev) +{ + return of_mmc_spi_read_gpio(dev, CD_GPIO); +} + +static int of_mmc_spi_get_ro(struct device *dev) +{ + return of_mmc_spi_read_gpio(dev, WP_GPIO); +} + +struct mmc_spi_platform_data *mmc_spi_get_pdata(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + struct device_node *np = dev_archdata_get_node(&dev->archdata); + struct of_mmc_spi *oms; + const u32 *voltage_ranges; + int num_ranges; + int i; + int ret = -EINVAL; + + if (dev->platform_data || !np) + return dev->platform_data; + + oms = kzalloc(sizeof(*oms), GFP_KERNEL); + if (!oms) + return NULL; + + voltage_ranges = of_get_property(np, "voltage-ranges", &num_ranges); + num_ranges = num_ranges / sizeof(*voltage_ranges) / 2; + if (!voltage_ranges || !num_ranges) { + dev_err(dev, "OF: voltage-ranges unspecified\n"); + goto err_ocr; + } + + for (i = 0; i < num_ranges; i++) { + const int j = i * 2; + u32 mask; + + mask = mmc_vddrange_to_ocrmask(voltage_ranges[j], + voltage_ranges[j + 1]); + if (!mask) { + ret = -EINVAL; + dev_err(dev, "OF: voltage-range #%d is invalid\n", i); + goto err_ocr; + } + oms->pdata.ocr_mask |= mask; + } + + for (i = 0; i < ARRAY_SIZE(oms->gpios); i++) { + enum of_gpio_flags gpio_flags; + + oms->gpios[i] = of_get_gpio_flags(np, i, &gpio_flags); + if (!gpio_is_valid(oms->gpios[i])) + continue; + + ret = gpio_request(oms->gpios[i], dev->bus_id); + if (ret < 0) { + oms->gpios[i] = -EINVAL; + continue; + } + + if (gpio_flags & OF_GPIO_ACTIVE_LOW) + oms->alow_gpios[i] = true; + } + + if (gpio_is_valid(oms->gpios[CD_GPIO])) + oms->pdata.get_cd = of_mmc_spi_get_cd; + if (gpio_is_valid(oms->gpios[WP_GPIO])) + oms->pdata.get_ro = of_mmc_spi_get_ro; + + /* We don't support interrupts yet, let's poll. */ + oms->pdata.caps |= MMC_CAP_NEEDS_POLL; + + dev->platform_data = &oms->pdata; + return dev->platform_data; +err_ocr: + kfree(oms); + return NULL; +} +EXPORT_SYMBOL(mmc_spi_get_pdata); + +void mmc_spi_put_pdata(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + struct device_node *np = dev_archdata_get_node(&dev->archdata); + struct of_mmc_spi *oms = to_of_mmc_spi(dev); + int i; + + if (!dev->platform_data || !np) + return; + + for (i = 0; i < ARRAY_SIZE(oms->gpios); i++) { + if (gpio_is_valid(oms->gpios[i])) + gpio_free(oms->gpios[i]); + } + kfree(oms); + dev->platform_data = NULL; +} +EXPORT_SYMBOL(mmc_spi_put_pdata); diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index 1b9fc3c6b87..67d7b7fef08 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c @@ -1015,7 +1015,7 @@ static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data } if (is_read) { - if (host->id == 1) { + if (host->id == 0) { sync_dev = OMAP_DMA_MMC_RX; dma_dev_name = "MMC1 read"; } else { @@ -1023,7 +1023,7 @@ static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data dma_dev_name = "MMC2 read"; } } else { - if (host->id == 1) { + if (host->id == 0) { sync_dev = OMAP_DMA_MMC_TX; dma_dev_name = "MMC1 write"; } else { @@ -1317,7 +1317,7 @@ static int __init mmc_omap_new_slot(struct mmc_omap_host *host, int id) host->slots[id] = slot; mmc->caps = 0; - if (host->pdata->conf.wire4) + if (host->pdata->slots[id].wires >= 4) mmc->caps |= MMC_CAP_4_BIT_DATA; mmc->ops = &mmc_omap_ops; @@ -1451,6 +1451,7 @@ static int __init mmc_omap_probe(struct platform_device *pdev) host->irq = irq; host->use_dma = 1; + host->dev->dma_mask = &pdata->dma_mask; host->dma_ch = -1; host->irq = irq; diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index ebfaa996093..3c5483b75da 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c @@ -26,11 +26,12 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/mmc/host.h> +#include <linux/io.h> -#include <asm/dma.h> -#include <asm/io.h> #include <asm/sizes.h> +#include <mach/dma.h> +#include <mach/hardware.h> #include <mach/pxa-regs.h> #include <mach/mmc.h> @@ -282,7 +283,7 @@ static int pxamci_data_done(struct pxamci_host *host, unsigned int stat) return 0; DCSR(host->dma) = 0; - dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, + dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, host->dma_dir); if (stat & STAT_READ_TIME_OUT) @@ -533,7 +534,7 @@ static int pxamci_probe(struct platform_device *pdev) host->pdata = pdev->dev.platform_data; host->clkrt = CLKRT_OFF; - host->clk = clk_get(&pdev->dev, "MMCCLK"); + host->clk = clk_get(&pdev->dev, NULL); if (IS_ERR(host->clk)) { ret = PTR_ERR(host->clk); host->clk = NULL; diff --git a/drivers/mmc/host/ricoh_mmc.c b/drivers/mmc/host/ricoh_mmc.c index a16d7609e4e..be9e7b32b34 100644 --- a/drivers/mmc/host/ricoh_mmc.c +++ b/drivers/mmc/host/ricoh_mmc.c @@ -11,9 +11,10 @@ /* * This is a conceptually ridiculous driver, but it is required by the way - * the Ricoh multi-function R5C832 works. This chip implements firewire - * and four different memory card controllers. Two of those controllers are - * an SDHCI controller and a proprietary MMC controller. The linux SDHCI + * the Ricoh multi-function chips (R5CXXX) work. These chips implement + * the four main memory card controllers (SD, MMC, MS, xD) and one or both + * of cardbus or firewire. It happens that they implement SD and MMC + * support as separate controllers (and PCI functions). The linux SDHCI * driver supports MMC cards but the chip detects MMC cards in hardware * and directs them to the MMC controller - so the SDHCI driver never sees * them. To get around this, we must disable the useless MMC controller. @@ -21,8 +22,10 @@ * a detection event occurs immediately, even if the MMC card is already * in the reader. * - * The relevant registers live on the firewire function, so this is unavoidably - * ugly. Such is life. + * It seems to be the case that the relevant PCI registers to deactivate the + * MMC controller live on PCI function 0, which might be the cardbus controller + * or the firewire controller, depending on the particular chip in question. As + * such, it makes what this driver has to do unavoidably ugly. Such is life. */ #include <linux/pci.h> @@ -143,6 +146,7 @@ static int __devinit ricoh_mmc_probe(struct pci_dev *pdev, pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, fw_dev))) { if (PCI_SLOT(pdev->devfn) == PCI_SLOT(fw_dev->devfn) && + PCI_FUNC(fw_dev->devfn) == 0 && pdev->bus == fw_dev->bus) { if (ricoh_mmc_disable(fw_dev) != 0) return -ENODEV; @@ -160,6 +164,7 @@ static int __devinit ricoh_mmc_probe(struct pci_dev *pdev, (fw_dev = pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_R5C832, fw_dev))) { if (PCI_SLOT(pdev->devfn) == PCI_SLOT(fw_dev->devfn) && + PCI_FUNC(fw_dev->devfn) == 0 && pdev->bus == fw_dev->bus) { if (ricoh_mmc_disable(fw_dev) != 0) return -ENODEV; @@ -172,7 +177,7 @@ static int __devinit ricoh_mmc_probe(struct pci_dev *pdev, if (!ctrlfound) { printk(KERN_WARNING DRIVER_NAME - ": Main firewire function not found. Cannot disable controller.\n"); + ": Main Ricoh function not found. Cannot disable controller.\n"); return -ENODEV; } diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c index 3b2085b5776..fcc98a4cce3 100644 --- a/drivers/mmc/host/s3cmci.c +++ b/drivers/mmc/host/s3cmci.c @@ -25,7 +25,7 @@ #include <mach/regs-sdi.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/mci.h> +#include <plat/mci.h> #include "s3cmci.h" diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index 9bd7026b002..f07255cb17e 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -545,7 +545,7 @@ static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot( } addr = pci_resource_start(pdev, bar); - host->ioaddr = ioremap_nocache(addr, pci_resource_len(pdev, bar)); + host->ioaddr = pci_ioremap_bar(pdev, bar); if (!host->ioaddr) { dev_err(&pdev->dev, "failed to remap registers\n"); goto release; diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 4d010a984be..6b2d1f99af6 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -30,6 +30,11 @@ #define DBG(f, x...) \ pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) +#if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \ + defined(CONFIG_MMC_SDHCI_MODULE)) +#define SDHCI_USE_LEDS_CLASS +#endif + static unsigned int debug_quirks = 0; static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *); @@ -149,7 +154,7 @@ static void sdhci_deactivate_led(struct sdhci_host *host) writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); } -#ifdef CONFIG_LEDS_CLASS +#ifdef SDHCI_USE_LEDS_CLASS static void sdhci_led_control(struct led_classdev *led, enum led_brightness brightness) { @@ -994,7 +999,7 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) WARN_ON(host->mrq != NULL); -#ifndef CONFIG_LEDS_CLASS +#ifndef SDHCI_USE_LEDS_CLASS sdhci_activate_led(host); #endif @@ -1201,7 +1206,7 @@ static void sdhci_tasklet_finish(unsigned long param) host->cmd = NULL; host->data = NULL; -#ifndef CONFIG_LEDS_CLASS +#ifndef SDHCI_USE_LEDS_CLASS sdhci_deactivate_led(host); #endif @@ -1717,7 +1722,7 @@ int sdhci_add_host(struct sdhci_host *host) sdhci_dumpregs(host); #endif -#ifdef CONFIG_LEDS_CLASS +#ifdef SDHCI_USE_LEDS_CLASS host->led.name = mmc_hostname(mmc); host->led.brightness = LED_OFF; host->led.default_trigger = mmc_hostname(mmc); @@ -1739,7 +1744,7 @@ int sdhci_add_host(struct sdhci_host *host) return 0; -#ifdef CONFIG_LEDS_CLASS +#ifdef SDHCI_USE_LEDS_CLASS reset: sdhci_reset(host, SDHCI_RESET_ALL); free_irq(host->irq, host); @@ -1775,7 +1780,7 @@ void sdhci_remove_host(struct sdhci_host *host, int dead) mmc_remove_host(host->mmc); -#ifdef CONFIG_LEDS_CLASS +#ifdef SDHCI_USE_LEDS_CLASS led_classdev_unregister(&host->led); #endif diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 31f4b1528e7..3efba236394 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -220,7 +220,7 @@ struct sdhci_host { struct mmc_host *mmc; /* MMC structure */ u64 dma_mask; /* custom DMA mask */ -#ifdef CONFIG_LEDS_CLASS +#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) struct led_classdev led; /* LED control */ #endif diff --git a/drivers/mmc/host/sdricoh_cs.c b/drivers/mmc/host/sdricoh_cs.c index 43586337001..cb41e9c3ac0 100644 --- a/drivers/mmc/host/sdricoh_cs.c +++ b/drivers/mmc/host/sdricoh_cs.c @@ -465,7 +465,7 @@ static int sdricoh_init_mmc(struct pci_dev *pci_dev, err: if (iobase) - iounmap(iobase); + pci_iounmap(pci_dev, iobase); if (mmc) mmc_free_host(mmc); diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c index 95430b81ec1..6a7a6190483 100644 --- a/drivers/mmc/host/tmio_mmc.c +++ b/drivers/mmc/host/tmio_mmc.c @@ -224,7 +224,7 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host) { void __iomem *ctl = host->ctl; struct mmc_data *data = host->data; - struct mmc_command *stop = data->stop; + struct mmc_command *stop; host->data = NULL; @@ -232,6 +232,7 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host) pr_debug("Spurious data end IRQ\n"); return; } + stop = data->stop; /* FIXME - return correct transfer count on errors */ if (!data->error) |