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authorJaehoon Chung <jh80.chung@samsung.com>2013-10-28 15:13:22 +0900
committerChanho Park <chanho61.park@samsung.com>2014-11-18 11:45:01 +0900
commit768ed814e35273b7afd92110cb3fa352d0a001a4 (patch)
tree173835ec7092a24a15610f24c1a64401d16ca736 /drivers/mmc
parentfd1f749059e60bedb2c105fa0f234db25437b7d2 (diff)
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mmc: core: change the clkgate_delay value from 0 to 3.
When clkgate_delay is set to 0, then clk is gated at every request. It's inefficient. So, it's changed from 0 to 3. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/core/host.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index 2a3593d9f87..78864311e12 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -242,10 +242,10 @@ static inline void mmc_host_clk_init(struct mmc_host *host)
/* Hold MCI clock for 8 cycles by default */
host->clk_delay = 8;
/*
- * Default clock gating delay is 0ms to avoid wasting power.
+ * Default clock gating delay is 3ms to avoid wasting power.
* This value can be tuned by writing into sysfs entry.
*/
- host->clkgate_delay = 0;
+ host->clkgate_delay = 3;
host->clk_gated = false;
INIT_DELAYED_WORK(&host->clk_gate_work, mmc_host_clk_gate_work);
spin_lock_init(&host->clk_lock);