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| author | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2014-02-09 17:31:47 -0300 |
|---|---|---|
| committer | Chanho Park <chanho61.park@samsung.com> | 2014-11-18 11:58:45 +0900 |
| commit | 225f9795bfa236c7aa03228eee69b7695bfa653e (patch) | |
| tree | a47c00ecc36159154879f194c9ecc25d738d21d5 /drivers/media/i2c | |
| parent | f6d20e2127c88d1419c8d1e34d0f2d7d2f99776b (diff) | |
| download | linux-3.10-225f9795bfa236c7aa03228eee69b7695bfa653e.tar.gz linux-3.10-225f9795bfa236c7aa03228eee69b7695bfa653e.tar.bz2 linux-3.10-225f9795bfa236c7aa03228eee69b7695bfa653e.zip | |
upstream: [media] mt9p031: Add support for PLL bypass
When the input clock frequency is out of bounds for the PLL, bypass the
PLL and just divide the input clock to achieve the requested output
frequency.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/i2c')
| -rw-r--r-- | drivers/media/i2c/mt9p031.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/media/i2c/mt9p031.c b/drivers/media/i2c/mt9p031.c index dd7b258a980..8ead96cc06b 100644 --- a/drivers/media/i2c/mt9p031.c +++ b/drivers/media/i2c/mt9p031.c @@ -257,6 +257,21 @@ static int mt9p031_clk_setup(struct mt9p031 *mt9p031) return 0; } + /* If the external clock frequency is out of bounds for the PLL use the + * pixel clock divider only and disable the PLL. + */ + if (pdata->ext_freq > limits.ext_clock_max) { + unsigned int div; + + div = DIV_ROUND_UP(pdata->ext_freq, pdata->target_freq); + div = roundup_pow_of_two(div) / 2; + + mt9p031->clk_div = max_t(unsigned int, div, 64); + mt9p031->use_pll = false; + + return 0; + } + mt9p031->pll.ext_clock = pdata->ext_freq; mt9p031->pll.pix_clock = pdata->target_freq; mt9p031->use_pll = true; |