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| author | Catalin Marinas <catalin.marinas@arm.com> | 2009-03-03 11:44:12 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-03-03 12:11:26 +0000 |
| commit | b57ee99fab25dbc12150fe66fe54dc52bc6de784 (patch) | |
| tree | 21bd531baa837d47ff600d36cef524b0ff4cb94c /drivers/isdn | |
| parent | 25ef4a67e78e1322d55f0a38783537ed89addc02 (diff) | |
| download | linux-3.10-b57ee99fab25dbc12150fe66fe54dc52bc6de784.tar.gz linux-3.10-b57ee99fab25dbc12150fe66fe54dc52bc6de784.tar.bz2 linux-3.10-b57ee99fab25dbc12150fe66fe54dc52bc6de784.zip | |
[ARM] 5417/1: Set the correct cacheid for ARMv6 CPUs with ARMv7 style MMU
The cacheid_init() function assumes that if cpu_architecture() returns
7, the caches are VIPT_NONALIASING. The cpu_architecture() function
returns the version of the supported MMU features (e.g. TEX remapping)
but it doesn't make any assumptions about the cache type. The patch adds
the checking of the Cache Type Register for the ARMv7 format.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/isdn')
0 files changed, 0 insertions, 0 deletions