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authorInki Dae <inki.dae@samsung.com>2011-11-12 15:23:32 +0900
committerInki Dae <inki.dae@samsung.com>2011-11-15 14:58:46 +0900
commit2c871127e994a678b82104a4110eb7fcc87f05ad (patch)
tree76ec83f5dc4232b57202eb916009932ed1b471bc /drivers/gpu/drm/exynos/exynos_drm_drv.h
parentc7493668eeced636afabfed57dfead8329c3d7fa (diff)
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drm/exynos: changed buffer structure.
the purpose of this patch is to consider IOMMU support in the future. EXYNOS4 SoC supports IOMMU also so the address for DMA could be physical address with IOMMU or device address with IOMMU. Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Diffstat (limited to 'drivers/gpu/drm/exynos/exynos_drm_drv.h')
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index 1575e5fef51..38a6f1df75c 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -79,8 +79,8 @@ struct exynos_drm_overlay_ops {
* @scan_flag: interlace or progressive way.
* (it could be DRM_MODE_FLAG_*)
* @bpp: pixel size.(in bit)
- * @paddr: bus(accessed by dma) physical memory address to this overlay
- * and this is physically continuous.
+ * @dma_addr: bus(accessed by dma) address to the memory region allocated
+ * for a overlay.
* @vaddr: virtual memory addresss to this overlay.
* @default_win: a window to be enabled.
* @color_key: color key on or off.
@@ -108,7 +108,7 @@ struct exynos_drm_overlay {
unsigned int scan_flag;
unsigned int bpp;
unsigned int pitch;
- dma_addr_t paddr;
+ dma_addr_t dma_addr;
void __iomem *vaddr;
bool default_win;