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| author | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2008-04-07 22:33:35 +0200 |
|---|---|---|
| committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2008-04-18 17:55:35 +0200 |
| commit | a007bb857e0b26f5d8b73c2ff90782d9c0972620 (patch) | |
| tree | 118f54e70b99dd1315cce57796f7d0a7bbb9c3df /drivers/firewire | |
| parent | 76f73ca1b291a8d014ff0d2d802c817404dd9887 (diff) | |
| download | linux-3.10-a007bb857e0b26f5d8b73c2ff90782d9c0972620.tar.gz linux-3.10-a007bb857e0b26f5d8b73c2ff90782d9c0972620.tar.bz2 linux-3.10-a007bb857e0b26f5d8b73c2ff90782d9c0972620.zip | |
firewire: fw-ohci: conditionally log busReset interrupts
Add a debug option to watch bus reset interrupt events. Half of this
patch is taken from Jarod Wilson's first version of the JMicron fix.
BusReset interrupts are only generated if the respective module
parameter flag was set before the controller is being initialized.
Else we keep this event masked to reduce IRQ load in normal operation
and to avoid potential problems with buggy chips.
Note, this is unlike the other IRQ events whose logging can be enabled
any time after chip initialization. This and the influence on what
interrupts the chip generates is why I added an extra flag for it.
Also, reorder the debug parameter flags according to their perceived
usefulness.
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Signed-off-by: Jarod Wilson <jwilson@redhat.com>
Diffstat (limited to 'drivers/firewire')
| -rw-r--r-- | drivers/firewire/fw-ohci.c | 28 |
1 files changed, 20 insertions, 8 deletions
diff --git a/drivers/firewire/fw-ohci.c b/drivers/firewire/fw-ohci.c index 4789300b824..46660ac0dac 100644 --- a/drivers/firewire/fw-ohci.c +++ b/drivers/firewire/fw-ohci.c @@ -240,24 +240,32 @@ static char ohci_driver_name[] = KBUILD_MODNAME; #ifdef CONFIG_FIREWIRE_OHCI_DEBUG -#define OHCI_PARAM_DEBUG_IRQS 1 +#define OHCI_PARAM_DEBUG_AT_AR 1 #define OHCI_PARAM_DEBUG_SELFIDS 2 -#define OHCI_PARAM_DEBUG_AT_AR 4 +#define OHCI_PARAM_DEBUG_IRQS 4 +#define OHCI_PARAM_DEBUG_BUSRESETS 8 /* only effective before chip init */ static int param_debug; module_param_named(debug, param_debug, int, 0644); MODULE_PARM_DESC(debug, "Verbose logging (default = 0" - ", IRQs = " __stringify(OHCI_PARAM_DEBUG_IRQS) - ", self-IDs = " __stringify(OHCI_PARAM_DEBUG_SELFIDS) ", AT/AR events = " __stringify(OHCI_PARAM_DEBUG_AT_AR) + ", self-IDs = " __stringify(OHCI_PARAM_DEBUG_SELFIDS) + ", IRQs = " __stringify(OHCI_PARAM_DEBUG_IRQS) + ", busReset events = " __stringify(OHCI_PARAM_DEBUG_BUSRESETS) ", or a combination, or all = -1)"); static void log_irqs(u32 evt) { - if (likely(!(param_debug & OHCI_PARAM_DEBUG_IRQS))) + if (likely(!(param_debug & + (OHCI_PARAM_DEBUG_IRQS | OHCI_PARAM_DEBUG_BUSRESETS)))) + return; + + if (!(param_debug & OHCI_PARAM_DEBUG_IRQS) && + !(evt & OHCI1394_busReset)) return; - printk(KERN_DEBUG KBUILD_MODNAME ": IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s\n", + printk(KERN_DEBUG KBUILD_MODNAME ": IRQ " + "%08x%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt, evt & OHCI1394_selfIDComplete ? " selfID" : "", evt & OHCI1394_RQPkt ? " AR_req" : "", @@ -270,12 +278,13 @@ static void log_irqs(u32 evt) evt & OHCI1394_cycleTooLong ? " cycleTooLong" : "", evt & OHCI1394_cycle64Seconds ? " cycle64Seconds" : "", evt & OHCI1394_regAccessFail ? " regAccessFail" : "", + evt & OHCI1394_busReset ? " busReset" : "", evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt | OHCI1394_RSPkt | OHCI1394_reqTxComplete | OHCI1394_respTxComplete | OHCI1394_isochRx | OHCI1394_isochTx | OHCI1394_postedWriteErr | OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds | - OHCI1394_regAccessFail) + OHCI1394_regAccessFail | OHCI1394_busReset) ? " ?" : ""); } @@ -1328,7 +1337,8 @@ static irqreturn_t irq_handler(int irq, void *data) if (!event || !~event) return IRQ_NONE; - reg_write(ohci, OHCI1394_IntEventClear, event); + /* busReset must not be cleared yet, see OHCI 1.1 clause 7.2.3.2 */ + reg_write(ohci, OHCI1394_IntEventClear, event & ~OHCI1394_busReset); log_irqs(event); if (event & OHCI1394_selfIDComplete) @@ -1467,6 +1477,8 @@ static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length) OHCI1394_postedWriteErr | OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds | OHCI1394_regAccessFail | OHCI1394_masterIntEnable); + if (param_debug & OHCI_PARAM_DEBUG_BUSRESETS) + reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset); /* Activate link_on bit and contender bit in our self ID packets.*/ if (ohci_update_phy_reg(card, 4, 0, |