arm: odroid: cpufreq: Support for frequency up to 1.7 GHz

Values used for supporting Odroid U3 frequencies were taken from Odroid repo:

https://github.com/hardkernel/linux.git
branch odroid-3.8.y
config arch/arm/configs/odroidu_defconfig

Three new frequencies have been added: 1.6, 1.704 and 1.8 GHz.

It is important to note, that in the device tree cpufreq node one just
needs to specify the list of supported frequencies at the freq_table
attribute.

Change-Id: I416a35b99da9c341f92648541c81238a51dc362f
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>

3 files changed, 24 insertions, 16 deletions

diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index 0bd56da3cdf..feda2e5fcdd 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -332,8 +332,8 @@ struct cpufreq_frequency_table *exynos_of_parse_freq_table(
 {
 	struct device_node *node = info->dev->of_node;
 	struct cpufreq_frequency_table *ft, *ret = NULL;
+	int len, num, i = 0, k;
 	struct property *pp;
-	int len, num, i = 0;
 	u32 *of_f_tab;
 
 	if (!node)
@@ -366,29 +366,29 @@ struct cpufreq_frequency_table *exynos_of_parse_freq_table(
 	}
 
 	/*
-	 * Here + 2 is required for CPUFREQ_ENTRY_INVALID  and
-	 * CPUFREQ_TABLE_END
+	 * Here + 1 is required for CPUFREQ_TABLE_END
 	 *
 	 * Number of those entries must correspond to the apll_freq_4412 table
 	 */
-	ft = kzalloc(sizeof(struct cpufreq_frequency_table) * (num + 2),
-		     GFP_KERNEL);
+	ft = kzalloc(sizeof(struct cpufreq_frequency_table) *
+		     (info->freq_levels + 1), GFP_KERNEL);
 	if (!ft) {
 		pr_err("%s: Allocation failed\n", __func__);
 		goto err_of_f_tab;
 	}
 
-	ft[0].index = L0;
-	ft[0].frequency = CPUFREQ_ENTRY_INVALID;
+	i = info->freq_levels;
+	ft[i].index = 0;
+	ft[i].frequency = CPUFREQ_TABLE_END;
 
-	for (i = 1; i <= num; i++) {
+	for (i--, k = num - 1; i >= 0; i--, k--) {
 		ft[i].index = i;
-		ft[i].frequency = of_f_tab[i-1];
+		if (k < 0)
+			ft[i].frequency = CPUFREQ_ENTRY_INVALID;
+		else
+			ft[i].frequency = of_f_tab[k];
 	}
 
-	ft[i].index = 0;
-	ft[i].frequency = CPUFREQ_TABLE_END;
-
 	ret = ft;
 
  err_of_f_tab:
diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
index cb08d2850d6..5fe15fad16f 100644
--- a/drivers/cpufreq/exynos-cpufreq.h
+++ b/drivers/cpufreq/exynos-cpufreq.h
@@ -39,6 +39,7 @@ struct exynos_dvfs_info {
 	unsigned int	pll_safe_idx;
 	struct clk	*cpu_clk;
 	unsigned int	*volt_table;
+	unsigned int    freq_levels;
 	struct cpufreq_frequency_table	*freq_table;
 	void (*set_freq)(unsigned int, unsigned int);
 	bool (*need_apll_change)(unsigned int, unsigned int);
diff --git a/drivers/cpufreq/exynos4x12-cpufreq.c b/drivers/cpufreq/exynos4x12-cpufreq.c
index e92d19be2c8..16ffbece2c5 100644
--- a/drivers/cpufreq/exynos4x12-cpufreq.c
+++ b/drivers/cpufreq/exynos4x12-cpufreq.c
@@ -27,8 +27,9 @@ static struct clk *sclk_mpll;
 static struct clk *mout_apll;
 
 static unsigned int exynos4x12_volt_table[] = {
-	1350000, 1287500, 1250000, 1187500, 1137500, 1087500, 1037500,
-	1000000,  987500,  975000,  950000,  925000,  900000,  900000
+	1400000, 1350000, 1350000, 1300000, 1225000, 1175000,
+	1125000, 1075000, 1037500, 1012500, 1000000, 987500,
+	975000, 925000, 925000, 925000, 900000
 };
 
 static struct cpufreq_frequency_table exynos4x12_freq_table[] = {
@@ -83,6 +84,9 @@ static struct apll_freq apll_freq_4412[] = {
 	 * clock divider for COPY, HPM, CORES
 	 * PLL M, P, S
 	 */
+	APLL_FREQ(1800, 0, 3, 7, 0, 6, 1, 2, 0, 7, 0, 7, 300, 4, 0),
+	APLL_FREQ(1704, 0, 3, 7, 0, 6, 1, 2, 0, 7, 0, 7, 213, 3, 0),
+	APLL_FREQ(1600, 0, 3, 7, 0, 6, 1, 2, 0, 6, 0, 7, 200, 3, 0),
 	APLL_FREQ(1500, 0, 3, 7, 0, 6, 1, 2, 0, 6, 0, 7, 250, 4, 0),
 	APLL_FREQ(1400, 0, 3, 7, 0, 6, 1, 2, 0, 6, 0, 6, 175, 3, 0),
 	APLL_FREQ(1300, 0, 3, 7, 0, 5, 1, 2, 0, 5, 0, 6, 325, 6, 0),
@@ -186,10 +190,13 @@ int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
 	if (IS_ERR(mout_apll))
 		goto err_mout_apll;
 
-	if (soc_is_exynos4212())
+	if (soc_is_exynos4212()) {
+		info->freq_levels = ARRAY_SIZE(apll_freq_4212);
 		apll_freq_4x12 = apll_freq_4212;
-	else
+	} else {
+		info->freq_levels = ARRAY_SIZE(apll_freq_4412);
 		apll_freq_4x12 = apll_freq_4412;
+	}
 
 	info->mpll_freq_khz = rate;
 	/* 800Mhz */