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| author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2012-11-17 15:22:25 +0100 |
|---|---|---|
| committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-11-20 14:46:49 +0100 |
| commit | 307c2bf467e3682c6df1b8186365224fd2d581d3 (patch) | |
| tree | e746efe036e9e5bf44599239f3edf5f1106d5b18 /drivers/clocksource | |
| parent | 9d2027830c6306b079d5e888d40ec1f2efebd6ad (diff) | |
| download | linux-3.10-307c2bf467e3682c6df1b8186365224fd2d581d3.tar.gz linux-3.10-307c2bf467e3682c6df1b8186365224fd2d581d3.tar.bz2 linux-3.10-307c2bf467e3682c6df1b8186365224fd2d581d3.zip | |
clocksource: convert time-armada-370-xp to clk framework
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/time-armada-370-xp.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c index 4674f94957c..a4605fd7e30 100644 --- a/drivers/clocksource/time-armada-370-xp.c +++ b/drivers/clocksource/time-armada-370-xp.c @@ -18,6 +18,7 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/kernel.h> +#include <linux/clk.h> #include <linux/timer.h> #include <linux/clockchips.h> #include <linux/interrupt.h> @@ -167,7 +168,6 @@ void __init armada_370_xp_timer_init(void) u32 u; struct device_node *np; unsigned int timer_clk; - int ret; np = of_find_compatible_node(NULL, NULL, "marvell,armada-370-xp-timer"); timer_base = of_iomap(np, 0); WARN_ON(!timer_base); @@ -179,13 +179,14 @@ void __init armada_370_xp_timer_init(void) timer_base + TIMER_CTRL_OFF); timer_clk = 25000000; } else { - u32 clk = 0; - ret = of_property_read_u32(np, "clock-frequency", &clk); - WARN_ON(!clk || ret < 0); + unsigned long rate = 0; + struct clk *clk = of_clk_get(np, 0); + WARN_ON(IS_ERR(clk)); + rate = clk_get_rate(clk); u = readl(timer_base + TIMER_CTRL_OFF); writel(u & ~(TIMER0_25MHZ | TIMER1_25MHZ), timer_base + TIMER_CTRL_OFF); - timer_clk = clk / TIMER_DIVIDER; + timer_clk = rate / TIMER_DIVIDER; } /* We use timer 0 as clocksource, and timer 1 for |